[net-next-2.6.git] / drivers / net / wireless / rtl818x / rtl8180.h

#ifndef RTL8180_H
#define RTL8180_H

#include "rtl818x.h"

#define MAX_RX_SIZE IEEE80211_MAX_RTS_THRESHOLD

#define RF_PARAM_ANALOGPHY	(1 << 0)
#define RF_PARAM_ANTBDEFAULT	(1 << 1)
#define RF_PARAM_CARRIERSENSE1	(1 << 2)
#define RF_PARAM_CARRIERSENSE2	(1 << 3)

#define BB_ANTATTEN_CHAN14	0x0C
#define BB_ANTENNA_B 		0x40

#define BB_HOST_BANG 		(1 << 30)
#define BB_HOST_BANG_EN 	(1 << 2)
#define BB_HOST_BANG_CLK 	(1 << 1)
#define BB_HOST_BANG_DATA	1

#define ANAPARAM_TXDACOFF_SHIFT	27
#define ANAPARAM_PWR0_SHIFT	28
#define ANAPARAM_PWR0_MASK 	(0x07 << ANAPARAM_PWR0_SHIFT)
#define ANAPARAM_PWR1_SHIFT	20
#define ANAPARAM_PWR1_MASK	(0x7F << ANAPARAM_PWR1_SHIFT)

struct rtl8180_tx_desc {
	__le32 flags;
	__le16 rts_duration;
	__le16 plcp_len;
	__le32 tx_buf;
	__le32 frame_len;
	__le32 next_tx_desc;
	u8 cw;
	u8 retry_limit;
	u8 agc;
	u8 flags2;
	u32 reserved[2];
} __attribute__ ((packed));

struct rtl8180_rx_desc {
	__le32 flags;
	__le32 flags2;
	union {
		__le32 rx_buf;
		__le64 tsft;
	};
} __attribute__ ((packed));

struct rtl8180_tx_ring {
	struct rtl8180_tx_desc *desc;
	dma_addr_t dma;
	unsigned int idx;
	unsigned int entries;
	struct sk_buff_head queue;
};

struct rtl8180_priv {
	/* common between rtl818x drivers */
	struct rtl818x_csr __iomem *map;
	const struct rtl818x_rf_ops *rf;
	struct ieee80211_vif *vif;

	/* rtl8180 driver specific */
	spinlock_t lock;
	struct rtl8180_rx_desc *rx_ring;
	dma_addr_t rx_ring_dma;
	unsigned int rx_idx;
	struct sk_buff *rx_buf[32];
	struct rtl8180_tx_ring tx_ring[4];
	struct ieee80211_channel channels[14];
	struct ieee80211_rate rates[12];
	struct ieee80211_supported_band band;
	struct pci_dev *pdev;
	u32 rx_conf;

	int r8185;
	u32 anaparam;
	u16 rfparam;
	u8 csthreshold;

	/* sequence # */
	u16 seqno;
};

void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);
void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam);

static inline u8 rtl818x_ioread8(struct rtl8180_priv *priv, u8 __iomem *addr)
{
	return ioread8(addr);
}

static inline u16 rtl818x_ioread16(struct rtl8180_priv *priv, __le16 __iomem *addr)
{
	return ioread16(addr);
}

static inline u32 rtl818x_ioread32(struct rtl8180_priv *priv, __le32 __iomem *addr)
{
	return ioread32(addr);
}

static inline void rtl818x_iowrite8(struct rtl8180_priv *priv,
				    u8 __iomem *addr, u8 val)
{
	iowrite8(val, addr);
}

static inline void rtl818x_iowrite16(struct rtl8180_priv *priv,
				     __le16 __iomem *addr, u16 val)
{
	iowrite16(val, addr);
}

static inline void rtl818x_iowrite32(struct rtl8180_priv *priv,
				     __le32 __iomem *addr, u32 val)
{
	iowrite32(val, addr);
}

#endif /* RTL8180_H */
Commit	Line	Data
f6532111 MW	1	#ifndef RTL8180_H
	2	#define RTL8180_H
	3
	4	#include "rtl818x.h"
	5
	6	#define MAX_RX_SIZE IEEE80211_MAX_RTS_THRESHOLD
	7
	8	#define RF_PARAM_ANALOGPHY (1 << 0)
	9	#define RF_PARAM_ANTBDEFAULT (1 << 1)
	10	#define RF_PARAM_CARRIERSENSE1 (1 << 2)
	11	#define RF_PARAM_CARRIERSENSE2 (1 << 3)
	12
	13	#define BB_ANTATTEN_CHAN14 0x0C
	14	#define BB_ANTENNA_B 0x40
	15
	16	#define BB_HOST_BANG (1 << 30)
	17	#define BB_HOST_BANG_EN (1 << 2)
	18	#define BB_HOST_BANG_CLK (1 << 1)
	19	#define BB_HOST_BANG_DATA 1
	20
	21	#define ANAPARAM_TXDACOFF_SHIFT 27
	22	#define ANAPARAM_PWR0_SHIFT 28
	23	#define ANAPARAM_PWR0_MASK (0x07 << ANAPARAM_PWR0_SHIFT)
	24	#define ANAPARAM_PWR1_SHIFT 20
	25	#define ANAPARAM_PWR1_MASK (0x7F << ANAPARAM_PWR1_SHIFT)
	26
f6532111 MW	27	struct rtl8180_tx_desc {
	28	__le32 flags;
	29	__le16 rts_duration;
	30	__le16 plcp_len;
	31	__le32 tx_buf;
	32	__le32 frame_len;
	33	__le32 next_tx_desc;
	34	u8 cw;
	35	u8 retry_limit;
	36	u8 agc;
	37	u8 flags2;
	38	u32 reserved[2];
	39	} __attribute__ ((packed));
	40
f6532111 MW	41	struct rtl8180_rx_desc {
	42	__le32 flags;
	43	__le32 flags2;
	44	union {
	45	__le32 rx_buf;
	46	__le64 tsft;
	47	};
	48	} __attribute__ ((packed));
	49
	50	struct rtl8180_tx_ring {
	51	struct rtl8180_tx_desc *desc;
	52	dma_addr_t dma;
	53	unsigned int idx;
	54	unsigned int entries;
	55	struct sk_buff_head queue;
	56	};
	57
	58	struct rtl8180_priv {
	59	/* common between rtl818x drivers */
	60	struct rtl818x_csr __iomem *map;
	61	const struct rtl818x_rf_ops *rf;
32bfd35d	62	struct ieee80211_vif *vif;
f6532111 MW	63
	64	/* rtl8180 driver specific */
	65	spinlock_t lock;
	66	struct rtl8180_rx_desc *rx_ring;
	67	dma_addr_t rx_ring_dma;
	68	unsigned int rx_idx;
	69	struct sk_buff *rx_buf[32];
	70	struct rtl8180_tx_ring tx_ring[4];
	71	struct ieee80211_channel channels[14];
	72	struct ieee80211_rate rates[12];
8318d78a	73	struct ieee80211_supported_band band;
f6532111 MW	74	struct pci_dev *pdev;
	75	u32 rx_conf;
	76
	77	int r8185;
	78	u32 anaparam;
	79	u16 rfparam;
	80	u8 csthreshold;
51e080de JL	81
	82	/* sequence # */
	83	u16 seqno;
f6532111 MW	84	};
	85
	86	void rtl8180_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data);
	87	void rtl8180_set_anaparam(struct rtl8180_priv *priv, u32 anaparam);
	88
	89	static inline u8 rtl818x_ioread8(struct rtl8180_priv priv, u8 __iomem addr)
	90	{
	91	return ioread8(addr);
	92	}
	93
	94	static inline u16 rtl818x_ioread16(struct rtl8180_priv priv, __le16 __iomem addr)
	95	{
	96	return ioread16(addr);
	97	}
	98
	99	static inline u32 rtl818x_ioread32(struct rtl8180_priv priv, __le32 __iomem addr)
	100	{
	101	return ioread32(addr);
	102	}
	103
	104	static inline void rtl818x_iowrite8(struct rtl8180_priv *priv,
	105	u8 __iomem *addr, u8 val)
	106	{
	107	iowrite8(val, addr);
	108	}
	109
	110	static inline void rtl818x_iowrite16(struct rtl8180_priv *priv,
	111	__le16 __iomem *addr, u16 val)
	112	{
	113	iowrite16(val, addr);
	114	}
	115
	116	static inline void rtl818x_iowrite32(struct rtl8180_priv *priv,
	117	__le32 __iomem *addr, u32 val)
	118	{
	119	iowrite32(val, addr);
	120	}
	121
	122	#endif /* RTL8180_H */