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iwl3945: Reset saved POWER_TABLE_CMD in "up"
[net-next-2.6.git] / drivers / net / wireless / iwlwifi / iwl-dev.h
CommitLineData
b481de9c
ZY
1/******************************************************************************
2 *
01f8162a 3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
b481de9c
ZY
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
759ef89f 22 * Intel Linux Wireless <ilw@linux.intel.com>
b481de9c
ZY
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
fcd427bb 26/*
3e0d4cb1 27 * Please use this file (iwl-dev.h) for driver implementation definitions.
5a36ba0e 28 * Please use iwl-commands.h for uCode API definitions.
fcd427bb
BC
29 * Please use iwl-4965-hw.h for hardware-related definitions.
30 */
31
be1f3ab6
EG
32#ifndef __iwl_dev_h__
33#define __iwl_dev_h__
b481de9c 34
5d08cd1d
CH
35#include <linux/pci.h> /* for struct pci_device_id */
36#include <linux/kernel.h>
37#include <net/ieee80211_radiotap.h>
38
6bc913bd 39#include "iwl-eeprom.h"
6f83eaa1 40#include "iwl-csr.h"
5d08cd1d 41#include "iwl-prph.h"
dbb6654c 42#include "iwl-fh.h"
0a6857e7 43#include "iwl-debug.h"
dbb6654c
WT
44#include "iwl-4965-hw.h"
45#include "iwl-3945-hw.h"
ab53d8af 46#include "iwl-led.h"
5da4b55f 47#include "iwl-power.h"
e227ceac 48#include "iwl-agn-rs.h"
5d08cd1d 49
fed9017e
RR
50/* configuration for the iwl4965 */
51extern struct iwl_cfg iwl4965_agn_cfg;
5a6a256e
TW
52extern struct iwl_cfg iwl5300_agn_cfg;
53extern struct iwl_cfg iwl5100_agn_cfg;
54extern struct iwl_cfg iwl5350_agn_cfg;
47408639
EK
55extern struct iwl_cfg iwl5100_bg_cfg;
56extern struct iwl_cfg iwl5100_abg_cfg;
7100e924 57extern struct iwl_cfg iwl5150_agn_cfg;
65b7998a 58extern struct iwl_cfg iwl6000i_2agn_cfg;
5953a62e
WYG
59extern struct iwl_cfg iwl6000i_2abg_cfg;
60extern struct iwl_cfg iwl6000i_2bg_cfg;
e1228374
JS
61extern struct iwl_cfg iwl6000_3agn_cfg;
62extern struct iwl_cfg iwl6050_2agn_cfg;
5953a62e 63extern struct iwl_cfg iwl6050_2abg_cfg;
77dcb6a9 64extern struct iwl_cfg iwl1000_bgn_cfg;
4bd0914f 65extern struct iwl_cfg iwl1000_bg_cfg;
fed9017e 66
672639de
WYG
67struct iwl_tx_queue;
68
cec2d3f3
JS
69/* shared structures from iwl-5000.c */
70extern struct iwl_mod_params iwl50_mod_params;
cc0f555d 71extern struct iwl_ucode_ops iwl5000_ucode;
e8c00dcb
JS
72extern struct iwl_lib_ops iwl5000_lib;
73extern struct iwl_hcmd_ops iwl5000_hcmd;
74extern struct iwl_hcmd_utils_ops iwl5000_hcmd_utils;
75
76/* shared functions from iwl-5000.c */
77extern u16 iwl5000_get_hcmd_size(u8 cmd_id, u16 len);
78extern u16 iwl5000_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd,
79 u8 *data);
80extern void iwl5000_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
81 __le32 *tx_flags);
82extern int iwl5000_calc_rssi(struct iwl_priv *priv,
83 struct iwl_rx_phy_res *rx_resp);
672639de
WYG
84extern void iwl5000_nic_config(struct iwl_priv *priv);
85extern u16 iwl5000_eeprom_calib_version(struct iwl_priv *priv);
86extern const u8 *iwl5000_eeprom_query_addr(const struct iwl_priv *priv,
87 size_t offset);
88extern void iwl5000_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
89 struct iwl_tx_queue *txq,
90 u16 byte_cnt);
91extern void iwl5000_txq_inval_byte_cnt_tbl(struct iwl_priv *priv,
92 struct iwl_tx_queue *txq);
93extern int iwl5000_load_ucode(struct iwl_priv *priv);
94extern void iwl5000_init_alive_start(struct iwl_priv *priv);
95extern int iwl5000_alive_notify(struct iwl_priv *priv);
96extern int iwl5000_hw_set_hw_params(struct iwl_priv *priv);
97extern int iwl5000_txq_agg_enable(struct iwl_priv *priv, int txq_id,
98 int tx_fifo, int sta_id, int tid, u16 ssn_idx);
99extern int iwl5000_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
100 u16 ssn_idx, u8 tx_fifo);
101extern void iwl5000_txq_set_sched(struct iwl_priv *priv, u32 mask);
102extern void iwl5000_setup_deferred_work(struct iwl_priv *priv);
103extern void iwl5000_rx_handler_setup(struct iwl_priv *priv);
104extern int iwl5000_hw_valid_rtc_data_addr(u32 addr);
105extern int iwl5000_send_tx_power(struct iwl_priv *priv);
106extern void iwl5000_temperature(struct iwl_priv *priv);
cec2d3f3 107
099b40b7 108/* CT-KILL constants */
672639de
WYG
109#define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */
110#define CT_KILL_THRESHOLD 114 /* in Celsius */
111#define CT_KILL_EXIT_THRESHOLD 95 /* in Celsius */
4bf775cd 112
5d08cd1d
CH
113/* Default noise level to report when noise measurement is not available.
114 * This may be because we're:
115 * 1) Not associated (4965, no beacon statistics being sent to driver)
116 * 2) Scanning (noise measurement does not apply to associated channel)
117 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
118 * Use default noise value of -127 ... this is below the range of measurable
119 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
120 * Also, -127 works better than 0 when averaging frames with/without
121 * noise info (e.g. averaging might be done in app); measured dBm values are
122 * always negative ... using a negative value as the default keeps all
123 * averages within an s8's (used in some apps) range of negative values. */
124#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
125
5d08cd1d
CH
126/*
127 * RTS threshold here is total size [2347] minus 4 FCS bytes
128 * Per spec:
129 * a value of 0 means RTS on all data/management packets
130 * a value > max MSDU size means no RTS
131 * else RTS for data/management frames where MPDU is larger
132 * than RTS value.
133 */
134#define DEFAULT_RTS_THRESHOLD 2347U
135#define MIN_RTS_THRESHOLD 0U
136#define MAX_RTS_THRESHOLD 2347U
137#define MAX_MSDU_SIZE 2304U
138#define MAX_MPDU_SIZE 2346U
139#define DEFAULT_BEACON_INTERVAL 100U
140#define DEFAULT_SHORT_RETRY_LIMIT 7U
141#define DEFAULT_LONG_RETRY_LIMIT 4U
142
a55360e4 143struct iwl_rx_mem_buffer {
2f301227
ZY
144 dma_addr_t page_dma;
145 struct page *page;
5d08cd1d
CH
146 struct list_head list;
147};
148
2f301227
ZY
149#define rxb_addr(r) page_address(r->page)
150
c2acea8e
JB
151/* defined below */
152struct iwl_device_cmd;
153
154struct iwl_cmd_meta {
155 /* only for SYNC commands, iff the reply skb is wanted */
156 struct iwl_host_cmd *source;
157 /*
158 * only for ASYNC commands
159 * (which is somewhat stupid -- look at iwl-sta.c for instance
160 * which duplicates a bunch of code because the callback isn't
161 * invoked for SYNC commands, if it were and its result passed
162 * through it would be simpler...)
163 */
5696aea6
JB
164 void (*callback)(struct iwl_priv *priv,
165 struct iwl_device_cmd *cmd,
2f301227 166 struct iwl_rx_packet *pkt);
c2acea8e
JB
167
168 /* The CMD_SIZE_HUGE flag bit indicates that the command
169 * structure is stored at the end of the shared queue memory. */
170 u32 flags;
171
172 DECLARE_PCI_UNMAP_ADDR(mapping)
173 DECLARE_PCI_UNMAP_LEN(len)
174};
175
5d08cd1d
CH
176/*
177 * Generic queue structure
178 *
179 * Contains common data for Rx and Tx queues
180 */
443cfd45 181struct iwl_queue {
5d08cd1d
CH
182 int n_bd; /* number of BDs in this queue */
183 int write_ptr; /* 1-st empty entry (index) host_w*/
184 int read_ptr; /* last used entry (index) host_r*/
185 dma_addr_t dma_addr; /* physical addr for BD's */
186 int n_window; /* safe queue window */
187 u32 id;
188 int low_mark; /* low watermark, resume queue if free
189 * space more than this */
190 int high_mark; /* high watermark, stop queue if free
191 * space less than this */
192} __attribute__ ((packed));
193
bc47279f 194/* One for each TFD */
8567c63e 195struct iwl_tx_info {
499b1883 196 struct sk_buff *skb[IWL_NUM_OF_TBS - 1];
5d08cd1d
CH
197};
198
199/**
16466903 200 * struct iwl_tx_queue - Tx Queue for DMA
bc47279f
BC
201 * @q: generic Rx/Tx queue descriptor
202 * @bd: base of circular buffer of TFDs
c2acea8e
JB
203 * @cmd: array of command/TX buffer pointers
204 * @meta: array of meta data for each command/tx buffer
bc47279f
BC
205 * @dma_addr_cmd: physical address of cmd/tx buffer array
206 * @txb: array of per-TFD driver data
207 * @need_update: indicates need to update read/write index
208 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
5d08cd1d 209 *
bc47279f
BC
210 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
211 * descriptors) and required locking structures.
5d08cd1d 212 */
188cf6c7
SO
213#define TFD_TX_CMD_SLOTS 256
214#define TFD_CMD_SLOTS 32
215
16466903 216struct iwl_tx_queue {
443cfd45 217 struct iwl_queue q;
59606ffa 218 void *tfds;
c2acea8e
JB
219 struct iwl_device_cmd **cmd;
220 struct iwl_cmd_meta *meta;
8567c63e 221 struct iwl_tx_info *txb;
3fd07a1e
TW
222 u8 need_update;
223 u8 sched_retry;
224 u8 active;
225 u8 swq_id;
5d08cd1d
CH
226};
227
228#define IWL_NUM_SCAN_RATES (2)
229
bb8c093b 230struct iwl4965_channel_tgd_info {
5d08cd1d
CH
231 u8 type;
232 s8 max_power;
233};
234
bb8c093b 235struct iwl4965_channel_tgh_info {
5d08cd1d
CH
236 s64 last_radar_time;
237};
238
d20b3c65
SO
239#define IWL4965_MAX_RATE (33)
240
85d41495
KA
241struct iwl3945_clip_group {
242 /* maximum power level to prevent clipping for each rate, derived by
243 * us from this band's saturation power in EEPROM */
244 const s8 clip_powers[IWL_MAX_RATES];
245};
246
d20b3c65
SO
247/* current Tx power values to use, one for each rate for each channel.
248 * requested power is limited by:
249 * -- regulatory EEPROM limits for this channel
250 * -- hardware capabilities (clip-powers)
251 * -- spectrum management
252 * -- user preference (e.g. iwconfig)
253 * when requested power is set, base power index must also be set. */
254struct iwl3945_channel_power_info {
255 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */
256 s8 power_table_index; /* actual (compenst'd) index into gain table */
257 s8 base_power_index; /* gain index for power at factory temp. */
258 s8 requested_power; /* power (dBm) requested for this chnl/rate */
259};
260
261/* current scan Tx power values to use, one for each scan rate for each
262 * channel. */
263struct iwl3945_scan_power_info {
264 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */
265 s8 power_table_index; /* actual (compenst'd) index into gain table */
266 s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */
267};
268
5d08cd1d
CH
269/*
270 * One for each channel, holds all channel setup data
271 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
272 * with one another!
273 */
bf85ea4f 274struct iwl_channel_info {
bb8c093b
CH
275 struct iwl4965_channel_tgd_info tgd;
276 struct iwl4965_channel_tgh_info tgh;
073d3f5f 277 struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */
7aafef1c
WYG
278 struct iwl_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for
279 * HT40 channel */
5d08cd1d
CH
280
281 u8 channel; /* channel number */
282 u8 flags; /* flags copied from EEPROM */
283 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
fcd427bb 284 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
5d08cd1d
CH
285 s8 min_power; /* always 0 */
286 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
287
288 u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */
289 u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */
8318d78a 290 enum ieee80211_band band;
5d08cd1d 291
7aafef1c
WYG
292 /* HT40 channel info */
293 s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
7aafef1c
WYG
294 u8 ht40_flags; /* flags copied from EEPROM */
295 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */
d20b3c65
SO
296
297 /* Radio/DSP gain settings for each "normal" data Tx rate.
298 * These include, in addition to RF and DSP gain, a few fields for
299 * remembering/modifying gain settings (indexes). */
300 struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE];
301
302 /* Radio/DSP gain settings for each scan rate, for directed scans. */
303 struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES];
5d08cd1d
CH
304};
305
5d08cd1d
CH
306#define IWL_TX_FIFO_AC0 0
307#define IWL_TX_FIFO_AC1 1
308#define IWL_TX_FIFO_AC2 2
309#define IWL_TX_FIFO_AC3 3
310#define IWL_TX_FIFO_HCCA_1 5
311#define IWL_TX_FIFO_HCCA_2 6
312#define IWL_TX_FIFO_NONE 7
313
01a7e084
RC
314/* Minimum number of queues. MAX_NUM is defined in hw specific files.
315 * Set the minimum to accommodate the 4 standard TX queues, 1 command
316 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */
317#define IWL_MIN_NUM_QUEUES 10
5d08cd1d 318
bd35f150 319/*
1a716557
JB
320 * Queue #4 is the command queue for 3945/4965/5x00/1000/6x00,
321 * the driver maps it into the appropriate device FIFO for the
322 * uCode.
bd35f150
WYG
323 */
324#define IWL_CMD_QUEUE_NUM 4
325
5d08cd1d
CH
326/* Power management (not Tx power) structures */
327
6f4083aa
TW
328enum iwl_pwr_src {
329 IWL_PWR_SRC_VMAIN,
330 IWL_PWR_SRC_VAUX,
331};
332
5d08cd1d
CH
333#define IEEE80211_DATA_LEN 2304
334#define IEEE80211_4ADDR_LEN 30
335#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
336#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
337
fcab423d 338struct iwl_frame {
5d08cd1d
CH
339 union {
340 struct ieee80211_hdr frame;
4bf64efd 341 struct iwl_tx_beacon_cmd beacon;
5d08cd1d
CH
342 u8 raw[IEEE80211_FRAME_LEN];
343 u8 cmd[360];
344 } u;
345 struct list_head list;
346};
347
5d08cd1d
CH
348#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
349#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
350#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
351
352enum {
c587de0b
TW
353 CMD_SYNC = 0,
354 CMD_SIZE_NORMAL = 0,
355 CMD_NO_SKB = 0,
5d08cd1d 356 CMD_SIZE_HUGE = (1 << 0),
5d08cd1d 357 CMD_ASYNC = (1 << 1),
5d08cd1d
CH
358 CMD_WANT_SKB = (1 << 2),
359};
360
c8c24872 361#define DEF_CMD_PAYLOAD_SIZE 320
bd68fb6f 362
2f301227
ZY
363/*
364 * IWL_LINK_HDR_MAX should include ieee80211_hdr, radiotap header,
365 * SNAP header and alignment. It should also be big enough for 802.11
366 * control frames.
367 */
368#define IWL_LINK_HDR_MAX 64
369
bc47279f 370/**
c2acea8e 371 * struct iwl_device_cmd
bc47279f
BC
372 *
373 * For allocation of the command and tx queues, this establishes the overall
374 * size of the largest command we send to uCode, except for a scan command
375 * (which is relatively huge; space is allocated separately).
376 */
c2acea8e 377struct iwl_device_cmd {
857485c0 378 struct iwl_cmd_header hdr; /* uCode API */
5d08cd1d 379 union {
5d08cd1d
CH
380 u32 flags;
381 u8 val8;
382 u16 val16;
383 u32 val32;
83d527d9 384 struct iwl_tx_cmd tx;
c8c24872
WYG
385 struct iwl6000_channel_switch_cmd chswitch;
386 u8 payload[DEF_CMD_PAYLOAD_SIZE];
5d08cd1d
CH
387 } __attribute__ ((packed)) cmd;
388} __attribute__ ((packed));
389
c2acea8e
JB
390#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd))
391
3257e5d4 392
857485c0 393struct iwl_host_cmd {
5d08cd1d 394 const void *data;
2f301227 395 unsigned long reply_page;
5696aea6
JB
396 void (*callback)(struct iwl_priv *priv,
397 struct iwl_device_cmd *cmd,
2f301227 398 struct iwl_rx_packet *pkt);
c2acea8e
JB
399 u32 flags;
400 u16 len;
401 u8 id;
5d08cd1d
CH
402};
403
5d08cd1d
CH
404#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
405#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
406#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
407
408/**
a55360e4 409 * struct iwl_rx_queue - Rx queue
df833b1d
RC
410 * @bd: driver's pointer to buffer of receive buffer descriptors (rbd)
411 * @dma_addr: bus address of buffer of receive buffer descriptors (rbd)
5d08cd1d
CH
412 * @read: Shared index to newest available Rx buffer
413 * @write: Shared index to oldest written Rx packet
414 * @free_count: Number of pre-allocated buffers in rx_free
415 * @rx_free: list of free SKBs for use
416 * @rx_used: List of Rx buffers with no SKB
417 * @need_update: flag to indicate we need to update read/write index
df833b1d
RC
418 * @rb_stts: driver's pointer to receive buffer status
419 * @rb_stts_dma: bus address of receive buffer status
5d08cd1d 420 *
a55360e4 421 * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers
5d08cd1d 422 */
a55360e4 423struct iwl_rx_queue {
5d08cd1d
CH
424 __le32 *bd;
425 dma_addr_t dma_addr;
a55360e4
TW
426 struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
427 struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE];
5d08cd1d
CH
428 u32 read;
429 u32 write;
430 u32 free_count;
4752c93c 431 u32 write_actual;
5d08cd1d
CH
432 struct list_head rx_free;
433 struct list_head rx_used;
434 int need_update;
8d86422a
WT
435 struct iwl_rb_status *rb_stts;
436 dma_addr_t rb_stts_dma;
5d08cd1d
CH
437 spinlock_t lock;
438};
439
440#define IWL_SUPPORTED_RATES_IE_LEN 8
441
5d08cd1d
CH
442#define MAX_TID_COUNT 9
443
444#define IWL_INVALID_RATE 0xFF
445#define IWL_INVALID_VALUE -1
446
bc47279f 447/**
6def9761 448 * struct iwl_ht_agg -- aggregation status while waiting for block-ack
bc47279f
BC
449 * @txq_id: Tx queue used for Tx attempt
450 * @frame_count: # frames attempted by Tx command
451 * @wait_for_ba: Expect block-ack before next Tx reply
452 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window
453 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window
454 * @bitmap1: High order, one bit for each frame pending ACK in Tx window
455 * @rate_n_flags: Rate at which Tx was attempted
456 *
457 * If REPLY_TX indicates that aggregation was attempted, driver must wait
458 * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info
459 * until block ack arrives.
460 */
6def9761 461struct iwl_ht_agg {
5d08cd1d
CH
462 u16 txq_id;
463 u16 frame_count;
464 u16 wait_for_ba;
465 u16 start_idx;
fe01b477 466 u64 bitmap;
5d08cd1d 467 u32 rate_n_flags;
fe01b477
RR
468#define IWL_AGG_OFF 0
469#define IWL_AGG_ON 1
470#define IWL_EMPTYING_HW_QUEUE_ADDBA 2
471#define IWL_EMPTYING_HW_QUEUE_DELBA 3
472 u8 state;
5d08cd1d 473};
fe01b477 474
5d08cd1d 475
6def9761 476struct iwl_tid_data {
5d08cd1d 477 u16 seq_number;
fe01b477 478 u16 tfds_in_queue;
6def9761 479 struct iwl_ht_agg agg;
5d08cd1d
CH
480};
481
6def9761 482struct iwl_hw_key {
5d08cd1d
CH
483 enum ieee80211_key_alg alg;
484 int keylen;
0211ddda 485 u8 keyidx;
5d08cd1d
CH
486 u8 key[32];
487};
488
a78fe754 489union iwl_ht_rate_supp {
5d08cd1d
CH
490 u16 rates;
491 struct {
492 u8 siso_rate;
493 u8 mimo_rate;
494 };
495};
496
5d08cd1d 497#define CFG_HT_RX_AMPDU_FACTOR_DEF (0x3)
bcc693a1
WYG
498
499/*
500 * Maximal MPDU density for TX aggregation
501 * 4 - 2us density
502 * 5 - 4us density
503 * 6 - 8us density
504 * 7 - 16us density
505 */
506#define CFG_HT_MPDU_DENSITY_4USEC (0x5)
507#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC
5d08cd1d 508
fad95bf5 509struct iwl_ht_config {
9e0cc6de 510 /* self configuration data */
c812ee24
JB
511 bool is_ht;
512 bool is_40mhz;
02bb1bea 513 bool single_chain_sufficient;
3f3e0376 514 u8 sm_ps;
9e0cc6de 515 /* BSS related data */
5d08cd1d 516 u8 extension_chan_offset;
9e0cc6de
RR
517 u8 ht_protection;
518 u8 non_GF_STA_present;
5d08cd1d 519};
5d08cd1d 520
1ff50bda 521union iwl_qos_capabity {
5d08cd1d
CH
522 struct {
523 u8 edca_count:4; /* bit 0-3 */
524 u8 q_ack:1; /* bit 4 */
525 u8 queue_request:1; /* bit 5 */
526 u8 txop_request:1; /* bit 6 */
527 u8 reserved:1; /* bit 7 */
528 } q_AP;
529 struct {
530 u8 acvo_APSD:1; /* bit 0 */
531 u8 acvi_APSD:1; /* bit 1 */
532 u8 ac_bk_APSD:1; /* bit 2 */
533 u8 ac_be_APSD:1; /* bit 3 */
534 u8 q_ack:1; /* bit 4 */
535 u8 max_len:2; /* bit 5-6 */
536 u8 more_data_ack:1; /* bit 7 */
537 } q_STA;
538 u8 val;
539};
540
541/* QoS structures */
1ff50bda 542struct iwl_qos_info {
5d08cd1d 543 int qos_active;
1ff50bda
EG
544 union iwl_qos_capabity qos_cap;
545 struct iwl_qosparam_cmd def_qos_parm;
5d08cd1d 546};
5d08cd1d
CH
547
548#define STA_PS_STATUS_WAKE 0
549#define STA_PS_STATUS_SLEEP 1
550
85d41495
KA
551
552struct iwl3945_station_entry {
553 struct iwl3945_addsta_cmd sta;
c15ff610 554 struct iwl_tid_data tid[MAX_TID_COUNT];
85d41495
KA
555 u8 used;
556 u8 ps_status;
bed420d9 557 struct iwl_hw_key keyinfo;
85d41495
KA
558};
559
6def9761 560struct iwl_station_entry {
133636de 561 struct iwl_addsta_cmd sta;
6def9761 562 struct iwl_tid_data tid[MAX_TID_COUNT];
5d08cd1d
CH
563 u8 used;
564 u8 ps_status;
6def9761 565 struct iwl_hw_key keyinfo;
5d08cd1d
CH
566};
567
8d9698b3
RC
568/*
569 * iwl_station_priv: Driver's private station information
570 *
571 * When mac80211 creates a station it reserves some space (hw->sta_data_size)
572 * in the structure for use by driver. This structure is places in that
573 * space.
574 *
575 * At the moment use it for the station's rate scaling information.
576 */
577struct iwl_station_priv {
578 struct iwl_lq_sta lq_sta;
579};
580
5d08cd1d
CH
581/* one for each uCode image (inst/data, boot/init/runtime) */
582struct fw_desc {
583 void *v_addr; /* access by driver */
584 dma_addr_t p_addr; /* access by card's busmaster DMA */
585 u32 len; /* bytes */
586};
587
588/* uCode file layout */
cc0f555d
JS
589struct iwl_ucode_header {
590 __le32 ver; /* major/minor/API/serial */
591 union {
592 struct {
593 __le32 inst_size; /* bytes of runtime code */
594 __le32 data_size; /* bytes of runtime data */
595 __le32 init_size; /* bytes of init code */
596 __le32 init_data_size; /* bytes of init data */
597 __le32 boot_size; /* bytes of bootstrap code */
598 u8 data[0]; /* in same order as sizes */
599 } v1;
600 struct {
601 __le32 build; /* build number */
602 __le32 inst_size; /* bytes of runtime code */
603 __le32 data_size; /* bytes of runtime data */
604 __le32 init_size; /* bytes of init code */
605 __le32 init_data_size; /* bytes of init data */
606 __le32 boot_size; /* bytes of bootstrap code */
607 u8 data[0]; /* in same order as sizes */
608 } v2;
609 } u;
5d08cd1d 610};
cc0f555d 611#define UCODE_HEADER_SIZE(ver) ((ver) == 1 ? 24 : 28)
5d08cd1d 612
bb8c093b 613struct iwl4965_ibss_seq {
5d08cd1d
CH
614 u8 mac[ETH_ALEN];
615 u16 seq_num;
616 u16 frag_num;
617 unsigned long packet_time;
618 struct list_head list;
619};
620
f0832f13
EG
621struct iwl_sensitivity_ranges {
622 u16 min_nrg_cck;
623 u16 max_nrg_cck;
624
625 u16 nrg_th_cck;
626 u16 nrg_th_ofdm;
627
628 u16 auto_corr_min_ofdm;
629 u16 auto_corr_min_ofdm_mrc;
630 u16 auto_corr_min_ofdm_x1;
631 u16 auto_corr_min_ofdm_mrc_x1;
632
633 u16 auto_corr_max_ofdm;
634 u16 auto_corr_max_ofdm_mrc;
635 u16 auto_corr_max_ofdm_x1;
636 u16 auto_corr_max_ofdm_mrc_x1;
637
638 u16 auto_corr_max_cck;
639 u16 auto_corr_max_cck_mrc;
640 u16 auto_corr_min_cck;
641 u16 auto_corr_min_cck_mrc;
55036d66
WYG
642
643 u16 barker_corr_th_min;
644 u16 barker_corr_th_min_mrc;
645 u16 nrg_th_cca;
f0832f13
EG
646};
647
099b40b7 648
b5047f78
TW
649#define KELVIN_TO_CELSIUS(x) ((x)-273)
650#define CELSIUS_TO_KELVIN(x) ((x)+273)
651
652
bc47279f 653/**
5425e490 654 * struct iwl_hw_params
bc47279f 655 * @max_txq_num: Max # Tx queues supported
f3f911d1 656 * @dma_chnl_num: Number of Tx DMA/FIFO channels
4ddbb7d0 657 * @scd_bc_tbls_size: size of scheduler byte count tables
a8e74e27 658 * @tfd_size: TFD size
099b40b7
RR
659 * @tx/rx_chains_num: Number of TX/RX chains
660 * @valid_tx/rx_ant: usable antennas
bc47279f 661 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
bc47279f 662 * @max_rxq_log: Log-base-2 of max_rxq_size
2f301227 663 * @rx_page_order: Rx buffer page order
141c43a3 664 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR
bc47279f
BC
665 * @max_stations:
666 * @bcast_sta_id:
7aafef1c 667 * @ht40_channel: is 40MHz width possible in band 2.4
099b40b7
RR
668 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
669 * @sw_crypto: 0 for hw, 1 for sw
670 * @max_xxx_size: for ucode uses
671 * @ct_kill_threshold: temperature threshold
a96a27f9 672 * @calib_init_cfg: setup initial calibrations for the hw
f0832f13 673 * @struct iwl_sensitivity_ranges: range of sensitivity values
bc47279f 674 */
5425e490 675struct iwl_hw_params {
f3f911d1
ZY
676 u8 max_txq_num;
677 u8 dma_chnl_num;
4ddbb7d0 678 u16 scd_bc_tbls_size;
a8e74e27 679 u32 tfd_size;
ec35cf2a
TW
680 u8 tx_chains_num;
681 u8 rx_chains_num;
682 u8 valid_tx_ant;
683 u8 valid_rx_ant;
5d08cd1d 684 u16 max_rxq_size;
ec35cf2a 685 u16 max_rxq_log;
2f301227 686 u32 rx_page_order;
141c43a3 687 u32 rx_wrt_ptr_reg;
5d08cd1d
CH
688 u8 max_stations;
689 u8 bcast_sta_id;
7aafef1c 690 u8 ht40_channel;
2c2f3b33 691 u8 max_beacon_itrvl; /* in 1024 ms */
099b40b7
RR
692 u32 max_inst_size;
693 u32 max_data_size;
694 u32 max_bsm_size;
695 u32 ct_kill_threshold; /* value in hw-dependent units */
672639de
WYG
696 u32 ct_kill_exit_threshold; /* value in hw-dependent units */
697 /* for 1000, 6000 series and up */
be5d56ed 698 u32 calib_init_cfg;
f0832f13 699 const struct iwl_sensitivity_ranges *sens;
5d08cd1d
CH
700};
701
5d08cd1d 702
5d08cd1d
CH
703/******************************************************************************
704 *
a33c2f47
EG
705 * Functions implemented in core module which are forward declared here
706 * for use by iwl-[4-5].c
5d08cd1d 707 *
a33c2f47
EG
708 * NOTE: The implementation of these functions are not hardware specific
709 * which is why they are in the core module files.
5d08cd1d
CH
710 *
711 * Naming convention --
a33c2f47 712 * iwl_ <-- Is part of iwlwifi
5d08cd1d 713 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
bb8c093b
CH
714 * iwl4965_bg_ <-- Called from work queue context
715 * iwl4965_mac_ <-- mac80211 callback
5d08cd1d
CH
716 *
717 ****************************************************************************/
5b9f8cd3
EG
718extern void iwl_update_chain_flags(struct iwl_priv *priv);
719extern int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src);
a33c2f47 720extern const u8 iwl_bcast_addr[ETH_ALEN];
b3bbacb7 721extern int iwl_rxq_stop(struct iwl_priv *priv);
da1bc453 722extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
443cfd45 723extern int iwl_queue_space(const struct iwl_queue *q);
fd4abac5
TW
724static inline int iwl_queue_used(const struct iwl_queue *q, int i)
725{
726 return q->write_ptr > q->read_ptr ?
727 (i >= q->read_ptr && i < q->write_ptr) :
728 !(i < q->read_ptr && i >= q->write_ptr);
729}
730
731
732static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
733{
c8c24872
WYG
734 /*
735 * This is for init calibration result and scan command which
736 * required buffer > TFD_MAX_PAYLOAD_SIZE,
737 * the big buffer at end of command array
738 */
fd4abac5
TW
739 if (is_huge)
740 return q->n_window; /* must be power of 2 */
741
742 /* Otherwise, use normal size buffers */
743 return index & (q->n_window - 1);
744}
745
746
4ddbb7d0
TW
747struct iwl_dma_ptr {
748 dma_addr_t dma;
749 void *addr;
b481de9c
ZY
750 size_t size;
751};
752
b481de9c
ZY
753#define IWL_OPERATION_MODE_AUTO 0
754#define IWL_OPERATION_MODE_HT_ONLY 1
755#define IWL_OPERATION_MODE_MIXED 2
756#define IWL_OPERATION_MODE_20MHZ 3
757
3195cdb7
TW
758#define IWL_TX_CRC_SIZE 4
759#define IWL_TX_DELIMITER_SIZE 4
b481de9c 760
b481de9c 761#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
b481de9c 762
b481de9c 763/* Sensitivity and chain noise calibration */
b481de9c 764#define INITIALIZATION_VALUE 0xFFFF
d8c07e7a
WYG
765#define IWL4965_CAL_NUM_BEACONS 20
766#define IWL_CAL_NUM_BEACONS 16
b481de9c
ZY
767#define MAXIMUM_ALLOWED_PATHLOSS 15
768
b481de9c
ZY
769#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
770
771#define MAX_FA_OFDM 50
772#define MIN_FA_OFDM 5
773#define MAX_FA_CCK 50
774#define MIN_FA_CCK 5
775
b481de9c
ZY
776#define AUTO_CORR_STEP_OFDM 1
777
b481de9c
ZY
778#define AUTO_CORR_STEP_CCK 3
779#define AUTO_CORR_MAX_TH_CCK 160
780
b481de9c
ZY
781#define NRG_DIFF 2
782#define NRG_STEP_CCK 2
783#define NRG_MARGIN 8
784#define MAX_NUMBER_CCK_NO_FA 100
785
786#define AUTO_CORR_CCK_MIN_VAL_DEF (125)
787
788#define CHAIN_A 0
789#define CHAIN_B 1
790#define CHAIN_C 2
791#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
792#define ALL_BAND_FILTER 0xFF00
793#define IN_BAND_FILTER 0xFF
794#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
795
3195cdb7
TW
796#define NRG_NUM_PREV_STAT_L 20
797#define NUM_RX_CHAINS 3
798
bb8c093b 799enum iwl4965_false_alarm_state {
b481de9c
ZY
800 IWL_FA_TOO_MANY = 0,
801 IWL_FA_TOO_FEW = 1,
802 IWL_FA_GOOD_RANGE = 2,
803};
804
bb8c093b 805enum iwl4965_chain_noise_state {
b481de9c 806 IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
04816448
GE
807 IWL_CHAIN_NOISE_ACCUMULATE,
808 IWL_CHAIN_NOISE_CALIBRATED,
809 IWL_CHAIN_NOISE_DONE,
b481de9c
ZY
810};
811
bb8c093b 812enum iwl4965_calib_enabled_state {
b481de9c
ZY
813 IWL_CALIB_DISABLED = 0, /* must be 0 */
814 IWL_CALIB_ENABLED = 1,
815};
816
f69f42a6
TW
817
818/*
819 * enum iwl_calib
820 * defines the order in which results of initial calibrations
821 * should be sent to the runtime uCode
822 */
823enum iwl_calib {
824 IWL_CALIB_XTAL,
819500c5 825 IWL_CALIB_DC,
f69f42a6
TW
826 IWL_CALIB_LO,
827 IWL_CALIB_TX_IQ,
828 IWL_CALIB_TX_IQ_PERD,
201706ac 829 IWL_CALIB_BASE_BAND,
f69f42a6
TW
830 IWL_CALIB_MAX
831};
832
6e21f2c1
TW
833/* Opaque calibration results */
834struct iwl_calib_result {
835 void *buf;
836 size_t buf_len;
7c616cba
TW
837};
838
dbb983b7
RR
839enum ucode_type {
840 UCODE_NONE = 0,
841 UCODE_INIT,
842 UCODE_RT
843};
844
b481de9c 845/* Sensitivity calib data */
f0832f13 846struct iwl_sensitivity_data {
b481de9c
ZY
847 u32 auto_corr_ofdm;
848 u32 auto_corr_ofdm_mrc;
849 u32 auto_corr_ofdm_x1;
850 u32 auto_corr_ofdm_mrc_x1;
851 u32 auto_corr_cck;
852 u32 auto_corr_cck_mrc;
853
854 u32 last_bad_plcp_cnt_ofdm;
855 u32 last_fa_cnt_ofdm;
856 u32 last_bad_plcp_cnt_cck;
857 u32 last_fa_cnt_cck;
858
859 u32 nrg_curr_state;
860 u32 nrg_prev_state;
861 u32 nrg_value[10];
862 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
863 u32 nrg_silence_ref;
864 u32 nrg_energy_idx;
865 u32 nrg_silence_idx;
866 u32 nrg_th_cck;
867 s32 nrg_auto_corr_silence_diff;
868 u32 num_in_cck_no_fa;
869 u32 nrg_th_ofdm;
55036d66
WYG
870
871 u16 barker_corr_th_min;
872 u16 barker_corr_th_min_mrc;
873 u16 nrg_th_cca;
b481de9c
ZY
874};
875
876/* Chain noise (differential Rx gain) calib data */
f0832f13 877struct iwl_chain_noise_data {
04816448 878 u32 active_chains;
b481de9c
ZY
879 u32 chain_noise_a;
880 u32 chain_noise_b;
881 u32 chain_noise_c;
882 u32 chain_signal_a;
883 u32 chain_signal_b;
884 u32 chain_signal_c;
04816448 885 u16 beacon_count;
b481de9c
ZY
886 u8 disconn_array[NUM_RX_CHAINS];
887 u8 delta_gain_code[NUM_RX_CHAINS];
888 u8 radio_write;
04816448 889 u8 state;
b481de9c
ZY
890};
891
abceddb4
BC
892#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
893#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
b481de9c 894
20594eb0
WYG
895#define IWL_TRAFFIC_ENTRIES (256)
896#define IWL_TRAFFIC_ENTRY_SIZE (64)
5d08cd1d 897
5d08cd1d
CH
898enum {
899 MEASUREMENT_READY = (1 << 0),
900 MEASUREMENT_ACTIVE = (1 << 1),
901};
902
0848e297
WYG
903enum iwl_nvm_type {
904 NVM_DEVICE_TYPE_EEPROM = 0,
905 NVM_DEVICE_TYPE_OTP,
906};
907
415e4993
WYG
908/*
909 * Two types of OTP memory access modes
910 * IWL_OTP_ACCESS_ABSOLUTE - absolute address mode,
911 * based on physical memory addressing
912 * IWL_OTP_ACCESS_RELATIVE - relative address mode,
913 * based on logical memory addressing
914 */
915enum iwl_access_mode {
916 IWL_OTP_ACCESS_ABSOLUTE,
917 IWL_OTP_ACCESS_RELATIVE,
918};
65b7998a
WYG
919
920/**
921 * enum iwl_pa_type - Power Amplifier type
922 * @IWL_PA_SYSTEM: based on uCode configuration
65b7998a
WYG
923 * @IWL_PA_INTERNAL: use Internal only
924 */
925enum iwl_pa_type {
926 IWL_PA_SYSTEM = 0,
740e7f51 927 IWL_PA_INTERNAL = 1,
65b7998a
WYG
928};
929
a83b9141
WYG
930/* interrupt statistics */
931struct isr_statistics {
932 u32 hw;
933 u32 sw;
934 u32 sw_err;
935 u32 sch;
936 u32 alive;
937 u32 rfkill;
938 u32 ctkill;
939 u32 wakeup;
940 u32 rx;
941 u32 rx_handlers[REPLY_MAX];
942 u32 tx;
943 u32 unhandled;
944};
5d08cd1d 945
22fdf3c9
WYG
946#ifdef CONFIG_IWLWIFI_DEBUGFS
947/* management statistics */
948enum iwl_mgmt_stats {
949 MANAGEMENT_ASSOC_REQ = 0,
950 MANAGEMENT_ASSOC_RESP,
951 MANAGEMENT_REASSOC_REQ,
952 MANAGEMENT_REASSOC_RESP,
953 MANAGEMENT_PROBE_REQ,
954 MANAGEMENT_PROBE_RESP,
955 MANAGEMENT_BEACON,
956 MANAGEMENT_ATIM,
957 MANAGEMENT_DISASSOC,
958 MANAGEMENT_AUTH,
959 MANAGEMENT_DEAUTH,
960 MANAGEMENT_ACTION,
961 MANAGEMENT_MAX,
962};
963/* control statistics */
964enum iwl_ctrl_stats {
965 CONTROL_BACK_REQ = 0,
966 CONTROL_BACK,
967 CONTROL_PSPOLL,
968 CONTROL_RTS,
969 CONTROL_CTS,
970 CONTROL_ACK,
971 CONTROL_CFEND,
972 CONTROL_CFENDACK,
973 CONTROL_MAX,
974};
975
976struct traffic_stats {
977 u32 mgmt[MANAGEMENT_MAX];
978 u32 ctrl[CONTROL_MAX];
979 u32 data_cnt;
980 u64 data_bytes;
981};
982#else
983struct traffic_stats {
984 u64 data_bytes;
985};
986#endif
987
0924e519
WYG
988/*
989 * iwl_switch_rxon: "channel switch" structure
990 *
991 * @ switch_in_progress: channel switch in progress
992 * @ channel: new channel
993 */
994struct iwl_switch_rxon {
995 bool switch_in_progress;
996 __le16 channel;
997};
998
c79dd5b5 999struct iwl_priv {
5d08cd1d
CH
1000
1001 /* ieee device used by generic ieee processing code */
1002 struct ieee80211_hw *hw;
1003 struct ieee80211_channel *ieee_channels;
1004 struct ieee80211_rate *ieee_rates;
82b9a121 1005 struct iwl_cfg *cfg;
5d08cd1d
CH
1006
1007 /* temporary frame storage list */
1008 struct list_head free_frames;
1009 int frames_count;
1010
8318d78a 1011 enum ieee80211_band band;
2f301227 1012 int alloc_rxb_page;
5d08cd1d 1013
c79dd5b5 1014 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
a55360e4 1015 struct iwl_rx_mem_buffer *rxb);
5d08cd1d 1016
8318d78a 1017 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
5d08cd1d 1018
80bc5393 1019#if defined(CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT) || defined(CONFIG_IWL3945_SPECTRUM_MEASUREMENT)
5d08cd1d 1020 /* spectrum measurement report caching */
2aa6ab86 1021 struct iwl_spectrum_notification measure_report;
5d08cd1d
CH
1022 u8 measurement_status;
1023#endif
1024 /* ucode beacon time */
1025 u32 ucode_beacon_time;
1026
bb8c093b 1027 /* we allocate array of iwl4965_channel_info for NIC's valid channels.
5d08cd1d 1028 * Access via channel # using indirect index array */
bf85ea4f 1029 struct iwl_channel_info *channel_info; /* channel info array */
5d08cd1d
CH
1030 u8 channel_count; /* # of channels */
1031
85d41495
KA
1032 /* each calibration channel group in the EEPROM has a derived
1033 * clip setting for each rate. 3945 only.*/
1034 const struct iwl3945_clip_group clip39_groups[5];
1035
5d08cd1d
CH
1036 /* thermal calibration */
1037 s32 temperature; /* degrees Kelvin */
1038 s32 last_temperature;
1039
7c616cba 1040 /* init calibration results */
6e21f2c1 1041 struct iwl_calib_result calib_results[IWL_CALIB_MAX];
7c616cba 1042
5d08cd1d
CH
1043 /* Scan related variables */
1044 unsigned long last_scan_jiffies;
7878a5a4 1045 unsigned long next_scan_jiffies;
5d08cd1d
CH
1046 unsigned long scan_start;
1047 unsigned long scan_pass_start;
1048 unsigned long scan_start_tsf;
805cee5b 1049 void *scan;
5d08cd1d 1050 int scan_bands;
1ecf9fc1 1051 struct cfg80211_scan_request *scan_request;
76eff18b
TW
1052 u8 scan_tx_ant[IEEE80211_NUM_BANDS];
1053 u8 mgmt_tx_ant;
5d08cd1d
CH
1054
1055 /* spinlock */
1056 spinlock_t lock; /* protect general shared data */
1057 spinlock_t hcmd_lock; /* protect hcmd */
a8b50a0a 1058 spinlock_t reg_lock; /* protect hw register access */
5d08cd1d
CH
1059 struct mutex mutex;
1060
1061 /* basic pci-network driver stuff */
1062 struct pci_dev *pci_dev;
1063
1064 /* pci hardware address support */
1065 void __iomem *hw_base;
b661c819
TW
1066 u32 hw_rev;
1067 u32 hw_wa_rev;
1068 u8 rev_id;
5d08cd1d
CH
1069
1070 /* uCode images, save to reload in case of failure */
c02b3acd
CR
1071 u32 ucode_ver; /* version of ucode, copy of
1072 iwl_ucode.ver */
5d08cd1d
CH
1073 struct fw_desc ucode_code; /* runtime inst */
1074 struct fw_desc ucode_data; /* runtime data original */
1075 struct fw_desc ucode_data_backup; /* runtime data save/restore */
1076 struct fw_desc ucode_init; /* initialization inst */
1077 struct fw_desc ucode_init_data; /* initialization data */
1078 struct fw_desc ucode_boot; /* bootstrap inst */
dbb983b7
RR
1079 enum ucode_type ucode_type;
1080 u8 ucode_write_complete; /* the image write is complete */
5d08cd1d
CH
1081
1082
3195c1f3 1083 struct iwl_rxon_time_cmd rxon_timing;
5d08cd1d
CH
1084
1085 /* We declare this const so it can only be
1086 * changed via explicit cast within the
1087 * routines that actually update the physical
1088 * hardware */
c1adf9fb
GG
1089 const struct iwl_rxon_cmd active_rxon;
1090 struct iwl_rxon_cmd staging_rxon;
5d08cd1d 1091
0924e519
WYG
1092 struct iwl_switch_rxon switch_rxon;
1093
5d08cd1d
CH
1094 /* 1st responses from initialize and runtime uCode images.
1095 * 4965's initialize alive response contains some calibration data. */
885ba202
TW
1096 struct iwl_init_alive_resp card_alive_init;
1097 struct iwl_alive_resp card_alive;
5d08cd1d 1098
ab53d8af
MA
1099 unsigned long last_blink_time;
1100 u8 last_blink_rate;
1101 u8 allow_blinking;
1102 u64 led_tpt;
e932a609 1103
5d08cd1d
CH
1104 u16 active_rate;
1105 u16 active_rate_basic;
1106
5d08cd1d 1107 u8 assoc_station_added;
5d08cd1d 1108 u8 start_calib;
f0832f13
EG
1109 struct iwl_sensitivity_data sensitivity_data;
1110 struct iwl_chain_noise_data chain_noise_data;
5d08cd1d 1111 __le16 sensitivity_tbl[HD_TABLE_SIZE];
5d08cd1d 1112
fad95bf5 1113 struct iwl_ht_config current_ht_config;
5d08cd1d
CH
1114 u8 last_phy_res[100];
1115
5d08cd1d 1116 /* Rate scaling data */
5d08cd1d
CH
1117 u8 retry_rate;
1118
1119 wait_queue_head_t wait_command_queue;
1120
1121 int activity_timer_active;
1122
1123 /* Rx and Tx DMA processing queues */
a55360e4 1124 struct iwl_rx_queue rxq;
88804e2b 1125 struct iwl_tx_queue *txq;
5d08cd1d 1126 unsigned long txq_ctx_active_msk;
4ddbb7d0
TW
1127 struct iwl_dma_ptr kw; /* keep warm address */
1128 struct iwl_dma_ptr scd_bc_tbls;
1129
5d08cd1d
CH
1130 u32 scd_base_addr; /* scheduler sram base address */
1131
1132 unsigned long status;
5d08cd1d 1133
a96a27f9 1134 int last_rx_rssi; /* From Rx packet statistics */
5d08cd1d
CH
1135 int last_rx_noise; /* From beacon statistics */
1136
19758bef 1137 /* counts mgmt, ctl, and data packets */
22fdf3c9
WYG
1138 struct traffic_stats tx_stats;
1139 struct traffic_stats rx_stats;
19758bef 1140
a83b9141
WYG
1141 /* counts interrupts */
1142 struct isr_statistics isr_stats;
1143
5da4b55f 1144 struct iwl_power_mgr power_data;
3ad3b92a 1145 struct iwl_tt_mgmt thermal_throttle;
5d08cd1d 1146
8f91aecb 1147 struct iwl_notif_statistics statistics;
92a35bda
WYG
1148#ifdef CONFIG_IWLWIFI_DEBUG
1149 struct iwl_notif_statistics accum_statistics;
1150#endif
5d08cd1d
CH
1151
1152 /* context information */
5d08cd1d
CH
1153 u16 rates_mask;
1154
5d08cd1d
CH
1155 u8 bssid[ETH_ALEN];
1156 u16 rts_threshold;
1157 u8 mac_addr[ETH_ALEN];
1158
1159 /*station table variables */
1160 spinlock_t sta_lock;
1161 int num_stations;
6def9761 1162 struct iwl_station_entry stations[IWL_STATION_COUNT];
6974e363
EG
1163 struct iwl_wep_key wep_keys[WEP_KEYS_MAX];
1164 u8 default_wep_key;
1165 u8 key_mapping_key;
80fb47a1 1166 unsigned long ucode_key_table;
5d08cd1d 1167
e4e72fb4
JB
1168 /* queue refcounts */
1169#define IWL_MAX_HW_QUEUES 32
1170 unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)];
1171 /* for each AC */
1172 atomic_t queue_stop_count[4];
1173
5d08cd1d 1174 /* Indication if ieee80211_ops->open has been called */
69dc5d9d 1175 u8 is_open;
5d08cd1d
CH
1176
1177 u8 mac80211_registered;
5d08cd1d 1178
5d08cd1d
CH
1179 /* Rx'd packet timing information */
1180 u32 last_beacon_time;
1181 u64 last_tsf;
1182
5d08cd1d 1183 /* eeprom */
073d3f5f 1184 u8 *eeprom;
0848e297 1185 int nvm_device_type;
073d3f5f 1186 struct iwl_eeprom_calib_info *calib_info;
5d08cd1d 1187
05c914fe 1188 enum nl80211_iftype iw_mode;
5d08cd1d
CH
1189
1190 struct sk_buff *ibss_beacon;
1191
1192 /* Last Rx'd beacon timestamp */
3109ece1 1193 u64 timestamp;
5d08cd1d 1194 u16 beacon_int;
32bfd35d 1195 struct ieee80211_vif *vif;
5d08cd1d 1196
8cd812bc 1197 /*Added for 3945 */
3832ec9d
AK
1198 void *shared_virt;
1199 dma_addr_t shared_phys;
1200 /*End*/
5425e490 1201 struct iwl_hw_params hw_params;
4ddbb7d0 1202
ef850d7c 1203 /* INT ICT Table */
1303dcfd 1204 __le32 *ict_tbl;
ef850d7c
MA
1205 dma_addr_t ict_tbl_dma;
1206 dma_addr_t aligned_ict_tbl_dma;
1207 int ict_index;
1208 void *ict_tbl_vir;
1209 u32 inta;
1210 bool use_ict;
059ff826 1211
40cefda9 1212 u32 inta_mask;
5d08cd1d
CH
1213 /* Current association information needed to configure the
1214 * hardware */
1215 u16 assoc_id;
1216 u16 assoc_capability;
5d08cd1d 1217
1ff50bda 1218 struct iwl_qos_info qos_data;
5d08cd1d
CH
1219
1220 struct workqueue_struct *workqueue;
1221
1222 struct work_struct up;
1223 struct work_struct restart;
1224 struct work_struct calibrated_work;
1225 struct work_struct scan_completed;
1226 struct work_struct rx_replenish;
5d08cd1d
CH
1227 struct work_struct abort_scan;
1228 struct work_struct update_link_led;
1229 struct work_struct auth_work;
1230 struct work_struct report_work;
1231 struct work_struct request_scan;
1232 struct work_struct beacon_update;
a28027cd
WYG
1233 struct work_struct tt_work;
1234 struct work_struct ct_enter;
1235 struct work_struct ct_exit;
5d08cd1d
CH
1236
1237 struct tasklet_struct irq_tasklet;
1238
1239 struct delayed_work init_alive_start;
1240 struct delayed_work alive_start;
5d08cd1d 1241 struct delayed_work scan_check;
4a8a4322
AK
1242
1243 /*For 3945 only*/
1244 struct delayed_work thermal_periodic;
2663516d 1245 struct delayed_work rfkill_poll;
4a8a4322 1246
630fe9b6
TW
1247 /* TX Power */
1248 s8 tx_power_user_lmt;
dc1b0973 1249 s8 tx_power_device_lmt;
5d08cd1d 1250
5d08cd1d 1251
d08853a3 1252#ifdef CONFIG_IWLWIFI_DEBUG
5d08cd1d 1253 /* debugging info */
3d816c77
RC
1254 u32 debug_level; /* per device debugging will override global
1255 iwl_debug_level if set */
5d08cd1d
CH
1256 u32 framecnt_to_us;
1257 atomic_t restrict_refcnt;
1e4247d4 1258 bool disable_ht40;
712b6cf5
TW
1259#ifdef CONFIG_IWLWIFI_DEBUGFS
1260 /* debugfs */
20594eb0
WYG
1261 u16 tx_traffic_idx;
1262 u16 rx_traffic_idx;
1263 u8 *tx_traffic;
1264 u8 *rx_traffic;
712b6cf5
TW
1265 struct iwl_debugfs *dbgfs;
1266#endif /* CONFIG_IWLWIFI_DEBUGFS */
1267#endif /* CONFIG_IWLWIFI_DEBUG */
5d08cd1d
CH
1268
1269 struct work_struct txpower_work;
445c2dff
TW
1270 u32 disable_sens_cal;
1271 u32 disable_chain_noise_cal;
203566f3 1272 u32 disable_tx_power_cal;
16e727e8 1273 struct work_struct run_time_calib_work;
5d08cd1d 1274 struct timer_list statistics_periodic;
086ed117 1275 bool hw_ready;
4a8a4322
AK
1276 /*For 3945*/
1277#define IWL_DEFAULT_TX_POWER 0x0F
4a8a4322 1278
4a8a4322
AK
1279 struct iwl3945_notif_statistics statistics_39;
1280
4a8a4322 1281 u32 sta_supp_rates;
c79dd5b5 1282}; /*iwl_priv */
5d08cd1d 1283
36470749
RR
1284static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
1285{
1286 set_bit(txq_id, &priv->txq_ctx_active_msk);
1287}
1288
1289static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
1290{
1291 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1292}
1293
994d31f7 1294#ifdef CONFIG_IWLWIFI_DEBUG
a332f8d6 1295const char *iwl_get_tx_fail_reason(u32 status);
3d816c77
RC
1296/*
1297 * iwl_get_debug_level: Return active debug level for device
1298 *
1299 * Using sysfs it is possible to set per device debug level. This debug
1300 * level will be used if set, otherwise the global debug level which can be
1301 * set via module parameter is used.
1302 */
1303static inline u32 iwl_get_debug_level(struct iwl_priv *priv)
1304{
1305 if (priv->debug_level)
1306 return priv->debug_level;
1307 else
1308 return iwl_debug_level;
1309}
a332f8d6
TW
1310#else
1311static inline const char *iwl_get_tx_fail_reason(u32 status) { return ""; }
3d816c77
RC
1312
1313static inline u32 iwl_get_debug_level(struct iwl_priv *priv)
1314{
1315 return iwl_debug_level;
1316}
a332f8d6
TW
1317#endif
1318
1319
a332f8d6
TW
1320static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv,
1321 int txq_id, int idx)
1322{
1323 if (priv->txq[txq_id].txb[idx].skb[0])
1324 return (struct ieee80211_hdr *)priv->txq[txq_id].
1325 txb[idx].skb[0]->data;
1326 return NULL;
1327}
a332f8d6
TW
1328
1329
3109ece1 1330static inline int iwl_is_associated(struct iwl_priv *priv)
5d08cd1d
CH
1331{
1332 return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1333}
1334
bf85ea4f 1335static inline int is_channel_valid(const struct iwl_channel_info *ch_info)
5d08cd1d
CH
1336{
1337 if (ch_info == NULL)
1338 return 0;
1339 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1340}
1341
bf85ea4f 1342static inline int is_channel_radar(const struct iwl_channel_info *ch_info)
5d08cd1d
CH
1343{
1344 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1345}
1346
bf85ea4f 1347static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info)
5d08cd1d 1348{
8318d78a 1349 return ch_info->band == IEEE80211_BAND_5GHZ;
5d08cd1d
CH
1350}
1351
bf85ea4f 1352static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info)
5d08cd1d 1353{
8318d78a 1354 return ch_info->band == IEEE80211_BAND_2GHZ;
5d08cd1d
CH
1355}
1356
bf85ea4f 1357static inline int is_channel_passive(const struct iwl_channel_info *ch)
5d08cd1d
CH
1358{
1359 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1360}
1361
bf85ea4f 1362static inline int is_channel_ibss(const struct iwl_channel_info *ch)
5d08cd1d
CH
1363{
1364 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
1365}
1366
be1f3ab6 1367#endif /* __iwl_dev_h__ */