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iwl3945: move iwl_power_initialize()
[net-next-2.6.git] / drivers / net / wireless / iwlwifi / iwl-dev.h
CommitLineData
b481de9c
ZY
1/******************************************************************************
2 *
01f8162a 3 * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
b481de9c
ZY
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms of version 2 of the GNU General Public License as
7 * published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc.,
16 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
17 *
18 * The full GNU General Public License is included in this distribution in the
19 * file called LICENSE.
20 *
21 * Contact Information:
759ef89f 22 * Intel Linux Wireless <ilw@linux.intel.com>
b481de9c
ZY
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 *****************************************************************************/
fcd427bb 26/*
3e0d4cb1 27 * Please use this file (iwl-dev.h) for driver implementation definitions.
5a36ba0e 28 * Please use iwl-commands.h for uCode API definitions.
fcd427bb
BC
29 * Please use iwl-4965-hw.h for hardware-related definitions.
30 */
31
be1f3ab6
EG
32#ifndef __iwl_dev_h__
33#define __iwl_dev_h__
b481de9c 34
5d08cd1d
CH
35#include <linux/pci.h> /* for struct pci_device_id */
36#include <linux/kernel.h>
37#include <net/ieee80211_radiotap.h>
38
6bc913bd 39#include "iwl-eeprom.h"
6f83eaa1 40#include "iwl-csr.h"
5d08cd1d 41#include "iwl-prph.h"
dbb6654c 42#include "iwl-fh.h"
0a6857e7 43#include "iwl-debug.h"
dbb6654c
WT
44#include "iwl-4965-hw.h"
45#include "iwl-3945-hw.h"
ab53d8af 46#include "iwl-led.h"
5da4b55f 47#include "iwl-power.h"
e227ceac 48#include "iwl-agn-rs.h"
5d08cd1d 49
fed9017e
RR
50/* configuration for the iwl4965 */
51extern struct iwl_cfg iwl4965_agn_cfg;
5a6a256e
TW
52extern struct iwl_cfg iwl5300_agn_cfg;
53extern struct iwl_cfg iwl5100_agn_cfg;
54extern struct iwl_cfg iwl5350_agn_cfg;
47408639
EK
55extern struct iwl_cfg iwl5100_bg_cfg;
56extern struct iwl_cfg iwl5100_abg_cfg;
7100e924 57extern struct iwl_cfg iwl5150_agn_cfg;
65b7998a 58extern struct iwl_cfg iwl6000h_2agn_cfg;
5953a62e
WYG
59extern struct iwl_cfg iwl6000h_2abg_cfg;
60extern struct iwl_cfg iwl6000h_2bg_cfg;
65b7998a 61extern struct iwl_cfg iwl6000i_2agn_cfg;
5953a62e
WYG
62extern struct iwl_cfg iwl6000i_2abg_cfg;
63extern struct iwl_cfg iwl6000i_2bg_cfg;
e1228374
JS
64extern struct iwl_cfg iwl6000_3agn_cfg;
65extern struct iwl_cfg iwl6050_2agn_cfg;
5953a62e 66extern struct iwl_cfg iwl6050_2abg_cfg;
e1228374 67extern struct iwl_cfg iwl6050_3agn_cfg;
77dcb6a9 68extern struct iwl_cfg iwl1000_bgn_cfg;
4bd0914f 69extern struct iwl_cfg iwl1000_bg_cfg;
fed9017e 70
672639de
WYG
71struct iwl_tx_queue;
72
cec2d3f3
JS
73/* shared structures from iwl-5000.c */
74extern struct iwl_mod_params iwl50_mod_params;
cc0f555d 75extern struct iwl_ucode_ops iwl5000_ucode;
e8c00dcb
JS
76extern struct iwl_lib_ops iwl5000_lib;
77extern struct iwl_hcmd_ops iwl5000_hcmd;
78extern struct iwl_hcmd_utils_ops iwl5000_hcmd_utils;
79
80/* shared functions from iwl-5000.c */
81extern u16 iwl5000_get_hcmd_size(u8 cmd_id, u16 len);
82extern u16 iwl5000_build_addsta_hcmd(const struct iwl_addsta_cmd *cmd,
83 u8 *data);
84extern void iwl5000_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
85 __le32 *tx_flags);
86extern int iwl5000_calc_rssi(struct iwl_priv *priv,
87 struct iwl_rx_phy_res *rx_resp);
672639de 88extern int iwl5000_apm_init(struct iwl_priv *priv);
672639de
WYG
89extern void iwl5000_nic_config(struct iwl_priv *priv);
90extern u16 iwl5000_eeprom_calib_version(struct iwl_priv *priv);
91extern const u8 *iwl5000_eeprom_query_addr(const struct iwl_priv *priv,
92 size_t offset);
93extern void iwl5000_txq_update_byte_cnt_tbl(struct iwl_priv *priv,
94 struct iwl_tx_queue *txq,
95 u16 byte_cnt);
96extern void iwl5000_txq_inval_byte_cnt_tbl(struct iwl_priv *priv,
97 struct iwl_tx_queue *txq);
98extern int iwl5000_load_ucode(struct iwl_priv *priv);
99extern void iwl5000_init_alive_start(struct iwl_priv *priv);
100extern int iwl5000_alive_notify(struct iwl_priv *priv);
101extern int iwl5000_hw_set_hw_params(struct iwl_priv *priv);
102extern int iwl5000_txq_agg_enable(struct iwl_priv *priv, int txq_id,
103 int tx_fifo, int sta_id, int tid, u16 ssn_idx);
104extern int iwl5000_txq_agg_disable(struct iwl_priv *priv, u16 txq_id,
105 u16 ssn_idx, u8 tx_fifo);
106extern void iwl5000_txq_set_sched(struct iwl_priv *priv, u32 mask);
107extern void iwl5000_setup_deferred_work(struct iwl_priv *priv);
108extern void iwl5000_rx_handler_setup(struct iwl_priv *priv);
109extern int iwl5000_hw_valid_rtc_data_addr(u32 addr);
110extern int iwl5000_send_tx_power(struct iwl_priv *priv);
111extern void iwl5000_temperature(struct iwl_priv *priv);
cec2d3f3 112
099b40b7 113/* CT-KILL constants */
672639de
WYG
114#define CT_KILL_THRESHOLD_LEGACY 110 /* in Celsius */
115#define CT_KILL_THRESHOLD 114 /* in Celsius */
116#define CT_KILL_EXIT_THRESHOLD 95 /* in Celsius */
4bf775cd 117
5d08cd1d
CH
118/* Default noise level to report when noise measurement is not available.
119 * This may be because we're:
120 * 1) Not associated (4965, no beacon statistics being sent to driver)
121 * 2) Scanning (noise measurement does not apply to associated channel)
122 * 3) Receiving CCK (3945 delivers noise info only for OFDM frames)
123 * Use default noise value of -127 ... this is below the range of measurable
124 * Rx dBm for either 3945 or 4965, so it can indicate "unmeasurable" to user.
125 * Also, -127 works better than 0 when averaging frames with/without
126 * noise info (e.g. averaging might be done in app); measured dBm values are
127 * always negative ... using a negative value as the default keeps all
128 * averages within an s8's (used in some apps) range of negative values. */
129#define IWL_NOISE_MEAS_NOT_AVAILABLE (-127)
130
5d08cd1d
CH
131/*
132 * RTS threshold here is total size [2347] minus 4 FCS bytes
133 * Per spec:
134 * a value of 0 means RTS on all data/management packets
135 * a value > max MSDU size means no RTS
136 * else RTS for data/management frames where MPDU is larger
137 * than RTS value.
138 */
139#define DEFAULT_RTS_THRESHOLD 2347U
140#define MIN_RTS_THRESHOLD 0U
141#define MAX_RTS_THRESHOLD 2347U
142#define MAX_MSDU_SIZE 2304U
143#define MAX_MPDU_SIZE 2346U
144#define DEFAULT_BEACON_INTERVAL 100U
145#define DEFAULT_SHORT_RETRY_LIMIT 7U
146#define DEFAULT_LONG_RETRY_LIMIT 4U
147
a55360e4 148struct iwl_rx_mem_buffer {
4018517a
JB
149 dma_addr_t real_dma_addr;
150 dma_addr_t aligned_dma_addr;
5d08cd1d
CH
151 struct sk_buff *skb;
152 struct list_head list;
153};
154
c2acea8e
JB
155/* defined below */
156struct iwl_device_cmd;
157
158struct iwl_cmd_meta {
159 /* only for SYNC commands, iff the reply skb is wanted */
160 struct iwl_host_cmd *source;
161 /*
162 * only for ASYNC commands
163 * (which is somewhat stupid -- look at iwl-sta.c for instance
164 * which duplicates a bunch of code because the callback isn't
165 * invoked for SYNC commands, if it were and its result passed
166 * through it would be simpler...)
167 */
5696aea6
JB
168 void (*callback)(struct iwl_priv *priv,
169 struct iwl_device_cmd *cmd,
170 struct sk_buff *skb);
c2acea8e
JB
171
172 /* The CMD_SIZE_HUGE flag bit indicates that the command
173 * structure is stored at the end of the shared queue memory. */
174 u32 flags;
175
176 DECLARE_PCI_UNMAP_ADDR(mapping)
177 DECLARE_PCI_UNMAP_LEN(len)
178};
179
5d08cd1d
CH
180/*
181 * Generic queue structure
182 *
183 * Contains common data for Rx and Tx queues
184 */
443cfd45 185struct iwl_queue {
5d08cd1d
CH
186 int n_bd; /* number of BDs in this queue */
187 int write_ptr; /* 1-st empty entry (index) host_w*/
188 int read_ptr; /* last used entry (index) host_r*/
189 dma_addr_t dma_addr; /* physical addr for BD's */
190 int n_window; /* safe queue window */
191 u32 id;
192 int low_mark; /* low watermark, resume queue if free
193 * space more than this */
194 int high_mark; /* high watermark, stop queue if free
195 * space less than this */
196} __attribute__ ((packed));
197
bc47279f 198/* One for each TFD */
8567c63e 199struct iwl_tx_info {
499b1883 200 struct sk_buff *skb[IWL_NUM_OF_TBS - 1];
5d08cd1d
CH
201};
202
203/**
16466903 204 * struct iwl_tx_queue - Tx Queue for DMA
bc47279f
BC
205 * @q: generic Rx/Tx queue descriptor
206 * @bd: base of circular buffer of TFDs
c2acea8e
JB
207 * @cmd: array of command/TX buffer pointers
208 * @meta: array of meta data for each command/tx buffer
bc47279f
BC
209 * @dma_addr_cmd: physical address of cmd/tx buffer array
210 * @txb: array of per-TFD driver data
211 * @need_update: indicates need to update read/write index
212 * @sched_retry: indicates queue is high-throughput aggregation (HT AGG) enabled
5d08cd1d 213 *
bc47279f
BC
214 * A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
215 * descriptors) and required locking structures.
5d08cd1d 216 */
188cf6c7
SO
217#define TFD_TX_CMD_SLOTS 256
218#define TFD_CMD_SLOTS 32
219
16466903 220struct iwl_tx_queue {
443cfd45 221 struct iwl_queue q;
59606ffa 222 void *tfds;
c2acea8e
JB
223 struct iwl_device_cmd **cmd;
224 struct iwl_cmd_meta *meta;
8567c63e 225 struct iwl_tx_info *txb;
3fd07a1e
TW
226 u8 need_update;
227 u8 sched_retry;
228 u8 active;
229 u8 swq_id;
5d08cd1d
CH
230};
231
232#define IWL_NUM_SCAN_RATES (2)
233
bb8c093b 234struct iwl4965_channel_tgd_info {
5d08cd1d
CH
235 u8 type;
236 s8 max_power;
237};
238
bb8c093b 239struct iwl4965_channel_tgh_info {
5d08cd1d
CH
240 s64 last_radar_time;
241};
242
d20b3c65
SO
243#define IWL4965_MAX_RATE (33)
244
85d41495
KA
245struct iwl3945_clip_group {
246 /* maximum power level to prevent clipping for each rate, derived by
247 * us from this band's saturation power in EEPROM */
248 const s8 clip_powers[IWL_MAX_RATES];
249};
250
d20b3c65
SO
251/* current Tx power values to use, one for each rate for each channel.
252 * requested power is limited by:
253 * -- regulatory EEPROM limits for this channel
254 * -- hardware capabilities (clip-powers)
255 * -- spectrum management
256 * -- user preference (e.g. iwconfig)
257 * when requested power is set, base power index must also be set. */
258struct iwl3945_channel_power_info {
259 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */
260 s8 power_table_index; /* actual (compenst'd) index into gain table */
261 s8 base_power_index; /* gain index for power at factory temp. */
262 s8 requested_power; /* power (dBm) requested for this chnl/rate */
263};
264
265/* current scan Tx power values to use, one for each scan rate for each
266 * channel. */
267struct iwl3945_scan_power_info {
268 struct iwl3945_tx_power tpc; /* actual radio and DSP gain settings */
269 s8 power_table_index; /* actual (compenst'd) index into gain table */
270 s8 requested_power; /* scan pwr (dBm) requested for chnl/rate */
271};
272
5d08cd1d
CH
273/*
274 * One for each channel, holds all channel setup data
275 * Some of the fields (e.g. eeprom and flags/max_power_avg) are redundant
276 * with one another!
277 */
bf85ea4f 278struct iwl_channel_info {
bb8c093b
CH
279 struct iwl4965_channel_tgd_info tgd;
280 struct iwl4965_channel_tgh_info tgh;
073d3f5f 281 struct iwl_eeprom_channel eeprom; /* EEPROM regulatory limit */
7aafef1c
WYG
282 struct iwl_eeprom_channel ht40_eeprom; /* EEPROM regulatory limit for
283 * HT40 channel */
5d08cd1d
CH
284
285 u8 channel; /* channel number */
286 u8 flags; /* flags copied from EEPROM */
287 s8 max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
fcd427bb 288 s8 curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) limit */
5d08cd1d
CH
289 s8 min_power; /* always 0 */
290 s8 scan_power; /* (dBm) regul. eeprom, direct scans, any rate */
291
292 u8 group_index; /* 0-4, maps channel to group1/2/3/4/5 */
293 u8 band_index; /* 0-4, maps channel to band1/2/3/4/5 */
8318d78a 294 enum ieee80211_band band;
5d08cd1d 295
7aafef1c
WYG
296 /* HT40 channel info */
297 s8 ht40_max_power_avg; /* (dBm) regul. eeprom, normal Tx, any rate */
298 s8 ht40_curr_txpow; /* (dBm) regulatory/spectrum/user (not h/w) */
299 s8 ht40_min_power; /* always 0 */
300 s8 ht40_scan_power; /* (dBm) eeprom, direct scans, any rate */
301 u8 ht40_flags; /* flags copied from EEPROM */
302 u8 ht40_extension_channel; /* HT_IE_EXT_CHANNEL_* */
d20b3c65
SO
303
304 /* Radio/DSP gain settings for each "normal" data Tx rate.
305 * These include, in addition to RF and DSP gain, a few fields for
306 * remembering/modifying gain settings (indexes). */
307 struct iwl3945_channel_power_info power_info[IWL4965_MAX_RATE];
308
309 /* Radio/DSP gain settings for each scan rate, for directed scans. */
310 struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES];
5d08cd1d
CH
311};
312
5d08cd1d
CH
313#define IWL_TX_FIFO_AC0 0
314#define IWL_TX_FIFO_AC1 1
315#define IWL_TX_FIFO_AC2 2
316#define IWL_TX_FIFO_AC3 3
317#define IWL_TX_FIFO_HCCA_1 5
318#define IWL_TX_FIFO_HCCA_2 6
319#define IWL_TX_FIFO_NONE 7
320
01a7e084
RC
321/* Minimum number of queues. MAX_NUM is defined in hw specific files.
322 * Set the minimum to accommodate the 4 standard TX queues, 1 command
323 * queue, 2 (unused) HCCA queues, and 4 HT queues (one for each AC) */
324#define IWL_MIN_NUM_QUEUES 10
5d08cd1d 325
bd35f150
WYG
326/*
327 * uCode queue management definitions ...
328 * Queue #4 is the command queue for 3945/4965/5x00/1000/6x00.
329 */
330#define IWL_CMD_QUEUE_NUM 4
331
5d08cd1d
CH
332/* Power management (not Tx power) structures */
333
6f4083aa
TW
334enum iwl_pwr_src {
335 IWL_PWR_SRC_VMAIN,
336 IWL_PWR_SRC_VAUX,
337};
338
5d08cd1d
CH
339#define IEEE80211_DATA_LEN 2304
340#define IEEE80211_4ADDR_LEN 30
341#define IEEE80211_HLEN (IEEE80211_4ADDR_LEN)
342#define IEEE80211_FRAME_LEN (IEEE80211_DATA_LEN + IEEE80211_HLEN)
343
fcab423d 344struct iwl_frame {
5d08cd1d
CH
345 union {
346 struct ieee80211_hdr frame;
4bf64efd 347 struct iwl_tx_beacon_cmd beacon;
5d08cd1d
CH
348 u8 raw[IEEE80211_FRAME_LEN];
349 u8 cmd[360];
350 } u;
351 struct list_head list;
352};
353
5d08cd1d
CH
354#define SEQ_TO_SN(seq) (((seq) & IEEE80211_SCTL_SEQ) >> 4)
355#define SN_TO_SEQ(ssn) (((ssn) << 4) & IEEE80211_SCTL_SEQ)
356#define MAX_SN ((IEEE80211_SCTL_SEQ) >> 4)
357
358enum {
c587de0b
TW
359 CMD_SYNC = 0,
360 CMD_SIZE_NORMAL = 0,
361 CMD_NO_SKB = 0,
5d08cd1d 362 CMD_SIZE_HUGE = (1 << 0),
5d08cd1d 363 CMD_ASYNC = (1 << 1),
5d08cd1d
CH
364 CMD_WANT_SKB = (1 << 2),
365};
366
d2f18bfd 367#define IWL_CMD_MAX_PAYLOAD 320
bd68fb6f 368
bc47279f 369/**
c2acea8e 370 * struct iwl_device_cmd
bc47279f
BC
371 *
372 * For allocation of the command and tx queues, this establishes the overall
373 * size of the largest command we send to uCode, except for a scan command
374 * (which is relatively huge; space is allocated separately).
375 */
c2acea8e 376struct iwl_device_cmd {
857485c0 377 struct iwl_cmd_header hdr; /* uCode API */
5d08cd1d 378 union {
5d08cd1d
CH
379 u32 flags;
380 u8 val8;
381 u16 val16;
382 u32 val32;
83d527d9 383 struct iwl_tx_cmd tx;
bd68fb6f 384 u8 payload[IWL_CMD_MAX_PAYLOAD];
5d08cd1d
CH
385 } __attribute__ ((packed)) cmd;
386} __attribute__ ((packed));
387
c2acea8e
JB
388#define TFD_MAX_PAYLOAD_SIZE (sizeof(struct iwl_device_cmd))
389
3257e5d4 390
857485c0 391struct iwl_host_cmd {
5d08cd1d 392 const void *data;
c2acea8e 393 struct sk_buff *reply_skb;
5696aea6
JB
394 void (*callback)(struct iwl_priv *priv,
395 struct iwl_device_cmd *cmd,
396 struct sk_buff *skb);
c2acea8e
JB
397 u32 flags;
398 u16 len;
399 u8 id;
5d08cd1d
CH
400};
401
5d08cd1d
CH
402/*
403 * RX related structures and functions
404 */
405#define RX_FREE_BUFFERS 64
406#define RX_LOW_WATERMARK 8
407
408#define SUP_RATE_11A_MAX_NUM_CHANNELS 8
409#define SUP_RATE_11B_MAX_NUM_CHANNELS 4
410#define SUP_RATE_11G_MAX_NUM_CHANNELS 12
411
412/**
a55360e4 413 * struct iwl_rx_queue - Rx queue
df833b1d
RC
414 * @bd: driver's pointer to buffer of receive buffer descriptors (rbd)
415 * @dma_addr: bus address of buffer of receive buffer descriptors (rbd)
5d08cd1d
CH
416 * @read: Shared index to newest available Rx buffer
417 * @write: Shared index to oldest written Rx packet
418 * @free_count: Number of pre-allocated buffers in rx_free
419 * @rx_free: list of free SKBs for use
420 * @rx_used: List of Rx buffers with no SKB
421 * @need_update: flag to indicate we need to update read/write index
df833b1d
RC
422 * @rb_stts: driver's pointer to receive buffer status
423 * @rb_stts_dma: bus address of receive buffer status
5d08cd1d 424 *
a55360e4 425 * NOTE: rx_free and rx_used are used as a FIFO for iwl_rx_mem_buffers
5d08cd1d 426 */
a55360e4 427struct iwl_rx_queue {
5d08cd1d
CH
428 __le32 *bd;
429 dma_addr_t dma_addr;
a55360e4
TW
430 struct iwl_rx_mem_buffer pool[RX_QUEUE_SIZE + RX_FREE_BUFFERS];
431 struct iwl_rx_mem_buffer *queue[RX_QUEUE_SIZE];
5d08cd1d
CH
432 u32 read;
433 u32 write;
434 u32 free_count;
4752c93c 435 u32 write_actual;
5d08cd1d
CH
436 struct list_head rx_free;
437 struct list_head rx_used;
438 int need_update;
8d86422a
WT
439 struct iwl_rb_status *rb_stts;
440 dma_addr_t rb_stts_dma;
5d08cd1d
CH
441 spinlock_t lock;
442};
443
444#define IWL_SUPPORTED_RATES_IE_LEN 8
445
5d08cd1d
CH
446#define MAX_TID_COUNT 9
447
448#define IWL_INVALID_RATE 0xFF
449#define IWL_INVALID_VALUE -1
450
bc47279f 451/**
6def9761 452 * struct iwl_ht_agg -- aggregation status while waiting for block-ack
bc47279f
BC
453 * @txq_id: Tx queue used for Tx attempt
454 * @frame_count: # frames attempted by Tx command
455 * @wait_for_ba: Expect block-ack before next Tx reply
456 * @start_idx: Index of 1st Transmit Frame Descriptor (TFD) in Tx window
457 * @bitmap0: Low order bitmap, one bit for each frame pending ACK in Tx window
458 * @bitmap1: High order, one bit for each frame pending ACK in Tx window
459 * @rate_n_flags: Rate at which Tx was attempted
460 *
461 * If REPLY_TX indicates that aggregation was attempted, driver must wait
462 * for block ack (REPLY_COMPRESSED_BA). This struct stores tx reply info
463 * until block ack arrives.
464 */
6def9761 465struct iwl_ht_agg {
5d08cd1d
CH
466 u16 txq_id;
467 u16 frame_count;
468 u16 wait_for_ba;
469 u16 start_idx;
fe01b477 470 u64 bitmap;
5d08cd1d 471 u32 rate_n_flags;
fe01b477
RR
472#define IWL_AGG_OFF 0
473#define IWL_AGG_ON 1
474#define IWL_EMPTYING_HW_QUEUE_ADDBA 2
475#define IWL_EMPTYING_HW_QUEUE_DELBA 3
476 u8 state;
5d08cd1d 477};
fe01b477 478
5d08cd1d 479
6def9761 480struct iwl_tid_data {
5d08cd1d 481 u16 seq_number;
fe01b477 482 u16 tfds_in_queue;
6def9761 483 struct iwl_ht_agg agg;
5d08cd1d
CH
484};
485
6def9761 486struct iwl_hw_key {
5d08cd1d
CH
487 enum ieee80211_key_alg alg;
488 int keylen;
0211ddda 489 u8 keyidx;
5d08cd1d
CH
490 u8 key[32];
491};
492
a78fe754 493union iwl_ht_rate_supp {
5d08cd1d
CH
494 u16 rates;
495 struct {
496 u8 siso_rate;
497 u8 mimo_rate;
498 };
499};
500
5d08cd1d 501#define CFG_HT_RX_AMPDU_FACTOR_DEF (0x3)
bcc693a1
WYG
502
503/*
504 * Maximal MPDU density for TX aggregation
505 * 4 - 2us density
506 * 5 - 4us density
507 * 6 - 8us density
508 * 7 - 16us density
509 */
510#define CFG_HT_MPDU_DENSITY_4USEC (0x5)
511#define CFG_HT_MPDU_DENSITY_DEF CFG_HT_MPDU_DENSITY_4USEC
5d08cd1d 512
fad95bf5 513struct iwl_ht_config {
9e0cc6de 514 /* self configuration data */
c812ee24
JB
515 bool is_ht;
516 bool is_40mhz;
02bb1bea 517 bool single_chain_sufficient;
9e0cc6de 518 /* BSS related data */
5d08cd1d 519 u8 extension_chan_offset;
9e0cc6de
RR
520 u8 ht_protection;
521 u8 non_GF_STA_present;
5d08cd1d 522};
5d08cd1d 523
1ff50bda 524union iwl_qos_capabity {
5d08cd1d
CH
525 struct {
526 u8 edca_count:4; /* bit 0-3 */
527 u8 q_ack:1; /* bit 4 */
528 u8 queue_request:1; /* bit 5 */
529 u8 txop_request:1; /* bit 6 */
530 u8 reserved:1; /* bit 7 */
531 } q_AP;
532 struct {
533 u8 acvo_APSD:1; /* bit 0 */
534 u8 acvi_APSD:1; /* bit 1 */
535 u8 ac_bk_APSD:1; /* bit 2 */
536 u8 ac_be_APSD:1; /* bit 3 */
537 u8 q_ack:1; /* bit 4 */
538 u8 max_len:2; /* bit 5-6 */
539 u8 more_data_ack:1; /* bit 7 */
540 } q_STA;
541 u8 val;
542};
543
544/* QoS structures */
1ff50bda 545struct iwl_qos_info {
5d08cd1d 546 int qos_active;
1ff50bda
EG
547 union iwl_qos_capabity qos_cap;
548 struct iwl_qosparam_cmd def_qos_parm;
5d08cd1d 549};
5d08cd1d
CH
550
551#define STA_PS_STATUS_WAKE 0
552#define STA_PS_STATUS_SLEEP 1
553
85d41495
KA
554
555struct iwl3945_station_entry {
556 struct iwl3945_addsta_cmd sta;
c15ff610 557 struct iwl_tid_data tid[MAX_TID_COUNT];
85d41495
KA
558 u8 used;
559 u8 ps_status;
bed420d9 560 struct iwl_hw_key keyinfo;
85d41495
KA
561};
562
6def9761 563struct iwl_station_entry {
133636de 564 struct iwl_addsta_cmd sta;
6def9761 565 struct iwl_tid_data tid[MAX_TID_COUNT];
5d08cd1d
CH
566 u8 used;
567 u8 ps_status;
6def9761 568 struct iwl_hw_key keyinfo;
5d08cd1d
CH
569};
570
571/* one for each uCode image (inst/data, boot/init/runtime) */
572struct fw_desc {
573 void *v_addr; /* access by driver */
574 dma_addr_t p_addr; /* access by card's busmaster DMA */
575 u32 len; /* bytes */
576};
577
578/* uCode file layout */
cc0f555d
JS
579struct iwl_ucode_header {
580 __le32 ver; /* major/minor/API/serial */
581 union {
582 struct {
583 __le32 inst_size; /* bytes of runtime code */
584 __le32 data_size; /* bytes of runtime data */
585 __le32 init_size; /* bytes of init code */
586 __le32 init_data_size; /* bytes of init data */
587 __le32 boot_size; /* bytes of bootstrap code */
588 u8 data[0]; /* in same order as sizes */
589 } v1;
590 struct {
591 __le32 build; /* build number */
592 __le32 inst_size; /* bytes of runtime code */
593 __le32 data_size; /* bytes of runtime data */
594 __le32 init_size; /* bytes of init code */
595 __le32 init_data_size; /* bytes of init data */
596 __le32 boot_size; /* bytes of bootstrap code */
597 u8 data[0]; /* in same order as sizes */
598 } v2;
599 } u;
5d08cd1d 600};
cc0f555d 601#define UCODE_HEADER_SIZE(ver) ((ver) == 1 ? 24 : 28)
5d08cd1d 602
bb8c093b 603struct iwl4965_ibss_seq {
5d08cd1d
CH
604 u8 mac[ETH_ALEN];
605 u16 seq_num;
606 u16 frag_num;
607 unsigned long packet_time;
608 struct list_head list;
609};
610
f0832f13
EG
611struct iwl_sensitivity_ranges {
612 u16 min_nrg_cck;
613 u16 max_nrg_cck;
614
615 u16 nrg_th_cck;
616 u16 nrg_th_ofdm;
617
618 u16 auto_corr_min_ofdm;
619 u16 auto_corr_min_ofdm_mrc;
620 u16 auto_corr_min_ofdm_x1;
621 u16 auto_corr_min_ofdm_mrc_x1;
622
623 u16 auto_corr_max_ofdm;
624 u16 auto_corr_max_ofdm_mrc;
625 u16 auto_corr_max_ofdm_x1;
626 u16 auto_corr_max_ofdm_mrc_x1;
627
628 u16 auto_corr_max_cck;
629 u16 auto_corr_max_cck_mrc;
630 u16 auto_corr_min_cck;
631 u16 auto_corr_min_cck_mrc;
55036d66
WYG
632
633 u16 barker_corr_th_min;
634 u16 barker_corr_th_min_mrc;
635 u16 nrg_th_cca;
f0832f13
EG
636};
637
099b40b7 638
b5047f78
TW
639#define KELVIN_TO_CELSIUS(x) ((x)-273)
640#define CELSIUS_TO_KELVIN(x) ((x)+273)
641
642
bc47279f 643/**
5425e490 644 * struct iwl_hw_params
bc47279f 645 * @max_txq_num: Max # Tx queues supported
f3f911d1 646 * @dma_chnl_num: Number of Tx DMA/FIFO channels
4ddbb7d0 647 * @scd_bc_tbls_size: size of scheduler byte count tables
a8e74e27 648 * @tfd_size: TFD size
099b40b7
RR
649 * @tx/rx_chains_num: Number of TX/RX chains
650 * @valid_tx/rx_ant: usable antennas
bc47279f 651 * @max_rxq_size: Max # Rx frames in Rx queue (must be power-of-2)
bc47279f 652 * @max_rxq_log: Log-base-2 of max_rxq_size
099b40b7 653 * @rx_buf_size: Rx buffer size
141c43a3 654 * @rx_wrt_ptr_reg: FH{39}_RSCSR_CHNL0_WPTR
bc47279f
BC
655 * @max_stations:
656 * @bcast_sta_id:
7aafef1c 657 * @ht40_channel: is 40MHz width possible in band 2.4
099b40b7
RR
658 * BIT(IEEE80211_BAND_5GHZ) BIT(IEEE80211_BAND_5GHZ)
659 * @sw_crypto: 0 for hw, 1 for sw
660 * @max_xxx_size: for ucode uses
661 * @ct_kill_threshold: temperature threshold
a96a27f9 662 * @calib_init_cfg: setup initial calibrations for the hw
f0832f13 663 * @struct iwl_sensitivity_ranges: range of sensitivity values
bc47279f 664 */
5425e490 665struct iwl_hw_params {
f3f911d1
ZY
666 u8 max_txq_num;
667 u8 dma_chnl_num;
4ddbb7d0 668 u16 scd_bc_tbls_size;
a8e74e27 669 u32 tfd_size;
ec35cf2a
TW
670 u8 tx_chains_num;
671 u8 rx_chains_num;
672 u8 valid_tx_ant;
673 u8 valid_rx_ant;
5d08cd1d 674 u16 max_rxq_size;
ec35cf2a 675 u16 max_rxq_log;
9ee1ba47 676 u32 rx_buf_size;
141c43a3 677 u32 rx_wrt_ptr_reg;
9ee1ba47 678 u32 max_pkt_size;
5d08cd1d
CH
679 u8 max_stations;
680 u8 bcast_sta_id;
7aafef1c 681 u8 ht40_channel;
2c2f3b33 682 u8 max_beacon_itrvl; /* in 1024 ms */
099b40b7
RR
683 u32 max_inst_size;
684 u32 max_data_size;
685 u32 max_bsm_size;
686 u32 ct_kill_threshold; /* value in hw-dependent units */
672639de
WYG
687 u32 ct_kill_exit_threshold; /* value in hw-dependent units */
688 /* for 1000, 6000 series and up */
be5d56ed 689 u32 calib_init_cfg;
f0832f13 690 const struct iwl_sensitivity_ranges *sens;
5d08cd1d
CH
691};
692
5d08cd1d 693
5d08cd1d
CH
694/******************************************************************************
695 *
a33c2f47
EG
696 * Functions implemented in core module which are forward declared here
697 * for use by iwl-[4-5].c
5d08cd1d 698 *
a33c2f47
EG
699 * NOTE: The implementation of these functions are not hardware specific
700 * which is why they are in the core module files.
5d08cd1d
CH
701 *
702 * Naming convention --
a33c2f47 703 * iwl_ <-- Is part of iwlwifi
5d08cd1d 704 * iwlXXXX_ <-- Hardware specific (implemented in iwl-XXXX.c for XXXX)
bb8c093b
CH
705 * iwl4965_bg_ <-- Called from work queue context
706 * iwl4965_mac_ <-- mac80211 callback
5d08cd1d
CH
707 *
708 ****************************************************************************/
5b9f8cd3
EG
709extern void iwl_update_chain_flags(struct iwl_priv *priv);
710extern int iwl_set_pwr_src(struct iwl_priv *priv, enum iwl_pwr_src src);
a33c2f47 711extern const u8 iwl_bcast_addr[ETH_ALEN];
b3bbacb7 712extern int iwl_rxq_stop(struct iwl_priv *priv);
da1bc453 713extern void iwl_txq_ctx_stop(struct iwl_priv *priv);
443cfd45 714extern int iwl_queue_space(const struct iwl_queue *q);
fd4abac5
TW
715static inline int iwl_queue_used(const struct iwl_queue *q, int i)
716{
717 return q->write_ptr > q->read_ptr ?
718 (i >= q->read_ptr && i < q->write_ptr) :
719 !(i < q->read_ptr && i >= q->write_ptr);
720}
721
722
723static inline u8 get_cmd_index(struct iwl_queue *q, u32 index, int is_huge)
724{
725 /* This is for scan command, the big buffer at end of command array */
726 if (is_huge)
727 return q->n_window; /* must be power of 2 */
728
729 /* Otherwise, use normal size buffers */
730 return index & (q->n_window - 1);
731}
732
733
4ddbb7d0
TW
734struct iwl_dma_ptr {
735 dma_addr_t dma;
736 void *addr;
b481de9c
ZY
737 size_t size;
738};
739
b481de9c
ZY
740#define IWL_OPERATION_MODE_AUTO 0
741#define IWL_OPERATION_MODE_HT_ONLY 1
742#define IWL_OPERATION_MODE_MIXED 2
743#define IWL_OPERATION_MODE_20MHZ 3
744
3195cdb7
TW
745#define IWL_TX_CRC_SIZE 4
746#define IWL_TX_DELIMITER_SIZE 4
b481de9c 747
b481de9c 748#define TX_POWER_IWL_ILLEGAL_VOLTAGE -10000
b481de9c 749
b481de9c 750/* Sensitivity and chain noise calibration */
b481de9c 751#define INITIALIZATION_VALUE 0xFFFF
d8c07e7a
WYG
752#define IWL4965_CAL_NUM_BEACONS 20
753#define IWL_CAL_NUM_BEACONS 16
b481de9c
ZY
754#define MAXIMUM_ALLOWED_PATHLOSS 15
755
b481de9c
ZY
756#define CHAIN_NOISE_MAX_DELTA_GAIN_CODE 3
757
758#define MAX_FA_OFDM 50
759#define MIN_FA_OFDM 5
760#define MAX_FA_CCK 50
761#define MIN_FA_CCK 5
762
b481de9c
ZY
763#define AUTO_CORR_STEP_OFDM 1
764
b481de9c
ZY
765#define AUTO_CORR_STEP_CCK 3
766#define AUTO_CORR_MAX_TH_CCK 160
767
b481de9c
ZY
768#define NRG_DIFF 2
769#define NRG_STEP_CCK 2
770#define NRG_MARGIN 8
771#define MAX_NUMBER_CCK_NO_FA 100
772
773#define AUTO_CORR_CCK_MIN_VAL_DEF (125)
774
775#define CHAIN_A 0
776#define CHAIN_B 1
777#define CHAIN_C 2
778#define CHAIN_NOISE_DELTA_GAIN_INIT_VAL 4
779#define ALL_BAND_FILTER 0xFF00
780#define IN_BAND_FILTER 0xFF
781#define MIN_AVERAGE_NOISE_MAX_VALUE 0xFFFFFFFF
782
3195cdb7
TW
783#define NRG_NUM_PREV_STAT_L 20
784#define NUM_RX_CHAINS 3
785
bb8c093b 786enum iwl4965_false_alarm_state {
b481de9c
ZY
787 IWL_FA_TOO_MANY = 0,
788 IWL_FA_TOO_FEW = 1,
789 IWL_FA_GOOD_RANGE = 2,
790};
791
bb8c093b 792enum iwl4965_chain_noise_state {
b481de9c 793 IWL_CHAIN_NOISE_ALIVE = 0, /* must be 0 */
04816448
GE
794 IWL_CHAIN_NOISE_ACCUMULATE,
795 IWL_CHAIN_NOISE_CALIBRATED,
796 IWL_CHAIN_NOISE_DONE,
b481de9c
ZY
797};
798
bb8c093b 799enum iwl4965_calib_enabled_state {
b481de9c
ZY
800 IWL_CALIB_DISABLED = 0, /* must be 0 */
801 IWL_CALIB_ENABLED = 1,
802};
803
f69f42a6
TW
804
805/*
806 * enum iwl_calib
807 * defines the order in which results of initial calibrations
808 * should be sent to the runtime uCode
809 */
810enum iwl_calib {
811 IWL_CALIB_XTAL,
819500c5 812 IWL_CALIB_DC,
f69f42a6
TW
813 IWL_CALIB_LO,
814 IWL_CALIB_TX_IQ,
815 IWL_CALIB_TX_IQ_PERD,
201706ac 816 IWL_CALIB_BASE_BAND,
f69f42a6
TW
817 IWL_CALIB_MAX
818};
819
6e21f2c1
TW
820/* Opaque calibration results */
821struct iwl_calib_result {
822 void *buf;
823 size_t buf_len;
7c616cba
TW
824};
825
dbb983b7
RR
826enum ucode_type {
827 UCODE_NONE = 0,
828 UCODE_INIT,
829 UCODE_RT
830};
831
b481de9c 832/* Sensitivity calib data */
f0832f13 833struct iwl_sensitivity_data {
b481de9c
ZY
834 u32 auto_corr_ofdm;
835 u32 auto_corr_ofdm_mrc;
836 u32 auto_corr_ofdm_x1;
837 u32 auto_corr_ofdm_mrc_x1;
838 u32 auto_corr_cck;
839 u32 auto_corr_cck_mrc;
840
841 u32 last_bad_plcp_cnt_ofdm;
842 u32 last_fa_cnt_ofdm;
843 u32 last_bad_plcp_cnt_cck;
844 u32 last_fa_cnt_cck;
845
846 u32 nrg_curr_state;
847 u32 nrg_prev_state;
848 u32 nrg_value[10];
849 u8 nrg_silence_rssi[NRG_NUM_PREV_STAT_L];
850 u32 nrg_silence_ref;
851 u32 nrg_energy_idx;
852 u32 nrg_silence_idx;
853 u32 nrg_th_cck;
854 s32 nrg_auto_corr_silence_diff;
855 u32 num_in_cck_no_fa;
856 u32 nrg_th_ofdm;
55036d66
WYG
857
858 u16 barker_corr_th_min;
859 u16 barker_corr_th_min_mrc;
860 u16 nrg_th_cca;
b481de9c
ZY
861};
862
863/* Chain noise (differential Rx gain) calib data */
f0832f13 864struct iwl_chain_noise_data {
04816448 865 u32 active_chains;
b481de9c
ZY
866 u32 chain_noise_a;
867 u32 chain_noise_b;
868 u32 chain_noise_c;
869 u32 chain_signal_a;
870 u32 chain_signal_b;
871 u32 chain_signal_c;
04816448 872 u16 beacon_count;
b481de9c
ZY
873 u8 disconn_array[NUM_RX_CHAINS];
874 u8 delta_gain_code[NUM_RX_CHAINS];
875 u8 radio_write;
04816448 876 u8 state;
b481de9c
ZY
877};
878
abceddb4
BC
879#define EEPROM_SEM_TIMEOUT 10 /* milliseconds */
880#define EEPROM_SEM_RETRY_LIMIT 1000 /* number of attempts (not time) */
b481de9c 881
20594eb0
WYG
882#define IWL_TRAFFIC_ENTRIES (256)
883#define IWL_TRAFFIC_ENTRY_SIZE (64)
5d08cd1d 884
5d08cd1d
CH
885enum {
886 MEASUREMENT_READY = (1 << 0),
887 MEASUREMENT_ACTIVE = (1 << 1),
888};
889
0848e297
WYG
890enum iwl_nvm_type {
891 NVM_DEVICE_TYPE_EEPROM = 0,
892 NVM_DEVICE_TYPE_OTP,
893};
894
415e4993
WYG
895/*
896 * Two types of OTP memory access modes
897 * IWL_OTP_ACCESS_ABSOLUTE - absolute address mode,
898 * based on physical memory addressing
899 * IWL_OTP_ACCESS_RELATIVE - relative address mode,
900 * based on logical memory addressing
901 */
902enum iwl_access_mode {
903 IWL_OTP_ACCESS_ABSOLUTE,
904 IWL_OTP_ACCESS_RELATIVE,
905};
65b7998a
WYG
906
907/**
908 * enum iwl_pa_type - Power Amplifier type
909 * @IWL_PA_SYSTEM: based on uCode configuration
910 * @IWL_PA_HYBRID: use both Internal and external PA
911 * @IWL_PA_INTERNAL: use Internal only
912 */
913enum iwl_pa_type {
914 IWL_PA_SYSTEM = 0,
915 IWL_PA_HYBRID = 1,
916 IWL_PA_INTERNAL = 2,
917};
918
a83b9141
WYG
919/* interrupt statistics */
920struct isr_statistics {
921 u32 hw;
922 u32 sw;
923 u32 sw_err;
924 u32 sch;
925 u32 alive;
926 u32 rfkill;
927 u32 ctkill;
928 u32 wakeup;
929 u32 rx;
930 u32 rx_handlers[REPLY_MAX];
931 u32 tx;
932 u32 unhandled;
933};
5d08cd1d 934
22fdf3c9
WYG
935#ifdef CONFIG_IWLWIFI_DEBUGFS
936/* management statistics */
937enum iwl_mgmt_stats {
938 MANAGEMENT_ASSOC_REQ = 0,
939 MANAGEMENT_ASSOC_RESP,
940 MANAGEMENT_REASSOC_REQ,
941 MANAGEMENT_REASSOC_RESP,
942 MANAGEMENT_PROBE_REQ,
943 MANAGEMENT_PROBE_RESP,
944 MANAGEMENT_BEACON,
945 MANAGEMENT_ATIM,
946 MANAGEMENT_DISASSOC,
947 MANAGEMENT_AUTH,
948 MANAGEMENT_DEAUTH,
949 MANAGEMENT_ACTION,
950 MANAGEMENT_MAX,
951};
952/* control statistics */
953enum iwl_ctrl_stats {
954 CONTROL_BACK_REQ = 0,
955 CONTROL_BACK,
956 CONTROL_PSPOLL,
957 CONTROL_RTS,
958 CONTROL_CTS,
959 CONTROL_ACK,
960 CONTROL_CFEND,
961 CONTROL_CFENDACK,
962 CONTROL_MAX,
963};
964
965struct traffic_stats {
966 u32 mgmt[MANAGEMENT_MAX];
967 u32 ctrl[CONTROL_MAX];
968 u32 data_cnt;
969 u64 data_bytes;
970};
971#else
972struct traffic_stats {
973 u64 data_bytes;
974};
975#endif
976
dfe7d458
RR
977#define IWL_MAX_NUM_QUEUES 20 /* FIXME: do dynamic allocation */
978
c79dd5b5 979struct iwl_priv {
5d08cd1d
CH
980
981 /* ieee device used by generic ieee processing code */
982 struct ieee80211_hw *hw;
983 struct ieee80211_channel *ieee_channels;
984 struct ieee80211_rate *ieee_rates;
82b9a121 985 struct iwl_cfg *cfg;
5d08cd1d
CH
986
987 /* temporary frame storage list */
988 struct list_head free_frames;
989 int frames_count;
990
8318d78a 991 enum ieee80211_band band;
5d08cd1d
CH
992 int alloc_rxb_skb;
993
c79dd5b5 994 void (*rx_handlers[REPLY_MAX])(struct iwl_priv *priv,
a55360e4 995 struct iwl_rx_mem_buffer *rxb);
5d08cd1d 996
8318d78a 997 struct ieee80211_supported_band bands[IEEE80211_NUM_BANDS];
5d08cd1d 998
80bc5393 999#if defined(CONFIG_IWLWIFI_SPECTRUM_MEASUREMENT) || defined(CONFIG_IWL3945_SPECTRUM_MEASUREMENT)
5d08cd1d 1000 /* spectrum measurement report caching */
2aa6ab86 1001 struct iwl_spectrum_notification measure_report;
5d08cd1d
CH
1002 u8 measurement_status;
1003#endif
1004 /* ucode beacon time */
1005 u32 ucode_beacon_time;
1006
bb8c093b 1007 /* we allocate array of iwl4965_channel_info for NIC's valid channels.
5d08cd1d 1008 * Access via channel # using indirect index array */
bf85ea4f 1009 struct iwl_channel_info *channel_info; /* channel info array */
5d08cd1d
CH
1010 u8 channel_count; /* # of channels */
1011
85d41495
KA
1012 /* each calibration channel group in the EEPROM has a derived
1013 * clip setting for each rate. 3945 only.*/
1014 const struct iwl3945_clip_group clip39_groups[5];
1015
5d08cd1d
CH
1016 /* thermal calibration */
1017 s32 temperature; /* degrees Kelvin */
1018 s32 last_temperature;
1019
7c616cba 1020 /* init calibration results */
6e21f2c1 1021 struct iwl_calib_result calib_results[IWL_CALIB_MAX];
7c616cba 1022
5d08cd1d
CH
1023 /* Scan related variables */
1024 unsigned long last_scan_jiffies;
7878a5a4 1025 unsigned long next_scan_jiffies;
5d08cd1d
CH
1026 unsigned long scan_start;
1027 unsigned long scan_pass_start;
1028 unsigned long scan_start_tsf;
805cee5b 1029 void *scan;
5d08cd1d 1030 int scan_bands;
1ecf9fc1 1031 struct cfg80211_scan_request *scan_request;
76eff18b
TW
1032 u8 scan_tx_ant[IEEE80211_NUM_BANDS];
1033 u8 mgmt_tx_ant;
5d08cd1d
CH
1034
1035 /* spinlock */
1036 spinlock_t lock; /* protect general shared data */
1037 spinlock_t hcmd_lock; /* protect hcmd */
a8b50a0a 1038 spinlock_t reg_lock; /* protect hw register access */
5d08cd1d
CH
1039 struct mutex mutex;
1040
1041 /* basic pci-network driver stuff */
1042 struct pci_dev *pci_dev;
1043
1044 /* pci hardware address support */
1045 void __iomem *hw_base;
b661c819
TW
1046 u32 hw_rev;
1047 u32 hw_wa_rev;
1048 u8 rev_id;
5d08cd1d
CH
1049
1050 /* uCode images, save to reload in case of failure */
c02b3acd
CR
1051 u32 ucode_ver; /* version of ucode, copy of
1052 iwl_ucode.ver */
5d08cd1d
CH
1053 struct fw_desc ucode_code; /* runtime inst */
1054 struct fw_desc ucode_data; /* runtime data original */
1055 struct fw_desc ucode_data_backup; /* runtime data save/restore */
1056 struct fw_desc ucode_init; /* initialization inst */
1057 struct fw_desc ucode_init_data; /* initialization data */
1058 struct fw_desc ucode_boot; /* bootstrap inst */
dbb983b7
RR
1059 enum ucode_type ucode_type;
1060 u8 ucode_write_complete; /* the image write is complete */
5d08cd1d
CH
1061
1062
3195c1f3 1063 struct iwl_rxon_time_cmd rxon_timing;
5d08cd1d
CH
1064
1065 /* We declare this const so it can only be
1066 * changed via explicit cast within the
1067 * routines that actually update the physical
1068 * hardware */
c1adf9fb
GG
1069 const struct iwl_rxon_cmd active_rxon;
1070 struct iwl_rxon_cmd staging_rxon;
5d08cd1d 1071
c1adf9fb 1072 struct iwl_rxon_cmd recovery_rxon;
5d08cd1d
CH
1073
1074 /* 1st responses from initialize and runtime uCode images.
1075 * 4965's initialize alive response contains some calibration data. */
885ba202
TW
1076 struct iwl_init_alive_resp card_alive_init;
1077 struct iwl_alive_resp card_alive;
5d08cd1d 1078
ab53d8af
MA
1079 unsigned long last_blink_time;
1080 u8 last_blink_rate;
1081 u8 allow_blinking;
1082 u64 led_tpt;
e932a609 1083
5d08cd1d
CH
1084 u16 active_rate;
1085 u16 active_rate_basic;
1086
5d08cd1d 1087 u8 assoc_station_added;
5d08cd1d 1088 u8 start_calib;
f0832f13
EG
1089 struct iwl_sensitivity_data sensitivity_data;
1090 struct iwl_chain_noise_data chain_noise_data;
5d08cd1d 1091 __le16 sensitivity_tbl[HD_TABLE_SIZE];
5d08cd1d 1092
fad95bf5 1093 struct iwl_ht_config current_ht_config;
5d08cd1d
CH
1094 u8 last_phy_res[100];
1095
5d08cd1d
CH
1096 /* Rate scaling data */
1097 s8 data_retry_limit;
1098 u8 retry_rate;
1099
1100 wait_queue_head_t wait_command_queue;
1101
1102 int activity_timer_active;
1103
1104 /* Rx and Tx DMA processing queues */
a55360e4 1105 struct iwl_rx_queue rxq;
16466903 1106 struct iwl_tx_queue txq[IWL_MAX_NUM_QUEUES];
5d08cd1d 1107 unsigned long txq_ctx_active_msk;
4ddbb7d0
TW
1108 struct iwl_dma_ptr kw; /* keep warm address */
1109 struct iwl_dma_ptr scd_bc_tbls;
1110
5d08cd1d
CH
1111 u32 scd_base_addr; /* scheduler sram base address */
1112
1113 unsigned long status;
5d08cd1d 1114
a96a27f9 1115 int last_rx_rssi; /* From Rx packet statistics */
5d08cd1d
CH
1116 int last_rx_noise; /* From beacon statistics */
1117
19758bef 1118 /* counts mgmt, ctl, and data packets */
22fdf3c9
WYG
1119 struct traffic_stats tx_stats;
1120 struct traffic_stats rx_stats;
19758bef 1121
a83b9141
WYG
1122 /* counts interrupts */
1123 struct isr_statistics isr_stats;
1124
5da4b55f 1125 struct iwl_power_mgr power_data;
3ad3b92a 1126 struct iwl_tt_mgmt thermal_throttle;
5d08cd1d 1127
8f91aecb 1128 struct iwl_notif_statistics statistics;
5d08cd1d
CH
1129 unsigned long last_statistics_time;
1130
1131 /* context information */
5d08cd1d
CH
1132 u16 rates_mask;
1133
5d08cd1d
CH
1134 u8 bssid[ETH_ALEN];
1135 u16 rts_threshold;
1136 u8 mac_addr[ETH_ALEN];
1137
1138 /*station table variables */
1139 spinlock_t sta_lock;
1140 int num_stations;
6def9761 1141 struct iwl_station_entry stations[IWL_STATION_COUNT];
6974e363
EG
1142 struct iwl_wep_key wep_keys[WEP_KEYS_MAX];
1143 u8 default_wep_key;
1144 u8 key_mapping_key;
80fb47a1 1145 unsigned long ucode_key_table;
5d08cd1d 1146
e4e72fb4
JB
1147 /* queue refcounts */
1148#define IWL_MAX_HW_QUEUES 32
1149 unsigned long queue_stopped[BITS_TO_LONGS(IWL_MAX_HW_QUEUES)];
1150 /* for each AC */
1151 atomic_t queue_stop_count[4];
1152
5d08cd1d 1153 /* Indication if ieee80211_ops->open has been called */
69dc5d9d 1154 u8 is_open;
5d08cd1d
CH
1155
1156 u8 mac80211_registered;
5d08cd1d 1157
5d08cd1d
CH
1158 /* Rx'd packet timing information */
1159 u32 last_beacon_time;
1160 u64 last_tsf;
1161
5d08cd1d 1162 /* eeprom */
073d3f5f 1163 u8 *eeprom;
0848e297 1164 int nvm_device_type;
073d3f5f 1165 struct iwl_eeprom_calib_info *calib_info;
5d08cd1d 1166
05c914fe 1167 enum nl80211_iftype iw_mode;
5d08cd1d
CH
1168
1169 struct sk_buff *ibss_beacon;
1170
1171 /* Last Rx'd beacon timestamp */
3109ece1 1172 u64 timestamp;
5d08cd1d 1173 u16 beacon_int;
32bfd35d 1174 struct ieee80211_vif *vif;
5d08cd1d 1175
8cd812bc 1176 /*Added for 3945 */
3832ec9d
AK
1177 void *shared_virt;
1178 dma_addr_t shared_phys;
1179 /*End*/
5425e490 1180 struct iwl_hw_params hw_params;
4ddbb7d0 1181
ef850d7c 1182 /* INT ICT Table */
1303dcfd 1183 __le32 *ict_tbl;
ef850d7c
MA
1184 dma_addr_t ict_tbl_dma;
1185 dma_addr_t aligned_ict_tbl_dma;
1186 int ict_index;
1187 void *ict_tbl_vir;
1188 u32 inta;
1189 bool use_ict;
059ff826 1190
40cefda9 1191 u32 inta_mask;
5d08cd1d
CH
1192 /* Current association information needed to configure the
1193 * hardware */
1194 u16 assoc_id;
1195 u16 assoc_capability;
5d08cd1d 1196
1ff50bda 1197 struct iwl_qos_info qos_data;
5d08cd1d
CH
1198
1199 struct workqueue_struct *workqueue;
1200
1201 struct work_struct up;
1202 struct work_struct restart;
1203 struct work_struct calibrated_work;
1204 struct work_struct scan_completed;
1205 struct work_struct rx_replenish;
5d08cd1d
CH
1206 struct work_struct abort_scan;
1207 struct work_struct update_link_led;
1208 struct work_struct auth_work;
1209 struct work_struct report_work;
1210 struct work_struct request_scan;
1211 struct work_struct beacon_update;
a28027cd
WYG
1212 struct work_struct tt_work;
1213 struct work_struct ct_enter;
1214 struct work_struct ct_exit;
5d08cd1d
CH
1215
1216 struct tasklet_struct irq_tasklet;
1217
1218 struct delayed_work init_alive_start;
1219 struct delayed_work alive_start;
5d08cd1d 1220 struct delayed_work scan_check;
4a8a4322
AK
1221
1222 /*For 3945 only*/
1223 struct delayed_work thermal_periodic;
2663516d 1224 struct delayed_work rfkill_poll;
4a8a4322 1225
630fe9b6
TW
1226 /* TX Power */
1227 s8 tx_power_user_lmt;
dc1b0973 1228 s8 tx_power_device_lmt;
5d08cd1d 1229
5d08cd1d 1230
d08853a3 1231#ifdef CONFIG_IWLWIFI_DEBUG
5d08cd1d 1232 /* debugging info */
3d816c77
RC
1233 u32 debug_level; /* per device debugging will override global
1234 iwl_debug_level if set */
5d08cd1d
CH
1235 u32 framecnt_to_us;
1236 atomic_t restrict_refcnt;
1e4247d4 1237 bool disable_ht40;
712b6cf5
TW
1238#ifdef CONFIG_IWLWIFI_DEBUGFS
1239 /* debugfs */
20594eb0
WYG
1240 u16 tx_traffic_idx;
1241 u16 rx_traffic_idx;
1242 u8 *tx_traffic;
1243 u8 *rx_traffic;
712b6cf5
TW
1244 struct iwl_debugfs *dbgfs;
1245#endif /* CONFIG_IWLWIFI_DEBUGFS */
1246#endif /* CONFIG_IWLWIFI_DEBUG */
5d08cd1d
CH
1247
1248 struct work_struct txpower_work;
445c2dff
TW
1249 u32 disable_sens_cal;
1250 u32 disable_chain_noise_cal;
203566f3 1251 u32 disable_tx_power_cal;
16e727e8 1252 struct work_struct run_time_calib_work;
5d08cd1d 1253 struct timer_list statistics_periodic;
086ed117 1254 bool hw_ready;
4a8a4322
AK
1255 /*For 3945*/
1256#define IWL_DEFAULT_TX_POWER 0x0F
4a8a4322 1257
4a8a4322
AK
1258 struct iwl3945_notif_statistics statistics_39;
1259
4a8a4322 1260 u32 sta_supp_rates;
c79dd5b5 1261}; /*iwl_priv */
5d08cd1d 1262
36470749
RR
1263static inline void iwl_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
1264{
1265 set_bit(txq_id, &priv->txq_ctx_active_msk);
1266}
1267
1268static inline void iwl_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
1269{
1270 clear_bit(txq_id, &priv->txq_ctx_active_msk);
1271}
1272
994d31f7 1273#ifdef CONFIG_IWLWIFI_DEBUG
a332f8d6 1274const char *iwl_get_tx_fail_reason(u32 status);
3d816c77
RC
1275/*
1276 * iwl_get_debug_level: Return active debug level for device
1277 *
1278 * Using sysfs it is possible to set per device debug level. This debug
1279 * level will be used if set, otherwise the global debug level which can be
1280 * set via module parameter is used.
1281 */
1282static inline u32 iwl_get_debug_level(struct iwl_priv *priv)
1283{
1284 if (priv->debug_level)
1285 return priv->debug_level;
1286 else
1287 return iwl_debug_level;
1288}
a332f8d6
TW
1289#else
1290static inline const char *iwl_get_tx_fail_reason(u32 status) { return ""; }
3d816c77
RC
1291
1292static inline u32 iwl_get_debug_level(struct iwl_priv *priv)
1293{
1294 return iwl_debug_level;
1295}
a332f8d6
TW
1296#endif
1297
1298
a332f8d6
TW
1299static inline struct ieee80211_hdr *iwl_tx_queue_get_hdr(struct iwl_priv *priv,
1300 int txq_id, int idx)
1301{
1302 if (priv->txq[txq_id].txb[idx].skb[0])
1303 return (struct ieee80211_hdr *)priv->txq[txq_id].
1304 txb[idx].skb[0]->data;
1305 return NULL;
1306}
a332f8d6
TW
1307
1308
3109ece1 1309static inline int iwl_is_associated(struct iwl_priv *priv)
5d08cd1d
CH
1310{
1311 return (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ? 1 : 0;
1312}
1313
bf85ea4f 1314static inline int is_channel_valid(const struct iwl_channel_info *ch_info)
5d08cd1d
CH
1315{
1316 if (ch_info == NULL)
1317 return 0;
1318 return (ch_info->flags & EEPROM_CHANNEL_VALID) ? 1 : 0;
1319}
1320
bf85ea4f 1321static inline int is_channel_radar(const struct iwl_channel_info *ch_info)
5d08cd1d
CH
1322{
1323 return (ch_info->flags & EEPROM_CHANNEL_RADAR) ? 1 : 0;
1324}
1325
bf85ea4f 1326static inline u8 is_channel_a_band(const struct iwl_channel_info *ch_info)
5d08cd1d 1327{
8318d78a 1328 return ch_info->band == IEEE80211_BAND_5GHZ;
5d08cd1d
CH
1329}
1330
bf85ea4f 1331static inline u8 is_channel_bg_band(const struct iwl_channel_info *ch_info)
5d08cd1d 1332{
8318d78a 1333 return ch_info->band == IEEE80211_BAND_2GHZ;
5d08cd1d
CH
1334}
1335
bf85ea4f 1336static inline int is_channel_passive(const struct iwl_channel_info *ch)
5d08cd1d
CH
1337{
1338 return (!(ch->flags & EEPROM_CHANNEL_ACTIVE)) ? 1 : 0;
1339}
1340
bf85ea4f 1341static inline int is_channel_ibss(const struct iwl_channel_info *ch)
5d08cd1d
CH
1342{
1343 return ((ch->flags & EEPROM_CHANNEL_IBSS)) ? 1 : 0;
1344}
1345
be1f3ab6 1346#endif /* __iwl_dev_h__ */