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iwlwifi: remove monitor check
[net-next-2.6.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
1f447808 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
1d0a082d 33#include <net/mac80211.h>
df48c323 34
6bc913bd 35#include "iwl-eeprom.h"
3e0d4cb1 36#include "iwl-dev.h" /* FIXME: remove */
19335774 37#include "iwl-debug.h"
df48c323 38#include "iwl-core.h"
b661c819 39#include "iwl-io.h"
5da4b55f 40#include "iwl-power.h"
83dde8c9 41#include "iwl-sta.h"
ef850d7c 42#include "iwl-helpers.h"
df48c323 43
1d0a082d 44
df48c323
TW		 45MODULE_DESCRIPTION("iwl core");
46MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 47MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 48MODULE_LICENSE("GPL");
df48c323 49
06702a73
WYG		 50/*
51 * set bt_coex_active to true, uCode will do kill/defer
52 * every time the priority line is asserted (BT is sending signals on the
53 * priority line in the PCIx).
54 * set bt_coex_active to false, uCode will ignore the BT activity and
55 * perform the normal operation
56 *
57 * User might experience transmit issue on some platform due to WiFi/BT
58 * co-exist problem. The possible behaviors are:
59 * Able to scan and finding all the available AP
60 * Not able to associate with any AP
61 * On those platforms, WiFi communication can be restored by set
62 * "bt_coex_active" module parameter to "false"
63 *
64 * default: bt_coex_active = true (BT_COEX_ENABLE)
65 */
66static bool bt_coex_active = true;
67module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 68MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 69
1933ac4d
WYG		 70static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
71 {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
72 0, COEX_UNASSOC_IDLE_FLAGS},
73 {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
74 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
75 {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
76 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
77 {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
78 0, COEX_CALIBRATION_FLAGS},
79 {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
80 0, COEX_PERIODIC_CALIBRATION_FLAGS},
81 {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
82 0, COEX_CONNECTION_ESTAB_FLAGS},
83 {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
84 0, COEX_ASSOCIATED_IDLE_FLAGS},
85 {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
86 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
87 {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
88 0, COEX_ASSOC_AUTO_SCAN_FLAGS},
89 {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
90 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
91 {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
92 {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
93 {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
94 0, COEX_STAND_ALONE_DEBUG_FLAGS},
95 {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
96 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
97 {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
98 {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
99};
100
c7de35cd
RR		 101#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
102 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
103 IWL_RATE_SISO_##s##M_PLCP, \
104 IWL_RATE_MIMO2_##s##M_PLCP,\
105 IWL_RATE_MIMO3_##s##M_PLCP,\
106 IWL_RATE_##r##M_IEEE, \
107 IWL_RATE_##ip##M_INDEX, \
108 IWL_RATE_##in##M_INDEX, \
109 IWL_RATE_##rp##M_INDEX, \
110 IWL_RATE_##rn##M_INDEX, \
111 IWL_RATE_##pp##M_INDEX, \
112 IWL_RATE_##np##M_INDEX }
113
a562a9dd
RC		 114u32 iwl_debug_level;
115EXPORT_SYMBOL(iwl_debug_level);
116
c7de35cd
RR		 117/*
118 * Parameter order:
119 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
120 *
121 * If there isn't a valid next or previous rate then INV is used which
122 * maps to IWL_RATE_INVALID
123 *
124 */
1826dcc0 125const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 126 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
127 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
128 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
129 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
130 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
131 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
132 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
133 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
134 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
135 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
136 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
137 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
138 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
139 /* FIXME:RS: ^^ should be INV (legacy) */
140};
1826dcc0 141EXPORT_SYMBOL(iwl_rates);
c7de35cd 142
e7d326ac
TW		 143int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
144{
145 int idx = 0;
146
147 /* HT rate format */
148 if (rate_n_flags & RATE_MCS_HT_MSK) {
149 idx = (rate_n_flags & 0xff);
150
60d32215
DH		 151 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
152 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
153 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 154 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
155
156 idx += IWL_FIRST_OFDM_RATE;
157 /* skip 9M not supported in ht*/
158 if (idx >= IWL_RATE_9M_INDEX)
159 idx += 1;
160 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
161 return idx;
162
163 /* legacy rate format, search for match in table */
164 } else {
165 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
166 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
167 return idx;
168 }
169
170 return -1;
171}
172EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
173
76eff18b
TW		 174u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
175{
176 int i;
177 u8 ind = ant;
178 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
179 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
180 if (priv->hw_params.valid_tx_ant & BIT(ind))
181 return ind;
182 }
183 return ant;
184}
47ff65c4 185EXPORT_SYMBOL(iwl_toggle_tx_ant);
57bd1bea
TW		 186
187const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
188EXPORT_SYMBOL(iwl_bcast_addr);
189
190
1d0a082d
AK		 191/* This function both allocates and initializes hw and priv. */
192struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
193 struct ieee80211_ops *hw_ops)
194{
195 struct iwl_priv *priv;
196
197 /* mac80211 allocates memory for this device instance, including
198 * space for this driver's private structure */
199 struct ieee80211_hw *hw =
200 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
201 if (hw == NULL) {
a3139c59
SO		 202 printk(KERN_ERR "%s: Can not allocate network device\n",
203 cfg->name);
1d0a082d
AK		 204 goto out;
205 }
206
207 priv = hw->priv;
208 priv->hw = hw;
209
210out:
211 return hw;
212}
213EXPORT_SYMBOL(iwl_alloc_all);
214
b661c819
TW		 215void iwl_hw_detect(struct iwl_priv *priv)
216{
217 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
218 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
219 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
220}
221EXPORT_SYMBOL(iwl_hw_detect);
222
14d2aac5
AK		 223/*
224 * QoS support
225*/
e61146e3 226static void iwl_update_qos(struct iwl_priv *priv)
14d2aac5
AK		 227{
228 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
229 return;
230
231 priv->qos_data.def_qos_parm.qos_flags = 0;
232
14d2aac5
AK		 233 if (priv->qos_data.qos_active)
234 priv->qos_data.def_qos_parm.qos_flags |=
235 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
236
237 if (priv->current_ht_config.is_ht)
238 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
239
e61146e3
SG		 240 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
241 priv->qos_data.qos_active,
242 priv->qos_data.def_qos_parm.qos_flags);
14d2aac5 243
e61146e3
SG		 244 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
245 sizeof(struct iwl_qosparam_cmd),
246 &priv->qos_data.def_qos_parm, NULL);
14d2aac5 247}
c7de35cd 248
d9fe60de
JB		 249#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
250#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 251static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 252 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 253 enum ieee80211_band band)
254{
39130df3
RR		 255 u16 max_bit_rate = 0;
256 u8 rx_chains_num = priv->hw_params.rx_chains_num;
257 u8 tx_chains_num = priv->hw_params.tx_chains_num;
258
c7de35cd 259 ht_info->cap = 0;
d9fe60de 260 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 261
d9fe60de 262 ht_info->ht_supported = true;
c7de35cd 263
b261793d
DH		 264 if (priv->cfg->ht_greenfield_support)
265 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 266 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 267 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 268 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 269 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
270 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
271 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 272 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 273 }
c7de35cd
RR		 274
275 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 276 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 277
278 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
279 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
280
d9fe60de 281 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 282 if (rx_chains_num >= 2)
d9fe60de 283 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 284 if (rx_chains_num >= 3)
d9fe60de 285 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 286
287 /* Highest supported Rx data rate */
288 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 289 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
290 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 291
292 /* Tx MCS capabilities */
d9fe60de 293 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 294 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 295 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
296 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
297 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 298 }
c7de35cd 299}
c7de35cd 300
c7de35cd
RR		 301/**
302 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
303 */
534166de 304int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 305{
306 struct iwl_channel_info *ch;
307 struct ieee80211_supported_band *sband;
308 struct ieee80211_channel *channels;
309 struct ieee80211_channel *geo_ch;
310 struct ieee80211_rate *rates;
311 int i = 0;
312
313 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
314 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 315 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 316 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
317 return 0;
318 }
319
320 channels = kzalloc(sizeof(struct ieee80211_channel) *
321 priv->channel_count, GFP_KERNEL);
322 if (!channels)
323 return -ENOMEM;
324
5027309b 325 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 326 GFP_KERNEL);
327 if (!rates) {
328 kfree(channels);
329 return -ENOMEM;
330 }
331
332 /* 5.2GHz channels start after the 2.4GHz channels */
333 sband = &priv->bands[IEEE80211_BAND_5GHZ];
334 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
335 /* just OFDM */
336 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 337 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 338
49779293 339 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 340 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 341 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 342
343 sband = &priv->bands[IEEE80211_BAND_2GHZ];
344 sband->channels = channels;
345 /* OFDM & CCK */
346 sband->bitrates = rates;
5027309b 347 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 348
49779293 349 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 350 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 351 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 352
353 priv->ieee_channels = channels;
354 priv->ieee_rates = rates;
355
c7de35cd
RR		 356 for (i = 0; i < priv->channel_count; i++) {
357 ch = &priv->channel_info[i];
358
359 /* FIXME: might be removed if scan is OK */
360 if (!is_channel_valid(ch))
361 continue;
362
363 if (is_channel_a_band(ch))
364 sband = &priv->bands[IEEE80211_BAND_5GHZ];
365 else
366 sband = &priv->bands[IEEE80211_BAND_2GHZ];
367
368 geo_ch = &sband->channels[sband->n_channels++];
369
370 geo_ch->center_freq =
371 ieee80211_channel_to_frequency(ch->channel);
372 geo_ch->max_power = ch->max_power_avg;
373 geo_ch->max_antenna_gain = 0xff;
374 geo_ch->hw_value = ch->channel;
375
376 if (is_channel_valid(ch)) {
377 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
378 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
379
380 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
381 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
382
383 if (ch->flags & EEPROM_CHANNEL_RADAR)
384 geo_ch->flags |= IEEE80211_CHAN_RADAR;
385
7aafef1c 386 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 387
dc1b0973
WYG		 388 if (ch->max_power_avg > priv->tx_power_device_lmt)
389 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 390 } else {
391 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
392 }
393
e1623446 394 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 395 ch->channel, geo_ch->center_freq,
396 is_channel_a_band(ch) ? "5.2" : "2.4",
397 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
398 "restricted" : "valid",
399 geo_ch->flags);
400 }
401
402 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
403 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 404 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
405 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 406 priv->pci_dev->device,
407 priv->pci_dev->subsystem_device);
c7de35cd
RR		 408 priv->cfg->sku &= ~IWL_SKU_A;
409 }
410
978785a3 411 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 412 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
413 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 414
415 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
416
417 return 0;
418}
534166de 419EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 420
421/*
422 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
423 */
534166de 424void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 425{
426 kfree(priv->ieee_channels);
427 kfree(priv->ieee_rates);
428 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
429}
534166de 430EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 431
37dc70fe
AK		 432/*
433 * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
434 * function.
435 */
436void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
437 __le32 *tx_flags)
438{
439 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
440 *tx_flags |= TX_CMD_FLG_RTS_MSK;
441 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
442 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
443 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
444 *tx_flags |= TX_CMD_FLG_CTS_MSK;
445 }
446}
447EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
448
28a6b07a 449static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd 450{
ba37a3d0 451 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
02bb1bea 452 priv->current_ht_config.single_chain_sufficient;
c7de35cd 453}
963f5517 454
47c5196e
TW		 455static u8 iwl_is_channel_extension(struct iwl_priv *priv,
456 enum ieee80211_band band,
457 u16 channel, u8 extension_chan_offset)
458{
459 const struct iwl_channel_info *ch_info;
460
461 ch_info = iwl_get_channel_info(priv, band, channel);
462 if (!is_channel_valid(ch_info))
463 return 0;
464
d9fe60de 465 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 466 return !(ch_info->ht40_extension_channel &
689da1b3 467 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 468 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 469 return !(ch_info->ht40_extension_channel &
689da1b3 470 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e
TW		 471
472 return 0;
473}
474
7aafef1c 475u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
d9fe60de 476 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e 477{
fad95bf5 478 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
47c5196e 479
fad95bf5 480 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
47c5196e
TW		 481 return 0;
482
a2b0f02e
WYG		 483 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
484 * the bit will not set if it is pure 40MHz case
485 */
47c5196e 486 if (sta_ht_inf) {
a2b0f02e 487 if (!sta_ht_inf->ht_supported)
47c5196e
TW		 488 return 0;
489 }
1e4247d4
WYG		 490#ifdef CONFIG_IWLWIFI_DEBUG
491 if (priv->disable_ht40)
492 return 0;
493#endif
611d3eb7
WYG		 494 return iwl_is_channel_extension(priv, priv->band,
495 le16_to_cpu(priv->staging_rxon.channel),
fad95bf5 496 ht_conf->extension_chan_offset);
47c5196e 497}
7aafef1c 498EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 499
2c2f3b33
TW		 500static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
501{
502 u16 new_val = 0;
503 u16 beacon_factor = 0;
504
505 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
506 new_val = beacon_val / beacon_factor;
507
508 if (!new_val)
509 new_val = max_beacon_val;
510
511 return new_val;
512}
513
514void iwl_setup_rxon_timing(struct iwl_priv *priv)
515{
516 u64 tsf;
517 s32 interval_tm, rem;
518 unsigned long flags;
519 struct ieee80211_conf *conf = NULL;
520 u16 beacon_int;
521
522 conf = ieee80211_get_hw_conf(priv->hw);
523
524 spin_lock_irqsave(&priv->lock, flags);
525 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
526 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
527
528 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
529 beacon_int = priv->beacon_int;
530 priv->rxon_timing.atim_window = 0;
531 } else {
532 beacon_int = priv->vif->bss_conf.beacon_int;
533
534 /* TODO: we need to get atim_window from upper stack
535 * for now we set to 0 */
536 priv->rxon_timing.atim_window = 0;
537 }
538
539 beacon_int = iwl_adjust_beacon_interval(beacon_int,
540 priv->hw_params.max_beacon_itrvl * 1024);
541 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
542
543 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
544 interval_tm = beacon_int * 1024;
545 rem = do_div(tsf, interval_tm);
546 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
547
548 spin_unlock_irqrestore(&priv->lock, flags);
549 IWL_DEBUG_ASSOC(priv,
550 "beacon interval %d beacon timer %d beacon tim %d\n",
551 le16_to_cpu(priv->rxon_timing.beacon_interval),
552 le32_to_cpu(priv->rxon_timing.beacon_init_val),
553 le16_to_cpu(priv->rxon_timing.atim_window));
554}
555EXPORT_SYMBOL(iwl_setup_rxon_timing);
556
8ccde88a
SO		 557void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
558{
559 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
560
561 if (hw_decrypt)
562 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
563 else
564 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
565
566}
567EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
568
569/**
570 * iwl_check_rxon_cmd - validate RXON structure is valid
571 *
572 * NOTE: This is really only useful during development and can eventually
573 * be #ifdef'd out once the driver is stable and folks aren't actively
574 * making changes
575 */
576int iwl_check_rxon_cmd(struct iwl_priv *priv)
577{
578 int error = 0;
579 int counter = 1;
580 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
581
582 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
583 error |= le32_to_cpu(rxon->flags &
584 (RXON_FLG_TGJ_NARROW_BAND_MSK |
585 RXON_FLG_RADAR_DETECT_MSK));
586 if (error)
587 IWL_WARN(priv, "check 24G fields %d | %d\n",
588 counter++, error);
589 } else {
590 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
591 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
592 if (error)
593 IWL_WARN(priv, "check 52 fields %d | %d\n",
594 counter++, error);
595 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
596 if (error)
597 IWL_WARN(priv, "check 52 CCK %d | %d\n",
598 counter++, error);
599 }
600 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
601 if (error)
602 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
603
604 /* make sure basic rates 6Mbps and 1Mbps are supported */
605 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
606 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
607 if (error)
608 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
609
610 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
611 if (error)
612 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
613
614 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
615 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
616 if (error)
617 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
618 counter++, error);
619
620 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
621 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
622 if (error)
623 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
624 counter++, error);
625
626 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
627 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
628 if (error)
629 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
630 counter++, error);
631
632 if (error)
633 IWL_WARN(priv, "Tuning to channel %d\n",
634 le16_to_cpu(rxon->channel));
635
636 if (error) {
637 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
638 return -1;
639 }
640 return 0;
641}
642EXPORT_SYMBOL(iwl_check_rxon_cmd);
643
644/**
645 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
646 * @priv: staging_rxon is compared to active_rxon
647 *
648 * If the RXON structure is changing enough to require a new tune,
649 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
650 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
651 */
652int iwl_full_rxon_required(struct iwl_priv *priv)
653{
654
655 /* These items are only settable from the full RXON command */
656 if (!(iwl_is_associated(priv)) ||
657 compare_ether_addr(priv->staging_rxon.bssid_addr,
658 priv->active_rxon.bssid_addr) ||
659 compare_ether_addr(priv->staging_rxon.node_addr,
660 priv->active_rxon.node_addr) ||
661 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
662 priv->active_rxon.wlap_bssid_addr) ||
663 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
664 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
665 (priv->staging_rxon.air_propagation !=
666 priv->active_rxon.air_propagation) ||
667 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
668 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
669 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
670 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH		 671 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
672 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO		 673 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
674 return 1;
675
676 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
677 * be updated with the RXON_ASSOC command -- however only some
678 * flag transitions are allowed using RXON_ASSOC */
679
680 /* Check if we are not switching bands */
681 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
682 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
683 return 1;
684
685 /* Check if we are switching association toggle */
686 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
687 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
688 return 1;
689
690 return 0;
691}
692EXPORT_SYMBOL(iwl_full_rxon_required);
693
694u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
695{
4a02886b
JB		 696 /*
697 * Assign the lowest rate -- should really get this from
698 * the beacon skb from mac80211.
699 */
8ccde88a
SO		 700 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
701 return IWL_RATE_1M_PLCP;
702 else
703 return IWL_RATE_6M_PLCP;
704}
705EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
706
fad95bf5 707void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
47c5196e 708{
c1adf9fb 709 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e 710
fad95bf5 711 if (!ht_conf->is_ht) {
a2b0f02e 712 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 713 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 714 RXON_FLG_HT40_PROT_MSK |
42eb7c64 715 RXON_FLG_HT_PROT_MSK);
47c5196e 716 return;
42eb7c64 717 }
47c5196e 718
a2b0f02e
WYG		 719 /* FIXME: if the definition of ht_protection changed, the "translation"
720 * will be needed for rxon->flags
721 */
fad95bf5 722 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 723
724 /* Set up channel bandwidth:
7aafef1c 725 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 726 /* clear the HT channel mode before set the mode */
727 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
728 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7aafef1c
WYG		 729 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
730 /* pure ht40 */
fad95bf5 731 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 732 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 733 /* Note: control channel is opposite of extension channel */
fad95bf5 734 switch (ht_conf->extension_chan_offset) {
508b08e7
WYG		 735 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
736 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
737 break;
738 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
739 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
740 break;
741 }
742 } else {
a2b0f02e 743 /* Note: control channel is opposite of extension channel */
fad95bf5 744 switch (ht_conf->extension_chan_offset) {
a2b0f02e
WYG		 745 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
746 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
747 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
748 break;
749 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
750 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
751 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
752 break;
753 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
754 default:
755 /* channel location only valid if in Mixed mode */
756 IWL_ERR(priv, "invalid extension channel offset\n");
757 break;
758 }
759 }
760 } else {
761 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 762 }
763
45823531
AK		 764 if (priv->cfg->ops->hcmd->set_rxon_chain)
765 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 766
02bb1bea 767 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 768 "extension channel offset 0x%x\n",
fad95bf5
JB		 769 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
770 ht_conf->extension_chan_offset);
47c5196e
TW		 771 return;
772}
773EXPORT_SYMBOL(iwl_set_rxon_ht);
774
9e5e6c32
TW		 775#define IWL_NUM_RX_CHAINS_MULTIPLE 3
776#define IWL_NUM_RX_CHAINS_SINGLE 2
777#define IWL_NUM_IDLE_CHAINS_DUAL 2
778#define IWL_NUM_IDLE_CHAINS_SINGLE 1
779
2b396a12
JB		 780/*
781 * Determine how many receiver/antenna chains to use.
782 *
783 * More provides better reception via diversity. Fewer saves power
784 * at the expense of throughput, but only when not in powersave to
785 * start with.
786 *
c7de35cd
RR		 787 * MIMO (dual stream) requires at least 2, but works better with 3.
788 * This does not determine *which* chains to use, just how many.
789 */
28a6b07a 790static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 791{
c7de35cd 792 /* # of Rx chains to use when expecting MIMO. */
02bb1bea 793 if (is_single_rx_stream(priv))
9e5e6c32 794 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 795 else
9e5e6c32 796 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 797}
c7de35cd 798
2b396a12 799/*
3f3e0376
WYG		 800 * When we are in power saving mode, unless device support spatial
801 * multiplexing power save, use the active count for rx chain count.
2b396a12 802 */
28a6b07a
TW		 803static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
804{
ba37a3d0
JB		 805 /* # Rx chains when idling, depending on SMPS mode */
806 switch (priv->current_ht_config.smps) {
807 case IEEE80211_SMPS_STATIC:
808 case IEEE80211_SMPS_DYNAMIC:
809 return IWL_NUM_IDLE_CHAINS_SINGLE;
810 case IEEE80211_SMPS_OFF:
811 return active_cnt;
c15d20c1 812 default:
ba37a3d0
JB		 813 WARN(1, "invalid SMPS mode %d",
814 priv->current_ht_config.smps);
815 return active_cnt;
3f3e0376 816 }
c7de35cd
RR		 817}
818
04816448
GE		 819/* up to 4 chains */
820static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
821{
822 u8 res;
823 res = (chain_bitmap & BIT(0)) >> 0;
824 res += (chain_bitmap & BIT(1)) >> 1;
825 res += (chain_bitmap & BIT(2)) >> 2;
9bddbab3 826 res += (chain_bitmap & BIT(3)) >> 3;
04816448
GE		 827 return res;
828}
829
c7de35cd
RR		 830/**
831 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
832 *
833 * Selects how many and which Rx receivers/antennas/chains to use.
834 * This should not be used for scan command ... it puts data in wrong place.
835 */
836void iwl_set_rxon_chain(struct iwl_priv *priv)
837{
28a6b07a
TW		 838 bool is_single = is_single_rx_stream(priv);
839 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 840 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
841 u32 active_chains;
28a6b07a 842 u16 rx_chain;
c7de35cd
RR		 843
844 /* Tell uCode which antennas are actually connected.
845 * Before first association, we assume all antennas are connected.
846 * Just after first association, iwl_chain_noise_calibration()
847 * checks which antennas actually *are* connected. */
04816448
GE		 848 if (priv->chain_noise_data.active_chains)
849 active_chains = priv->chain_noise_data.active_chains;
850 else
851 active_chains = priv->hw_params.valid_rx_ant;
852
853 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 854
855 /* How many receivers should we use? */
28a6b07a
TW		 856 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
857 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
858
28a6b07a 859
04816448
GE		 860 /* correct rx chain count according hw settings
861 * and chain noise calibration
862 */
863 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
864 if (valid_rx_cnt < active_rx_cnt)
865 active_rx_cnt = valid_rx_cnt;
866
867 if (valid_rx_cnt < idle_rx_cnt)
868 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 869
870 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
871 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
872
873 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
874
9e5e6c32 875 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR		 876 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
877 else
878 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
879
e1623446 880 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW		 881 priv->staging_rxon.rx_chain,
882 active_rx_cnt, idle_rx_cnt);
883
884 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
885 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 886}
887EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f
AK		 888
889/**
17e72782 890 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
bf85ea4f
AK		 891 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
892 * @channel: Any channel valid for the requested phymode
893
894 * In addition to setting the staging RXON, priv->phymode is also set.
895 *
896 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
897 * in the staging RXON flag structure based on the phymode
898 */
17e72782 899int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 900{
17e72782
TW		 901 enum ieee80211_band band = ch->band;
902 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
903
8622e705 904 if (!iwl_get_channel_info(priv, band, channel)) {
e1623446 905 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
bf85ea4f
AK		 906 channel, band);
907 return -EINVAL;
908 }
909
910 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
911 (priv->band == band))
912 return 0;
913
914 priv->staging_rxon.channel = cpu_to_le16(channel);
915 if (band == IEEE80211_BAND_5GHZ)
916 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
917 else
918 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
919
920 priv->band = band;
921
e1623446 922 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 923
924 return 0;
925}
c7de35cd 926EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 927
8ccde88a
SO		 928void iwl_set_flags_for_band(struct iwl_priv *priv,
929 enum ieee80211_band band)
930{
931 if (band == IEEE80211_BAND_5GHZ) {
932 priv->staging_rxon.flags &=
933 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
934 | RXON_FLG_CCK_MSK);
935 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
936 } else {
937 /* Copied from iwl_post_associate() */
938 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
939 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
940 else
941 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
942
943 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
944 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
945
946 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
947 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
948 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
949 }
950}
8ccde88a
SO		 951
952/*
953 * initialize rxon structure with default values from eeprom
954 */
955void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
956{
957 const struct iwl_channel_info *ch_info;
958
959 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
960
961 switch (mode) {
962 case NL80211_IFTYPE_AP:
963 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
964 break;
965
966 case NL80211_IFTYPE_STATION:
967 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
968 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
969 break;
970
971 case NL80211_IFTYPE_ADHOC:
972 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
973 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
974 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
975 RXON_FILTER_ACCEPT_GRP_MSK;
976 break;
977
8ccde88a
SO		 978 default:
979 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
980 break;
981 }
982
983#if 0
984 /* TODO: Figure out when short_preamble would be set and cache from
985 * that */
986 if (!hw_to_local(priv->hw)->short_preamble)
987 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
988 else
989 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
990#endif
991
992 ch_info = iwl_get_channel_info(priv, priv->band,
993 le16_to_cpu(priv->active_rxon.channel));
994
995 if (!ch_info)
996 ch_info = &priv->channel_info[0];
997
8ccde88a
SO		 998 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
999 priv->band = ch_info->band;
1000
1001 iwl_set_flags_for_band(priv, priv->band);
1002
1003 priv->staging_rxon.ofdm_basic_rates =
1004 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1005 priv->staging_rxon.cck_basic_rates =
1006 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1007
a2b0f02e
WYG		 1008 /* clear both MIX and PURE40 mode flag */
1009 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1010 RXON_FLG_CHANNEL_MODE_PURE_40);
8ccde88a
SO		 1011 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1012 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1013 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1014 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 1015 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 1016}
1017EXPORT_SYMBOL(iwl_connection_init_rx_config);
1018
782571f4 1019static void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 1020{
1021 const struct ieee80211_supported_band *hw = NULL;
1022 struct ieee80211_rate *rate;
1023 int i;
1024
1025 hw = iwl_get_hw_mode(priv, priv->band);
1026 if (!hw) {
1027 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1028 return;
1029 }
1030
1031 priv->active_rate = 0;
8ccde88a
SO		 1032
1033 for (i = 0; i < hw->n_bitrates; i++) {
1034 rate = &(hw->bitrates[i]);
5027309b 1035 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 1036 priv->active_rate |= (1 << rate->hw_value);
1037 }
1038
4a02886b 1039 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 1040
4a02886b
JB		 1041 priv->staging_rxon.cck_basic_rates =
1042 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1043
1044 priv->staging_rxon.ofdm_basic_rates =
1045 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
8ccde88a 1046}
8ccde88a
SO		 1047
1048void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1049{
2f301227 1050 struct iwl_rx_packet *pkt = rxb_addr(rxb);
8ccde88a
SO		 1051 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1052 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
4a56e965 1053
0924e519
WYG		 1054 if (priv->switch_rxon.switch_in_progress) {
1055 if (!le32_to_cpu(csa->status) &&
1056 (csa->channel == priv->switch_rxon.channel)) {
1057 rxon->channel = csa->channel;
1058 priv->staging_rxon.channel = csa->channel;
1059 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1060 le16_to_cpu(csa->channel));
1061 } else
1062 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1063 le16_to_cpu(csa->channel));
1064
1065 priv->switch_rxon.switch_in_progress = false;
1066 }
8ccde88a
SO		 1067}
1068EXPORT_SYMBOL(iwl_rx_csa);
1069
1070#ifdef CONFIG_IWLWIFI_DEBUG
a643565e 1071void iwl_print_rx_config_cmd(struct iwl_priv *priv)
8ccde88a
SO		 1072{
1073 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1074
e1623446 1075 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1076 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1077 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1078 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1079 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1080 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1081 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1082 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1083 rxon->ofdm_basic_rates);
e1623446
TW		 1084 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1085 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1086 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1087 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1088}
a643565e 1089EXPORT_SYMBOL(iwl_print_rx_config_cmd);
6686d17e 1090#endif
8ccde88a
SO		 1091/**
1092 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1093 */
1094void iwl_irq_handle_error(struct iwl_priv *priv)
1095{
1096 /* Set the FW error flag -- cleared on iwl_down */
1097 set_bit(STATUS_FW_ERROR, &priv->status);
1098
1099 /* Cancel currently queued command. */
1100 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1101
3a3ff72c 1102 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG		 1103 if (priv->cfg->ops->lib->dump_csr)
1104 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG		 1105 if (priv->cfg->ops->lib->dump_fh)
1106 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 1107 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 1108#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 1109 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
8ccde88a 1110 iwl_print_rx_config_cmd(priv);
8ccde88a
SO		 1111#endif
1112
1113 wake_up_interruptible(&priv->wait_command_queue);
1114
1115 /* Keep the restart process from trying to send host
1116 * commands by clearing the INIT status bit */
1117 clear_bit(STATUS_READY, &priv->status);
1118
1119 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1120 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1121 "Restarting adapter due to uCode error.\n");
1122
8ccde88a
SO		 1123 if (priv->cfg->mod_params->restart_fw)
1124 queue_work(priv->workqueue, &priv->restart);
1125 }
1126}
1127EXPORT_SYMBOL(iwl_irq_handle_error);
1128
f8e200de 1129static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 1130{
5220af0c 1131 int ret = 0;
d68b603c 1132
5220af0c 1133 /* stop device's busmaster DMA activity */
d68b603c
AK		 1134 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1135
5220af0c 1136 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 1137 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC		 1138 if (ret)
1139 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 1140
d68b603c
AK		 1141 IWL_DEBUG_INFO(priv, "stop master\n");
1142
5220af0c 1143 return ret;
d68b603c 1144}
d68b603c
AK		 1145
1146void iwl_apm_stop(struct iwl_priv *priv)
1147{
fadb3582
BC		 1148 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1149
5220af0c 1150 /* Stop device's DMA activity */
d68b603c
AK		 1151 iwl_apm_stop_master(priv);
1152
5220af0c 1153 /* Reset the entire device */
d68b603c
AK		 1154 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1155
1156 udelay(10);
5220af0c
BC		 1157
1158 /*
1159 * Clear "initialization complete" bit to move adapter from
1160 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1161 */
d68b603c 1162 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c
AK		 1163}
1164EXPORT_SYMBOL(iwl_apm_stop);
1165
fadb3582
BC		 1166
1167/*
1168 * Start up NIC's basic functionality after it has been reset
1169 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1170 * NOTE: This does not load uCode nor start the embedded processor
1171 */
1172int iwl_apm_init(struct iwl_priv *priv)
1173{
1174 int ret = 0;
1175 u16 lctl;
1176
1177 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1178
1179 /*
1180 * Use "set_bit" below rather than "write", to preserve any hardware
1181 * bits already set by default after reset.
1182 */
1183
1184 /* Disable L0S exit timer (platform NMI Work/Around) */
1185 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1186 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1187
1188 /*
1189 * Disable L0s without affecting L1;
1190 * don't wait for ICH L0s (ICH bug W/A)
1191 */
1192 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1193 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1194
1195 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1196 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1197
1198 /*
1199 * Enable HAP INTA (interrupt from management bus) to
1200 * wake device's PCI Express link L1a -> L0s
1201 * NOTE: This is no-op for 3945 (non-existant bit)
1202 */
1203 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1204 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1205
1206 /*
a6c5c731
BC		 1207 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1208 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1209 * If so (likely), disable L0S, so device moves directly L0->L1;
1210 * costs negligible amount of power savings.
1211 * If not (unlikely), enable L0S, so there is at least some
1212 * power savings, even without L1.
fadb3582
BC		 1213 */
1214 if (priv->cfg->set_l0s) {
1215 lctl = iwl_pcie_link_ctl(priv);
1216 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1217 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1218 /* L1-ASPM enabled; disable(!) L0S */
1219 iwl_set_bit(priv, CSR_GIO_REG,
1220 CSR_GIO_REG_VAL_L0S_ENABLED);
1221 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1222 } else {
1223 /* L1-ASPM disabled; enable(!) L0S */
1224 iwl_clear_bit(priv, CSR_GIO_REG,
1225 CSR_GIO_REG_VAL_L0S_ENABLED);
1226 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1227 }
1228 }
1229
1230 /* Configure analog phase-lock-loop before activating to D0A */
1231 if (priv->cfg->pll_cfg_val)
1232 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1233
1234 /*
1235 * Set "initialization complete" bit to move adapter from
1236 * D0U* --> D0A* (powered-up active) state.
1237 */
1238 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1239
1240 /*
1241 * Wait for clock stabilization; once stabilized, access to
1242 * device-internal resources is supported, e.g. iwl_write_prph()
1243 * and accesses to uCode SRAM.
1244 */
1245 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1246 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1247 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1248 if (ret < 0) {
1249 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1250 goto out;
1251 }
1252
1253 /*
1254 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1255 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1256 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1257 * and don't need BSM to restore data after power-saving sleep.
1258 *
1259 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1260 * do not disable clocks. This preserves any hardware bits already
1261 * set by default in "CLK_CTRL_REG" after reset.
1262 */
1263 if (priv->cfg->use_bsm)
1264 iwl_write_prph(priv, APMG_CLK_EN_REG,
1265 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1266 else
1267 iwl_write_prph(priv, APMG_CLK_EN_REG,
1268 APMG_CLK_VAL_DMA_CLK_RQT);
1269 udelay(20);
1270
1271 /* Disable L1-Active */
1272 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1273 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1274
1275out:
1276 return ret;
1277}
1278EXPORT_SYMBOL(iwl_apm_init);
1279
1280
1281
8ccde88a
SO		 1282void iwl_configure_filter(struct ieee80211_hw *hw,
1283 unsigned int changed_flags,
1284 unsigned int *total_flags,
3ac64bee 1285 u64 multicast)
8ccde88a
SO		 1286{
1287 struct iwl_priv *priv = hw->priv;
1288 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1289
e1623446 1290 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
8ccde88a
SO		 1291 changed_flags, *total_flags);
1292
1293 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1294 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1295 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1296 else
1297 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1298 }
1299 if (changed_flags & FIF_ALLMULTI) {
1300 if (*total_flags & FIF_ALLMULTI)
1301 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1302 else
1303 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1304 }
1305 if (changed_flags & FIF_CONTROL) {
1306 if (*total_flags & FIF_CONTROL)
1307 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1308 else
1309 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1310 }
1311 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1312 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1313 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1314 else
1315 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1316 }
1317
1318 /* We avoid iwl_commit_rxon here to commit the new filter flags
1319 * since mac80211 will call ieee80211_hw_config immediately.
1320 * (mc_list is not supported at this time). Otherwise, we need to
1321 * queue a background iwl_commit_rxon work.
1322 */
1323
1324 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1325 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1326}
1327EXPORT_SYMBOL(iwl_configure_filter);
1328
da154e30
RR		 1329int iwl_set_hw_params(struct iwl_priv *priv)
1330{
da154e30
RR		 1331 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1332 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1333 if (priv->cfg->mod_params->amsdu_size_8K)
2f301227 1334 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
da154e30 1335 else
2f301227 1336 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
da154e30 1337
2c2f3b33
TW		 1338 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1339
49779293
RR		 1340 if (priv->cfg->mod_params->disable_11n)
1341 priv->cfg->sku &= ~IWL_SKU_N;
1342
da154e30
RR		 1343 /* Device-specific setup */
1344 return priv->cfg->ops->lib->set_hw_params(priv);
1345}
1346EXPORT_SYMBOL(iwl_set_hw_params);
6ba87956 1347
630fe9b6
TW		 1348int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1349{
1350 int ret = 0;
5eadd94b
WYG		 1351 s8 prev_tx_power = priv->tx_power_user_lmt;
1352
b744cb79
WYG		 1353 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1354 IWL_WARN(priv,
1355 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1356 tx_power,
b744cb79 1357 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1358 return -EINVAL;
1359 }
1360
dc1b0973 1361 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1362 IWL_WARN(priv,
1363 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1364 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1365 return -EINVAL;
1366 }
1367
1368 if (priv->tx_power_user_lmt != tx_power)
1369 force = true;
1370
019fb97d 1371 /* if nic is not up don't send command */
5eadd94b
WYG		 1372 if (iwl_is_ready_rf(priv)) {
1373 priv->tx_power_user_lmt = tx_power;
1374 if (force && priv->cfg->ops->lib->send_tx_power)
1375 ret = priv->cfg->ops->lib->send_tx_power(priv);
1376 else if (!priv->cfg->ops->lib->send_tx_power)
1377 ret = -EOPNOTSUPP;
1378 /*
1379 * if fail to set tx_power, restore the orig. tx power
1380 */
1381 if (ret)
1382 priv->tx_power_user_lmt = prev_tx_power;
1383 }
630fe9b6 1384
5eadd94b
WYG		 1385 /*
1386 * Even this is an async host command, the command
1387 * will always report success from uCode
1388 * So once driver can placing the command into the queue
1389 * successfully, driver can use priv->tx_power_user_lmt
1390 * to reflect the current tx power
1391 */
630fe9b6
TW		 1392 return ret;
1393}
1394EXPORT_SYMBOL(iwl_set_tx_power);
1395
ef850d7c 1396irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK		 1397{
1398 struct iwl_priv *priv = data;
1399 u32 inta, inta_mask;
1400 u32 inta_fh;
6e8cc38d 1401 unsigned long flags;
f17d08a6
AK		 1402 if (!priv)
1403 return IRQ_NONE;
1404
6e8cc38d 1405 spin_lock_irqsave(&priv->lock, flags);
f17d08a6
AK		 1406
1407 /* Disable (but don't clear!) interrupts here to avoid
1408 * back-to-back ISRs and sporadic interrupts from our NIC.
1409 * If we have something to service, the tasklet will re-enable ints.
1410 * If we *don't* have something, we'll re-enable before leaving here. */
1411 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1412 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1413
1414 /* Discover which interrupts are active/pending */
1415 inta = iwl_read32(priv, CSR_INT);
1416 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1417
1418 /* Ignore interrupt if there's nothing in NIC to service.
1419 * This may be due to IRQ shared with another device,
1420 * or due to sporadic interrupts thrown from our NIC. */
1421 if (!inta && !inta_fh) {
1422 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1423 goto none;
1424 }
1425
1426 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1427 /* Hardware disappeared. It might have already raised
1428 * an interrupt */
1429 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1430 goto unplugged;
1431 }
1432
1433 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1434 inta, inta_mask, inta_fh);
1435
1436 inta &= ~CSR_INT_BIT_SCD;
1437
1438 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1439 if (likely(inta || inta_fh))
1440 tasklet_schedule(&priv->irq_tasklet);
1441
1442 unplugged:
6e8cc38d 1443 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1444 return IRQ_HANDLED;
1445
1446 none:
1447 /* re-enable interrupts here since we don't have anything to service. */
1448 /* only Re-enable if diabled by irq */
1449 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1450 iwl_enable_interrupts(priv);
6e8cc38d 1451 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1452 return IRQ_NONE;
1453}
ef850d7c 1454EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1455
65b52bde 1456void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO		 1457{
1458 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG		 1459 .lead_time = BT_LEAD_TIME_DEF,
1460 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO		 1461 .kill_ack_mask = 0,
1462 .kill_cts_mask = 0,
1463 };
1464
06702a73
WYG		 1465 if (!bt_coex_active)
1466 bt_cmd.flags = BT_COEX_DISABLE;
1467 else
1468 bt_cmd.flags = BT_COEX_ENABLE;
1469
1470 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1471 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1472
65b52bde
JB		 1473 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1474 sizeof(struct iwl_bt_cmd), &bt_cmd))
1475 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd
SO		 1476}
1477EXPORT_SYMBOL(iwl_send_bt_config);
1478
ef8d5529 1479int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1480{
ef8d5529
WYG		 1481 struct iwl_statistics_cmd statistics_cmd = {
1482 .configuration_flags =
1483 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1484 };
ef8d5529
WYG		 1485
1486 if (flags & CMD_ASYNC)
1487 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1488 sizeof(struct iwl_statistics_cmd),
1489 &statistics_cmd, NULL);
1490 else
1491 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1492 sizeof(struct iwl_statistics_cmd),
1493 &statistics_cmd);
49ea8596
EG		 1494}
1495EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1496
b0692f2f
EG		 1497/**
1498 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1499 * using sample data 100 bytes apart. If these sample points are good,
1500 * it's a pretty good bet that everything between them is good, too.
1501 */
1502static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1503{
1504 u32 val;
1505 int ret = 0;
1506 u32 errcnt = 0;
1507 u32 i;
1508
e1623446 1509 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 1510
b0692f2f
EG		 1511 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1512 /* read data comes through single port, auto-incr addr */
1513 /* NOTE: Use the debugless read so we don't flood kernel log
1514 * if IWL_DL_IO is set */
1515 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 1516 i + IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1517 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1518 if (val != le32_to_cpu(*image)) {
1519 ret = -EIO;
1520 errcnt++;
1521 if (errcnt >= 3)
1522 break;
1523 }
1524 }
1525
b0692f2f
EG		 1526 return ret;
1527}
1528
1529/**
1530 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1531 * looking at all data.
1532 */
1533static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1534 u32 len)
1535{
1536 u32 val;
1537 u32 save_len = len;
1538 int ret = 0;
1539 u32 errcnt;
1540
e1623446 1541 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 1542
250bdd21
SO		 1543 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1544 IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1545
1546 errcnt = 0;
1547 for (; len > 0; len -= sizeof(u32), image++) {
1548 /* read data comes through single port, auto-incr addr */
1549 /* NOTE: Use the debugless read so we don't flood kernel log
1550 * if IWL_DL_IO is set */
1551 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1552 if (val != le32_to_cpu(*image)) {
15b1687c 1553 IWL_ERR(priv, "uCode INST section is invalid at "
b0692f2f
EG		 1554 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1555 save_len - len, val, le32_to_cpu(*image));
1556 ret = -EIO;
1557 errcnt++;
1558 if (errcnt >= 20)
1559 break;
1560 }
1561 }
1562
b0692f2f 1563 if (!errcnt)
e1623446
TW		 1564 IWL_DEBUG_INFO(priv,
1565 "ucode image in INSTRUCTION memory is good\n");
b0692f2f
EG		 1566
1567 return ret;
1568}
1569
1570/**
1571 * iwl_verify_ucode - determine which instruction image is in SRAM,
1572 * and verify its contents
1573 */
1574int iwl_verify_ucode(struct iwl_priv *priv)
1575{
1576 __le32 *image;
1577 u32 len;
1578 int ret;
1579
1580 /* Try bootstrap */
1581 image = (__le32 *)priv->ucode_boot.v_addr;
1582 len = priv->ucode_boot.len;
1583 ret = iwlcore_verify_inst_sparse(priv, image, len);
1584 if (!ret) {
e1623446 1585 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b0692f2f
EG		 1586 return 0;
1587 }
1588
1589 /* Try initialize */
1590 image = (__le32 *)priv->ucode_init.v_addr;
1591 len = priv->ucode_init.len;
1592 ret = iwlcore_verify_inst_sparse(priv, image, len);
1593 if (!ret) {
e1623446 1594 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b0692f2f
EG		 1595 return 0;
1596 }
1597
1598 /* Try runtime/protocol */
1599 image = (__le32 *)priv->ucode_code.v_addr;
1600 len = priv->ucode_code.len;
1601 ret = iwlcore_verify_inst_sparse(priv, image, len);
1602 if (!ret) {
e1623446 1603 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b0692f2f
EG		 1604 return 0;
1605 }
1606
15b1687c 1607 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b0692f2f
EG		 1608
1609 /* Since nothing seems to match, show first several data entries in
1610 * instruction SRAM, so maybe visual inspection will give a clue.
1611 * Selection of bootstrap image (vs. other images) is arbitrary. */
1612 image = (__le32 *)priv->ucode_boot.v_addr;
1613 len = priv->ucode_boot.len;
1614 ret = iwl_verify_inst_full(priv, image, len);
1615
1616 return ret;
1617}
1618EXPORT_SYMBOL(iwl_verify_ucode);
1619
56e12615 1620
47f4a587
EG		 1621void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1622{
1623 struct iwl_ct_kill_config cmd;
672639de 1624 struct iwl_ct_kill_throttling_config adv_cmd;
47f4a587
EG		 1625 unsigned long flags;
1626 int ret = 0;
1627
1628 spin_lock_irqsave(&priv->lock, flags);
1629 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1630 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1631 spin_unlock_irqrestore(&priv->lock, flags);
3ad3b92a 1632 priv->thermal_throttle.ct_kill_toggle = false;
47f4a587 1633
480e8407 1634 if (priv->cfg->support_ct_kill_exit) {
672639de
WYG		 1635 adv_cmd.critical_temperature_enter =
1636 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1637 adv_cmd.critical_temperature_exit =
1638 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
1639
1640 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1641 sizeof(adv_cmd), &adv_cmd);
d91b1ba3
WYG		 1642 if (ret)
1643 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1644 else
1645 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1646 "succeeded, "
1647 "critical temperature enter is %d,"
1648 "exit is %d\n",
1649 priv->hw_params.ct_kill_threshold,
1650 priv->hw_params.ct_kill_exit_threshold);
480e8407 1651 } else {
672639de
WYG		 1652 cmd.critical_temperature_R =
1653 cpu_to_le32(priv->hw_params.ct_kill_threshold);
189a2b59 1654
672639de
WYG		 1655 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1656 sizeof(cmd), &cmd);
d91b1ba3
WYG		 1657 if (ret)
1658 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1659 else
1660 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1661 "succeeded, "
1662 "critical temperature is %d\n",
1663 priv->hw_params.ct_kill_threshold);
672639de 1664 }
47f4a587
EG		 1665}
1666EXPORT_SYMBOL(iwl_rf_kill_ct_config);
14a08a7f 1667
0ad91a35 1668
14a08a7f
EG		 1669/*
1670 * CARD_STATE_CMD
1671 *
1672 * Use: Sets the device's internal card state to enable, disable, or halt
1673 *
1674 * When in the 'enable' state the card operates as normal.
1675 * When in the 'disable' state, the card enters into a low power mode.
1676 * When in the 'halt' state, the card is shut down and must be fully
1677 * restarted to come back on.
1678 */
c496294e 1679int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
14a08a7f
EG		 1680{
1681 struct iwl_host_cmd cmd = {
1682 .id = REPLY_CARD_STATE_CMD,
1683 .len = sizeof(u32),
1684 .data = &flags,
c2acea8e 1685 .flags = meta_flag,
14a08a7f
EG		 1686 };
1687
1688 return iwl_send_cmd(priv, &cmd);
1689}
1690
030f05ed
AK		 1691void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1692 struct iwl_rx_mem_buffer *rxb)
1693{
1694#ifdef CONFIG_IWLWIFI_DEBUG
2f301227 1695 struct iwl_rx_packet *pkt = rxb_addr(rxb);
030f05ed
AK		 1696 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1697 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1698 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1699#endif
1700}
1701EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1702
1703void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1704 struct iwl_rx_mem_buffer *rxb)
1705{
2f301227 1706 struct iwl_rx_packet *pkt = rxb_addr(rxb);
396887a2 1707 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 1708 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 1709 "notification for %s:\n", len,
1710 get_cmd_string(pkt->hdr.cmd));
1711 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 1712}
1713EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 1714
1715void iwl_rx_reply_error(struct iwl_priv *priv,
1716 struct iwl_rx_mem_buffer *rxb)
1717{
2f301227 1718 struct iwl_rx_packet *pkt = rxb_addr(rxb);
261b9c33
AK		 1719
1720 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1721 "seq 0x%04X ser 0x%08X\n",
1722 le32_to_cpu(pkt->u.err_resp.error_type),
1723 get_cmd_string(pkt->u.err_resp.cmd_id),
1724 pkt->u.err_resp.cmd_id,
1725 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1726 le32_to_cpu(pkt->u.err_resp.error_info));
1727}
1728EXPORT_SYMBOL(iwl_rx_reply_error);
1729
a83b9141
WYG		 1730void iwl_clear_isr_stats(struct iwl_priv *priv)
1731{
1732 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1733}
a83b9141 1734
488829f1
AK		 1735int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1736 const struct ieee80211_tx_queue_params *params)
1737{
1738 struct iwl_priv *priv = hw->priv;
1739 unsigned long flags;
1740 int q;
1741
1742 IWL_DEBUG_MAC80211(priv, "enter\n");
1743
1744 if (!iwl_is_ready_rf(priv)) {
1745 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1746 return -EIO;
1747 }
1748
1749 if (queue >= AC_NUM) {
1750 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1751 return 0;
1752 }
1753
1754 q = AC_NUM - 1 - queue;
1755
1756 spin_lock_irqsave(&priv->lock, flags);
1757
1758 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
1759 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
1760 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1761 priv->qos_data.def_qos_parm.ac[q].edca_txop =
1762 cpu_to_le16((params->txop * 32));
1763
1764 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
488829f1
AK		 1765
1766 spin_unlock_irqrestore(&priv->lock, flags);
1767
1768 IWL_DEBUG_MAC80211(priv, "leave\n");
1769 return 0;
1770}
1771EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b
AK		 1772
1773static void iwl_ht_conf(struct iwl_priv *priv,
02bb1bea 1774 struct ieee80211_bss_conf *bss_conf)
5bbe233b 1775{
fad95bf5 1776 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
5bbe233b
AK		 1777 struct ieee80211_sta *sta;
1778
91dd6c27 1779 IWL_DEBUG_MAC80211(priv, "enter:\n");
5bbe233b 1780
fad95bf5 1781 if (!ht_conf->is_ht)
5bbe233b
AK		 1782 return;
1783
fad95bf5 1784 ht_conf->ht_protection =
9ed6bcce 1785 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
fad95bf5 1786 ht_conf->non_GF_STA_present =
9ed6bcce 1787 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b 1788
02bb1bea
JB		 1789 ht_conf->single_chain_sufficient = false;
1790
1791 switch (priv->iw_mode) {
1792 case NL80211_IFTYPE_STATION:
1793 rcu_read_lock();
5ed176e1 1794 sta = ieee80211_find_sta(priv->vif, priv->bssid);
02bb1bea
JB		 1795 if (sta) {
1796 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
1797 int maxstreams;
1798
1799 maxstreams = (ht_cap->mcs.tx_params &
1800 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
1801 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1802 maxstreams += 1;
1803
1804 if ((ht_cap->mcs.rx_mask[1] == 0) &&
1805 (ht_cap->mcs.rx_mask[2] == 0))
1806 ht_conf->single_chain_sufficient = true;
1807 if (maxstreams <= 1)
1808 ht_conf->single_chain_sufficient = true;
1809 } else {
1810 /*
1811 * If at all, this can only happen through a race
1812 * when the AP disconnects us while we're still
1813 * setting up the connection, in that case mac80211
1814 * will soon tell us about that.
1815 */
1816 ht_conf->single_chain_sufficient = true;
1817 }
1818 rcu_read_unlock();
1819 break;
1820 case NL80211_IFTYPE_ADHOC:
1821 ht_conf->single_chain_sufficient = true;
1822 break;
1823 default:
1824 break;
1825 }
5bbe233b
AK		 1826
1827 IWL_DEBUG_MAC80211(priv, "leave\n");
1828}
1829
c91c3efc
AK		 1830static inline void iwl_set_no_assoc(struct iwl_priv *priv)
1831{
1832 priv->assoc_id = 0;
1833 iwl_led_disassociate(priv);
1834 /*
1835 * inform the ucode that there is no longer an
1836 * association and that no more packets should be
1837 * sent
1838 */
1839 priv->staging_rxon.filter_flags &=
1840 ~RXON_FILTER_ASSOC_MSK;
1841 priv->staging_rxon.assoc_id = 0;
1842 iwlcore_commit_rxon(priv);
1843}
1844
5bbe233b 1845void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 1846 struct ieee80211_vif *vif,
1847 struct ieee80211_bss_conf *bss_conf,
1848 u32 changes)
5bbe233b
AK		 1849{
1850 struct iwl_priv *priv = hw->priv;
3a650292 1851 int ret;
5bbe233b
AK		 1852
1853 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
1854
2d0ddec5
JB		 1855 if (!iwl_is_alive(priv))
1856 return;
1857
1858 mutex_lock(&priv->mutex);
1859
1860 if (changes & BSS_CHANGED_BEACON &&
1861 priv->iw_mode == NL80211_IFTYPE_AP) {
1862 dev_kfree_skb(priv->ibss_beacon);
1863 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
1864 }
1865
d7129e19
JB		 1866 if (changes & BSS_CHANGED_BEACON_INT) {
1867 priv->beacon_int = bss_conf->beacon_int;
1868 /* TODO: in AP mode, do something to make this take effect */
1869 }
1870
1871 if (changes & BSS_CHANGED_BSSID) {
1872 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
1873
1874 /*
1875 * If there is currently a HW scan going on in the
1876 * background then we need to cancel it else the RXON
1877 * below/in post_associate will fail.
1878 */
2d0ddec5 1879 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 1880 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB		 1881 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
1882 mutex_unlock(&priv->mutex);
1883 return;
1884 }
2d0ddec5 1885
d7129e19
JB		 1886 /* mac80211 only sets assoc when in STATION mode */
1887 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
1888 bss_conf->assoc) {
1889 memcpy(priv->staging_rxon.bssid_addr,
1890 bss_conf->bssid, ETH_ALEN);
2d0ddec5 1891
d7129e19
JB		 1892 /* currently needed in a few places */
1893 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1894 } else {
1895 priv->staging_rxon.filter_flags &=
1896 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 1897 }
d7129e19 1898
2d0ddec5
JB		 1899 }
1900
d7129e19
JB		 1901 /*
1902 * This needs to be after setting the BSSID in case
1903 * mac80211 decides to do both changes at once because
1904 * it will invoke post_associate.
1905 */
2d0ddec5
JB		 1906 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
1907 changes & BSS_CHANGED_BEACON) {
1908 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1909
1910 if (beacon)
1911 iwl_mac_beacon_update(hw, beacon);
1912 }
1913
5bbe233b
AK		 1914 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1915 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
1916 bss_conf->use_short_preamble);
1917 if (bss_conf->use_short_preamble)
1918 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1919 else
1920 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1921 }
1922
1923 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
1924 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
1925 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
1926 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
1927 else
1928 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
1929 }
1930
d7129e19
JB		 1931 if (changes & BSS_CHANGED_BASIC_RATES) {
1932 /* XXX use this information
1933 *
1934 * To do that, remove code from iwl_set_rate() and put something
1935 * like this here:
1936 *
1937 if (A-band)
1938 priv->staging_rxon.ofdm_basic_rates =
1939 bss_conf->basic_rates;
1940 else
1941 priv->staging_rxon.ofdm_basic_rates =
1942 bss_conf->basic_rates >> 4;
1943 priv->staging_rxon.cck_basic_rates =
1944 bss_conf->basic_rates & 0xF;
1945 */
1946 }
1947
5bbe233b
AK		 1948 if (changes & BSS_CHANGED_HT) {
1949 iwl_ht_conf(priv, bss_conf);
45823531
AK		 1950
1951 if (priv->cfg->ops->hcmd->set_rxon_chain)
1952 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK		 1953 }
1954
1955 if (changes & BSS_CHANGED_ASSOC) {
1956 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b
AK		 1957 if (bss_conf->assoc) {
1958 priv->assoc_id = bss_conf->aid;
1959 priv->beacon_int = bss_conf->beacon_int;
5bbe233b
AK		 1960 priv->timestamp = bss_conf->timestamp;
1961 priv->assoc_capability = bss_conf->assoc_capability;
1962
e932a609
JB		 1963 iwl_led_associate(priv);
1964
d7129e19
JB		 1965 if (!iwl_is_rfkill(priv))
1966 priv->cfg->ops->lib->post_associate(priv);
c91c3efc
AK		 1967 } else
1968 iwl_set_no_assoc(priv);
d7129e19
JB		 1969 }
1970
1971 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
1972 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
1973 changes);
1974 ret = iwl_send_rxon_assoc(priv);
1975 if (!ret) {
1976 /* Sync active_rxon with latest change. */
1977 memcpy((void *)&priv->active_rxon,
1978 &priv->staging_rxon,
1979 sizeof(struct iwl_rxon_cmd));
5bbe233b 1980 }
5bbe233b 1981 }
d7129e19 1982
c91c3efc
AK		 1983 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1984 if (vif->bss_conf.enable_beacon) {
1985 memcpy(priv->staging_rxon.bssid_addr,
1986 bss_conf->bssid, ETH_ALEN);
1987 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1988 iwlcore_config_ap(priv);
1989 } else
1990 iwl_set_no_assoc(priv);
f513dfff
DH		 1991 }
1992
d7129e19
JB		 1993 mutex_unlock(&priv->mutex);
1994
2d0ddec5 1995 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 1996}
1997EXPORT_SYMBOL(iwl_bss_info_changed);
1998
9944b938
AK		 1999int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2000{
2001 struct iwl_priv *priv = hw->priv;
2002 unsigned long flags;
2003 __le64 timestamp;
2004
2005 IWL_DEBUG_MAC80211(priv, "enter\n");
2006
2007 if (!iwl_is_ready_rf(priv)) {
2008 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2009 return -EIO;
2010 }
2011
9944b938
AK		 2012 spin_lock_irqsave(&priv->lock, flags);
2013
2014 if (priv->ibss_beacon)
2015 dev_kfree_skb(priv->ibss_beacon);
2016
2017 priv->ibss_beacon = skb;
2018
2019 priv->assoc_id = 0;
2020 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2021 priv->timestamp = le64_to_cpu(timestamp);
2022
2023 IWL_DEBUG_MAC80211(priv, "leave\n");
2024 spin_unlock_irqrestore(&priv->lock, flags);
2025
9944b938
AK		 2026 priv->cfg->ops->lib->post_associate(priv);
2027
9944b938
AK		 2028 return 0;
2029}
2030EXPORT_SYMBOL(iwl_mac_beacon_update);
2031
b55e75ed 2032static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
727882d6 2033{
b55e75ed 2034 iwl_connection_init_rx_config(priv, vif->type);
727882d6
AK		 2035
2036 if (priv->cfg->ops->hcmd->set_rxon_chain)
2037 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2038
2039 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2040
b55e75ed 2041 return iwlcore_commit_rxon(priv);
727882d6 2042}
727882d6 2043
b55e75ed 2044int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK		 2045{
2046 struct iwl_priv *priv = hw->priv;
47e28f41 2047 int err = 0;
cbb6ab94 2048
1ed32e4f 2049 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type);
cbb6ab94 2050
47e28f41
JB		 2051 mutex_lock(&priv->mutex);
2052
b55e75ed
JB		 2053 if (WARN_ON(!iwl_is_ready_rf(priv))) {
2054 err = -EINVAL;
2055 goto out;
2056 }
2057
cbb6ab94
AK		 2058 if (priv->vif) {
2059 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
47e28f41
JB		 2060 err = -EOPNOTSUPP;
2061 goto out;
cbb6ab94
AK		 2062 }
2063
1ed32e4f
JB		 2064 priv->vif = vif;
2065 priv->iw_mode = vif->type;
cbb6ab94 2066
b55e75ed
JB		 2067 IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr);
2068 memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
cbb6ab94 2069
b55e75ed
JB		 2070 err = iwl_set_mode(priv, vif);
2071 if (err)
2072 goto out_err;
7e246191
RC		 2073
2074 /* Add the broadcast address so we can send broadcast frames */
2075 priv->cfg->ops->lib->add_bcast_station(priv);
2076
b55e75ed 2077 goto out;
cbb6ab94 2078
b55e75ed
JB		 2079 out_err:
2080 priv->vif = NULL;
2081 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 2082 out:
cbb6ab94
AK		 2083 mutex_unlock(&priv->mutex);
2084
2085 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 2086 return err;
cbb6ab94
AK		 2087}
2088EXPORT_SYMBOL(iwl_mac_add_interface);
2089
d8052319 2090void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b55e75ed 2091 struct ieee80211_vif *vif)
d8052319
AK		 2092{
2093 struct iwl_priv *priv = hw->priv;
2094
2095 IWL_DEBUG_MAC80211(priv, "enter\n");
2096
2097 mutex_lock(&priv->mutex);
2098
7e246191
RC		 2099 iwl_clear_ucode_stations(priv, true);
2100
d8052319
AK		 2101 if (iwl_is_ready_rf(priv)) {
2102 iwl_scan_cancel_timeout(priv, 100);
2103 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2104 iwlcore_commit_rxon(priv);
2105 }
1ed32e4f 2106 if (priv->vif == vif) {
d8052319
AK		 2107 priv->vif = NULL;
2108 memset(priv->bssid, 0, ETH_ALEN);
2109 }
2110 mutex_unlock(&priv->mutex);
2111
2112 IWL_DEBUG_MAC80211(priv, "leave\n");
2113
2114}
2115EXPORT_SYMBOL(iwl_mac_remove_interface);
2116
4808368d
AK		 2117/**
2118 * iwl_mac_config - mac80211 config callback
2119 *
2120 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2121 * be set inappropriately and the driver currently sets the hardware up to
2122 * use it whenever needed.
2123 */
2124int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2125{
2126 struct iwl_priv *priv = hw->priv;
2127 const struct iwl_channel_info *ch_info;
2128 struct ieee80211_conf *conf = &hw->conf;
fad95bf5 2129 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
4808368d
AK		 2130 unsigned long flags = 0;
2131 int ret = 0;
2132 u16 ch;
2133 int scan_active = 0;
2134
2135 mutex_lock(&priv->mutex);
2136
4808368d
AK		 2137 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2138 conf->channel->hw_value, changed);
2139
2140 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2141 test_bit(STATUS_SCANNING, &priv->status))) {
2142 scan_active = 1;
2143 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2144 }
2145
ba37a3d0
JB		 2146 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2147 IEEE80211_CONF_CHANGE_CHANNEL)) {
2148 /* mac80211 uses static for non-HT which is what we want */
2149 priv->current_ht_config.smps = conf->smps_mode;
2150
2151 /*
2152 * Recalculate chain counts.
2153 *
2154 * If monitor mode is enabled then mac80211 will
2155 * set up the SM PS mode to OFF if an HT channel is
2156 * configured.
2157 */
2158 if (priv->cfg->ops->hcmd->set_rxon_chain)
2159 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2160 }
4808368d
AK		 2161
2162 /* during scanning mac80211 will delay channel setting until
2163 * scan finish with changed = 0
2164 */
2165 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2166 if (scan_active)
2167 goto set_ch_out;
2168
2169 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2170 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2171 if (!is_channel_valid(ch_info)) {
2172 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2173 ret = -EINVAL;
2174 goto set_ch_out;
2175 }
2176
4808368d
AK		 2177 spin_lock_irqsave(&priv->lock, flags);
2178
28bd723b
DH		 2179 /* Configure HT40 channels */
2180 ht_conf->is_ht = conf_is_ht(conf);
2181 if (ht_conf->is_ht) {
2182 if (conf_is_ht40_minus(conf)) {
2183 ht_conf->extension_chan_offset =
2184 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
c812ee24 2185 ht_conf->is_40mhz = true;
28bd723b
DH		 2186 } else if (conf_is_ht40_plus(conf)) {
2187 ht_conf->extension_chan_offset =
2188 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
c812ee24 2189 ht_conf->is_40mhz = true;
28bd723b
DH		 2190 } else {
2191 ht_conf->extension_chan_offset =
2192 IEEE80211_HT_PARAM_CHA_SEC_NONE;
c812ee24 2193 ht_conf->is_40mhz = false;
28bd723b
DH		 2194 }
2195 } else
c812ee24 2196 ht_conf->is_40mhz = false;
28bd723b
DH		 2197 /* Default to no protection. Protection mode will later be set
2198 * from BSS config in iwl_ht_conf */
2199 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
4808368d
AK		 2200
2201 /* if we are switching from ht to 2.4 clear flags
2202 * from any ht related info since 2.4 does not
2203 * support ht */
2204 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2205 priv->staging_rxon.flags = 0;
2206
2207 iwl_set_rxon_channel(priv, conf->channel);
5e2f75b8 2208 iwl_set_rxon_ht(priv, ht_conf);
4808368d
AK		 2209
2210 iwl_set_flags_for_band(priv, conf->channel->band);
2211 spin_unlock_irqrestore(&priv->lock, flags);
0924e519
WYG		 2212 if (iwl_is_associated(priv) &&
2213 (le16_to_cpu(priv->active_rxon.channel) != ch) &&
2214 priv->cfg->ops->lib->set_channel_switch) {
2215 iwl_set_rate(priv);
2216 /*
2217 * at this point, staging_rxon has the
2218 * configuration for channel switch
2219 */
2220 ret = priv->cfg->ops->lib->set_channel_switch(priv,
2221 ch);
2222 if (!ret) {
2223 iwl_print_rx_config_cmd(priv);
2224 goto out;
2225 }
2226 priv->switch_rxon.switch_in_progress = false;
2227 }
4808368d
AK		 2228 set_ch_out:
2229 /* The list of supported rates and rate mask can be different
2230 * for each band; since the band may have changed, reset
2231 * the rate mask to what mac80211 lists */
2232 iwl_set_rate(priv);
2233 }
2234
78f5fb7f
JB		 2235 if (changed & (IEEE80211_CONF_CHANGE_PS |
2236 IEEE80211_CONF_CHANGE_IDLE)) {
e312c24c 2237 ret = iwl_power_update_mode(priv, false);
4808368d 2238 if (ret)
e312c24c 2239 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK		 2240 }
2241
2242 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2243 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2244 priv->tx_power_user_lmt, conf->power_level);
2245
2246 iwl_set_tx_power(priv, conf->power_level, false);
2247 }
2248
e61146e3
SG		 2249 if (changed & IEEE80211_CONF_CHANGE_QOS) {
2250 bool qos_active = !!(conf->flags & IEEE80211_CONF_QOS);
2251
2252 spin_lock_irqsave(&priv->lock, flags);
2253 priv->qos_data.qos_active = qos_active;
2254 iwl_update_qos(priv);
2255 spin_unlock_irqrestore(&priv->lock, flags);
2256 }
2257
0cf4c01e
MA		 2258 if (!iwl_is_ready(priv)) {
2259 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2260 goto out;
2261 }
2262
4808368d
AK		 2263 if (scan_active)
2264 goto out;
2265
2266 if (memcmp(&priv->active_rxon,
2267 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2268 iwlcore_commit_rxon(priv);
2269 else
2270 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2271
2272
2273out:
2274 IWL_DEBUG_MAC80211(priv, "leave\n");
2275 mutex_unlock(&priv->mutex);
2276 return ret;
2277}
2278EXPORT_SYMBOL(iwl_mac_config);
2279
bd564261
AK		 2280void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2281{
2282 struct iwl_priv *priv = hw->priv;
2283 unsigned long flags;
2284
2285 mutex_lock(&priv->mutex);
2286 IWL_DEBUG_MAC80211(priv, "enter\n");
2287
2288 spin_lock_irqsave(&priv->lock, flags);
fad95bf5 2289 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
bd564261
AK		 2290 spin_unlock_irqrestore(&priv->lock, flags);
2291
bd564261
AK		 2292 spin_lock_irqsave(&priv->lock, flags);
2293 priv->assoc_id = 0;
2294 priv->assoc_capability = 0;
bd564261
AK		 2295
2296 /* new association get rid of ibss beacon skb */
2297 if (priv->ibss_beacon)
2298 dev_kfree_skb(priv->ibss_beacon);
2299
2300 priv->ibss_beacon = NULL;
2301
57c4d7b4 2302 priv->beacon_int = priv->vif->bss_conf.beacon_int;
bd564261 2303 priv->timestamp = 0;
bd564261
AK		 2304
2305 spin_unlock_irqrestore(&priv->lock, flags);
2306
2307 if (!iwl_is_ready_rf(priv)) {
2308 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2309 mutex_unlock(&priv->mutex);
2310 return;
2311 }
2312
2313 /* we are restarting association process
2314 * clear RXON_FILTER_ASSOC_MSK bit
2315 */
b4665df4
JB		 2316 iwl_scan_cancel_timeout(priv, 100);
2317 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2318 iwlcore_commit_rxon(priv);
bd564261
AK		 2319
2320 iwl_set_rate(priv);
2321
2322 mutex_unlock(&priv->mutex);
2323
2324 IWL_DEBUG_MAC80211(priv, "leave\n");
2325}
2326EXPORT_SYMBOL(iwl_mac_reset_tsf);
2327
88804e2b
WYG		 2328int iwl_alloc_txq_mem(struct iwl_priv *priv)
2329{
2330 if (!priv->txq)
2331 priv->txq = kzalloc(
2332 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2333 GFP_KERNEL);
2334 if (!priv->txq) {
91dd6c27 2335 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG		 2336 return -ENOMEM;
2337 }
2338 return 0;
2339}
2340EXPORT_SYMBOL(iwl_alloc_txq_mem);
2341
2342void iwl_free_txq_mem(struct iwl_priv *priv)
2343{
2344 kfree(priv->txq);
2345 priv->txq = NULL;
2346}
2347EXPORT_SYMBOL(iwl_free_txq_mem);
2348
1933ac4d
WYG		 2349int iwl_send_wimax_coex(struct iwl_priv *priv)
2350{
2351 struct iwl_wimax_coex_cmd uninitialized_var(coex_cmd);
2352
2353 if (priv->cfg->support_wimax_coexist) {
2354 /* UnMask wake up src at associated sleep */
2355 coex_cmd.flags |= COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
2356
2357 /* UnMask wake up src at unassociated sleep */
2358 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
2359 memcpy(coex_cmd.sta_prio, cu_priorities,
2360 sizeof(struct iwl_wimax_coex_event_entry) *
2361 COEX_NUM_OF_EVENTS);
2362
2363 /* enabling the coexistence feature */
2364 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
2365
2366 /* enabling the priorities tables */
2367 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
2368 } else {
2369 /* coexistence is disabled */
2370 memset(&coex_cmd, 0, sizeof(coex_cmd));
2371 }
2372 return iwl_send_cmd_pdu(priv, COEX_PRIORITY_TABLE_CMD,
2373 sizeof(coex_cmd), &coex_cmd);
2374}
2375EXPORT_SYMBOL(iwl_send_wimax_coex);
2376
20594eb0
WYG		 2377#ifdef CONFIG_IWLWIFI_DEBUGFS
2378
2379#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2380
2381void iwl_reset_traffic_log(struct iwl_priv *priv)
2382{
2383 priv->tx_traffic_idx = 0;
2384 priv->rx_traffic_idx = 0;
2385 if (priv->tx_traffic)
2386 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2387 if (priv->rx_traffic)
2388 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2389}
2390
2391int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2392{
2393 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2394
2395 if (iwl_debug_level & IWL_DL_TX) {
2396 if (!priv->tx_traffic) {
2397 priv->tx_traffic =
2398 kzalloc(traffic_size, GFP_KERNEL);
2399 if (!priv->tx_traffic)
2400 return -ENOMEM;
2401 }
2402 }
2403 if (iwl_debug_level & IWL_DL_RX) {
2404 if (!priv->rx_traffic) {
2405 priv->rx_traffic =
2406 kzalloc(traffic_size, GFP_KERNEL);
2407 if (!priv->rx_traffic)
2408 return -ENOMEM;
2409 }
2410 }
2411 iwl_reset_traffic_log(priv);
2412 return 0;
2413}
2414EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2415
2416void iwl_free_traffic_mem(struct iwl_priv *priv)
2417{
2418 kfree(priv->tx_traffic);
2419 priv->tx_traffic = NULL;
2420
2421 kfree(priv->rx_traffic);
2422 priv->rx_traffic = NULL;
2423}
2424EXPORT_SYMBOL(iwl_free_traffic_mem);
2425
2426void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2427 u16 length, struct ieee80211_hdr *header)
2428{
2429 __le16 fc;
2430 u16 len;
2431
2432 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2433 return;
2434
2435 if (!priv->tx_traffic)
2436 return;
2437
2438 fc = header->frame_control;
2439 if (ieee80211_is_data(fc)) {
2440 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2441 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2442 memcpy((priv->tx_traffic +
2443 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2444 header, len);
2445 priv->tx_traffic_idx =
2446 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2447 }
2448}
2449EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2450
2451void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2452 u16 length, struct ieee80211_hdr *header)
2453{
2454 __le16 fc;
2455 u16 len;
2456
2457 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2458 return;
2459
2460 if (!priv->rx_traffic)
2461 return;
2462
2463 fc = header->frame_control;
2464 if (ieee80211_is_data(fc)) {
2465 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2466 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2467 memcpy((priv->rx_traffic +
2468 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2469 header, len);
2470 priv->rx_traffic_idx =
2471 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2472 }
2473}
2474EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 2475
2476const char *get_mgmt_string(int cmd)
2477{
2478 switch (cmd) {
2479 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2480 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2481 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2482 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2483 IWL_CMD(MANAGEMENT_PROBE_REQ);
2484 IWL_CMD(MANAGEMENT_PROBE_RESP);
2485 IWL_CMD(MANAGEMENT_BEACON);
2486 IWL_CMD(MANAGEMENT_ATIM);
2487 IWL_CMD(MANAGEMENT_DISASSOC);
2488 IWL_CMD(MANAGEMENT_AUTH);
2489 IWL_CMD(MANAGEMENT_DEAUTH);
2490 IWL_CMD(MANAGEMENT_ACTION);
2491 default:
2492 return "UNKNOWN";
2493
2494 }
2495}
2496
2497const char *get_ctrl_string(int cmd)
2498{
2499 switch (cmd) {
2500 IWL_CMD(CONTROL_BACK_REQ);
2501 IWL_CMD(CONTROL_BACK);
2502 IWL_CMD(CONTROL_PSPOLL);
2503 IWL_CMD(CONTROL_RTS);
2504 IWL_CMD(CONTROL_CTS);
2505 IWL_CMD(CONTROL_ACK);
2506 IWL_CMD(CONTROL_CFEND);
2507 IWL_CMD(CONTROL_CFENDACK);
2508 default:
2509 return "UNKNOWN";
2510
2511 }
2512}
2513
7163b8a4 2514void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG		 2515{
2516 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9 2517 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
7163b8a4 2518 priv->led_tpt = 0;
22fdf3c9
WYG		 2519}
2520
2521/*
2522 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2523 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2524 * Use debugFs to display the rx/rx_statistics
2525 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2526 * information will be recorded, but DATA pkt still will be recorded
2527 * for the reason of iwl_led.c need to control the led blinking based on
2528 * number of tx and rx data.
2529 *
2530 */
2531void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2532{
2533 struct traffic_stats *stats;
2534
2535 if (is_tx)
2536 stats = &priv->tx_stats;
2537 else
2538 stats = &priv->rx_stats;
2539
2540 if (ieee80211_is_mgmt(fc)) {
2541 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2542 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2543 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2544 break;
2545 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2546 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2547 break;
2548 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2549 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2550 break;
2551 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2552 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2553 break;
2554 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2555 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2556 break;
2557 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2558 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2559 break;
2560 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2561 stats->mgmt[MANAGEMENT_BEACON]++;
2562 break;
2563 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2564 stats->mgmt[MANAGEMENT_ATIM]++;
2565 break;
2566 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2567 stats->mgmt[MANAGEMENT_DISASSOC]++;
2568 break;
2569 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2570 stats->mgmt[MANAGEMENT_AUTH]++;
2571 break;
2572 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2573 stats->mgmt[MANAGEMENT_DEAUTH]++;
2574 break;
2575 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2576 stats->mgmt[MANAGEMENT_ACTION]++;
2577 break;
2578 }
2579 } else if (ieee80211_is_ctl(fc)) {
2580 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2581 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2582 stats->ctrl[CONTROL_BACK_REQ]++;
2583 break;
2584 case cpu_to_le16(IEEE80211_STYPE_BACK):
2585 stats->ctrl[CONTROL_BACK]++;
2586 break;
2587 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2588 stats->ctrl[CONTROL_PSPOLL]++;
2589 break;
2590 case cpu_to_le16(IEEE80211_STYPE_RTS):
2591 stats->ctrl[CONTROL_RTS]++;
2592 break;
2593 case cpu_to_le16(IEEE80211_STYPE_CTS):
2594 stats->ctrl[CONTROL_CTS]++;
2595 break;
2596 case cpu_to_le16(IEEE80211_STYPE_ACK):
2597 stats->ctrl[CONTROL_ACK]++;
2598 break;
2599 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2600 stats->ctrl[CONTROL_CFEND]++;
2601 break;
2602 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2603 stats->ctrl[CONTROL_CFENDACK]++;
2604 break;
2605 }
2606 } else {
2607 /* data */
2608 stats->data_cnt++;
2609 stats->data_bytes += len;
2610 }
d5f4cf71 2611 iwl_leds_background(priv);
22fdf3c9
WYG		 2612}
2613EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 2614#endif
2615
696bdee3
WYG		 2616const static char *get_csr_string(int cmd)
2617{
2618 switch (cmd) {
2619 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2620 IWL_CMD(CSR_INT_COALESCING);
2621 IWL_CMD(CSR_INT);
2622 IWL_CMD(CSR_INT_MASK);
2623 IWL_CMD(CSR_FH_INT_STATUS);
2624 IWL_CMD(CSR_GPIO_IN);
2625 IWL_CMD(CSR_RESET);
2626 IWL_CMD(CSR_GP_CNTRL);
2627 IWL_CMD(CSR_HW_REV);
2628 IWL_CMD(CSR_EEPROM_REG);
2629 IWL_CMD(CSR_EEPROM_GP);
2630 IWL_CMD(CSR_OTP_GP_REG);
2631 IWL_CMD(CSR_GIO_REG);
2632 IWL_CMD(CSR_GP_UCODE_REG);
2633 IWL_CMD(CSR_GP_DRIVER_REG);
2634 IWL_CMD(CSR_UCODE_DRV_GP1);
2635 IWL_CMD(CSR_UCODE_DRV_GP2);
2636 IWL_CMD(CSR_LED_REG);
2637 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2638 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2639 IWL_CMD(CSR_ANA_PLL_CFG);
2640 IWL_CMD(CSR_HW_REV_WA_REG);
2641 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2642 default:
2643 return "UNKNOWN";
2644
2645 }
2646}
2647
2648void iwl_dump_csr(struct iwl_priv *priv)
2649{
2650 int i;
2651 u32 csr_tbl[] = {
2652 CSR_HW_IF_CONFIG_REG,
2653 CSR_INT_COALESCING,
2654 CSR_INT,
2655 CSR_INT_MASK,
2656 CSR_FH_INT_STATUS,
2657 CSR_GPIO_IN,
2658 CSR_RESET,
2659 CSR_GP_CNTRL,
2660 CSR_HW_REV,
2661 CSR_EEPROM_REG,
2662 CSR_EEPROM_GP,
2663 CSR_OTP_GP_REG,
2664 CSR_GIO_REG,
2665 CSR_GP_UCODE_REG,
2666 CSR_GP_DRIVER_REG,
2667 CSR_UCODE_DRV_GP1,
2668 CSR_UCODE_DRV_GP2,
2669 CSR_LED_REG,
2670 CSR_DRAM_INT_TBL_REG,
2671 CSR_GIO_CHICKEN_BITS,
2672 CSR_ANA_PLL_CFG,
2673 CSR_HW_REV_WA_REG,
2674 CSR_DBG_HPET_MEM_REG
2675 };
2676 IWL_ERR(priv, "CSR values:\n");
2677 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2678 "CSR_INT_PERIODIC_REG)\n");
2679 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2680 IWL_ERR(priv, " %25s: 0X%08x\n",
2681 get_csr_string(csr_tbl[i]),
2682 iwl_read32(priv, csr_tbl[i]));
2683 }
2684}
2685EXPORT_SYMBOL(iwl_dump_csr);
2686
1b3eb823
WYG		 2687const static char *get_fh_string(int cmd)
2688{
2689 switch (cmd) {
2690 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2691 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2692 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2693 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2694 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2695 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2696 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2697 IWL_CMD(FH_TSSR_TX_STATUS_REG);
2698 IWL_CMD(FH_TSSR_TX_ERROR_REG);
2699 default:
2700 return "UNKNOWN";
2701
2702 }
2703}
2704
2705int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2706{
2707 int i;
2708#ifdef CONFIG_IWLWIFI_DEBUG
2709 int pos = 0;
2710 size_t bufsz = 0;
2711#endif
2712 u32 fh_tbl[] = {
2713 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2714 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2715 FH_RSCSR_CHNL0_WPTR,
2716 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2717 FH_MEM_RSSR_SHARED_CTRL_REG,
2718 FH_MEM_RSSR_RX_STATUS_REG,
2719 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2720 FH_TSSR_TX_STATUS_REG,
2721 FH_TSSR_TX_ERROR_REG
2722 };
2723#ifdef CONFIG_IWLWIFI_DEBUG
2724 if (display) {
2725 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2726 *buf = kmalloc(bufsz, GFP_KERNEL);
2727 if (!*buf)
2728 return -ENOMEM;
2729 pos += scnprintf(*buf + pos, bufsz - pos,
2730 "FH register values:\n");
2731 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2732 pos += scnprintf(*buf + pos, bufsz - pos,
2733 " %34s: 0X%08x\n",
2734 get_fh_string(fh_tbl[i]),
2735 iwl_read_direct32(priv, fh_tbl[i]));
2736 }
2737 return pos;
2738 }
2739#endif
2740 IWL_ERR(priv, "FH register values:\n");
2741 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2742 IWL_ERR(priv, " %34s: 0X%08x\n",
2743 get_fh_string(fh_tbl[i]),
2744 iwl_read_direct32(priv, fh_tbl[i]));
2745 }
2746 return 0;
2747}
2748EXPORT_SYMBOL(iwl_dump_fh);
2749
a93e7973 2750static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG		 2751{
2752 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2753 return;
2754
2755 if (!iwl_is_associated(priv)) {
2756 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
2757 return;
2758 }
2759 /*
2760 * There is no easy and better way to force reset the radio,
2761 * the only known method is switching channel which will force to
2762 * reset and tune the radio.
2763 * Use internal short scan (single channel) operation to should
2764 * achieve this objective.
2765 * Driver should reset the radio when number of consecutive missed
2766 * beacon, or any other uCode error condition detected.
2767 */
2768 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
2769 iwl_internal_short_hw_scan(priv);
afbdd69a 2770}
a93e7973 2771
a93e7973
WYG		 2772
2773int iwl_force_reset(struct iwl_priv *priv, int mode)
2774{
8a472da4
WYG		 2775 struct iwl_force_reset *force_reset;
2776
a93e7973
WYG		 2777 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2778 return -EINVAL;
2779
8a472da4
WYG		 2780 if (mode >= IWL_MAX_FORCE_RESET) {
2781 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
2782 return -EINVAL;
2783 }
2784 force_reset = &priv->force_reset[mode];
2785 force_reset->reset_request_count++;
2786 if (force_reset->last_force_reset_jiffies &&
2787 time_after(force_reset->last_force_reset_jiffies +
2788 force_reset->reset_duration, jiffies)) {
a93e7973 2789 IWL_DEBUG_INFO(priv, "force reset rejected\n");
8a472da4 2790 force_reset->reset_reject_count++;
a93e7973
WYG		 2791 return -EAGAIN;
2792 }
8a472da4
WYG		 2793 force_reset->reset_success_count++;
2794 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 2795 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG		 2796 switch (mode) {
2797 case IWL_RF_RESET:
2798 iwl_force_rf_reset(priv);
2799 break;
2800 case IWL_FW_RESET:
2801 IWL_ERR(priv, "On demand firmware reload\n");
2802 /* Set the FW error flag -- cleared on iwl_down */
2803 set_bit(STATUS_FW_ERROR, &priv->status);
2804 wake_up_interruptible(&priv->wait_command_queue);
2805 /*
2806 * Keep the restart process from trying to send host
2807 * commands by clearing the INIT status bit
2808 */
2809 clear_bit(STATUS_READY, &priv->status);
2810 queue_work(priv->workqueue, &priv->restart);
2811 break;
a93e7973 2812 }
a93e7973
WYG		 2813 return 0;
2814}
b74e31a9
WYG		 2815EXPORT_SYMBOL(iwl_force_reset);
2816
2817/**
2818 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
2819 *
2820 * During normal condition (no queue is stuck), the timer is continually set to
2821 * execute every monitor_recover_period milliseconds after the last timer
2822 * expired. When the queue read_ptr is at the same place, the timer is
2823 * shorten to 100mSecs. This is
2824 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
2825 * 2) to detect the stuck queues quicker before the station and AP can
2826 * disassociate each other.
2827 *
2828 * This function monitors all the tx queues and recover from it if any
2829 * of the queues are stuck.
2830 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
2831 * it will recover by resetting the firmware and return.
2832 * 2. Then, it checks for station association. If it associates it will check
2833 * other queues. If any queue is stuck, it will recover by resetting
2834 * the firmware.
2835 * Note: It the number of times the queue read_ptr to be at the same place to
2836 * be MAX_REPEAT+1 in order to consider to be stuck.
2837 */
2838/*
2839 * The maximum number of times the read pointer of the tx queue at the
2840 * same place without considering to be stuck.
2841 */
2842#define MAX_REPEAT (2)
2843static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
2844{
2845 struct iwl_tx_queue *txq;
2846 struct iwl_queue *q;
2847
2848 txq = &priv->txq[cnt];
2849 q = &txq->q;
2850 /* queue is empty, skip */
2851 if (q->read_ptr != q->write_ptr) {
2852 if (q->read_ptr == q->last_read_ptr) {
2853 /* a queue has not been read from last time */
2854 if (q->repeat_same_read_ptr > MAX_REPEAT) {
2855 IWL_ERR(priv,
2856 "queue %d stuck %d time. Fw reload.\n",
2857 q->id, q->repeat_same_read_ptr);
2858 q->repeat_same_read_ptr = 0;
2859 iwl_force_reset(priv, IWL_FW_RESET);
2860 } else {
2861 q->repeat_same_read_ptr++;
2862 IWL_DEBUG_RADIO(priv,
2863 "queue %d, not read %d time\n",
2864 q->id,
2865 q->repeat_same_read_ptr);
2866 mod_timer(&priv->monitor_recover, jiffies +
2867 msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
2868 }
2869 return 1;
2870 } else {
2871 q->last_read_ptr = q->read_ptr;
2872 q->repeat_same_read_ptr = 0;
2873 }
2874 }
2875 return 0;
2876}
2877
2878void iwl_bg_monitor_recover(unsigned long data)
2879{
2880 struct iwl_priv *priv = (struct iwl_priv *)data;
2881 int cnt;
2882
2883 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2884 return;
2885
2886 /* monitor and check for stuck cmd queue */
2887 if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
2888 return;
2889
2890 /* monitor and check for other stuck queues */
2891 if (iwl_is_associated(priv)) {
2892 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
2893 /* skip as we already checked the command queue */
2894 if (cnt == IWL_CMD_QUEUE_NUM)
2895 continue;
2896 if (iwl_check_stuck_queue(priv, cnt))
2897 return;
2898 }
2899 }
2900 /*
2901 * Reschedule the timer to occur in
2902 * priv->cfg->monitor_recover_period
2903 */
2904 mod_timer(&priv->monitor_recover,
2905 jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
2906}
2907EXPORT_SYMBOL(iwl_bg_monitor_recover);
afbdd69a 2908
6da3a13e
WYG		 2909#ifdef CONFIG_PM
2910
2911int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2912{
2913 struct iwl_priv *priv = pci_get_drvdata(pdev);
2914
2915 /*
2916 * This function is called when system goes into suspend state
2917 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2918 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2919 * it will not call apm_ops.stop() to stop the DMA operation.
2920 * Calling apm_ops.stop here to make sure we stop the DMA.
2921 */
2922 priv->cfg->ops->lib->apm_ops.stop(priv);
2923
2924 pci_save_state(pdev);
2925 pci_disable_device(pdev);
2926 pci_set_power_state(pdev, PCI_D3hot);
2927
2928 return 0;
2929}
2930EXPORT_SYMBOL(iwl_pci_suspend);
2931
2932int iwl_pci_resume(struct pci_dev *pdev)
2933{
2934 struct iwl_priv *priv = pci_get_drvdata(pdev);
2935 int ret;
2936
2937 pci_set_power_state(pdev, PCI_D0);
2938 ret = pci_enable_device(pdev);
2939 if (ret)
2940 return ret;
2941 pci_restore_state(pdev);
2942 iwl_enable_interrupts(priv);
2943
2944 return 0;
2945}
2946EXPORT_SYMBOL(iwl_pci_resume);
2947
2948#endif /* CONFIG_PM */
Clone of davem's net-next-2.6 tree