]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/net/wireless/iwlwifi/iwl-core.c
Merge branch 'vhost-net' of git://git.kernel.org/pub/scm/linux/kernel/git/mst/vhost
[net-next-2.6.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW
2 *
3 * GPL LICENSE SUMMARY
4 *
1f447808 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
df48c323
TW
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
3e0d4cb1 37#include "iwl-dev.h" /* FIXME: remove */
19335774 38#include "iwl-debug.h"
df48c323 39#include "iwl-core.h"
b661c819 40#include "iwl-io.h"
5da4b55f 41#include "iwl-power.h"
83dde8c9 42#include "iwl-sta.h"
ef850d7c 43#include "iwl-helpers.h"
df48c323 44
1d0a082d 45
df48c323
TW
46MODULE_DESCRIPTION("iwl core");
47MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 48MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 49MODULE_LICENSE("GPL");
df48c323 50
06702a73
WYG
51/*
52 * set bt_coex_active to true, uCode will do kill/defer
53 * every time the priority line is asserted (BT is sending signals on the
54 * priority line in the PCIx).
55 * set bt_coex_active to false, uCode will ignore the BT activity and
56 * perform the normal operation
57 *
58 * User might experience transmit issue on some platform due to WiFi/BT
59 * co-exist problem. The possible behaviors are:
60 * Able to scan and finding all the available AP
61 * Not able to associate with any AP
62 * On those platforms, WiFi communication can be restored by set
63 * "bt_coex_active" module parameter to "false"
64 *
65 * default: bt_coex_active = true (BT_COEX_ENABLE)
66 */
67static bool bt_coex_active = true;
68module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 69MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 70
c7de35cd
RR
71#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
72 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
73 IWL_RATE_SISO_##s##M_PLCP, \
74 IWL_RATE_MIMO2_##s##M_PLCP,\
75 IWL_RATE_MIMO3_##s##M_PLCP,\
76 IWL_RATE_##r##M_IEEE, \
77 IWL_RATE_##ip##M_INDEX, \
78 IWL_RATE_##in##M_INDEX, \
79 IWL_RATE_##rp##M_INDEX, \
80 IWL_RATE_##rn##M_INDEX, \
81 IWL_RATE_##pp##M_INDEX, \
82 IWL_RATE_##np##M_INDEX }
83
a562a9dd
RC
84u32 iwl_debug_level;
85EXPORT_SYMBOL(iwl_debug_level);
86
c7de35cd
RR
87/*
88 * Parameter order:
89 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
90 *
91 * If there isn't a valid next or previous rate then INV is used which
92 * maps to IWL_RATE_INVALID
93 *
94 */
1826dcc0 95const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR
96 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
97 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
98 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
99 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
100 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
101 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
102 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
103 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
104 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
105 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
106 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
107 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
108 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
109 /* FIXME:RS: ^^ should be INV (legacy) */
110};
1826dcc0 111EXPORT_SYMBOL(iwl_rates);
c7de35cd 112
e7d326ac
TW
113int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
114{
115 int idx = 0;
116
117 /* HT rate format */
118 if (rate_n_flags & RATE_MCS_HT_MSK) {
119 idx = (rate_n_flags & 0xff);
120
60d32215
DH
121 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
122 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
123 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW
124 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
125
126 idx += IWL_FIRST_OFDM_RATE;
127 /* skip 9M not supported in ht*/
128 if (idx >= IWL_RATE_9M_INDEX)
129 idx += 1;
130 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
131 return idx;
132
133 /* legacy rate format, search for match in table */
134 } else {
135 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
136 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
137 return idx;
138 }
139
140 return -1;
141}
142EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
143
0e1654fa 144u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant, u8 valid)
76eff18b
TW
145{
146 int i;
147 u8 ind = ant;
0e1654fa 148
76eff18b
TW
149 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
150 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
0e1654fa 151 if (valid & BIT(ind))
76eff18b
TW
152 return ind;
153 }
154 return ant;
155}
47ff65c4 156EXPORT_SYMBOL(iwl_toggle_tx_ant);
57bd1bea
TW
157
158const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
159EXPORT_SYMBOL(iwl_bcast_addr);
160
161
1d0a082d
AK
162/* This function both allocates and initializes hw and priv. */
163struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
164 struct ieee80211_ops *hw_ops)
165{
166 struct iwl_priv *priv;
167
168 /* mac80211 allocates memory for this device instance, including
169 * space for this driver's private structure */
170 struct ieee80211_hw *hw =
171 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
172 if (hw == NULL) {
c96c31e4 173 pr_err("%s: Can not allocate network device\n",
a3139c59 174 cfg->name);
1d0a082d
AK
175 goto out;
176 }
177
178 priv = hw->priv;
179 priv->hw = hw;
180
181out:
182 return hw;
183}
184EXPORT_SYMBOL(iwl_alloc_all);
185
b661c819
TW
186void iwl_hw_detect(struct iwl_priv *priv)
187{
188 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
189 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
190 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
191}
192EXPORT_SYMBOL(iwl_hw_detect);
193
14d2aac5
AK
194/*
195 * QoS support
196*/
e61146e3 197static void iwl_update_qos(struct iwl_priv *priv)
14d2aac5
AK
198{
199 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
200 return;
201
202 priv->qos_data.def_qos_parm.qos_flags = 0;
203
14d2aac5
AK
204 if (priv->qos_data.qos_active)
205 priv->qos_data.def_qos_parm.qos_flags |=
206 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
207
208 if (priv->current_ht_config.is_ht)
209 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
210
e61146e3
SG
211 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
212 priv->qos_data.qos_active,
213 priv->qos_data.def_qos_parm.qos_flags);
14d2aac5 214
e61146e3
SG
215 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
216 sizeof(struct iwl_qosparam_cmd),
217 &priv->qos_data.def_qos_parm, NULL);
14d2aac5 218}
c7de35cd 219
d9fe60de
JB
220#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
221#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 222static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 223 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR
224 enum ieee80211_band band)
225{
39130df3
RR
226 u16 max_bit_rate = 0;
227 u8 rx_chains_num = priv->hw_params.rx_chains_num;
228 u8 tx_chains_num = priv->hw_params.tx_chains_num;
229
c7de35cd 230 ht_info->cap = 0;
d9fe60de 231 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 232
d9fe60de 233 ht_info->ht_supported = true;
c7de35cd 234
b261793d
DH
235 if (priv->cfg->ht_greenfield_support)
236 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 237 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 238 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 239 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB
240 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
241 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
242 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 243 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 244 }
c7de35cd
RR
245
246 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 247 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR
248
249 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
250 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
251
d9fe60de 252 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 253 if (rx_chains_num >= 2)
d9fe60de 254 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 255 if (rx_chains_num >= 3)
d9fe60de 256 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR
257
258 /* Highest supported Rx data rate */
259 max_bit_rate *= rx_chains_num;
d9fe60de
JB
260 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
261 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR
262
263 /* Tx MCS capabilities */
d9fe60de 264 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 265 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB
266 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
267 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
268 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 269 }
c7de35cd 270}
c7de35cd 271
c7de35cd
RR
272/**
273 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
274 */
534166de 275int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR
276{
277 struct iwl_channel_info *ch;
278 struct ieee80211_supported_band *sband;
279 struct ieee80211_channel *channels;
280 struct ieee80211_channel *geo_ch;
281 struct ieee80211_rate *rates;
282 int i = 0;
283
284 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
285 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 286 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR
287 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
288 return 0;
289 }
290
291 channels = kzalloc(sizeof(struct ieee80211_channel) *
292 priv->channel_count, GFP_KERNEL);
293 if (!channels)
294 return -ENOMEM;
295
5027309b 296 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR
297 GFP_KERNEL);
298 if (!rates) {
299 kfree(channels);
300 return -ENOMEM;
301 }
302
303 /* 5.2GHz channels start after the 2.4GHz channels */
304 sband = &priv->bands[IEEE80211_BAND_5GHZ];
305 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
306 /* just OFDM */
307 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 308 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 309
49779293 310 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 311 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 312 IEEE80211_BAND_5GHZ);
c7de35cd
RR
313
314 sband = &priv->bands[IEEE80211_BAND_2GHZ];
315 sband->channels = channels;
316 /* OFDM & CCK */
317 sband->bitrates = rates;
5027309b 318 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 319
49779293 320 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 321 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 322 IEEE80211_BAND_2GHZ);
c7de35cd
RR
323
324 priv->ieee_channels = channels;
325 priv->ieee_rates = rates;
326
c7de35cd
RR
327 for (i = 0; i < priv->channel_count; i++) {
328 ch = &priv->channel_info[i];
329
330 /* FIXME: might be removed if scan is OK */
331 if (!is_channel_valid(ch))
332 continue;
333
334 if (is_channel_a_band(ch))
335 sband = &priv->bands[IEEE80211_BAND_5GHZ];
336 else
337 sband = &priv->bands[IEEE80211_BAND_2GHZ];
338
339 geo_ch = &sband->channels[sband->n_channels++];
340
341 geo_ch->center_freq =
342 ieee80211_channel_to_frequency(ch->channel);
343 geo_ch->max_power = ch->max_power_avg;
344 geo_ch->max_antenna_gain = 0xff;
345 geo_ch->hw_value = ch->channel;
346
347 if (is_channel_valid(ch)) {
348 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
349 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
350
351 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
352 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
353
354 if (ch->flags & EEPROM_CHANNEL_RADAR)
355 geo_ch->flags |= IEEE80211_CHAN_RADAR;
356
7aafef1c 357 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 358
dc1b0973
WYG
359 if (ch->max_power_avg > priv->tx_power_device_lmt)
360 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR
361 } else {
362 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
363 }
364
e1623446 365 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR
366 ch->channel, geo_ch->center_freq,
367 is_channel_a_band(ch) ? "5.2" : "2.4",
368 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
369 "restricted" : "valid",
370 geo_ch->flags);
371 }
372
373 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
374 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW
375 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
376 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO
377 priv->pci_dev->device,
378 priv->pci_dev->subsystem_device);
c7de35cd
RR
379 priv->cfg->sku &= ~IWL_SKU_A;
380 }
381
978785a3 382 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO
383 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
384 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR
385
386 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
387
388 return 0;
389}
534166de 390EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR
391
392/*
393 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
394 */
534166de 395void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR
396{
397 kfree(priv->ieee_channels);
398 kfree(priv->ieee_rates);
399 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
400}
534166de 401EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 402
37dc70fe 403/*
94597ab2 404 * iwlcore_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
37dc70fe
AK
405 * function.
406 */
94597ab2
JB
407void iwlcore_tx_cmd_protection(struct iwl_priv *priv,
408 struct ieee80211_tx_info *info,
409 __le16 fc, __le32 *tx_flags)
37dc70fe
AK
410{
411 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
412 *tx_flags |= TX_CMD_FLG_RTS_MSK;
413 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
94597ab2
JB
414 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
415
416 if (!ieee80211_is_mgmt(fc))
417 return;
418
419 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
420 case cpu_to_le16(IEEE80211_STYPE_AUTH):
421 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
422 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
423 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
424 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
425 *tx_flags |= TX_CMD_FLG_CTS_MSK;
426 break;
427 }
37dc70fe
AK
428 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
429 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
430 *tx_flags |= TX_CMD_FLG_CTS_MSK;
94597ab2 431 *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
37dc70fe
AK
432 }
433}
94597ab2
JB
434EXPORT_SYMBOL(iwlcore_tx_cmd_protection);
435
37dc70fe 436
28a6b07a 437static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd 438{
ba37a3d0 439 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
02bb1bea 440 priv->current_ht_config.single_chain_sufficient;
c7de35cd 441}
963f5517 442
47c5196e
TW
443static u8 iwl_is_channel_extension(struct iwl_priv *priv,
444 enum ieee80211_band band,
445 u16 channel, u8 extension_chan_offset)
446{
447 const struct iwl_channel_info *ch_info;
448
449 ch_info = iwl_get_channel_info(priv, band, channel);
450 if (!is_channel_valid(ch_info))
451 return 0;
452
d9fe60de 453 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 454 return !(ch_info->ht40_extension_channel &
689da1b3 455 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 456 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 457 return !(ch_info->ht40_extension_channel &
689da1b3 458 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e
TW
459
460 return 0;
461}
462
7aafef1c 463u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
d9fe60de 464 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e 465{
fad95bf5 466 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
47c5196e 467
fad95bf5 468 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
47c5196e
TW
469 return 0;
470
a2b0f02e
WYG
471 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
472 * the bit will not set if it is pure 40MHz case
473 */
47c5196e 474 if (sta_ht_inf) {
a2b0f02e 475 if (!sta_ht_inf->ht_supported)
47c5196e
TW
476 return 0;
477 }
d73e4923 478#ifdef CONFIG_IWLWIFI_DEBUGFS
1e4247d4
WYG
479 if (priv->disable_ht40)
480 return 0;
481#endif
611d3eb7
WYG
482 return iwl_is_channel_extension(priv, priv->band,
483 le16_to_cpu(priv->staging_rxon.channel),
fad95bf5 484 ht_conf->extension_chan_offset);
47c5196e 485}
7aafef1c 486EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 487
2c2f3b33
TW
488static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
489{
490 u16 new_val = 0;
491 u16 beacon_factor = 0;
492
493 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
494 new_val = beacon_val / beacon_factor;
495
496 if (!new_val)
497 new_val = max_beacon_val;
498
499 return new_val;
500}
501
1dda6d28 502void iwl_setup_rxon_timing(struct iwl_priv *priv, struct ieee80211_vif *vif)
2c2f3b33
TW
503{
504 u64 tsf;
505 s32 interval_tm, rem;
506 unsigned long flags;
507 struct ieee80211_conf *conf = NULL;
508 u16 beacon_int;
509
510 conf = ieee80211_get_hw_conf(priv->hw);
511
512 spin_lock_irqsave(&priv->lock, flags);
513 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
514 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
515
1dda6d28 516 beacon_int = vif->bss_conf.beacon_int;
2c2f3b33 517
1dda6d28 518 if (vif->type == NL80211_IFTYPE_ADHOC) {
2c2f3b33
TW
519 /* TODO: we need to get atim_window from upper stack
520 * for now we set to 0 */
521 priv->rxon_timing.atim_window = 0;
1dda6d28
JB
522 } else {
523 priv->rxon_timing.atim_window = 0;
2c2f3b33
TW
524 }
525
526 beacon_int = iwl_adjust_beacon_interval(beacon_int,
f8525e55 527 priv->hw_params.max_beacon_itrvl * TIME_UNIT);
2c2f3b33
TW
528 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
529
530 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
f8525e55 531 interval_tm = beacon_int * TIME_UNIT;
2c2f3b33
TW
532 rem = do_div(tsf, interval_tm);
533 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
534
535 spin_unlock_irqrestore(&priv->lock, flags);
536 IWL_DEBUG_ASSOC(priv,
537 "beacon interval %d beacon timer %d beacon tim %d\n",
538 le16_to_cpu(priv->rxon_timing.beacon_interval),
539 le32_to_cpu(priv->rxon_timing.beacon_init_val),
540 le16_to_cpu(priv->rxon_timing.atim_window));
541}
542EXPORT_SYMBOL(iwl_setup_rxon_timing);
543
8ccde88a
SO
544void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
545{
546 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
547
548 if (hw_decrypt)
549 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
550 else
551 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
552
553}
554EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
555
556/**
557 * iwl_check_rxon_cmd - validate RXON structure is valid
558 *
559 * NOTE: This is really only useful during development and can eventually
560 * be #ifdef'd out once the driver is stable and folks aren't actively
561 * making changes
562 */
563int iwl_check_rxon_cmd(struct iwl_priv *priv)
564{
565 int error = 0;
566 int counter = 1;
567 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
568
569 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
570 error |= le32_to_cpu(rxon->flags &
571 (RXON_FLG_TGJ_NARROW_BAND_MSK |
572 RXON_FLG_RADAR_DETECT_MSK));
573 if (error)
574 IWL_WARN(priv, "check 24G fields %d | %d\n",
575 counter++, error);
576 } else {
577 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
578 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
579 if (error)
580 IWL_WARN(priv, "check 52 fields %d | %d\n",
581 counter++, error);
582 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
583 if (error)
584 IWL_WARN(priv, "check 52 CCK %d | %d\n",
585 counter++, error);
586 }
587 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
588 if (error)
589 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
590
591 /* make sure basic rates 6Mbps and 1Mbps are supported */
592 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
593 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
594 if (error)
595 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
596
597 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
598 if (error)
599 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
600
601 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
602 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
603 if (error)
604 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
605 counter++, error);
606
607 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
608 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
609 if (error)
610 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
611 counter++, error);
612
613 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
614 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
615 if (error)
616 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
617 counter++, error);
618
619 if (error)
620 IWL_WARN(priv, "Tuning to channel %d\n",
621 le16_to_cpu(rxon->channel));
622
623 if (error) {
624 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
625 return -1;
626 }
627 return 0;
628}
629EXPORT_SYMBOL(iwl_check_rxon_cmd);
630
631/**
632 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
633 * @priv: staging_rxon is compared to active_rxon
634 *
635 * If the RXON structure is changing enough to require a new tune,
636 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
637 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
638 */
639int iwl_full_rxon_required(struct iwl_priv *priv)
640{
641
642 /* These items are only settable from the full RXON command */
643 if (!(iwl_is_associated(priv)) ||
644 compare_ether_addr(priv->staging_rxon.bssid_addr,
645 priv->active_rxon.bssid_addr) ||
646 compare_ether_addr(priv->staging_rxon.node_addr,
647 priv->active_rxon.node_addr) ||
648 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
649 priv->active_rxon.wlap_bssid_addr) ||
650 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
651 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
652 (priv->staging_rxon.air_propagation !=
653 priv->active_rxon.air_propagation) ||
654 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
655 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
656 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
657 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH
658 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
659 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO
660 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
661 return 1;
662
663 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
664 * be updated with the RXON_ASSOC command -- however only some
665 * flag transitions are allowed using RXON_ASSOC */
666
667 /* Check if we are not switching bands */
668 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
669 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
670 return 1;
671
672 /* Check if we are switching association toggle */
673 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
674 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
675 return 1;
676
677 return 0;
678}
679EXPORT_SYMBOL(iwl_full_rxon_required);
680
681u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
682{
4a02886b
JB
683 /*
684 * Assign the lowest rate -- should really get this from
685 * the beacon skb from mac80211.
686 */
8ccde88a
SO
687 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
688 return IWL_RATE_1M_PLCP;
689 else
690 return IWL_RATE_6M_PLCP;
691}
692EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
693
fad95bf5 694void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
47c5196e 695{
c1adf9fb 696 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e 697
fad95bf5 698 if (!ht_conf->is_ht) {
a2b0f02e 699 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 700 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 701 RXON_FLG_HT40_PROT_MSK |
42eb7c64 702 RXON_FLG_HT_PROT_MSK);
47c5196e 703 return;
42eb7c64 704 }
47c5196e 705
a2b0f02e
WYG
706 /* FIXME: if the definition of ht_protection changed, the "translation"
707 * will be needed for rxon->flags
708 */
fad95bf5 709 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG
710
711 /* Set up channel bandwidth:
7aafef1c 712 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG
713 /* clear the HT channel mode before set the mode */
714 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
715 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7aafef1c
WYG
716 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
717 /* pure ht40 */
fad95bf5 718 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 719 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 720 /* Note: control channel is opposite of extension channel */
fad95bf5 721 switch (ht_conf->extension_chan_offset) {
508b08e7
WYG
722 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
723 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
724 break;
725 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
726 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
727 break;
728 }
729 } else {
a2b0f02e 730 /* Note: control channel is opposite of extension channel */
fad95bf5 731 switch (ht_conf->extension_chan_offset) {
a2b0f02e
WYG
732 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
733 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
734 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
735 break;
736 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
737 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
738 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
739 break;
740 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
741 default:
742 /* channel location only valid if in Mixed mode */
743 IWL_ERR(priv, "invalid extension channel offset\n");
744 break;
745 }
746 }
747 } else {
748 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW
749 }
750
45823531
AK
751 if (priv->cfg->ops->hcmd->set_rxon_chain)
752 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 753
02bb1bea 754 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 755 "extension channel offset 0x%x\n",
fad95bf5
JB
756 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
757 ht_conf->extension_chan_offset);
47c5196e
TW
758}
759EXPORT_SYMBOL(iwl_set_rxon_ht);
760
9e5e6c32
TW
761#define IWL_NUM_RX_CHAINS_MULTIPLE 3
762#define IWL_NUM_RX_CHAINS_SINGLE 2
763#define IWL_NUM_IDLE_CHAINS_DUAL 2
764#define IWL_NUM_IDLE_CHAINS_SINGLE 1
765
2b396a12
JB
766/*
767 * Determine how many receiver/antenna chains to use.
768 *
769 * More provides better reception via diversity. Fewer saves power
770 * at the expense of throughput, but only when not in powersave to
771 * start with.
772 *
c7de35cd
RR
773 * MIMO (dual stream) requires at least 2, but works better with 3.
774 * This does not determine *which* chains to use, just how many.
775 */
28a6b07a 776static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 777{
c7de35cd 778 /* # of Rx chains to use when expecting MIMO. */
02bb1bea 779 if (is_single_rx_stream(priv))
9e5e6c32 780 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 781 else
9e5e6c32 782 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 783}
c7de35cd 784
2b396a12 785/*
3f3e0376
WYG
786 * When we are in power saving mode, unless device support spatial
787 * multiplexing power save, use the active count for rx chain count.
2b396a12 788 */
28a6b07a
TW
789static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
790{
ba37a3d0
JB
791 /* # Rx chains when idling, depending on SMPS mode */
792 switch (priv->current_ht_config.smps) {
793 case IEEE80211_SMPS_STATIC:
794 case IEEE80211_SMPS_DYNAMIC:
795 return IWL_NUM_IDLE_CHAINS_SINGLE;
796 case IEEE80211_SMPS_OFF:
797 return active_cnt;
c15d20c1 798 default:
ba37a3d0
JB
799 WARN(1, "invalid SMPS mode %d",
800 priv->current_ht_config.smps);
801 return active_cnt;
3f3e0376 802 }
c7de35cd
RR
803}
804
04816448
GE
805/* up to 4 chains */
806static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
807{
808 u8 res;
809 res = (chain_bitmap & BIT(0)) >> 0;
810 res += (chain_bitmap & BIT(1)) >> 1;
811 res += (chain_bitmap & BIT(2)) >> 2;
9bddbab3 812 res += (chain_bitmap & BIT(3)) >> 3;
04816448
GE
813 return res;
814}
815
c7de35cd
RR
816/**
817 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
818 *
819 * Selects how many and which Rx receivers/antennas/chains to use.
820 * This should not be used for scan command ... it puts data in wrong place.
821 */
822void iwl_set_rxon_chain(struct iwl_priv *priv)
823{
28a6b07a
TW
824 bool is_single = is_single_rx_stream(priv);
825 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE
826 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
827 u32 active_chains;
28a6b07a 828 u16 rx_chain;
c7de35cd
RR
829
830 /* Tell uCode which antennas are actually connected.
831 * Before first association, we assume all antennas are connected.
832 * Just after first association, iwl_chain_noise_calibration()
833 * checks which antennas actually *are* connected. */
04816448
GE
834 if (priv->chain_noise_data.active_chains)
835 active_chains = priv->chain_noise_data.active_chains;
836 else
837 active_chains = priv->hw_params.valid_rx_ant;
838
839 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR
840
841 /* How many receivers should we use? */
28a6b07a
TW
842 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
843 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
844
28a6b07a 845
04816448
GE
846 /* correct rx chain count according hw settings
847 * and chain noise calibration
848 */
849 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
850 if (valid_rx_cnt < active_rx_cnt)
851 active_rx_cnt = valid_rx_cnt;
852
853 if (valid_rx_cnt < idle_rx_cnt)
854 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW
855
856 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
857 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
858
859 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
860
9e5e6c32 861 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR
862 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
863 else
864 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
865
e1623446 866 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW
867 priv->staging_rxon.rx_chain,
868 active_rx_cnt, idle_rx_cnt);
869
870 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
871 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR
872}
873EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f 874
14023641
AK
875/* Return valid channel */
876u8 iwl_get_single_channel_number(struct iwl_priv *priv,
877 enum ieee80211_band band)
878{
879 const struct iwl_channel_info *ch_info;
880 int i;
881 u8 channel = 0;
882
883 /* only scan single channel, good enough to reset the RF */
884 /* pick the first valid not in-use channel */
885 if (band == IEEE80211_BAND_5GHZ) {
886 for (i = 14; i < priv->channel_count; i++) {
887 if (priv->channel_info[i].channel !=
888 le16_to_cpu(priv->staging_rxon.channel)) {
889 channel = priv->channel_info[i].channel;
890 ch_info = iwl_get_channel_info(priv,
891 band, channel);
892 if (is_channel_valid(ch_info))
893 break;
894 }
895 }
896 } else {
897 for (i = 0; i < 14; i++) {
898 if (priv->channel_info[i].channel !=
899 le16_to_cpu(priv->staging_rxon.channel)) {
900 channel =
901 priv->channel_info[i].channel;
902 ch_info = iwl_get_channel_info(priv,
903 band, channel);
904 if (is_channel_valid(ch_info))
905 break;
906 }
907 }
908 }
909
910 return channel;
911}
912EXPORT_SYMBOL(iwl_get_single_channel_number);
913
bf85ea4f 914/**
17e72782 915 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
bf85ea4f
AK
916 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
917 * @channel: Any channel valid for the requested phymode
918
919 * In addition to setting the staging RXON, priv->phymode is also set.
920 *
921 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
922 * in the staging RXON flag structure based on the phymode
923 */
17e72782 924int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 925{
17e72782
TW
926 enum ieee80211_band band = ch->band;
927 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
928
8622e705 929 if (!iwl_get_channel_info(priv, band, channel)) {
e1623446 930 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
bf85ea4f
AK
931 channel, band);
932 return -EINVAL;
933 }
934
935 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
936 (priv->band == band))
937 return 0;
938
939 priv->staging_rxon.channel = cpu_to_le16(channel);
940 if (band == IEEE80211_BAND_5GHZ)
941 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
942 else
943 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
944
945 priv->band = band;
946
e1623446 947 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK
948
949 return 0;
950}
c7de35cd 951EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 952
79d07325
WYG
953void iwl_set_flags_for_band(struct iwl_priv *priv,
954 enum ieee80211_band band,
955 struct ieee80211_vif *vif)
8ccde88a
SO
956{
957 if (band == IEEE80211_BAND_5GHZ) {
958 priv->staging_rxon.flags &=
959 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
960 | RXON_FLG_CCK_MSK);
961 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
962 } else {
963 /* Copied from iwl_post_associate() */
c213d745 964 if (vif && vif->bss_conf.use_short_slot)
8ccde88a
SO
965 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
966 else
967 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
968
8ccde88a
SO
969 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
970 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
971 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
972 }
973}
79d07325 974EXPORT_SYMBOL(iwl_set_flags_for_band);
8ccde88a
SO
975
976/*
977 * initialize rxon structure with default values from eeprom
978 */
1dda6d28
JB
979void iwl_connection_init_rx_config(struct iwl_priv *priv,
980 struct ieee80211_vif *vif)
8ccde88a
SO
981{
982 const struct iwl_channel_info *ch_info;
1dda6d28
JB
983 enum nl80211_iftype type = NL80211_IFTYPE_STATION;
984
985 if (vif)
986 type = vif->type;
8ccde88a
SO
987
988 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
989
1dda6d28 990 switch (type) {
8ccde88a
SO
991 case NL80211_IFTYPE_AP:
992 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
993 break;
994
995 case NL80211_IFTYPE_STATION:
996 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
997 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
998 break;
999
1000 case NL80211_IFTYPE_ADHOC:
1001 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
1002 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1003 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1004 RXON_FILTER_ACCEPT_GRP_MSK;
1005 break;
1006
8ccde88a 1007 default:
1dda6d28 1008 IWL_ERR(priv, "Unsupported interface type %d\n", type);
8ccde88a
SO
1009 break;
1010 }
1011
1012#if 0
1013 /* TODO: Figure out when short_preamble would be set and cache from
1014 * that */
1015 if (!hw_to_local(priv->hw)->short_preamble)
1016 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1017 else
1018 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1019#endif
1020
1021 ch_info = iwl_get_channel_info(priv, priv->band,
1022 le16_to_cpu(priv->active_rxon.channel));
1023
1024 if (!ch_info)
1025 ch_info = &priv->channel_info[0];
1026
8ccde88a
SO
1027 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1028 priv->band = ch_info->band;
1029
1dda6d28 1030 iwl_set_flags_for_band(priv, priv->band, vif);
8ccde88a
SO
1031
1032 priv->staging_rxon.ofdm_basic_rates =
1033 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1034 priv->staging_rxon.cck_basic_rates =
1035 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1036
a2b0f02e
WYG
1037 /* clear both MIX and PURE40 mode flag */
1038 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1039 RXON_FLG_CHANNEL_MODE_PURE_40);
7684c408
JB
1040
1041 if (vif)
1042 memcpy(priv->staging_rxon.node_addr, vif->addr, ETH_ALEN);
1043
8ccde88a
SO
1044 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1045 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 1046 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO
1047}
1048EXPORT_SYMBOL(iwl_connection_init_rx_config);
1049
79d07325 1050void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO
1051{
1052 const struct ieee80211_supported_band *hw = NULL;
1053 struct ieee80211_rate *rate;
1054 int i;
1055
1056 hw = iwl_get_hw_mode(priv, priv->band);
1057 if (!hw) {
1058 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1059 return;
1060 }
1061
1062 priv->active_rate = 0;
8ccde88a
SO
1063
1064 for (i = 0; i < hw->n_bitrates; i++) {
1065 rate = &(hw->bitrates[i]);
5027309b 1066 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO
1067 priv->active_rate |= (1 << rate->hw_value);
1068 }
1069
4a02886b 1070 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 1071
4a02886b
JB
1072 priv->staging_rxon.cck_basic_rates =
1073 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1074
1075 priv->staging_rxon.ofdm_basic_rates =
1076 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
8ccde88a 1077}
79d07325
WYG
1078EXPORT_SYMBOL(iwl_set_rate);
1079
1080void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
1081{
1082 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1083 return;
1084
1085 if (priv->switch_rxon.switch_in_progress) {
1086 ieee80211_chswitch_done(priv->vif, is_success);
1087 mutex_lock(&priv->mutex);
1088 priv->switch_rxon.switch_in_progress = false;
1089 mutex_unlock(&priv->mutex);
1090 }
1091}
1092EXPORT_SYMBOL(iwl_chswitch_done);
8ccde88a
SO
1093
1094void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1095{
2f301227 1096 struct iwl_rx_packet *pkt = rxb_addr(rxb);
8ccde88a
SO
1097 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1098 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
4a56e965 1099
0924e519
WYG
1100 if (priv->switch_rxon.switch_in_progress) {
1101 if (!le32_to_cpu(csa->status) &&
1102 (csa->channel == priv->switch_rxon.channel)) {
1103 rxon->channel = csa->channel;
1104 priv->staging_rxon.channel = csa->channel;
1105 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1106 le16_to_cpu(csa->channel));
79d07325
WYG
1107 iwl_chswitch_done(priv, true);
1108 } else {
0924e519
WYG
1109 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1110 le16_to_cpu(csa->channel));
79d07325
WYG
1111 iwl_chswitch_done(priv, false);
1112 }
0924e519 1113 }
8ccde88a
SO
1114}
1115EXPORT_SYMBOL(iwl_rx_csa);
1116
1117#ifdef CONFIG_IWLWIFI_DEBUG
a643565e 1118void iwl_print_rx_config_cmd(struct iwl_priv *priv)
8ccde88a
SO
1119{
1120 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1121
e1623446 1122 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1123 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW
1124 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1125 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1126 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1127 le32_to_cpu(rxon->filter_flags));
e1623446
TW
1128 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1129 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1130 rxon->ofdm_basic_rates);
e1623446
TW
1131 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1132 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1133 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1134 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1135}
a643565e 1136EXPORT_SYMBOL(iwl_print_rx_config_cmd);
6686d17e 1137#endif
8ccde88a
SO
1138/**
1139 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1140 */
1141void iwl_irq_handle_error(struct iwl_priv *priv)
1142{
1143 /* Set the FW error flag -- cleared on iwl_down */
1144 set_bit(STATUS_FW_ERROR, &priv->status);
1145
1146 /* Cancel currently queued command. */
1147 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1148
459bc732
SZ
1149 IWL_ERR(priv, "Loaded firmware version: %s\n",
1150 priv->hw->wiphy->fw_version);
1151
3a3ff72c 1152 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG
1153 if (priv->cfg->ops->lib->dump_csr)
1154 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG
1155 if (priv->cfg->ops->lib->dump_fh)
1156 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 1157 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 1158#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 1159 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
8ccde88a 1160 iwl_print_rx_config_cmd(priv);
8ccde88a
SO
1161#endif
1162
1163 wake_up_interruptible(&priv->wait_command_queue);
1164
1165 /* Keep the restart process from trying to send host
1166 * commands by clearing the INIT status bit */
1167 clear_bit(STATUS_READY, &priv->status);
1168
1169 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1170 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO
1171 "Restarting adapter due to uCode error.\n");
1172
8ccde88a
SO
1173 if (priv->cfg->mod_params->restart_fw)
1174 queue_work(priv->workqueue, &priv->restart);
1175 }
1176}
1177EXPORT_SYMBOL(iwl_irq_handle_error);
1178
f8e200de 1179static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 1180{
5220af0c 1181 int ret = 0;
d68b603c 1182
5220af0c 1183 /* stop device's busmaster DMA activity */
d68b603c
AK
1184 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1185
5220af0c 1186 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 1187 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC
1188 if (ret)
1189 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 1190
d68b603c
AK
1191 IWL_DEBUG_INFO(priv, "stop master\n");
1192
5220af0c 1193 return ret;
d68b603c 1194}
d68b603c
AK
1195
1196void iwl_apm_stop(struct iwl_priv *priv)
1197{
fadb3582
BC
1198 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1199
5220af0c 1200 /* Stop device's DMA activity */
d68b603c
AK
1201 iwl_apm_stop_master(priv);
1202
5220af0c 1203 /* Reset the entire device */
d68b603c
AK
1204 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1205
1206 udelay(10);
5220af0c
BC
1207
1208 /*
1209 * Clear "initialization complete" bit to move adapter from
1210 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1211 */
d68b603c 1212 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c
AK
1213}
1214EXPORT_SYMBOL(iwl_apm_stop);
1215
fadb3582
BC
1216
1217/*
1218 * Start up NIC's basic functionality after it has been reset
1219 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1220 * NOTE: This does not load uCode nor start the embedded processor
1221 */
1222int iwl_apm_init(struct iwl_priv *priv)
1223{
1224 int ret = 0;
1225 u16 lctl;
1226
1227 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1228
1229 /*
1230 * Use "set_bit" below rather than "write", to preserve any hardware
1231 * bits already set by default after reset.
1232 */
1233
1234 /* Disable L0S exit timer (platform NMI Work/Around) */
1235 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1236 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1237
1238 /*
1239 * Disable L0s without affecting L1;
1240 * don't wait for ICH L0s (ICH bug W/A)
1241 */
1242 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1243 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1244
1245 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1246 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1247
1248 /*
1249 * Enable HAP INTA (interrupt from management bus) to
1250 * wake device's PCI Express link L1a -> L0s
1251 * NOTE: This is no-op for 3945 (non-existant bit)
1252 */
1253 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1254 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1255
1256 /*
a6c5c731
BC
1257 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1258 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1259 * If so (likely), disable L0S, so device moves directly L0->L1;
1260 * costs negligible amount of power savings.
1261 * If not (unlikely), enable L0S, so there is at least some
1262 * power savings, even without L1.
fadb3582
BC
1263 */
1264 if (priv->cfg->set_l0s) {
1265 lctl = iwl_pcie_link_ctl(priv);
1266 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1267 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1268 /* L1-ASPM enabled; disable(!) L0S */
1269 iwl_set_bit(priv, CSR_GIO_REG,
1270 CSR_GIO_REG_VAL_L0S_ENABLED);
1271 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1272 } else {
1273 /* L1-ASPM disabled; enable(!) L0S */
1274 iwl_clear_bit(priv, CSR_GIO_REG,
1275 CSR_GIO_REG_VAL_L0S_ENABLED);
1276 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1277 }
1278 }
1279
1280 /* Configure analog phase-lock-loop before activating to D0A */
1281 if (priv->cfg->pll_cfg_val)
1282 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1283
1284 /*
1285 * Set "initialization complete" bit to move adapter from
1286 * D0U* --> D0A* (powered-up active) state.
1287 */
1288 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1289
1290 /*
1291 * Wait for clock stabilization; once stabilized, access to
1292 * device-internal resources is supported, e.g. iwl_write_prph()
1293 * and accesses to uCode SRAM.
1294 */
1295 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1296 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1297 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1298 if (ret < 0) {
1299 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1300 goto out;
1301 }
1302
1303 /*
1304 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1305 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1306 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1307 * and don't need BSM to restore data after power-saving sleep.
1308 *
1309 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1310 * do not disable clocks. This preserves any hardware bits already
1311 * set by default in "CLK_CTRL_REG" after reset.
1312 */
1313 if (priv->cfg->use_bsm)
1314 iwl_write_prph(priv, APMG_CLK_EN_REG,
1315 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1316 else
1317 iwl_write_prph(priv, APMG_CLK_EN_REG,
1318 APMG_CLK_VAL_DMA_CLK_RQT);
1319 udelay(20);
1320
1321 /* Disable L1-Active */
1322 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1323 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1324
1325out:
1326 return ret;
1327}
1328EXPORT_SYMBOL(iwl_apm_init);
1329
1330
da154e30
RR
1331int iwl_set_hw_params(struct iwl_priv *priv)
1332{
da154e30
RR
1333 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1334 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1335 if (priv->cfg->mod_params->amsdu_size_8K)
2f301227 1336 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
da154e30 1337 else
2f301227 1338 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
da154e30 1339
2c2f3b33
TW
1340 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1341
49779293
RR
1342 if (priv->cfg->mod_params->disable_11n)
1343 priv->cfg->sku &= ~IWL_SKU_N;
1344
da154e30
RR
1345 /* Device-specific setup */
1346 return priv->cfg->ops->lib->set_hw_params(priv);
1347}
1348EXPORT_SYMBOL(iwl_set_hw_params);
6ba87956 1349
630fe9b6
TW
1350int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1351{
1352 int ret = 0;
5eadd94b
WYG
1353 s8 prev_tx_power = priv->tx_power_user_lmt;
1354
b744cb79
WYG
1355 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1356 IWL_WARN(priv,
1357 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1358 tx_power,
b744cb79 1359 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW
1360 return -EINVAL;
1361 }
1362
dc1b0973 1363 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG
1364 IWL_WARN(priv,
1365 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1366 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW
1367 return -EINVAL;
1368 }
1369
1370 if (priv->tx_power_user_lmt != tx_power)
1371 force = true;
1372
019fb97d 1373 /* if nic is not up don't send command */
5eadd94b
WYG
1374 if (iwl_is_ready_rf(priv)) {
1375 priv->tx_power_user_lmt = tx_power;
1376 if (force && priv->cfg->ops->lib->send_tx_power)
1377 ret = priv->cfg->ops->lib->send_tx_power(priv);
1378 else if (!priv->cfg->ops->lib->send_tx_power)
1379 ret = -EOPNOTSUPP;
1380 /*
1381 * if fail to set tx_power, restore the orig. tx power
1382 */
1383 if (ret)
1384 priv->tx_power_user_lmt = prev_tx_power;
1385 }
630fe9b6 1386
5eadd94b
WYG
1387 /*
1388 * Even this is an async host command, the command
1389 * will always report success from uCode
1390 * So once driver can placing the command into the queue
1391 * successfully, driver can use priv->tx_power_user_lmt
1392 * to reflect the current tx power
1393 */
630fe9b6
TW
1394 return ret;
1395}
1396EXPORT_SYMBOL(iwl_set_tx_power);
1397
ef850d7c 1398irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK
1399{
1400 struct iwl_priv *priv = data;
1401 u32 inta, inta_mask;
1402 u32 inta_fh;
6e8cc38d 1403 unsigned long flags;
f17d08a6
AK
1404 if (!priv)
1405 return IRQ_NONE;
1406
6e8cc38d 1407 spin_lock_irqsave(&priv->lock, flags);
f17d08a6
AK
1408
1409 /* Disable (but don't clear!) interrupts here to avoid
1410 * back-to-back ISRs and sporadic interrupts from our NIC.
1411 * If we have something to service, the tasklet will re-enable ints.
1412 * If we *don't* have something, we'll re-enable before leaving here. */
1413 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1414 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1415
1416 /* Discover which interrupts are active/pending */
1417 inta = iwl_read32(priv, CSR_INT);
1418 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1419
1420 /* Ignore interrupt if there's nothing in NIC to service.
1421 * This may be due to IRQ shared with another device,
1422 * or due to sporadic interrupts thrown from our NIC. */
1423 if (!inta && !inta_fh) {
1424 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1425 goto none;
1426 }
1427
1428 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1429 /* Hardware disappeared. It might have already raised
1430 * an interrupt */
1431 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1432 goto unplugged;
1433 }
1434
1435 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1436 inta, inta_mask, inta_fh);
1437
1438 inta &= ~CSR_INT_BIT_SCD;
1439
1440 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1441 if (likely(inta || inta_fh))
1442 tasklet_schedule(&priv->irq_tasklet);
1443
1444 unplugged:
6e8cc38d 1445 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK
1446 return IRQ_HANDLED;
1447
1448 none:
1449 /* re-enable interrupts here since we don't have anything to service. */
1450 /* only Re-enable if diabled by irq */
1451 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1452 iwl_enable_interrupts(priv);
6e8cc38d 1453 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK
1454 return IRQ_NONE;
1455}
ef850d7c 1456EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1457
65b52bde 1458void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO
1459{
1460 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG
1461 .lead_time = BT_LEAD_TIME_DEF,
1462 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO
1463 .kill_ack_mask = 0,
1464 .kill_cts_mask = 0,
1465 };
1466
06702a73
WYG
1467 if (!bt_coex_active)
1468 bt_cmd.flags = BT_COEX_DISABLE;
1469 else
1470 bt_cmd.flags = BT_COEX_ENABLE;
1471
1472 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1473 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1474
65b52bde
JB
1475 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1476 sizeof(struct iwl_bt_cmd), &bt_cmd))
1477 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd
SO
1478}
1479EXPORT_SYMBOL(iwl_send_bt_config);
1480
ef8d5529 1481int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1482{
ef8d5529
WYG
1483 struct iwl_statistics_cmd statistics_cmd = {
1484 .configuration_flags =
1485 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1486 };
ef8d5529
WYG
1487
1488 if (flags & CMD_ASYNC)
1489 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1490 sizeof(struct iwl_statistics_cmd),
1491 &statistics_cmd, NULL);
1492 else
1493 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1494 sizeof(struct iwl_statistics_cmd),
1495 &statistics_cmd);
49ea8596
EG
1496}
1497EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1498
47f4a587
EG
1499void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1500{
1501 struct iwl_ct_kill_config cmd;
672639de 1502 struct iwl_ct_kill_throttling_config adv_cmd;
47f4a587
EG
1503 unsigned long flags;
1504 int ret = 0;
1505
1506 spin_lock_irqsave(&priv->lock, flags);
1507 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1508 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1509 spin_unlock_irqrestore(&priv->lock, flags);
3ad3b92a 1510 priv->thermal_throttle.ct_kill_toggle = false;
47f4a587 1511
480e8407 1512 if (priv->cfg->support_ct_kill_exit) {
672639de
WYG
1513 adv_cmd.critical_temperature_enter =
1514 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1515 adv_cmd.critical_temperature_exit =
1516 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
1517
1518 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1519 sizeof(adv_cmd), &adv_cmd);
d91b1ba3
WYG
1520 if (ret)
1521 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1522 else
1523 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1524 "succeeded, "
1525 "critical temperature enter is %d,"
1526 "exit is %d\n",
1527 priv->hw_params.ct_kill_threshold,
1528 priv->hw_params.ct_kill_exit_threshold);
480e8407 1529 } else {
672639de
WYG
1530 cmd.critical_temperature_R =
1531 cpu_to_le32(priv->hw_params.ct_kill_threshold);
189a2b59 1532
672639de
WYG
1533 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1534 sizeof(cmd), &cmd);
d91b1ba3
WYG
1535 if (ret)
1536 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1537 else
1538 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1539 "succeeded, "
1540 "critical temperature is %d\n",
1541 priv->hw_params.ct_kill_threshold);
672639de 1542 }
47f4a587
EG
1543}
1544EXPORT_SYMBOL(iwl_rf_kill_ct_config);
14a08a7f 1545
0ad91a35 1546
14a08a7f
EG
1547/*
1548 * CARD_STATE_CMD
1549 *
1550 * Use: Sets the device's internal card state to enable, disable, or halt
1551 *
1552 * When in the 'enable' state the card operates as normal.
1553 * When in the 'disable' state, the card enters into a low power mode.
1554 * When in the 'halt' state, the card is shut down and must be fully
1555 * restarted to come back on.
1556 */
c496294e 1557int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
14a08a7f
EG
1558{
1559 struct iwl_host_cmd cmd = {
1560 .id = REPLY_CARD_STATE_CMD,
1561 .len = sizeof(u32),
1562 .data = &flags,
c2acea8e 1563 .flags = meta_flag,
14a08a7f
EG
1564 };
1565
1566 return iwl_send_cmd(priv, &cmd);
1567}
1568
030f05ed
AK
1569void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1570 struct iwl_rx_mem_buffer *rxb)
1571{
1572#ifdef CONFIG_IWLWIFI_DEBUG
2f301227 1573 struct iwl_rx_packet *pkt = rxb_addr(rxb);
030f05ed
AK
1574 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1575 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1576 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1577#endif
1578}
1579EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1580
1581void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1582 struct iwl_rx_mem_buffer *rxb)
1583{
2f301227 1584 struct iwl_rx_packet *pkt = rxb_addr(rxb);
396887a2 1585 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 1586 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH
1587 "notification for %s:\n", len,
1588 get_cmd_string(pkt->hdr.cmd));
1589 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK
1590}
1591EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK
1592
1593void iwl_rx_reply_error(struct iwl_priv *priv,
1594 struct iwl_rx_mem_buffer *rxb)
1595{
2f301227 1596 struct iwl_rx_packet *pkt = rxb_addr(rxb);
261b9c33
AK
1597
1598 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1599 "seq 0x%04X ser 0x%08X\n",
1600 le32_to_cpu(pkt->u.err_resp.error_type),
1601 get_cmd_string(pkt->u.err_resp.cmd_id),
1602 pkt->u.err_resp.cmd_id,
1603 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1604 le32_to_cpu(pkt->u.err_resp.error_info));
1605}
1606EXPORT_SYMBOL(iwl_rx_reply_error);
1607
a83b9141
WYG
1608void iwl_clear_isr_stats(struct iwl_priv *priv)
1609{
1610 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1611}
a83b9141 1612
488829f1
AK
1613int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1614 const struct ieee80211_tx_queue_params *params)
1615{
1616 struct iwl_priv *priv = hw->priv;
1617 unsigned long flags;
1618 int q;
1619
1620 IWL_DEBUG_MAC80211(priv, "enter\n");
1621
1622 if (!iwl_is_ready_rf(priv)) {
1623 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1624 return -EIO;
1625 }
1626
1627 if (queue >= AC_NUM) {
1628 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1629 return 0;
1630 }
1631
1632 q = AC_NUM - 1 - queue;
1633
1634 spin_lock_irqsave(&priv->lock, flags);
1635
1636 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
1637 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
1638 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1639 priv->qos_data.def_qos_parm.ac[q].edca_txop =
1640 cpu_to_le16((params->txop * 32));
1641
1642 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
488829f1
AK
1643
1644 spin_unlock_irqrestore(&priv->lock, flags);
1645
1646 IWL_DEBUG_MAC80211(priv, "leave\n");
1647 return 0;
1648}
1649EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b
AK
1650
1651static void iwl_ht_conf(struct iwl_priv *priv,
ca3c1f59 1652 struct ieee80211_vif *vif)
5bbe233b 1653{
fad95bf5 1654 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
5bbe233b 1655 struct ieee80211_sta *sta;
ca3c1f59 1656 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
5bbe233b 1657
91dd6c27 1658 IWL_DEBUG_MAC80211(priv, "enter:\n");
5bbe233b 1659
fad95bf5 1660 if (!ht_conf->is_ht)
5bbe233b
AK
1661 return;
1662
fad95bf5 1663 ht_conf->ht_protection =
9ed6bcce 1664 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
fad95bf5 1665 ht_conf->non_GF_STA_present =
9ed6bcce 1666 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b 1667
02bb1bea
JB
1668 ht_conf->single_chain_sufficient = false;
1669
ca3c1f59 1670 switch (vif->type) {
02bb1bea
JB
1671 case NL80211_IFTYPE_STATION:
1672 rcu_read_lock();
ca3c1f59 1673 sta = ieee80211_find_sta(vif, bss_conf->bssid);
02bb1bea
JB
1674 if (sta) {
1675 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
1676 int maxstreams;
1677
1678 maxstreams = (ht_cap->mcs.tx_params &
1679 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
1680 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1681 maxstreams += 1;
1682
1683 if ((ht_cap->mcs.rx_mask[1] == 0) &&
1684 (ht_cap->mcs.rx_mask[2] == 0))
1685 ht_conf->single_chain_sufficient = true;
1686 if (maxstreams <= 1)
1687 ht_conf->single_chain_sufficient = true;
1688 } else {
1689 /*
1690 * If at all, this can only happen through a race
1691 * when the AP disconnects us while we're still
1692 * setting up the connection, in that case mac80211
1693 * will soon tell us about that.
1694 */
1695 ht_conf->single_chain_sufficient = true;
1696 }
1697 rcu_read_unlock();
1698 break;
1699 case NL80211_IFTYPE_ADHOC:
1700 ht_conf->single_chain_sufficient = true;
1701 break;
1702 default:
1703 break;
1704 }
5bbe233b
AK
1705
1706 IWL_DEBUG_MAC80211(priv, "leave\n");
1707}
1708
c91c3efc
AK
1709static inline void iwl_set_no_assoc(struct iwl_priv *priv)
1710{
c91c3efc
AK
1711 iwl_led_disassociate(priv);
1712 /*
1713 * inform the ucode that there is no longer an
1714 * association and that no more packets should be
1715 * sent
1716 */
1717 priv->staging_rxon.filter_flags &=
1718 ~RXON_FILTER_ASSOC_MSK;
1719 priv->staging_rxon.assoc_id = 0;
1720 iwlcore_commit_rxon(priv);
1721}
1722
0bc5774f
JB
1723static int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
1724{
1725 struct iwl_priv *priv = hw->priv;
1726 unsigned long flags;
1727 __le64 timestamp;
1728
1729 IWL_DEBUG_MAC80211(priv, "enter\n");
1730
1731 if (!iwl_is_ready_rf(priv)) {
1732 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1733 return -EIO;
1734 }
1735
1736 spin_lock_irqsave(&priv->lock, flags);
1737
1738 if (priv->ibss_beacon)
1739 dev_kfree_skb(priv->ibss_beacon);
1740
1741 priv->ibss_beacon = skb;
1742
1743 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
1744 priv->timestamp = le64_to_cpu(timestamp);
1745
1746 IWL_DEBUG_MAC80211(priv, "leave\n");
1747 spin_unlock_irqrestore(&priv->lock, flags);
1748
1749 priv->cfg->ops->lib->post_associate(priv, priv->vif);
1750
1751 return 0;
1752}
1753
5bbe233b 1754void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB
1755 struct ieee80211_vif *vif,
1756 struct ieee80211_bss_conf *bss_conf,
1757 u32 changes)
5bbe233b
AK
1758{
1759 struct iwl_priv *priv = hw->priv;
3a650292 1760 int ret;
5bbe233b
AK
1761
1762 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
1763
2d0ddec5
JB
1764 if (!iwl_is_alive(priv))
1765 return;
1766
1767 mutex_lock(&priv->mutex);
1768
4ced3f74
JB
1769 if (changes & BSS_CHANGED_QOS) {
1770 unsigned long flags;
1771
1772 spin_lock_irqsave(&priv->lock, flags);
1773 priv->qos_data.qos_active = bss_conf->qos;
1774 iwl_update_qos(priv);
1775 spin_unlock_irqrestore(&priv->lock, flags);
1776 }
1777
92445c95 1778 if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) {
2d0ddec5
JB
1779 dev_kfree_skb(priv->ibss_beacon);
1780 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
1781 }
1782
d7129e19 1783 if (changes & BSS_CHANGED_BEACON_INT) {
d7129e19
JB
1784 /* TODO: in AP mode, do something to make this take effect */
1785 }
1786
1787 if (changes & BSS_CHANGED_BSSID) {
1788 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
1789
1790 /*
1791 * If there is currently a HW scan going on in the
1792 * background then we need to cancel it else the RXON
1793 * below/in post_associate will fail.
1794 */
2d0ddec5 1795 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 1796 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB
1797 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
1798 mutex_unlock(&priv->mutex);
1799 return;
1800 }
2d0ddec5 1801
d7129e19 1802 /* mac80211 only sets assoc when in STATION mode */
92445c95 1803 if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
d7129e19
JB
1804 memcpy(priv->staging_rxon.bssid_addr,
1805 bss_conf->bssid, ETH_ALEN);
2d0ddec5 1806
d7129e19
JB
1807 /* currently needed in a few places */
1808 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1809 } else {
1810 priv->staging_rxon.filter_flags &=
1811 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 1812 }
d7129e19 1813
2d0ddec5
JB
1814 }
1815
d7129e19
JB
1816 /*
1817 * This needs to be after setting the BSSID in case
1818 * mac80211 decides to do both changes at once because
1819 * it will invoke post_associate.
1820 */
92445c95 1821 if (vif->type == NL80211_IFTYPE_ADHOC &&
2d0ddec5
JB
1822 changes & BSS_CHANGED_BEACON) {
1823 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1824
1825 if (beacon)
1826 iwl_mac_beacon_update(hw, beacon);
1827 }
1828
5bbe233b
AK
1829 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1830 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
1831 bss_conf->use_short_preamble);
1832 if (bss_conf->use_short_preamble)
1833 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1834 else
1835 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1836 }
1837
1838 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
1839 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
1840 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
1841 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
1842 else
1843 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
94597ab2
JB
1844 if (bss_conf->use_cts_prot)
1845 priv->staging_rxon.flags |= RXON_FLG_SELF_CTS_EN;
1846 else
1847 priv->staging_rxon.flags &= ~RXON_FLG_SELF_CTS_EN;
5bbe233b
AK
1848 }
1849
d7129e19
JB
1850 if (changes & BSS_CHANGED_BASIC_RATES) {
1851 /* XXX use this information
1852 *
1853 * To do that, remove code from iwl_set_rate() and put something
1854 * like this here:
1855 *
1856 if (A-band)
1857 priv->staging_rxon.ofdm_basic_rates =
1858 bss_conf->basic_rates;
1859 else
1860 priv->staging_rxon.ofdm_basic_rates =
1861 bss_conf->basic_rates >> 4;
1862 priv->staging_rxon.cck_basic_rates =
1863 bss_conf->basic_rates & 0xF;
1864 */
1865 }
1866
5bbe233b 1867 if (changes & BSS_CHANGED_HT) {
ca3c1f59 1868 iwl_ht_conf(priv, vif);
45823531
AK
1869
1870 if (priv->cfg->ops->hcmd->set_rxon_chain)
1871 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK
1872 }
1873
1874 if (changes & BSS_CHANGED_ASSOC) {
1875 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b 1876 if (bss_conf->assoc) {
5bbe233b 1877 priv->timestamp = bss_conf->timestamp;
5bbe233b 1878
e932a609
JB
1879 iwl_led_associate(priv);
1880
d7129e19 1881 if (!iwl_is_rfkill(priv))
1dda6d28 1882 priv->cfg->ops->lib->post_associate(priv, vif);
c91c3efc
AK
1883 } else
1884 iwl_set_no_assoc(priv);
d7129e19
JB
1885 }
1886
1dda6d28 1887 if (changes && iwl_is_associated(priv) && bss_conf->aid) {
d7129e19
JB
1888 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
1889 changes);
1890 ret = iwl_send_rxon_assoc(priv);
1891 if (!ret) {
1892 /* Sync active_rxon with latest change. */
1893 memcpy((void *)&priv->active_rxon,
1894 &priv->staging_rxon,
1895 sizeof(struct iwl_rxon_cmd));
5bbe233b 1896 }
5bbe233b 1897 }
d7129e19 1898
c91c3efc
AK
1899 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1900 if (vif->bss_conf.enable_beacon) {
1901 memcpy(priv->staging_rxon.bssid_addr,
1902 bss_conf->bssid, ETH_ALEN);
1903 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1dda6d28 1904 iwlcore_config_ap(priv, vif);
c91c3efc
AK
1905 } else
1906 iwl_set_no_assoc(priv);
f513dfff
DH
1907 }
1908
1fa61b2e
JB
1909 if (changes & BSS_CHANGED_IBSS) {
1910 ret = priv->cfg->ops->lib->manage_ibss_station(priv, vif,
1911 bss_conf->ibss_joined);
1912 if (ret)
1913 IWL_ERR(priv, "failed to %s IBSS station %pM\n",
1914 bss_conf->ibss_joined ? "add" : "remove",
1915 bss_conf->bssid);
1916 }
1917
d7129e19
JB
1918 mutex_unlock(&priv->mutex);
1919
2d0ddec5 1920 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK
1921}
1922EXPORT_SYMBOL(iwl_bss_info_changed);
1923
b55e75ed 1924static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
727882d6 1925{
1dda6d28 1926 iwl_connection_init_rx_config(priv, vif);
727882d6
AK
1927
1928 if (priv->cfg->ops->hcmd->set_rxon_chain)
1929 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1930
b55e75ed 1931 return iwlcore_commit_rxon(priv);
727882d6 1932}
727882d6 1933
b55e75ed 1934int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK
1935{
1936 struct iwl_priv *priv = hw->priv;
47e28f41 1937 int err = 0;
cbb6ab94 1938
3779db10
JB
1939 IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
1940 vif->type, vif->addr);
cbb6ab94 1941
47e28f41
JB
1942 mutex_lock(&priv->mutex);
1943
b55e75ed
JB
1944 if (WARN_ON(!iwl_is_ready_rf(priv))) {
1945 err = -EINVAL;
1946 goto out;
1947 }
1948
cbb6ab94
AK
1949 if (priv->vif) {
1950 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
47e28f41
JB
1951 err = -EOPNOTSUPP;
1952 goto out;
cbb6ab94
AK
1953 }
1954
1ed32e4f
JB
1955 priv->vif = vif;
1956 priv->iw_mode = vif->type;
cbb6ab94 1957
b55e75ed
JB
1958 err = iwl_set_mode(priv, vif);
1959 if (err)
1960 goto out_err;
7e246191 1961
b55e75ed 1962 goto out;
cbb6ab94 1963
b55e75ed
JB
1964 out_err:
1965 priv->vif = NULL;
1966 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 1967 out:
cbb6ab94
AK
1968 mutex_unlock(&priv->mutex);
1969
1970 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 1971 return err;
cbb6ab94
AK
1972}
1973EXPORT_SYMBOL(iwl_mac_add_interface);
1974
d8052319 1975void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b55e75ed 1976 struct ieee80211_vif *vif)
d8052319
AK
1977{
1978 struct iwl_priv *priv = hw->priv;
02f5ba5b 1979 bool scan_completed = false;
d8052319
AK
1980
1981 IWL_DEBUG_MAC80211(priv, "enter\n");
1982
1983 mutex_lock(&priv->mutex);
1984
1985 if (iwl_is_ready_rf(priv)) {
1986 iwl_scan_cancel_timeout(priv, 100);
1987 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
1988 iwlcore_commit_rxon(priv);
1989 }
1ed32e4f 1990 if (priv->vif == vif) {
d8052319 1991 priv->vif = NULL;
f84b29ec 1992 if (priv->scan_vif == vif) {
02f5ba5b 1993 scan_completed = true;
f84b29ec
JB
1994 priv->scan_vif = NULL;
1995 priv->scan_request = NULL;
1996 }
d8052319
AK
1997 memset(priv->bssid, 0, ETH_ALEN);
1998 }
1999 mutex_unlock(&priv->mutex);
2000
02f5ba5b
JB
2001 if (scan_completed)
2002 ieee80211_scan_completed(priv->hw, true);
2003
d8052319
AK
2004 IWL_DEBUG_MAC80211(priv, "leave\n");
2005
2006}
2007EXPORT_SYMBOL(iwl_mac_remove_interface);
2008
4808368d
AK
2009/**
2010 * iwl_mac_config - mac80211 config callback
4808368d
AK
2011 */
2012int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2013{
2014 struct iwl_priv *priv = hw->priv;
2015 const struct iwl_channel_info *ch_info;
2016 struct ieee80211_conf *conf = &hw->conf;
fad95bf5 2017 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
4808368d
AK
2018 unsigned long flags = 0;
2019 int ret = 0;
2020 u16 ch;
2021 int scan_active = 0;
2022
2023 mutex_lock(&priv->mutex);
2024
4808368d
AK
2025 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2026 conf->channel->hw_value, changed);
2027
2028 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2029 test_bit(STATUS_SCANNING, &priv->status))) {
2030 scan_active = 1;
2031 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2032 }
2033
ba37a3d0
JB
2034 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2035 IEEE80211_CONF_CHANGE_CHANNEL)) {
2036 /* mac80211 uses static for non-HT which is what we want */
2037 priv->current_ht_config.smps = conf->smps_mode;
2038
2039 /*
2040 * Recalculate chain counts.
2041 *
2042 * If monitor mode is enabled then mac80211 will
2043 * set up the SM PS mode to OFF if an HT channel is
2044 * configured.
2045 */
2046 if (priv->cfg->ops->hcmd->set_rxon_chain)
2047 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2048 }
4808368d
AK
2049
2050 /* during scanning mac80211 will delay channel setting until
2051 * scan finish with changed = 0
2052 */
2053 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2054 if (scan_active)
2055 goto set_ch_out;
2056
2057 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2058 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2059 if (!is_channel_valid(ch_info)) {
2060 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2061 ret = -EINVAL;
2062 goto set_ch_out;
2063 }
2064
4808368d
AK
2065 spin_lock_irqsave(&priv->lock, flags);
2066
28bd723b
DH
2067 /* Configure HT40 channels */
2068 ht_conf->is_ht = conf_is_ht(conf);
2069 if (ht_conf->is_ht) {
2070 if (conf_is_ht40_minus(conf)) {
2071 ht_conf->extension_chan_offset =
2072 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
c812ee24 2073 ht_conf->is_40mhz = true;
28bd723b
DH
2074 } else if (conf_is_ht40_plus(conf)) {
2075 ht_conf->extension_chan_offset =
2076 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
c812ee24 2077 ht_conf->is_40mhz = true;
28bd723b
DH
2078 } else {
2079 ht_conf->extension_chan_offset =
2080 IEEE80211_HT_PARAM_CHA_SEC_NONE;
c812ee24 2081 ht_conf->is_40mhz = false;
28bd723b
DH
2082 }
2083 } else
c812ee24 2084 ht_conf->is_40mhz = false;
28bd723b
DH
2085 /* Default to no protection. Protection mode will later be set
2086 * from BSS config in iwl_ht_conf */
2087 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
4808368d
AK
2088
2089 /* if we are switching from ht to 2.4 clear flags
2090 * from any ht related info since 2.4 does not
2091 * support ht */
2092 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2093 priv->staging_rxon.flags = 0;
2094
2095 iwl_set_rxon_channel(priv, conf->channel);
5e2f75b8 2096 iwl_set_rxon_ht(priv, ht_conf);
4808368d 2097
1dda6d28 2098 iwl_set_flags_for_band(priv, conf->channel->band, priv->vif);
4808368d 2099 spin_unlock_irqrestore(&priv->lock, flags);
79d07325 2100
278c2f6f
DH
2101 if (priv->cfg->ops->lib->update_bcast_station)
2102 ret = priv->cfg->ops->lib->update_bcast_station(priv);
2103
4808368d
AK
2104 set_ch_out:
2105 /* The list of supported rates and rate mask can be different
2106 * for each band; since the band may have changed, reset
2107 * the rate mask to what mac80211 lists */
2108 iwl_set_rate(priv);
2109 }
2110
78f5fb7f
JB
2111 if (changed & (IEEE80211_CONF_CHANGE_PS |
2112 IEEE80211_CONF_CHANGE_IDLE)) {
e312c24c 2113 ret = iwl_power_update_mode(priv, false);
4808368d 2114 if (ret)
e312c24c 2115 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK
2116 }
2117
2118 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2119 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2120 priv->tx_power_user_lmt, conf->power_level);
2121
2122 iwl_set_tx_power(priv, conf->power_level, false);
2123 }
2124
0cf4c01e
MA
2125 if (!iwl_is_ready(priv)) {
2126 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2127 goto out;
2128 }
2129
4808368d
AK
2130 if (scan_active)
2131 goto out;
2132
2133 if (memcmp(&priv->active_rxon,
2134 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2135 iwlcore_commit_rxon(priv);
2136 else
2137 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2138
2139
2140out:
2141 IWL_DEBUG_MAC80211(priv, "leave\n");
2142 mutex_unlock(&priv->mutex);
2143 return ret;
2144}
2145EXPORT_SYMBOL(iwl_mac_config);
2146
bd564261
AK
2147void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2148{
2149 struct iwl_priv *priv = hw->priv;
2150 unsigned long flags;
2151
2152 mutex_lock(&priv->mutex);
2153 IWL_DEBUG_MAC80211(priv, "enter\n");
2154
2155 spin_lock_irqsave(&priv->lock, flags);
fad95bf5 2156 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
bd564261
AK
2157 spin_unlock_irqrestore(&priv->lock, flags);
2158
bd564261 2159 spin_lock_irqsave(&priv->lock, flags);
bd564261
AK
2160
2161 /* new association get rid of ibss beacon skb */
2162 if (priv->ibss_beacon)
2163 dev_kfree_skb(priv->ibss_beacon);
2164
2165 priv->ibss_beacon = NULL;
2166
bd564261 2167 priv->timestamp = 0;
bd564261
AK
2168
2169 spin_unlock_irqrestore(&priv->lock, flags);
2170
2171 if (!iwl_is_ready_rf(priv)) {
2172 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2173 mutex_unlock(&priv->mutex);
2174 return;
2175 }
2176
2177 /* we are restarting association process
2178 * clear RXON_FILTER_ASSOC_MSK bit
2179 */
b4665df4
JB
2180 iwl_scan_cancel_timeout(priv, 100);
2181 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2182 iwlcore_commit_rxon(priv);
bd564261
AK
2183
2184 iwl_set_rate(priv);
2185
2186 mutex_unlock(&priv->mutex);
2187
2188 IWL_DEBUG_MAC80211(priv, "leave\n");
2189}
2190EXPORT_SYMBOL(iwl_mac_reset_tsf);
2191
88804e2b
WYG
2192int iwl_alloc_txq_mem(struct iwl_priv *priv)
2193{
2194 if (!priv->txq)
2195 priv->txq = kzalloc(
2196 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2197 GFP_KERNEL);
2198 if (!priv->txq) {
91dd6c27 2199 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG
2200 return -ENOMEM;
2201 }
2202 return 0;
2203}
2204EXPORT_SYMBOL(iwl_alloc_txq_mem);
2205
2206void iwl_free_txq_mem(struct iwl_priv *priv)
2207{
2208 kfree(priv->txq);
2209 priv->txq = NULL;
2210}
2211EXPORT_SYMBOL(iwl_free_txq_mem);
2212
20594eb0
WYG
2213#ifdef CONFIG_IWLWIFI_DEBUGFS
2214
2215#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2216
2217void iwl_reset_traffic_log(struct iwl_priv *priv)
2218{
2219 priv->tx_traffic_idx = 0;
2220 priv->rx_traffic_idx = 0;
2221 if (priv->tx_traffic)
2222 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2223 if (priv->rx_traffic)
2224 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2225}
2226
2227int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2228{
2229 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2230
2231 if (iwl_debug_level & IWL_DL_TX) {
2232 if (!priv->tx_traffic) {
2233 priv->tx_traffic =
2234 kzalloc(traffic_size, GFP_KERNEL);
2235 if (!priv->tx_traffic)
2236 return -ENOMEM;
2237 }
2238 }
2239 if (iwl_debug_level & IWL_DL_RX) {
2240 if (!priv->rx_traffic) {
2241 priv->rx_traffic =
2242 kzalloc(traffic_size, GFP_KERNEL);
2243 if (!priv->rx_traffic)
2244 return -ENOMEM;
2245 }
2246 }
2247 iwl_reset_traffic_log(priv);
2248 return 0;
2249}
2250EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2251
2252void iwl_free_traffic_mem(struct iwl_priv *priv)
2253{
2254 kfree(priv->tx_traffic);
2255 priv->tx_traffic = NULL;
2256
2257 kfree(priv->rx_traffic);
2258 priv->rx_traffic = NULL;
2259}
2260EXPORT_SYMBOL(iwl_free_traffic_mem);
2261
2262void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2263 u16 length, struct ieee80211_hdr *header)
2264{
2265 __le16 fc;
2266 u16 len;
2267
2268 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2269 return;
2270
2271 if (!priv->tx_traffic)
2272 return;
2273
2274 fc = header->frame_control;
2275 if (ieee80211_is_data(fc)) {
2276 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2277 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2278 memcpy((priv->tx_traffic +
2279 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2280 header, len);
2281 priv->tx_traffic_idx =
2282 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2283 }
2284}
2285EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2286
2287void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2288 u16 length, struct ieee80211_hdr *header)
2289{
2290 __le16 fc;
2291 u16 len;
2292
2293 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2294 return;
2295
2296 if (!priv->rx_traffic)
2297 return;
2298
2299 fc = header->frame_control;
2300 if (ieee80211_is_data(fc)) {
2301 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2302 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2303 memcpy((priv->rx_traffic +
2304 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2305 header, len);
2306 priv->rx_traffic_idx =
2307 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2308 }
2309}
2310EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG
2311
2312const char *get_mgmt_string(int cmd)
2313{
2314 switch (cmd) {
2315 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2316 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2317 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2318 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2319 IWL_CMD(MANAGEMENT_PROBE_REQ);
2320 IWL_CMD(MANAGEMENT_PROBE_RESP);
2321 IWL_CMD(MANAGEMENT_BEACON);
2322 IWL_CMD(MANAGEMENT_ATIM);
2323 IWL_CMD(MANAGEMENT_DISASSOC);
2324 IWL_CMD(MANAGEMENT_AUTH);
2325 IWL_CMD(MANAGEMENT_DEAUTH);
2326 IWL_CMD(MANAGEMENT_ACTION);
2327 default:
2328 return "UNKNOWN";
2329
2330 }
2331}
2332
2333const char *get_ctrl_string(int cmd)
2334{
2335 switch (cmd) {
2336 IWL_CMD(CONTROL_BACK_REQ);
2337 IWL_CMD(CONTROL_BACK);
2338 IWL_CMD(CONTROL_PSPOLL);
2339 IWL_CMD(CONTROL_RTS);
2340 IWL_CMD(CONTROL_CTS);
2341 IWL_CMD(CONTROL_ACK);
2342 IWL_CMD(CONTROL_CFEND);
2343 IWL_CMD(CONTROL_CFENDACK);
2344 default:
2345 return "UNKNOWN";
2346
2347 }
2348}
2349
7163b8a4 2350void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG
2351{
2352 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9 2353 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
7163b8a4 2354 priv->led_tpt = 0;
22fdf3c9
WYG
2355}
2356
2357/*
2358 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2359 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2360 * Use debugFs to display the rx/rx_statistics
2361 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2362 * information will be recorded, but DATA pkt still will be recorded
2363 * for the reason of iwl_led.c need to control the led blinking based on
2364 * number of tx and rx data.
2365 *
2366 */
2367void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2368{
2369 struct traffic_stats *stats;
2370
2371 if (is_tx)
2372 stats = &priv->tx_stats;
2373 else
2374 stats = &priv->rx_stats;
2375
2376 if (ieee80211_is_mgmt(fc)) {
2377 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2378 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2379 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2380 break;
2381 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2382 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2383 break;
2384 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2385 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2386 break;
2387 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2388 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2389 break;
2390 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2391 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2392 break;
2393 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2394 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2395 break;
2396 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2397 stats->mgmt[MANAGEMENT_BEACON]++;
2398 break;
2399 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2400 stats->mgmt[MANAGEMENT_ATIM]++;
2401 break;
2402 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2403 stats->mgmt[MANAGEMENT_DISASSOC]++;
2404 break;
2405 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2406 stats->mgmt[MANAGEMENT_AUTH]++;
2407 break;
2408 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2409 stats->mgmt[MANAGEMENT_DEAUTH]++;
2410 break;
2411 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2412 stats->mgmt[MANAGEMENT_ACTION]++;
2413 break;
2414 }
2415 } else if (ieee80211_is_ctl(fc)) {
2416 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2417 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2418 stats->ctrl[CONTROL_BACK_REQ]++;
2419 break;
2420 case cpu_to_le16(IEEE80211_STYPE_BACK):
2421 stats->ctrl[CONTROL_BACK]++;
2422 break;
2423 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2424 stats->ctrl[CONTROL_PSPOLL]++;
2425 break;
2426 case cpu_to_le16(IEEE80211_STYPE_RTS):
2427 stats->ctrl[CONTROL_RTS]++;
2428 break;
2429 case cpu_to_le16(IEEE80211_STYPE_CTS):
2430 stats->ctrl[CONTROL_CTS]++;
2431 break;
2432 case cpu_to_le16(IEEE80211_STYPE_ACK):
2433 stats->ctrl[CONTROL_ACK]++;
2434 break;
2435 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2436 stats->ctrl[CONTROL_CFEND]++;
2437 break;
2438 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2439 stats->ctrl[CONTROL_CFENDACK]++;
2440 break;
2441 }
2442 } else {
2443 /* data */
2444 stats->data_cnt++;
2445 stats->data_bytes += len;
2446 }
d5f4cf71 2447 iwl_leds_background(priv);
22fdf3c9
WYG
2448}
2449EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG
2450#endif
2451
a0ea9493 2452static const char *get_csr_string(int cmd)
696bdee3
WYG
2453{
2454 switch (cmd) {
2455 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2456 IWL_CMD(CSR_INT_COALESCING);
2457 IWL_CMD(CSR_INT);
2458 IWL_CMD(CSR_INT_MASK);
2459 IWL_CMD(CSR_FH_INT_STATUS);
2460 IWL_CMD(CSR_GPIO_IN);
2461 IWL_CMD(CSR_RESET);
2462 IWL_CMD(CSR_GP_CNTRL);
2463 IWL_CMD(CSR_HW_REV);
2464 IWL_CMD(CSR_EEPROM_REG);
2465 IWL_CMD(CSR_EEPROM_GP);
2466 IWL_CMD(CSR_OTP_GP_REG);
2467 IWL_CMD(CSR_GIO_REG);
2468 IWL_CMD(CSR_GP_UCODE_REG);
2469 IWL_CMD(CSR_GP_DRIVER_REG);
2470 IWL_CMD(CSR_UCODE_DRV_GP1);
2471 IWL_CMD(CSR_UCODE_DRV_GP2);
2472 IWL_CMD(CSR_LED_REG);
2473 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2474 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2475 IWL_CMD(CSR_ANA_PLL_CFG);
2476 IWL_CMD(CSR_HW_REV_WA_REG);
2477 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2478 default:
2479 return "UNKNOWN";
2480
2481 }
2482}
2483
2484void iwl_dump_csr(struct iwl_priv *priv)
2485{
2486 int i;
2487 u32 csr_tbl[] = {
2488 CSR_HW_IF_CONFIG_REG,
2489 CSR_INT_COALESCING,
2490 CSR_INT,
2491 CSR_INT_MASK,
2492 CSR_FH_INT_STATUS,
2493 CSR_GPIO_IN,
2494 CSR_RESET,
2495 CSR_GP_CNTRL,
2496 CSR_HW_REV,
2497 CSR_EEPROM_REG,
2498 CSR_EEPROM_GP,
2499 CSR_OTP_GP_REG,
2500 CSR_GIO_REG,
2501 CSR_GP_UCODE_REG,
2502 CSR_GP_DRIVER_REG,
2503 CSR_UCODE_DRV_GP1,
2504 CSR_UCODE_DRV_GP2,
2505 CSR_LED_REG,
2506 CSR_DRAM_INT_TBL_REG,
2507 CSR_GIO_CHICKEN_BITS,
2508 CSR_ANA_PLL_CFG,
2509 CSR_HW_REV_WA_REG,
2510 CSR_DBG_HPET_MEM_REG
2511 };
2512 IWL_ERR(priv, "CSR values:\n");
2513 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2514 "CSR_INT_PERIODIC_REG)\n");
2515 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2516 IWL_ERR(priv, " %25s: 0X%08x\n",
2517 get_csr_string(csr_tbl[i]),
2518 iwl_read32(priv, csr_tbl[i]));
2519 }
2520}
2521EXPORT_SYMBOL(iwl_dump_csr);
2522
a0ea9493 2523static const char *get_fh_string(int cmd)
1b3eb823
WYG
2524{
2525 switch (cmd) {
2526 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2527 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2528 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2529 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2530 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2531 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2532 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2533 IWL_CMD(FH_TSSR_TX_STATUS_REG);
2534 IWL_CMD(FH_TSSR_TX_ERROR_REG);
2535 default:
2536 return "UNKNOWN";
2537
2538 }
2539}
2540
2541int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2542{
2543 int i;
2544#ifdef CONFIG_IWLWIFI_DEBUG
2545 int pos = 0;
2546 size_t bufsz = 0;
2547#endif
2548 u32 fh_tbl[] = {
2549 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2550 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2551 FH_RSCSR_CHNL0_WPTR,
2552 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2553 FH_MEM_RSSR_SHARED_CTRL_REG,
2554 FH_MEM_RSSR_RX_STATUS_REG,
2555 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2556 FH_TSSR_TX_STATUS_REG,
2557 FH_TSSR_TX_ERROR_REG
2558 };
2559#ifdef CONFIG_IWLWIFI_DEBUG
2560 if (display) {
2561 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2562 *buf = kmalloc(bufsz, GFP_KERNEL);
2563 if (!*buf)
2564 return -ENOMEM;
2565 pos += scnprintf(*buf + pos, bufsz - pos,
2566 "FH register values:\n");
2567 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2568 pos += scnprintf(*buf + pos, bufsz - pos,
2569 " %34s: 0X%08x\n",
2570 get_fh_string(fh_tbl[i]),
2571 iwl_read_direct32(priv, fh_tbl[i]));
2572 }
2573 return pos;
2574 }
2575#endif
2576 IWL_ERR(priv, "FH register values:\n");
2577 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2578 IWL_ERR(priv, " %34s: 0X%08x\n",
2579 get_fh_string(fh_tbl[i]),
2580 iwl_read_direct32(priv, fh_tbl[i]));
2581 }
2582 return 0;
2583}
2584EXPORT_SYMBOL(iwl_dump_fh);
2585
a93e7973 2586static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG
2587{
2588 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2589 return;
2590
2591 if (!iwl_is_associated(priv)) {
2592 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
2593 return;
2594 }
2595 /*
2596 * There is no easy and better way to force reset the radio,
2597 * the only known method is switching channel which will force to
2598 * reset and tune the radio.
2599 * Use internal short scan (single channel) operation to should
2600 * achieve this objective.
2601 * Driver should reset the radio when number of consecutive missed
2602 * beacon, or any other uCode error condition detected.
2603 */
2604 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
2605 iwl_internal_short_hw_scan(priv);
afbdd69a 2606}
a93e7973 2607
a93e7973 2608
c04f9f22 2609int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
a93e7973 2610{
8a472da4
WYG
2611 struct iwl_force_reset *force_reset;
2612
a93e7973
WYG
2613 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2614 return -EINVAL;
2615
7acc7c68
WYG
2616 if (test_bit(STATUS_SCANNING, &priv->status)) {
2617 IWL_DEBUG_INFO(priv, "scan in progress.\n");
2618 return -EINVAL;
2619 }
2620
8a472da4
WYG
2621 if (mode >= IWL_MAX_FORCE_RESET) {
2622 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
2623 return -EINVAL;
2624 }
2625 force_reset = &priv->force_reset[mode];
2626 force_reset->reset_request_count++;
c04f9f22
WYG
2627 if (!external) {
2628 if (force_reset->last_force_reset_jiffies &&
2629 time_after(force_reset->last_force_reset_jiffies +
2630 force_reset->reset_duration, jiffies)) {
2631 IWL_DEBUG_INFO(priv, "force reset rejected\n");
2632 force_reset->reset_reject_count++;
2633 return -EAGAIN;
2634 }
a93e7973 2635 }
8a472da4
WYG
2636 force_reset->reset_success_count++;
2637 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 2638 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG
2639 switch (mode) {
2640 case IWL_RF_RESET:
2641 iwl_force_rf_reset(priv);
2642 break;
2643 case IWL_FW_RESET:
c04f9f22
WYG
2644 /*
2645 * if the request is from external(ex: debugfs),
2646 * then always perform the request in regardless the module
2647 * parameter setting
2648 * if the request is from internal (uCode error or driver
2649 * detect failure), then fw_restart module parameter
2650 * need to be check before performing firmware reload
2651 */
2652 if (!external && !priv->cfg->mod_params->restart_fw) {
2653 IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
2654 "module parameter setting\n");
2655 break;
2656 }
a93e7973
WYG
2657 IWL_ERR(priv, "On demand firmware reload\n");
2658 /* Set the FW error flag -- cleared on iwl_down */
2659 set_bit(STATUS_FW_ERROR, &priv->status);
2660 wake_up_interruptible(&priv->wait_command_queue);
2661 /*
2662 * Keep the restart process from trying to send host
2663 * commands by clearing the INIT status bit
2664 */
2665 clear_bit(STATUS_READY, &priv->status);
2666 queue_work(priv->workqueue, &priv->restart);
2667 break;
a93e7973 2668 }
a93e7973
WYG
2669 return 0;
2670}
b74e31a9
WYG
2671EXPORT_SYMBOL(iwl_force_reset);
2672
2673/**
2674 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
2675 *
2676 * During normal condition (no queue is stuck), the timer is continually set to
2677 * execute every monitor_recover_period milliseconds after the last timer
2678 * expired. When the queue read_ptr is at the same place, the timer is
2679 * shorten to 100mSecs. This is
2680 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
2681 * 2) to detect the stuck queues quicker before the station and AP can
2682 * disassociate each other.
2683 *
2684 * This function monitors all the tx queues and recover from it if any
2685 * of the queues are stuck.
2686 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
2687 * it will recover by resetting the firmware and return.
2688 * 2. Then, it checks for station association. If it associates it will check
2689 * other queues. If any queue is stuck, it will recover by resetting
2690 * the firmware.
2691 * Note: It the number of times the queue read_ptr to be at the same place to
2692 * be MAX_REPEAT+1 in order to consider to be stuck.
2693 */
2694/*
2695 * The maximum number of times the read pointer of the tx queue at the
2696 * same place without considering to be stuck.
2697 */
2698#define MAX_REPEAT (2)
2699static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
2700{
2701 struct iwl_tx_queue *txq;
2702 struct iwl_queue *q;
2703
2704 txq = &priv->txq[cnt];
2705 q = &txq->q;
2706 /* queue is empty, skip */
2707 if (q->read_ptr != q->write_ptr) {
2708 if (q->read_ptr == q->last_read_ptr) {
2709 /* a queue has not been read from last time */
2710 if (q->repeat_same_read_ptr > MAX_REPEAT) {
2711 IWL_ERR(priv,
2712 "queue %d stuck %d time. Fw reload.\n",
2713 q->id, q->repeat_same_read_ptr);
2714 q->repeat_same_read_ptr = 0;
c04f9f22 2715 iwl_force_reset(priv, IWL_FW_RESET, false);
b74e31a9
WYG
2716 } else {
2717 q->repeat_same_read_ptr++;
2718 IWL_DEBUG_RADIO(priv,
2719 "queue %d, not read %d time\n",
2720 q->id,
2721 q->repeat_same_read_ptr);
2722 mod_timer(&priv->monitor_recover, jiffies +
2723 msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
2724 }
2725 return 1;
2726 } else {
2727 q->last_read_ptr = q->read_ptr;
2728 q->repeat_same_read_ptr = 0;
2729 }
2730 }
2731 return 0;
2732}
2733
2734void iwl_bg_monitor_recover(unsigned long data)
2735{
2736 struct iwl_priv *priv = (struct iwl_priv *)data;
2737 int cnt;
2738
2739 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2740 return;
2741
2742 /* monitor and check for stuck cmd queue */
2743 if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
2744 return;
2745
2746 /* monitor and check for other stuck queues */
2747 if (iwl_is_associated(priv)) {
2748 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
2749 /* skip as we already checked the command queue */
2750 if (cnt == IWL_CMD_QUEUE_NUM)
2751 continue;
2752 if (iwl_check_stuck_queue(priv, cnt))
2753 return;
2754 }
2755 }
2756 /*
2757 * Reschedule the timer to occur in
2758 * priv->cfg->monitor_recover_period
2759 */
2760 mod_timer(&priv->monitor_recover,
2761 jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
2762}
2763EXPORT_SYMBOL(iwl_bg_monitor_recover);
afbdd69a 2764
a0ee74cf
WYG
2765
2766/*
2767 * extended beacon time format
2768 * time in usec will be changed into a 32-bit value in extended:internal format
2769 * the extended part is the beacon counts
2770 * the internal part is the time in usec within one beacon interval
2771 */
2772u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
2773{
2774 u32 quot;
2775 u32 rem;
2776 u32 interval = beacon_interval * TIME_UNIT;
2777
2778 if (!interval || !usec)
2779 return 0;
2780
2781 quot = (usec / interval) &
2782 (iwl_beacon_time_mask_high(priv,
2783 priv->hw_params.beacon_time_tsf_bits) >>
2784 priv->hw_params.beacon_time_tsf_bits);
2785 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
2786 priv->hw_params.beacon_time_tsf_bits);
2787
2788 return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
2789}
2790EXPORT_SYMBOL(iwl_usecs_to_beacons);
2791
2792/* base is usually what we get from ucode with each received frame,
2793 * the same as HW timer counter counting down
2794 */
2795__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
2796 u32 addon, u32 beacon_interval)
2797{
2798 u32 base_low = base & iwl_beacon_time_mask_low(priv,
2799 priv->hw_params.beacon_time_tsf_bits);
2800 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
2801 priv->hw_params.beacon_time_tsf_bits);
2802 u32 interval = beacon_interval * TIME_UNIT;
2803 u32 res = (base & iwl_beacon_time_mask_high(priv,
2804 priv->hw_params.beacon_time_tsf_bits)) +
2805 (addon & iwl_beacon_time_mask_high(priv,
2806 priv->hw_params.beacon_time_tsf_bits));
2807
2808 if (base_low > addon_low)
2809 res += base_low - addon_low;
2810 else if (base_low < addon_low) {
2811 res += interval + base_low - addon_low;
2812 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2813 } else
2814 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2815
2816 return cpu_to_le32(res);
2817}
2818EXPORT_SYMBOL(iwl_add_beacon_time);
2819
6da3a13e
WYG
2820#ifdef CONFIG_PM
2821
2822int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2823{
2824 struct iwl_priv *priv = pci_get_drvdata(pdev);
2825
2826 /*
2827 * This function is called when system goes into suspend state
2828 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2829 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2830 * it will not call apm_ops.stop() to stop the DMA operation.
2831 * Calling apm_ops.stop here to make sure we stop the DMA.
2832 */
2833 priv->cfg->ops->lib->apm_ops.stop(priv);
2834
2835 pci_save_state(pdev);
2836 pci_disable_device(pdev);
2837 pci_set_power_state(pdev, PCI_D3hot);
2838
2839 return 0;
2840}
2841EXPORT_SYMBOL(iwl_pci_suspend);
2842
2843int iwl_pci_resume(struct pci_dev *pdev)
2844{
2845 struct iwl_priv *priv = pci_get_drvdata(pdev);
2846 int ret;
0ab84cff 2847 bool hw_rfkill = false;
6da3a13e 2848
cd398c31
AK
2849 /*
2850 * We disable the RETRY_TIMEOUT register (0x41) to keep
2851 * PCI Tx retries from interfering with C3 CPU state.
2852 */
2853 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2854
6da3a13e
WYG
2855 pci_set_power_state(pdev, PCI_D0);
2856 ret = pci_enable_device(pdev);
2857 if (ret)
2858 return ret;
2859 pci_restore_state(pdev);
2860 iwl_enable_interrupts(priv);
2861
0ab84cff
JB
2862 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
2863 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
2864 hw_rfkill = true;
2865
2866 if (hw_rfkill)
2867 set_bit(STATUS_RF_KILL_HW, &priv->status);
2868 else
2869 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2870
2871 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
2872
6da3a13e
WYG
2873 return 0;
2874}
2875EXPORT_SYMBOL(iwl_pci_resume);
2876
2877#endif /* CONFIG_PM */