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mac80211: move QoS-enable to BSS info
[net-next-2.6.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
1f447808 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
5a0e3ad6 33#include <linux/slab.h>
1d0a082d 34#include <net/mac80211.h>
df48c323 35
6bc913bd 36#include "iwl-eeprom.h"
3e0d4cb1 37#include "iwl-dev.h" /* FIXME: remove */
19335774 38#include "iwl-debug.h"
df48c323 39#include "iwl-core.h"
b661c819 40#include "iwl-io.h"
5da4b55f 41#include "iwl-power.h"
83dde8c9 42#include "iwl-sta.h"
ef850d7c 43#include "iwl-helpers.h"
df48c323 44
1d0a082d 45
df48c323
TW		 46MODULE_DESCRIPTION("iwl core");
47MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 48MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 49MODULE_LICENSE("GPL");
df48c323 50
06702a73
WYG		 51/*
52 * set bt_coex_active to true, uCode will do kill/defer
53 * every time the priority line is asserted (BT is sending signals on the
54 * priority line in the PCIx).
55 * set bt_coex_active to false, uCode will ignore the BT activity and
56 * perform the normal operation
57 *
58 * User might experience transmit issue on some platform due to WiFi/BT
59 * co-exist problem. The possible behaviors are:
60 * Able to scan and finding all the available AP
61 * Not able to associate with any AP
62 * On those platforms, WiFi communication can be restored by set
63 * "bt_coex_active" module parameter to "false"
64 *
65 * default: bt_coex_active = true (BT_COEX_ENABLE)
66 */
67static bool bt_coex_active = true;
68module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 69MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 70
c7de35cd
RR		 71#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
72 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
73 IWL_RATE_SISO_##s##M_PLCP, \
74 IWL_RATE_MIMO2_##s##M_PLCP,\
75 IWL_RATE_MIMO3_##s##M_PLCP,\
76 IWL_RATE_##r##M_IEEE, \
77 IWL_RATE_##ip##M_INDEX, \
78 IWL_RATE_##in##M_INDEX, \
79 IWL_RATE_##rp##M_INDEX, \
80 IWL_RATE_##rn##M_INDEX, \
81 IWL_RATE_##pp##M_INDEX, \
82 IWL_RATE_##np##M_INDEX }
83
a562a9dd
RC		 84u32 iwl_debug_level;
85EXPORT_SYMBOL(iwl_debug_level);
86
c7de35cd
RR		 87/*
88 * Parameter order:
89 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
90 *
91 * If there isn't a valid next or previous rate then INV is used which
92 * maps to IWL_RATE_INVALID
93 *
94 */
1826dcc0 95const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 96 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
97 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
98 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
99 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
100 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
101 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
102 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
103 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
104 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
105 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
106 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
107 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
108 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
109 /* FIXME:RS: ^^ should be INV (legacy) */
110};
1826dcc0 111EXPORT_SYMBOL(iwl_rates);
c7de35cd 112
e7d326ac
TW		 113int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
114{
115 int idx = 0;
116
117 /* HT rate format */
118 if (rate_n_flags & RATE_MCS_HT_MSK) {
119 idx = (rate_n_flags & 0xff);
120
60d32215
DH		 121 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
122 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
123 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 124 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
125
126 idx += IWL_FIRST_OFDM_RATE;
127 /* skip 9M not supported in ht*/
128 if (idx >= IWL_RATE_9M_INDEX)
129 idx += 1;
130 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
131 return idx;
132
133 /* legacy rate format, search for match in table */
134 } else {
135 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
136 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
137 return idx;
138 }
139
140 return -1;
141}
142EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
143
0e1654fa 144u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant, u8 valid)
76eff18b
TW		 145{
146 int i;
147 u8 ind = ant;
0e1654fa 148
76eff18b
TW		 149 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
150 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
0e1654fa 151 if (valid & BIT(ind))
76eff18b
TW		 152 return ind;
153 }
154 return ant;
155}
47ff65c4 156EXPORT_SYMBOL(iwl_toggle_tx_ant);
57bd1bea
TW		 157
158const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
159EXPORT_SYMBOL(iwl_bcast_addr);
160
161
1d0a082d
AK		 162/* This function both allocates and initializes hw and priv. */
163struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
164 struct ieee80211_ops *hw_ops)
165{
166 struct iwl_priv *priv;
167
168 /* mac80211 allocates memory for this device instance, including
169 * space for this driver's private structure */
170 struct ieee80211_hw *hw =
171 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
172 if (hw == NULL) {
a3139c59
SO		 173 printk(KERN_ERR "%s: Can not allocate network device\n",
174 cfg->name);
1d0a082d
AK		 175 goto out;
176 }
177
178 priv = hw->priv;
179 priv->hw = hw;
180
181out:
182 return hw;
183}
184EXPORT_SYMBOL(iwl_alloc_all);
185
b661c819
TW		 186void iwl_hw_detect(struct iwl_priv *priv)
187{
188 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
189 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
190 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
191}
192EXPORT_SYMBOL(iwl_hw_detect);
193
14d2aac5
AK		 194/*
195 * QoS support
196*/
e61146e3 197static void iwl_update_qos(struct iwl_priv *priv)
14d2aac5
AK		 198{
199 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
200 return;
201
202 priv->qos_data.def_qos_parm.qos_flags = 0;
203
14d2aac5
AK		 204 if (priv->qos_data.qos_active)
205 priv->qos_data.def_qos_parm.qos_flags |=
206 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
207
208 if (priv->current_ht_config.is_ht)
209 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
210
e61146e3
SG		 211 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
212 priv->qos_data.qos_active,
213 priv->qos_data.def_qos_parm.qos_flags);
14d2aac5 214
e61146e3
SG		 215 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
216 sizeof(struct iwl_qosparam_cmd),
217 &priv->qos_data.def_qos_parm, NULL);
14d2aac5 218}
c7de35cd 219
d9fe60de
JB		 220#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
221#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 222static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 223 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 224 enum ieee80211_band band)
225{
39130df3
RR		 226 u16 max_bit_rate = 0;
227 u8 rx_chains_num = priv->hw_params.rx_chains_num;
228 u8 tx_chains_num = priv->hw_params.tx_chains_num;
229
c7de35cd 230 ht_info->cap = 0;
d9fe60de 231 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 232
d9fe60de 233 ht_info->ht_supported = true;
c7de35cd 234
b261793d
DH		 235 if (priv->cfg->ht_greenfield_support)
236 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 237 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 238 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 239 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 240 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
241 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
242 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 243 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 244 }
c7de35cd
RR		 245
246 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 247 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 248
249 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
250 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
251
d9fe60de 252 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 253 if (rx_chains_num >= 2)
d9fe60de 254 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 255 if (rx_chains_num >= 3)
d9fe60de 256 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 257
258 /* Highest supported Rx data rate */
259 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 260 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
261 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 262
263 /* Tx MCS capabilities */
d9fe60de 264 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 265 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 266 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
267 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
268 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 269 }
c7de35cd 270}
c7de35cd 271
c7de35cd
RR		 272/**
273 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
274 */
534166de 275int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 276{
277 struct iwl_channel_info *ch;
278 struct ieee80211_supported_band *sband;
279 struct ieee80211_channel *channels;
280 struct ieee80211_channel *geo_ch;
281 struct ieee80211_rate *rates;
282 int i = 0;
283
284 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
285 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 286 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 287 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
288 return 0;
289 }
290
291 channels = kzalloc(sizeof(struct ieee80211_channel) *
292 priv->channel_count, GFP_KERNEL);
293 if (!channels)
294 return -ENOMEM;
295
5027309b 296 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 297 GFP_KERNEL);
298 if (!rates) {
299 kfree(channels);
300 return -ENOMEM;
301 }
302
303 /* 5.2GHz channels start after the 2.4GHz channels */
304 sband = &priv->bands[IEEE80211_BAND_5GHZ];
305 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
306 /* just OFDM */
307 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 308 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 309
49779293 310 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 311 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 312 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 313
314 sband = &priv->bands[IEEE80211_BAND_2GHZ];
315 sband->channels = channels;
316 /* OFDM & CCK */
317 sband->bitrates = rates;
5027309b 318 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 319
49779293 320 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 321 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 322 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 323
324 priv->ieee_channels = channels;
325 priv->ieee_rates = rates;
326
c7de35cd
RR		 327 for (i = 0; i < priv->channel_count; i++) {
328 ch = &priv->channel_info[i];
329
330 /* FIXME: might be removed if scan is OK */
331 if (!is_channel_valid(ch))
332 continue;
333
334 if (is_channel_a_band(ch))
335 sband = &priv->bands[IEEE80211_BAND_5GHZ];
336 else
337 sband = &priv->bands[IEEE80211_BAND_2GHZ];
338
339 geo_ch = &sband->channels[sband->n_channels++];
340
341 geo_ch->center_freq =
342 ieee80211_channel_to_frequency(ch->channel);
343 geo_ch->max_power = ch->max_power_avg;
344 geo_ch->max_antenna_gain = 0xff;
345 geo_ch->hw_value = ch->channel;
346
347 if (is_channel_valid(ch)) {
348 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
349 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
350
351 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
352 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
353
354 if (ch->flags & EEPROM_CHANNEL_RADAR)
355 geo_ch->flags |= IEEE80211_CHAN_RADAR;
356
7aafef1c 357 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 358
dc1b0973
WYG		 359 if (ch->max_power_avg > priv->tx_power_device_lmt)
360 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 361 } else {
362 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
363 }
364
e1623446 365 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 366 ch->channel, geo_ch->center_freq,
367 is_channel_a_band(ch) ? "5.2" : "2.4",
368 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
369 "restricted" : "valid",
370 geo_ch->flags);
371 }
372
373 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
374 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 375 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
376 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 377 priv->pci_dev->device,
378 priv->pci_dev->subsystem_device);
c7de35cd
RR		 379 priv->cfg->sku &= ~IWL_SKU_A;
380 }
381
978785a3 382 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 383 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
384 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 385
386 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
387
388 return 0;
389}
534166de 390EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 391
392/*
393 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
394 */
534166de 395void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 396{
397 kfree(priv->ieee_channels);
398 kfree(priv->ieee_rates);
399 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
400}
534166de 401EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 402
37dc70fe
AK		 403/*
404 * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
405 * function.
406 */
407void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
408 __le32 *tx_flags)
409{
410 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
411 *tx_flags |= TX_CMD_FLG_RTS_MSK;
412 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
413 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
414 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
415 *tx_flags |= TX_CMD_FLG_CTS_MSK;
416 }
417}
418EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
419
28a6b07a 420static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd 421{
ba37a3d0 422 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
02bb1bea 423 priv->current_ht_config.single_chain_sufficient;
c7de35cd 424}
963f5517 425
47c5196e
TW		 426static u8 iwl_is_channel_extension(struct iwl_priv *priv,
427 enum ieee80211_band band,
428 u16 channel, u8 extension_chan_offset)
429{
430 const struct iwl_channel_info *ch_info;
431
432 ch_info = iwl_get_channel_info(priv, band, channel);
433 if (!is_channel_valid(ch_info))
434 return 0;
435
d9fe60de 436 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 437 return !(ch_info->ht40_extension_channel &
689da1b3 438 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 439 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 440 return !(ch_info->ht40_extension_channel &
689da1b3 441 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e
TW		 442
443 return 0;
444}
445
7aafef1c 446u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
d9fe60de 447 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e 448{
fad95bf5 449 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
47c5196e 450
fad95bf5 451 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
47c5196e
TW		 452 return 0;
453
a2b0f02e
WYG		 454 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
455 * the bit will not set if it is pure 40MHz case
456 */
47c5196e 457 if (sta_ht_inf) {
a2b0f02e 458 if (!sta_ht_inf->ht_supported)
47c5196e
TW		 459 return 0;
460 }
d73e4923 461#ifdef CONFIG_IWLWIFI_DEBUGFS
1e4247d4
WYG		 462 if (priv->disable_ht40)
463 return 0;
464#endif
611d3eb7
WYG		 465 return iwl_is_channel_extension(priv, priv->band,
466 le16_to_cpu(priv->staging_rxon.channel),
fad95bf5 467 ht_conf->extension_chan_offset);
47c5196e 468}
7aafef1c 469EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 470
2c2f3b33
TW		 471static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
472{
473 u16 new_val = 0;
474 u16 beacon_factor = 0;
475
476 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
477 new_val = beacon_val / beacon_factor;
478
479 if (!new_val)
480 new_val = max_beacon_val;
481
482 return new_val;
483}
484
1dda6d28 485void iwl_setup_rxon_timing(struct iwl_priv *priv, struct ieee80211_vif *vif)
2c2f3b33
TW		 486{
487 u64 tsf;
488 s32 interval_tm, rem;
489 unsigned long flags;
490 struct ieee80211_conf *conf = NULL;
491 u16 beacon_int;
492
493 conf = ieee80211_get_hw_conf(priv->hw);
494
495 spin_lock_irqsave(&priv->lock, flags);
496 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
497 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
498
1dda6d28 499 beacon_int = vif->bss_conf.beacon_int;
2c2f3b33 500
1dda6d28 501 if (vif->type == NL80211_IFTYPE_ADHOC) {
2c2f3b33
TW		 502 /* TODO: we need to get atim_window from upper stack
503 * for now we set to 0 */
504 priv->rxon_timing.atim_window = 0;
1dda6d28
JB		 505 } else {
506 priv->rxon_timing.atim_window = 0;
2c2f3b33
TW		 507 }
508
509 beacon_int = iwl_adjust_beacon_interval(beacon_int,
f8525e55 510 priv->hw_params.max_beacon_itrvl * TIME_UNIT);
2c2f3b33
TW		 511 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
512
513 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
f8525e55 514 interval_tm = beacon_int * TIME_UNIT;
2c2f3b33
TW		 515 rem = do_div(tsf, interval_tm);
516 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
517
518 spin_unlock_irqrestore(&priv->lock, flags);
519 IWL_DEBUG_ASSOC(priv,
520 "beacon interval %d beacon timer %d beacon tim %d\n",
521 le16_to_cpu(priv->rxon_timing.beacon_interval),
522 le32_to_cpu(priv->rxon_timing.beacon_init_val),
523 le16_to_cpu(priv->rxon_timing.atim_window));
524}
525EXPORT_SYMBOL(iwl_setup_rxon_timing);
526
8ccde88a
SO		 527void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
528{
529 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
530
531 if (hw_decrypt)
532 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
533 else
534 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
535
536}
537EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
538
539/**
540 * iwl_check_rxon_cmd - validate RXON structure is valid
541 *
542 * NOTE: This is really only useful during development and can eventually
543 * be #ifdef'd out once the driver is stable and folks aren't actively
544 * making changes
545 */
546int iwl_check_rxon_cmd(struct iwl_priv *priv)
547{
548 int error = 0;
549 int counter = 1;
550 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
551
552 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
553 error |= le32_to_cpu(rxon->flags &
554 (RXON_FLG_TGJ_NARROW_BAND_MSK |
555 RXON_FLG_RADAR_DETECT_MSK));
556 if (error)
557 IWL_WARN(priv, "check 24G fields %d | %d\n",
558 counter++, error);
559 } else {
560 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
561 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
562 if (error)
563 IWL_WARN(priv, "check 52 fields %d | %d\n",
564 counter++, error);
565 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
566 if (error)
567 IWL_WARN(priv, "check 52 CCK %d | %d\n",
568 counter++, error);
569 }
570 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
571 if (error)
572 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
573
574 /* make sure basic rates 6Mbps and 1Mbps are supported */
575 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
576 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
577 if (error)
578 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
579
580 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
581 if (error)
582 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
583
584 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
585 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
586 if (error)
587 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
588 counter++, error);
589
590 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
591 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
592 if (error)
593 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
594 counter++, error);
595
596 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
597 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
598 if (error)
599 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
600 counter++, error);
601
602 if (error)
603 IWL_WARN(priv, "Tuning to channel %d\n",
604 le16_to_cpu(rxon->channel));
605
606 if (error) {
607 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
608 return -1;
609 }
610 return 0;
611}
612EXPORT_SYMBOL(iwl_check_rxon_cmd);
613
614/**
615 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
616 * @priv: staging_rxon is compared to active_rxon
617 *
618 * If the RXON structure is changing enough to require a new tune,
619 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
620 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
621 */
622int iwl_full_rxon_required(struct iwl_priv *priv)
623{
624
625 /* These items are only settable from the full RXON command */
626 if (!(iwl_is_associated(priv)) ||
627 compare_ether_addr(priv->staging_rxon.bssid_addr,
628 priv->active_rxon.bssid_addr) ||
629 compare_ether_addr(priv->staging_rxon.node_addr,
630 priv->active_rxon.node_addr) ||
631 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
632 priv->active_rxon.wlap_bssid_addr) ||
633 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
634 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
635 (priv->staging_rxon.air_propagation !=
636 priv->active_rxon.air_propagation) ||
637 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
638 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
639 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
640 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH		 641 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
642 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO		 643 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
644 return 1;
645
646 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
647 * be updated with the RXON_ASSOC command -- however only some
648 * flag transitions are allowed using RXON_ASSOC */
649
650 /* Check if we are not switching bands */
651 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
652 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
653 return 1;
654
655 /* Check if we are switching association toggle */
656 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
657 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
658 return 1;
659
660 return 0;
661}
662EXPORT_SYMBOL(iwl_full_rxon_required);
663
664u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
665{
4a02886b
JB		 666 /*
667 * Assign the lowest rate -- should really get this from
668 * the beacon skb from mac80211.
669 */
8ccde88a
SO		 670 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
671 return IWL_RATE_1M_PLCP;
672 else
673 return IWL_RATE_6M_PLCP;
674}
675EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
676
fad95bf5 677void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
47c5196e 678{
c1adf9fb 679 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e 680
fad95bf5 681 if (!ht_conf->is_ht) {
a2b0f02e 682 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 683 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 684 RXON_FLG_HT40_PROT_MSK |
42eb7c64 685 RXON_FLG_HT_PROT_MSK);
47c5196e 686 return;
42eb7c64 687 }
47c5196e 688
a2b0f02e
WYG		 689 /* FIXME: if the definition of ht_protection changed, the "translation"
690 * will be needed for rxon->flags
691 */
fad95bf5 692 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 693
694 /* Set up channel bandwidth:
7aafef1c 695 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 696 /* clear the HT channel mode before set the mode */
697 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
698 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7aafef1c
WYG		 699 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
700 /* pure ht40 */
fad95bf5 701 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 702 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 703 /* Note: control channel is opposite of extension channel */
fad95bf5 704 switch (ht_conf->extension_chan_offset) {
508b08e7
WYG		 705 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
706 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
707 break;
708 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
709 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
710 break;
711 }
712 } else {
a2b0f02e 713 /* Note: control channel is opposite of extension channel */
fad95bf5 714 switch (ht_conf->extension_chan_offset) {
a2b0f02e
WYG		 715 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
716 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
717 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
718 break;
719 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
720 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
721 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
722 break;
723 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
724 default:
725 /* channel location only valid if in Mixed mode */
726 IWL_ERR(priv, "invalid extension channel offset\n");
727 break;
728 }
729 }
730 } else {
731 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 732 }
733
45823531
AK		 734 if (priv->cfg->ops->hcmd->set_rxon_chain)
735 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 736
02bb1bea 737 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 738 "extension channel offset 0x%x\n",
fad95bf5
JB		 739 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
740 ht_conf->extension_chan_offset);
47c5196e
TW		 741}
742EXPORT_SYMBOL(iwl_set_rxon_ht);
743
9e5e6c32
TW		 744#define IWL_NUM_RX_CHAINS_MULTIPLE 3
745#define IWL_NUM_RX_CHAINS_SINGLE 2
746#define IWL_NUM_IDLE_CHAINS_DUAL 2
747#define IWL_NUM_IDLE_CHAINS_SINGLE 1
748
2b396a12
JB		 749/*
750 * Determine how many receiver/antenna chains to use.
751 *
752 * More provides better reception via diversity. Fewer saves power
753 * at the expense of throughput, but only when not in powersave to
754 * start with.
755 *
c7de35cd
RR		 756 * MIMO (dual stream) requires at least 2, but works better with 3.
757 * This does not determine *which* chains to use, just how many.
758 */
28a6b07a 759static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 760{
c7de35cd 761 /* # of Rx chains to use when expecting MIMO. */
02bb1bea 762 if (is_single_rx_stream(priv))
9e5e6c32 763 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 764 else
9e5e6c32 765 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 766}
c7de35cd 767
2b396a12 768/*
3f3e0376
WYG		 769 * When we are in power saving mode, unless device support spatial
770 * multiplexing power save, use the active count for rx chain count.
2b396a12 771 */
28a6b07a
TW		 772static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
773{
ba37a3d0
JB		 774 /* # Rx chains when idling, depending on SMPS mode */
775 switch (priv->current_ht_config.smps) {
776 case IEEE80211_SMPS_STATIC:
777 case IEEE80211_SMPS_DYNAMIC:
778 return IWL_NUM_IDLE_CHAINS_SINGLE;
779 case IEEE80211_SMPS_OFF:
780 return active_cnt;
c15d20c1 781 default:
ba37a3d0
JB		 782 WARN(1, "invalid SMPS mode %d",
783 priv->current_ht_config.smps);
784 return active_cnt;
3f3e0376 785 }
c7de35cd
RR		 786}
787
04816448
GE		 788/* up to 4 chains */
789static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
790{
791 u8 res;
792 res = (chain_bitmap & BIT(0)) >> 0;
793 res += (chain_bitmap & BIT(1)) >> 1;
794 res += (chain_bitmap & BIT(2)) >> 2;
9bddbab3 795 res += (chain_bitmap & BIT(3)) >> 3;
04816448
GE		 796 return res;
797}
798
c7de35cd
RR		 799/**
800 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
801 *
802 * Selects how many and which Rx receivers/antennas/chains to use.
803 * This should not be used for scan command ... it puts data in wrong place.
804 */
805void iwl_set_rxon_chain(struct iwl_priv *priv)
806{
28a6b07a
TW		 807 bool is_single = is_single_rx_stream(priv);
808 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 809 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
810 u32 active_chains;
28a6b07a 811 u16 rx_chain;
c7de35cd
RR		 812
813 /* Tell uCode which antennas are actually connected.
814 * Before first association, we assume all antennas are connected.
815 * Just after first association, iwl_chain_noise_calibration()
816 * checks which antennas actually *are* connected. */
04816448
GE		 817 if (priv->chain_noise_data.active_chains)
818 active_chains = priv->chain_noise_data.active_chains;
819 else
820 active_chains = priv->hw_params.valid_rx_ant;
821
822 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 823
824 /* How many receivers should we use? */
28a6b07a
TW		 825 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
826 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
827
28a6b07a 828
04816448
GE		 829 /* correct rx chain count according hw settings
830 * and chain noise calibration
831 */
832 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
833 if (valid_rx_cnt < active_rx_cnt)
834 active_rx_cnt = valid_rx_cnt;
835
836 if (valid_rx_cnt < idle_rx_cnt)
837 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 838
839 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
840 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
841
842 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
843
9e5e6c32 844 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR		 845 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
846 else
847 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
848
e1623446 849 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW		 850 priv->staging_rxon.rx_chain,
851 active_rx_cnt, idle_rx_cnt);
852
853 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
854 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 855}
856EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f 857
14023641
AK		 858/* Return valid channel */
859u8 iwl_get_single_channel_number(struct iwl_priv *priv,
860 enum ieee80211_band band)
861{
862 const struct iwl_channel_info *ch_info;
863 int i;
864 u8 channel = 0;
865
866 /* only scan single channel, good enough to reset the RF */
867 /* pick the first valid not in-use channel */
868 if (band == IEEE80211_BAND_5GHZ) {
869 for (i = 14; i < priv->channel_count; i++) {
870 if (priv->channel_info[i].channel !=
871 le16_to_cpu(priv->staging_rxon.channel)) {
872 channel = priv->channel_info[i].channel;
873 ch_info = iwl_get_channel_info(priv,
874 band, channel);
875 if (is_channel_valid(ch_info))
876 break;
877 }
878 }
879 } else {
880 for (i = 0; i < 14; i++) {
881 if (priv->channel_info[i].channel !=
882 le16_to_cpu(priv->staging_rxon.channel)) {
883 channel =
884 priv->channel_info[i].channel;
885 ch_info = iwl_get_channel_info(priv,
886 band, channel);
887 if (is_channel_valid(ch_info))
888 break;
889 }
890 }
891 }
892
893 return channel;
894}
895EXPORT_SYMBOL(iwl_get_single_channel_number);
896
bf85ea4f 897/**
17e72782 898 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
bf85ea4f
AK		 899 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
900 * @channel: Any channel valid for the requested phymode
901
902 * In addition to setting the staging RXON, priv->phymode is also set.
903 *
904 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
905 * in the staging RXON flag structure based on the phymode
906 */
17e72782 907int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 908{
17e72782
TW		 909 enum ieee80211_band band = ch->band;
910 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
911
8622e705 912 if (!iwl_get_channel_info(priv, band, channel)) {
e1623446 913 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
bf85ea4f
AK		 914 channel, band);
915 return -EINVAL;
916 }
917
918 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
919 (priv->band == band))
920 return 0;
921
922 priv->staging_rxon.channel = cpu_to_le16(channel);
923 if (band == IEEE80211_BAND_5GHZ)
924 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
925 else
926 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
927
928 priv->band = band;
929
e1623446 930 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 931
932 return 0;
933}
c7de35cd 934EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 935
79d07325
WYG		 936void iwl_set_flags_for_band(struct iwl_priv *priv,
937 enum ieee80211_band band,
938 struct ieee80211_vif *vif)
8ccde88a
SO		 939{
940 if (band == IEEE80211_BAND_5GHZ) {
941 priv->staging_rxon.flags &=
942 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
943 | RXON_FLG_CCK_MSK);
944 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
945 } else {
946 /* Copied from iwl_post_associate() */
c213d745 947 if (vif && vif->bss_conf.use_short_slot)
8ccde88a
SO		 948 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
949 else
950 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
951
8ccde88a
SO		 952 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
953 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
954 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
955 }
956}
79d07325 957EXPORT_SYMBOL(iwl_set_flags_for_band);
8ccde88a
SO		 958
959/*
960 * initialize rxon structure with default values from eeprom
961 */
1dda6d28
JB		 962void iwl_connection_init_rx_config(struct iwl_priv *priv,
963 struct ieee80211_vif *vif)
8ccde88a
SO		 964{
965 const struct iwl_channel_info *ch_info;
1dda6d28
JB		 966 enum nl80211_iftype type = NL80211_IFTYPE_STATION;
967
968 if (vif)
969 type = vif->type;
8ccde88a
SO		 970
971 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
972
1dda6d28 973 switch (type) {
8ccde88a
SO		 974 case NL80211_IFTYPE_AP:
975 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
976 break;
977
978 case NL80211_IFTYPE_STATION:
979 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
980 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
981 break;
982
983 case NL80211_IFTYPE_ADHOC:
984 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
985 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
986 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
987 RXON_FILTER_ACCEPT_GRP_MSK;
988 break;
989
8ccde88a 990 default:
1dda6d28 991 IWL_ERR(priv, "Unsupported interface type %d\n", type);
8ccde88a
SO		 992 break;
993 }
994
995#if 0
996 /* TODO: Figure out when short_preamble would be set and cache from
997 * that */
998 if (!hw_to_local(priv->hw)->short_preamble)
999 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1000 else
1001 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1002#endif
1003
1004 ch_info = iwl_get_channel_info(priv, priv->band,
1005 le16_to_cpu(priv->active_rxon.channel));
1006
1007 if (!ch_info)
1008 ch_info = &priv->channel_info[0];
1009
8ccde88a
SO		 1010 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1011 priv->band = ch_info->band;
1012
1dda6d28 1013 iwl_set_flags_for_band(priv, priv->band, vif);
8ccde88a
SO		 1014
1015 priv->staging_rxon.ofdm_basic_rates =
1016 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1017 priv->staging_rxon.cck_basic_rates =
1018 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1019
a2b0f02e
WYG		 1020 /* clear both MIX and PURE40 mode flag */
1021 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1022 RXON_FLG_CHANNEL_MODE_PURE_40);
7684c408
JB		 1023
1024 if (vif)
1025 memcpy(priv->staging_rxon.node_addr, vif->addr, ETH_ALEN);
1026
8ccde88a
SO		 1027 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1028 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 1029 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 1030}
1031EXPORT_SYMBOL(iwl_connection_init_rx_config);
1032
79d07325 1033void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 1034{
1035 const struct ieee80211_supported_band *hw = NULL;
1036 struct ieee80211_rate *rate;
1037 int i;
1038
1039 hw = iwl_get_hw_mode(priv, priv->band);
1040 if (!hw) {
1041 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1042 return;
1043 }
1044
1045 priv->active_rate = 0;
8ccde88a
SO		 1046
1047 for (i = 0; i < hw->n_bitrates; i++) {
1048 rate = &(hw->bitrates[i]);
5027309b 1049 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 1050 priv->active_rate |= (1 << rate->hw_value);
1051 }
1052
4a02886b 1053 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 1054
4a02886b
JB		 1055 priv->staging_rxon.cck_basic_rates =
1056 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1057
1058 priv->staging_rxon.ofdm_basic_rates =
1059 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
8ccde88a 1060}
79d07325
WYG		 1061EXPORT_SYMBOL(iwl_set_rate);
1062
1063void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
1064{
1065 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
1066 return;
1067
1068 if (priv->switch_rxon.switch_in_progress) {
1069 ieee80211_chswitch_done(priv->vif, is_success);
1070 mutex_lock(&priv->mutex);
1071 priv->switch_rxon.switch_in_progress = false;
1072 mutex_unlock(&priv->mutex);
1073 }
1074}
1075EXPORT_SYMBOL(iwl_chswitch_done);
8ccde88a
SO		 1076
1077void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1078{
2f301227 1079 struct iwl_rx_packet *pkt = rxb_addr(rxb);
8ccde88a
SO		 1080 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1081 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
4a56e965 1082
0924e519
WYG		 1083 if (priv->switch_rxon.switch_in_progress) {
1084 if (!le32_to_cpu(csa->status) &&
1085 (csa->channel == priv->switch_rxon.channel)) {
1086 rxon->channel = csa->channel;
1087 priv->staging_rxon.channel = csa->channel;
1088 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1089 le16_to_cpu(csa->channel));
79d07325
WYG		 1090 iwl_chswitch_done(priv, true);
1091 } else {
0924e519
WYG		 1092 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1093 le16_to_cpu(csa->channel));
79d07325
WYG		 1094 iwl_chswitch_done(priv, false);
1095 }
0924e519 1096 }
8ccde88a
SO		 1097}
1098EXPORT_SYMBOL(iwl_rx_csa);
1099
1100#ifdef CONFIG_IWLWIFI_DEBUG
a643565e 1101void iwl_print_rx_config_cmd(struct iwl_priv *priv)
8ccde88a
SO		 1102{
1103 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1104
e1623446 1105 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1106 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1107 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1108 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1109 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1110 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1111 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1112 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1113 rxon->ofdm_basic_rates);
e1623446
TW		 1114 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1115 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1116 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1117 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1118}
a643565e 1119EXPORT_SYMBOL(iwl_print_rx_config_cmd);
6686d17e 1120#endif
8ccde88a
SO		 1121/**
1122 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1123 */
1124void iwl_irq_handle_error(struct iwl_priv *priv)
1125{
1126 /* Set the FW error flag -- cleared on iwl_down */
1127 set_bit(STATUS_FW_ERROR, &priv->status);
1128
1129 /* Cancel currently queued command. */
1130 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1131
459bc732
SZ		 1132 IWL_ERR(priv, "Loaded firmware version: %s\n",
1133 priv->hw->wiphy->fw_version);
1134
3a3ff72c 1135 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG		 1136 if (priv->cfg->ops->lib->dump_csr)
1137 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG		 1138 if (priv->cfg->ops->lib->dump_fh)
1139 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 1140 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 1141#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 1142 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
8ccde88a 1143 iwl_print_rx_config_cmd(priv);
8ccde88a
SO		 1144#endif
1145
1146 wake_up_interruptible(&priv->wait_command_queue);
1147
1148 /* Keep the restart process from trying to send host
1149 * commands by clearing the INIT status bit */
1150 clear_bit(STATUS_READY, &priv->status);
1151
1152 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1153 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1154 "Restarting adapter due to uCode error.\n");
1155
8ccde88a
SO		 1156 if (priv->cfg->mod_params->restart_fw)
1157 queue_work(priv->workqueue, &priv->restart);
1158 }
1159}
1160EXPORT_SYMBOL(iwl_irq_handle_error);
1161
f8e200de 1162static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 1163{
5220af0c 1164 int ret = 0;
d68b603c 1165
5220af0c 1166 /* stop device's busmaster DMA activity */
d68b603c
AK		 1167 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1168
5220af0c 1169 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 1170 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC		 1171 if (ret)
1172 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 1173
d68b603c
AK		 1174 IWL_DEBUG_INFO(priv, "stop master\n");
1175
5220af0c 1176 return ret;
d68b603c 1177}
d68b603c
AK		 1178
1179void iwl_apm_stop(struct iwl_priv *priv)
1180{
fadb3582
BC		 1181 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1182
5220af0c 1183 /* Stop device's DMA activity */
d68b603c
AK		 1184 iwl_apm_stop_master(priv);
1185
5220af0c 1186 /* Reset the entire device */
d68b603c
AK		 1187 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1188
1189 udelay(10);
5220af0c
BC		 1190
1191 /*
1192 * Clear "initialization complete" bit to move adapter from
1193 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1194 */
d68b603c 1195 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c
AK		 1196}
1197EXPORT_SYMBOL(iwl_apm_stop);
1198
fadb3582
BC		 1199
1200/*
1201 * Start up NIC's basic functionality after it has been reset
1202 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1203 * NOTE: This does not load uCode nor start the embedded processor
1204 */
1205int iwl_apm_init(struct iwl_priv *priv)
1206{
1207 int ret = 0;
1208 u16 lctl;
1209
1210 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1211
1212 /*
1213 * Use "set_bit" below rather than "write", to preserve any hardware
1214 * bits already set by default after reset.
1215 */
1216
1217 /* Disable L0S exit timer (platform NMI Work/Around) */
1218 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1219 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1220
1221 /*
1222 * Disable L0s without affecting L1;
1223 * don't wait for ICH L0s (ICH bug W/A)
1224 */
1225 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1226 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1227
1228 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1229 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1230
1231 /*
1232 * Enable HAP INTA (interrupt from management bus) to
1233 * wake device's PCI Express link L1a -> L0s
1234 * NOTE: This is no-op for 3945 (non-existant bit)
1235 */
1236 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1237 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1238
1239 /*
a6c5c731
BC		 1240 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1241 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1242 * If so (likely), disable L0S, so device moves directly L0->L1;
1243 * costs negligible amount of power savings.
1244 * If not (unlikely), enable L0S, so there is at least some
1245 * power savings, even without L1.
fadb3582
BC		 1246 */
1247 if (priv->cfg->set_l0s) {
1248 lctl = iwl_pcie_link_ctl(priv);
1249 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1250 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1251 /* L1-ASPM enabled; disable(!) L0S */
1252 iwl_set_bit(priv, CSR_GIO_REG,
1253 CSR_GIO_REG_VAL_L0S_ENABLED);
1254 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1255 } else {
1256 /* L1-ASPM disabled; enable(!) L0S */
1257 iwl_clear_bit(priv, CSR_GIO_REG,
1258 CSR_GIO_REG_VAL_L0S_ENABLED);
1259 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1260 }
1261 }
1262
1263 /* Configure analog phase-lock-loop before activating to D0A */
1264 if (priv->cfg->pll_cfg_val)
1265 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1266
1267 /*
1268 * Set "initialization complete" bit to move adapter from
1269 * D0U* --> D0A* (powered-up active) state.
1270 */
1271 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1272
1273 /*
1274 * Wait for clock stabilization; once stabilized, access to
1275 * device-internal resources is supported, e.g. iwl_write_prph()
1276 * and accesses to uCode SRAM.
1277 */
1278 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1279 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1280 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1281 if (ret < 0) {
1282 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1283 goto out;
1284 }
1285
1286 /*
1287 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1288 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1289 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1290 * and don't need BSM to restore data after power-saving sleep.
1291 *
1292 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1293 * do not disable clocks. This preserves any hardware bits already
1294 * set by default in "CLK_CTRL_REG" after reset.
1295 */
1296 if (priv->cfg->use_bsm)
1297 iwl_write_prph(priv, APMG_CLK_EN_REG,
1298 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1299 else
1300 iwl_write_prph(priv, APMG_CLK_EN_REG,
1301 APMG_CLK_VAL_DMA_CLK_RQT);
1302 udelay(20);
1303
1304 /* Disable L1-Active */
1305 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1306 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1307
1308out:
1309 return ret;
1310}
1311EXPORT_SYMBOL(iwl_apm_init);
1312
1313
1314
8ccde88a
SO		 1315void iwl_configure_filter(struct ieee80211_hw *hw,
1316 unsigned int changed_flags,
1317 unsigned int *total_flags,
3ac64bee 1318 u64 multicast)
8ccde88a
SO		 1319{
1320 struct iwl_priv *priv = hw->priv;
3474ad63
JB		 1321 __le32 filter_or = 0, filter_nand = 0;
1322
1323#define CHK(test, flag) do { \
1324 if (*total_flags & (test)) \
1325 filter_or |= (flag); \
1326 else \
1327 filter_nand |= (flag); \
1328 } while (0)
8ccde88a 1329
e1623446 1330 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
8ccde88a
SO		 1331 changed_flags, *total_flags);
1332
3474ad63 1333 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3474ad63
JB		 1334 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
1335 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
8ccde88a 1336
3474ad63
JB		 1337#undef CHK
1338
1339 mutex_lock(&priv->mutex);
1340
1341 priv->staging_rxon.filter_flags &= ~filter_nand;
1342 priv->staging_rxon.filter_flags |= filter_or;
1343
1344 iwlcore_commit_rxon(priv);
1345
1346 mutex_unlock(&priv->mutex);
8ccde88a 1347
d1e89f37
JB		 1348 /*
1349 * Receiving all multicast frames is always enabled by the
1350 * default flags setup in iwl_connection_init_rx_config()
1351 * since we currently do not support programming multicast
1352 * filters into the device.
1353 */
8ccde88a
SO		 1354 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1355 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1356}
1357EXPORT_SYMBOL(iwl_configure_filter);
1358
da154e30
RR		 1359int iwl_set_hw_params(struct iwl_priv *priv)
1360{
da154e30
RR		 1361 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1362 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1363 if (priv->cfg->mod_params->amsdu_size_8K)
2f301227 1364 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
da154e30 1365 else
2f301227 1366 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
da154e30 1367
2c2f3b33
TW		 1368 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1369
49779293
RR		 1370 if (priv->cfg->mod_params->disable_11n)
1371 priv->cfg->sku &= ~IWL_SKU_N;
1372
da154e30
RR		 1373 /* Device-specific setup */
1374 return priv->cfg->ops->lib->set_hw_params(priv);
1375}
1376EXPORT_SYMBOL(iwl_set_hw_params);
6ba87956 1377
630fe9b6
TW		 1378int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1379{
1380 int ret = 0;
5eadd94b
WYG		 1381 s8 prev_tx_power = priv->tx_power_user_lmt;
1382
b744cb79
WYG		 1383 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1384 IWL_WARN(priv,
1385 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1386 tx_power,
b744cb79 1387 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1388 return -EINVAL;
1389 }
1390
dc1b0973 1391 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1392 IWL_WARN(priv,
1393 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1394 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1395 return -EINVAL;
1396 }
1397
1398 if (priv->tx_power_user_lmt != tx_power)
1399 force = true;
1400
019fb97d 1401 /* if nic is not up don't send command */
5eadd94b
WYG		 1402 if (iwl_is_ready_rf(priv)) {
1403 priv->tx_power_user_lmt = tx_power;
1404 if (force && priv->cfg->ops->lib->send_tx_power)
1405 ret = priv->cfg->ops->lib->send_tx_power(priv);
1406 else if (!priv->cfg->ops->lib->send_tx_power)
1407 ret = -EOPNOTSUPP;
1408 /*
1409 * if fail to set tx_power, restore the orig. tx power
1410 */
1411 if (ret)
1412 priv->tx_power_user_lmt = prev_tx_power;
1413 }
630fe9b6 1414
5eadd94b
WYG		 1415 /*
1416 * Even this is an async host command, the command
1417 * will always report success from uCode
1418 * So once driver can placing the command into the queue
1419 * successfully, driver can use priv->tx_power_user_lmt
1420 * to reflect the current tx power
1421 */
630fe9b6
TW		 1422 return ret;
1423}
1424EXPORT_SYMBOL(iwl_set_tx_power);
1425
ef850d7c 1426irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK		 1427{
1428 struct iwl_priv *priv = data;
1429 u32 inta, inta_mask;
1430 u32 inta_fh;
6e8cc38d 1431 unsigned long flags;
f17d08a6
AK		 1432 if (!priv)
1433 return IRQ_NONE;
1434
6e8cc38d 1435 spin_lock_irqsave(&priv->lock, flags);
f17d08a6
AK		 1436
1437 /* Disable (but don't clear!) interrupts here to avoid
1438 * back-to-back ISRs and sporadic interrupts from our NIC.
1439 * If we have something to service, the tasklet will re-enable ints.
1440 * If we *don't* have something, we'll re-enable before leaving here. */
1441 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1442 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1443
1444 /* Discover which interrupts are active/pending */
1445 inta = iwl_read32(priv, CSR_INT);
1446 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1447
1448 /* Ignore interrupt if there's nothing in NIC to service.
1449 * This may be due to IRQ shared with another device,
1450 * or due to sporadic interrupts thrown from our NIC. */
1451 if (!inta && !inta_fh) {
1452 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1453 goto none;
1454 }
1455
1456 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1457 /* Hardware disappeared. It might have already raised
1458 * an interrupt */
1459 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1460 goto unplugged;
1461 }
1462
1463 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1464 inta, inta_mask, inta_fh);
1465
1466 inta &= ~CSR_INT_BIT_SCD;
1467
1468 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1469 if (likely(inta || inta_fh))
1470 tasklet_schedule(&priv->irq_tasklet);
1471
1472 unplugged:
6e8cc38d 1473 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1474 return IRQ_HANDLED;
1475
1476 none:
1477 /* re-enable interrupts here since we don't have anything to service. */
1478 /* only Re-enable if diabled by irq */
1479 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1480 iwl_enable_interrupts(priv);
6e8cc38d 1481 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1482 return IRQ_NONE;
1483}
ef850d7c 1484EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1485
65b52bde 1486void iwl_send_bt_config(struct iwl_priv *priv)
17f841cd
SO		 1487{
1488 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG		 1489 .lead_time = BT_LEAD_TIME_DEF,
1490 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO		 1491 .kill_ack_mask = 0,
1492 .kill_cts_mask = 0,
1493 };
1494
06702a73
WYG		 1495 if (!bt_coex_active)
1496 bt_cmd.flags = BT_COEX_DISABLE;
1497 else
1498 bt_cmd.flags = BT_COEX_ENABLE;
1499
1500 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1501 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1502
65b52bde
JB		 1503 if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1504 sizeof(struct iwl_bt_cmd), &bt_cmd))
1505 IWL_ERR(priv, "failed to send BT Coex Config\n");
17f841cd
SO		 1506}
1507EXPORT_SYMBOL(iwl_send_bt_config);
1508
ef8d5529 1509int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1510{
ef8d5529
WYG		 1511 struct iwl_statistics_cmd statistics_cmd = {
1512 .configuration_flags =
1513 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1514 };
ef8d5529
WYG		 1515
1516 if (flags & CMD_ASYNC)
1517 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1518 sizeof(struct iwl_statistics_cmd),
1519 &statistics_cmd, NULL);
1520 else
1521 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1522 sizeof(struct iwl_statistics_cmd),
1523 &statistics_cmd);
49ea8596
EG		 1524}
1525EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1526
47f4a587
EG		 1527void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1528{
1529 struct iwl_ct_kill_config cmd;
672639de 1530 struct iwl_ct_kill_throttling_config adv_cmd;
47f4a587
EG		 1531 unsigned long flags;
1532 int ret = 0;
1533
1534 spin_lock_irqsave(&priv->lock, flags);
1535 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1536 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1537 spin_unlock_irqrestore(&priv->lock, flags);
3ad3b92a 1538 priv->thermal_throttle.ct_kill_toggle = false;
47f4a587 1539
480e8407 1540 if (priv->cfg->support_ct_kill_exit) {
672639de
WYG		 1541 adv_cmd.critical_temperature_enter =
1542 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1543 adv_cmd.critical_temperature_exit =
1544 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
1545
1546 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1547 sizeof(adv_cmd), &adv_cmd);
d91b1ba3
WYG		 1548 if (ret)
1549 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1550 else
1551 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1552 "succeeded, "
1553 "critical temperature enter is %d,"
1554 "exit is %d\n",
1555 priv->hw_params.ct_kill_threshold,
1556 priv->hw_params.ct_kill_exit_threshold);
480e8407 1557 } else {
672639de
WYG		 1558 cmd.critical_temperature_R =
1559 cpu_to_le32(priv->hw_params.ct_kill_threshold);
189a2b59 1560
672639de
WYG		 1561 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1562 sizeof(cmd), &cmd);
d91b1ba3
WYG		 1563 if (ret)
1564 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1565 else
1566 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1567 "succeeded, "
1568 "critical temperature is %d\n",
1569 priv->hw_params.ct_kill_threshold);
672639de 1570 }
47f4a587
EG		 1571}
1572EXPORT_SYMBOL(iwl_rf_kill_ct_config);
14a08a7f 1573
0ad91a35 1574
14a08a7f
EG		 1575/*
1576 * CARD_STATE_CMD
1577 *
1578 * Use: Sets the device's internal card state to enable, disable, or halt
1579 *
1580 * When in the 'enable' state the card operates as normal.
1581 * When in the 'disable' state, the card enters into a low power mode.
1582 * When in the 'halt' state, the card is shut down and must be fully
1583 * restarted to come back on.
1584 */
c496294e 1585int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
14a08a7f
EG		 1586{
1587 struct iwl_host_cmd cmd = {
1588 .id = REPLY_CARD_STATE_CMD,
1589 .len = sizeof(u32),
1590 .data = &flags,
c2acea8e 1591 .flags = meta_flag,
14a08a7f
EG		 1592 };
1593
1594 return iwl_send_cmd(priv, &cmd);
1595}
1596
030f05ed
AK		 1597void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1598 struct iwl_rx_mem_buffer *rxb)
1599{
1600#ifdef CONFIG_IWLWIFI_DEBUG
2f301227 1601 struct iwl_rx_packet *pkt = rxb_addr(rxb);
030f05ed
AK		 1602 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1603 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1604 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1605#endif
1606}
1607EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1608
1609void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1610 struct iwl_rx_mem_buffer *rxb)
1611{
2f301227 1612 struct iwl_rx_packet *pkt = rxb_addr(rxb);
396887a2 1613 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 1614 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 1615 "notification for %s:\n", len,
1616 get_cmd_string(pkt->hdr.cmd));
1617 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 1618}
1619EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 1620
1621void iwl_rx_reply_error(struct iwl_priv *priv,
1622 struct iwl_rx_mem_buffer *rxb)
1623{
2f301227 1624 struct iwl_rx_packet *pkt = rxb_addr(rxb);
261b9c33
AK		 1625
1626 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1627 "seq 0x%04X ser 0x%08X\n",
1628 le32_to_cpu(pkt->u.err_resp.error_type),
1629 get_cmd_string(pkt->u.err_resp.cmd_id),
1630 pkt->u.err_resp.cmd_id,
1631 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1632 le32_to_cpu(pkt->u.err_resp.error_info));
1633}
1634EXPORT_SYMBOL(iwl_rx_reply_error);
1635
a83b9141
WYG		 1636void iwl_clear_isr_stats(struct iwl_priv *priv)
1637{
1638 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1639}
a83b9141 1640
488829f1
AK		 1641int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1642 const struct ieee80211_tx_queue_params *params)
1643{
1644 struct iwl_priv *priv = hw->priv;
1645 unsigned long flags;
1646 int q;
1647
1648 IWL_DEBUG_MAC80211(priv, "enter\n");
1649
1650 if (!iwl_is_ready_rf(priv)) {
1651 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1652 return -EIO;
1653 }
1654
1655 if (queue >= AC_NUM) {
1656 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1657 return 0;
1658 }
1659
1660 q = AC_NUM - 1 - queue;
1661
1662 spin_lock_irqsave(&priv->lock, flags);
1663
1664 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
1665 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
1666 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1667 priv->qos_data.def_qos_parm.ac[q].edca_txop =
1668 cpu_to_le16((params->txop * 32));
1669
1670 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
488829f1
AK		 1671
1672 spin_unlock_irqrestore(&priv->lock, flags);
1673
1674 IWL_DEBUG_MAC80211(priv, "leave\n");
1675 return 0;
1676}
1677EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b
AK		 1678
1679static void iwl_ht_conf(struct iwl_priv *priv,
ca3c1f59 1680 struct ieee80211_vif *vif)
5bbe233b 1681{
fad95bf5 1682 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
5bbe233b 1683 struct ieee80211_sta *sta;
ca3c1f59 1684 struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
5bbe233b 1685
91dd6c27 1686 IWL_DEBUG_MAC80211(priv, "enter:\n");
5bbe233b 1687
fad95bf5 1688 if (!ht_conf->is_ht)
5bbe233b
AK		 1689 return;
1690
fad95bf5 1691 ht_conf->ht_protection =
9ed6bcce 1692 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
fad95bf5 1693 ht_conf->non_GF_STA_present =
9ed6bcce 1694 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b 1695
02bb1bea
JB		 1696 ht_conf->single_chain_sufficient = false;
1697
ca3c1f59 1698 switch (vif->type) {
02bb1bea
JB		 1699 case NL80211_IFTYPE_STATION:
1700 rcu_read_lock();
ca3c1f59 1701 sta = ieee80211_find_sta(vif, bss_conf->bssid);
02bb1bea
JB		 1702 if (sta) {
1703 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
1704 int maxstreams;
1705
1706 maxstreams = (ht_cap->mcs.tx_params &
1707 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
1708 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1709 maxstreams += 1;
1710
1711 if ((ht_cap->mcs.rx_mask[1] == 0) &&
1712 (ht_cap->mcs.rx_mask[2] == 0))
1713 ht_conf->single_chain_sufficient = true;
1714 if (maxstreams <= 1)
1715 ht_conf->single_chain_sufficient = true;
1716 } else {
1717 /*
1718 * If at all, this can only happen through a race
1719 * when the AP disconnects us while we're still
1720 * setting up the connection, in that case mac80211
1721 * will soon tell us about that.
1722 */
1723 ht_conf->single_chain_sufficient = true;
1724 }
1725 rcu_read_unlock();
1726 break;
1727 case NL80211_IFTYPE_ADHOC:
1728 ht_conf->single_chain_sufficient = true;
1729 break;
1730 default:
1731 break;
1732 }
5bbe233b
AK		 1733
1734 IWL_DEBUG_MAC80211(priv, "leave\n");
1735}
1736
c91c3efc
AK		 1737static inline void iwl_set_no_assoc(struct iwl_priv *priv)
1738{
c91c3efc
AK		 1739 iwl_led_disassociate(priv);
1740 /*
1741 * inform the ucode that there is no longer an
1742 * association and that no more packets should be
1743 * sent
1744 */
1745 priv->staging_rxon.filter_flags &=
1746 ~RXON_FILTER_ASSOC_MSK;
1747 priv->staging_rxon.assoc_id = 0;
1748 iwlcore_commit_rxon(priv);
1749}
1750
5bbe233b 1751void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 1752 struct ieee80211_vif *vif,
1753 struct ieee80211_bss_conf *bss_conf,
1754 u32 changes)
5bbe233b
AK		 1755{
1756 struct iwl_priv *priv = hw->priv;
3a650292 1757 int ret;
5bbe233b
AK		 1758
1759 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
1760
2d0ddec5
JB		 1761 if (!iwl_is_alive(priv))
1762 return;
1763
1764 mutex_lock(&priv->mutex);
1765
4ced3f74
JB		 1766 if (changes & BSS_CHANGED_QOS) {
1767 unsigned long flags;
1768
1769 spin_lock_irqsave(&priv->lock, flags);
1770 priv->qos_data.qos_active = bss_conf->qos;
1771 iwl_update_qos(priv);
1772 spin_unlock_irqrestore(&priv->lock, flags);
1773 }
1774
92445c95 1775 if (changes & BSS_CHANGED_BEACON && vif->type == NL80211_IFTYPE_AP) {
2d0ddec5
JB		 1776 dev_kfree_skb(priv->ibss_beacon);
1777 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
1778 }
1779
d7129e19 1780 if (changes & BSS_CHANGED_BEACON_INT) {
d7129e19
JB		 1781 /* TODO: in AP mode, do something to make this take effect */
1782 }
1783
1784 if (changes & BSS_CHANGED_BSSID) {
1785 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
1786
1787 /*
1788 * If there is currently a HW scan going on in the
1789 * background then we need to cancel it else the RXON
1790 * below/in post_associate will fail.
1791 */
2d0ddec5 1792 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 1793 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB		 1794 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
1795 mutex_unlock(&priv->mutex);
1796 return;
1797 }
2d0ddec5 1798
d7129e19 1799 /* mac80211 only sets assoc when in STATION mode */
92445c95 1800 if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
d7129e19
JB		 1801 memcpy(priv->staging_rxon.bssid_addr,
1802 bss_conf->bssid, ETH_ALEN);
2d0ddec5 1803
d7129e19
JB		 1804 /* currently needed in a few places */
1805 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1806 } else {
1807 priv->staging_rxon.filter_flags &=
1808 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 1809 }
d7129e19 1810
2d0ddec5
JB		 1811 }
1812
d7129e19
JB		 1813 /*
1814 * This needs to be after setting the BSSID in case
1815 * mac80211 decides to do both changes at once because
1816 * it will invoke post_associate.
1817 */
92445c95 1818 if (vif->type == NL80211_IFTYPE_ADHOC &&
2d0ddec5
JB		 1819 changes & BSS_CHANGED_BEACON) {
1820 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1821
1822 if (beacon)
1823 iwl_mac_beacon_update(hw, beacon);
1824 }
1825
5bbe233b
AK		 1826 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1827 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
1828 bss_conf->use_short_preamble);
1829 if (bss_conf->use_short_preamble)
1830 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1831 else
1832 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1833 }
1834
1835 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
1836 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
1837 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
1838 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
1839 else
1840 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
1841 }
1842
d7129e19
JB		 1843 if (changes & BSS_CHANGED_BASIC_RATES) {
1844 /* XXX use this information
1845 *
1846 * To do that, remove code from iwl_set_rate() and put something
1847 * like this here:
1848 *
1849 if (A-band)
1850 priv->staging_rxon.ofdm_basic_rates =
1851 bss_conf->basic_rates;
1852 else
1853 priv->staging_rxon.ofdm_basic_rates =
1854 bss_conf->basic_rates >> 4;
1855 priv->staging_rxon.cck_basic_rates =
1856 bss_conf->basic_rates & 0xF;
1857 */
1858 }
1859
5bbe233b 1860 if (changes & BSS_CHANGED_HT) {
ca3c1f59 1861 iwl_ht_conf(priv, vif);
45823531
AK		 1862
1863 if (priv->cfg->ops->hcmd->set_rxon_chain)
1864 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK		 1865 }
1866
1867 if (changes & BSS_CHANGED_ASSOC) {
1868 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b 1869 if (bss_conf->assoc) {
5bbe233b 1870 priv->timestamp = bss_conf->timestamp;
5bbe233b 1871
e932a609
JB		 1872 iwl_led_associate(priv);
1873
d7129e19 1874 if (!iwl_is_rfkill(priv))
1dda6d28 1875 priv->cfg->ops->lib->post_associate(priv, vif);
c91c3efc
AK		 1876 } else
1877 iwl_set_no_assoc(priv);
d7129e19
JB		 1878 }
1879
1dda6d28 1880 if (changes && iwl_is_associated(priv) && bss_conf->aid) {
d7129e19
JB		 1881 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
1882 changes);
1883 ret = iwl_send_rxon_assoc(priv);
1884 if (!ret) {
1885 /* Sync active_rxon with latest change. */
1886 memcpy((void *)&priv->active_rxon,
1887 &priv->staging_rxon,
1888 sizeof(struct iwl_rxon_cmd));
5bbe233b 1889 }
5bbe233b 1890 }
d7129e19 1891
c91c3efc
AK		 1892 if (changes & BSS_CHANGED_BEACON_ENABLED) {
1893 if (vif->bss_conf.enable_beacon) {
1894 memcpy(priv->staging_rxon.bssid_addr,
1895 bss_conf->bssid, ETH_ALEN);
1896 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1dda6d28 1897 iwlcore_config_ap(priv, vif);
c91c3efc
AK		 1898 } else
1899 iwl_set_no_assoc(priv);
f513dfff
DH		 1900 }
1901
1fa61b2e
JB		 1902 if (changes & BSS_CHANGED_IBSS) {
1903 ret = priv->cfg->ops->lib->manage_ibss_station(priv, vif,
1904 bss_conf->ibss_joined);
1905 if (ret)
1906 IWL_ERR(priv, "failed to %s IBSS station %pM\n",
1907 bss_conf->ibss_joined ? "add" : "remove",
1908 bss_conf->bssid);
1909 }
1910
d7129e19
JB		 1911 mutex_unlock(&priv->mutex);
1912
2d0ddec5 1913 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 1914}
1915EXPORT_SYMBOL(iwl_bss_info_changed);
1916
9944b938
AK		 1917int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
1918{
1919 struct iwl_priv *priv = hw->priv;
1920 unsigned long flags;
1921 __le64 timestamp;
1922
1923 IWL_DEBUG_MAC80211(priv, "enter\n");
1924
1925 if (!iwl_is_ready_rf(priv)) {
1926 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1927 return -EIO;
1928 }
1929
9944b938
AK		 1930 spin_lock_irqsave(&priv->lock, flags);
1931
1932 if (priv->ibss_beacon)
1933 dev_kfree_skb(priv->ibss_beacon);
1934
1935 priv->ibss_beacon = skb;
1936
9944b938
AK		 1937 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
1938 priv->timestamp = le64_to_cpu(timestamp);
1939
1940 IWL_DEBUG_MAC80211(priv, "leave\n");
1941 spin_unlock_irqrestore(&priv->lock, flags);
1942
1dda6d28 1943 priv->cfg->ops->lib->post_associate(priv, priv->vif);
9944b938 1944
9944b938
AK		 1945 return 0;
1946}
1947EXPORT_SYMBOL(iwl_mac_beacon_update);
1948
b55e75ed 1949static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
727882d6 1950{
1dda6d28 1951 iwl_connection_init_rx_config(priv, vif);
727882d6
AK		 1952
1953 if (priv->cfg->ops->hcmd->set_rxon_chain)
1954 priv->cfg->ops->hcmd->set_rxon_chain(priv);
1955
b55e75ed 1956 return iwlcore_commit_rxon(priv);
727882d6 1957}
727882d6 1958
b55e75ed 1959int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK		 1960{
1961 struct iwl_priv *priv = hw->priv;
47e28f41 1962 int err = 0;
cbb6ab94 1963
3779db10
JB		 1964 IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
1965 vif->type, vif->addr);
cbb6ab94 1966
47e28f41
JB		 1967 mutex_lock(&priv->mutex);
1968
b55e75ed
JB		 1969 if (WARN_ON(!iwl_is_ready_rf(priv))) {
1970 err = -EINVAL;
1971 goto out;
1972 }
1973
cbb6ab94
AK		 1974 if (priv->vif) {
1975 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
47e28f41
JB		 1976 err = -EOPNOTSUPP;
1977 goto out;
cbb6ab94
AK		 1978 }
1979
1ed32e4f
JB		 1980 priv->vif = vif;
1981 priv->iw_mode = vif->type;
cbb6ab94 1982
b55e75ed
JB		 1983 err = iwl_set_mode(priv, vif);
1984 if (err)
1985 goto out_err;
7e246191 1986
b55e75ed 1987 goto out;
cbb6ab94 1988
b55e75ed
JB		 1989 out_err:
1990 priv->vif = NULL;
1991 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 1992 out:
cbb6ab94
AK		 1993 mutex_unlock(&priv->mutex);
1994
1995 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 1996 return err;
cbb6ab94
AK		 1997}
1998EXPORT_SYMBOL(iwl_mac_add_interface);
1999
d8052319 2000void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b55e75ed 2001 struct ieee80211_vif *vif)
d8052319
AK		 2002{
2003 struct iwl_priv *priv = hw->priv;
2004
2005 IWL_DEBUG_MAC80211(priv, "enter\n");
2006
2007 mutex_lock(&priv->mutex);
2008
2009 if (iwl_is_ready_rf(priv)) {
2010 iwl_scan_cancel_timeout(priv, 100);
2011 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2012 iwlcore_commit_rxon(priv);
2013 }
1ed32e4f 2014 if (priv->vif == vif) {
d8052319 2015 priv->vif = NULL;
f84b29ec
JB		 2016 if (priv->scan_vif == vif) {
2017 ieee80211_scan_completed(priv->hw, true);
2018 priv->scan_vif = NULL;
2019 priv->scan_request = NULL;
2020 }
d8052319
AK		 2021 memset(priv->bssid, 0, ETH_ALEN);
2022 }
2023 mutex_unlock(&priv->mutex);
2024
2025 IWL_DEBUG_MAC80211(priv, "leave\n");
2026
2027}
2028EXPORT_SYMBOL(iwl_mac_remove_interface);
2029
4808368d
AK		 2030/**
2031 * iwl_mac_config - mac80211 config callback
4808368d
AK		 2032 */
2033int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2034{
2035 struct iwl_priv *priv = hw->priv;
2036 const struct iwl_channel_info *ch_info;
2037 struct ieee80211_conf *conf = &hw->conf;
fad95bf5 2038 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
4808368d
AK		 2039 unsigned long flags = 0;
2040 int ret = 0;
2041 u16 ch;
2042 int scan_active = 0;
2043
2044 mutex_lock(&priv->mutex);
2045
4808368d
AK		 2046 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2047 conf->channel->hw_value, changed);
2048
2049 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2050 test_bit(STATUS_SCANNING, &priv->status))) {
2051 scan_active = 1;
2052 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2053 }
2054
ba37a3d0
JB		 2055 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2056 IEEE80211_CONF_CHANGE_CHANNEL)) {
2057 /* mac80211 uses static for non-HT which is what we want */
2058 priv->current_ht_config.smps = conf->smps_mode;
2059
2060 /*
2061 * Recalculate chain counts.
2062 *
2063 * If monitor mode is enabled then mac80211 will
2064 * set up the SM PS mode to OFF if an HT channel is
2065 * configured.
2066 */
2067 if (priv->cfg->ops->hcmd->set_rxon_chain)
2068 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2069 }
4808368d
AK		 2070
2071 /* during scanning mac80211 will delay channel setting until
2072 * scan finish with changed = 0
2073 */
2074 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2075 if (scan_active)
2076 goto set_ch_out;
2077
2078 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2079 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2080 if (!is_channel_valid(ch_info)) {
2081 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2082 ret = -EINVAL;
2083 goto set_ch_out;
2084 }
2085
4808368d
AK		 2086 spin_lock_irqsave(&priv->lock, flags);
2087
28bd723b
DH		 2088 /* Configure HT40 channels */
2089 ht_conf->is_ht = conf_is_ht(conf);
2090 if (ht_conf->is_ht) {
2091 if (conf_is_ht40_minus(conf)) {
2092 ht_conf->extension_chan_offset =
2093 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
c812ee24 2094 ht_conf->is_40mhz = true;
28bd723b
DH		 2095 } else if (conf_is_ht40_plus(conf)) {
2096 ht_conf->extension_chan_offset =
2097 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
c812ee24 2098 ht_conf->is_40mhz = true;
28bd723b
DH		 2099 } else {
2100 ht_conf->extension_chan_offset =
2101 IEEE80211_HT_PARAM_CHA_SEC_NONE;
c812ee24 2102 ht_conf->is_40mhz = false;
28bd723b
DH		 2103 }
2104 } else
c812ee24 2105 ht_conf->is_40mhz = false;
28bd723b
DH		 2106 /* Default to no protection. Protection mode will later be set
2107 * from BSS config in iwl_ht_conf */
2108 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
4808368d
AK		 2109
2110 /* if we are switching from ht to 2.4 clear flags
2111 * from any ht related info since 2.4 does not
2112 * support ht */
2113 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2114 priv->staging_rxon.flags = 0;
2115
2116 iwl_set_rxon_channel(priv, conf->channel);
5e2f75b8 2117 iwl_set_rxon_ht(priv, ht_conf);
4808368d 2118
1dda6d28 2119 iwl_set_flags_for_band(priv, conf->channel->band, priv->vif);
4808368d 2120 spin_unlock_irqrestore(&priv->lock, flags);
79d07325 2121
278c2f6f
DH		 2122 if (priv->cfg->ops->lib->update_bcast_station)
2123 ret = priv->cfg->ops->lib->update_bcast_station(priv);
2124
4808368d
AK		 2125 set_ch_out:
2126 /* The list of supported rates and rate mask can be different
2127 * for each band; since the band may have changed, reset
2128 * the rate mask to what mac80211 lists */
2129 iwl_set_rate(priv);
2130 }
2131
78f5fb7f
JB		 2132 if (changed & (IEEE80211_CONF_CHANGE_PS |
2133 IEEE80211_CONF_CHANGE_IDLE)) {
e312c24c 2134 ret = iwl_power_update_mode(priv, false);
4808368d 2135 if (ret)
e312c24c 2136 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK		 2137 }
2138
2139 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2140 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2141 priv->tx_power_user_lmt, conf->power_level);
2142
2143 iwl_set_tx_power(priv, conf->power_level, false);
2144 }
2145
0cf4c01e
MA		 2146 if (!iwl_is_ready(priv)) {
2147 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2148 goto out;
2149 }
2150
4808368d
AK		 2151 if (scan_active)
2152 goto out;
2153
2154 if (memcmp(&priv->active_rxon,
2155 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2156 iwlcore_commit_rxon(priv);
2157 else
2158 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2159
2160
2161out:
2162 IWL_DEBUG_MAC80211(priv, "leave\n");
2163 mutex_unlock(&priv->mutex);
2164 return ret;
2165}
2166EXPORT_SYMBOL(iwl_mac_config);
2167
bd564261
AK		 2168void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2169{
2170 struct iwl_priv *priv = hw->priv;
2171 unsigned long flags;
2172
2173 mutex_lock(&priv->mutex);
2174 IWL_DEBUG_MAC80211(priv, "enter\n");
2175
2176 spin_lock_irqsave(&priv->lock, flags);
fad95bf5 2177 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
bd564261
AK		 2178 spin_unlock_irqrestore(&priv->lock, flags);
2179
bd564261 2180 spin_lock_irqsave(&priv->lock, flags);
bd564261
AK		 2181
2182 /* new association get rid of ibss beacon skb */
2183 if (priv->ibss_beacon)
2184 dev_kfree_skb(priv->ibss_beacon);
2185
2186 priv->ibss_beacon = NULL;
2187
bd564261 2188 priv->timestamp = 0;
bd564261
AK		 2189
2190 spin_unlock_irqrestore(&priv->lock, flags);
2191
2192 if (!iwl_is_ready_rf(priv)) {
2193 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2194 mutex_unlock(&priv->mutex);
2195 return;
2196 }
2197
2198 /* we are restarting association process
2199 * clear RXON_FILTER_ASSOC_MSK bit
2200 */
b4665df4
JB		 2201 iwl_scan_cancel_timeout(priv, 100);
2202 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2203 iwlcore_commit_rxon(priv);
bd564261
AK		 2204
2205 iwl_set_rate(priv);
2206
2207 mutex_unlock(&priv->mutex);
2208
2209 IWL_DEBUG_MAC80211(priv, "leave\n");
2210}
2211EXPORT_SYMBOL(iwl_mac_reset_tsf);
2212
88804e2b
WYG		 2213int iwl_alloc_txq_mem(struct iwl_priv *priv)
2214{
2215 if (!priv->txq)
2216 priv->txq = kzalloc(
2217 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2218 GFP_KERNEL);
2219 if (!priv->txq) {
91dd6c27 2220 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG		 2221 return -ENOMEM;
2222 }
2223 return 0;
2224}
2225EXPORT_SYMBOL(iwl_alloc_txq_mem);
2226
2227void iwl_free_txq_mem(struct iwl_priv *priv)
2228{
2229 kfree(priv->txq);
2230 priv->txq = NULL;
2231}
2232EXPORT_SYMBOL(iwl_free_txq_mem);
2233
20594eb0
WYG		 2234#ifdef CONFIG_IWLWIFI_DEBUGFS
2235
2236#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2237
2238void iwl_reset_traffic_log(struct iwl_priv *priv)
2239{
2240 priv->tx_traffic_idx = 0;
2241 priv->rx_traffic_idx = 0;
2242 if (priv->tx_traffic)
2243 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2244 if (priv->rx_traffic)
2245 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2246}
2247
2248int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2249{
2250 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2251
2252 if (iwl_debug_level & IWL_DL_TX) {
2253 if (!priv->tx_traffic) {
2254 priv->tx_traffic =
2255 kzalloc(traffic_size, GFP_KERNEL);
2256 if (!priv->tx_traffic)
2257 return -ENOMEM;
2258 }
2259 }
2260 if (iwl_debug_level & IWL_DL_RX) {
2261 if (!priv->rx_traffic) {
2262 priv->rx_traffic =
2263 kzalloc(traffic_size, GFP_KERNEL);
2264 if (!priv->rx_traffic)
2265 return -ENOMEM;
2266 }
2267 }
2268 iwl_reset_traffic_log(priv);
2269 return 0;
2270}
2271EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2272
2273void iwl_free_traffic_mem(struct iwl_priv *priv)
2274{
2275 kfree(priv->tx_traffic);
2276 priv->tx_traffic = NULL;
2277
2278 kfree(priv->rx_traffic);
2279 priv->rx_traffic = NULL;
2280}
2281EXPORT_SYMBOL(iwl_free_traffic_mem);
2282
2283void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2284 u16 length, struct ieee80211_hdr *header)
2285{
2286 __le16 fc;
2287 u16 len;
2288
2289 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2290 return;
2291
2292 if (!priv->tx_traffic)
2293 return;
2294
2295 fc = header->frame_control;
2296 if (ieee80211_is_data(fc)) {
2297 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2298 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2299 memcpy((priv->tx_traffic +
2300 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2301 header, len);
2302 priv->tx_traffic_idx =
2303 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2304 }
2305}
2306EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2307
2308void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2309 u16 length, struct ieee80211_hdr *header)
2310{
2311 __le16 fc;
2312 u16 len;
2313
2314 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2315 return;
2316
2317 if (!priv->rx_traffic)
2318 return;
2319
2320 fc = header->frame_control;
2321 if (ieee80211_is_data(fc)) {
2322 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2323 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2324 memcpy((priv->rx_traffic +
2325 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2326 header, len);
2327 priv->rx_traffic_idx =
2328 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2329 }
2330}
2331EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 2332
2333const char *get_mgmt_string(int cmd)
2334{
2335 switch (cmd) {
2336 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2337 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2338 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2339 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2340 IWL_CMD(MANAGEMENT_PROBE_REQ);
2341 IWL_CMD(MANAGEMENT_PROBE_RESP);
2342 IWL_CMD(MANAGEMENT_BEACON);
2343 IWL_CMD(MANAGEMENT_ATIM);
2344 IWL_CMD(MANAGEMENT_DISASSOC);
2345 IWL_CMD(MANAGEMENT_AUTH);
2346 IWL_CMD(MANAGEMENT_DEAUTH);
2347 IWL_CMD(MANAGEMENT_ACTION);
2348 default:
2349 return "UNKNOWN";
2350
2351 }
2352}
2353
2354const char *get_ctrl_string(int cmd)
2355{
2356 switch (cmd) {
2357 IWL_CMD(CONTROL_BACK_REQ);
2358 IWL_CMD(CONTROL_BACK);
2359 IWL_CMD(CONTROL_PSPOLL);
2360 IWL_CMD(CONTROL_RTS);
2361 IWL_CMD(CONTROL_CTS);
2362 IWL_CMD(CONTROL_ACK);
2363 IWL_CMD(CONTROL_CFEND);
2364 IWL_CMD(CONTROL_CFENDACK);
2365 default:
2366 return "UNKNOWN";
2367
2368 }
2369}
2370
7163b8a4 2371void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG		 2372{
2373 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9 2374 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
7163b8a4 2375 priv->led_tpt = 0;
22fdf3c9
WYG		 2376}
2377
2378/*
2379 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2380 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2381 * Use debugFs to display the rx/rx_statistics
2382 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2383 * information will be recorded, but DATA pkt still will be recorded
2384 * for the reason of iwl_led.c need to control the led blinking based on
2385 * number of tx and rx data.
2386 *
2387 */
2388void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2389{
2390 struct traffic_stats *stats;
2391
2392 if (is_tx)
2393 stats = &priv->tx_stats;
2394 else
2395 stats = &priv->rx_stats;
2396
2397 if (ieee80211_is_mgmt(fc)) {
2398 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2399 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2400 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2401 break;
2402 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2403 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2404 break;
2405 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2406 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2407 break;
2408 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2409 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2410 break;
2411 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2412 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2413 break;
2414 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2415 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2416 break;
2417 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2418 stats->mgmt[MANAGEMENT_BEACON]++;
2419 break;
2420 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2421 stats->mgmt[MANAGEMENT_ATIM]++;
2422 break;
2423 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2424 stats->mgmt[MANAGEMENT_DISASSOC]++;
2425 break;
2426 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2427 stats->mgmt[MANAGEMENT_AUTH]++;
2428 break;
2429 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2430 stats->mgmt[MANAGEMENT_DEAUTH]++;
2431 break;
2432 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2433 stats->mgmt[MANAGEMENT_ACTION]++;
2434 break;
2435 }
2436 } else if (ieee80211_is_ctl(fc)) {
2437 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2438 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2439 stats->ctrl[CONTROL_BACK_REQ]++;
2440 break;
2441 case cpu_to_le16(IEEE80211_STYPE_BACK):
2442 stats->ctrl[CONTROL_BACK]++;
2443 break;
2444 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2445 stats->ctrl[CONTROL_PSPOLL]++;
2446 break;
2447 case cpu_to_le16(IEEE80211_STYPE_RTS):
2448 stats->ctrl[CONTROL_RTS]++;
2449 break;
2450 case cpu_to_le16(IEEE80211_STYPE_CTS):
2451 stats->ctrl[CONTROL_CTS]++;
2452 break;
2453 case cpu_to_le16(IEEE80211_STYPE_ACK):
2454 stats->ctrl[CONTROL_ACK]++;
2455 break;
2456 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2457 stats->ctrl[CONTROL_CFEND]++;
2458 break;
2459 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2460 stats->ctrl[CONTROL_CFENDACK]++;
2461 break;
2462 }
2463 } else {
2464 /* data */
2465 stats->data_cnt++;
2466 stats->data_bytes += len;
2467 }
d5f4cf71 2468 iwl_leds_background(priv);
22fdf3c9
WYG		 2469}
2470EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 2471#endif
2472
a0ea9493 2473static const char *get_csr_string(int cmd)
696bdee3
WYG		 2474{
2475 switch (cmd) {
2476 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2477 IWL_CMD(CSR_INT_COALESCING);
2478 IWL_CMD(CSR_INT);
2479 IWL_CMD(CSR_INT_MASK);
2480 IWL_CMD(CSR_FH_INT_STATUS);
2481 IWL_CMD(CSR_GPIO_IN);
2482 IWL_CMD(CSR_RESET);
2483 IWL_CMD(CSR_GP_CNTRL);
2484 IWL_CMD(CSR_HW_REV);
2485 IWL_CMD(CSR_EEPROM_REG);
2486 IWL_CMD(CSR_EEPROM_GP);
2487 IWL_CMD(CSR_OTP_GP_REG);
2488 IWL_CMD(CSR_GIO_REG);
2489 IWL_CMD(CSR_GP_UCODE_REG);
2490 IWL_CMD(CSR_GP_DRIVER_REG);
2491 IWL_CMD(CSR_UCODE_DRV_GP1);
2492 IWL_CMD(CSR_UCODE_DRV_GP2);
2493 IWL_CMD(CSR_LED_REG);
2494 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2495 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2496 IWL_CMD(CSR_ANA_PLL_CFG);
2497 IWL_CMD(CSR_HW_REV_WA_REG);
2498 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2499 default:
2500 return "UNKNOWN";
2501
2502 }
2503}
2504
2505void iwl_dump_csr(struct iwl_priv *priv)
2506{
2507 int i;
2508 u32 csr_tbl[] = {
2509 CSR_HW_IF_CONFIG_REG,
2510 CSR_INT_COALESCING,
2511 CSR_INT,
2512 CSR_INT_MASK,
2513 CSR_FH_INT_STATUS,
2514 CSR_GPIO_IN,
2515 CSR_RESET,
2516 CSR_GP_CNTRL,
2517 CSR_HW_REV,
2518 CSR_EEPROM_REG,
2519 CSR_EEPROM_GP,
2520 CSR_OTP_GP_REG,
2521 CSR_GIO_REG,
2522 CSR_GP_UCODE_REG,
2523 CSR_GP_DRIVER_REG,
2524 CSR_UCODE_DRV_GP1,
2525 CSR_UCODE_DRV_GP2,
2526 CSR_LED_REG,
2527 CSR_DRAM_INT_TBL_REG,
2528 CSR_GIO_CHICKEN_BITS,
2529 CSR_ANA_PLL_CFG,
2530 CSR_HW_REV_WA_REG,
2531 CSR_DBG_HPET_MEM_REG
2532 };
2533 IWL_ERR(priv, "CSR values:\n");
2534 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2535 "CSR_INT_PERIODIC_REG)\n");
2536 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2537 IWL_ERR(priv, " %25s: 0X%08x\n",
2538 get_csr_string(csr_tbl[i]),
2539 iwl_read32(priv, csr_tbl[i]));
2540 }
2541}
2542EXPORT_SYMBOL(iwl_dump_csr);
2543
a0ea9493 2544static const char *get_fh_string(int cmd)
1b3eb823
WYG		 2545{
2546 switch (cmd) {
2547 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2548 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2549 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2550 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2551 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2552 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2553 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2554 IWL_CMD(FH_TSSR_TX_STATUS_REG);
2555 IWL_CMD(FH_TSSR_TX_ERROR_REG);
2556 default:
2557 return "UNKNOWN";
2558
2559 }
2560}
2561
2562int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2563{
2564 int i;
2565#ifdef CONFIG_IWLWIFI_DEBUG
2566 int pos = 0;
2567 size_t bufsz = 0;
2568#endif
2569 u32 fh_tbl[] = {
2570 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2571 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2572 FH_RSCSR_CHNL0_WPTR,
2573 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2574 FH_MEM_RSSR_SHARED_CTRL_REG,
2575 FH_MEM_RSSR_RX_STATUS_REG,
2576 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2577 FH_TSSR_TX_STATUS_REG,
2578 FH_TSSR_TX_ERROR_REG
2579 };
2580#ifdef CONFIG_IWLWIFI_DEBUG
2581 if (display) {
2582 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2583 *buf = kmalloc(bufsz, GFP_KERNEL);
2584 if (!*buf)
2585 return -ENOMEM;
2586 pos += scnprintf(*buf + pos, bufsz - pos,
2587 "FH register values:\n");
2588 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2589 pos += scnprintf(*buf + pos, bufsz - pos,
2590 " %34s: 0X%08x\n",
2591 get_fh_string(fh_tbl[i]),
2592 iwl_read_direct32(priv, fh_tbl[i]));
2593 }
2594 return pos;
2595 }
2596#endif
2597 IWL_ERR(priv, "FH register values:\n");
2598 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2599 IWL_ERR(priv, " %34s: 0X%08x\n",
2600 get_fh_string(fh_tbl[i]),
2601 iwl_read_direct32(priv, fh_tbl[i]));
2602 }
2603 return 0;
2604}
2605EXPORT_SYMBOL(iwl_dump_fh);
2606
a93e7973 2607static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG		 2608{
2609 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2610 return;
2611
2612 if (!iwl_is_associated(priv)) {
2613 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
2614 return;
2615 }
2616 /*
2617 * There is no easy and better way to force reset the radio,
2618 * the only known method is switching channel which will force to
2619 * reset and tune the radio.
2620 * Use internal short scan (single channel) operation to should
2621 * achieve this objective.
2622 * Driver should reset the radio when number of consecutive missed
2623 * beacon, or any other uCode error condition detected.
2624 */
2625 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
2626 iwl_internal_short_hw_scan(priv);
afbdd69a 2627}
a93e7973 2628
a93e7973 2629
c04f9f22 2630int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
a93e7973 2631{
8a472da4
WYG		 2632 struct iwl_force_reset *force_reset;
2633
a93e7973
WYG		 2634 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2635 return -EINVAL;
2636
8a472da4
WYG		 2637 if (mode >= IWL_MAX_FORCE_RESET) {
2638 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
2639 return -EINVAL;
2640 }
2641 force_reset = &priv->force_reset[mode];
2642 force_reset->reset_request_count++;
c04f9f22
WYG		 2643 if (!external) {
2644 if (force_reset->last_force_reset_jiffies &&
2645 time_after(force_reset->last_force_reset_jiffies +
2646 force_reset->reset_duration, jiffies)) {
2647 IWL_DEBUG_INFO(priv, "force reset rejected\n");
2648 force_reset->reset_reject_count++;
2649 return -EAGAIN;
2650 }
a93e7973 2651 }
8a472da4
WYG		 2652 force_reset->reset_success_count++;
2653 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 2654 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG		 2655 switch (mode) {
2656 case IWL_RF_RESET:
2657 iwl_force_rf_reset(priv);
2658 break;
2659 case IWL_FW_RESET:
c04f9f22
WYG		 2660 /*
2661 * if the request is from external(ex: debugfs),
2662 * then always perform the request in regardless the module
2663 * parameter setting
2664 * if the request is from internal (uCode error or driver
2665 * detect failure), then fw_restart module parameter
2666 * need to be check before performing firmware reload
2667 */
2668 if (!external && !priv->cfg->mod_params->restart_fw) {
2669 IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
2670 "module parameter setting\n");
2671 break;
2672 }
a93e7973
WYG		 2673 IWL_ERR(priv, "On demand firmware reload\n");
2674 /* Set the FW error flag -- cleared on iwl_down */
2675 set_bit(STATUS_FW_ERROR, &priv->status);
2676 wake_up_interruptible(&priv->wait_command_queue);
2677 /*
2678 * Keep the restart process from trying to send host
2679 * commands by clearing the INIT status bit
2680 */
2681 clear_bit(STATUS_READY, &priv->status);
2682 queue_work(priv->workqueue, &priv->restart);
2683 break;
a93e7973 2684 }
a93e7973
WYG		 2685 return 0;
2686}
b74e31a9
WYG		 2687EXPORT_SYMBOL(iwl_force_reset);
2688
2689/**
2690 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
2691 *
2692 * During normal condition (no queue is stuck), the timer is continually set to
2693 * execute every monitor_recover_period milliseconds after the last timer
2694 * expired. When the queue read_ptr is at the same place, the timer is
2695 * shorten to 100mSecs. This is
2696 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
2697 * 2) to detect the stuck queues quicker before the station and AP can
2698 * disassociate each other.
2699 *
2700 * This function monitors all the tx queues and recover from it if any
2701 * of the queues are stuck.
2702 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
2703 * it will recover by resetting the firmware and return.
2704 * 2. Then, it checks for station association. If it associates it will check
2705 * other queues. If any queue is stuck, it will recover by resetting
2706 * the firmware.
2707 * Note: It the number of times the queue read_ptr to be at the same place to
2708 * be MAX_REPEAT+1 in order to consider to be stuck.
2709 */
2710/*
2711 * The maximum number of times the read pointer of the tx queue at the
2712 * same place without considering to be stuck.
2713 */
2714#define MAX_REPEAT (2)
2715static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
2716{
2717 struct iwl_tx_queue *txq;
2718 struct iwl_queue *q;
2719
2720 txq = &priv->txq[cnt];
2721 q = &txq->q;
2722 /* queue is empty, skip */
2723 if (q->read_ptr != q->write_ptr) {
2724 if (q->read_ptr == q->last_read_ptr) {
2725 /* a queue has not been read from last time */
2726 if (q->repeat_same_read_ptr > MAX_REPEAT) {
2727 IWL_ERR(priv,
2728 "queue %d stuck %d time. Fw reload.\n",
2729 q->id, q->repeat_same_read_ptr);
2730 q->repeat_same_read_ptr = 0;
c04f9f22 2731 iwl_force_reset(priv, IWL_FW_RESET, false);
b74e31a9
WYG		 2732 } else {
2733 q->repeat_same_read_ptr++;
2734 IWL_DEBUG_RADIO(priv,
2735 "queue %d, not read %d time\n",
2736 q->id,
2737 q->repeat_same_read_ptr);
2738 mod_timer(&priv->monitor_recover, jiffies +
2739 msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
2740 }
2741 return 1;
2742 } else {
2743 q->last_read_ptr = q->read_ptr;
2744 q->repeat_same_read_ptr = 0;
2745 }
2746 }
2747 return 0;
2748}
2749
2750void iwl_bg_monitor_recover(unsigned long data)
2751{
2752 struct iwl_priv *priv = (struct iwl_priv *)data;
2753 int cnt;
2754
2755 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2756 return;
2757
2758 /* monitor and check for stuck cmd queue */
2759 if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
2760 return;
2761
2762 /* monitor and check for other stuck queues */
2763 if (iwl_is_associated(priv)) {
2764 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
2765 /* skip as we already checked the command queue */
2766 if (cnt == IWL_CMD_QUEUE_NUM)
2767 continue;
2768 if (iwl_check_stuck_queue(priv, cnt))
2769 return;
2770 }
2771 }
2772 /*
2773 * Reschedule the timer to occur in
2774 * priv->cfg->monitor_recover_period
2775 */
2776 mod_timer(&priv->monitor_recover,
2777 jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
2778}
2779EXPORT_SYMBOL(iwl_bg_monitor_recover);
afbdd69a 2780
a0ee74cf
WYG		 2781
2782/*
2783 * extended beacon time format
2784 * time in usec will be changed into a 32-bit value in extended:internal format
2785 * the extended part is the beacon counts
2786 * the internal part is the time in usec within one beacon interval
2787 */
2788u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
2789{
2790 u32 quot;
2791 u32 rem;
2792 u32 interval = beacon_interval * TIME_UNIT;
2793
2794 if (!interval || !usec)
2795 return 0;
2796
2797 quot = (usec / interval) &
2798 (iwl_beacon_time_mask_high(priv,
2799 priv->hw_params.beacon_time_tsf_bits) >>
2800 priv->hw_params.beacon_time_tsf_bits);
2801 rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
2802 priv->hw_params.beacon_time_tsf_bits);
2803
2804 return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
2805}
2806EXPORT_SYMBOL(iwl_usecs_to_beacons);
2807
2808/* base is usually what we get from ucode with each received frame,
2809 * the same as HW timer counter counting down
2810 */
2811__le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
2812 u32 addon, u32 beacon_interval)
2813{
2814 u32 base_low = base & iwl_beacon_time_mask_low(priv,
2815 priv->hw_params.beacon_time_tsf_bits);
2816 u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
2817 priv->hw_params.beacon_time_tsf_bits);
2818 u32 interval = beacon_interval * TIME_UNIT;
2819 u32 res = (base & iwl_beacon_time_mask_high(priv,
2820 priv->hw_params.beacon_time_tsf_bits)) +
2821 (addon & iwl_beacon_time_mask_high(priv,
2822 priv->hw_params.beacon_time_tsf_bits));
2823
2824 if (base_low > addon_low)
2825 res += base_low - addon_low;
2826 else if (base_low < addon_low) {
2827 res += interval + base_low - addon_low;
2828 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2829 } else
2830 res += (1 << priv->hw_params.beacon_time_tsf_bits);
2831
2832 return cpu_to_le32(res);
2833}
2834EXPORT_SYMBOL(iwl_add_beacon_time);
2835
6da3a13e
WYG		 2836#ifdef CONFIG_PM
2837
2838int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2839{
2840 struct iwl_priv *priv = pci_get_drvdata(pdev);
2841
2842 /*
2843 * This function is called when system goes into suspend state
2844 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2845 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2846 * it will not call apm_ops.stop() to stop the DMA operation.
2847 * Calling apm_ops.stop here to make sure we stop the DMA.
2848 */
2849 priv->cfg->ops->lib->apm_ops.stop(priv);
2850
2851 pci_save_state(pdev);
2852 pci_disable_device(pdev);
2853 pci_set_power_state(pdev, PCI_D3hot);
2854
2855 return 0;
2856}
2857EXPORT_SYMBOL(iwl_pci_suspend);
2858
2859int iwl_pci_resume(struct pci_dev *pdev)
2860{
2861 struct iwl_priv *priv = pci_get_drvdata(pdev);
2862 int ret;
0ab84cff 2863 bool hw_rfkill = false;
6da3a13e 2864
cd398c31
AK		 2865 /*
2866 * We disable the RETRY_TIMEOUT register (0x41) to keep
2867 * PCI Tx retries from interfering with C3 CPU state.
2868 */
2869 pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
2870
6da3a13e
WYG		 2871 pci_set_power_state(pdev, PCI_D0);
2872 ret = pci_enable_device(pdev);
2873 if (ret)
2874 return ret;
2875 pci_restore_state(pdev);
2876 iwl_enable_interrupts(priv);
2877
0ab84cff
JB		 2878 if (!(iwl_read32(priv, CSR_GP_CNTRL) &
2879 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
2880 hw_rfkill = true;
2881
2882 if (hw_rfkill)
2883 set_bit(STATUS_RF_KILL_HW, &priv->status);
2884 else
2885 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2886
2887 wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
2888
6da3a13e
WYG		 2889 return 0;
2890}
2891EXPORT_SYMBOL(iwl_pci_resume);
2892
2893#endif /* CONFIG_PM */
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