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iwlwifi: initialize iwl_wimax_coex_cmd.flags
[net-next-2.6.git] / drivers / net / wireless / iwlwifi / iwl-core.c
CommitLineData
df48c323 1/******************************************************************************
df48c323
TW		 2 *
3 * GPL LICENSE SUMMARY
4 *
1f447808 5 * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
df48c323
TW		 6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of version 2 of the GNU General Public License as
9 * published by the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
19 * USA
20 *
21 * The full GNU General Public License is included in this distribution
22 * in the file called LICENSE.GPL.
23 *
24 * Contact Information:
759ef89f 25 * Intel Linux Wireless <ilw@linux.intel.com>
df48c323
TW		 26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *****************************************************************************/
28
29#include <linux/kernel.h>
30#include <linux/module.h>
8ccde88a 31#include <linux/etherdevice.h>
d43c36dc 32#include <linux/sched.h>
1d0a082d 33#include <net/mac80211.h>
df48c323 34
6bc913bd 35#include "iwl-eeprom.h"
3e0d4cb1 36#include "iwl-dev.h" /* FIXME: remove */
19335774 37#include "iwl-debug.h"
df48c323 38#include "iwl-core.h"
b661c819 39#include "iwl-io.h"
5da4b55f 40#include "iwl-power.h"
83dde8c9 41#include "iwl-sta.h"
ef850d7c 42#include "iwl-helpers.h"
df48c323 43
1d0a082d 44
df48c323
TW		 45MODULE_DESCRIPTION("iwl core");
46MODULE_VERSION(IWLWIFI_VERSION);
a7b75207 47MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
712b6cf5 48MODULE_LICENSE("GPL");
df48c323 49
06702a73
WYG		 50/*
51 * set bt_coex_active to true, uCode will do kill/defer
52 * every time the priority line is asserted (BT is sending signals on the
53 * priority line in the PCIx).
54 * set bt_coex_active to false, uCode will ignore the BT activity and
55 * perform the normal operation
56 *
57 * User might experience transmit issue on some platform due to WiFi/BT
58 * co-exist problem. The possible behaviors are:
59 * Able to scan and finding all the available AP
60 * Not able to associate with any AP
61 * On those platforms, WiFi communication can be restored by set
62 * "bt_coex_active" module parameter to "false"
63 *
64 * default: bt_coex_active = true (BT_COEX_ENABLE)
65 */
66static bool bt_coex_active = true;
67module_param(bt_coex_active, bool, S_IRUGO);
6c69d121 68MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
06702a73 69
1933ac4d
WYG		 70static struct iwl_wimax_coex_event_entry cu_priorities[COEX_NUM_OF_EVENTS] = {
71 {COEX_CU_UNASSOC_IDLE_RP, COEX_CU_UNASSOC_IDLE_WP,
72 0, COEX_UNASSOC_IDLE_FLAGS},
73 {COEX_CU_UNASSOC_MANUAL_SCAN_RP, COEX_CU_UNASSOC_MANUAL_SCAN_WP,
74 0, COEX_UNASSOC_MANUAL_SCAN_FLAGS},
75 {COEX_CU_UNASSOC_AUTO_SCAN_RP, COEX_CU_UNASSOC_AUTO_SCAN_WP,
76 0, COEX_UNASSOC_AUTO_SCAN_FLAGS},
77 {COEX_CU_CALIBRATION_RP, COEX_CU_CALIBRATION_WP,
78 0, COEX_CALIBRATION_FLAGS},
79 {COEX_CU_PERIODIC_CALIBRATION_RP, COEX_CU_PERIODIC_CALIBRATION_WP,
80 0, COEX_PERIODIC_CALIBRATION_FLAGS},
81 {COEX_CU_CONNECTION_ESTAB_RP, COEX_CU_CONNECTION_ESTAB_WP,
82 0, COEX_CONNECTION_ESTAB_FLAGS},
83 {COEX_CU_ASSOCIATED_IDLE_RP, COEX_CU_ASSOCIATED_IDLE_WP,
84 0, COEX_ASSOCIATED_IDLE_FLAGS},
85 {COEX_CU_ASSOC_MANUAL_SCAN_RP, COEX_CU_ASSOC_MANUAL_SCAN_WP,
86 0, COEX_ASSOC_MANUAL_SCAN_FLAGS},
87 {COEX_CU_ASSOC_AUTO_SCAN_RP, COEX_CU_ASSOC_AUTO_SCAN_WP,
88 0, COEX_ASSOC_AUTO_SCAN_FLAGS},
89 {COEX_CU_ASSOC_ACTIVE_LEVEL_RP, COEX_CU_ASSOC_ACTIVE_LEVEL_WP,
90 0, COEX_ASSOC_ACTIVE_LEVEL_FLAGS},
91 {COEX_CU_RF_ON_RP, COEX_CU_RF_ON_WP, 0, COEX_CU_RF_ON_FLAGS},
92 {COEX_CU_RF_OFF_RP, COEX_CU_RF_OFF_WP, 0, COEX_RF_OFF_FLAGS},
93 {COEX_CU_STAND_ALONE_DEBUG_RP, COEX_CU_STAND_ALONE_DEBUG_WP,
94 0, COEX_STAND_ALONE_DEBUG_FLAGS},
95 {COEX_CU_IPAN_ASSOC_LEVEL_RP, COEX_CU_IPAN_ASSOC_LEVEL_WP,
96 0, COEX_IPAN_ASSOC_LEVEL_FLAGS},
97 {COEX_CU_RSRVD1_RP, COEX_CU_RSRVD1_WP, 0, COEX_RSRVD1_FLAGS},
98 {COEX_CU_RSRVD2_RP, COEX_CU_RSRVD2_WP, 0, COEX_RSRVD2_FLAGS}
99};
100
c7de35cd
RR		 101#define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
102 [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
103 IWL_RATE_SISO_##s##M_PLCP, \
104 IWL_RATE_MIMO2_##s##M_PLCP,\
105 IWL_RATE_MIMO3_##s##M_PLCP,\
106 IWL_RATE_##r##M_IEEE, \
107 IWL_RATE_##ip##M_INDEX, \
108 IWL_RATE_##in##M_INDEX, \
109 IWL_RATE_##rp##M_INDEX, \
110 IWL_RATE_##rn##M_INDEX, \
111 IWL_RATE_##pp##M_INDEX, \
112 IWL_RATE_##np##M_INDEX }
113
a562a9dd
RC		 114u32 iwl_debug_level;
115EXPORT_SYMBOL(iwl_debug_level);
116
c7de35cd
RR		 117/*
118 * Parameter order:
119 * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
120 *
121 * If there isn't a valid next or previous rate then INV is used which
122 * maps to IWL_RATE_INVALID
123 *
124 */
1826dcc0 125const struct iwl_rate_info iwl_rates[IWL_RATE_COUNT] = {
c7de35cd
RR		 126 IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
127 IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
128 IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
129 IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
130 IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
131 IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
132 IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
133 IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
134 IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
135 IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
136 IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
137 IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
138 IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
139 /* FIXME:RS: ^^ should be INV (legacy) */
140};
1826dcc0 141EXPORT_SYMBOL(iwl_rates);
c7de35cd 142
e7d326ac
TW		 143int iwl_hwrate_to_plcp_idx(u32 rate_n_flags)
144{
145 int idx = 0;
146
147 /* HT rate format */
148 if (rate_n_flags & RATE_MCS_HT_MSK) {
149 idx = (rate_n_flags & 0xff);
150
60d32215
DH		 151 if (idx >= IWL_RATE_MIMO3_6M_PLCP)
152 idx = idx - IWL_RATE_MIMO3_6M_PLCP;
153 else if (idx >= IWL_RATE_MIMO2_6M_PLCP)
e7d326ac
TW		 154 idx = idx - IWL_RATE_MIMO2_6M_PLCP;
155
156 idx += IWL_FIRST_OFDM_RATE;
157 /* skip 9M not supported in ht*/
158 if (idx >= IWL_RATE_9M_INDEX)
159 idx += 1;
160 if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
161 return idx;
162
163 /* legacy rate format, search for match in table */
164 } else {
165 for (idx = 0; idx < ARRAY_SIZE(iwl_rates); idx++)
166 if (iwl_rates[idx].plcp == (rate_n_flags & 0xFF))
167 return idx;
168 }
169
170 return -1;
171}
172EXPORT_SYMBOL(iwl_hwrate_to_plcp_idx);
173
76eff18b
TW		 174u8 iwl_toggle_tx_ant(struct iwl_priv *priv, u8 ant)
175{
176 int i;
177 u8 ind = ant;
178 for (i = 0; i < RATE_ANT_NUM - 1; i++) {
179 ind = (ind + 1) < RATE_ANT_NUM ? ind + 1 : 0;
180 if (priv->hw_params.valid_tx_ant & BIT(ind))
181 return ind;
182 }
183 return ant;
184}
47ff65c4 185EXPORT_SYMBOL(iwl_toggle_tx_ant);
57bd1bea
TW		 186
187const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
188EXPORT_SYMBOL(iwl_bcast_addr);
189
190
1d0a082d
AK		 191/* This function both allocates and initializes hw and priv. */
192struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg,
193 struct ieee80211_ops *hw_ops)
194{
195 struct iwl_priv *priv;
196
197 /* mac80211 allocates memory for this device instance, including
198 * space for this driver's private structure */
199 struct ieee80211_hw *hw =
200 ieee80211_alloc_hw(sizeof(struct iwl_priv), hw_ops);
201 if (hw == NULL) {
a3139c59
SO		 202 printk(KERN_ERR "%s: Can not allocate network device\n",
203 cfg->name);
1d0a082d
AK		 204 goto out;
205 }
206
207 priv = hw->priv;
208 priv->hw = hw;
209
210out:
211 return hw;
212}
213EXPORT_SYMBOL(iwl_alloc_all);
214
b661c819
TW		 215void iwl_hw_detect(struct iwl_priv *priv)
216{
217 priv->hw_rev = _iwl_read32(priv, CSR_HW_REV);
218 priv->hw_wa_rev = _iwl_read32(priv, CSR_HW_REV_WA_REG);
219 pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &priv->rev_id);
220}
221EXPORT_SYMBOL(iwl_hw_detect);
222
14d2aac5
AK		 223/*
224 * QoS support
225*/
e61146e3 226static void iwl_update_qos(struct iwl_priv *priv)
14d2aac5
AK		 227{
228 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
229 return;
230
231 priv->qos_data.def_qos_parm.qos_flags = 0;
232
14d2aac5
AK		 233 if (priv->qos_data.qos_active)
234 priv->qos_data.def_qos_parm.qos_flags |=
235 QOS_PARAM_FLG_UPDATE_EDCA_MSK;
236
237 if (priv->current_ht_config.is_ht)
238 priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
239
e61146e3
SG		 240 IWL_DEBUG_QOS(priv, "send QoS cmd with Qos active=%d FLAGS=0x%X\n",
241 priv->qos_data.qos_active,
242 priv->qos_data.def_qos_parm.qos_flags);
14d2aac5 243
e61146e3
SG		 244 iwl_send_cmd_pdu_async(priv, REPLY_QOS_PARAM,
245 sizeof(struct iwl_qosparam_cmd),
246 &priv->qos_data.def_qos_parm, NULL);
14d2aac5 247}
c7de35cd 248
d9fe60de
JB		 249#define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
250#define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
c7de35cd 251static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
d9fe60de 252 struct ieee80211_sta_ht_cap *ht_info,
c7de35cd
RR		 253 enum ieee80211_band band)
254{
39130df3
RR		 255 u16 max_bit_rate = 0;
256 u8 rx_chains_num = priv->hw_params.rx_chains_num;
257 u8 tx_chains_num = priv->hw_params.tx_chains_num;
258
c7de35cd 259 ht_info->cap = 0;
d9fe60de 260 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
c7de35cd 261
d9fe60de 262 ht_info->ht_supported = true;
c7de35cd 263
b261793d
DH		 264 if (priv->cfg->ht_greenfield_support)
265 ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
d9fe60de 266 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
39130df3 267 max_bit_rate = MAX_BIT_RATE_20_MHZ;
7aafef1c 268 if (priv->hw_params.ht40_channel & BIT(band)) {
d9fe60de
JB		 269 ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
270 ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
271 ht_info->mcs.rx_mask[4] = 0x01;
39130df3 272 max_bit_rate = MAX_BIT_RATE_40_MHZ;
c7de35cd 273 }
c7de35cd
RR		 274
275 if (priv->cfg->mod_params->amsdu_size_8K)
d9fe60de 276 ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
c7de35cd
RR		 277
278 ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
279 ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
280
d9fe60de 281 ht_info->mcs.rx_mask[0] = 0xFF;
39130df3 282 if (rx_chains_num >= 2)
d9fe60de 283 ht_info->mcs.rx_mask[1] = 0xFF;
39130df3 284 if (rx_chains_num >= 3)
d9fe60de 285 ht_info->mcs.rx_mask[2] = 0xFF;
39130df3
RR		 286
287 /* Highest supported Rx data rate */
288 max_bit_rate *= rx_chains_num;
d9fe60de
JB		 289 WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
290 ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
39130df3
RR		 291
292 /* Tx MCS capabilities */
d9fe60de 293 ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
39130df3 294 if (tx_chains_num != rx_chains_num) {
d9fe60de
JB		 295 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
296 ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
297 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
39130df3 298 }
c7de35cd 299}
c7de35cd 300
c7de35cd
RR		 301/**
302 * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
303 */
534166de 304int iwlcore_init_geos(struct iwl_priv *priv)
c7de35cd
RR		 305{
306 struct iwl_channel_info *ch;
307 struct ieee80211_supported_band *sband;
308 struct ieee80211_channel *channels;
309 struct ieee80211_channel *geo_ch;
310 struct ieee80211_rate *rates;
311 int i = 0;
312
313 if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
314 priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
e1623446 315 IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
c7de35cd
RR		 316 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
317 return 0;
318 }
319
320 channels = kzalloc(sizeof(struct ieee80211_channel) *
321 priv->channel_count, GFP_KERNEL);
322 if (!channels)
323 return -ENOMEM;
324
5027309b 325 rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
c7de35cd
RR		 326 GFP_KERNEL);
327 if (!rates) {
328 kfree(channels);
329 return -ENOMEM;
330 }
331
332 /* 5.2GHz channels start after the 2.4GHz channels */
333 sband = &priv->bands[IEEE80211_BAND_5GHZ];
334 sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
335 /* just OFDM */
336 sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
5027309b 337 sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
c7de35cd 338
49779293 339 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 340 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 341 IEEE80211_BAND_5GHZ);
c7de35cd
RR		 342
343 sband = &priv->bands[IEEE80211_BAND_2GHZ];
344 sband->channels = channels;
345 /* OFDM & CCK */
346 sband->bitrates = rates;
5027309b 347 sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
c7de35cd 348
49779293 349 if (priv->cfg->sku & IWL_SKU_N)
d9fe60de 350 iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
49779293 351 IEEE80211_BAND_2GHZ);
c7de35cd
RR		 352
353 priv->ieee_channels = channels;
354 priv->ieee_rates = rates;
355
c7de35cd
RR		 356 for (i = 0; i < priv->channel_count; i++) {
357 ch = &priv->channel_info[i];
358
359 /* FIXME: might be removed if scan is OK */
360 if (!is_channel_valid(ch))
361 continue;
362
363 if (is_channel_a_band(ch))
364 sband = &priv->bands[IEEE80211_BAND_5GHZ];
365 else
366 sband = &priv->bands[IEEE80211_BAND_2GHZ];
367
368 geo_ch = &sband->channels[sband->n_channels++];
369
370 geo_ch->center_freq =
371 ieee80211_channel_to_frequency(ch->channel);
372 geo_ch->max_power = ch->max_power_avg;
373 geo_ch->max_antenna_gain = 0xff;
374 geo_ch->hw_value = ch->channel;
375
376 if (is_channel_valid(ch)) {
377 if (!(ch->flags & EEPROM_CHANNEL_IBSS))
378 geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
379
380 if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
381 geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
382
383 if (ch->flags & EEPROM_CHANNEL_RADAR)
384 geo_ch->flags |= IEEE80211_CHAN_RADAR;
385
7aafef1c 386 geo_ch->flags |= ch->ht40_extension_channel;
4d38c2e8 387
dc1b0973
WYG		 388 if (ch->max_power_avg > priv->tx_power_device_lmt)
389 priv->tx_power_device_lmt = ch->max_power_avg;
c7de35cd
RR		 390 } else {
391 geo_ch->flags |= IEEE80211_CHAN_DISABLED;
392 }
393
e1623446 394 IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
c7de35cd
RR		 395 ch->channel, geo_ch->center_freq,
396 is_channel_a_band(ch) ? "5.2" : "2.4",
397 geo_ch->flags & IEEE80211_CHAN_DISABLED ?
398 "restricted" : "valid",
399 geo_ch->flags);
400 }
401
402 if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
403 priv->cfg->sku & IWL_SKU_A) {
978785a3
TW		 404 IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
405 "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
a3139c59
SO		 406 priv->pci_dev->device,
407 priv->pci_dev->subsystem_device);
c7de35cd
RR		 408 priv->cfg->sku &= ~IWL_SKU_A;
409 }
410
978785a3 411 IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
a3139c59
SO		 412 priv->bands[IEEE80211_BAND_2GHZ].n_channels,
413 priv->bands[IEEE80211_BAND_5GHZ].n_channels);
c7de35cd
RR		 414
415 set_bit(STATUS_GEO_CONFIGURED, &priv->status);
416
417 return 0;
418}
534166de 419EXPORT_SYMBOL(iwlcore_init_geos);
c7de35cd
RR		 420
421/*
422 * iwlcore_free_geos - undo allocations in iwlcore_init_geos
423 */
534166de 424void iwlcore_free_geos(struct iwl_priv *priv)
c7de35cd
RR		 425{
426 kfree(priv->ieee_channels);
427 kfree(priv->ieee_rates);
428 clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
429}
534166de 430EXPORT_SYMBOL(iwlcore_free_geos);
c7de35cd 431
37dc70fe
AK		 432/*
433 * iwlcore_rts_tx_cmd_flag: Set rts/cts. 3945 and 4965 only share this
434 * function.
435 */
436void iwlcore_rts_tx_cmd_flag(struct ieee80211_tx_info *info,
437 __le32 *tx_flags)
438{
439 if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
440 *tx_flags |= TX_CMD_FLG_RTS_MSK;
441 *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
442 } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
443 *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
444 *tx_flags |= TX_CMD_FLG_CTS_MSK;
445 }
446}
447EXPORT_SYMBOL(iwlcore_rts_tx_cmd_flag);
448
28a6b07a 449static bool is_single_rx_stream(struct iwl_priv *priv)
c7de35cd 450{
ba37a3d0 451 return priv->current_ht_config.smps == IEEE80211_SMPS_STATIC ||
02bb1bea 452 priv->current_ht_config.single_chain_sufficient;
c7de35cd 453}
963f5517 454
47c5196e
TW		 455static u8 iwl_is_channel_extension(struct iwl_priv *priv,
456 enum ieee80211_band band,
457 u16 channel, u8 extension_chan_offset)
458{
459 const struct iwl_channel_info *ch_info;
460
461 ch_info = iwl_get_channel_info(priv, band, channel);
462 if (!is_channel_valid(ch_info))
463 return 0;
464
d9fe60de 465 if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
7aafef1c 466 return !(ch_info->ht40_extension_channel &
689da1b3 467 IEEE80211_CHAN_NO_HT40PLUS);
d9fe60de 468 else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
7aafef1c 469 return !(ch_info->ht40_extension_channel &
689da1b3 470 IEEE80211_CHAN_NO_HT40MINUS);
47c5196e
TW		 471
472 return 0;
473}
474
7aafef1c 475u8 iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
d9fe60de 476 struct ieee80211_sta_ht_cap *sta_ht_inf)
47c5196e 477{
fad95bf5 478 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
47c5196e 479
fad95bf5 480 if (!ht_conf->is_ht || !ht_conf->is_40mhz)
47c5196e
TW		 481 return 0;
482
a2b0f02e
WYG		 483 /* We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
484 * the bit will not set if it is pure 40MHz case
485 */
47c5196e 486 if (sta_ht_inf) {
a2b0f02e 487 if (!sta_ht_inf->ht_supported)
47c5196e
TW		 488 return 0;
489 }
1e4247d4
WYG		 490#ifdef CONFIG_IWLWIFI_DEBUG
491 if (priv->disable_ht40)
492 return 0;
493#endif
611d3eb7
WYG		 494 return iwl_is_channel_extension(priv, priv->band,
495 le16_to_cpu(priv->staging_rxon.channel),
fad95bf5 496 ht_conf->extension_chan_offset);
47c5196e 497}
7aafef1c 498EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
47c5196e 499
2c2f3b33
TW		 500static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
501{
502 u16 new_val = 0;
503 u16 beacon_factor = 0;
504
505 beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
506 new_val = beacon_val / beacon_factor;
507
508 if (!new_val)
509 new_val = max_beacon_val;
510
511 return new_val;
512}
513
514void iwl_setup_rxon_timing(struct iwl_priv *priv)
515{
516 u64 tsf;
517 s32 interval_tm, rem;
518 unsigned long flags;
519 struct ieee80211_conf *conf = NULL;
520 u16 beacon_int;
521
522 conf = ieee80211_get_hw_conf(priv->hw);
523
524 spin_lock_irqsave(&priv->lock, flags);
525 priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
526 priv->rxon_timing.listen_interval = cpu_to_le16(conf->listen_interval);
527
528 if (priv->iw_mode == NL80211_IFTYPE_STATION) {
529 beacon_int = priv->beacon_int;
530 priv->rxon_timing.atim_window = 0;
531 } else {
532 beacon_int = priv->vif->bss_conf.beacon_int;
533
534 /* TODO: we need to get atim_window from upper stack
535 * for now we set to 0 */
536 priv->rxon_timing.atim_window = 0;
537 }
538
539 beacon_int = iwl_adjust_beacon_interval(beacon_int,
540 priv->hw_params.max_beacon_itrvl * 1024);
541 priv->rxon_timing.beacon_interval = cpu_to_le16(beacon_int);
542
543 tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
544 interval_tm = beacon_int * 1024;
545 rem = do_div(tsf, interval_tm);
546 priv->rxon_timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
547
548 spin_unlock_irqrestore(&priv->lock, flags);
549 IWL_DEBUG_ASSOC(priv,
550 "beacon interval %d beacon timer %d beacon tim %d\n",
551 le16_to_cpu(priv->rxon_timing.beacon_interval),
552 le32_to_cpu(priv->rxon_timing.beacon_init_val),
553 le16_to_cpu(priv->rxon_timing.atim_window));
554}
555EXPORT_SYMBOL(iwl_setup_rxon_timing);
556
8ccde88a
SO		 557void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, int hw_decrypt)
558{
559 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
560
561 if (hw_decrypt)
562 rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
563 else
564 rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
565
566}
567EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
568
569/**
570 * iwl_check_rxon_cmd - validate RXON structure is valid
571 *
572 * NOTE: This is really only useful during development and can eventually
573 * be #ifdef'd out once the driver is stable and folks aren't actively
574 * making changes
575 */
576int iwl_check_rxon_cmd(struct iwl_priv *priv)
577{
578 int error = 0;
579 int counter = 1;
580 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
581
582 if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
583 error |= le32_to_cpu(rxon->flags &
584 (RXON_FLG_TGJ_NARROW_BAND_MSK |
585 RXON_FLG_RADAR_DETECT_MSK));
586 if (error)
587 IWL_WARN(priv, "check 24G fields %d | %d\n",
588 counter++, error);
589 } else {
590 error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
591 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
592 if (error)
593 IWL_WARN(priv, "check 52 fields %d | %d\n",
594 counter++, error);
595 error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
596 if (error)
597 IWL_WARN(priv, "check 52 CCK %d | %d\n",
598 counter++, error);
599 }
600 error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
601 if (error)
602 IWL_WARN(priv, "check mac addr %d | %d\n", counter++, error);
603
604 /* make sure basic rates 6Mbps and 1Mbps are supported */
605 error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
606 ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
607 if (error)
608 IWL_WARN(priv, "check basic rate %d | %d\n", counter++, error);
609
610 error |= (le16_to_cpu(rxon->assoc_id) > 2007);
611 if (error)
612 IWL_WARN(priv, "check assoc id %d | %d\n", counter++, error);
613
614 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
615 == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
616 if (error)
617 IWL_WARN(priv, "check CCK and short slot %d | %d\n",
618 counter++, error);
619
620 error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
621 == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
622 if (error)
623 IWL_WARN(priv, "check CCK & auto detect %d | %d\n",
624 counter++, error);
625
626 error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
627 RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
628 if (error)
629 IWL_WARN(priv, "check TGG and auto detect %d | %d\n",
630 counter++, error);
631
632 if (error)
633 IWL_WARN(priv, "Tuning to channel %d\n",
634 le16_to_cpu(rxon->channel));
635
636 if (error) {
637 IWL_ERR(priv, "Not a valid iwl_rxon_assoc_cmd field values\n");
638 return -1;
639 }
640 return 0;
641}
642EXPORT_SYMBOL(iwl_check_rxon_cmd);
643
644/**
645 * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
646 * @priv: staging_rxon is compared to active_rxon
647 *
648 * If the RXON structure is changing enough to require a new tune,
649 * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
650 * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
651 */
652int iwl_full_rxon_required(struct iwl_priv *priv)
653{
654
655 /* These items are only settable from the full RXON command */
656 if (!(iwl_is_associated(priv)) ||
657 compare_ether_addr(priv->staging_rxon.bssid_addr,
658 priv->active_rxon.bssid_addr) ||
659 compare_ether_addr(priv->staging_rxon.node_addr,
660 priv->active_rxon.node_addr) ||
661 compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
662 priv->active_rxon.wlap_bssid_addr) ||
663 (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
664 (priv->staging_rxon.channel != priv->active_rxon.channel) ||
665 (priv->staging_rxon.air_propagation !=
666 priv->active_rxon.air_propagation) ||
667 (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
668 priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
669 (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
670 priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
c2105fa7
DH		 671 (priv->staging_rxon.ofdm_ht_triple_stream_basic_rates !=
672 priv->active_rxon.ofdm_ht_triple_stream_basic_rates) ||
8ccde88a
SO		 673 (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
674 return 1;
675
676 /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
677 * be updated with the RXON_ASSOC command -- however only some
678 * flag transitions are allowed using RXON_ASSOC */
679
680 /* Check if we are not switching bands */
681 if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
682 (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
683 return 1;
684
685 /* Check if we are switching association toggle */
686 if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
687 (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
688 return 1;
689
690 return 0;
691}
692EXPORT_SYMBOL(iwl_full_rxon_required);
693
694u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv)
695{
4a02886b
JB		 696 /*
697 * Assign the lowest rate -- should really get this from
698 * the beacon skb from mac80211.
699 */
8ccde88a
SO		 700 if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)
701 return IWL_RATE_1M_PLCP;
702 else
703 return IWL_RATE_6M_PLCP;
704}
705EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
706
fad95bf5 707void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
47c5196e 708{
c1adf9fb 709 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
47c5196e 710
fad95bf5 711 if (!ht_conf->is_ht) {
a2b0f02e 712 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
42eb7c64 713 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
7aafef1c 714 RXON_FLG_HT40_PROT_MSK |
42eb7c64 715 RXON_FLG_HT_PROT_MSK);
47c5196e 716 return;
42eb7c64 717 }
47c5196e 718
a2b0f02e
WYG		 719 /* FIXME: if the definition of ht_protection changed, the "translation"
720 * will be needed for rxon->flags
721 */
fad95bf5 722 rxon->flags |= cpu_to_le32(ht_conf->ht_protection << RXON_FLG_HT_OPERATING_MODE_POS);
a2b0f02e
WYG		 723
724 /* Set up channel bandwidth:
7aafef1c 725 * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
a2b0f02e
WYG		 726 /* clear the HT channel mode before set the mode */
727 rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
728 RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
7aafef1c
WYG		 729 if (iwl_is_ht40_tx_allowed(priv, NULL)) {
730 /* pure ht40 */
fad95bf5 731 if (ht_conf->ht_protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
a2b0f02e 732 rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
508b08e7 733 /* Note: control channel is opposite of extension channel */
fad95bf5 734 switch (ht_conf->extension_chan_offset) {
508b08e7
WYG		 735 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
736 rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
737 break;
738 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
739 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
740 break;
741 }
742 } else {
a2b0f02e 743 /* Note: control channel is opposite of extension channel */
fad95bf5 744 switch (ht_conf->extension_chan_offset) {
a2b0f02e
WYG		 745 case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
746 rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
747 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
748 break;
749 case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
750 rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
751 rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
752 break;
753 case IEEE80211_HT_PARAM_CHA_SEC_NONE:
754 default:
755 /* channel location only valid if in Mixed mode */
756 IWL_ERR(priv, "invalid extension channel offset\n");
757 break;
758 }
759 }
760 } else {
761 rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
47c5196e
TW		 762 }
763
45823531
AK		 764 if (priv->cfg->ops->hcmd->set_rxon_chain)
765 priv->cfg->ops->hcmd->set_rxon_chain(priv);
47c5196e 766
02bb1bea 767 IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
ae5eb026 768 "extension channel offset 0x%x\n",
fad95bf5
JB		 769 le32_to_cpu(rxon->flags), ht_conf->ht_protection,
770 ht_conf->extension_chan_offset);
47c5196e
TW		 771 return;
772}
773EXPORT_SYMBOL(iwl_set_rxon_ht);
774
9e5e6c32
TW		 775#define IWL_NUM_RX_CHAINS_MULTIPLE 3
776#define IWL_NUM_RX_CHAINS_SINGLE 2
777#define IWL_NUM_IDLE_CHAINS_DUAL 2
778#define IWL_NUM_IDLE_CHAINS_SINGLE 1
779
2b396a12
JB		 780/*
781 * Determine how many receiver/antenna chains to use.
782 *
783 * More provides better reception via diversity. Fewer saves power
784 * at the expense of throughput, but only when not in powersave to
785 * start with.
786 *
c7de35cd
RR		 787 * MIMO (dual stream) requires at least 2, but works better with 3.
788 * This does not determine *which* chains to use, just how many.
789 */
28a6b07a 790static int iwl_get_active_rx_chain_count(struct iwl_priv *priv)
c7de35cd 791{
c7de35cd 792 /* # of Rx chains to use when expecting MIMO. */
02bb1bea 793 if (is_single_rx_stream(priv))
9e5e6c32 794 return IWL_NUM_RX_CHAINS_SINGLE;
c7de35cd 795 else
9e5e6c32 796 return IWL_NUM_RX_CHAINS_MULTIPLE;
28a6b07a 797}
c7de35cd 798
2b396a12 799/*
3f3e0376
WYG		 800 * When we are in power saving mode, unless device support spatial
801 * multiplexing power save, use the active count for rx chain count.
2b396a12 802 */
28a6b07a
TW		 803static int iwl_get_idle_rx_chain_count(struct iwl_priv *priv, int active_cnt)
804{
ba37a3d0
JB		 805 /* # Rx chains when idling, depending on SMPS mode */
806 switch (priv->current_ht_config.smps) {
807 case IEEE80211_SMPS_STATIC:
808 case IEEE80211_SMPS_DYNAMIC:
809 return IWL_NUM_IDLE_CHAINS_SINGLE;
810 case IEEE80211_SMPS_OFF:
811 return active_cnt;
c15d20c1 812 default:
ba37a3d0
JB		 813 WARN(1, "invalid SMPS mode %d",
814 priv->current_ht_config.smps);
815 return active_cnt;
3f3e0376 816 }
c7de35cd
RR		 817}
818
04816448
GE		 819/* up to 4 chains */
820static u8 iwl_count_chain_bitmap(u32 chain_bitmap)
821{
822 u8 res;
823 res = (chain_bitmap & BIT(0)) >> 0;
824 res += (chain_bitmap & BIT(1)) >> 1;
825 res += (chain_bitmap & BIT(2)) >> 2;
9bddbab3 826 res += (chain_bitmap & BIT(3)) >> 3;
04816448
GE		 827 return res;
828}
829
4c4df78f
CR		 830/**
831 * iwl_is_monitor_mode - Determine if interface in monitor mode
832 *
833 * priv->iw_mode is set in add_interface, but add_interface is
834 * never called for monitor mode. The only way mac80211 informs us about
835 * monitor mode is through configuring filters (call to configure_filter).
836 */
279b05d4 837bool iwl_is_monitor_mode(struct iwl_priv *priv)
4c4df78f
CR		 838{
839 return !!(priv->staging_rxon.filter_flags & RXON_FILTER_PROMISC_MSK);
840}
279b05d4 841EXPORT_SYMBOL(iwl_is_monitor_mode);
4c4df78f 842
c7de35cd
RR		 843/**
844 * iwl_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
845 *
846 * Selects how many and which Rx receivers/antennas/chains to use.
847 * This should not be used for scan command ... it puts data in wrong place.
848 */
849void iwl_set_rxon_chain(struct iwl_priv *priv)
850{
28a6b07a
TW		 851 bool is_single = is_single_rx_stream(priv);
852 bool is_cam = !test_bit(STATUS_POWER_PMI, &priv->status);
04816448
GE		 853 u8 idle_rx_cnt, active_rx_cnt, valid_rx_cnt;
854 u32 active_chains;
28a6b07a 855 u16 rx_chain;
c7de35cd
RR		 856
857 /* Tell uCode which antennas are actually connected.
858 * Before first association, we assume all antennas are connected.
859 * Just after first association, iwl_chain_noise_calibration()
860 * checks which antennas actually *are* connected. */
04816448
GE		 861 if (priv->chain_noise_data.active_chains)
862 active_chains = priv->chain_noise_data.active_chains;
863 else
864 active_chains = priv->hw_params.valid_rx_ant;
865
866 rx_chain = active_chains << RXON_RX_CHAIN_VALID_POS;
c7de35cd
RR		 867
868 /* How many receivers should we use? */
28a6b07a
TW		 869 active_rx_cnt = iwl_get_active_rx_chain_count(priv);
870 idle_rx_cnt = iwl_get_idle_rx_chain_count(priv, active_rx_cnt);
871
28a6b07a 872
04816448
GE		 873 /* correct rx chain count according hw settings
874 * and chain noise calibration
875 */
876 valid_rx_cnt = iwl_count_chain_bitmap(active_chains);
877 if (valid_rx_cnt < active_rx_cnt)
878 active_rx_cnt = valid_rx_cnt;
879
880 if (valid_rx_cnt < idle_rx_cnt)
881 idle_rx_cnt = valid_rx_cnt;
28a6b07a
TW		 882
883 rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
884 rx_chain |= idle_rx_cnt << RXON_RX_CHAIN_CNT_POS;
885
7b841727 886 /* copied from 'iwl_bg_request_scan()' */
d28667f8
WYG		 887 /* Force use of chains B and C (0x6) for Rx
888 * Avoid A (0x1) for the device has off-channel reception on A-band.
7b841727
RF		 889 * MIMO is not used here, but value is required */
890 if (iwl_is_monitor_mode(priv) &&
891 !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
d28667f8 892 priv->cfg->off_channel_workaround) {
fff7a434
WYG		 893 rx_chain = ANT_ABC << RXON_RX_CHAIN_VALID_POS;
894 rx_chain |= ANT_BC << RXON_RX_CHAIN_FORCE_SEL_POS;
895 rx_chain |= ANT_ABC << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
896 rx_chain |= 0x1 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
7b841727
RF		 897 }
898
28a6b07a
TW		 899 priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);
900
9e5e6c32 901 if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)
c7de35cd
RR		 902 priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
903 else
904 priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
905
e1623446 906 IWL_DEBUG_ASSOC(priv, "rx_chain=0x%X active=%d idle=%d\n",
28a6b07a
TW		 907 priv->staging_rxon.rx_chain,
908 active_rx_cnt, idle_rx_cnt);
909
910 WARN_ON(active_rx_cnt == 0 || idle_rx_cnt == 0 ||
911 active_rx_cnt < idle_rx_cnt);
c7de35cd
RR		 912}
913EXPORT_SYMBOL(iwl_set_rxon_chain);
bf85ea4f
AK		 914
915/**
17e72782 916 * iwl_set_rxon_channel - Set the phymode and channel values in staging RXON
bf85ea4f
AK		 917 * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
918 * @channel: Any channel valid for the requested phymode
919
920 * In addition to setting the staging RXON, priv->phymode is also set.
921 *
922 * NOTE: Does not commit to the hardware; it sets appropriate bit fields
923 * in the staging RXON flag structure based on the phymode
924 */
17e72782 925int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch)
bf85ea4f 926{
17e72782
TW		 927 enum ieee80211_band band = ch->band;
928 u16 channel = ieee80211_frequency_to_channel(ch->center_freq);
929
8622e705 930 if (!iwl_get_channel_info(priv, band, channel)) {
e1623446 931 IWL_DEBUG_INFO(priv, "Could not set channel to %d [%d]\n",
bf85ea4f
AK		 932 channel, band);
933 return -EINVAL;
934 }
935
936 if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
937 (priv->band == band))
938 return 0;
939
940 priv->staging_rxon.channel = cpu_to_le16(channel);
941 if (band == IEEE80211_BAND_5GHZ)
942 priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
943 else
944 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
945
946 priv->band = band;
947
e1623446 948 IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
bf85ea4f
AK		 949
950 return 0;
951}
c7de35cd 952EXPORT_SYMBOL(iwl_set_rxon_channel);
bf85ea4f 953
8ccde88a
SO		 954void iwl_set_flags_for_band(struct iwl_priv *priv,
955 enum ieee80211_band band)
956{
957 if (band == IEEE80211_BAND_5GHZ) {
958 priv->staging_rxon.flags &=
959 ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
960 | RXON_FLG_CCK_MSK);
961 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
962 } else {
963 /* Copied from iwl_post_associate() */
964 if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
965 priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
966 else
967 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
968
969 if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
970 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
971
972 priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
973 priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
974 priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
975 }
976}
8ccde88a
SO		 977
978/*
979 * initialize rxon structure with default values from eeprom
980 */
981void iwl_connection_init_rx_config(struct iwl_priv *priv, int mode)
982{
983 const struct iwl_channel_info *ch_info;
984
985 memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
986
987 switch (mode) {
988 case NL80211_IFTYPE_AP:
989 priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
990 break;
991
992 case NL80211_IFTYPE_STATION:
993 priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
994 priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
995 break;
996
997 case NL80211_IFTYPE_ADHOC:
998 priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
999 priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
1000 priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
1001 RXON_FILTER_ACCEPT_GRP_MSK;
1002 break;
1003
8ccde88a
SO		 1004 default:
1005 IWL_ERR(priv, "Unsupported interface type %d\n", mode);
1006 break;
1007 }
1008
1009#if 0
1010 /* TODO: Figure out when short_preamble would be set and cache from
1011 * that */
1012 if (!hw_to_local(priv->hw)->short_preamble)
1013 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1014 else
1015 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1016#endif
1017
1018 ch_info = iwl_get_channel_info(priv, priv->band,
1019 le16_to_cpu(priv->active_rxon.channel));
1020
1021 if (!ch_info)
1022 ch_info = &priv->channel_info[0];
1023
8ccde88a
SO		 1024 priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
1025 priv->band = ch_info->band;
1026
1027 iwl_set_flags_for_band(priv, priv->band);
1028
1029 priv->staging_rxon.ofdm_basic_rates =
1030 (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
1031 priv->staging_rxon.cck_basic_rates =
1032 (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1033
a2b0f02e
WYG		 1034 /* clear both MIX and PURE40 mode flag */
1035 priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
1036 RXON_FLG_CHANNEL_MODE_PURE_40);
8ccde88a
SO		 1037 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
1038 memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
1039 priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
1040 priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
11397a65 1041 priv->staging_rxon.ofdm_ht_triple_stream_basic_rates = 0xff;
8ccde88a
SO		 1042}
1043EXPORT_SYMBOL(iwl_connection_init_rx_config);
1044
782571f4 1045static void iwl_set_rate(struct iwl_priv *priv)
8ccde88a
SO		 1046{
1047 const struct ieee80211_supported_band *hw = NULL;
1048 struct ieee80211_rate *rate;
1049 int i;
1050
1051 hw = iwl_get_hw_mode(priv, priv->band);
1052 if (!hw) {
1053 IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
1054 return;
1055 }
1056
1057 priv->active_rate = 0;
8ccde88a
SO		 1058
1059 for (i = 0; i < hw->n_bitrates; i++) {
1060 rate = &(hw->bitrates[i]);
5027309b 1061 if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
8ccde88a
SO		 1062 priv->active_rate |= (1 << rate->hw_value);
1063 }
1064
4a02886b 1065 IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
8ccde88a 1066
4a02886b
JB		 1067 priv->staging_rxon.cck_basic_rates =
1068 (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
1069
1070 priv->staging_rxon.ofdm_basic_rates =
1071 (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
8ccde88a 1072}
8ccde88a
SO		 1073
1074void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
1075{
2f301227 1076 struct iwl_rx_packet *pkt = rxb_addr(rxb);
8ccde88a
SO		 1077 struct iwl_rxon_cmd *rxon = (void *)&priv->active_rxon;
1078 struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
4a56e965 1079
0924e519
WYG		 1080 if (priv->switch_rxon.switch_in_progress) {
1081 if (!le32_to_cpu(csa->status) &&
1082 (csa->channel == priv->switch_rxon.channel)) {
1083 rxon->channel = csa->channel;
1084 priv->staging_rxon.channel = csa->channel;
1085 IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
1086 le16_to_cpu(csa->channel));
1087 } else
1088 IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
1089 le16_to_cpu(csa->channel));
1090
1091 priv->switch_rxon.switch_in_progress = false;
1092 }
8ccde88a
SO		 1093}
1094EXPORT_SYMBOL(iwl_rx_csa);
1095
1096#ifdef CONFIG_IWLWIFI_DEBUG
a643565e 1097void iwl_print_rx_config_cmd(struct iwl_priv *priv)
8ccde88a
SO		 1098{
1099 struct iwl_rxon_cmd *rxon = &priv->staging_rxon;
1100
e1623446 1101 IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
3d816c77 1102 iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
e1623446
TW		 1103 IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
1104 IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
1105 IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
8ccde88a 1106 le32_to_cpu(rxon->filter_flags));
e1623446
TW		 1107 IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
1108 IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
8ccde88a 1109 rxon->ofdm_basic_rates);
e1623446
TW		 1110 IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
1111 IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
1112 IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
1113 IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
8ccde88a 1114}
a643565e 1115EXPORT_SYMBOL(iwl_print_rx_config_cmd);
6686d17e 1116#endif
8ccde88a
SO		 1117/**
1118 * iwl_irq_handle_error - called for HW or SW error interrupt from card
1119 */
1120void iwl_irq_handle_error(struct iwl_priv *priv)
1121{
1122 /* Set the FW error flag -- cleared on iwl_down */
1123 set_bit(STATUS_FW_ERROR, &priv->status);
1124
1125 /* Cancel currently queued command. */
1126 clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
1127
3a3ff72c 1128 priv->cfg->ops->lib->dump_nic_error_log(priv);
696bdee3
WYG		 1129 if (priv->cfg->ops->lib->dump_csr)
1130 priv->cfg->ops->lib->dump_csr(priv);
1b3eb823
WYG		 1131 if (priv->cfg->ops->lib->dump_fh)
1132 priv->cfg->ops->lib->dump_fh(priv, NULL, false);
b03d7d0f 1133 priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
8ccde88a 1134#ifdef CONFIG_IWLWIFI_DEBUG
c341ddb2 1135 if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
8ccde88a 1136 iwl_print_rx_config_cmd(priv);
8ccde88a
SO		 1137#endif
1138
1139 wake_up_interruptible(&priv->wait_command_queue);
1140
1141 /* Keep the restart process from trying to send host
1142 * commands by clearing the INIT status bit */
1143 clear_bit(STATUS_READY, &priv->status);
1144
1145 if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
e1623446 1146 IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
8ccde88a
SO		 1147 "Restarting adapter due to uCode error.\n");
1148
8ccde88a
SO		 1149 if (priv->cfg->mod_params->restart_fw)
1150 queue_work(priv->workqueue, &priv->restart);
1151 }
1152}
1153EXPORT_SYMBOL(iwl_irq_handle_error);
1154
f8e200de 1155static int iwl_apm_stop_master(struct iwl_priv *priv)
d68b603c 1156{
5220af0c 1157 int ret = 0;
d68b603c 1158
5220af0c 1159 /* stop device's busmaster DMA activity */
d68b603c
AK		 1160 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
1161
5220af0c 1162 ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
d68b603c 1163 CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
5220af0c
BC		 1164 if (ret)
1165 IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
d68b603c 1166
d68b603c
AK		 1167 IWL_DEBUG_INFO(priv, "stop master\n");
1168
5220af0c 1169 return ret;
d68b603c 1170}
d68b603c
AK		 1171
1172void iwl_apm_stop(struct iwl_priv *priv)
1173{
fadb3582
BC		 1174 IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
1175
5220af0c 1176 /* Stop device's DMA activity */
d68b603c
AK		 1177 iwl_apm_stop_master(priv);
1178
5220af0c 1179 /* Reset the entire device */
d68b603c
AK		 1180 iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
1181
1182 udelay(10);
5220af0c
BC		 1183
1184 /*
1185 * Clear "initialization complete" bit to move adapter from
1186 * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
1187 */
d68b603c 1188 iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
d68b603c
AK		 1189}
1190EXPORT_SYMBOL(iwl_apm_stop);
1191
fadb3582
BC		 1192
1193/*
1194 * Start up NIC's basic functionality after it has been reset
1195 * (e.g. after platform boot, or shutdown via iwl_apm_stop())
1196 * NOTE: This does not load uCode nor start the embedded processor
1197 */
1198int iwl_apm_init(struct iwl_priv *priv)
1199{
1200 int ret = 0;
1201 u16 lctl;
1202
1203 IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
1204
1205 /*
1206 * Use "set_bit" below rather than "write", to preserve any hardware
1207 * bits already set by default after reset.
1208 */
1209
1210 /* Disable L0S exit timer (platform NMI Work/Around) */
1211 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1212 CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
1213
1214 /*
1215 * Disable L0s without affecting L1;
1216 * don't wait for ICH L0s (ICH bug W/A)
1217 */
1218 iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
1219 CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
1220
1221 /* Set FH wait threshold to maximum (HW error during stress W/A) */
1222 iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
1223
1224 /*
1225 * Enable HAP INTA (interrupt from management bus) to
1226 * wake device's PCI Express link L1a -> L0s
1227 * NOTE: This is no-op for 3945 (non-existant bit)
1228 */
1229 iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
1230 CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
1231
1232 /*
a6c5c731
BC		 1233 * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
1234 * Check if BIOS (or OS) enabled L1-ASPM on this device.
1235 * If so (likely), disable L0S, so device moves directly L0->L1;
1236 * costs negligible amount of power savings.
1237 * If not (unlikely), enable L0S, so there is at least some
1238 * power savings, even without L1.
fadb3582
BC		 1239 */
1240 if (priv->cfg->set_l0s) {
1241 lctl = iwl_pcie_link_ctl(priv);
1242 if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
1243 PCI_CFG_LINK_CTRL_VAL_L1_EN) {
1244 /* L1-ASPM enabled; disable(!) L0S */
1245 iwl_set_bit(priv, CSR_GIO_REG,
1246 CSR_GIO_REG_VAL_L0S_ENABLED);
1247 IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
1248 } else {
1249 /* L1-ASPM disabled; enable(!) L0S */
1250 iwl_clear_bit(priv, CSR_GIO_REG,
1251 CSR_GIO_REG_VAL_L0S_ENABLED);
1252 IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
1253 }
1254 }
1255
1256 /* Configure analog phase-lock-loop before activating to D0A */
1257 if (priv->cfg->pll_cfg_val)
1258 iwl_set_bit(priv, CSR_ANA_PLL_CFG, priv->cfg->pll_cfg_val);
1259
1260 /*
1261 * Set "initialization complete" bit to move adapter from
1262 * D0U* --> D0A* (powered-up active) state.
1263 */
1264 iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
1265
1266 /*
1267 * Wait for clock stabilization; once stabilized, access to
1268 * device-internal resources is supported, e.g. iwl_write_prph()
1269 * and accesses to uCode SRAM.
1270 */
1271 ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
1272 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
1273 CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
1274 if (ret < 0) {
1275 IWL_DEBUG_INFO(priv, "Failed to init the card\n");
1276 goto out;
1277 }
1278
1279 /*
1280 * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
1281 * BSM (Boostrap State Machine) is only in 3945 and 4965;
1282 * later devices (i.e. 5000 and later) have non-volatile SRAM,
1283 * and don't need BSM to restore data after power-saving sleep.
1284 *
1285 * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
1286 * do not disable clocks. This preserves any hardware bits already
1287 * set by default in "CLK_CTRL_REG" after reset.
1288 */
1289 if (priv->cfg->use_bsm)
1290 iwl_write_prph(priv, APMG_CLK_EN_REG,
1291 APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
1292 else
1293 iwl_write_prph(priv, APMG_CLK_EN_REG,
1294 APMG_CLK_VAL_DMA_CLK_RQT);
1295 udelay(20);
1296
1297 /* Disable L1-Active */
1298 iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
1299 APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
1300
1301out:
1302 return ret;
1303}
1304EXPORT_SYMBOL(iwl_apm_init);
1305
1306
1307
8ccde88a
SO		 1308void iwl_configure_filter(struct ieee80211_hw *hw,
1309 unsigned int changed_flags,
1310 unsigned int *total_flags,
3ac64bee 1311 u64 multicast)
8ccde88a
SO		 1312{
1313 struct iwl_priv *priv = hw->priv;
1314 __le32 *filter_flags = &priv->staging_rxon.filter_flags;
1315
e1623446 1316 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
8ccde88a
SO		 1317 changed_flags, *total_flags);
1318
1319 if (changed_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS)) {
1320 if (*total_flags & (FIF_OTHER_BSS | FIF_PROMISC_IN_BSS))
1321 *filter_flags |= RXON_FILTER_PROMISC_MSK;
1322 else
1323 *filter_flags &= ~RXON_FILTER_PROMISC_MSK;
1324 }
1325 if (changed_flags & FIF_ALLMULTI) {
1326 if (*total_flags & FIF_ALLMULTI)
1327 *filter_flags |= RXON_FILTER_ACCEPT_GRP_MSK;
1328 else
1329 *filter_flags &= ~RXON_FILTER_ACCEPT_GRP_MSK;
1330 }
1331 if (changed_flags & FIF_CONTROL) {
1332 if (*total_flags & FIF_CONTROL)
1333 *filter_flags |= RXON_FILTER_CTL2HOST_MSK;
1334 else
1335 *filter_flags &= ~RXON_FILTER_CTL2HOST_MSK;
1336 }
1337 if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
1338 if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
1339 *filter_flags |= RXON_FILTER_BCON_AWARE_MSK;
1340 else
1341 *filter_flags &= ~RXON_FILTER_BCON_AWARE_MSK;
1342 }
1343
1344 /* We avoid iwl_commit_rxon here to commit the new filter flags
1345 * since mac80211 will call ieee80211_hw_config immediately.
1346 * (mc_list is not supported at this time). Otherwise, we need to
1347 * queue a background iwl_commit_rxon work.
1348 */
1349
1350 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
1351 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
1352}
1353EXPORT_SYMBOL(iwl_configure_filter);
1354
da154e30
RR		 1355int iwl_set_hw_params(struct iwl_priv *priv)
1356{
da154e30
RR		 1357 priv->hw_params.max_rxq_size = RX_QUEUE_SIZE;
1358 priv->hw_params.max_rxq_log = RX_QUEUE_SIZE_LOG;
1359 if (priv->cfg->mod_params->amsdu_size_8K)
2f301227 1360 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_8K);
da154e30 1361 else
2f301227 1362 priv->hw_params.rx_page_order = get_order(IWL_RX_BUF_SIZE_4K);
da154e30 1363
2c2f3b33
TW		 1364 priv->hw_params.max_beacon_itrvl = IWL_MAX_UCODE_BEACON_INTERVAL;
1365
49779293
RR		 1366 if (priv->cfg->mod_params->disable_11n)
1367 priv->cfg->sku &= ~IWL_SKU_N;
1368
da154e30
RR		 1369 /* Device-specific setup */
1370 return priv->cfg->ops->lib->set_hw_params(priv);
1371}
1372EXPORT_SYMBOL(iwl_set_hw_params);
6ba87956 1373
630fe9b6
TW		 1374int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
1375{
1376 int ret = 0;
5eadd94b
WYG		 1377 s8 prev_tx_power = priv->tx_power_user_lmt;
1378
b744cb79
WYG		 1379 if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
1380 IWL_WARN(priv,
1381 "Requested user TXPOWER %d below lower limit %d.\n",
daf518de 1382 tx_power,
b744cb79 1383 IWLAGN_TX_POWER_TARGET_POWER_MIN);
630fe9b6
TW		 1384 return -EINVAL;
1385 }
1386
dc1b0973 1387 if (tx_power > priv->tx_power_device_lmt) {
08f2d58d
WYG		 1388 IWL_WARN(priv,
1389 "Requested user TXPOWER %d above upper limit %d.\n",
dc1b0973 1390 tx_power, priv->tx_power_device_lmt);
630fe9b6
TW		 1391 return -EINVAL;
1392 }
1393
1394 if (priv->tx_power_user_lmt != tx_power)
1395 force = true;
1396
019fb97d 1397 /* if nic is not up don't send command */
5eadd94b
WYG		 1398 if (iwl_is_ready_rf(priv)) {
1399 priv->tx_power_user_lmt = tx_power;
1400 if (force && priv->cfg->ops->lib->send_tx_power)
1401 ret = priv->cfg->ops->lib->send_tx_power(priv);
1402 else if (!priv->cfg->ops->lib->send_tx_power)
1403 ret = -EOPNOTSUPP;
1404 /*
1405 * if fail to set tx_power, restore the orig. tx power
1406 */
1407 if (ret)
1408 priv->tx_power_user_lmt = prev_tx_power;
1409 }
630fe9b6 1410
5eadd94b
WYG		 1411 /*
1412 * Even this is an async host command, the command
1413 * will always report success from uCode
1414 * So once driver can placing the command into the queue
1415 * successfully, driver can use priv->tx_power_user_lmt
1416 * to reflect the current tx power
1417 */
630fe9b6
TW		 1418 return ret;
1419}
1420EXPORT_SYMBOL(iwl_set_tx_power);
1421
ef850d7c 1422irqreturn_t iwl_isr_legacy(int irq, void *data)
f17d08a6
AK		 1423{
1424 struct iwl_priv *priv = data;
1425 u32 inta, inta_mask;
1426 u32 inta_fh;
6e8cc38d 1427 unsigned long flags;
f17d08a6
AK		 1428 if (!priv)
1429 return IRQ_NONE;
1430
6e8cc38d 1431 spin_lock_irqsave(&priv->lock, flags);
f17d08a6
AK		 1432
1433 /* Disable (but don't clear!) interrupts here to avoid
1434 * back-to-back ISRs and sporadic interrupts from our NIC.
1435 * If we have something to service, the tasklet will re-enable ints.
1436 * If we *don't* have something, we'll re-enable before leaving here. */
1437 inta_mask = iwl_read32(priv, CSR_INT_MASK); /* just for debug */
1438 iwl_write32(priv, CSR_INT_MASK, 0x00000000);
1439
1440 /* Discover which interrupts are active/pending */
1441 inta = iwl_read32(priv, CSR_INT);
1442 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1443
1444 /* Ignore interrupt if there's nothing in NIC to service.
1445 * This may be due to IRQ shared with another device,
1446 * or due to sporadic interrupts thrown from our NIC. */
1447 if (!inta && !inta_fh) {
1448 IWL_DEBUG_ISR(priv, "Ignore interrupt, inta == 0, inta_fh == 0\n");
1449 goto none;
1450 }
1451
1452 if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
1453 /* Hardware disappeared. It might have already raised
1454 * an interrupt */
1455 IWL_WARN(priv, "HARDWARE GONE?? INTA == 0x%08x\n", inta);
1456 goto unplugged;
1457 }
1458
1459 IWL_DEBUG_ISR(priv, "ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1460 inta, inta_mask, inta_fh);
1461
1462 inta &= ~CSR_INT_BIT_SCD;
1463
1464 /* iwl_irq_tasklet() will service interrupts and re-enable them */
1465 if (likely(inta || inta_fh))
1466 tasklet_schedule(&priv->irq_tasklet);
1467
1468 unplugged:
6e8cc38d 1469 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1470 return IRQ_HANDLED;
1471
1472 none:
1473 /* re-enable interrupts here since we don't have anything to service. */
1474 /* only Re-enable if diabled by irq */
1475 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1476 iwl_enable_interrupts(priv);
6e8cc38d 1477 spin_unlock_irqrestore(&priv->lock, flags);
f17d08a6
AK		 1478 return IRQ_NONE;
1479}
ef850d7c 1480EXPORT_SYMBOL(iwl_isr_legacy);
f17d08a6 1481
17f841cd
SO		 1482int iwl_send_bt_config(struct iwl_priv *priv)
1483{
1484 struct iwl_bt_cmd bt_cmd = {
456d0f76
WYG		 1485 .lead_time = BT_LEAD_TIME_DEF,
1486 .max_kill = BT_MAX_KILL_DEF,
17f841cd
SO		 1487 .kill_ack_mask = 0,
1488 .kill_cts_mask = 0,
1489 };
1490
06702a73
WYG		 1491 if (!bt_coex_active)
1492 bt_cmd.flags = BT_COEX_DISABLE;
1493 else
1494 bt_cmd.flags = BT_COEX_ENABLE;
1495
1496 IWL_DEBUG_INFO(priv, "BT coex %s\n",
1497 (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
1498
17f841cd
SO		 1499 return iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
1500 sizeof(struct iwl_bt_cmd), &bt_cmd);
1501}
1502EXPORT_SYMBOL(iwl_send_bt_config);
1503
ef8d5529 1504int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
49ea8596 1505{
ef8d5529
WYG		 1506 struct iwl_statistics_cmd statistics_cmd = {
1507 .configuration_flags =
1508 clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
49ea8596 1509 };
ef8d5529
WYG		 1510
1511 if (flags & CMD_ASYNC)
1512 return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
1513 sizeof(struct iwl_statistics_cmd),
1514 &statistics_cmd, NULL);
1515 else
1516 return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
1517 sizeof(struct iwl_statistics_cmd),
1518 &statistics_cmd);
49ea8596
EG		 1519}
1520EXPORT_SYMBOL(iwl_send_statistics_request);
7e8c519e 1521
b0692f2f
EG		 1522/**
1523 * iwl_verify_inst_sparse - verify runtime uCode image in card vs. host,
1524 * using sample data 100 bytes apart. If these sample points are good,
1525 * it's a pretty good bet that everything between them is good, too.
1526 */
1527static int iwlcore_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1528{
1529 u32 val;
1530 int ret = 0;
1531 u32 errcnt = 0;
1532 u32 i;
1533
e1623446 1534 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 1535
b0692f2f
EG		 1536 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1537 /* read data comes through single port, auto-incr addr */
1538 /* NOTE: Use the debugless read so we don't flood kernel log
1539 * if IWL_DL_IO is set */
1540 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
250bdd21 1541 i + IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1542 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1543 if (val != le32_to_cpu(*image)) {
1544 ret = -EIO;
1545 errcnt++;
1546 if (errcnt >= 3)
1547 break;
1548 }
1549 }
1550
b0692f2f
EG		 1551 return ret;
1552}
1553
1554/**
1555 * iwlcore_verify_inst_full - verify runtime uCode image in card vs. host,
1556 * looking at all data.
1557 */
1558static int iwl_verify_inst_full(struct iwl_priv *priv, __le32 *image,
1559 u32 len)
1560{
1561 u32 val;
1562 u32 save_len = len;
1563 int ret = 0;
1564 u32 errcnt;
1565
e1623446 1566 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
b0692f2f 1567
250bdd21
SO		 1568 iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1569 IWL49_RTC_INST_LOWER_BOUND);
b0692f2f
EG		 1570
1571 errcnt = 0;
1572 for (; len > 0; len -= sizeof(u32), image++) {
1573 /* read data comes through single port, auto-incr addr */
1574 /* NOTE: Use the debugless read so we don't flood kernel log
1575 * if IWL_DL_IO is set */
1576 val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1577 if (val != le32_to_cpu(*image)) {
15b1687c 1578 IWL_ERR(priv, "uCode INST section is invalid at "
b0692f2f
EG		 1579 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1580 save_len - len, val, le32_to_cpu(*image));
1581 ret = -EIO;
1582 errcnt++;
1583 if (errcnt >= 20)
1584 break;
1585 }
1586 }
1587
b0692f2f 1588 if (!errcnt)
e1623446
TW		 1589 IWL_DEBUG_INFO(priv,
1590 "ucode image in INSTRUCTION memory is good\n");
b0692f2f
EG		 1591
1592 return ret;
1593}
1594
1595/**
1596 * iwl_verify_ucode - determine which instruction image is in SRAM,
1597 * and verify its contents
1598 */
1599int iwl_verify_ucode(struct iwl_priv *priv)
1600{
1601 __le32 *image;
1602 u32 len;
1603 int ret;
1604
1605 /* Try bootstrap */
1606 image = (__le32 *)priv->ucode_boot.v_addr;
1607 len = priv->ucode_boot.len;
1608 ret = iwlcore_verify_inst_sparse(priv, image, len);
1609 if (!ret) {
e1623446 1610 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
b0692f2f
EG		 1611 return 0;
1612 }
1613
1614 /* Try initialize */
1615 image = (__le32 *)priv->ucode_init.v_addr;
1616 len = priv->ucode_init.len;
1617 ret = iwlcore_verify_inst_sparse(priv, image, len);
1618 if (!ret) {
e1623446 1619 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
b0692f2f
EG		 1620 return 0;
1621 }
1622
1623 /* Try runtime/protocol */
1624 image = (__le32 *)priv->ucode_code.v_addr;
1625 len = priv->ucode_code.len;
1626 ret = iwlcore_verify_inst_sparse(priv, image, len);
1627 if (!ret) {
e1623446 1628 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
b0692f2f
EG		 1629 return 0;
1630 }
1631
15b1687c 1632 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
b0692f2f
EG		 1633
1634 /* Since nothing seems to match, show first several data entries in
1635 * instruction SRAM, so maybe visual inspection will give a clue.
1636 * Selection of bootstrap image (vs. other images) is arbitrary. */
1637 image = (__le32 *)priv->ucode_boot.v_addr;
1638 len = priv->ucode_boot.len;
1639 ret = iwl_verify_inst_full(priv, image, len);
1640
1641 return ret;
1642}
1643EXPORT_SYMBOL(iwl_verify_ucode);
1644
56e12615 1645
47f4a587
EG		 1646void iwl_rf_kill_ct_config(struct iwl_priv *priv)
1647{
1648 struct iwl_ct_kill_config cmd;
672639de 1649 struct iwl_ct_kill_throttling_config adv_cmd;
47f4a587
EG		 1650 unsigned long flags;
1651 int ret = 0;
1652
1653 spin_lock_irqsave(&priv->lock, flags);
1654 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
1655 CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
1656 spin_unlock_irqrestore(&priv->lock, flags);
3ad3b92a 1657 priv->thermal_throttle.ct_kill_toggle = false;
47f4a587 1658
480e8407 1659 if (priv->cfg->support_ct_kill_exit) {
672639de
WYG		 1660 adv_cmd.critical_temperature_enter =
1661 cpu_to_le32(priv->hw_params.ct_kill_threshold);
1662 adv_cmd.critical_temperature_exit =
1663 cpu_to_le32(priv->hw_params.ct_kill_exit_threshold);
1664
1665 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1666 sizeof(adv_cmd), &adv_cmd);
d91b1ba3
WYG		 1667 if (ret)
1668 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1669 else
1670 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1671 "succeeded, "
1672 "critical temperature enter is %d,"
1673 "exit is %d\n",
1674 priv->hw_params.ct_kill_threshold,
1675 priv->hw_params.ct_kill_exit_threshold);
480e8407 1676 } else {
672639de
WYG		 1677 cmd.critical_temperature_R =
1678 cpu_to_le32(priv->hw_params.ct_kill_threshold);
189a2b59 1679
672639de
WYG		 1680 ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
1681 sizeof(cmd), &cmd);
d91b1ba3
WYG		 1682 if (ret)
1683 IWL_ERR(priv, "REPLY_CT_KILL_CONFIG_CMD failed\n");
1684 else
1685 IWL_DEBUG_INFO(priv, "REPLY_CT_KILL_CONFIG_CMD "
1686 "succeeded, "
1687 "critical temperature is %d\n",
1688 priv->hw_params.ct_kill_threshold);
672639de 1689 }
47f4a587
EG		 1690}
1691EXPORT_SYMBOL(iwl_rf_kill_ct_config);
14a08a7f 1692
0ad91a35 1693
14a08a7f
EG		 1694/*
1695 * CARD_STATE_CMD
1696 *
1697 * Use: Sets the device's internal card state to enable, disable, or halt
1698 *
1699 * When in the 'enable' state the card operates as normal.
1700 * When in the 'disable' state, the card enters into a low power mode.
1701 * When in the 'halt' state, the card is shut down and must be fully
1702 * restarted to come back on.
1703 */
c496294e 1704int iwl_send_card_state(struct iwl_priv *priv, u32 flags, u8 meta_flag)
14a08a7f
EG		 1705{
1706 struct iwl_host_cmd cmd = {
1707 .id = REPLY_CARD_STATE_CMD,
1708 .len = sizeof(u32),
1709 .data = &flags,
c2acea8e 1710 .flags = meta_flag,
14a08a7f
EG		 1711 };
1712
1713 return iwl_send_cmd(priv, &cmd);
1714}
1715
030f05ed
AK		 1716void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
1717 struct iwl_rx_mem_buffer *rxb)
1718{
1719#ifdef CONFIG_IWLWIFI_DEBUG
2f301227 1720 struct iwl_rx_packet *pkt = rxb_addr(rxb);
030f05ed
AK		 1721 struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
1722 IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
1723 sleep->pm_sleep_mode, sleep->pm_wakeup_src);
1724#endif
1725}
1726EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
1727
1728void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
1729 struct iwl_rx_mem_buffer *rxb)
1730{
2f301227 1731 struct iwl_rx_packet *pkt = rxb_addr(rxb);
396887a2 1732 u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
030f05ed 1733 IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
396887a2
DH		 1734 "notification for %s:\n", len,
1735 get_cmd_string(pkt->hdr.cmd));
1736 iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
030f05ed
AK		 1737}
1738EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
261b9c33
AK		 1739
1740void iwl_rx_reply_error(struct iwl_priv *priv,
1741 struct iwl_rx_mem_buffer *rxb)
1742{
2f301227 1743 struct iwl_rx_packet *pkt = rxb_addr(rxb);
261b9c33
AK		 1744
1745 IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
1746 "seq 0x%04X ser 0x%08X\n",
1747 le32_to_cpu(pkt->u.err_resp.error_type),
1748 get_cmd_string(pkt->u.err_resp.cmd_id),
1749 pkt->u.err_resp.cmd_id,
1750 le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
1751 le32_to_cpu(pkt->u.err_resp.error_info));
1752}
1753EXPORT_SYMBOL(iwl_rx_reply_error);
1754
a83b9141
WYG		 1755void iwl_clear_isr_stats(struct iwl_priv *priv)
1756{
1757 memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
1758}
a83b9141 1759
488829f1
AK		 1760int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
1761 const struct ieee80211_tx_queue_params *params)
1762{
1763 struct iwl_priv *priv = hw->priv;
1764 unsigned long flags;
1765 int q;
1766
1767 IWL_DEBUG_MAC80211(priv, "enter\n");
1768
1769 if (!iwl_is_ready_rf(priv)) {
1770 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
1771 return -EIO;
1772 }
1773
1774 if (queue >= AC_NUM) {
1775 IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
1776 return 0;
1777 }
1778
1779 q = AC_NUM - 1 - queue;
1780
1781 spin_lock_irqsave(&priv->lock, flags);
1782
1783 priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
1784 priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
1785 priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
1786 priv->qos_data.def_qos_parm.ac[q].edca_txop =
1787 cpu_to_le16((params->txop * 32));
1788
1789 priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
488829f1
AK		 1790
1791 spin_unlock_irqrestore(&priv->lock, flags);
1792
1793 IWL_DEBUG_MAC80211(priv, "leave\n");
1794 return 0;
1795}
1796EXPORT_SYMBOL(iwl_mac_conf_tx);
5bbe233b
AK		 1797
1798static void iwl_ht_conf(struct iwl_priv *priv,
02bb1bea 1799 struct ieee80211_bss_conf *bss_conf)
5bbe233b 1800{
fad95bf5 1801 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
5bbe233b
AK		 1802 struct ieee80211_sta *sta;
1803
91dd6c27 1804 IWL_DEBUG_MAC80211(priv, "enter:\n");
5bbe233b 1805
fad95bf5 1806 if (!ht_conf->is_ht)
5bbe233b
AK		 1807 return;
1808
fad95bf5 1809 ht_conf->ht_protection =
9ed6bcce 1810 bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
fad95bf5 1811 ht_conf->non_GF_STA_present =
9ed6bcce 1812 !!(bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
5bbe233b 1813
02bb1bea
JB		 1814 ht_conf->single_chain_sufficient = false;
1815
1816 switch (priv->iw_mode) {
1817 case NL80211_IFTYPE_STATION:
1818 rcu_read_lock();
5ed176e1 1819 sta = ieee80211_find_sta(priv->vif, priv->bssid);
02bb1bea
JB		 1820 if (sta) {
1821 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
1822 int maxstreams;
1823
1824 maxstreams = (ht_cap->mcs.tx_params &
1825 IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
1826 >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
1827 maxstreams += 1;
1828
1829 if ((ht_cap->mcs.rx_mask[1] == 0) &&
1830 (ht_cap->mcs.rx_mask[2] == 0))
1831 ht_conf->single_chain_sufficient = true;
1832 if (maxstreams <= 1)
1833 ht_conf->single_chain_sufficient = true;
1834 } else {
1835 /*
1836 * If at all, this can only happen through a race
1837 * when the AP disconnects us while we're still
1838 * setting up the connection, in that case mac80211
1839 * will soon tell us about that.
1840 */
1841 ht_conf->single_chain_sufficient = true;
1842 }
1843 rcu_read_unlock();
1844 break;
1845 case NL80211_IFTYPE_ADHOC:
1846 ht_conf->single_chain_sufficient = true;
1847 break;
1848 default:
1849 break;
1850 }
5bbe233b
AK		 1851
1852 IWL_DEBUG_MAC80211(priv, "leave\n");
1853}
1854
c91c3efc
AK		 1855static inline void iwl_set_no_assoc(struct iwl_priv *priv)
1856{
1857 priv->assoc_id = 0;
1858 iwl_led_disassociate(priv);
1859 /*
1860 * inform the ucode that there is no longer an
1861 * association and that no more packets should be
1862 * sent
1863 */
1864 priv->staging_rxon.filter_flags &=
1865 ~RXON_FILTER_ASSOC_MSK;
1866 priv->staging_rxon.assoc_id = 0;
1867 iwlcore_commit_rxon(priv);
1868}
1869
5bbe233b
AK		 1870#define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
1871void iwl_bss_info_changed(struct ieee80211_hw *hw,
2d0ddec5
JB		 1872 struct ieee80211_vif *vif,
1873 struct ieee80211_bss_conf *bss_conf,
1874 u32 changes)
5bbe233b
AK		 1875{
1876 struct iwl_priv *priv = hw->priv;
3a650292 1877 int ret;
5bbe233b
AK		 1878
1879 IWL_DEBUG_MAC80211(priv, "changes = 0x%X\n", changes);
1880
2d0ddec5
JB		 1881 if (!iwl_is_alive(priv))
1882 return;
1883
1884 mutex_lock(&priv->mutex);
1885
1886 if (changes & BSS_CHANGED_BEACON &&
1887 priv->iw_mode == NL80211_IFTYPE_AP) {
1888 dev_kfree_skb(priv->ibss_beacon);
1889 priv->ibss_beacon = ieee80211_beacon_get(hw, vif);
1890 }
1891
d7129e19
JB		 1892 if (changes & BSS_CHANGED_BEACON_INT) {
1893 priv->beacon_int = bss_conf->beacon_int;
1894 /* TODO: in AP mode, do something to make this take effect */
1895 }
1896
1897 if (changes & BSS_CHANGED_BSSID) {
1898 IWL_DEBUG_MAC80211(priv, "BSSID %pM\n", bss_conf->bssid);
1899
1900 /*
1901 * If there is currently a HW scan going on in the
1902 * background then we need to cancel it else the RXON
1903 * below/in post_associate will fail.
1904 */
2d0ddec5 1905 if (iwl_scan_cancel_timeout(priv, 100)) {
d7129e19 1906 IWL_WARN(priv, "Aborted scan still in progress after 100ms\n");
2d0ddec5
JB		 1907 IWL_DEBUG_MAC80211(priv, "leaving - scan abort failed.\n");
1908 mutex_unlock(&priv->mutex);
1909 return;
1910 }
2d0ddec5 1911
d7129e19
JB		 1912 /* mac80211 only sets assoc when in STATION mode */
1913 if (priv->iw_mode == NL80211_IFTYPE_ADHOC ||
1914 bss_conf->assoc) {
1915 memcpy(priv->staging_rxon.bssid_addr,
1916 bss_conf->bssid, ETH_ALEN);
2d0ddec5 1917
d7129e19
JB		 1918 /* currently needed in a few places */
1919 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
1920 } else {
1921 priv->staging_rxon.filter_flags &=
1922 ~RXON_FILTER_ASSOC_MSK;
2d0ddec5 1923 }
d7129e19 1924
2d0ddec5
JB		 1925 }
1926
d7129e19
JB		 1927 /*
1928 * This needs to be after setting the BSSID in case
1929 * mac80211 decides to do both changes at once because
1930 * it will invoke post_associate.
1931 */
2d0ddec5
JB		 1932 if (priv->iw_mode == NL80211_IFTYPE_ADHOC &&
1933 changes & BSS_CHANGED_BEACON) {
1934 struct sk_buff *beacon = ieee80211_beacon_get(hw, vif);
1935
1936 if (beacon)
1937 iwl_mac_beacon_update(hw, beacon);
1938 }
1939
5bbe233b
AK		 1940 if (changes & BSS_CHANGED_ERP_PREAMBLE) {
1941 IWL_DEBUG_MAC80211(priv, "ERP_PREAMBLE %d\n",
1942 bss_conf->use_short_preamble);
1943 if (bss_conf->use_short_preamble)
1944 priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
1945 else
1946 priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
1947 }
1948
1949 if (changes & BSS_CHANGED_ERP_CTS_PROT) {
1950 IWL_DEBUG_MAC80211(priv, "ERP_CTS %d\n", bss_conf->use_cts_prot);
1951 if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
1952 priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
1953 else
1954 priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
1955 }
1956
d7129e19
JB		 1957 if (changes & BSS_CHANGED_BASIC_RATES) {
1958 /* XXX use this information
1959 *
1960 * To do that, remove code from iwl_set_rate() and put something
1961 * like this here:
1962 *
1963 if (A-band)
1964 priv->staging_rxon.ofdm_basic_rates =
1965 bss_conf->basic_rates;
1966 else
1967 priv->staging_rxon.ofdm_basic_rates =
1968 bss_conf->basic_rates >> 4;
1969 priv->staging_rxon.cck_basic_rates =
1970 bss_conf->basic_rates & 0xF;
1971 */
1972 }
1973
5bbe233b
AK		 1974 if (changes & BSS_CHANGED_HT) {
1975 iwl_ht_conf(priv, bss_conf);
45823531
AK		 1976
1977 if (priv->cfg->ops->hcmd->set_rxon_chain)
1978 priv->cfg->ops->hcmd->set_rxon_chain(priv);
5bbe233b
AK		 1979 }
1980
1981 if (changes & BSS_CHANGED_ASSOC) {
1982 IWL_DEBUG_MAC80211(priv, "ASSOC %d\n", bss_conf->assoc);
5bbe233b
AK		 1983 if (bss_conf->assoc) {
1984 priv->assoc_id = bss_conf->aid;
1985 priv->beacon_int = bss_conf->beacon_int;
5bbe233b
AK		 1986 priv->timestamp = bss_conf->timestamp;
1987 priv->assoc_capability = bss_conf->assoc_capability;
1988
e932a609
JB		 1989 iwl_led_associate(priv);
1990
d7129e19
JB		 1991 /*
1992 * We have just associated, don't start scan too early
1993 * leave time for EAPOL exchange to complete.
1994 *
1995 * XXX: do this in mac80211
5bbe233b
AK		 1996 */
1997 priv->next_scan_jiffies = jiffies +
1998 IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
d7129e19
JB		 1999 if (!iwl_is_rfkill(priv))
2000 priv->cfg->ops->lib->post_associate(priv);
c91c3efc
AK		 2001 } else
2002 iwl_set_no_assoc(priv);
d7129e19
JB		 2003 }
2004
2005 if (changes && iwl_is_associated(priv) && priv->assoc_id) {
2006 IWL_DEBUG_MAC80211(priv, "Changes (%#x) while associated\n",
2007 changes);
2008 ret = iwl_send_rxon_assoc(priv);
2009 if (!ret) {
2010 /* Sync active_rxon with latest change. */
2011 memcpy((void *)&priv->active_rxon,
2012 &priv->staging_rxon,
2013 sizeof(struct iwl_rxon_cmd));
5bbe233b 2014 }
5bbe233b 2015 }
d7129e19 2016
c91c3efc
AK		 2017 if (changes & BSS_CHANGED_BEACON_ENABLED) {
2018 if (vif->bss_conf.enable_beacon) {
2019 memcpy(priv->staging_rxon.bssid_addr,
2020 bss_conf->bssid, ETH_ALEN);
2021 memcpy(priv->bssid, bss_conf->bssid, ETH_ALEN);
2022 iwlcore_config_ap(priv);
2023 } else
2024 iwl_set_no_assoc(priv);
f513dfff
DH		 2025 }
2026
d7129e19
JB		 2027 mutex_unlock(&priv->mutex);
2028
2d0ddec5 2029 IWL_DEBUG_MAC80211(priv, "leave\n");
5bbe233b
AK		 2030}
2031EXPORT_SYMBOL(iwl_bss_info_changed);
2032
9944b938
AK		 2033int iwl_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb)
2034{
2035 struct iwl_priv *priv = hw->priv;
2036 unsigned long flags;
2037 __le64 timestamp;
2038
2039 IWL_DEBUG_MAC80211(priv, "enter\n");
2040
2041 if (!iwl_is_ready_rf(priv)) {
2042 IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
2043 return -EIO;
2044 }
2045
9944b938
AK		 2046 spin_lock_irqsave(&priv->lock, flags);
2047
2048 if (priv->ibss_beacon)
2049 dev_kfree_skb(priv->ibss_beacon);
2050
2051 priv->ibss_beacon = skb;
2052
2053 priv->assoc_id = 0;
2054 timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
2055 priv->timestamp = le64_to_cpu(timestamp);
2056
2057 IWL_DEBUG_MAC80211(priv, "leave\n");
2058 spin_unlock_irqrestore(&priv->lock, flags);
2059
9944b938
AK		 2060 priv->cfg->ops->lib->post_associate(priv);
2061
9944b938
AK		 2062 return 0;
2063}
2064EXPORT_SYMBOL(iwl_mac_beacon_update);
2065
b55e75ed 2066static int iwl_set_mode(struct iwl_priv *priv, struct ieee80211_vif *vif)
727882d6 2067{
b55e75ed 2068 iwl_connection_init_rx_config(priv, vif->type);
727882d6
AK		 2069
2070 if (priv->cfg->ops->hcmd->set_rxon_chain)
2071 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2072
2073 memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
2074
b55e75ed 2075 return iwlcore_commit_rxon(priv);
727882d6 2076}
727882d6 2077
b55e75ed 2078int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
cbb6ab94
AK		 2079{
2080 struct iwl_priv *priv = hw->priv;
47e28f41 2081 int err = 0;
cbb6ab94 2082
1ed32e4f 2083 IWL_DEBUG_MAC80211(priv, "enter: type %d\n", vif->type);
cbb6ab94 2084
47e28f41
JB		 2085 mutex_lock(&priv->mutex);
2086
b55e75ed
JB		 2087 if (WARN_ON(!iwl_is_ready_rf(priv))) {
2088 err = -EINVAL;
2089 goto out;
2090 }
2091
cbb6ab94
AK		 2092 if (priv->vif) {
2093 IWL_DEBUG_MAC80211(priv, "leave - vif != NULL\n");
47e28f41
JB		 2094 err = -EOPNOTSUPP;
2095 goto out;
cbb6ab94
AK		 2096 }
2097
1ed32e4f
JB		 2098 priv->vif = vif;
2099 priv->iw_mode = vif->type;
cbb6ab94 2100
b55e75ed
JB		 2101 IWL_DEBUG_MAC80211(priv, "Set %pM\n", vif->addr);
2102 memcpy(priv->mac_addr, vif->addr, ETH_ALEN);
cbb6ab94 2103
b55e75ed
JB		 2104 err = iwl_set_mode(priv, vif);
2105 if (err)
2106 goto out_err;
7e246191
RC		 2107
2108 /* Add the broadcast address so we can send broadcast frames */
2109 priv->cfg->ops->lib->add_bcast_station(priv);
2110
b55e75ed 2111 goto out;
cbb6ab94 2112
b55e75ed
JB		 2113 out_err:
2114 priv->vif = NULL;
2115 priv->iw_mode = NL80211_IFTYPE_STATION;
47e28f41 2116 out:
cbb6ab94
AK		 2117 mutex_unlock(&priv->mutex);
2118
2119 IWL_DEBUG_MAC80211(priv, "leave\n");
47e28f41 2120 return err;
cbb6ab94
AK		 2121}
2122EXPORT_SYMBOL(iwl_mac_add_interface);
2123
d8052319 2124void iwl_mac_remove_interface(struct ieee80211_hw *hw,
b55e75ed 2125 struct ieee80211_vif *vif)
d8052319
AK		 2126{
2127 struct iwl_priv *priv = hw->priv;
2128
2129 IWL_DEBUG_MAC80211(priv, "enter\n");
2130
2131 mutex_lock(&priv->mutex);
2132
7e246191
RC		 2133 iwl_clear_ucode_stations(priv, true);
2134
d8052319
AK		 2135 if (iwl_is_ready_rf(priv)) {
2136 iwl_scan_cancel_timeout(priv, 100);
2137 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2138 iwlcore_commit_rxon(priv);
2139 }
1ed32e4f 2140 if (priv->vif == vif) {
d8052319
AK		 2141 priv->vif = NULL;
2142 memset(priv->bssid, 0, ETH_ALEN);
2143 }
2144 mutex_unlock(&priv->mutex);
2145
2146 IWL_DEBUG_MAC80211(priv, "leave\n");
2147
2148}
2149EXPORT_SYMBOL(iwl_mac_remove_interface);
2150
4808368d
AK		 2151/**
2152 * iwl_mac_config - mac80211 config callback
2153 *
2154 * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
2155 * be set inappropriately and the driver currently sets the hardware up to
2156 * use it whenever needed.
2157 */
2158int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)
2159{
2160 struct iwl_priv *priv = hw->priv;
2161 const struct iwl_channel_info *ch_info;
2162 struct ieee80211_conf *conf = &hw->conf;
fad95bf5 2163 struct iwl_ht_config *ht_conf = &priv->current_ht_config;
4808368d
AK		 2164 unsigned long flags = 0;
2165 int ret = 0;
2166 u16 ch;
2167 int scan_active = 0;
2168
2169 mutex_lock(&priv->mutex);
2170
4808368d
AK		 2171 IWL_DEBUG_MAC80211(priv, "enter to channel %d changed 0x%X\n",
2172 conf->channel->hw_value, changed);
2173
2174 if (unlikely(!priv->cfg->mod_params->disable_hw_scan &&
2175 test_bit(STATUS_SCANNING, &priv->status))) {
2176 scan_active = 1;
2177 IWL_DEBUG_MAC80211(priv, "leave - scanning\n");
2178 }
2179
ba37a3d0
JB		 2180 if (changed & (IEEE80211_CONF_CHANGE_SMPS |
2181 IEEE80211_CONF_CHANGE_CHANNEL)) {
2182 /* mac80211 uses static for non-HT which is what we want */
2183 priv->current_ht_config.smps = conf->smps_mode;
2184
2185 /*
2186 * Recalculate chain counts.
2187 *
2188 * If monitor mode is enabled then mac80211 will
2189 * set up the SM PS mode to OFF if an HT channel is
2190 * configured.
2191 */
2192 if (priv->cfg->ops->hcmd->set_rxon_chain)
2193 priv->cfg->ops->hcmd->set_rxon_chain(priv);
2194 }
4808368d
AK		 2195
2196 /* during scanning mac80211 will delay channel setting until
2197 * scan finish with changed = 0
2198 */
2199 if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
2200 if (scan_active)
2201 goto set_ch_out;
2202
2203 ch = ieee80211_frequency_to_channel(conf->channel->center_freq);
2204 ch_info = iwl_get_channel_info(priv, conf->channel->band, ch);
2205 if (!is_channel_valid(ch_info)) {
2206 IWL_DEBUG_MAC80211(priv, "leave - invalid channel\n");
2207 ret = -EINVAL;
2208 goto set_ch_out;
2209 }
2210
4808368d
AK		 2211 spin_lock_irqsave(&priv->lock, flags);
2212
28bd723b
DH		 2213 /* Configure HT40 channels */
2214 ht_conf->is_ht = conf_is_ht(conf);
2215 if (ht_conf->is_ht) {
2216 if (conf_is_ht40_minus(conf)) {
2217 ht_conf->extension_chan_offset =
2218 IEEE80211_HT_PARAM_CHA_SEC_BELOW;
c812ee24 2219 ht_conf->is_40mhz = true;
28bd723b
DH		 2220 } else if (conf_is_ht40_plus(conf)) {
2221 ht_conf->extension_chan_offset =
2222 IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
c812ee24 2223 ht_conf->is_40mhz = true;
28bd723b
DH		 2224 } else {
2225 ht_conf->extension_chan_offset =
2226 IEEE80211_HT_PARAM_CHA_SEC_NONE;
c812ee24 2227 ht_conf->is_40mhz = false;
28bd723b
DH		 2228 }
2229 } else
c812ee24 2230 ht_conf->is_40mhz = false;
28bd723b
DH		 2231 /* Default to no protection. Protection mode will later be set
2232 * from BSS config in iwl_ht_conf */
2233 ht_conf->ht_protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
4808368d
AK		 2234
2235 /* if we are switching from ht to 2.4 clear flags
2236 * from any ht related info since 2.4 does not
2237 * support ht */
2238 if ((le16_to_cpu(priv->staging_rxon.channel) != ch))
2239 priv->staging_rxon.flags = 0;
2240
2241 iwl_set_rxon_channel(priv, conf->channel);
5e2f75b8 2242 iwl_set_rxon_ht(priv, ht_conf);
4808368d
AK		 2243
2244 iwl_set_flags_for_band(priv, conf->channel->band);
2245 spin_unlock_irqrestore(&priv->lock, flags);
0924e519
WYG		 2246 if (iwl_is_associated(priv) &&
2247 (le16_to_cpu(priv->active_rxon.channel) != ch) &&
2248 priv->cfg->ops->lib->set_channel_switch) {
2249 iwl_set_rate(priv);
2250 /*
2251 * at this point, staging_rxon has the
2252 * configuration for channel switch
2253 */
2254 ret = priv->cfg->ops->lib->set_channel_switch(priv,
2255 ch);
2256 if (!ret) {
2257 iwl_print_rx_config_cmd(priv);
2258 goto out;
2259 }
2260 priv->switch_rxon.switch_in_progress = false;
2261 }
4808368d
AK		 2262 set_ch_out:
2263 /* The list of supported rates and rate mask can be different
2264 * for each band; since the band may have changed, reset
2265 * the rate mask to what mac80211 lists */
2266 iwl_set_rate(priv);
2267 }
2268
78f5fb7f
JB		 2269 if (changed & (IEEE80211_CONF_CHANGE_PS |
2270 IEEE80211_CONF_CHANGE_IDLE)) {
e312c24c 2271 ret = iwl_power_update_mode(priv, false);
4808368d 2272 if (ret)
e312c24c 2273 IWL_DEBUG_MAC80211(priv, "Error setting sleep level\n");
4808368d
AK		 2274 }
2275
2276 if (changed & IEEE80211_CONF_CHANGE_POWER) {
2277 IWL_DEBUG_MAC80211(priv, "TX Power old=%d new=%d\n",
2278 priv->tx_power_user_lmt, conf->power_level);
2279
2280 iwl_set_tx_power(priv, conf->power_level, false);
2281 }
2282
e61146e3
SG		 2283 if (changed & IEEE80211_CONF_CHANGE_QOS) {
2284 bool qos_active = !!(conf->flags & IEEE80211_CONF_QOS);
2285
2286 spin_lock_irqsave(&priv->lock, flags);
2287 priv->qos_data.qos_active = qos_active;
2288 iwl_update_qos(priv);
2289 spin_unlock_irqrestore(&priv->lock, flags);
2290 }
2291
0cf4c01e
MA		 2292 if (!iwl_is_ready(priv)) {
2293 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2294 goto out;
2295 }
2296
4808368d
AK		 2297 if (scan_active)
2298 goto out;
2299
2300 if (memcmp(&priv->active_rxon,
2301 &priv->staging_rxon, sizeof(priv->staging_rxon)))
2302 iwlcore_commit_rxon(priv);
2303 else
2304 IWL_DEBUG_INFO(priv, "Not re-sending same RXON configuration.\n");
2305
2306
2307out:
2308 IWL_DEBUG_MAC80211(priv, "leave\n");
2309 mutex_unlock(&priv->mutex);
2310 return ret;
2311}
2312EXPORT_SYMBOL(iwl_mac_config);
2313
bd564261
AK		 2314void iwl_mac_reset_tsf(struct ieee80211_hw *hw)
2315{
2316 struct iwl_priv *priv = hw->priv;
2317 unsigned long flags;
2318
2319 mutex_lock(&priv->mutex);
2320 IWL_DEBUG_MAC80211(priv, "enter\n");
2321
2322 spin_lock_irqsave(&priv->lock, flags);
fad95bf5 2323 memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_config));
bd564261
AK		 2324 spin_unlock_irqrestore(&priv->lock, flags);
2325
bd564261
AK		 2326 spin_lock_irqsave(&priv->lock, flags);
2327 priv->assoc_id = 0;
2328 priv->assoc_capability = 0;
bd564261
AK		 2329
2330 /* new association get rid of ibss beacon skb */
2331 if (priv->ibss_beacon)
2332 dev_kfree_skb(priv->ibss_beacon);
2333
2334 priv->ibss_beacon = NULL;
2335
57c4d7b4 2336 priv->beacon_int = priv->vif->bss_conf.beacon_int;
bd564261 2337 priv->timestamp = 0;
bd564261
AK		 2338
2339 spin_unlock_irqrestore(&priv->lock, flags);
2340
2341 if (!iwl_is_ready_rf(priv)) {
2342 IWL_DEBUG_MAC80211(priv, "leave - not ready\n");
2343 mutex_unlock(&priv->mutex);
2344 return;
2345 }
2346
2347 /* we are restarting association process
2348 * clear RXON_FILTER_ASSOC_MSK bit
2349 */
b4665df4
JB		 2350 iwl_scan_cancel_timeout(priv, 100);
2351 priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2352 iwlcore_commit_rxon(priv);
bd564261
AK		 2353
2354 iwl_set_rate(priv);
2355
2356 mutex_unlock(&priv->mutex);
2357
2358 IWL_DEBUG_MAC80211(priv, "leave\n");
2359}
2360EXPORT_SYMBOL(iwl_mac_reset_tsf);
2361
88804e2b
WYG		 2362int iwl_alloc_txq_mem(struct iwl_priv *priv)
2363{
2364 if (!priv->txq)
2365 priv->txq = kzalloc(
2366 sizeof(struct iwl_tx_queue) * priv->cfg->num_of_queues,
2367 GFP_KERNEL);
2368 if (!priv->txq) {
91dd6c27 2369 IWL_ERR(priv, "Not enough memory for txq\n");
88804e2b
WYG		 2370 return -ENOMEM;
2371 }
2372 return 0;
2373}
2374EXPORT_SYMBOL(iwl_alloc_txq_mem);
2375
2376void iwl_free_txq_mem(struct iwl_priv *priv)
2377{
2378 kfree(priv->txq);
2379 priv->txq = NULL;
2380}
2381EXPORT_SYMBOL(iwl_free_txq_mem);
2382
1933ac4d
WYG		 2383int iwl_send_wimax_coex(struct iwl_priv *priv)
2384{
317a929d 2385 struct iwl_wimax_coex_cmd coex_cmd;
1933ac4d
WYG		 2386
2387 if (priv->cfg->support_wimax_coexist) {
2388 /* UnMask wake up src at associated sleep */
317a929d 2389 coex_cmd.flags = COEX_FLAGS_ASSOC_WA_UNMASK_MSK;
1933ac4d
WYG		 2390
2391 /* UnMask wake up src at unassociated sleep */
2392 coex_cmd.flags |= COEX_FLAGS_UNASSOC_WA_UNMASK_MSK;
2393 memcpy(coex_cmd.sta_prio, cu_priorities,
2394 sizeof(struct iwl_wimax_coex_event_entry) *
2395 COEX_NUM_OF_EVENTS);
2396
2397 /* enabling the coexistence feature */
2398 coex_cmd.flags |= COEX_FLAGS_COEX_ENABLE_MSK;
2399
2400 /* enabling the priorities tables */
2401 coex_cmd.flags |= COEX_FLAGS_STA_TABLE_VALID_MSK;
2402 } else {
2403 /* coexistence is disabled */
2404 memset(&coex_cmd, 0, sizeof(coex_cmd));
2405 }
2406 return iwl_send_cmd_pdu(priv, COEX_PRIORITY_TABLE_CMD,
2407 sizeof(coex_cmd), &coex_cmd);
2408}
2409EXPORT_SYMBOL(iwl_send_wimax_coex);
2410
20594eb0
WYG		 2411#ifdef CONFIG_IWLWIFI_DEBUGFS
2412
2413#define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
2414
2415void iwl_reset_traffic_log(struct iwl_priv *priv)
2416{
2417 priv->tx_traffic_idx = 0;
2418 priv->rx_traffic_idx = 0;
2419 if (priv->tx_traffic)
2420 memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2421 if (priv->rx_traffic)
2422 memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
2423}
2424
2425int iwl_alloc_traffic_mem(struct iwl_priv *priv)
2426{
2427 u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
2428
2429 if (iwl_debug_level & IWL_DL_TX) {
2430 if (!priv->tx_traffic) {
2431 priv->tx_traffic =
2432 kzalloc(traffic_size, GFP_KERNEL);
2433 if (!priv->tx_traffic)
2434 return -ENOMEM;
2435 }
2436 }
2437 if (iwl_debug_level & IWL_DL_RX) {
2438 if (!priv->rx_traffic) {
2439 priv->rx_traffic =
2440 kzalloc(traffic_size, GFP_KERNEL);
2441 if (!priv->rx_traffic)
2442 return -ENOMEM;
2443 }
2444 }
2445 iwl_reset_traffic_log(priv);
2446 return 0;
2447}
2448EXPORT_SYMBOL(iwl_alloc_traffic_mem);
2449
2450void iwl_free_traffic_mem(struct iwl_priv *priv)
2451{
2452 kfree(priv->tx_traffic);
2453 priv->tx_traffic = NULL;
2454
2455 kfree(priv->rx_traffic);
2456 priv->rx_traffic = NULL;
2457}
2458EXPORT_SYMBOL(iwl_free_traffic_mem);
2459
2460void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
2461 u16 length, struct ieee80211_hdr *header)
2462{
2463 __le16 fc;
2464 u16 len;
2465
2466 if (likely(!(iwl_debug_level & IWL_DL_TX)))
2467 return;
2468
2469 if (!priv->tx_traffic)
2470 return;
2471
2472 fc = header->frame_control;
2473 if (ieee80211_is_data(fc)) {
2474 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2475 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2476 memcpy((priv->tx_traffic +
2477 (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2478 header, len);
2479 priv->tx_traffic_idx =
2480 (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2481 }
2482}
2483EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
2484
2485void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
2486 u16 length, struct ieee80211_hdr *header)
2487{
2488 __le16 fc;
2489 u16 len;
2490
2491 if (likely(!(iwl_debug_level & IWL_DL_RX)))
2492 return;
2493
2494 if (!priv->rx_traffic)
2495 return;
2496
2497 fc = header->frame_control;
2498 if (ieee80211_is_data(fc)) {
2499 len = (length > IWL_TRAFFIC_ENTRY_SIZE)
2500 ? IWL_TRAFFIC_ENTRY_SIZE : length;
2501 memcpy((priv->rx_traffic +
2502 (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
2503 header, len);
2504 priv->rx_traffic_idx =
2505 (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
2506 }
2507}
2508EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
22fdf3c9
WYG		 2509
2510const char *get_mgmt_string(int cmd)
2511{
2512 switch (cmd) {
2513 IWL_CMD(MANAGEMENT_ASSOC_REQ);
2514 IWL_CMD(MANAGEMENT_ASSOC_RESP);
2515 IWL_CMD(MANAGEMENT_REASSOC_REQ);
2516 IWL_CMD(MANAGEMENT_REASSOC_RESP);
2517 IWL_CMD(MANAGEMENT_PROBE_REQ);
2518 IWL_CMD(MANAGEMENT_PROBE_RESP);
2519 IWL_CMD(MANAGEMENT_BEACON);
2520 IWL_CMD(MANAGEMENT_ATIM);
2521 IWL_CMD(MANAGEMENT_DISASSOC);
2522 IWL_CMD(MANAGEMENT_AUTH);
2523 IWL_CMD(MANAGEMENT_DEAUTH);
2524 IWL_CMD(MANAGEMENT_ACTION);
2525 default:
2526 return "UNKNOWN";
2527
2528 }
2529}
2530
2531const char *get_ctrl_string(int cmd)
2532{
2533 switch (cmd) {
2534 IWL_CMD(CONTROL_BACK_REQ);
2535 IWL_CMD(CONTROL_BACK);
2536 IWL_CMD(CONTROL_PSPOLL);
2537 IWL_CMD(CONTROL_RTS);
2538 IWL_CMD(CONTROL_CTS);
2539 IWL_CMD(CONTROL_ACK);
2540 IWL_CMD(CONTROL_CFEND);
2541 IWL_CMD(CONTROL_CFENDACK);
2542 default:
2543 return "UNKNOWN";
2544
2545 }
2546}
2547
7163b8a4 2548void iwl_clear_traffic_stats(struct iwl_priv *priv)
22fdf3c9
WYG		 2549{
2550 memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
22fdf3c9 2551 memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
7163b8a4 2552 priv->led_tpt = 0;
22fdf3c9
WYG		 2553}
2554
2555/*
2556 * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
2557 * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
2558 * Use debugFs to display the rx/rx_statistics
2559 * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
2560 * information will be recorded, but DATA pkt still will be recorded
2561 * for the reason of iwl_led.c need to control the led blinking based on
2562 * number of tx and rx data.
2563 *
2564 */
2565void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
2566{
2567 struct traffic_stats *stats;
2568
2569 if (is_tx)
2570 stats = &priv->tx_stats;
2571 else
2572 stats = &priv->rx_stats;
2573
2574 if (ieee80211_is_mgmt(fc)) {
2575 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2576 case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
2577 stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
2578 break;
2579 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
2580 stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
2581 break;
2582 case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
2583 stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
2584 break;
2585 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
2586 stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
2587 break;
2588 case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
2589 stats->mgmt[MANAGEMENT_PROBE_REQ]++;
2590 break;
2591 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
2592 stats->mgmt[MANAGEMENT_PROBE_RESP]++;
2593 break;
2594 case cpu_to_le16(IEEE80211_STYPE_BEACON):
2595 stats->mgmt[MANAGEMENT_BEACON]++;
2596 break;
2597 case cpu_to_le16(IEEE80211_STYPE_ATIM):
2598 stats->mgmt[MANAGEMENT_ATIM]++;
2599 break;
2600 case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
2601 stats->mgmt[MANAGEMENT_DISASSOC]++;
2602 break;
2603 case cpu_to_le16(IEEE80211_STYPE_AUTH):
2604 stats->mgmt[MANAGEMENT_AUTH]++;
2605 break;
2606 case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
2607 stats->mgmt[MANAGEMENT_DEAUTH]++;
2608 break;
2609 case cpu_to_le16(IEEE80211_STYPE_ACTION):
2610 stats->mgmt[MANAGEMENT_ACTION]++;
2611 break;
2612 }
2613 } else if (ieee80211_is_ctl(fc)) {
2614 switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
2615 case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
2616 stats->ctrl[CONTROL_BACK_REQ]++;
2617 break;
2618 case cpu_to_le16(IEEE80211_STYPE_BACK):
2619 stats->ctrl[CONTROL_BACK]++;
2620 break;
2621 case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
2622 stats->ctrl[CONTROL_PSPOLL]++;
2623 break;
2624 case cpu_to_le16(IEEE80211_STYPE_RTS):
2625 stats->ctrl[CONTROL_RTS]++;
2626 break;
2627 case cpu_to_le16(IEEE80211_STYPE_CTS):
2628 stats->ctrl[CONTROL_CTS]++;
2629 break;
2630 case cpu_to_le16(IEEE80211_STYPE_ACK):
2631 stats->ctrl[CONTROL_ACK]++;
2632 break;
2633 case cpu_to_le16(IEEE80211_STYPE_CFEND):
2634 stats->ctrl[CONTROL_CFEND]++;
2635 break;
2636 case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
2637 stats->ctrl[CONTROL_CFENDACK]++;
2638 break;
2639 }
2640 } else {
2641 /* data */
2642 stats->data_cnt++;
2643 stats->data_bytes += len;
2644 }
d5f4cf71 2645 iwl_leds_background(priv);
22fdf3c9
WYG		 2646}
2647EXPORT_SYMBOL(iwl_update_stats);
20594eb0
WYG		 2648#endif
2649
696bdee3
WYG		 2650const static char *get_csr_string(int cmd)
2651{
2652 switch (cmd) {
2653 IWL_CMD(CSR_HW_IF_CONFIG_REG);
2654 IWL_CMD(CSR_INT_COALESCING);
2655 IWL_CMD(CSR_INT);
2656 IWL_CMD(CSR_INT_MASK);
2657 IWL_CMD(CSR_FH_INT_STATUS);
2658 IWL_CMD(CSR_GPIO_IN);
2659 IWL_CMD(CSR_RESET);
2660 IWL_CMD(CSR_GP_CNTRL);
2661 IWL_CMD(CSR_HW_REV);
2662 IWL_CMD(CSR_EEPROM_REG);
2663 IWL_CMD(CSR_EEPROM_GP);
2664 IWL_CMD(CSR_OTP_GP_REG);
2665 IWL_CMD(CSR_GIO_REG);
2666 IWL_CMD(CSR_GP_UCODE_REG);
2667 IWL_CMD(CSR_GP_DRIVER_REG);
2668 IWL_CMD(CSR_UCODE_DRV_GP1);
2669 IWL_CMD(CSR_UCODE_DRV_GP2);
2670 IWL_CMD(CSR_LED_REG);
2671 IWL_CMD(CSR_DRAM_INT_TBL_REG);
2672 IWL_CMD(CSR_GIO_CHICKEN_BITS);
2673 IWL_CMD(CSR_ANA_PLL_CFG);
2674 IWL_CMD(CSR_HW_REV_WA_REG);
2675 IWL_CMD(CSR_DBG_HPET_MEM_REG);
2676 default:
2677 return "UNKNOWN";
2678
2679 }
2680}
2681
2682void iwl_dump_csr(struct iwl_priv *priv)
2683{
2684 int i;
2685 u32 csr_tbl[] = {
2686 CSR_HW_IF_CONFIG_REG,
2687 CSR_INT_COALESCING,
2688 CSR_INT,
2689 CSR_INT_MASK,
2690 CSR_FH_INT_STATUS,
2691 CSR_GPIO_IN,
2692 CSR_RESET,
2693 CSR_GP_CNTRL,
2694 CSR_HW_REV,
2695 CSR_EEPROM_REG,
2696 CSR_EEPROM_GP,
2697 CSR_OTP_GP_REG,
2698 CSR_GIO_REG,
2699 CSR_GP_UCODE_REG,
2700 CSR_GP_DRIVER_REG,
2701 CSR_UCODE_DRV_GP1,
2702 CSR_UCODE_DRV_GP2,
2703 CSR_LED_REG,
2704 CSR_DRAM_INT_TBL_REG,
2705 CSR_GIO_CHICKEN_BITS,
2706 CSR_ANA_PLL_CFG,
2707 CSR_HW_REV_WA_REG,
2708 CSR_DBG_HPET_MEM_REG
2709 };
2710 IWL_ERR(priv, "CSR values:\n");
2711 IWL_ERR(priv, "(2nd byte of CSR_INT_COALESCING is "
2712 "CSR_INT_PERIODIC_REG)\n");
2713 for (i = 0; i < ARRAY_SIZE(csr_tbl); i++) {
2714 IWL_ERR(priv, " %25s: 0X%08x\n",
2715 get_csr_string(csr_tbl[i]),
2716 iwl_read32(priv, csr_tbl[i]));
2717 }
2718}
2719EXPORT_SYMBOL(iwl_dump_csr);
2720
1b3eb823
WYG		 2721const static char *get_fh_string(int cmd)
2722{
2723 switch (cmd) {
2724 IWL_CMD(FH_RSCSR_CHNL0_STTS_WPTR_REG);
2725 IWL_CMD(FH_RSCSR_CHNL0_RBDCB_BASE_REG);
2726 IWL_CMD(FH_RSCSR_CHNL0_WPTR);
2727 IWL_CMD(FH_MEM_RCSR_CHNL0_CONFIG_REG);
2728 IWL_CMD(FH_MEM_RSSR_SHARED_CTRL_REG);
2729 IWL_CMD(FH_MEM_RSSR_RX_STATUS_REG);
2730 IWL_CMD(FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV);
2731 IWL_CMD(FH_TSSR_TX_STATUS_REG);
2732 IWL_CMD(FH_TSSR_TX_ERROR_REG);
2733 default:
2734 return "UNKNOWN";
2735
2736 }
2737}
2738
2739int iwl_dump_fh(struct iwl_priv *priv, char **buf, bool display)
2740{
2741 int i;
2742#ifdef CONFIG_IWLWIFI_DEBUG
2743 int pos = 0;
2744 size_t bufsz = 0;
2745#endif
2746 u32 fh_tbl[] = {
2747 FH_RSCSR_CHNL0_STTS_WPTR_REG,
2748 FH_RSCSR_CHNL0_RBDCB_BASE_REG,
2749 FH_RSCSR_CHNL0_WPTR,
2750 FH_MEM_RCSR_CHNL0_CONFIG_REG,
2751 FH_MEM_RSSR_SHARED_CTRL_REG,
2752 FH_MEM_RSSR_RX_STATUS_REG,
2753 FH_MEM_RSSR_RX_ENABLE_ERR_IRQ2DRV,
2754 FH_TSSR_TX_STATUS_REG,
2755 FH_TSSR_TX_ERROR_REG
2756 };
2757#ifdef CONFIG_IWLWIFI_DEBUG
2758 if (display) {
2759 bufsz = ARRAY_SIZE(fh_tbl) * 48 + 40;
2760 *buf = kmalloc(bufsz, GFP_KERNEL);
2761 if (!*buf)
2762 return -ENOMEM;
2763 pos += scnprintf(*buf + pos, bufsz - pos,
2764 "FH register values:\n");
2765 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2766 pos += scnprintf(*buf + pos, bufsz - pos,
2767 " %34s: 0X%08x\n",
2768 get_fh_string(fh_tbl[i]),
2769 iwl_read_direct32(priv, fh_tbl[i]));
2770 }
2771 return pos;
2772 }
2773#endif
2774 IWL_ERR(priv, "FH register values:\n");
2775 for (i = 0; i < ARRAY_SIZE(fh_tbl); i++) {
2776 IWL_ERR(priv, " %34s: 0X%08x\n",
2777 get_fh_string(fh_tbl[i]),
2778 iwl_read_direct32(priv, fh_tbl[i]));
2779 }
2780 return 0;
2781}
2782EXPORT_SYMBOL(iwl_dump_fh);
2783
a93e7973 2784static void iwl_force_rf_reset(struct iwl_priv *priv)
afbdd69a
WYG		 2785{
2786 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2787 return;
2788
2789 if (!iwl_is_associated(priv)) {
2790 IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
2791 return;
2792 }
2793 /*
2794 * There is no easy and better way to force reset the radio,
2795 * the only known method is switching channel which will force to
2796 * reset and tune the radio.
2797 * Use internal short scan (single channel) operation to should
2798 * achieve this objective.
2799 * Driver should reset the radio when number of consecutive missed
2800 * beacon, or any other uCode error condition detected.
2801 */
2802 IWL_DEBUG_INFO(priv, "perform radio reset.\n");
2803 iwl_internal_short_hw_scan(priv);
2804 return;
2805}
a93e7973 2806
a93e7973
WYG		 2807
2808int iwl_force_reset(struct iwl_priv *priv, int mode)
2809{
8a472da4
WYG		 2810 struct iwl_force_reset *force_reset;
2811
a93e7973
WYG		 2812 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2813 return -EINVAL;
2814
8a472da4
WYG		 2815 if (mode >= IWL_MAX_FORCE_RESET) {
2816 IWL_DEBUG_INFO(priv, "invalid reset request.\n");
2817 return -EINVAL;
2818 }
2819 force_reset = &priv->force_reset[mode];
2820 force_reset->reset_request_count++;
2821 if (force_reset->last_force_reset_jiffies &&
2822 time_after(force_reset->last_force_reset_jiffies +
2823 force_reset->reset_duration, jiffies)) {
a93e7973 2824 IWL_DEBUG_INFO(priv, "force reset rejected\n");
8a472da4 2825 force_reset->reset_reject_count++;
a93e7973
WYG		 2826 return -EAGAIN;
2827 }
8a472da4
WYG		 2828 force_reset->reset_success_count++;
2829 force_reset->last_force_reset_jiffies = jiffies;
a93e7973 2830 IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
a93e7973
WYG		 2831 switch (mode) {
2832 case IWL_RF_RESET:
2833 iwl_force_rf_reset(priv);
2834 break;
2835 case IWL_FW_RESET:
2836 IWL_ERR(priv, "On demand firmware reload\n");
2837 /* Set the FW error flag -- cleared on iwl_down */
2838 set_bit(STATUS_FW_ERROR, &priv->status);
2839 wake_up_interruptible(&priv->wait_command_queue);
2840 /*
2841 * Keep the restart process from trying to send host
2842 * commands by clearing the INIT status bit
2843 */
2844 clear_bit(STATUS_READY, &priv->status);
2845 queue_work(priv->workqueue, &priv->restart);
2846 break;
a93e7973 2847 }
a93e7973
WYG		 2848 return 0;
2849}
b74e31a9
WYG		 2850EXPORT_SYMBOL(iwl_force_reset);
2851
2852/**
2853 * iwl_bg_monitor_recover - Timer callback to check for stuck queue and recover
2854 *
2855 * During normal condition (no queue is stuck), the timer is continually set to
2856 * execute every monitor_recover_period milliseconds after the last timer
2857 * expired. When the queue read_ptr is at the same place, the timer is
2858 * shorten to 100mSecs. This is
2859 * 1) to reduce the chance that the read_ptr may wrap around (not stuck)
2860 * 2) to detect the stuck queues quicker before the station and AP can
2861 * disassociate each other.
2862 *
2863 * This function monitors all the tx queues and recover from it if any
2864 * of the queues are stuck.
2865 * 1. It first check the cmd queue for stuck conditions. If it is stuck,
2866 * it will recover by resetting the firmware and return.
2867 * 2. Then, it checks for station association. If it associates it will check
2868 * other queues. If any queue is stuck, it will recover by resetting
2869 * the firmware.
2870 * Note: It the number of times the queue read_ptr to be at the same place to
2871 * be MAX_REPEAT+1 in order to consider to be stuck.
2872 */
2873/*
2874 * The maximum number of times the read pointer of the tx queue at the
2875 * same place without considering to be stuck.
2876 */
2877#define MAX_REPEAT (2)
2878static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
2879{
2880 struct iwl_tx_queue *txq;
2881 struct iwl_queue *q;
2882
2883 txq = &priv->txq[cnt];
2884 q = &txq->q;
2885 /* queue is empty, skip */
2886 if (q->read_ptr != q->write_ptr) {
2887 if (q->read_ptr == q->last_read_ptr) {
2888 /* a queue has not been read from last time */
2889 if (q->repeat_same_read_ptr > MAX_REPEAT) {
2890 IWL_ERR(priv,
2891 "queue %d stuck %d time. Fw reload.\n",
2892 q->id, q->repeat_same_read_ptr);
2893 q->repeat_same_read_ptr = 0;
2894 iwl_force_reset(priv, IWL_FW_RESET);
2895 } else {
2896 q->repeat_same_read_ptr++;
2897 IWL_DEBUG_RADIO(priv,
2898 "queue %d, not read %d time\n",
2899 q->id,
2900 q->repeat_same_read_ptr);
2901 mod_timer(&priv->monitor_recover, jiffies +
2902 msecs_to_jiffies(IWL_ONE_HUNDRED_MSECS));
2903 }
2904 return 1;
2905 } else {
2906 q->last_read_ptr = q->read_ptr;
2907 q->repeat_same_read_ptr = 0;
2908 }
2909 }
2910 return 0;
2911}
2912
2913void iwl_bg_monitor_recover(unsigned long data)
2914{
2915 struct iwl_priv *priv = (struct iwl_priv *)data;
2916 int cnt;
2917
2918 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2919 return;
2920
2921 /* monitor and check for stuck cmd queue */
2922 if (iwl_check_stuck_queue(priv, IWL_CMD_QUEUE_NUM))
2923 return;
2924
2925 /* monitor and check for other stuck queues */
2926 if (iwl_is_associated(priv)) {
2927 for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
2928 /* skip as we already checked the command queue */
2929 if (cnt == IWL_CMD_QUEUE_NUM)
2930 continue;
2931 if (iwl_check_stuck_queue(priv, cnt))
2932 return;
2933 }
2934 }
2935 /*
2936 * Reschedule the timer to occur in
2937 * priv->cfg->monitor_recover_period
2938 */
2939 mod_timer(&priv->monitor_recover,
2940 jiffies + msecs_to_jiffies(priv->cfg->monitor_recover_period));
2941}
2942EXPORT_SYMBOL(iwl_bg_monitor_recover);
afbdd69a 2943
6da3a13e
WYG		 2944#ifdef CONFIG_PM
2945
2946int iwl_pci_suspend(struct pci_dev *pdev, pm_message_t state)
2947{
2948 struct iwl_priv *priv = pci_get_drvdata(pdev);
2949
2950 /*
2951 * This function is called when system goes into suspend state
2952 * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
2953 * first but since iwl_mac_stop() has no knowledge of who the caller is,
2954 * it will not call apm_ops.stop() to stop the DMA operation.
2955 * Calling apm_ops.stop here to make sure we stop the DMA.
2956 */
2957 priv->cfg->ops->lib->apm_ops.stop(priv);
2958
2959 pci_save_state(pdev);
2960 pci_disable_device(pdev);
2961 pci_set_power_state(pdev, PCI_D3hot);
2962
2963 return 0;
2964}
2965EXPORT_SYMBOL(iwl_pci_suspend);
2966
2967int iwl_pci_resume(struct pci_dev *pdev)
2968{
2969 struct iwl_priv *priv = pci_get_drvdata(pdev);
2970 int ret;
2971
2972 pci_set_power_state(pdev, PCI_D0);
2973 ret = pci_enable_device(pdev);
2974 if (ret)
2975 return ret;
2976 pci_restore_state(pdev);
2977 iwl_enable_interrupts(priv);
2978
2979 return 0;
2980}
2981EXPORT_SYMBOL(iwl_pci_resume);
2982
2983#endif /* CONFIG_PM */
Clone of davem's net-next-2.6 tree