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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[net-next-2.6.git] / drivers / net / wireless / ath / ath9k / htc_drv_init.c
CommitLineData
fb9987d0
S		 1/*
2 * Copyright (c) 2010 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
9 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
10 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
11 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
12 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
13 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
14 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
15 */
16
17#include "htc.h"
18
19MODULE_AUTHOR("Atheros Communications");
20MODULE_LICENSE("Dual BSD/GPL");
21MODULE_DESCRIPTION("Atheros driver 802.11n HTC based wireless devices");
22
23static unsigned int ath9k_debug = ATH_DBG_DEFAULT;
24module_param_named(debug, ath9k_debug, uint, 0);
25MODULE_PARM_DESC(debug, "Debugging mask");
26
e1572c5e
S		 27int htc_modparam_nohwcrypt;
28module_param_named(nohwcrypt, htc_modparam_nohwcrypt, int, 0444);
fb9987d0
S		 29MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption");
30
31#define CHAN2G(_freq, _idx) { \
32 .center_freq = (_freq), \
33 .hw_value = (_idx), \
34 .max_power = 20, \
35}
36
ea46e644
S		 37#define CHAN5G(_freq, _idx) { \
38 .band = IEEE80211_BAND_5GHZ, \
39 .center_freq = (_freq), \
40 .hw_value = (_idx), \
41 .max_power = 20, \
42}
43
fb9987d0
S		 44static struct ieee80211_channel ath9k_2ghz_channels[] = {
45 CHAN2G(2412, 0), /* Channel 1 */
46 CHAN2G(2417, 1), /* Channel 2 */
47 CHAN2G(2422, 2), /* Channel 3 */
48 CHAN2G(2427, 3), /* Channel 4 */
49 CHAN2G(2432, 4), /* Channel 5 */
50 CHAN2G(2437, 5), /* Channel 6 */
51 CHAN2G(2442, 6), /* Channel 7 */
52 CHAN2G(2447, 7), /* Channel 8 */
53 CHAN2G(2452, 8), /* Channel 9 */
54 CHAN2G(2457, 9), /* Channel 10 */
55 CHAN2G(2462, 10), /* Channel 11 */
56 CHAN2G(2467, 11), /* Channel 12 */
57 CHAN2G(2472, 12), /* Channel 13 */
58 CHAN2G(2484, 13), /* Channel 14 */
59};
60
ea46e644
S		 61static struct ieee80211_channel ath9k_5ghz_channels[] = {
62 /* _We_ call this UNII 1 */
63 CHAN5G(5180, 14), /* Channel 36 */
64 CHAN5G(5200, 15), /* Channel 40 */
65 CHAN5G(5220, 16), /* Channel 44 */
66 CHAN5G(5240, 17), /* Channel 48 */
67 /* _We_ call this UNII 2 */
68 CHAN5G(5260, 18), /* Channel 52 */
69 CHAN5G(5280, 19), /* Channel 56 */
70 CHAN5G(5300, 20), /* Channel 60 */
71 CHAN5G(5320, 21), /* Channel 64 */
72 /* _We_ call this "Middle band" */
73 CHAN5G(5500, 22), /* Channel 100 */
74 CHAN5G(5520, 23), /* Channel 104 */
75 CHAN5G(5540, 24), /* Channel 108 */
76 CHAN5G(5560, 25), /* Channel 112 */
77 CHAN5G(5580, 26), /* Channel 116 */
78 CHAN5G(5600, 27), /* Channel 120 */
79 CHAN5G(5620, 28), /* Channel 124 */
80 CHAN5G(5640, 29), /* Channel 128 */
81 CHAN5G(5660, 30), /* Channel 132 */
82 CHAN5G(5680, 31), /* Channel 136 */
83 CHAN5G(5700, 32), /* Channel 140 */
84 /* _We_ call this UNII 3 */
85 CHAN5G(5745, 33), /* Channel 149 */
86 CHAN5G(5765, 34), /* Channel 153 */
87 CHAN5G(5785, 35), /* Channel 157 */
88 CHAN5G(5805, 36), /* Channel 161 */
89 CHAN5G(5825, 37), /* Channel 165 */
90};
91
fb9987d0
S		 92/* Atheros hardware rate code addition for short premble */
93#define SHPCHECK(__hw_rate, __flags) \
94 ((__flags & IEEE80211_RATE_SHORT_PREAMBLE) ? (__hw_rate | 0x04) : 0)
95
96#define RATE(_bitrate, _hw_rate, _flags) { \
97 .bitrate = (_bitrate), \
98 .flags = (_flags), \
99 .hw_value = (_hw_rate), \
100 .hw_value_short = (SHPCHECK(_hw_rate, _flags)) \
101}
102
103static struct ieee80211_rate ath9k_legacy_rates[] = {
104 RATE(10, 0x1b, 0),
105 RATE(20, 0x1a, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp : 0x1e */
106 RATE(55, 0x19, IEEE80211_RATE_SHORT_PREAMBLE), /* shortp: 0x1d */
107 RATE(110, 0x18, IEEE80211_RATE_SHORT_PREAMBLE), /* short: 0x1c */
108 RATE(60, 0x0b, 0),
109 RATE(90, 0x0f, 0),
110 RATE(120, 0x0a, 0),
111 RATE(180, 0x0e, 0),
112 RATE(240, 0x09, 0),
113 RATE(360, 0x0d, 0),
114 RATE(480, 0x08, 0),
115 RATE(540, 0x0c, 0),
116};
117
118static int ath9k_htc_wait_for_target(struct ath9k_htc_priv *priv)
119{
120 int time_left;
121
d8c49ffb
SM		 122 if (atomic_read(&priv->htc->tgt_ready) > 0) {
123 atomic_dec(&priv->htc->tgt_ready);
124 return 0;
125 }
126
fb9987d0
S		 127 /* Firmware can take up to 50ms to get ready, to be safe use 1 second */
128 time_left = wait_for_completion_timeout(&priv->htc->target_wait, HZ);
129 if (!time_left) {
130 dev_err(priv->dev, "ath9k_htc: Target is unresponsive\n");
131 return -ETIMEDOUT;
132 }
133
d8c49ffb
SM		 134 atomic_dec(&priv->htc->tgt_ready);
135
fb9987d0
S		 136 return 0;
137}
138
139static void ath9k_deinit_priv(struct ath9k_htc_priv *priv)
140{
e1572c5e 141 ath9k_htc_exit_debug(priv->ah);
fb9987d0
S		 142 ath9k_hw_deinit(priv->ah);
143 tasklet_kill(&priv->wmi_tasklet);
144 tasklet_kill(&priv->rx_tasklet);
145 tasklet_kill(&priv->tx_tasklet);
146 kfree(priv->ah);
147 priv->ah = NULL;
148}
149
150static void ath9k_deinit_device(struct ath9k_htc_priv *priv)
151{
152 struct ieee80211_hw *hw = priv->hw;
153
154 wiphy_rfkill_stop_polling(hw->wiphy);
155 ath9k_deinit_leds(priv);
156 ieee80211_unregister_hw(hw);
157 ath9k_rx_cleanup(priv);
158 ath9k_tx_cleanup(priv);
159 ath9k_deinit_priv(priv);
160}
161
162static inline int ath9k_htc_connect_svc(struct ath9k_htc_priv *priv,
163 u16 service_id,
164 void (*tx) (void *,
165 struct sk_buff *,
166 enum htc_endpoint_id,
167 bool txok),
168 enum htc_endpoint_id *ep_id)
169{
170 struct htc_service_connreq req;
171
172 memset(&req, 0, sizeof(struct htc_service_connreq));
173
174 req.service_id = service_id;
175 req.ep_callbacks.priv = priv;
176 req.ep_callbacks.rx = ath9k_htc_rxep;
177 req.ep_callbacks.tx = tx;
178
179 return htc_connect_service(priv->htc, &req, ep_id);
180}
181
6267dc70 182static int ath9k_init_htc_services(struct ath9k_htc_priv *priv, u16 devid)
fb9987d0
S		 183{
184 int ret;
185
186 /* WMI CMD*/
187 ret = ath9k_wmi_connect(priv->htc, priv->wmi, &priv->wmi_cmd_ep);
188 if (ret)
189 goto err;
190
191 /* Beacon */
9c6dda4e 192 ret = ath9k_htc_connect_svc(priv, WMI_BEACON_SVC, ath9k_htc_beaconep,
fb9987d0
S		 193 &priv->beacon_ep);
194 if (ret)
195 goto err;
196
197 /* CAB */
198 ret = ath9k_htc_connect_svc(priv, WMI_CAB_SVC, ath9k_htc_txep,
199 &priv->cab_ep);
200 if (ret)
201 goto err;
202
203
204 /* UAPSD */
205 ret = ath9k_htc_connect_svc(priv, WMI_UAPSD_SVC, ath9k_htc_txep,
206 &priv->uapsd_ep);
207 if (ret)
208 goto err;
209
210 /* MGMT */
211 ret = ath9k_htc_connect_svc(priv, WMI_MGMT_SVC, ath9k_htc_txep,
212 &priv->mgmt_ep);
213 if (ret)
214 goto err;
215
216 /* DATA BE */
217 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BE_SVC, ath9k_htc_txep,
218 &priv->data_be_ep);
219 if (ret)
220 goto err;
221
222 /* DATA BK */
223 ret = ath9k_htc_connect_svc(priv, WMI_DATA_BK_SVC, ath9k_htc_txep,
224 &priv->data_bk_ep);
225 if (ret)
226 goto err;
227
228 /* DATA VI */
229 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VI_SVC, ath9k_htc_txep,
230 &priv->data_vi_ep);
231 if (ret)
232 goto err;
233
234 /* DATA VO */
235 ret = ath9k_htc_connect_svc(priv, WMI_DATA_VO_SVC, ath9k_htc_txep,
236 &priv->data_vo_ep);
237 if (ret)
238 goto err;
239
6267dc70
S		 240 /*
241 * Setup required credits before initializing HTC.
242 * This is a bit hacky, but, since queuing is done in
243 * the HIF layer, shouldn't matter much.
244 */
245
246 switch(devid) {
6267dc70 247 case 0x7010:
ca6cff1f 248 case 0x7015:
4e63f768 249 case 0x9018:
6267dc70
S		 250 priv->htc->credits = 45;
251 break;
252 default:
4e63f768 253 priv->htc->credits = 33;
6267dc70
S		 254 }
255
fb9987d0
S		 256 ret = htc_init(priv->htc);
257 if (ret)
258 goto err;
259
6267dc70
S		 260 dev_info(priv->dev, "ath9k_htc: HTC initialized with %d credits\n",
261 priv->htc->credits);
262
fb9987d0
S		 263 return 0;
264
265err:
266 dev_err(priv->dev, "ath9k_htc: Unable to initialize HTC services\n");
267 return ret;
268}
269
270static int ath9k_reg_notifier(struct wiphy *wiphy,
271 struct regulatory_request *request)
272{
273 struct ieee80211_hw *hw = wiphy_to_ieee80211_hw(wiphy);
274 struct ath9k_htc_priv *priv = hw->priv;
275
276 return ath_reg_notifier_apply(wiphy, request,
277 ath9k_hw_regulatory(priv->ah));
278}
279
4a22fe10 280static unsigned int ath9k_regread(void *hw_priv, u32 reg_offset)
fb9987d0
S		 281{
282 struct ath_hw *ah = (struct ath_hw *) hw_priv;
283 struct ath_common *common = ath9k_hw_common(ah);
284 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
285 __be32 val, reg = cpu_to_be32(reg_offset);
286 int r;
287
288 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_READ_CMDID,
289 (u8 *) &reg, sizeof(reg),
290 (u8 *) &val, sizeof(val),
291 100);
292 if (unlikely(r)) {
293 ath_print(common, ATH_DBG_WMI,
294 "REGISTER READ FAILED: (0x%04x, %d)\n",
295 reg_offset, r);
296 return -EIO;
297 }
298
299 return be32_to_cpu(val);
300}
301
4a22fe10 302static void ath9k_regwrite_single(void *hw_priv, u32 val, u32 reg_offset)
fb9987d0
S		 303{
304 struct ath_hw *ah = (struct ath_hw *) hw_priv;
305 struct ath_common *common = ath9k_hw_common(ah);
306 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
307 __be32 buf[2] = {
308 cpu_to_be32(reg_offset),
309 cpu_to_be32(val),
310 };
311 int r;
312
313 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
314 (u8 *) &buf, sizeof(buf),
315 (u8 *) &val, sizeof(val),
316 100);
317 if (unlikely(r)) {
318 ath_print(common, ATH_DBG_WMI,
319 "REGISTER WRITE FAILED:(0x%04x, %d)\n",
320 reg_offset, r);
321 }
322}
323
4a22fe10
S		 324static void ath9k_regwrite_buffer(void *hw_priv, u32 val, u32 reg_offset)
325{
326 struct ath_hw *ah = (struct ath_hw *) hw_priv;
327 struct ath_common *common = ath9k_hw_common(ah);
328 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
329 u32 rsp_status;
330 int r;
331
332 mutex_lock(&priv->wmi->multi_write_mutex);
333
334 /* Store the register/value */
335 priv->wmi->multi_write[priv->wmi->multi_write_idx].reg =
336 cpu_to_be32(reg_offset);
337 priv->wmi->multi_write[priv->wmi->multi_write_idx].val =
338 cpu_to_be32(val);
339
340 priv->wmi->multi_write_idx++;
341
342 /* If the buffer is full, send it out. */
343 if (priv->wmi->multi_write_idx == MAX_CMD_NUMBER) {
344 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
345 (u8 *) &priv->wmi->multi_write,
346 sizeof(struct register_write) * priv->wmi->multi_write_idx,
347 (u8 *) &rsp_status, sizeof(rsp_status),
348 100);
349 if (unlikely(r)) {
350 ath_print(common, ATH_DBG_WMI,
351 "REGISTER WRITE FAILED, multi len: %d\n",
352 priv->wmi->multi_write_idx);
353 }
354 priv->wmi->multi_write_idx = 0;
355 }
356
357 mutex_unlock(&priv->wmi->multi_write_mutex);
358}
359
360static void ath9k_regwrite(void *hw_priv, u32 val, u32 reg_offset)
361{
362 struct ath_hw *ah = (struct ath_hw *) hw_priv;
363 struct ath_common *common = ath9k_hw_common(ah);
364 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
365
366 if (atomic_read(&priv->wmi->mwrite_cnt))
367 ath9k_regwrite_buffer(hw_priv, val, reg_offset);
368 else
369 ath9k_regwrite_single(hw_priv, val, reg_offset);
370}
371
372static void ath9k_enable_regwrite_buffer(void *hw_priv)
373{
374 struct ath_hw *ah = (struct ath_hw *) hw_priv;
375 struct ath_common *common = ath9k_hw_common(ah);
376 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
377
378 atomic_inc(&priv->wmi->mwrite_cnt);
379}
380
381static void ath9k_disable_regwrite_buffer(void *hw_priv)
382{
383 struct ath_hw *ah = (struct ath_hw *) hw_priv;
384 struct ath_common *common = ath9k_hw_common(ah);
385 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
386
387 atomic_dec(&priv->wmi->mwrite_cnt);
388}
389
390static void ath9k_regwrite_flush(void *hw_priv)
391{
392 struct ath_hw *ah = (struct ath_hw *) hw_priv;
393 struct ath_common *common = ath9k_hw_common(ah);
394 struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv;
395 u32 rsp_status;
396 int r;
397
398 mutex_lock(&priv->wmi->multi_write_mutex);
399
400 if (priv->wmi->multi_write_idx) {
401 r = ath9k_wmi_cmd(priv->wmi, WMI_REG_WRITE_CMDID,
402 (u8 *) &priv->wmi->multi_write,
403 sizeof(struct register_write) * priv->wmi->multi_write_idx,
404 (u8 *) &rsp_status, sizeof(rsp_status),
405 100);
406 if (unlikely(r)) {
407 ath_print(common, ATH_DBG_WMI,
408 "REGISTER WRITE FAILED, multi len: %d\n",
409 priv->wmi->multi_write_idx);
410 }
411 priv->wmi->multi_write_idx = 0;
412 }
413
414 mutex_unlock(&priv->wmi->multi_write_mutex);
415}
416
fb9987d0 417static const struct ath_ops ath9k_common_ops = {
4a22fe10
S		 418 .read = ath9k_regread,
419 .write = ath9k_regwrite,
420 .enable_write_buffer = ath9k_enable_regwrite_buffer,
421 .disable_write_buffer = ath9k_disable_regwrite_buffer,
422 .write_flush = ath9k_regwrite_flush,
fb9987d0
S		 423};
424
425static void ath_usb_read_cachesize(struct ath_common *common, int *csz)
426{
427 *csz = L1_CACHE_BYTES >> 2;
428}
429
430static bool ath_usb_eeprom_read(struct ath_common *common, u32 off, u16 *data)
431{
432 struct ath_hw *ah = (struct ath_hw *) common->ah;
433
434 (void)REG_READ(ah, AR5416_EEPROM_OFFSET + (off << AR5416_EEPROM_S));
435
436 if (!ath9k_hw_wait(ah,
437 AR_EEPROM_STATUS_DATA,
438 AR_EEPROM_STATUS_DATA_BUSY |
439 AR_EEPROM_STATUS_DATA_PROT_ACCESS, 0,
440 AH_WAIT_TIMEOUT))
441 return false;
442
443 *data = MS(REG_READ(ah, AR_EEPROM_STATUS_DATA),
444 AR_EEPROM_STATUS_DATA_VAL);
445
446 return true;
447}
448
449static const struct ath_bus_ops ath9k_usb_bus_ops = {
497ad9ad 450 .ath_bus_type = ATH_USB,
fb9987d0
S		 451 .read_cachesize = ath_usb_read_cachesize,
452 .eeprom_read = ath_usb_eeprom_read,
453};
454
455static void setup_ht_cap(struct ath9k_htc_priv *priv,
456 struct ieee80211_sta_ht_cap *ht_info)
457{
6debecad
S		 458 struct ath_common *common = ath9k_hw_common(priv->ah);
459 u8 tx_streams, rx_streams;
460 int i;
461
fb9987d0
S		 462 ht_info->ht_supported = true;
463 ht_info->cap = IEEE80211_HT_CAP_SUP_WIDTH_20_40 |
464 IEEE80211_HT_CAP_SM_PS |
465 IEEE80211_HT_CAP_SGI_40 |
466 IEEE80211_HT_CAP_DSSSCCK40;
467
b4dec5e8
S		 468 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_SGI_20)
469 ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
470
17525f96
S		 471 ht_info->cap |= (1 << IEEE80211_HT_CAP_RX_STBC_SHIFT);
472
fb9987d0
S		 473 ht_info->ampdu_factor = IEEE80211_HT_MAX_AMPDU_64K;
474 ht_info->ampdu_density = IEEE80211_HT_MPDU_DENSITY_8;
475
476 memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
6debecad
S		 477
478 /* ath9k_htc supports only 1 or 2 stream devices */
479 tx_streams = ath9k_cmn_count_streams(common->tx_chainmask, 2);
480 rx_streams = ath9k_cmn_count_streams(common->rx_chainmask, 2);
481
482 ath_print(common, ATH_DBG_CONFIG,
483 "TX streams %d, RX streams: %d\n",
484 tx_streams, rx_streams);
485
486 if (tx_streams != rx_streams) {
487 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
488 ht_info->mcs.tx_params |= ((tx_streams - 1) <<
489 IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
490 }
491
492 for (i = 0; i < rx_streams; i++)
493 ht_info->mcs.rx_mask[i] = 0xff;
494
fb9987d0
S		 495 ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_DEFINED;
496}
497
498static int ath9k_init_queues(struct ath9k_htc_priv *priv)
499{
500 struct ath_common *common = ath9k_hw_common(priv->ah);
501 int i;
502
503 for (i = 0; i < ARRAY_SIZE(priv->hwq_map); i++)
504 priv->hwq_map[i] = -1;
505
ca74b83b
S		 506 priv->beaconq = ath9k_hw_beaconq_setup(priv->ah);
507 if (priv->beaconq == -1) {
508 ath_print(common, ATH_DBG_FATAL,
509 "Unable to setup BEACON xmit queue\n");
510 goto err;
511 }
512
513 priv->cabq = ath9k_htc_cabq_setup(priv);
514 if (priv->cabq == -1) {
515 ath_print(common, ATH_DBG_FATAL,
516 "Unable to setup CAB xmit queue\n");
517 goto err;
518 }
519
e8c35a77 520 if (!ath9k_htc_txq_setup(priv, WME_AC_BE)) {
fb9987d0
S		 521 ath_print(common, ATH_DBG_FATAL,
522 "Unable to setup xmit queue for BE traffic\n");
523 goto err;
524 }
525
e8c35a77 526 if (!ath9k_htc_txq_setup(priv, WME_AC_BK)) {
fb9987d0
S		 527 ath_print(common, ATH_DBG_FATAL,
528 "Unable to setup xmit queue for BK traffic\n");
529 goto err;
530 }
e8c35a77 531 if (!ath9k_htc_txq_setup(priv, WME_AC_VI)) {
fb9987d0
S		 532 ath_print(common, ATH_DBG_FATAL,
533 "Unable to setup xmit queue for VI traffic\n");
534 goto err;
535 }
e8c35a77 536 if (!ath9k_htc_txq_setup(priv, WME_AC_VO)) {
fb9987d0
S		 537 ath_print(common, ATH_DBG_FATAL,
538 "Unable to setup xmit queue for VO traffic\n");
539 goto err;
540 }
541
542 return 0;
543
544err:
545 return -EINVAL;
546}
547
548static void ath9k_init_crypto(struct ath9k_htc_priv *priv)
549{
550 struct ath_common *common = ath9k_hw_common(priv->ah);
551 int i = 0;
552
553 /* Get the hardware key cache size. */
554 common->keymax = priv->ah->caps.keycache_size;
555 if (common->keymax > ATH_KEYMAX) {
556 ath_print(common, ATH_DBG_ANY,
557 "Warning, using only %u entries in %u key cache\n",
558 ATH_KEYMAX, common->keymax);
559 common->keymax = ATH_KEYMAX;
560 }
561
562 /*
563 * Reset the key cache since some parts do not
564 * reset the contents on initial power up.
565 */
566 for (i = 0; i < common->keymax; i++)
567 ath9k_hw_keyreset(priv->ah, (u16) i);
fb9987d0
S		 568}
569
570static void ath9k_init_channels_rates(struct ath9k_htc_priv *priv)
571{
572 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes)) {
573 priv->sbands[IEEE80211_BAND_2GHZ].channels =
574 ath9k_2ghz_channels;
575 priv->sbands[IEEE80211_BAND_2GHZ].band = IEEE80211_BAND_2GHZ;
576 priv->sbands[IEEE80211_BAND_2GHZ].n_channels =
577 ARRAY_SIZE(ath9k_2ghz_channels);
578 priv->sbands[IEEE80211_BAND_2GHZ].bitrates = ath9k_legacy_rates;
579 priv->sbands[IEEE80211_BAND_2GHZ].n_bitrates =
580 ARRAY_SIZE(ath9k_legacy_rates);
581 }
ea46e644
S		 582
583 if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes)) {
584 priv->sbands[IEEE80211_BAND_5GHZ].channels = ath9k_5ghz_channels;
585 priv->sbands[IEEE80211_BAND_5GHZ].band = IEEE80211_BAND_5GHZ;
586 priv->sbands[IEEE80211_BAND_5GHZ].n_channels =
587 ARRAY_SIZE(ath9k_5ghz_channels);
588 priv->sbands[IEEE80211_BAND_5GHZ].bitrates =
589 ath9k_legacy_rates + 4;
590 priv->sbands[IEEE80211_BAND_5GHZ].n_bitrates =
591 ARRAY_SIZE(ath9k_legacy_rates) - 4;
592 }
fb9987d0
S		 593}
594
595static void ath9k_init_misc(struct ath9k_htc_priv *priv)
596{
597 struct ath_common *common = ath9k_hw_common(priv->ah);
598
599 common->tx_chainmask = priv->ah->caps.tx_chainmask;
600 common->rx_chainmask = priv->ah->caps.rx_chainmask;
601
602 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_BSSIDMASK)
603 memcpy(common->bssidmask, ath_bcast_mac, ETH_ALEN);
604
9f01a84e 605 priv->ah->opmode = NL80211_IFTYPE_STATION;
fb9987d0
S		 606}
607
608static int ath9k_init_priv(struct ath9k_htc_priv *priv, u16 devid)
609{
610 struct ath_hw *ah = NULL;
611 struct ath_common *common;
612 int ret = 0, csz = 0;
613
614 priv->op_flags |= OP_INVALID;
615
616 ah = kzalloc(sizeof(struct ath_hw), GFP_KERNEL);
617 if (!ah)
618 return -ENOMEM;
619
620 ah->hw_version.devid = devid;
621 ah->hw_version.subsysid = 0; /* FIXME */
622 priv->ah = ah;
623
624 common = ath9k_hw_common(ah);
625 common->ops = &ath9k_common_ops;
626 common->bus_ops = &ath9k_usb_bus_ops;
627 common->ah = ah;
628 common->hw = priv->hw;
629 common->priv = priv;
630 common->debug_mask = ath9k_debug;
631
632 spin_lock_init(&priv->wmi->wmi_lock);
633 spin_lock_init(&priv->beacon_lock);
7757dfed 634 spin_lock_init(&priv->tx_lock);
fb9987d0 635 mutex_init(&priv->mutex);
bde748a4 636 mutex_init(&priv->htc_pm_lock);
fb9987d0
S		 637 tasklet_init(&priv->wmi_tasklet, ath9k_wmi_tasklet,
638 (unsigned long)priv);
639 tasklet_init(&priv->rx_tasklet, ath9k_rx_tasklet,
640 (unsigned long)priv);
641 tasklet_init(&priv->tx_tasklet, ath9k_tx_tasklet, (unsigned long)priv);
fb9987d0 642 INIT_DELAYED_WORK(&priv->ath9k_ani_work, ath9k_ani_work);
bde748a4 643 INIT_WORK(&priv->ps_work, ath9k_ps_work);
fb9987d0
S		 644
645 /*
646 * Cache line size is used to size and align various
647 * structures used to communicate with the hardware.
648 */
649 ath_read_cachesize(common, &csz);
650 common->cachelsz = csz << 2; /* convert to bytes */
651
652 ret = ath9k_hw_init(ah);
653 if (ret) {
654 ath_print(common, ATH_DBG_FATAL,
655 "Unable to initialize hardware; "
656 "initialization status: %d\n", ret);
657 goto err_hw;
658 }
659
e1572c5e 660 ret = ath9k_htc_init_debug(ah);
fb9987d0
S		 661 if (ret) {
662 ath_print(common, ATH_DBG_FATAL,
663 "Unable to create debugfs files\n");
664 goto err_debug;
665 }
666
667 ret = ath9k_init_queues(priv);
668 if (ret)
669 goto err_queues;
670
671 ath9k_init_crypto(priv);
672 ath9k_init_channels_rates(priv);
673 ath9k_init_misc(priv);
674
675 return 0;
676
677err_queues:
e1572c5e 678 ath9k_htc_exit_debug(ah);
fb9987d0
S		 679err_debug:
680 ath9k_hw_deinit(ah);
681err_hw:
682
683 kfree(ah);
684 priv->ah = NULL;
685
686 return ret;
687}
688
689static void ath9k_set_hw_capab(struct ath9k_htc_priv *priv,
690 struct ieee80211_hw *hw)
691{
692 struct ath_common *common = ath9k_hw_common(priv->ah);
693
694 hw->flags = IEEE80211_HW_SIGNAL_DBM |
695 IEEE80211_HW_AMPDU_AGGREGATION |
696 IEEE80211_HW_SPECTRUM_MGMT |
32fbccaf 697 IEEE80211_HW_HAS_RATE_CONTROL |
bde748a4
VN		 698 IEEE80211_HW_RX_INCLUDES_FCS |
699 IEEE80211_HW_SUPPORTS_PS |
700 IEEE80211_HW_PS_NULLFUNC_STACK;
fb9987d0
S		 701
702 hw->wiphy->interface_modes =
703 BIT(NL80211_IFTYPE_STATION) |
704 BIT(NL80211_IFTYPE_ADHOC);
705
bde748a4
VN		 706 hw->wiphy->flags &= ~WIPHY_FLAG_PS_ON_BY_DEFAULT;
707
fb9987d0
S		 708 hw->queues = 4;
709 hw->channel_change_time = 5000;
710 hw->max_listen_interval = 10;
711 hw->vif_data_size = sizeof(struct ath9k_htc_vif);
712 hw->sta_data_size = sizeof(struct ath9k_htc_sta);
713
714 /* tx_frame_hdr is larger than tx_mgmt_hdr anyway */
715 hw->extra_tx_headroom = sizeof(struct tx_frame_hdr) +
716 sizeof(struct htc_frame_hdr) + 4;
717
718 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes))
719 hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
720 &priv->sbands[IEEE80211_BAND_2GHZ];
ea46e644
S		 721 if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes))
722 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
723 &priv->sbands[IEEE80211_BAND_5GHZ];
fb9987d0
S		 724
725 if (priv->ah->caps.hw_caps & ATH9K_HW_CAP_HT) {
726 if (test_bit(ATH9K_MODE_11G, priv->ah->caps.wireless_modes))
727 setup_ht_cap(priv,
728 &priv->sbands[IEEE80211_BAND_2GHZ].ht_cap);
ea46e644
S		 729 if (test_bit(ATH9K_MODE_11A, priv->ah->caps.wireless_modes))
730 setup_ht_cap(priv,
731 &priv->sbands[IEEE80211_BAND_5GHZ].ht_cap);
fb9987d0
S		 732 }
733
734 SET_IEEE80211_PERM_ADDR(hw, common->macaddr);
735}
736
737static int ath9k_init_device(struct ath9k_htc_priv *priv, u16 devid)
738{
739 struct ieee80211_hw *hw = priv->hw;
740 struct ath_common *common;
741 struct ath_hw *ah;
742 int error = 0;
743 struct ath_regulatory *reg;
744
745 /* Bring up device */
746 error = ath9k_init_priv(priv, devid);
747 if (error != 0)
748 goto err_init;
749
750 ah = priv->ah;
751 common = ath9k_hw_common(ah);
752 ath9k_set_hw_capab(priv, hw);
753
754 /* Initialize regulatory */
755 error = ath_regd_init(&common->regulatory, priv->hw->wiphy,
756 ath9k_reg_notifier);
757 if (error)
758 goto err_regd;
759
760 reg = &common->regulatory;
761
762 /* Setup TX */
763 error = ath9k_tx_init(priv);
764 if (error != 0)
765 goto err_tx;
766
767 /* Setup RX */
768 error = ath9k_rx_init(priv);
769 if (error != 0)
770 goto err_rx;
771
772 /* Register with mac80211 */
773 error = ieee80211_register_hw(hw);
774 if (error)
775 goto err_register;
776
777 /* Handle world regulatory */
778 if (!ath_is_world_regd(reg)) {
779 error = regulatory_hint(hw->wiphy, reg->alpha2);
780 if (error)
781 goto err_world;
782 }
783
784 ath9k_init_leds(priv);
785 ath9k_start_rfkill_poll(priv);
786
787 return 0;
788
789err_world:
790 ieee80211_unregister_hw(hw);
791err_register:
792 ath9k_rx_cleanup(priv);
793err_rx:
794 ath9k_tx_cleanup(priv);
795err_tx:
796 /* Nothing */
797err_regd:
798 ath9k_deinit_priv(priv);
799err_init:
800 return error;
801}
802
803int ath9k_htc_probe_device(struct htc_target *htc_handle, struct device *dev,
804 u16 devid)
805{
806 struct ieee80211_hw *hw;
807 struct ath9k_htc_priv *priv;
808 int ret;
809
810 hw = ieee80211_alloc_hw(sizeof(struct ath9k_htc_priv), &ath9k_htc_ops);
811 if (!hw)
812 return -ENOMEM;
813
814 priv = hw->priv;
815 priv->hw = hw;
816 priv->htc = htc_handle;
817 priv->dev = dev;
818 htc_handle->drv_priv = priv;
819 SET_IEEE80211_DEV(hw, priv->dev);
820
821 ret = ath9k_htc_wait_for_target(priv);
822 if (ret)
823 goto err_free;
824
825 priv->wmi = ath9k_init_wmi(priv);
826 if (!priv->wmi) {
827 ret = -EINVAL;
828 goto err_free;
829 }
830
6267dc70 831 ret = ath9k_init_htc_services(priv, devid);
fb9987d0
S		 832 if (ret)
833 goto err_init;
834
a3be14b7
S		 835 /* The device may have been unplugged earlier. */
836 priv->op_flags &= ~OP_UNPLUGGED;
837
fb9987d0
S		 838 ret = ath9k_init_device(priv, devid);
839 if (ret)
840 goto err_init;
841
842 return 0;
843
844err_init:
845 ath9k_deinit_wmi(priv);
846err_free:
847 ieee80211_free_hw(hw);
848 return ret;
849}
850
851void ath9k_htc_disconnect_device(struct htc_target *htc_handle, bool hotunplug)
852{
853 if (htc_handle->drv_priv) {
a3be14b7
S		 854
855 /* Check if the device has been yanked out. */
856 if (hotunplug)
857 htc_handle->drv_priv->op_flags |= OP_UNPLUGGED;
858
fb9987d0
S		 859 ath9k_deinit_device(htc_handle->drv_priv);
860 ath9k_deinit_wmi(htc_handle->drv_priv);
861 ieee80211_free_hw(htc_handle->drv_priv->hw);
862 }
863}
864
865#ifdef CONFIG_PM
866int ath9k_htc_resume(struct htc_target *htc_handle)
867{
868 int ret;
869
870 ret = ath9k_htc_wait_for_target(htc_handle->drv_priv);
871 if (ret)
872 return ret;
873
6267dc70
S		 874 ret = ath9k_init_htc_services(htc_handle->drv_priv,
875 htc_handle->drv_priv->ah->hw_version.devid);
fb9987d0
S		 876 return ret;
877}
878#endif
879
880static int __init ath9k_htc_init(void)
881{
882 int error;
883
e1572c5e 884 error = ath9k_htc_debug_create_root();
fb9987d0
S		 885 if (error < 0) {
886 printk(KERN_ERR
887 "ath9k_htc: Unable to create debugfs root: %d\n",
888 error);
889 goto err_dbg;
890 }
891
892 error = ath9k_hif_usb_init();
893 if (error < 0) {
894 printk(KERN_ERR
895 "ath9k_htc: No USB devices found,"
896 " driver not installed.\n");
897 error = -ENODEV;
898 goto err_usb;
899 }
900
901 return 0;
902
903err_usb:
e1572c5e 904 ath9k_htc_debug_remove_root();
fb9987d0
S		 905err_dbg:
906 return error;
907}
908module_init(ath9k_htc_init);
909
910static void __exit ath9k_htc_exit(void)
911{
912 ath9k_hif_usb_exit();
e1572c5e 913 ath9k_htc_debug_remove_root();
fb9987d0
S		 914 printk(KERN_INFO "ath9k_htc: Driver unloaded\n");
915}
916module_exit(ath9k_htc_exit);
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