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sfc: Implement message level control
[net-next-2.6.git] / drivers / net / sfc / rx.c
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8ceee660
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1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
906bb26c 4 * Copyright 2005-2009 Solarflare Communications Inc.
8ceee660
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5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11#include <linux/socket.h>
12#include <linux/in.h>
5a0e3ad6 13#include <linux/slab.h>
8ceee660
BH
14#include <linux/ip.h>
15#include <linux/tcp.h>
16#include <linux/udp.h>
17#include <net/ip.h>
18#include <net/checksum.h>
19#include "net_driver.h"
8ceee660 20#include "efx.h"
744093c9 21#include "nic.h"
3273c2e8 22#include "selftest.h"
8ceee660
BH
23#include "workarounds.h"
24
25/* Number of RX descriptors pushed at once. */
26#define EFX_RX_BATCH 8
27
62b330ba
SH
28/* Maximum size of a buffer sharing a page */
29#define EFX_RX_HALF_PAGE ((PAGE_SIZE >> 1) - sizeof(struct efx_rx_page_state))
30
8ceee660
BH
31/* Size of buffer allocated for skb header area. */
32#define EFX_SKB_HEADERS 64u
33
34/*
35 * rx_alloc_method - RX buffer allocation method
36 *
37 * This driver supports two methods for allocating and using RX buffers:
38 * each RX buffer may be backed by an skb or by an order-n page.
39 *
40 * When LRO is in use then the second method has a lower overhead,
41 * since we don't have to allocate then free skbs on reassembled frames.
42 *
43 * Values:
44 * - RX_ALLOC_METHOD_AUTO = 0
45 * - RX_ALLOC_METHOD_SKB = 1
46 * - RX_ALLOC_METHOD_PAGE = 2
47 *
48 * The heuristic for %RX_ALLOC_METHOD_AUTO is a simple hysteresis count
49 * controlled by the parameters below.
50 *
51 * - Since pushing and popping descriptors are separated by the rx_queue
52 * size, so the watermarks should be ~rxd_size.
53 * - The performance win by using page-based allocation for LRO is less
54 * than the performance hit of using page-based allocation of non-LRO,
55 * so the watermarks should reflect this.
56 *
57 * Per channel we maintain a single variable, updated by each channel:
58 *
59 * rx_alloc_level += (lro_performed ? RX_ALLOC_FACTOR_LRO :
60 * RX_ALLOC_FACTOR_SKB)
61 * Per NAPI poll interval, we constrain rx_alloc_level to 0..MAX (which
62 * limits the hysteresis), and update the allocation strategy:
63 *
64 * rx_alloc_method = (rx_alloc_level > RX_ALLOC_LEVEL_LRO ?
65 * RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB)
66 */
c3c63365 67static int rx_alloc_method = RX_ALLOC_METHOD_AUTO;
8ceee660
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68
69#define RX_ALLOC_LEVEL_LRO 0x2000
70#define RX_ALLOC_LEVEL_MAX 0x3000
71#define RX_ALLOC_FACTOR_LRO 1
72#define RX_ALLOC_FACTOR_SKB (-2)
73
74/* This is the percentage fill level below which new RX descriptors
75 * will be added to the RX descriptor ring.
76 */
77static unsigned int rx_refill_threshold = 90;
78
79/* This is the percentage fill level to which an RX queue will be refilled
80 * when the "RX refill threshold" is reached.
81 */
82static unsigned int rx_refill_limit = 95;
83
84/*
85 * RX maximum head room required.
86 *
87 * This must be at least 1 to prevent overflow and at least 2 to allow
62b330ba 88 * pipelined receives.
8ceee660 89 */
62b330ba 90#define EFX_RXD_HEAD_ROOM 2
8ceee660 91
55668611
BH
92static inline unsigned int efx_rx_buf_offset(struct efx_rx_buffer *buf)
93{
94 /* Offset is always within one page, so we don't need to consider
95 * the page order.
96 */
184be0c2 97 return (__force unsigned long) buf->data & (PAGE_SIZE - 1);
55668611
BH
98}
99static inline unsigned int efx_rx_buf_size(struct efx_nic *efx)
100{
101 return PAGE_SIZE << efx->rx_buffer_order;
102}
8ceee660 103
8ceee660 104/**
f7d6f379 105 * efx_init_rx_buffers_skb - create EFX_RX_BATCH skb-based RX buffers
8ceee660
BH
106 *
107 * @rx_queue: Efx RX queue
8ceee660 108 *
f7d6f379
SH
109 * This allocates EFX_RX_BATCH skbs, maps them for DMA, and populates a
110 * struct efx_rx_buffer for each one. Return a negative error code or 0
111 * on success. May fail having only inserted fewer than EFX_RX_BATCH
112 * buffers.
8ceee660 113 */
f7d6f379 114static int efx_init_rx_buffers_skb(struct efx_rx_queue *rx_queue)
8ceee660
BH
115{
116 struct efx_nic *efx = rx_queue->efx;
117 struct net_device *net_dev = efx->net_dev;
f7d6f379 118 struct efx_rx_buffer *rx_buf;
8ceee660 119 int skb_len = efx->rx_buffer_len;
f7d6f379 120 unsigned index, count;
8ceee660 121
f7d6f379
SH
122 for (count = 0; count < EFX_RX_BATCH; ++count) {
123 index = rx_queue->added_count & EFX_RXQ_MASK;
124 rx_buf = efx_rx_buffer(rx_queue, index);
8ceee660 125
f7d6f379
SH
126 rx_buf->skb = netdev_alloc_skb(net_dev, skb_len);
127 if (unlikely(!rx_buf->skb))
128 return -ENOMEM;
129 rx_buf->page = NULL;
8ceee660 130
f7d6f379
SH
131 /* Adjust the SKB for padding and checksum */
132 skb_reserve(rx_buf->skb, NET_IP_ALIGN);
133 rx_buf->len = skb_len - NET_IP_ALIGN;
134 rx_buf->data = (char *)rx_buf->skb->data;
135 rx_buf->skb->ip_summed = CHECKSUM_UNNECESSARY;
136
137 rx_buf->dma_addr = pci_map_single(efx->pci_dev,
138 rx_buf->data, rx_buf->len,
139 PCI_DMA_FROMDEVICE);
140 if (unlikely(pci_dma_mapping_error(efx->pci_dev,
141 rx_buf->dma_addr))) {
142 dev_kfree_skb_any(rx_buf->skb);
143 rx_buf->skb = NULL;
144 return -EIO;
145 }
8ceee660 146
f7d6f379
SH
147 ++rx_queue->added_count;
148 ++rx_queue->alloc_skb_count;
8ceee660
BH
149 }
150
151 return 0;
152}
153
154/**
f7d6f379 155 * efx_init_rx_buffers_page - create EFX_RX_BATCH page-based RX buffers
8ceee660
BH
156 *
157 * @rx_queue: Efx RX queue
8ceee660 158 *
f7d6f379
SH
159 * This allocates memory for EFX_RX_BATCH receive buffers, maps them for DMA,
160 * and populates struct efx_rx_buffers for each one. Return a negative error
161 * code or 0 on success. If a single page can be split between two buffers,
162 * then the page will either be inserted fully, or not at at all.
8ceee660 163 */
f7d6f379 164static int efx_init_rx_buffers_page(struct efx_rx_queue *rx_queue)
8ceee660
BH
165{
166 struct efx_nic *efx = rx_queue->efx;
f7d6f379
SH
167 struct efx_rx_buffer *rx_buf;
168 struct page *page;
62b330ba
SH
169 void *page_addr;
170 struct efx_rx_page_state *state;
f7d6f379
SH
171 dma_addr_t dma_addr;
172 unsigned index, count;
173
174 /* We can split a page between two buffers */
175 BUILD_BUG_ON(EFX_RX_BATCH & 1);
176
177 for (count = 0; count < EFX_RX_BATCH; ++count) {
178 page = alloc_pages(__GFP_COLD | __GFP_COMP | GFP_ATOMIC,
179 efx->rx_buffer_order);
180 if (unlikely(page == NULL))
8ceee660 181 return -ENOMEM;
f7d6f379
SH
182 dma_addr = pci_map_page(efx->pci_dev, page, 0,
183 efx_rx_buf_size(efx),
8ceee660 184 PCI_DMA_FROMDEVICE);
8d8bb39b 185 if (unlikely(pci_dma_mapping_error(efx->pci_dev, dma_addr))) {
f7d6f379 186 __free_pages(page, efx->rx_buffer_order);
8ceee660
BH
187 return -EIO;
188 }
62b330ba
SH
189 page_addr = page_address(page);
190 state = page_addr;
191 state->refcnt = 0;
192 state->dma_addr = dma_addr;
193
194 page_addr += sizeof(struct efx_rx_page_state);
195 dma_addr += sizeof(struct efx_rx_page_state);
f7d6f379
SH
196
197 split:
198 index = rx_queue->added_count & EFX_RXQ_MASK;
199 rx_buf = efx_rx_buffer(rx_queue, index);
62b330ba 200 rx_buf->dma_addr = dma_addr + EFX_PAGE_IP_ALIGN;
f7d6f379
SH
201 rx_buf->skb = NULL;
202 rx_buf->page = page;
62b330ba 203 rx_buf->data = page_addr + EFX_PAGE_IP_ALIGN;
f7d6f379
SH
204 rx_buf->len = efx->rx_buffer_len - EFX_PAGE_IP_ALIGN;
205 ++rx_queue->added_count;
206 ++rx_queue->alloc_page_count;
62b330ba 207 ++state->refcnt;
f7d6f379 208
62b330ba 209 if ((~count & 1) && (efx->rx_buffer_len <= EFX_RX_HALF_PAGE)) {
f7d6f379
SH
210 /* Use the second half of the page */
211 get_page(page);
212 dma_addr += (PAGE_SIZE >> 1);
213 page_addr += (PAGE_SIZE >> 1);
214 ++count;
215 goto split;
8ceee660
BH
216 }
217 }
218
8ceee660
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219 return 0;
220}
221
4d566063
BH
222static void efx_unmap_rx_buffer(struct efx_nic *efx,
223 struct efx_rx_buffer *rx_buf)
8ceee660
BH
224{
225 if (rx_buf->page) {
62b330ba
SH
226 struct efx_rx_page_state *state;
227
8ceee660 228 EFX_BUG_ON_PARANOID(rx_buf->skb);
f7d6f379 229
62b330ba
SH
230 state = page_address(rx_buf->page);
231 if (--state->refcnt == 0) {
f7d6f379 232 pci_unmap_page(efx->pci_dev,
62b330ba 233 state->dma_addr,
55668611
BH
234 efx_rx_buf_size(efx),
235 PCI_DMA_FROMDEVICE);
8ceee660
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236 }
237 } else if (likely(rx_buf->skb)) {
238 pci_unmap_single(efx->pci_dev, rx_buf->dma_addr,
239 rx_buf->len, PCI_DMA_FROMDEVICE);
240 }
241}
242
4d566063
BH
243static void efx_free_rx_buffer(struct efx_nic *efx,
244 struct efx_rx_buffer *rx_buf)
8ceee660
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245{
246 if (rx_buf->page) {
247 __free_pages(rx_buf->page, efx->rx_buffer_order);
248 rx_buf->page = NULL;
249 } else if (likely(rx_buf->skb)) {
250 dev_kfree_skb_any(rx_buf->skb);
251 rx_buf->skb = NULL;
252 }
253}
254
4d566063
BH
255static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
256 struct efx_rx_buffer *rx_buf)
8ceee660
BH
257{
258 efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
259 efx_free_rx_buffer(rx_queue->efx, rx_buf);
260}
261
24455800
SH
262/* Attempt to resurrect the other receive buffer that used to share this page,
263 * which had previously been passed up to the kernel and freed. */
264static void efx_resurrect_rx_buffer(struct efx_rx_queue *rx_queue,
265 struct efx_rx_buffer *rx_buf)
266{
62b330ba 267 struct efx_rx_page_state *state = page_address(rx_buf->page);
24455800 268 struct efx_rx_buffer *new_buf;
62b330ba
SH
269 unsigned fill_level, index;
270
271 /* +1 because efx_rx_packet() incremented removed_count. +1 because
272 * we'd like to insert an additional descriptor whilst leaving
273 * EFX_RXD_HEAD_ROOM for the non-recycle path */
274 fill_level = (rx_queue->added_count - rx_queue->removed_count + 2);
275 if (unlikely(fill_level >= EFX_RXQ_SIZE - EFX_RXD_HEAD_ROOM)) {
276 /* We could place "state" on a list, and drain the list in
277 * efx_fast_push_rx_descriptors(). For now, this will do. */
278 return;
279 }
24455800 280
62b330ba 281 ++state->refcnt;
24455800
SH
282 get_page(rx_buf->page);
283
284 index = rx_queue->added_count & EFX_RXQ_MASK;
285 new_buf = efx_rx_buffer(rx_queue, index);
62b330ba 286 new_buf->dma_addr = rx_buf->dma_addr ^ (PAGE_SIZE >> 1);
24455800
SH
287 new_buf->skb = NULL;
288 new_buf->page = rx_buf->page;
62b330ba
SH
289 new_buf->data = (void *)
290 ((__force unsigned long)rx_buf->data ^ (PAGE_SIZE >> 1));
24455800
SH
291 new_buf->len = rx_buf->len;
292 ++rx_queue->added_count;
293}
294
295/* Recycle the given rx buffer directly back into the rx_queue. There is
296 * always room to add this buffer, because we've just popped a buffer. */
297static void efx_recycle_rx_buffer(struct efx_channel *channel,
298 struct efx_rx_buffer *rx_buf)
299{
300 struct efx_nic *efx = channel->efx;
301 struct efx_rx_queue *rx_queue = &efx->rx_queue[channel->channel];
302 struct efx_rx_buffer *new_buf;
303 unsigned index;
304
62b330ba
SH
305 if (rx_buf->page != NULL && efx->rx_buffer_len <= EFX_RX_HALF_PAGE &&
306 page_count(rx_buf->page) == 1)
307 efx_resurrect_rx_buffer(rx_queue, rx_buf);
24455800
SH
308
309 index = rx_queue->added_count & EFX_RXQ_MASK;
310 new_buf = efx_rx_buffer(rx_queue, index);
311
312 memcpy(new_buf, rx_buf, sizeof(*new_buf));
313 rx_buf->page = NULL;
314 rx_buf->skb = NULL;
315 ++rx_queue->added_count;
316}
317
8ceee660
BH
318/**
319 * efx_fast_push_rx_descriptors - push new RX descriptors quickly
320 * @rx_queue: RX descriptor queue
8ceee660
BH
321 * This will aim to fill the RX descriptor queue up to
322 * @rx_queue->@fast_fill_limit. If there is insufficient atomic
90d683af
SH
323 * memory to do so, a slow fill will be scheduled.
324 *
325 * The caller must provide serialisation (none is used here). In practise,
326 * this means this function must run from the NAPI handler, or be called
327 * when NAPI is disabled.
8ceee660 328 */
90d683af 329void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue)
8ceee660 330{
f7d6f379
SH
331 struct efx_channel *channel = rx_queue->channel;
332 unsigned fill_level;
333 int space, rc = 0;
8ceee660 334
90d683af 335 /* Calculate current fill level, and exit if we don't need to fill */
8ceee660 336 fill_level = (rx_queue->added_count - rx_queue->removed_count);
3ffeabdd 337 EFX_BUG_ON_PARANOID(fill_level > EFX_RXQ_SIZE);
8ceee660 338 if (fill_level >= rx_queue->fast_fill_trigger)
24455800 339 goto out;
8ceee660
BH
340
341 /* Record minimum fill level */
b3475645 342 if (unlikely(fill_level < rx_queue->min_fill)) {
8ceee660
BH
343 if (fill_level)
344 rx_queue->min_fill = fill_level;
b3475645 345 }
8ceee660 346
8ceee660
BH
347 space = rx_queue->fast_fill_limit - fill_level;
348 if (space < EFX_RX_BATCH)
24455800 349 goto out;
8ceee660 350
62776d03
BH
351 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
352 "RX queue %d fast-filling descriptor ring from"
353 " level %d to level %d using %s allocation\n",
354 rx_queue->queue, fill_level, rx_queue->fast_fill_limit,
355 channel->rx_alloc_push_pages ? "page" : "skb");
8ceee660
BH
356
357 do {
f7d6f379
SH
358 if (channel->rx_alloc_push_pages)
359 rc = efx_init_rx_buffers_page(rx_queue);
360 else
361 rc = efx_init_rx_buffers_skb(rx_queue);
362 if (unlikely(rc)) {
363 /* Ensure that we don't leave the rx queue empty */
364 if (rx_queue->added_count == rx_queue->removed_count)
365 efx_schedule_slow_fill(rx_queue);
366 goto out;
8ceee660
BH
367 }
368 } while ((space -= EFX_RX_BATCH) >= EFX_RX_BATCH);
369
62776d03
BH
370 netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
371 "RX queue %d fast-filled descriptor ring "
372 "to level %d\n", rx_queue->queue,
373 rx_queue->added_count - rx_queue->removed_count);
8ceee660
BH
374
375 out:
24455800
SH
376 if (rx_queue->notified_count != rx_queue->added_count)
377 efx_nic_notify_rx_desc(rx_queue);
8ceee660
BH
378}
379
90d683af 380void efx_rx_slow_fill(unsigned long context)
8ceee660 381{
90d683af
SH
382 struct efx_rx_queue *rx_queue = (struct efx_rx_queue *)context;
383 struct efx_channel *channel = rx_queue->channel;
8ceee660 384
90d683af
SH
385 /* Post an event to cause NAPI to run and refill the queue */
386 efx_nic_generate_fill_event(channel);
8ceee660 387 ++rx_queue->slow_fill_count;
8ceee660
BH
388}
389
4d566063
BH
390static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue,
391 struct efx_rx_buffer *rx_buf,
392 int len, bool *discard,
393 bool *leak_packet)
8ceee660
BH
394{
395 struct efx_nic *efx = rx_queue->efx;
396 unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding;
397
398 if (likely(len <= max_len))
399 return;
400
401 /* The packet must be discarded, but this is only a fatal error
402 * if the caller indicated it was
403 */
dc8cfa55 404 *discard = true;
8ceee660
BH
405
406 if ((len > rx_buf->len) && EFX_WORKAROUND_8071(efx)) {
62776d03
BH
407 if (net_ratelimit())
408 netif_err(efx, rx_err, efx->net_dev,
409 " RX queue %d seriously overlength "
410 "RX event (0x%x > 0x%x+0x%x). Leaking\n",
411 rx_queue->queue, len, max_len,
412 efx->type->rx_buffer_padding);
8ceee660
BH
413 /* If this buffer was skb-allocated, then the meta
414 * data at the end of the skb will be trashed. So
415 * we have no choice but to leak the fragment.
416 */
417 *leak_packet = (rx_buf->skb != NULL);
418 efx_schedule_reset(efx, RESET_TYPE_RX_RECOVERY);
419 } else {
62776d03
BH
420 if (net_ratelimit())
421 netif_err(efx, rx_err, efx->net_dev,
422 " RX queue %d overlength RX event "
423 "(0x%x > 0x%x)\n",
424 rx_queue->queue, len, max_len);
8ceee660
BH
425 }
426
427 rx_queue->channel->n_rx_overlength++;
428}
429
430/* Pass a received packet up through the generic LRO stack
431 *
432 * Handles driverlink veto, and passes the fragment up via
433 * the appropriate LRO method
434 */
4d566063 435static void efx_rx_packet_lro(struct efx_channel *channel,
345056af
BH
436 struct efx_rx_buffer *rx_buf,
437 bool checksummed)
8ceee660 438{
da3bc071 439 struct napi_struct *napi = &channel->napi_str;
18e1d2be 440 gro_result_t gro_result;
8ceee660
BH
441
442 /* Pass the skb/page into the LRO engine */
443 if (rx_buf->page) {
1241e951
BH
444 struct page *page = rx_buf->page;
445 struct sk_buff *skb;
8ceee660 446
1241e951
BH
447 EFX_BUG_ON_PARANOID(rx_buf->skb);
448 rx_buf->page = NULL;
449
450 skb = napi_get_frags(napi);
76620aaf 451 if (!skb) {
1241e951
BH
452 put_page(page);
453 return;
76620aaf
HX
454 }
455
1241e951 456 skb_shinfo(skb)->frags[0].page = page;
76620aaf
HX
457 skb_shinfo(skb)->frags[0].page_offset =
458 efx_rx_buf_offset(rx_buf);
459 skb_shinfo(skb)->frags[0].size = rx_buf->len;
460 skb_shinfo(skb)->nr_frags = 1;
461
462 skb->len = rx_buf->len;
463 skb->data_len = rx_buf->len;
464 skb->truesize += rx_buf->len;
345056af
BH
465 skb->ip_summed =
466 checksummed ? CHECKSUM_UNNECESSARY : CHECKSUM_NONE;
8ceee660 467
3eadb7b0
BH
468 skb_record_rx_queue(skb, channel->channel);
469
18e1d2be 470 gro_result = napi_gro_frags(napi);
8ceee660 471 } else {
1241e951 472 struct sk_buff *skb = rx_buf->skb;
8ceee660 473
1241e951
BH
474 EFX_BUG_ON_PARANOID(!skb);
475 EFX_BUG_ON_PARANOID(!checksummed);
8ceee660 476 rx_buf->skb = NULL;
1241e951
BH
477
478 gro_result = napi_gro_receive(napi, skb);
8ceee660 479 }
18e1d2be
BH
480
481 if (gro_result == GRO_NORMAL) {
482 channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
483 } else if (gro_result != GRO_DROP) {
484 channel->rx_alloc_level += RX_ALLOC_FACTOR_LRO;
485 channel->irq_mod_score += 2;
486 }
8ceee660
BH
487}
488
8ceee660 489void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
dc8cfa55 490 unsigned int len, bool checksummed, bool discard)
8ceee660
BH
491{
492 struct efx_nic *efx = rx_queue->efx;
24455800 493 struct efx_channel *channel = rx_queue->channel;
8ceee660 494 struct efx_rx_buffer *rx_buf;
dc8cfa55 495 bool leak_packet = false;
8ceee660
BH
496
497 rx_buf = efx_rx_buffer(rx_queue, index);
498 EFX_BUG_ON_PARANOID(!rx_buf->data);
499 EFX_BUG_ON_PARANOID(rx_buf->skb && rx_buf->page);
500 EFX_BUG_ON_PARANOID(!(rx_buf->skb || rx_buf->page));
501
502 /* This allows the refill path to post another buffer.
503 * EFX_RXD_HEAD_ROOM ensures that the slot we are using
504 * isn't overwritten yet.
505 */
506 rx_queue->removed_count++;
507
508 /* Validate the length encoded in the event vs the descriptor pushed */
509 efx_rx_packet__check_len(rx_queue, rx_buf, len,
510 &discard, &leak_packet);
511
62776d03
BH
512 netif_vdbg(efx, rx_status, efx->net_dev,
513 "RX queue %d received id %x at %llx+%x %s%s\n",
514 rx_queue->queue, index,
515 (unsigned long long)rx_buf->dma_addr, len,
516 (checksummed ? " [SUMMED]" : ""),
517 (discard ? " [DISCARD]" : ""));
8ceee660
BH
518
519 /* Discard packet, if instructed to do so */
520 if (unlikely(discard)) {
521 if (unlikely(leak_packet))
24455800 522 channel->n_skbuff_leaks++;
8ceee660 523 else
24455800
SH
524 efx_recycle_rx_buffer(channel, rx_buf);
525
526 /* Don't hold off the previous receive */
527 rx_buf = NULL;
528 goto out;
8ceee660
BH
529 }
530
531 /* Release card resources - assumes all RX buffers consumed in-order
532 * per RX queue
533 */
534 efx_unmap_rx_buffer(efx, rx_buf);
535
536 /* Prefetch nice and early so data will (hopefully) be in cache by
537 * the time we look at it.
538 */
539 prefetch(rx_buf->data);
540
541 /* Pipeline receives so that we give time for packet headers to be
542 * prefetched into cache.
543 */
544 rx_buf->len = len;
24455800 545out:
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546 if (rx_queue->channel->rx_pkt)
547 __efx_rx_packet(rx_queue->channel,
548 rx_queue->channel->rx_pkt,
549 rx_queue->channel->rx_pkt_csummed);
550 rx_queue->channel->rx_pkt = rx_buf;
551 rx_queue->channel->rx_pkt_csummed = checksummed;
552}
553
554/* Handle a received packet. Second half: Touches packet payload. */
555void __efx_rx_packet(struct efx_channel *channel,
dc8cfa55 556 struct efx_rx_buffer *rx_buf, bool checksummed)
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557{
558 struct efx_nic *efx = channel->efx;
559 struct sk_buff *skb;
8ceee660 560
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561 /* If we're in loopback test, then pass the packet directly to the
562 * loopback layer, and free the rx_buf here
563 */
564 if (unlikely(efx->loopback_selftest)) {
565 efx_loopback_rx_packet(efx, rx_buf->data, rx_buf->len);
566 efx_free_rx_buffer(efx, rx_buf);
d96d7dc9 567 return;
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568 }
569
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570 if (rx_buf->skb) {
571 prefetch(skb_shinfo(rx_buf->skb));
572
573 skb_put(rx_buf->skb, rx_buf->len);
574
575 /* Move past the ethernet header. rx_buf->data still points
576 * at the ethernet header */
577 rx_buf->skb->protocol = eth_type_trans(rx_buf->skb,
578 efx->net_dev);
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579
580 skb_record_rx_queue(rx_buf->skb, channel->channel);
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581 }
582
da3bc071 583 if (likely(checksummed || rx_buf->page)) {
345056af 584 efx_rx_packet_lro(channel, rx_buf, checksummed);
d96d7dc9 585 return;
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586 }
587
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588 /* We now own the SKB */
589 skb = rx_buf->skb;
590 rx_buf->skb = NULL;
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591 EFX_BUG_ON_PARANOID(!skb);
592
593 /* Set the SKB flags */
da3bc071 594 skb->ip_summed = CHECKSUM_NONE;
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595
596 /* Pass the packet up */
597 netif_receive_skb(skb);
598
599 /* Update allocation strategy method */
600 channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
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601}
602
603void efx_rx_strategy(struct efx_channel *channel)
604{
605 enum efx_rx_alloc_method method = rx_alloc_method;
606
607 /* Only makes sense to use page based allocation if LRO is enabled */
da3bc071 608 if (!(channel->efx->net_dev->features & NETIF_F_GRO)) {
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609 method = RX_ALLOC_METHOD_SKB;
610 } else if (method == RX_ALLOC_METHOD_AUTO) {
611 /* Constrain the rx_alloc_level */
612 if (channel->rx_alloc_level < 0)
613 channel->rx_alloc_level = 0;
614 else if (channel->rx_alloc_level > RX_ALLOC_LEVEL_MAX)
615 channel->rx_alloc_level = RX_ALLOC_LEVEL_MAX;
616
617 /* Decide on the allocation method */
618 method = ((channel->rx_alloc_level > RX_ALLOC_LEVEL_LRO) ?
619 RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB);
620 }
621
622 /* Push the option */
623 channel->rx_alloc_push_pages = (method == RX_ALLOC_METHOD_PAGE);
624}
625
626int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
627{
628 struct efx_nic *efx = rx_queue->efx;
629 unsigned int rxq_size;
630 int rc;
631
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632 netif_dbg(efx, probe, efx->net_dev,
633 "creating RX queue %d\n", rx_queue->queue);
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634
635 /* Allocate RX buffers */
3ffeabdd 636 rxq_size = EFX_RXQ_SIZE * sizeof(*rx_queue->buffer);
8ceee660 637 rx_queue->buffer = kzalloc(rxq_size, GFP_KERNEL);
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638 if (!rx_queue->buffer)
639 return -ENOMEM;
8ceee660 640
152b6a62 641 rc = efx_nic_probe_rx(rx_queue);
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642 if (rc) {
643 kfree(rx_queue->buffer);
644 rx_queue->buffer = NULL;
645 }
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646 return rc;
647}
648
bc3c90a2 649void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
8ceee660 650{
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651 unsigned int max_fill, trigger, limit;
652
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653 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
654 "initialising RX queue %d\n", rx_queue->queue);
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655
656 /* Initialise ptr fields */
657 rx_queue->added_count = 0;
658 rx_queue->notified_count = 0;
659 rx_queue->removed_count = 0;
660 rx_queue->min_fill = -1U;
661 rx_queue->min_overfill = -1U;
662
663 /* Initialise limit fields */
3ffeabdd 664 max_fill = EFX_RXQ_SIZE - EFX_RXD_HEAD_ROOM;
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665 trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
666 limit = max_fill * min(rx_refill_limit, 100U) / 100U;
667
668 rx_queue->max_fill = max_fill;
669 rx_queue->fast_fill_trigger = trigger;
670 rx_queue->fast_fill_limit = limit;
671
672 /* Set up RX descriptor ring */
152b6a62 673 efx_nic_init_rx(rx_queue);
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674}
675
676void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
677{
678 int i;
679 struct efx_rx_buffer *rx_buf;
680
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681 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
682 "shutting down RX queue %d\n", rx_queue->queue);
8ceee660 683
90d683af 684 del_timer_sync(&rx_queue->slow_fill);
152b6a62 685 efx_nic_fini_rx(rx_queue);
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686
687 /* Release RX buffers NB start at index 0 not current HW ptr */
688 if (rx_queue->buffer) {
3ffeabdd 689 for (i = 0; i <= EFX_RXQ_MASK; i++) {
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690 rx_buf = efx_rx_buffer(rx_queue, i);
691 efx_fini_rx_buffer(rx_queue, rx_buf);
692 }
693 }
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694}
695
696void efx_remove_rx_queue(struct efx_rx_queue *rx_queue)
697{
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698 netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
699 "destroying RX queue %d\n", rx_queue->queue);
8ceee660 700
152b6a62 701 efx_nic_remove_rx(rx_queue);
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702
703 kfree(rx_queue->buffer);
704 rx_queue->buffer = NULL;
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705}
706
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707
708module_param(rx_alloc_method, int, 0644);
709MODULE_PARM_DESC(rx_alloc_method, "Allocation method used for RX buffers");
710
711module_param(rx_refill_threshold, uint, 0444);
712MODULE_PARM_DESC(rx_refill_threshold,
713 "RX descriptor ring fast/slow fill threshold (%)");
714