[net-next-2.6.git] / drivers / net / sfc / mdio_10g.c

/****************************************************************************
 * Driver for Solarflare Solarstorm network controllers and boards
 * Copyright 2006-2008 Solarflare Communications Inc.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms of the GNU General Public License version 2 as published
 * by the Free Software Foundation, incorporated herein by reference.
 */
/*
 * Useful functions for working with MDIO clause 45 PHYs
 */
#include <linux/types.h>
#include <linux/ethtool.h>
#include <linux/delay.h>
#include "net_driver.h"
#include "mdio_10g.h"
#include "workarounds.h"
#include "falcon.h"

unsigned efx_mdio_id_oui(u32 id)
{
	unsigned oui = 0;
	int i;

	/* The bits of the OUI are designated a..x, with a=0 and b variable.
	 * In the id register c is the MSB but the OUI is conventionally
	 * written as bytes h..a, p..i, x..q.  Reorder the bits accordingly. */
	for (i = 0; i < 22; ++i)
		if (id & (1 << (i + 10)))
			oui |= 1 << (i ^ 7);

	return oui;
}

int efx_mdio_reset_mmd(struct efx_nic *port, int mmd,
			    int spins, int spintime)
{
	u32 ctrl;

	/* Catch callers passing values in the wrong units (or just silly) */
	EFX_BUG_ON_PARANOID(spins * spintime >= 5000);

	efx_mdio_write(port, mmd, MDIO_CTRL1, MDIO_CTRL1_RESET);
	/* Wait for the reset bit to clear. */
	do {
		msleep(spintime);
		ctrl = efx_mdio_read(port, mmd, MDIO_CTRL1);
		spins--;

	} while (spins && (ctrl & MDIO_CTRL1_RESET));

	return spins ? spins : -ETIMEDOUT;
}

static int efx_mdio_check_mmd(struct efx_nic *efx, int mmd, int fault_fatal)
{
	int status;

	if (LOOPBACK_INTERNAL(efx))
		return 0;

	if (mmd != MDIO_MMD_AN) {
		/* Read MMD STATUS2 to check it is responding. */
		status = efx_mdio_read(efx, mmd, MDIO_STAT2);
		if ((status & MDIO_STAT2_DEVPRST) != MDIO_STAT2_DEVPRST_VAL) {
			EFX_ERR(efx, "PHY MMD %d not responding.\n", mmd);
			return -EIO;
		}
	}

	/* Read MMD STATUS 1 to check for fault. */
	status = efx_mdio_read(efx, mmd, MDIO_STAT1);
	if (status & MDIO_STAT1_FAULT) {
		if (fault_fatal) {
			EFX_ERR(efx, "PHY MMD %d reporting fatal"
				" fault: status %x\n", mmd, status);
			return -EIO;
		} else {
			EFX_LOG(efx, "PHY MMD %d reporting status"
				" %x (expected)\n", mmd, status);
		}
	}
	return 0;
}

/* This ought to be ridiculous overkill. We expect it to fail rarely */
#define MDIO45_RESET_TIME	1000 /* ms */
#define MDIO45_RESET_ITERS	100

int efx_mdio_wait_reset_mmds(struct efx_nic *efx, unsigned int mmd_mask)
{
	const int spintime = MDIO45_RESET_TIME / MDIO45_RESET_ITERS;
	int tries = MDIO45_RESET_ITERS;
	int rc = 0;
	int in_reset;

	while (tries) {
		int mask = mmd_mask;
		int mmd = 0;
		int stat;
		in_reset = 0;
		while (mask) {
			if (mask & 1) {
				stat = efx_mdio_read(efx, mmd, MDIO_CTRL1);
				if (stat < 0) {
					EFX_ERR(efx, "failed to read status of"
						" MMD %d\n", mmd);
					return -EIO;
				}
				if (stat & MDIO_CTRL1_RESET)
					in_reset |= (1 << mmd);
			}
			mask = mask >> 1;
			mmd++;
		}
		if (!in_reset)
			break;
		tries--;
		msleep(spintime);
	}
	if (in_reset != 0) {
		EFX_ERR(efx, "not all MMDs came out of reset in time."
			" MMDs still in reset: %x\n", in_reset);
		rc = -ETIMEDOUT;
	}
	return rc;
}

int efx_mdio_check_mmds(struct efx_nic *efx,
			unsigned int mmd_mask, unsigned int fatal_mask)
{
	int mmd = 0, probe_mmd, devs1, devs2;
	u32 devices;

	/* Historically we have probed the PHYXS to find out what devices are
	 * present,but that doesn't work so well if the PHYXS isn't expected
	 * to exist, if so just find the first item in the list supplied. */
	probe_mmd = (mmd_mask & MDIO_DEVS_PHYXS) ? MDIO_MMD_PHYXS :
	    __ffs(mmd_mask);

	/* Check all the expected MMDs are present */
	devs1 = efx_mdio_read(efx, probe_mmd, MDIO_DEVS1);
	devs2 = efx_mdio_read(efx, probe_mmd, MDIO_DEVS2);
	if (devs1 < 0 || devs2 < 0) {
		EFX_ERR(efx, "failed to read devices present\n");
		return -EIO;
	}
	devices = devs1 | (devs2 << 16);
	if ((devices & mmd_mask) != mmd_mask) {
		EFX_ERR(efx, "required MMDs not present: got %x, "
			"wanted %x\n", devices, mmd_mask);
		return -ENODEV;
	}
	EFX_TRACE(efx, "Devices present: %x\n", devices);

	/* Check all required MMDs are responding and happy. */
	while (mmd_mask) {
		if (mmd_mask & 1) {
			int fault_fatal = fatal_mask & 1;
			if (efx_mdio_check_mmd(efx, mmd, fault_fatal))
				return -EIO;
		}
		mmd_mask = mmd_mask >> 1;
		fatal_mask = fatal_mask >> 1;
		mmd++;
	}

	return 0;
}

bool efx_mdio_links_ok(struct efx_nic *efx, unsigned int mmd_mask)
{
	/* If the port is in loopback, then we should only consider a subset
	 * of mmd's */
	if (LOOPBACK_INTERNAL(efx))
		return true;
	else if (LOOPBACK_MASK(efx) & LOOPBACKS_WS)
		return false;
	else if (efx_phy_mode_disabled(efx->phy_mode))
		return false;
	else if (efx->loopback_mode == LOOPBACK_PHYXS)
		mmd_mask &= ~(MDIO_DEVS_PHYXS |
			      MDIO_DEVS_PCS |
			      MDIO_DEVS_PMAPMD |
			      MDIO_DEVS_AN);
	else if (efx->loopback_mode == LOOPBACK_PCS)
		mmd_mask &= ~(MDIO_DEVS_PCS |
			      MDIO_DEVS_PMAPMD |
			      MDIO_DEVS_AN);
	else if (efx->loopback_mode == LOOPBACK_PMAPMD)
		mmd_mask &= ~(MDIO_DEVS_PMAPMD |
			      MDIO_DEVS_AN);

	return mdio45_links_ok(&efx->mdio, mmd_mask);
}

void efx_mdio_transmit_disable(struct efx_nic *efx)
{
	efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD,
			  MDIO_PMA_TXDIS, MDIO_PMD_TXDIS_GLOBAL,
			  efx->phy_mode & PHY_MODE_TX_DISABLED);
}

void efx_mdio_phy_reconfigure(struct efx_nic *efx)
{
	efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD,
			  MDIO_CTRL1, MDIO_PMA_CTRL1_LOOPBACK,
			  efx->loopback_mode == LOOPBACK_PMAPMD);
	efx_mdio_set_flag(efx, MDIO_MMD_PCS,
			  MDIO_CTRL1, MDIO_PCS_CTRL1_LOOPBACK,
			  efx->loopback_mode == LOOPBACK_PCS);
	efx_mdio_set_flag(efx, MDIO_MMD_PHYXS,
			  MDIO_CTRL1, MDIO_PHYXS_CTRL1_LOOPBACK,
			  efx->loopback_mode == LOOPBACK_PHYXS_WS);
}

static void efx_mdio_set_mmd_lpower(struct efx_nic *efx,
				    int lpower, int mmd)
{
	int stat = efx_mdio_read(efx, mmd, MDIO_STAT1);

	EFX_TRACE(efx, "Setting low power mode for MMD %d to %d\n",
		  mmd, lpower);

	if (stat & MDIO_STAT1_LPOWERABLE) {
		efx_mdio_set_flag(efx, mmd, MDIO_CTRL1,
				  MDIO_CTRL1_LPOWER, lpower);
	}
}

void efx_mdio_set_mmds_lpower(struct efx_nic *efx,
			      int low_power, unsigned int mmd_mask)
{
	int mmd = 0;
	mmd_mask &= ~MDIO_DEVS_AN;
	while (mmd_mask) {
		if (mmd_mask & 1)
			efx_mdio_set_mmd_lpower(efx, low_power, mmd);
		mmd_mask = (mmd_mask >> 1);
		mmd++;
	}
}

/**
 * efx_mdio_set_settings - Set (some of) the PHY settings over MDIO.
 * @efx:		Efx NIC
 * @ecmd: 		New settings
 */
int efx_mdio_set_settings(struct efx_nic *efx, struct ethtool_cmd *ecmd)
{
	struct ethtool_cmd prev;

	efx->phy_op->get_settings(efx, &prev);

	if (ecmd->advertising == prev.advertising &&
	    ecmd->speed == prev.speed &&
	    ecmd->duplex == prev.duplex &&
	    ecmd->port == prev.port &&
	    ecmd->autoneg == prev.autoneg)
		return 0;

	/* We can only change these settings for -T PHYs */
	if (prev.port != PORT_TP || ecmd->port != PORT_TP)
		return -EINVAL;

	/* Check that PHY supports these settings */
	if (!ecmd->autoneg ||
	    (ecmd->advertising | SUPPORTED_Autoneg) & ~prev.supported)
		return -EINVAL;

	efx_link_set_advertising(efx, ecmd->advertising | ADVERTISED_Autoneg);
	efx_mdio_an_reconfigure(efx);
	return 0;
}

/**
 * efx_mdio_an_reconfigure - Push advertising flags and restart autonegotiation
 * @efx:		Efx NIC
 */
void efx_mdio_an_reconfigure(struct efx_nic *efx)
{
	bool xnp = (efx->link_advertising & ADVERTISED_10000baseT_Full
		    || EFX_WORKAROUND_13204(efx));
	int reg;

	WARN_ON(!(efx->mdio.mmds & MDIO_DEVS_AN));

	/* Set up the base page */
	reg = ADVERTISE_CSMA;
	if (efx->link_advertising & ADVERTISED_10baseT_Half)
		reg |= ADVERTISE_10HALF;
	if (efx->link_advertising & ADVERTISED_10baseT_Full)
		reg |= ADVERTISE_10FULL;
	if (efx->link_advertising & ADVERTISED_100baseT_Half)
		reg |= ADVERTISE_100HALF;
	if (efx->link_advertising & ADVERTISED_100baseT_Full)
		reg |= ADVERTISE_100FULL;
	if (xnp)
		reg |= ADVERTISE_RESV;
	else if (efx->link_advertising & (ADVERTISED_1000baseT_Half |
					  ADVERTISED_1000baseT_Full))
		reg |= ADVERTISE_NPAGE;
	if (efx->link_advertising & ADVERTISED_Pause)
		reg |= ADVERTISE_PAUSE_CAP;
	if (efx->link_advertising & ADVERTISED_Asym_Pause)
		reg |= ADVERTISE_PAUSE_ASYM;
	efx_mdio_write(efx, MDIO_MMD_AN, MDIO_AN_ADVERTISE, reg);

	/* Set up the (extended) next page if necessary */
	if (efx->phy_op->set_npage_adv)
		efx->phy_op->set_npage_adv(efx, efx->link_advertising);

	/* Enable and restart AN */
	reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_CTRL1);
	reg |= MDIO_AN_CTRL1_ENABLE;
	if (!(EFX_WORKAROUND_15195(efx) && LOOPBACK_EXTERNAL(efx)))
		reg |= MDIO_AN_CTRL1_RESTART;
	if (xnp)
		reg |= MDIO_AN_CTRL1_XNP;
	else
		reg &= ~MDIO_AN_CTRL1_XNP;
	efx_mdio_write(efx, MDIO_MMD_AN, MDIO_CTRL1, reg);
}

enum efx_fc_type efx_mdio_get_pause(struct efx_nic *efx)
{
	BUILD_BUG_ON(EFX_FC_AUTO & (EFX_FC_RX | EFX_FC_TX));

	if (!(efx->wanted_fc & EFX_FC_AUTO))
		return efx->wanted_fc;

	WARN_ON(!(efx->mdio.mmds & MDIO_DEVS_AN));

	return mii_resolve_flowctrl_fdx(
		mii_advertise_flowctrl(efx->wanted_fc),
		efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_LPA));
}
Commit	Line	Data
8ceee660 BH	1	/****************************************************************************
	2	* Driver for Solarflare Solarstorm network controllers and boards
	3	* Copyright 2006-2008 Solarflare Communications Inc.
	4	*
	5	* This program is free software; you can redistribute it and/or modify it
	6	* under the terms of the GNU General Public License version 2 as published
	7	* by the Free Software Foundation, incorporated herein by reference.
	8	*/
	9	/*
	10	* Useful functions for working with MDIO clause 45 PHYs
	11	*/
	12	#include <linux/types.h>
	13	#include <linux/ethtool.h>
	14	#include <linux/delay.h>
	15	#include "net_driver.h"
	16	#include "mdio_10g.h"
8b9dc8dd	17	#include "workarounds.h"
c1c4f453	18	#include "falcon.h"
8ceee660	19
68e7f45e	20	unsigned efx_mdio_id_oui(u32 id)
3f39a5e9 BH	21	{
	22	unsigned oui = 0;
	23	int i;
	24
	25	/* The bits of the OUI are designated a..x, with a=0 and b variable.
	26	* In the id register c is the MSB but the OUI is conventionally
	27	* written as bytes h..a, p..i, x..q. Reorder the bits accordingly. */
	28	for (i = 0; i < 22; ++i)
	29	if (id & (1 << (i + 10)))
	30	oui \|= 1 << (i ^ 7);
	31
	32	return oui;
	33	}
	34
68e7f45e	35	int efx_mdio_reset_mmd(struct efx_nic *port, int mmd,
8ceee660 BH	36	int spins, int spintime)
	37	{
	38	u32 ctrl;
8ceee660 BH	39
	40	/* Catch callers passing values in the wrong units (or just silly) */
	41	EFX_BUG_ON_PARANOID(spins * spintime >= 5000);
	42
68e7f45e	43	efx_mdio_write(port, mmd, MDIO_CTRL1, MDIO_CTRL1_RESET);
8ceee660 BH	44	/* Wait for the reset bit to clear. */
	45	do {
	46	msleep(spintime);
68e7f45e	47	ctrl = efx_mdio_read(port, mmd, MDIO_CTRL1);
8ceee660 BH	48	spins--;
8ceee660 BH	49
68e7f45e	50	} while (spins && (ctrl & MDIO_CTRL1_RESET));
8ceee660 BH	51
	52	return spins ? spins : -ETIMEDOUT;
	53	}
	54
68e7f45e	55	static int efx_mdio_check_mmd(struct efx_nic *efx, int mmd, int fault_fatal)
8ceee660 BH	56	{
8ceee660 BH	57	int status;
8ceee660	58
3273c2e8 BH	59	if (LOOPBACK_INTERNAL(efx))
	60	return 0;
	61
04cc8cac BH	62	if (mmd != MDIO_MMD_AN) {
04cc8cac BH	63	/* Read MMD STATUS2 to check it is responding. */
68e7f45e BH	64	status = efx_mdio_read(efx, mmd, MDIO_STAT2);
68e7f45e BH	65	if ((status & MDIO_STAT2_DEVPRST) != MDIO_STAT2_DEVPRST_VAL) {
04cc8cac BH	66	EFX_ERR(efx, "PHY MMD %d not responding.\n", mmd);
	67	return -EIO;
	68	}
8ceee660 BH	69	}
	70
	71	/* Read MMD STATUS 1 to check for fault. */
68e7f45e BH	72	status = efx_mdio_read(efx, mmd, MDIO_STAT1);
68e7f45e BH	73	if (status & MDIO_STAT1_FAULT) {
8ceee660 BH	74	if (fault_fatal) {
	75	EFX_ERR(efx, "PHY MMD %d reporting fatal"
	76	" fault: status %x\n", mmd, status);
	77	return -EIO;
	78	} else {
	79	EFX_LOG(efx, "PHY MMD %d reporting status"
	80	" %x (expected)\n", mmd, status);
	81	}
	82	}
	83	return 0;
	84	}
	85
	86	/* This ought to be ridiculous overkill. We expect it to fail rarely */
	87	#define MDIO45_RESET_TIME 1000 /* ms */
	88	#define MDIO45_RESET_ITERS 100
	89
68e7f45e	90	int efx_mdio_wait_reset_mmds(struct efx_nic *efx, unsigned int mmd_mask)
8ceee660 BH	91	{
	92	const int spintime = MDIO45_RESET_TIME / MDIO45_RESET_ITERS;
	93	int tries = MDIO45_RESET_ITERS;
	94	int rc = 0;
	95	int in_reset;
	96
	97	while (tries) {
	98	int mask = mmd_mask;
	99	int mmd = 0;
	100	int stat;
	101	in_reset = 0;
	102	while (mask) {
	103	if (mask & 1) {
68e7f45e	104	stat = efx_mdio_read(efx, mmd, MDIO_CTRL1);
8ceee660 BH	105	if (stat < 0) {
	106	EFX_ERR(efx, "failed to read status of"
	107	" MMD %d\n", mmd);
	108	return -EIO;
	109	}
68e7f45e	110	if (stat & MDIO_CTRL1_RESET)
8ceee660 BH	111	in_reset \|= (1 << mmd);
	112	}
	113	mask = mask >> 1;
	114	mmd++;
	115	}
	116	if (!in_reset)
	117	break;
	118	tries--;
	119	msleep(spintime);
	120	}
	121	if (in_reset != 0) {
	122	EFX_ERR(efx, "not all MMDs came out of reset in time."
	123	" MMDs still in reset: %x\n", in_reset);
	124	rc = -ETIMEDOUT;
	125	}
	126	return rc;
	127	}
	128
68e7f45e BH	129	int efx_mdio_check_mmds(struct efx_nic *efx,
68e7f45e BH	130	unsigned int mmd_mask, unsigned int fatal_mask)
8ceee660	131	{
68e7f45e	132	int mmd = 0, probe_mmd, devs1, devs2;
27dd2cac	133	u32 devices;
8ceee660 BH	134
	135	/* Historically we have probed the PHYXS to find out what devices are
	136	* present,but that doesn't work so well if the PHYXS isn't expected
	137	* to exist, if so just find the first item in the list supplied. */
68e7f45e	138	probe_mmd = (mmd_mask & MDIO_DEVS_PHYXS) ? MDIO_MMD_PHYXS :
8ceee660	139	__ffs(mmd_mask);
8ceee660 BH	140
8ceee660 BH	141	/* Check all the expected MMDs are present */
68e7f45e BH	142	devs1 = efx_mdio_read(efx, probe_mmd, MDIO_DEVS1);
	143	devs2 = efx_mdio_read(efx, probe_mmd, MDIO_DEVS2);
	144	if (devs1 < 0 \|\| devs2 < 0) {
8ceee660 BH	145	EFX_ERR(efx, "failed to read devices present\n");
	146	return -EIO;
	147	}
68e7f45e	148	devices = devs1 \| (devs2 << 16);
8ceee660 BH	149	if ((devices & mmd_mask) != mmd_mask) {
	150	EFX_ERR(efx, "required MMDs not present: got %x, "
	151	"wanted %x\n", devices, mmd_mask);
	152	return -ENODEV;
	153	}
	154	EFX_TRACE(efx, "Devices present: %x\n", devices);
	155
	156	/* Check all required MMDs are responding and happy. */
	157	while (mmd_mask) {
	158	if (mmd_mask & 1) {
	159	int fault_fatal = fatal_mask & 1;
68e7f45e	160	if (efx_mdio_check_mmd(efx, mmd, fault_fatal))
8ceee660 BH	161	return -EIO;
	162	}
	163	mmd_mask = mmd_mask >> 1;
	164	fatal_mask = fatal_mask >> 1;
	165	mmd++;
	166	}
	167
	168	return 0;
	169	}
	170
68e7f45e	171	bool efx_mdio_links_ok(struct efx_nic *efx, unsigned int mmd_mask)
8ceee660	172	{
3273c2e8 BH	173	/* If the port is in loopback, then we should only consider a subset
	174	* of mmd's */
	175	if (LOOPBACK_INTERNAL(efx))
dc8cfa55	176	return true;
e58f69f4	177	else if (LOOPBACK_MASK(efx) & LOOPBACKS_WS)
dc8cfa55	178	return false;
f8b87c17 BH	179	else if (efx_phy_mode_disabled(efx->phy_mode))
f8b87c17 BH	180	return false;
67797763	181	else if (efx->loopback_mode == LOOPBACK_PHYXS)
68e7f45e BH	182	mmd_mask &= ~(MDIO_DEVS_PHYXS \|
	183	MDIO_DEVS_PCS \|
	184	MDIO_DEVS_PMAPMD \|
	185	MDIO_DEVS_AN);
67797763	186	else if (efx->loopback_mode == LOOPBACK_PCS)
68e7f45e BH	187	mmd_mask &= ~(MDIO_DEVS_PCS \|
	188	MDIO_DEVS_PMAPMD \|
	189	MDIO_DEVS_AN);
3273c2e8	190	else if (efx->loopback_mode == LOOPBACK_PMAPMD)
68e7f45e BH	191	mmd_mask &= ~(MDIO_DEVS_PMAPMD \|
68e7f45e BH	192	MDIO_DEVS_AN);
67797763	193
68e7f45e	194	return mdio45_links_ok(&efx->mdio, mmd_mask);
8ceee660 BH	195	}
8ceee660 BH	196
68e7f45e	197	void efx_mdio_transmit_disable(struct efx_nic *efx)
3273c2e8	198	{
68e7f45e BH	199	efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD,
	200	MDIO_PMA_TXDIS, MDIO_PMD_TXDIS_GLOBAL,
	201	efx->phy_mode & PHY_MODE_TX_DISABLED);
3273c2e8 BH	202	}
3273c2e8 BH	203
68e7f45e	204	void efx_mdio_phy_reconfigure(struct efx_nic *efx)
3273c2e8	205	{
68e7f45e BH	206	efx_mdio_set_flag(efx, MDIO_MMD_PMAPMD,
	207	MDIO_CTRL1, MDIO_PMA_CTRL1_LOOPBACK,
	208	efx->loopback_mode == LOOPBACK_PMAPMD);
	209	efx_mdio_set_flag(efx, MDIO_MMD_PCS,
	210	MDIO_CTRL1, MDIO_PCS_CTRL1_LOOPBACK,
	211	efx->loopback_mode == LOOPBACK_PCS);
	212	efx_mdio_set_flag(efx, MDIO_MMD_PHYXS,
	213	MDIO_CTRL1, MDIO_PHYXS_CTRL1_LOOPBACK,
e58f69f4	214	efx->loopback_mode == LOOPBACK_PHYXS_WS);
3273c2e8 BH	215	}
3273c2e8 BH	216
68e7f45e BH	217	static void efx_mdio_set_mmd_lpower(struct efx_nic *efx,
68e7f45e BH	218	int lpower, int mmd)
3e133c44	219	{
68e7f45e	220	int stat = efx_mdio_read(efx, mmd, MDIO_STAT1);
3e133c44 BH	221
	222	EFX_TRACE(efx, "Setting low power mode for MMD %d to %d\n",
	223	mmd, lpower);
	224
68e7f45e BH	225	if (stat & MDIO_STAT1_LPOWERABLE) {
	226	efx_mdio_set_flag(efx, mmd, MDIO_CTRL1,
	227	MDIO_CTRL1_LPOWER, lpower);
3e133c44 BH	228	}
	229	}
	230
68e7f45e BH	231	void efx_mdio_set_mmds_lpower(struct efx_nic *efx,
68e7f45e BH	232	int low_power, unsigned int mmd_mask)
3e133c44 BH	233	{
3e133c44 BH	234	int mmd = 0;
68e7f45e	235	mmd_mask &= ~MDIO_DEVS_AN;
3e133c44 BH	236	while (mmd_mask) {
3e133c44 BH	237	if (mmd_mask & 1)
68e7f45e	238	efx_mdio_set_mmd_lpower(efx, low_power, mmd);
3e133c44 BH	239	mmd_mask = (mmd_mask >> 1);
	240	mmd++;
	241	}
	242	}
	243
04cc8cac	244	/**
68e7f45e	245	* efx_mdio_set_settings - Set (some of) the PHY settings over MDIO.
8ceee660 BH	246	* @efx: Efx NIC
8ceee660 BH	247	* @ecmd: New settings
8ceee660	248	*/
68e7f45e	249	int efx_mdio_set_settings(struct efx_nic efx, struct ethtool_cmd ecmd)
8ceee660	250	{
04cc8cac	251	struct ethtool_cmd prev;
04cc8cac BH	252
	253	efx->phy_op->get_settings(efx, &prev);
	254
	255	if (ecmd->advertising == prev.advertising &&
	256	ecmd->speed == prev.speed &&
	257	ecmd->duplex == prev.duplex &&
	258	ecmd->port == prev.port &&
	259	ecmd->autoneg == prev.autoneg)
8ceee660	260	return 0;
04cc8cac BH	261
	262	/* We can only change these settings for -T PHYs */
	263	if (prev.port != PORT_TP \|\| ecmd->port != PORT_TP)
	264	return -EINVAL;
	265
af4ad9bc	266	/* Check that PHY supports these settings */
fc2b5e67 BH	267	if (!ecmd->autoneg \|\|
fc2b5e67 BH	268	(ecmd->advertising \| SUPPORTED_Autoneg) & ~prev.supported)
04cc8cac BH	269	return -EINVAL;
04cc8cac BH	270
d3245b28 BH	271	efx_link_set_advertising(efx, ecmd->advertising \| ADVERTISED_Autoneg);
	272	efx_mdio_an_reconfigure(efx);
	273	return 0;
	274	}
	275
	276	/**
	277	* efx_mdio_an_reconfigure - Push advertising flags and restart autonegotiation
	278	* @efx: Efx NIC
	279	*/
	280	void efx_mdio_an_reconfigure(struct efx_nic *efx)
	281	{
	282	bool xnp = (efx->link_advertising & ADVERTISED_10000baseT_Full
	283	\|\| EFX_WORKAROUND_13204(efx));
	284	int reg;
	285
	286	WARN_ON(!(efx->mdio.mmds & MDIO_DEVS_AN));
fc2b5e67 BH	287
	288	/* Set up the base page */
	289	reg = ADVERTISE_CSMA;
d3245b28	290	if (efx->link_advertising & ADVERTISED_10baseT_Half)
fc2b5e67	291	reg \|= ADVERTISE_10HALF;
d3245b28	292	if (efx->link_advertising & ADVERTISED_10baseT_Full)
fc2b5e67	293	reg \|= ADVERTISE_10FULL;
d3245b28	294	if (efx->link_advertising & ADVERTISED_100baseT_Half)
fc2b5e67	295	reg \|= ADVERTISE_100HALF;
d3245b28	296	if (efx->link_advertising & ADVERTISED_100baseT_Full)
fc2b5e67 BH	297	reg \|= ADVERTISE_100FULL;
	298	if (xnp)
	299	reg \|= ADVERTISE_RESV;
d3245b28 BH	300	else if (efx->link_advertising & (ADVERTISED_1000baseT_Half \|
d3245b28 BH	301	ADVERTISED_1000baseT_Full))
fc2b5e67	302	reg \|= ADVERTISE_NPAGE;
d3245b28 BH	303	if (efx->link_advertising & ADVERTISED_Pause)
	304	reg \|= ADVERTISE_PAUSE_CAP;
	305	if (efx->link_advertising & ADVERTISED_Asym_Pause)
	306	reg \|= ADVERTISE_PAUSE_ASYM;
fc2b5e67 BH	307	efx_mdio_write(efx, MDIO_MMD_AN, MDIO_AN_ADVERTISE, reg);
	308
	309	/* Set up the (extended) next page if necessary */
	310	if (efx->phy_op->set_npage_adv)
d3245b28	311	efx->phy_op->set_npage_adv(efx, efx->link_advertising);
fc2b5e67 BH	312
	313	/* Enable and restart AN */
	314	reg = efx_mdio_read(efx, MDIO_MMD_AN, MDIO_CTRL1);
	315	reg \|= MDIO_AN_CTRL1_ENABLE;
c1c4f453	316	if (!(EFX_WORKAROUND_15195(efx) && LOOPBACK_EXTERNAL(efx)))
fc2b5e67 BH	317	reg \|= MDIO_AN_CTRL1_RESTART;
	318	if (xnp)
	319	reg \|= MDIO_AN_CTRL1_XNP;
	320	else
	321	reg &= ~MDIO_AN_CTRL1_XNP;
	322	efx_mdio_write(efx, MDIO_MMD_AN, MDIO_CTRL1, reg);
04cc8cac BH	323	}
04cc8cac BH	324
68e7f45e	325	enum efx_fc_type efx_mdio_get_pause(struct efx_nic *efx)
04cc8cac	326	{
18ea024f	327	BUILD_BUG_ON(EFX_FC_AUTO & (EFX_FC_RX \| EFX_FC_TX));
04cc8cac	328
18ea024f	329	if (!(efx->wanted_fc & EFX_FC_AUTO))
04cc8cac	330	return efx->wanted_fc;
18ea024f BH	331
	332	WARN_ON(!(efx->mdio.mmds & MDIO_DEVS_AN));
	333
	334	return mii_resolve_flowctrl_fdx(
	335	mii_advertise_flowctrl(efx->wanted_fc),
	336	efx_mdio_read(efx, MDIO_MMD_AN, MDIO_AN_LPA));
8ceee660	337	}