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smc91c92_cs: fix the problem that lan & modem does not work simultaneously
[net-next-2.6.git] / drivers / net / pcmcia / smc91c92_cs.c
CommitLineData
1da177e4
LT
1/*======================================================================
2
3 A PCMCIA ethernet driver for SMC91c92-based cards.
4
5 This driver supports Megahertz PCMCIA ethernet cards; and
6 Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7 multifunction cards.
8
9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10
11 smc91c92_cs.c 1.122 2002/10/25 06:26:39
12
13 This driver contains code written by Donald Becker
14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15 David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16 (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of
17 Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18 incorporated some parts of his driver here. I (Dave) wrote most
19 of the PCMCIA glue code, and the Ositech support code. Kelly
20 Stephens (kstephen@holli.com) added support for the Motorola
21 Mariner, with help from Allen Brost.
22
23 This software may be used and distributed according to the terms of
24 the GNU General Public License, incorporated herein by reference.
25
26======================================================================*/
27
28#include <linux/module.h>
29#include <linux/kernel.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/string.h>
33#include <linux/timer.h>
34#include <linux/interrupt.h>
35#include <linux/delay.h>
36#include <linux/crc32.h>
37#include <linux/netdevice.h>
38#include <linux/etherdevice.h>
39#include <linux/skbuff.h>
40#include <linux/if_arp.h>
41#include <linux/ioport.h>
42#include <linux/ethtool.h>
43#include <linux/mii.h>
4851d3aa 44#include <linux/jiffies.h>
75bf758f 45#include <linux/firmware.h>
1da177e4 46
1da177e4
LT
47#include <pcmcia/cs_types.h>
48#include <pcmcia/cs.h>
49#include <pcmcia/cistpl.h>
50#include <pcmcia/cisreg.h>
51#include <pcmcia/ciscode.h>
52#include <pcmcia/ds.h>
50db3fdb 53#include <pcmcia/ss.h>
1da177e4
LT
54
55#include <asm/io.h>
56#include <asm/system.h>
57#include <asm/uaccess.h>
58
1da177e4
LT
59/*====================================================================*/
60
f71e1309 61static const char *if_names[] = { "auto", "10baseT", "10base2"};
1da177e4 62
75bf758f
JSR
63/* Firmware name */
64#define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
65
1da177e4
LT
66/* Module parameters */
67
68MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
69MODULE_LICENSE("GPL");
75bf758f 70MODULE_FIRMWARE(FIRMWARE_NAME);
1da177e4
LT
71
72#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
73
74/*
75 Transceiver/media type.
76 0 = auto
77 1 = 10baseT (and autoselect if #define AUTOSELECT),
78 2 = AUI/10base2,
79*/
80INT_MODULE_PARM(if_port, 0);
81
1da177e4
LT
82
83#define DRV_NAME "smc91c92_cs"
d5b20697 84#define DRV_VERSION "1.123"
1da177e4
LT
85
86/*====================================================================*/
87
88/* Operational parameter that usually are not changed. */
89
90/* Time in jiffies before concluding Tx hung */
91#define TX_TIMEOUT ((400*HZ)/1000)
92
93/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
94#define INTR_WORK 4
95
96/* Times to check the check the chip before concluding that it doesn't
97 currently have room for another Tx packet. */
98#define MEMORY_WAIT_TIME 8
99
1da177e4 100struct smc_private {
fd238232 101 struct pcmcia_device *p_dev;
1da177e4
LT
102 spinlock_t lock;
103 u_short manfid;
104 u_short cardid;
6fb7298c 105
1da177e4
LT
106 struct sk_buff *saved_skb;
107 int packets_waiting;
108 void __iomem *base;
109 u_short cfg;
110 struct timer_list media;
111 int watchdog, tx_err;
112 u_short media_status;
113 u_short fast_poll;
114 u_short link_status;
115 struct mii_if_info mii_if;
116 int duplex;
117 int rx_ovrn;
118};
119
120/* Special definitions for Megahertz multifunction cards */
121#define MEGAHERTZ_ISR 0x0380
122
123/* Special function registers for Motorola Mariner */
124#define MOT_LAN 0x0000
125#define MOT_UART 0x0020
126#define MOT_EEPROM 0x20
127
128#define MOT_NORMAL \
129(COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
130
131/* Special function registers for Ositech cards */
132#define OSITECH_AUI_CTL 0x0c
133#define OSITECH_PWRDOWN 0x0d
134#define OSITECH_RESET 0x0e
135#define OSITECH_ISR 0x0f
136#define OSITECH_AUI_PWR 0x0c
137#define OSITECH_RESET_ISR 0x0e
138
139#define OSI_AUI_PWR 0x40
140#define OSI_LAN_PWRDOWN 0x02
141#define OSI_MODEM_PWRDOWN 0x01
142#define OSI_LAN_RESET 0x02
143#define OSI_MODEM_RESET 0x01
144
145/* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
146#define BANK_SELECT 14 /* Window select register. */
147#define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
148
149/* Bank 0 registers. */
150#define TCR 0 /* transmit control register */
151#define TCR_CLEAR 0 /* do NOTHING */
152#define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
153#define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
154#define TCR_MONCSN 0x0400 /* Monitor Carrier. */
155#define TCR_FDUPLX 0x0800 /* Full duplex mode. */
156#define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
157
158#define EPH 2 /* Ethernet Protocol Handler report. */
159#define EPH_TX_SUC 0x0001
160#define EPH_SNGLCOL 0x0002
161#define EPH_MULCOL 0x0004
162#define EPH_LTX_MULT 0x0008
163#define EPH_16COL 0x0010
164#define EPH_SQET 0x0020
165#define EPH_LTX_BRD 0x0040
166#define EPH_TX_DEFR 0x0080
167#define EPH_LAT_COL 0x0200
168#define EPH_LOST_CAR 0x0400
169#define EPH_EXC_DEF 0x0800
170#define EPH_CTR_ROL 0x1000
171#define EPH_RX_OVRN 0x2000
172#define EPH_LINK_OK 0x4000
173#define EPH_TX_UNRN 0x8000
174#define MEMINFO 8 /* Memory Information Register */
175#define MEMCFG 10 /* Memory Configuration Register */
176
177/* Bank 1 registers. */
178#define CONFIG 0
179#define CFG_MII_SELECT 0x8000 /* 91C100 only */
180#define CFG_NO_WAIT 0x1000
181#define CFG_FULL_STEP 0x0400
182#define CFG_SET_SQLCH 0x0200
183#define CFG_AUI_SELECT 0x0100
184#define CFG_16BIT 0x0080
185#define CFG_DIS_LINK 0x0040
186#define CFG_STATIC 0x0030
187#define CFG_IRQ_SEL_1 0x0004
188#define CFG_IRQ_SEL_0 0x0002
189#define BASE_ADDR 2
190#define ADDR0 4
191#define GENERAL 10
192#define CONTROL 12
193#define CTL_STORE 0x0001
194#define CTL_RELOAD 0x0002
195#define CTL_EE_SELECT 0x0004
196#define CTL_TE_ENABLE 0x0020
197#define CTL_CR_ENABLE 0x0040
198#define CTL_LE_ENABLE 0x0080
199#define CTL_AUTO_RELEASE 0x0800
200#define CTL_POWERDOWN 0x2000
201
202/* Bank 2 registers. */
203#define MMU_CMD 0
204#define MC_ALLOC 0x20 /* or with number of 256 byte packets */
205#define MC_RESET 0x40
206#define MC_RELEASE 0x80 /* remove and release the current rx packet */
207#define MC_FREEPKT 0xA0 /* Release packet in PNR register */
208#define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
209#define PNR_ARR 2
210#define FIFO_PORTS 4
211#define FP_RXEMPTY 0x8000
212#define POINTER 6
213#define PTR_AUTO_INC 0x0040
214#define PTR_READ 0x2000
215#define PTR_AUTOINC 0x4000
216#define PTR_RCV 0x8000
217#define DATA_1 8
218#define INTERRUPT 12
219#define IM_RCV_INT 0x1
220#define IM_TX_INT 0x2
221#define IM_TX_EMPTY_INT 0x4
222#define IM_ALLOC_INT 0x8
223#define IM_RX_OVRN_INT 0x10
224#define IM_EPH_INT 0x20
225
226#define RCR 4
227enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
228 RxEnable = 0x0100, RxStripCRC = 0x0200};
229#define RCR_SOFTRESET 0x8000 /* resets the chip */
230#define RCR_STRIP_CRC 0x200 /* strips CRC */
231#define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
232#define RCR_ALMUL 0x4 /* receive all multicast packets */
233#define RCR_PROMISC 0x2 /* enable promiscuous mode */
234
235/* the normal settings for the RCR register : */
236#define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
237#define RCR_CLEAR 0x0 /* set it to a base state */
238#define COUNTER 6
239
240/* BANK 3 -- not the same values as in smc9194! */
241#define MULTICAST0 0
242#define MULTICAST2 2
243#define MULTICAST4 4
244#define MULTICAST6 6
245#define MGMT 8
246#define REVISION 0x0a
247
248/* Transmit status bits. */
249#define TS_SUCCESS 0x0001
250#define TS_16COL 0x0010
251#define TS_LATCOL 0x0200
252#define TS_LOSTCAR 0x0400
253
254/* Receive status bits. */
255#define RS_ALGNERR 0x8000
256#define RS_BADCRC 0x2000
257#define RS_ODDFRAME 0x1000
258#define RS_TOOLONG 0x0800
259#define RS_TOOSHORT 0x0400
260#define RS_MULTICAST 0x0001
261#define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
262
263#define set_bits(v, p) outw(inw(p)|(v), (p))
264#define mask_bits(v, p) outw(inw(p)&(v), (p))
265
266/*====================================================================*/
267
cc3b4866 268static void smc91c92_detach(struct pcmcia_device *p_dev);
15b99ac1 269static int smc91c92_config(struct pcmcia_device *link);
fba395ee 270static void smc91c92_release(struct pcmcia_device *link);
1da177e4
LT
271
272static int smc_open(struct net_device *dev);
273static int smc_close(struct net_device *dev);
274static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
275static void smc_tx_timeout(struct net_device *dev);
dbf02fae
SH
276static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
277 struct net_device *dev);
7d12e780 278static irqreturn_t smc_interrupt(int irq, void *dev_id);
1da177e4 279static void smc_rx(struct net_device *dev);
1da177e4
LT
280static void set_rx_mode(struct net_device *dev);
281static int s9k_config(struct net_device *dev, struct ifmap *map);
282static void smc_set_xcvr(struct net_device *dev, int if_port);
283static void smc_reset(struct net_device *dev);
284static void media_check(u_long arg);
906da809 285static void mdio_sync(unsigned int addr);
1da177e4
LT
286static int mdio_read(struct net_device *dev, int phy_id, int loc);
287static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
288static int smc_link_ok(struct net_device *dev);
7282d491 289static const struct ethtool_ops ethtool_ops;
1da177e4 290
9b31b697
SH
291static const struct net_device_ops smc_netdev_ops = {
292 .ndo_open = smc_open,
293 .ndo_stop = smc_close,
294 .ndo_start_xmit = smc_start_xmit,
295 .ndo_tx_timeout = smc_tx_timeout,
296 .ndo_set_config = s9k_config,
297 .ndo_set_multicast_list = set_rx_mode,
298 .ndo_do_ioctl = &smc_ioctl,
299 .ndo_change_mtu = eth_change_mtu,
300 .ndo_set_mac_address = eth_mac_addr,
301 .ndo_validate_addr = eth_validate_addr,
302};
303
1da177e4
LT
304/*======================================================================
305
306 smc91c92_attach() creates an "instance" of the driver, allocating
307 local data structures for one device. The device is registered
308 with Card Services.
309
310======================================================================*/
311
15b99ac1 312static int smc91c92_probe(struct pcmcia_device *link)
1da177e4 313{
1da177e4 314 struct smc_private *smc;
1da177e4 315 struct net_device *dev;
1da177e4 316
dd0fab5b 317 dev_dbg(&link->dev, "smc91c92_attach()\n");
1da177e4
LT
318
319 /* Create new ethernet device */
320 dev = alloc_etherdev(sizeof(struct smc_private));
321 if (!dev)
f8cfa618 322 return -ENOMEM;
1da177e4 323 smc = netdev_priv(dev);
fba395ee 324 smc->p_dev = link;
44b496f6 325 link->priv = dev;
1da177e4
LT
326
327 spin_lock_init(&smc->lock);
328 link->io.NumPorts1 = 16;
329 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
330 link->io.IOAddrLines = 4;
1da177e4 331 link->conf.Attributes = CONF_ENABLE_IRQ;
1da177e4
LT
332 link->conf.IntType = INT_MEMORY_AND_IO;
333
334 /* The SMC91c92-specific entries in the device structure. */
9b31b697 335 dev->netdev_ops = &smc_netdev_ops;
1da177e4 336 SET_ETHTOOL_OPS(dev, &ethtool_ops);
1da177e4 337 dev->watchdog_timeo = TX_TIMEOUT;
1da177e4
LT
338
339 smc->mii_if.dev = dev;
340 smc->mii_if.mdio_read = mdio_read;
341 smc->mii_if.mdio_write = mdio_write;
342 smc->mii_if.phy_id_mask = 0x1f;
343 smc->mii_if.reg_num_mask = 0x1f;
344
15b99ac1 345 return smc91c92_config(link);
1da177e4
LT
346} /* smc91c92_attach */
347
348/*======================================================================
349
350 This deletes a driver "instance". The device is de-registered
351 with Card Services. If it has been released, all local data
352 structures are freed. Otherwise, the structures will be freed
353 when the device is released.
354
355======================================================================*/
356
fba395ee 357static void smc91c92_detach(struct pcmcia_device *link)
1da177e4
LT
358{
359 struct net_device *dev = link->priv;
1da177e4 360
dd0fab5b 361 dev_dbg(&link->dev, "smc91c92_detach\n");
1da177e4 362
c7c2fa07 363 unregister_netdev(dev);
1da177e4 364
e2d40963 365 smc91c92_release(link);
1da177e4 366
1da177e4
LT
367 free_netdev(dev);
368} /* smc91c92_detach */
369
370/*====================================================================*/
371
372static int cvt_ascii_address(struct net_device *dev, char *s)
373{
374 int i, j, da, c;
375
376 if (strlen(s) != 12)
377 return -1;
378 for (i = 0; i < 6; i++) {
379 da = 0;
380 for (j = 0; j < 2; j++) {
381 c = *s++;
382 da <<= 4;
383 da += ((c >= '0') && (c <= '9')) ?
384 (c - '0') : ((c & 0x0f) + 9);
385 }
386 dev->dev_addr[i] = da;
387 }
388 return 0;
389}
390
dddfbd82 391/*====================================================================
1da177e4
LT
392
393 Configuration stuff for Megahertz cards
394
395 mhz_3288_power() is used to power up a 3288's ethernet chip.
396 mhz_mfc_config() handles socket setup for multifunction (1144
397 and 3288) cards. mhz_setup() gets a card's hardware ethernet
398 address.
399
400======================================================================*/
401
fba395ee 402static int mhz_3288_power(struct pcmcia_device *link)
1da177e4
LT
403{
404 struct net_device *dev = link->priv;
405 struct smc_private *smc = netdev_priv(dev);
406 u_char tmp;
407
408 /* Read the ISR twice... */
409 readb(smc->base+MEGAHERTZ_ISR);
410 udelay(5);
411 readb(smc->base+MEGAHERTZ_ISR);
412
413 /* Pause 200ms... */
414 mdelay(200);
415
416 /* Now read and write the COR... */
417 tmp = readb(smc->base + link->conf.ConfigBase + CISREG_COR);
418 udelay(5);
419 writeb(tmp, smc->base + link->conf.ConfigBase + CISREG_COR);
420
421 return 0;
422}
423
b54bf94b
DB
424static int mhz_mfc_config_check(struct pcmcia_device *p_dev,
425 cistpl_cftable_entry_t *cf,
8e2fc39d 426 cistpl_cftable_entry_t *dflt,
ad913c11 427 unsigned int vcc,
b54bf94b
DB
428 void *priv_data)
429{
430 int k;
b54bf94b
DB
431 p_dev->io.BasePort2 = cf->io.win[0].base;
432 for (k = 0; k < 0x400; k += 0x10) {
433 if (k & 0x80)
434 continue;
435 p_dev->io.BasePort1 = k ^ 0x300;
436 if (!pcmcia_request_io(p_dev, &p_dev->io))
437 return 0;
438 }
439 return -ENODEV;
440}
441
fba395ee 442static int mhz_mfc_config(struct pcmcia_device *link)
1da177e4
LT
443{
444 struct net_device *dev = link->priv;
445 struct smc_private *smc = netdev_priv(dev);
1da177e4
LT
446 win_req_t req;
447 memreq_t mem;
b54bf94b 448 int i;
1da177e4
LT
449
450 link->conf.Attributes |= CONF_ENABLE_SPKR;
451 link->conf.Status = CCSR_AUDIO_ENA;
1da177e4
LT
452 link->io.IOAddrLines = 16;
453 link->io.Attributes2 = IO_DATA_PATH_WIDTH_8;
454 link->io.NumPorts2 = 8;
455
1da177e4
LT
456 /* The Megahertz combo cards have modem-like CIS entries, so
457 we have to explicitly try a bunch of port combinations. */
b54bf94b 458 if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
dddfbd82
DB
459 return -ENODEV;
460
1da177e4
LT
461 dev->base_addr = link->io.BasePort1;
462
463 /* Allocate a memory window, for accessing the ISR */
464 req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
465 req.Base = req.Size = 0;
466 req.AccessSpeed = 0;
6838b03f 467 i = pcmcia_request_window(link, &req, &link->win);
4c89e88b 468 if (i != 0)
dddfbd82
DB
469 return -ENODEV;
470
1da177e4
LT
471 smc->base = ioremap(req.Base, req.Size);
472 mem.CardOffset = mem.Page = 0;
473 if (smc->manfid == MANFID_MOTOROLA)
474 mem.CardOffset = link->conf.ConfigBase;
868575d1 475 i = pcmcia_map_mem_page(link, link->win, &mem);
1da177e4 476
8e95a202
JP
477 if ((i == 0) &&
478 (smc->manfid == MANFID_MEGAHERTZ) &&
479 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
480 mhz_3288_power(link);
1da177e4 481
dddfbd82 482 return 0;
1da177e4
LT
483}
484
dddfbd82
DB
485static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
486 tuple_t *tuple,
487 void *priv)
1da177e4 488{
dddfbd82
DB
489 struct net_device *dev = priv;
490 cisparse_t parse;
fb9e2d88 491 u8 *buf;
4638aef4 492
dddfbd82
DB
493 if (pcmcia_parse_tuple(tuple, &parse))
494 return -EINVAL;
1da177e4 495
fb9e2d88
KK
496 buf = parse.version_1.str + parse.version_1.ofs[3];
497
498 if ((parse.version_1.ns > 3) && (cvt_ascii_address(dev, buf) == 0))
dddfbd82 499 return 0;
4638aef4 500
dddfbd82
DB
501 return -EINVAL;
502};
503
fba395ee 504static int mhz_setup(struct pcmcia_device *link)
1da177e4 505{
1da177e4 506 struct net_device *dev = link->priv;
dddfbd82
DB
507 size_t len;
508 u8 *buf;
4638aef4 509 int rc;
1da177e4
LT
510
511 /* Read the station address from the CIS. It is stored as the last
512 (fourth) string in the Version 1 Version/ID tuple. */
7d2e8d00
DB
513 if ((link->prod_id[3]) &&
514 (cvt_ascii_address(dev, link->prod_id[3]) == 0))
515 return 0;
516
517 /* Workarounds for broken cards start here. */
a1a98b72 518 /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
dddfbd82
DB
519 if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
520 return 0;
1da177e4
LT
521
522 /* Another possibility: for the EM3288, in a special tuple */
4638aef4 523 rc = -1;
dddfbd82
DB
524 len = pcmcia_get_tuple(link, 0x81, &buf);
525 if (buf && len >= 13) {
526 buf[12] = '\0';
fb9e2d88 527 if (cvt_ascii_address(dev, buf) == 0)
dddfbd82
DB
528 rc = 0;
529 }
530 kfree(buf);
531
532 return rc;
533};
1da177e4
LT
534
535/*======================================================================
536
537 Configuration stuff for the Motorola Mariner
538
539 mot_config() writes directly to the Mariner configuration
540 registers because the CIS is just bogus.
541
542======================================================================*/
543
fba395ee 544static void mot_config(struct pcmcia_device *link)
1da177e4
LT
545{
546 struct net_device *dev = link->priv;
547 struct smc_private *smc = netdev_priv(dev);
906da809
OJ
548 unsigned int ioaddr = dev->base_addr;
549 unsigned int iouart = link->io.BasePort2;
1da177e4
LT
550
551 /* Set UART base address and force map with COR bit 1 */
552 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
553 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
554 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
555
556 /* Set SMC base address and force map with COR bit 1 */
557 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
558 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
559 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
560
561 /* Wait for things to settle down */
562 mdelay(100);
563}
564
fba395ee 565static int mot_setup(struct pcmcia_device *link)
1da177e4
LT
566{
567 struct net_device *dev = link->priv;
906da809 568 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
569 int i, wait, loop;
570 u_int addr;
571
572 /* Read Ethernet address from Serial EEPROM */
573
574 for (i = 0; i < 3; i++) {
575 SMC_SELECT_BANK(2);
576 outw(MOT_EEPROM + i, ioaddr + POINTER);
577 SMC_SELECT_BANK(1);
578 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
579
580 for (loop = wait = 0; loop < 200; loop++) {
581 udelay(10);
582 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
583 if (wait == 0) break;
584 }
585
586 if (wait)
587 return -1;
588
589 addr = inw(ioaddr + GENERAL);
590 dev->dev_addr[2*i] = addr & 0xff;
591 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
592 }
593
594 return 0;
595}
596
597/*====================================================================*/
598
b54bf94b
DB
599static int smc_configcheck(struct pcmcia_device *p_dev,
600 cistpl_cftable_entry_t *cf,
8e2fc39d 601 cistpl_cftable_entry_t *dflt,
ad913c11 602 unsigned int vcc,
b54bf94b
DB
603 void *priv_data)
604{
b54bf94b
DB
605 p_dev->io.BasePort1 = cf->io.win[0].base;
606 p_dev->io.IOAddrLines = cf->io.flags & CISTPL_IO_LINES_MASK;
607 return pcmcia_request_io(p_dev, &p_dev->io);
608}
609
fba395ee 610static int smc_config(struct pcmcia_device *link)
1da177e4
LT
611{
612 struct net_device *dev = link->priv;
1da177e4
LT
613 int i;
614
1da177e4 615 link->io.NumPorts1 = 16;
b54bf94b
DB
616 i = pcmcia_loop_config(link, smc_configcheck, NULL);
617 if (!i)
618 dev->base_addr = link->io.BasePort1;
4638aef4 619
1da177e4
LT
620 return i;
621}
622
dddfbd82 623
fba395ee 624static int smc_setup(struct pcmcia_device *link)
1da177e4 625{
1da177e4 626 struct net_device *dev = link->priv;
1da177e4
LT
627
628 /* Check for a LAN function extension tuple */
dddfbd82
DB
629 if (!pcmcia_get_mac_from_cis(link, dev))
630 return 0;
631
1da177e4 632 /* Try the third string in the Version 1 Version/ID tuple. */
a9606fd3 633 if (link->prod_id[2]) {
dddfbd82
DB
634 if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
635 return 0;
4638aef4 636 }
dddfbd82 637 return -1;
1da177e4
LT
638}
639
640/*====================================================================*/
641
fba395ee 642static int osi_config(struct pcmcia_device *link)
1da177e4
LT
643{
644 struct net_device *dev = link->priv;
906da809 645 static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1da177e4
LT
646 int i, j;
647
648 link->conf.Attributes |= CONF_ENABLE_SPKR;
649 link->conf.Status = CCSR_AUDIO_ENA;
1da177e4
LT
650 link->io.NumPorts1 = 64;
651 link->io.Attributes2 = IO_DATA_PATH_WIDTH_8;
652 link->io.NumPorts2 = 8;
653 link->io.IOAddrLines = 16;
654
655 /* Enable Hard Decode, LAN, Modem */
656 link->conf.ConfigIndex = 0x23;
657
658 for (i = j = 0; j < 4; j++) {
659 link->io.BasePort2 = com[j];
fba395ee 660 i = pcmcia_request_io(link, &link->io);
4c89e88b
DB
661 if (i == 0)
662 break;
1da177e4 663 }
4c89e88b 664 if (i != 0) {
1da177e4
LT
665 /* Fallback: turn off hard decode */
666 link->conf.ConfigIndex = 0x03;
667 link->io.NumPorts2 = 0;
fba395ee 668 i = pcmcia_request_io(link, &link->io);
1da177e4
LT
669 }
670 dev->base_addr = link->io.BasePort1 + 0x10;
671 return i;
672}
673
75bf758f
JSR
674static int osi_load_firmware(struct pcmcia_device *link)
675{
676 const struct firmware *fw;
677 int i, err;
678
679 err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
680 if (err) {
681 pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
682 return err;
683 }
684
685 /* Download the Seven of Diamonds firmware */
686 for (i = 0; i < fw->size; i++) {
687 outb(fw->data[i], link->io.BasePort1 + 2);
688 udelay(50);
689 }
690 release_firmware(fw);
691 return err;
692}
693
dddfbd82
DB
694static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
695 tuple_t *tuple,
696 void *priv)
1da177e4 697{
dddfbd82
DB
698 struct net_device *dev = priv;
699 int i;
1da177e4 700
dddfbd82
DB
701 if (tuple->TupleDataLen < 8)
702 return -EINVAL;
703 if (tuple->TupleData[0] != 0x04)
704 return -EINVAL;
705 for (i = 0; i < 6; i++)
706 dev->dev_addr[i] = tuple->TupleData[i+2];
707 return 0;
708};
4638aef4 709
4638aef4 710
dddfbd82
DB
711static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
712{
713 struct net_device *dev = link->priv;
714 int rc;
1da177e4
LT
715
716 /* Read the station address from tuple 0x90, subtuple 0x04 */
dddfbd82
DB
717 if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
718 return -1;
1da177e4
LT
719
720 if (((manfid == MANFID_OSITECH) &&
721 (cardid == PRODID_OSITECH_SEVEN)) ||
722 ((manfid == MANFID_PSION) &&
723 (cardid == PRODID_PSION_NET100))) {
75bf758f
JSR
724 rc = osi_load_firmware(link);
725 if (rc)
dddfbd82 726 return rc;
1da177e4
LT
727 } else if (manfid == MANFID_OSITECH) {
728 /* Make sure both functions are powered up */
729 set_bits(0x300, link->io.BasePort1 + OSITECH_AUI_PWR);
730 /* Now, turn on the interrupt for both card functions */
731 set_bits(0x300, link->io.BasePort1 + OSITECH_RESET_ISR);
dd0fab5b 732 dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
1da177e4
LT
733 inw(link->io.BasePort1 + OSITECH_AUI_PWR),
734 inw(link->io.BasePort1 + OSITECH_RESET_ISR));
735 }
dddfbd82 736 return 0;
1da177e4
LT
737}
738
fba395ee 739static int smc91c92_suspend(struct pcmcia_device *link)
98e4c28b 740{
98e4c28b
DB
741 struct net_device *dev = link->priv;
742
e2d40963 743 if (link->open)
4bbed523 744 netif_device_detach(dev);
98e4c28b
DB
745
746 return 0;
747}
748
fba395ee 749static int smc91c92_resume(struct pcmcia_device *link)
98e4c28b 750{
98e4c28b
DB
751 struct net_device *dev = link->priv;
752 struct smc_private *smc = netdev_priv(dev);
753 int i;
754
e2d40963
DB
755 if ((smc->manfid == MANFID_MEGAHERTZ) &&
756 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
757 mhz_3288_power(link);
758 if (smc->manfid == MANFID_MOTOROLA)
759 mot_config(link);
760 if ((smc->manfid == MANFID_OSITECH) &&
761 (smc->cardid != PRODID_OSITECH_SEVEN)) {
762 /* Power up the card and enable interrupts */
763 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
764 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
765 }
766 if (((smc->manfid == MANFID_OSITECH) &&
767 (smc->cardid == PRODID_OSITECH_SEVEN)) ||
768 ((smc->manfid == MANFID_PSION) &&
769 (smc->cardid == PRODID_PSION_NET100))) {
75bf758f
JSR
770 i = osi_load_firmware(link);
771 if (i) {
772 pr_err("smc91c92_cs: Failed to load firmware\n");
773 return i;
98e4c28b
DB
774 }
775 }
e2d40963
DB
776 if (link->open) {
777 smc_reset(dev);
778 netif_device_attach(dev);
779 }
98e4c28b
DB
780
781 return 0;
782}
783
784
1da177e4
LT
785/*======================================================================
786
787 This verifies that the chip is some SMC91cXX variant, and returns
788 the revision code if successful. Otherwise, it returns -ENODEV.
789
790======================================================================*/
791
fba395ee 792static int check_sig(struct pcmcia_device *link)
1da177e4
LT
793{
794 struct net_device *dev = link->priv;
906da809 795 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
796 int width;
797 u_short s;
798
799 SMC_SELECT_BANK(1);
800 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
801 /* Try powering up the chip */
802 outw(0, ioaddr + CONTROL);
803 mdelay(55);
804 }
805
806 /* Try setting bus width */
807 width = (link->io.Attributes1 == IO_DATA_PATH_WIDTH_AUTO);
808 s = inb(ioaddr + CONFIG);
809 if (width)
810 s |= CFG_16BIT;
811 else
812 s &= ~CFG_16BIT;
813 outb(s, ioaddr + CONFIG);
814
815 /* Check Base Address Register to make sure bus width is OK */
816 s = inw(ioaddr + BASE_ADDR);
817 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
818 ((s >> 8) != (s & 0xff))) {
819 SMC_SELECT_BANK(3);
820 s = inw(ioaddr + REVISION);
821 return (s & 0xff);
822 }
823
824 if (width) {
4bbed523
DB
825 modconf_t mod = {
826 .Attributes = CONF_IO_CHANGE_WIDTH,
827 };
828 printk(KERN_INFO "smc91c92_cs: using 8-bit IO window.\n");
829
fba395ee
DB
830 smc91c92_suspend(link);
831 pcmcia_modify_configuration(link, &mod);
832 smc91c92_resume(link);
4bbed523 833 return check_sig(link);
1da177e4
LT
834 }
835 return -ENODEV;
836}
837
838/*======================================================================
839
840 smc91c92_config() is scheduled to run after a CARD_INSERTION event
841 is received, to configure the PCMCIA socket, and to make the
842 ethernet device available to the system.
843
844======================================================================*/
845
15b99ac1 846static int smc91c92_config(struct pcmcia_device *link)
1da177e4 847{
1da177e4
LT
848 struct net_device *dev = link->priv;
849 struct smc_private *smc = netdev_priv(dev);
1da177e4
LT
850 char *name;
851 int i, j, rev;
906da809 852 unsigned int ioaddr;
1da177e4
LT
853 u_long mir;
854
dd0fab5b 855 dev_dbg(&link->dev, "smc91c92_config\n");
1da177e4 856
efd50585
DB
857 smc->manfid = link->manf_id;
858 smc->cardid = link->card_id;
1da177e4 859
1da177e4
LT
860 if ((smc->manfid == MANFID_OSITECH) &&
861 (smc->cardid != PRODID_OSITECH_SEVEN)) {
862 i = osi_config(link);
863 } else if ((smc->manfid == MANFID_MOTOROLA) ||
864 ((smc->manfid == MANFID_MEGAHERTZ) &&
865 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
866 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
867 i = mhz_mfc_config(link);
868 } else {
869 i = smc_config(link);
870 }
dd0fab5b
DB
871 if (i)
872 goto config_failed;
1da177e4 873
eb14120f 874 i = pcmcia_request_irq(link, smc_interrupt);
dd0fab5b
DB
875 if (i)
876 goto config_failed;
fba395ee 877 i = pcmcia_request_configuration(link, &link->conf);
dd0fab5b
DB
878 if (i)
879 goto config_failed;
1da177e4
LT
880
881 if (smc->manfid == MANFID_MOTOROLA)
882 mot_config(link);
883
eb14120f 884 dev->irq = link->irq;
1da177e4
LT
885
886 if ((if_port >= 0) && (if_port <= 2))
887 dev->if_port = if_port;
888 else
889 printk(KERN_NOTICE "smc91c92_cs: invalid if_port requested\n");
890
891 switch (smc->manfid) {
892 case MANFID_OSITECH:
893 case MANFID_PSION:
894 i = osi_setup(link, smc->manfid, smc->cardid); break;
895 case MANFID_SMC:
896 case MANFID_NEW_MEDIA:
897 i = smc_setup(link); break;
898 case 0x128: /* For broken Megahertz cards */
899 case MANFID_MEGAHERTZ:
900 i = mhz_setup(link); break;
901 case MANFID_MOTOROLA:
902 default: /* get the hw address from EEPROM */
903 i = mot_setup(link); break;
904 }
905
906 if (i != 0) {
907 printk(KERN_NOTICE "smc91c92_cs: Unable to find hardware address.\n");
fb9e2d88 908 goto config_failed;
1da177e4
LT
909 }
910
911 smc->duplex = 0;
912 smc->rx_ovrn = 0;
913
914 rev = check_sig(link);
915 name = "???";
916 if (rev > 0)
917 switch (rev >> 4) {
918 case 3: name = "92"; break;
919 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
920 case 5: name = "95"; break;
921 case 7: name = "100"; break;
922 case 8: name = "100-FD"; break;
923 case 9: name = "110"; break;
924 }
925
926 ioaddr = dev->base_addr;
927 if (rev > 0) {
928 u_long mcr;
929 SMC_SELECT_BANK(0);
930 mir = inw(ioaddr + MEMINFO) & 0xff;
931 if (mir == 0xff) mir++;
932 /* Get scale factor for memory size */
933 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
934 mir *= 128 * (1<<((mcr >> 9) & 7));
935 SMC_SELECT_BANK(1);
936 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
937 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
938 if (smc->manfid == MANFID_OSITECH)
939 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
940 if ((rev >> 4) >= 7)
941 smc->cfg |= CFG_MII_SELECT;
942 } else
943 mir = 0;
944
945 if (smc->cfg & CFG_MII_SELECT) {
946 SMC_SELECT_BANK(3);
947
948 for (i = 0; i < 32; i++) {
949 j = mdio_read(dev, i, 1);
950 if ((j != 0) && (j != 0xffff)) break;
951 }
952 smc->mii_if.phy_id = (i < 32) ? i : -1;
953
954 SMC_SELECT_BANK(0);
955 }
956
dd2e5a15 957 SET_NETDEV_DEV(dev, &link->dev);
1da177e4
LT
958
959 if (register_netdev(dev) != 0) {
960 printk(KERN_ERR "smc91c92_cs: register_netdev() failed\n");
1da177e4
LT
961 goto config_undo;
962 }
963
1da177e4 964 printk(KERN_INFO "%s: smc91c%s rev %d: io %#3lx, irq %d, "
e174961c 965 "hw_addr %pM\n",
0795af57 966 dev->name, name, (rev & 0x0f), dev->base_addr, dev->irq,
e174961c 967 dev->dev_addr);
1da177e4
LT
968
969 if (rev > 0) {
970 if (mir & 0x3ff)
971 printk(KERN_INFO " %lu byte", mir);
972 else
973 printk(KERN_INFO " %lu kb", mir>>10);
974 printk(" buffer, %s xcvr\n", (smc->cfg & CFG_MII_SELECT) ?
975 "MII" : if_names[dev->if_port]);
976 }
977
978 if (smc->cfg & CFG_MII_SELECT) {
979 if (smc->mii_if.phy_id != -1) {
dd0fab5b 980 dev_dbg(&link->dev, " MII transceiver at index %d, status %x.\n",
1da177e4
LT
981 smc->mii_if.phy_id, j);
982 } else {
983 printk(KERN_NOTICE " No MII transceivers found!\n");
984 }
985 }
15b99ac1 986 return 0;
1da177e4
LT
987
988config_undo:
989 unregister_netdev(dev);
dd0fab5b 990config_failed:
1da177e4 991 smc91c92_release(link);
fb9e2d88 992 free_netdev(dev);
15b99ac1 993 return -ENODEV;
1da177e4
LT
994} /* smc91c92_config */
995
996/*======================================================================
997
998 After a card is removed, smc91c92_release() will unregister the net
999 device, and release the PCMCIA configuration. If the device is
1000 still open, this will be postponed until it is closed.
1001
1002======================================================================*/
1003
fba395ee 1004static void smc91c92_release(struct pcmcia_device *link)
1da177e4 1005{
dd0fab5b 1006 dev_dbg(&link->dev, "smc91c92_release\n");
5f2a71fc
DB
1007 if (link->win) {
1008 struct net_device *dev = link->priv;
1009 struct smc_private *smc = netdev_priv(dev);
1010 iounmap(smc->base);
1011 }
fba395ee 1012 pcmcia_disable_device(link);
1da177e4
LT
1013}
1014
1da177e4
LT
1015/*======================================================================
1016
1017 MII interface support for SMC91cXX based cards
1018======================================================================*/
1019
1020#define MDIO_SHIFT_CLK 0x04
1021#define MDIO_DATA_OUT 0x01
1022#define MDIO_DIR_WRITE 0x08
1023#define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
1024#define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
1025#define MDIO_DATA_READ 0x02
1026
906da809 1027static void mdio_sync(unsigned int addr)
1da177e4
LT
1028{
1029 int bits;
1030 for (bits = 0; bits < 32; bits++) {
1031 outb(MDIO_DATA_WRITE1, addr);
1032 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
1033 }
1034}
1035
1036static int mdio_read(struct net_device *dev, int phy_id, int loc)
1037{
906da809 1038 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT
1039 u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
1040 int i, retval = 0;
1041
1042 mdio_sync(addr);
1043 for (i = 13; i >= 0; i--) {
1044 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1045 outb(dat, addr);
1046 outb(dat | MDIO_SHIFT_CLK, addr);
1047 }
1048 for (i = 19; i > 0; i--) {
1049 outb(0, addr);
1050 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1051 outb(MDIO_SHIFT_CLK, addr);
1052 }
1053 return (retval>>1) & 0xffff;
1054}
1055
1056static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1057{
906da809 1058 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT
1059 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1060 int i;
1061
1062 mdio_sync(addr);
1063 for (i = 31; i >= 0; i--) {
1064 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1065 outb(dat, addr);
1066 outb(dat | MDIO_SHIFT_CLK, addr);
1067 }
1068 for (i = 1; i >= 0; i--) {
1069 outb(0, addr);
1070 outb(MDIO_SHIFT_CLK, addr);
1071 }
1072}
1073
1074/*======================================================================
1075
1076 The driver core code, most of which should be common with a
1077 non-PCMCIA implementation.
1078
1079======================================================================*/
1080
1081#ifdef PCMCIA_DEBUG
1082static void smc_dump(struct net_device *dev)
1083{
906da809 1084 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1085 u_short i, w, save;
1086 save = inw(ioaddr + BANK_SELECT);
1087 for (w = 0; w < 4; w++) {
1088 SMC_SELECT_BANK(w);
1089 printk(KERN_DEBUG "bank %d: ", w);
1090 for (i = 0; i < 14; i += 2)
1091 printk(" %04x", inw(ioaddr + i));
1092 printk("\n");
1093 }
1094 outw(save, ioaddr + BANK_SELECT);
1095}
1096#endif
1097
1098static int smc_open(struct net_device *dev)
1099{
1100 struct smc_private *smc = netdev_priv(dev);
fba395ee 1101 struct pcmcia_device *link = smc->p_dev;
1da177e4 1102
dd0fab5b 1103 dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1da177e4 1104 dev->name, dev, inw(dev->base_addr + BANK_SELECT));
dd0fab5b
DB
1105#ifdef PCMCIA_DEBUG
1106 smc_dump(dev);
1da177e4
LT
1107#endif
1108
1109 /* Check that the PCMCIA card is still here. */
9940ec36 1110 if (!pcmcia_dev_present(link))
1da177e4
LT
1111 return -ENODEV;
1112 /* Physical device present signature. */
1113 if (check_sig(link) < 0) {
1114 printk("smc91c92_cs: Yikes! Bad chip signature!\n");
1115 return -ENODEV;
1116 }
1117 link->open++;
1118
1119 netif_start_queue(dev);
1120 smc->saved_skb = NULL;
1121 smc->packets_waiting = 0;
1122
1123 smc_reset(dev);
1124 init_timer(&smc->media);
1125 smc->media.function = &media_check;
1126 smc->media.data = (u_long) dev;
1127 smc->media.expires = jiffies + HZ;
1128 add_timer(&smc->media);
1129
1130 return 0;
1131} /* smc_open */
1132
1133/*====================================================================*/
1134
1135static int smc_close(struct net_device *dev)
1136{
1137 struct smc_private *smc = netdev_priv(dev);
fba395ee 1138 struct pcmcia_device *link = smc->p_dev;
906da809 1139 unsigned int ioaddr = dev->base_addr;
1da177e4 1140
dd0fab5b 1141 dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1da177e4
LT
1142 dev->name, inw(ioaddr + BANK_SELECT));
1143
1144 netif_stop_queue(dev);
1145
1146 /* Shut off all interrupts, and turn off the Tx and Rx sections.
1147 Don't bother to check for chip present. */
1148 SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1149 outw(0, ioaddr + INTERRUPT);
1150 SMC_SELECT_BANK(0);
1151 mask_bits(0xff00, ioaddr + RCR);
1152 mask_bits(0xff00, ioaddr + TCR);
1153
1154 /* Put the chip into power-down mode. */
1155 SMC_SELECT_BANK(1);
1156 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1157
1158 link->open--;
1159 del_timer_sync(&smc->media);
1160
1161 return 0;
1162} /* smc_close */
1163
1164/*======================================================================
1165
1166 Transfer a packet to the hardware and trigger the packet send.
1167 This may be called at either from either the Tx queue code
1168 or the interrupt handler.
1169
1170======================================================================*/
1171
1172static void smc_hardware_send_packet(struct net_device * dev)
1173{
1174 struct smc_private *smc = netdev_priv(dev);
1175 struct sk_buff *skb = smc->saved_skb;
906da809 1176 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1177 u_char packet_no;
1178
1179 if (!skb) {
1180 printk(KERN_ERR "%s: In XMIT with no packet to send.\n", dev->name);
1181 return;
1182 }
1183
1184 /* There should be a packet slot waiting. */
1185 packet_no = inw(ioaddr + PNR_ARR) >> 8;
1186 if (packet_no & 0x80) {
1187 /* If not, there is a hardware problem! Likely an ejected card. */
1188 printk(KERN_WARNING "%s: 91c92 hardware Tx buffer allocation"
1189 " failed, status %#2.2x.\n", dev->name, packet_no);
1190 dev_kfree_skb_irq(skb);
1191 smc->saved_skb = NULL;
1192 netif_start_queue(dev);
1193 return;
1194 }
1195
6fb7298c 1196 dev->stats.tx_bytes += skb->len;
1da177e4
LT
1197 /* The card should use the just-allocated buffer. */
1198 outw(packet_no, ioaddr + PNR_ARR);
1199 /* point to the beginning of the packet */
1200 outw(PTR_AUTOINC , ioaddr + POINTER);
1201
1202 /* Send the packet length (+6 for status, length and ctl byte)
1203 and the status word (set to zeros). */
1204 {
1205 u_char *buf = skb->data;
1206 u_int length = skb->len; /* The chip will pad to ethernet min. */
1207
dd0fab5b 1208 pr_debug("%s: Trying to xmit packet of length %d.\n",
1da177e4
LT
1209 dev->name, length);
1210
1211 /* send the packet length: +6 for status word, length, and ctl */
1212 outw(0, ioaddr + DATA_1);
1213 outw(length + 6, ioaddr + DATA_1);
1214 outsw(ioaddr + DATA_1, buf, length >> 1);
1215
1216 /* The odd last byte, if there is one, goes in the control word. */
1217 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1218 }
1219
1220 /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1221 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1222 (inw(ioaddr + INTERRUPT) & 0xff00),
1223 ioaddr + INTERRUPT);
1224
1225 /* The chip does the rest of the work. */
1226 outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1227
1228 smc->saved_skb = NULL;
1229 dev_kfree_skb_irq(skb);
1230 dev->trans_start = jiffies;
1231 netif_start_queue(dev);
1da177e4
LT
1232}
1233
1234/*====================================================================*/
1235
1236static void smc_tx_timeout(struct net_device *dev)
1237{
1238 struct smc_private *smc = netdev_priv(dev);
906da809 1239 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1240
1241 printk(KERN_NOTICE "%s: SMC91c92 transmit timed out, "
1242 "Tx_status %2.2x status %4.4x.\n",
1243 dev->name, inw(ioaddr)&0xff, inw(ioaddr + 2));
6fb7298c 1244 dev->stats.tx_errors++;
1da177e4 1245 smc_reset(dev);
1ae5dc34 1246 dev->trans_start = jiffies; /* prevent tx timeout */
1da177e4
LT
1247 smc->saved_skb = NULL;
1248 netif_wake_queue(dev);
1249}
1250
dbf02fae
SH
1251static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1252 struct net_device *dev)
1da177e4
LT
1253{
1254 struct smc_private *smc = netdev_priv(dev);
906da809 1255 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1256 u_short num_pages;
1257 short time_out, ir;
85e27831 1258 unsigned long flags;
1da177e4
LT
1259
1260 netif_stop_queue(dev);
1261
dd0fab5b 1262 pr_debug("%s: smc_start_xmit(length = %d) called,"
1da177e4
LT
1263 " status %4.4x.\n", dev->name, skb->len, inw(ioaddr + 2));
1264
1265 if (smc->saved_skb) {
1266 /* THIS SHOULD NEVER HAPPEN. */
6fb7298c 1267 dev->stats.tx_aborted_errors++;
1da177e4
LT
1268 printk(KERN_DEBUG "%s: Internal error -- sent packet while busy.\n",
1269 dev->name);
5b548140 1270 return NETDEV_TX_BUSY;
1da177e4
LT
1271 }
1272 smc->saved_skb = skb;
1273
1274 num_pages = skb->len >> 8;
1275
1276 if (num_pages > 7) {
1277 printk(KERN_ERR "%s: Far too big packet error.\n", dev->name);
1278 dev_kfree_skb (skb);
1279 smc->saved_skb = NULL;
6fb7298c 1280 dev->stats.tx_dropped++;
6ed10654 1281 return NETDEV_TX_OK; /* Do not re-queue this packet. */
1da177e4
LT
1282 }
1283 /* A packet is now waiting. */
1284 smc->packets_waiting++;
1285
85e27831 1286 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT
1287 SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1288
1289 /* need MC_RESET to keep the memory consistent. errata? */
1290 if (smc->rx_ovrn) {
1291 outw(MC_RESET, ioaddr + MMU_CMD);
1292 smc->rx_ovrn = 0;
1293 }
1294
1295 /* Allocate the memory; send the packet now if we win. */
1296 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1297 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1298 ir = inw(ioaddr+INTERRUPT);
1299 if (ir & IM_ALLOC_INT) {
1300 /* Acknowledge the interrupt, send the packet. */
1301 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1302 smc_hardware_send_packet(dev); /* Send the packet now.. */
85e27831 1303 spin_unlock_irqrestore(&smc->lock, flags);
6ed10654 1304 return NETDEV_TX_OK;
1da177e4
LT
1305 }
1306 }
1307
1308 /* Otherwise defer until the Tx-space-allocated interrupt. */
dd0fab5b 1309 pr_debug("%s: memory allocation deferred.\n", dev->name);
1da177e4 1310 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
85e27831 1311 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4 1312
6ed10654 1313 return NETDEV_TX_OK;
1da177e4
LT
1314}
1315
1316/*======================================================================
1317
1318 Handle a Tx anomolous event. Entered while in Window 2.
1319
1320======================================================================*/
1321
1322static void smc_tx_err(struct net_device * dev)
1323{
1324 struct smc_private *smc = netdev_priv(dev);
906da809 1325 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1326 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1327 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1328 int tx_status;
1329
1330 /* select this as the packet to read from */
1331 outw(packet_no, ioaddr + PNR_ARR);
1332
1333 /* read the first word from this packet */
1334 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1335
1336 tx_status = inw(ioaddr + DATA_1);
1337
6fb7298c
SH
1338 dev->stats.tx_errors++;
1339 if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1340 if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1da177e4 1341 if (tx_status & TS_16COL) {
6fb7298c 1342 dev->stats.tx_aborted_errors++;
1da177e4
LT
1343 smc->tx_err++;
1344 }
1345
1346 if (tx_status & TS_SUCCESS) {
1347 printk(KERN_NOTICE "%s: Successful packet caused error "
1348 "interrupt?\n", dev->name);
1349 }
1350 /* re-enable transmit */
1351 SMC_SELECT_BANK(0);
1352 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1353 SMC_SELECT_BANK(2);
1354
1355 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1356
1357 /* one less packet waiting for me */
1358 smc->packets_waiting--;
1359
1360 outw(saved_packet, ioaddr + PNR_ARR);
1da177e4
LT
1361}
1362
1363/*====================================================================*/
1364
1365static void smc_eph_irq(struct net_device *dev)
1366{
1367 struct smc_private *smc = netdev_priv(dev);
906da809 1368 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1369 u_short card_stats, ephs;
1370
1371 SMC_SELECT_BANK(0);
1372 ephs = inw(ioaddr + EPH);
dd0fab5b 1373 pr_debug("%s: Ethernet protocol handler interrupt, status"
1da177e4
LT
1374 " %4.4x.\n", dev->name, ephs);
1375 /* Could be a counter roll-over warning: update stats. */
1376 card_stats = inw(ioaddr + COUNTER);
1377 /* single collisions */
6fb7298c 1378 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT
1379 card_stats >>= 4;
1380 /* multiple collisions */
6fb7298c 1381 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT
1382#if 0 /* These are for when linux supports these statistics */
1383 card_stats >>= 4; /* deferred */
1384 card_stats >>= 4; /* excess deferred */
1385#endif
1386 /* If we had a transmit error we must re-enable the transmitter. */
1387 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1388
1389 /* Clear a link error interrupt. */
1390 SMC_SELECT_BANK(1);
1391 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1392 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1393 ioaddr + CONTROL);
1394 SMC_SELECT_BANK(2);
1395}
1396
1397/*====================================================================*/
1398
7d12e780 1399static irqreturn_t smc_interrupt(int irq, void *dev_id)
1da177e4
LT
1400{
1401 struct net_device *dev = dev_id;
1402 struct smc_private *smc = netdev_priv(dev);
906da809 1403 unsigned int ioaddr;
1da177e4
LT
1404 u_short saved_bank, saved_pointer, mask, status;
1405 unsigned int handled = 1;
1406 char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1407
1408 if (!netif_device_present(dev))
1409 return IRQ_NONE;
1410
1411 ioaddr = dev->base_addr;
1412
dd0fab5b 1413 pr_debug("%s: SMC91c92 interrupt %d at %#x.\n", dev->name,
1da177e4
LT
1414 irq, ioaddr);
1415
85e27831 1416 spin_lock(&smc->lock);
1da177e4
LT
1417 smc->watchdog = 0;
1418 saved_bank = inw(ioaddr + BANK_SELECT);
1419 if ((saved_bank & 0xff00) != 0x3300) {
1420 /* The device does not exist -- the card could be off-line, or
1421 maybe it has been ejected. */
dd0fab5b 1422 pr_debug("%s: SMC91c92 interrupt %d for non-existent"
1da177e4
LT
1423 "/ejected device.\n", dev->name, irq);
1424 handled = 0;
1425 goto irq_done;
1426 }
1427
1428 SMC_SELECT_BANK(2);
1429 saved_pointer = inw(ioaddr + POINTER);
1430 mask = inw(ioaddr + INTERRUPT) >> 8;
1431 /* clear all interrupts */
1432 outw(0, ioaddr + INTERRUPT);
1433
1434 do { /* read the status flag, and mask it */
1435 status = inw(ioaddr + INTERRUPT) & 0xff;
dd0fab5b 1436 pr_debug("%s: Status is %#2.2x (mask %#2.2x).\n", dev->name,
1da177e4
LT
1437 status, mask);
1438 if ((status & mask) == 0) {
1439 if (bogus_cnt == INTR_WORK)
1440 handled = 0;
1441 break;
1442 }
1443 if (status & IM_RCV_INT) {
1444 /* Got a packet(s). */
1445 smc_rx(dev);
1446 }
1447 if (status & IM_TX_INT) {
1448 smc_tx_err(dev);
1449 outw(IM_TX_INT, ioaddr + INTERRUPT);
1450 }
1451 status &= mask;
1452 if (status & IM_TX_EMPTY_INT) {
1453 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1454 mask &= ~IM_TX_EMPTY_INT;
6fb7298c 1455 dev->stats.tx_packets += smc->packets_waiting;
1da177e4
LT
1456 smc->packets_waiting = 0;
1457 }
1458 if (status & IM_ALLOC_INT) {
1459 /* Clear this interrupt so it doesn't happen again */
1460 mask &= ~IM_ALLOC_INT;
1461
1462 smc_hardware_send_packet(dev);
1463
1464 /* enable xmit interrupts based on this */
1465 mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1466
1467 /* and let the card send more packets to me */
1468 netif_wake_queue(dev);
1469 }
1470 if (status & IM_RX_OVRN_INT) {
6fb7298c
SH
1471 dev->stats.rx_errors++;
1472 dev->stats.rx_fifo_errors++;
1da177e4
LT
1473 if (smc->duplex)
1474 smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1475 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1476 }
1477 if (status & IM_EPH_INT)
1478 smc_eph_irq(dev);
1479 } while (--bogus_cnt);
1480
dd0fab5b 1481 pr_debug(" Restoring saved registers mask %2.2x bank %4.4x"
1da177e4
LT
1482 " pointer %4.4x.\n", mask, saved_bank, saved_pointer);
1483
1484 /* restore state register */
1485 outw((mask<<8), ioaddr + INTERRUPT);
1486 outw(saved_pointer, ioaddr + POINTER);
1487 SMC_SELECT_BANK(saved_bank);
1488
dd0fab5b 1489 pr_debug("%s: Exiting interrupt IRQ%d.\n", dev->name, irq);
1da177e4
LT
1490
1491irq_done:
1492
1493 if ((smc->manfid == MANFID_OSITECH) &&
1494 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1495 /* Retrigger interrupt if needed */
1496 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1497 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1498 }
1499 if (smc->manfid == MANFID_MOTOROLA) {
1500 u_char cor;
1501 cor = readb(smc->base + MOT_UART + CISREG_COR);
1502 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1503 writeb(cor, smc->base + MOT_UART + CISREG_COR);
1504 cor = readb(smc->base + MOT_LAN + CISREG_COR);
1505 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1506 writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1507 }
9735b7ef
KK
1508
1509 if ((smc->base != NULL) && /* Megahertz MFC's */
1510 (smc->manfid == MANFID_MEGAHERTZ) &&
1511 (smc->cardid == PRODID_MEGAHERTZ_EM3288)) {
1512
1513 u_char tmp;
1514 tmp = readb(smc->base+MEGAHERTZ_ISR);
1515 tmp = readb(smc->base+MEGAHERTZ_ISR);
1516
1517 /* Retrigger interrupt if needed */
1518 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1519 writeb(tmp, smc->base + MEGAHERTZ_ISR);
1da177e4 1520 }
9735b7ef 1521
85e27831 1522 spin_unlock(&smc->lock);
1da177e4
LT
1523 return IRQ_RETVAL(handled);
1524}
1525
1526/*====================================================================*/
1527
1528static void smc_rx(struct net_device *dev)
1529{
906da809 1530 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1531 int rx_status;
1532 int packet_length; /* Caution: not frame length, rather words
1533 to transfer from the chip. */
1534
1535 /* Assertion: we are in Window 2. */
1536
1537 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
1538 printk(KERN_ERR "%s: smc_rx() with nothing on Rx FIFO.\n",
1539 dev->name);
1540 return;
1541 }
1542
1543 /* Reset the read pointer, and read the status and packet length. */
1544 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1545 rx_status = inw(ioaddr + DATA_1);
1546 packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1547
dd0fab5b 1548 pr_debug("%s: Receive status %4.4x length %d.\n",
1da177e4
LT
1549 dev->name, rx_status, packet_length);
1550
1551 if (!(rx_status & RS_ERRORS)) {
1552 /* do stuff to make a new packet */
1553 struct sk_buff *skb;
1554
1555 /* Note: packet_length adds 5 or 6 extra bytes here! */
1556 skb = dev_alloc_skb(packet_length+2);
1557
1558 if (skb == NULL) {
dd0fab5b 1559 pr_debug("%s: Low memory, packet dropped.\n", dev->name);
6fb7298c 1560 dev->stats.rx_dropped++;
1da177e4
LT
1561 outw(MC_RELEASE, ioaddr + MMU_CMD);
1562 return;
1563 }
1564
1565 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1566 skb_reserve(skb, 2);
1567 insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1568 (packet_length+1)>>1);
1569 skb->protocol = eth_type_trans(skb, dev);
1570
1da177e4
LT
1571 netif_rx(skb);
1572 dev->last_rx = jiffies;
6fb7298c
SH
1573 dev->stats.rx_packets++;
1574 dev->stats.rx_bytes += packet_length;
1da177e4 1575 if (rx_status & RS_MULTICAST)
6fb7298c 1576 dev->stats.multicast++;
1da177e4
LT
1577 } else {
1578 /* error ... */
6fb7298c 1579 dev->stats.rx_errors++;
1da177e4 1580
6fb7298c 1581 if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1da177e4 1582 if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
6fb7298c
SH
1583 dev->stats.rx_length_errors++;
1584 if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1da177e4
LT
1585 }
1586 /* Let the MMU free the memory of this packet. */
1587 outw(MC_RELEASE, ioaddr + MMU_CMD);
1da177e4
LT
1588}
1589
1da177e4
LT
1590/*======================================================================
1591
1592 Set the receive mode.
1593
1594 This routine is used by both the protocol level to notify us of
1595 promiscuous/multicast mode changes, and by the open/reset code to
1596 initialize the Rx registers. We always set the multicast list and
1597 leave the receiver running.
1598
1599======================================================================*/
1600
1601static void set_rx_mode(struct net_device *dev)
1602{
906da809 1603 unsigned int ioaddr = dev->base_addr;
1da177e4 1604 struct smc_private *smc = netdev_priv(dev);
a6d37024 1605 unsigned char multicast_table[8];
1da177e4
LT
1606 unsigned long flags;
1607 u_short rx_cfg_setting;
a6d37024
KK
1608 int i;
1609
1610 memset(multicast_table, 0, sizeof(multicast_table));
1da177e4
LT
1611
1612 if (dev->flags & IFF_PROMISC) {
1da177e4
LT
1613 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1614 } else if (dev->flags & IFF_ALLMULTI)
1615 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1616 else {
4cd24eaf 1617 if (!netdev_mc_empty(dev)) {
22bedad3 1618 struct netdev_hw_addr *ha;
91fea585 1619
22bedad3
JP
1620 netdev_for_each_mc_addr(ha, dev) {
1621 u_int position = ether_crc(6, ha->addr);
91fea585
JP
1622 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1623 }
1da177e4
LT
1624 }
1625 rx_cfg_setting = RxStripCRC | RxEnable;
1626 }
1627
1628 /* Load MC table and Rx setting into the chip without interrupts. */
1629 spin_lock_irqsave(&smc->lock, flags);
1630 SMC_SELECT_BANK(3);
a6d37024
KK
1631 for (i = 0; i < 8; i++)
1632 outb(multicast_table[i], ioaddr + MULTICAST0 + i);
1da177e4
LT
1633 SMC_SELECT_BANK(0);
1634 outw(rx_cfg_setting, ioaddr + RCR);
1635 SMC_SELECT_BANK(2);
1636 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
1637}
1638
1639/*======================================================================
1640
1641 Senses when a card's config changes. Here, it's coax or TP.
1642
1643======================================================================*/
1644
1645static int s9k_config(struct net_device *dev, struct ifmap *map)
1646{
1647 struct smc_private *smc = netdev_priv(dev);
1648 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1649 if (smc->cfg & CFG_MII_SELECT)
1650 return -EOPNOTSUPP;
1651 else if (map->port > 2)
1652 return -EINVAL;
1653 dev->if_port = map->port;
1654 printk(KERN_INFO "%s: switched to %s port\n",
1655 dev->name, if_names[dev->if_port]);
1656 smc_reset(dev);
1657 }
1658 return 0;
1659}
1660
1661/*======================================================================
1662
1663 Reset the chip, reloading every register that might be corrupted.
1664
1665======================================================================*/
1666
1667/*
1668 Set transceiver type, perhaps to something other than what the user
1669 specified in dev->if_port.
1670*/
1671static void smc_set_xcvr(struct net_device *dev, int if_port)
1672{
1673 struct smc_private *smc = netdev_priv(dev);
906da809 1674 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1675 u_short saved_bank;
1676
1677 saved_bank = inw(ioaddr + BANK_SELECT);
1678 SMC_SELECT_BANK(1);
1679 if (if_port == 2) {
1680 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1681 if ((smc->manfid == MANFID_OSITECH) &&
1682 (smc->cardid != PRODID_OSITECH_SEVEN))
1683 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1684 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1685 } else {
1686 outw(smc->cfg, ioaddr + CONFIG);
1687 if ((smc->manfid == MANFID_OSITECH) &&
1688 (smc->cardid != PRODID_OSITECH_SEVEN))
1689 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1690 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1691 }
1692 SMC_SELECT_BANK(saved_bank);
1693}
1694
1695static void smc_reset(struct net_device *dev)
1696{
906da809 1697 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1698 struct smc_private *smc = netdev_priv(dev);
1699 int i;
1700
dd0fab5b 1701 pr_debug("%s: smc91c92 reset called.\n", dev->name);
1da177e4
LT
1702
1703 /* The first interaction must be a write to bring the chip out
1704 of sleep mode. */
1705 SMC_SELECT_BANK(0);
1706 /* Reset the chip. */
1707 outw(RCR_SOFTRESET, ioaddr + RCR);
1708 udelay(10);
1709
1710 /* Clear the transmit and receive configuration registers. */
1711 outw(RCR_CLEAR, ioaddr + RCR);
1712 outw(TCR_CLEAR, ioaddr + TCR);
1713
1714 /* Set the Window 1 control, configuration and station addr registers.
1715 No point in writing the I/O base register ;-> */
1716 SMC_SELECT_BANK(1);
d6e05edc 1717 /* Automatically release successfully transmitted packets,
1da177e4
LT
1718 Accept link errors, counter and Tx error interrupts. */
1719 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1720 ioaddr + CONTROL);
1721 smc_set_xcvr(dev, dev->if_port);
1722 if ((smc->manfid == MANFID_OSITECH) &&
1723 (smc->cardid != PRODID_OSITECH_SEVEN))
1724 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1725 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1726 ioaddr - 0x10 + OSITECH_AUI_PWR);
1727
1728 /* Fill in the physical address. The databook is wrong about the order! */
1729 for (i = 0; i < 6; i += 2)
1730 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1731 ioaddr + ADDR0 + i);
1732
1733 /* Reset the MMU */
1734 SMC_SELECT_BANK(2);
1735 outw(MC_RESET, ioaddr + MMU_CMD);
1736 outw(0, ioaddr + INTERRUPT);
1737
1738 /* Re-enable the chip. */
1739 SMC_SELECT_BANK(0);
1740 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1741 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1742 set_rx_mode(dev);
1743
1744 if (smc->cfg & CFG_MII_SELECT) {
1745 SMC_SELECT_BANK(3);
1746
1747 /* Reset MII */
1748 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1749
1750 /* Advertise 100F, 100H, 10F, 10H */
1751 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1752
1753 /* Restart MII autonegotiation */
1754 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1755 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1756 }
1757
1758 /* Enable interrupts. */
1759 SMC_SELECT_BANK(2);
1760 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1761 ioaddr + INTERRUPT);
1762}
1763
1764/*======================================================================
1765
1766 Media selection timer routine
1767
1768======================================================================*/
1769
1770static void media_check(u_long arg)
1771{
1772 struct net_device *dev = (struct net_device *) arg;
1773 struct smc_private *smc = netdev_priv(dev);
906da809 1774 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1775 u_short i, media, saved_bank;
1776 u_short link;
85e27831
K
1777 unsigned long flags;
1778
1779 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT
1780
1781 saved_bank = inw(ioaddr + BANK_SELECT);
1782
1783 if (!netif_device_present(dev))
1784 goto reschedule;
1785
1786 SMC_SELECT_BANK(2);
1787
1788 /* need MC_RESET to keep the memory consistent. errata? */
1789 if (smc->rx_ovrn) {
1790 outw(MC_RESET, ioaddr + MMU_CMD);
1791 smc->rx_ovrn = 0;
1792 }
1793 i = inw(ioaddr + INTERRUPT);
1794 SMC_SELECT_BANK(0);
1795 media = inw(ioaddr + EPH) & EPH_LINK_OK;
1796 SMC_SELECT_BANK(1);
1797 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1798
2a915157
KK
1799 SMC_SELECT_BANK(saved_bank);
1800 spin_unlock_irqrestore(&smc->lock, flags);
1801
1da177e4
LT
1802 /* Check for pending interrupt with watchdog flag set: with
1803 this, we can limp along even if the interrupt is blocked */
1804 if (smc->watchdog++ && ((i>>8) & i)) {
1805 if (!smc->fast_poll)
1806 printk(KERN_INFO "%s: interrupt(s) dropped!\n", dev->name);
2a915157 1807 local_irq_save(flags);
e363d138 1808 smc_interrupt(dev->irq, dev);
2a915157 1809 local_irq_restore(flags);
1da177e4
LT
1810 smc->fast_poll = HZ;
1811 }
1812 if (smc->fast_poll) {
1813 smc->fast_poll--;
1814 smc->media.expires = jiffies + HZ/100;
1815 add_timer(&smc->media);
1da177e4
LT
1816 return;
1817 }
1818
2a915157
KK
1819 spin_lock_irqsave(&smc->lock, flags);
1820
1821 saved_bank = inw(ioaddr + BANK_SELECT);
1822
1da177e4
LT
1823 if (smc->cfg & CFG_MII_SELECT) {
1824 if (smc->mii_if.phy_id < 0)
1825 goto reschedule;
1826
1827 SMC_SELECT_BANK(3);
1828 link = mdio_read(dev, smc->mii_if.phy_id, 1);
1829 if (!link || (link == 0xffff)) {
1830 printk(KERN_INFO "%s: MII is missing!\n", dev->name);
1831 smc->mii_if.phy_id = -1;
1832 goto reschedule;
1833 }
1834
1835 link &= 0x0004;
1836 if (link != smc->link_status) {
1837 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
1838 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1839 (link) ? "found" : "lost");
1840 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1841 ? TCR_FDUPLX : 0);
1842 if (link) {
1843 printk(KERN_INFO "%s: autonegotiation complete: "
1844 "%sbaseT-%cD selected\n", dev->name,
1845 ((p & 0x0180) ? "100" : "10"),
1846 (smc->duplex ? 'F' : 'H'));
1847 }
1848 SMC_SELECT_BANK(0);
1849 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1850 smc->link_status = link;
1851 }
1852 goto reschedule;
1853 }
1854
1855 /* Ignore collisions unless we've had no rx's recently */
4851d3aa 1856 if (time_after(jiffies, dev->last_rx + HZ)) {
1da177e4
LT
1857 if (smc->tx_err || (smc->media_status & EPH_16COL))
1858 media |= EPH_16COL;
1859 }
1860 smc->tx_err = 0;
1861
1862 if (media != smc->media_status) {
1863 if ((media & smc->media_status & 1) &&
1864 ((smc->media_status ^ media) & EPH_LINK_OK))
1865 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1866 (smc->media_status & EPH_LINK_OK ? "lost" : "found"));
1867 else if ((media & smc->media_status & 2) &&
1868 ((smc->media_status ^ media) & EPH_16COL))
1869 printk(KERN_INFO "%s: coax cable %s\n", dev->name,
1870 (media & EPH_16COL ? "problem" : "ok"));
1871 if (dev->if_port == 0) {
1872 if (media & 1) {
1873 if (media & EPH_LINK_OK)
1874 printk(KERN_INFO "%s: flipped to 10baseT\n",
1875 dev->name);
1876 else
1877 smc_set_xcvr(dev, 2);
1878 } else {
1879 if (media & EPH_16COL)
1880 smc_set_xcvr(dev, 1);
1881 else
1882 printk(KERN_INFO "%s: flipped to 10base2\n",
1883 dev->name);
1884 }
1885 }
1886 smc->media_status = media;
1887 }
1888
1889reschedule:
1890 smc->media.expires = jiffies + HZ;
1891 add_timer(&smc->media);
1892 SMC_SELECT_BANK(saved_bank);
85e27831 1893 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
1894}
1895
1896static int smc_link_ok(struct net_device *dev)
1897{
906da809 1898 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1899 struct smc_private *smc = netdev_priv(dev);
1900
1901 if (smc->cfg & CFG_MII_SELECT) {
1902 return mii_link_ok(&smc->mii_if);
1903 } else {
1904 SMC_SELECT_BANK(0);
1905 return inw(ioaddr + EPH) & EPH_LINK_OK;
1906 }
1907}
1908
1909static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1910{
1911 u16 tmp;
906da809 1912 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1913
1914 ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
1915 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1916
1917 SMC_SELECT_BANK(1);
1918 tmp = inw(ioaddr + CONFIG);
1919 ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1920 ecmd->transceiver = XCVR_INTERNAL;
1921 ecmd->speed = SPEED_10;
1922 ecmd->phy_address = ioaddr + MGMT;
1923
1924 SMC_SELECT_BANK(0);
1925 tmp = inw(ioaddr + TCR);
1926 ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1927
1928 return 0;
1929}
1930
1931static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1932{
1933 u16 tmp;
906da809 1934 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1935
1936 if (ecmd->speed != SPEED_10)
1937 return -EINVAL;
1938 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
1939 return -EINVAL;
1940 if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI)
1941 return -EINVAL;
1942 if (ecmd->transceiver != XCVR_INTERNAL)
1943 return -EINVAL;
1944
1945 if (ecmd->port == PORT_AUI)
1946 smc_set_xcvr(dev, 1);
1947 else
1948 smc_set_xcvr(dev, 0);
1949
1950 SMC_SELECT_BANK(0);
1951 tmp = inw(ioaddr + TCR);
1952 if (ecmd->duplex == DUPLEX_FULL)
1953 tmp |= TCR_FDUPLX;
1954 else
1955 tmp &= ~TCR_FDUPLX;
1956 outw(tmp, ioaddr + TCR);
1957
1958 return 0;
1959}
1960
1961static int check_if_running(struct net_device *dev)
1962{
1963 if (!netif_running(dev))
1964 return -EINVAL;
1965 return 0;
1966}
1967
1968static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1969{
1970 strcpy(info->driver, DRV_NAME);
1971 strcpy(info->version, DRV_VERSION);
1972}
1973
1974static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1975{
1976 struct smc_private *smc = netdev_priv(dev);
906da809 1977 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1978 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1979 int ret;
2a915157 1980 unsigned long flags;
1da177e4 1981
2a915157 1982 spin_lock_irqsave(&smc->lock, flags);
85e27831 1983 SMC_SELECT_BANK(3);
1da177e4
LT
1984 if (smc->cfg & CFG_MII_SELECT)
1985 ret = mii_ethtool_gset(&smc->mii_if, ecmd);
1986 else
1987 ret = smc_netdev_get_ecmd(dev, ecmd);
1da177e4 1988 SMC_SELECT_BANK(saved_bank);
2a915157 1989 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
1990 return ret;
1991}
1992
1993static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1994{
1995 struct smc_private *smc = netdev_priv(dev);
906da809 1996 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
1997 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1998 int ret;
2a915157 1999 unsigned long flags;
1da177e4 2000
2a915157 2001 spin_lock_irqsave(&smc->lock, flags);
85e27831 2002 SMC_SELECT_BANK(3);
1da177e4
LT
2003 if (smc->cfg & CFG_MII_SELECT)
2004 ret = mii_ethtool_sset(&smc->mii_if, ecmd);
2005 else
2006 ret = smc_netdev_set_ecmd(dev, ecmd);
1da177e4 2007 SMC_SELECT_BANK(saved_bank);
2a915157 2008 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
2009 return ret;
2010}
2011
2012static u32 smc_get_link(struct net_device *dev)
2013{
2014 struct smc_private *smc = netdev_priv(dev);
906da809 2015 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
2016 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2017 u32 ret;
2a915157 2018 unsigned long flags;
1da177e4 2019
2a915157 2020 spin_lock_irqsave(&smc->lock, flags);
85e27831 2021 SMC_SELECT_BANK(3);
1da177e4 2022 ret = smc_link_ok(dev);
1da177e4 2023 SMC_SELECT_BANK(saved_bank);
2a915157 2024 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
2025 return ret;
2026}
2027
1da177e4
LT
2028static int smc_nway_reset(struct net_device *dev)
2029{
2030 struct smc_private *smc = netdev_priv(dev);
2031 if (smc->cfg & CFG_MII_SELECT) {
906da809 2032 unsigned int ioaddr = dev->base_addr;
1da177e4
LT
2033 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2034 int res;
2035
2036 SMC_SELECT_BANK(3);
2037 res = mii_nway_restart(&smc->mii_if);
2038 SMC_SELECT_BANK(saved_bank);
2039
2040 return res;
2041 } else
2042 return -EOPNOTSUPP;
2043}
2044
7282d491 2045static const struct ethtool_ops ethtool_ops = {
1da177e4
LT
2046 .begin = check_if_running,
2047 .get_drvinfo = smc_get_drvinfo,
2048 .get_settings = smc_get_settings,
2049 .set_settings = smc_set_settings,
2050 .get_link = smc_get_link,
1da177e4
LT
2051 .nway_reset = smc_nway_reset,
2052};
2053
2054static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
2055{
2056 struct smc_private *smc = netdev_priv(dev);
2057 struct mii_ioctl_data *mii = if_mii(rq);
2058 int rc = 0;
2059 u16 saved_bank;
906da809 2060 unsigned int ioaddr = dev->base_addr;
2a915157 2061 unsigned long flags;
1da177e4
LT
2062
2063 if (!netif_running(dev))
2064 return -EINVAL;
2065
2a915157 2066 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT
2067 saved_bank = inw(ioaddr + BANK_SELECT);
2068 SMC_SELECT_BANK(3);
2069 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2070 SMC_SELECT_BANK(saved_bank);
2a915157 2071 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT
2072 return rc;
2073}
2074
5c672220
DB
2075static struct pcmcia_device_id smc91c92_ids[] = {
2076 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2077 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2078 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2079 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2080 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2081 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2082 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2083 PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
d277ad0e
K
2084 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2085 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
5c672220
DB
2086 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2087 PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2088 PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2089 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2090 PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2091 PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2092 PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2093 PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2094 PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
d277ad0e
K
2095 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2096 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
5c672220
DB
2097 PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2098 PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2099 PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2100 /* These conflict with other cards! */
2101 /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2102 /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2103 PCMCIA_DEVICE_NULL,
2104};
2105MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2106
1da177e4
LT
2107static struct pcmcia_driver smc91c92_cs_driver = {
2108 .owner = THIS_MODULE,
2109 .drv = {
2110 .name = "smc91c92_cs",
2111 },
15b99ac1 2112 .probe = smc91c92_probe,
cc3b4866 2113 .remove = smc91c92_detach,
5c672220 2114 .id_table = smc91c92_ids,
98e4c28b
DB
2115 .suspend = smc91c92_suspend,
2116 .resume = smc91c92_resume,
1da177e4
LT
2117};
2118
2119static int __init init_smc91c92_cs(void)
2120{
2121 return pcmcia_register_driver(&smc91c92_cs_driver);
2122}
2123
2124static void __exit exit_smc91c92_cs(void)
2125{
2126 pcmcia_unregister_driver(&smc91c92_cs_driver);
1da177e4
LT
2127}
2128
2129module_init(init_smc91c92_cs);
2130module_exit(exit_smc91c92_cs);