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[net-next-2.6.git] / drivers / net / pcmcia / smc91c92_cs.c
CommitLineData
1da177e4
LT		 1/*======================================================================
2
3 A PCMCIA ethernet driver for SMC91c92-based cards.
4
5 This driver supports Megahertz PCMCIA ethernet cards; and
6 Megahertz, Motorola, Ositech, and Psion Dacom ethernet/modem
7 multifunction cards.
8
9 Copyright (C) 1999 David A. Hinds -- dahinds@users.sourceforge.net
10
11 smc91c92_cs.c 1.122 2002/10/25 06:26:39
12
13 This driver contains code written by Donald Becker
14 (becker@scyld.com), Rowan Hughes (x-csrdh@jcu.edu.au),
15 David Hinds (dahinds@users.sourceforge.net), and Erik Stahlman
16 (erik@vt.edu). Donald wrote the SMC 91c92 code using parts of
17 Erik's SMC 91c94 driver. Rowan wrote a similar driver, and I've
18 incorporated some parts of his driver here. I (Dave) wrote most
19 of the PCMCIA glue code, and the Ositech support code. Kelly
20 Stephens (kstephen@holli.com) added support for the Motorola
21 Mariner, with help from Allen Brost.
22
23 This software may be used and distributed according to the terms of
24 the GNU General Public License, incorporated herein by reference.
25
26======================================================================*/
27
28#include <linux/module.h>
29#include <linux/kernel.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/string.h>
33#include <linux/timer.h>
34#include <linux/interrupt.h>
35#include <linux/delay.h>
36#include <linux/crc32.h>
37#include <linux/netdevice.h>
38#include <linux/etherdevice.h>
39#include <linux/skbuff.h>
40#include <linux/if_arp.h>
41#include <linux/ioport.h>
42#include <linux/ethtool.h>
43#include <linux/mii.h>
4851d3aa 44#include <linux/jiffies.h>
75bf758f 45#include <linux/firmware.h>
1da177e4 46
1da177e4
LT		 47#include <pcmcia/cs_types.h>
48#include <pcmcia/cs.h>
49#include <pcmcia/cistpl.h>
50#include <pcmcia/cisreg.h>
51#include <pcmcia/ciscode.h>
52#include <pcmcia/ds.h>
50db3fdb 53#include <pcmcia/ss.h>
1da177e4
LT		 54
55#include <asm/io.h>
56#include <asm/system.h>
57#include <asm/uaccess.h>
58
1da177e4
LT		 59/*====================================================================*/
60
f71e1309 61static const char *if_names[] = { "auto", "10baseT", "10base2"};
1da177e4 62
75bf758f
JSR		 63/* Firmware name */
64#define FIRMWARE_NAME "ositech/Xilinx7OD.bin"
65
1da177e4
LT		 66/* Module parameters */
67
68MODULE_DESCRIPTION("SMC 91c92 series PCMCIA ethernet driver");
69MODULE_LICENSE("GPL");
75bf758f 70MODULE_FIRMWARE(FIRMWARE_NAME);
1da177e4
LT		 71
72#define INT_MODULE_PARM(n, v) static int n = v; module_param(n, int, 0)
73
74/*
75 Transceiver/media type.
76 0 = auto
77 1 = 10baseT (and autoselect if #define AUTOSELECT),
78 2 = AUI/10base2,
79*/
80INT_MODULE_PARM(if_port, 0);
81
1da177e4
LT		 82
83#define DRV_NAME "smc91c92_cs"
d5b20697 84#define DRV_VERSION "1.123"
1da177e4
LT		 85
86/*====================================================================*/
87
88/* Operational parameter that usually are not changed. */
89
90/* Time in jiffies before concluding Tx hung */
91#define TX_TIMEOUT ((400*HZ)/1000)
92
93/* Maximum events (Rx packets, etc.) to handle at each interrupt. */
94#define INTR_WORK 4
95
96/* Times to check the check the chip before concluding that it doesn't
97 currently have room for another Tx packet. */
98#define MEMORY_WAIT_TIME 8
99
1da177e4 100struct smc_private {
fd238232 101 struct pcmcia_device *p_dev;
1da177e4
LT		 102 spinlock_t lock;
103 u_short manfid;
104 u_short cardid;
6fb7298c 105
1da177e4
LT		 106 dev_node_t node;
107 struct sk_buff *saved_skb;
108 int packets_waiting;
109 void __iomem *base;
110 u_short cfg;
111 struct timer_list media;
112 int watchdog, tx_err;
113 u_short media_status;
114 u_short fast_poll;
115 u_short link_status;
116 struct mii_if_info mii_if;
117 int duplex;
118 int rx_ovrn;
119};
120
121/* Special definitions for Megahertz multifunction cards */
122#define MEGAHERTZ_ISR 0x0380
123
124/* Special function registers for Motorola Mariner */
125#define MOT_LAN 0x0000
126#define MOT_UART 0x0020
127#define MOT_EEPROM 0x20
128
129#define MOT_NORMAL \
130(COR_LEVEL_REQ | COR_FUNC_ENA | COR_ADDR_DECODE | COR_IREQ_ENA)
131
132/* Special function registers for Ositech cards */
133#define OSITECH_AUI_CTL 0x0c
134#define OSITECH_PWRDOWN 0x0d
135#define OSITECH_RESET 0x0e
136#define OSITECH_ISR 0x0f
137#define OSITECH_AUI_PWR 0x0c
138#define OSITECH_RESET_ISR 0x0e
139
140#define OSI_AUI_PWR 0x40
141#define OSI_LAN_PWRDOWN 0x02
142#define OSI_MODEM_PWRDOWN 0x01
143#define OSI_LAN_RESET 0x02
144#define OSI_MODEM_RESET 0x01
145
146/* Symbolic constants for the SMC91c9* series chips, from Erik Stahlman. */
147#define BANK_SELECT 14 /* Window select register. */
148#define SMC_SELECT_BANK(x) { outw(x, ioaddr + BANK_SELECT); }
149
150/* Bank 0 registers. */
151#define TCR 0 /* transmit control register */
152#define TCR_CLEAR 0 /* do NOTHING */
153#define TCR_ENABLE 0x0001 /* if this is 1, we can transmit */
154#define TCR_PAD_EN 0x0080 /* pads short packets to 64 bytes */
155#define TCR_MONCSN 0x0400 /* Monitor Carrier. */
156#define TCR_FDUPLX 0x0800 /* Full duplex mode. */
157#define TCR_NORMAL TCR_ENABLE | TCR_PAD_EN
158
159#define EPH 2 /* Ethernet Protocol Handler report. */
160#define EPH_TX_SUC 0x0001
161#define EPH_SNGLCOL 0x0002
162#define EPH_MULCOL 0x0004
163#define EPH_LTX_MULT 0x0008
164#define EPH_16COL 0x0010
165#define EPH_SQET 0x0020
166#define EPH_LTX_BRD 0x0040
167#define EPH_TX_DEFR 0x0080
168#define EPH_LAT_COL 0x0200
169#define EPH_LOST_CAR 0x0400
170#define EPH_EXC_DEF 0x0800
171#define EPH_CTR_ROL 0x1000
172#define EPH_RX_OVRN 0x2000
173#define EPH_LINK_OK 0x4000
174#define EPH_TX_UNRN 0x8000
175#define MEMINFO 8 /* Memory Information Register */
176#define MEMCFG 10 /* Memory Configuration Register */
177
178/* Bank 1 registers. */
179#define CONFIG 0
180#define CFG_MII_SELECT 0x8000 /* 91C100 only */
181#define CFG_NO_WAIT 0x1000
182#define CFG_FULL_STEP 0x0400
183#define CFG_SET_SQLCH 0x0200
184#define CFG_AUI_SELECT 0x0100
185#define CFG_16BIT 0x0080
186#define CFG_DIS_LINK 0x0040
187#define CFG_STATIC 0x0030
188#define CFG_IRQ_SEL_1 0x0004
189#define CFG_IRQ_SEL_0 0x0002
190#define BASE_ADDR 2
191#define ADDR0 4
192#define GENERAL 10
193#define CONTROL 12
194#define CTL_STORE 0x0001
195#define CTL_RELOAD 0x0002
196#define CTL_EE_SELECT 0x0004
197#define CTL_TE_ENABLE 0x0020
198#define CTL_CR_ENABLE 0x0040
199#define CTL_LE_ENABLE 0x0080
200#define CTL_AUTO_RELEASE 0x0800
201#define CTL_POWERDOWN 0x2000
202
203/* Bank 2 registers. */
204#define MMU_CMD 0
205#define MC_ALLOC 0x20 /* or with number of 256 byte packets */
206#define MC_RESET 0x40
207#define MC_RELEASE 0x80 /* remove and release the current rx packet */
208#define MC_FREEPKT 0xA0 /* Release packet in PNR register */
209#define MC_ENQUEUE 0xC0 /* Enqueue the packet for transmit */
210#define PNR_ARR 2
211#define FIFO_PORTS 4
212#define FP_RXEMPTY 0x8000
213#define POINTER 6
214#define PTR_AUTO_INC 0x0040
215#define PTR_READ 0x2000
216#define PTR_AUTOINC 0x4000
217#define PTR_RCV 0x8000
218#define DATA_1 8
219#define INTERRUPT 12
220#define IM_RCV_INT 0x1
221#define IM_TX_INT 0x2
222#define IM_TX_EMPTY_INT 0x4
223#define IM_ALLOC_INT 0x8
224#define IM_RX_OVRN_INT 0x10
225#define IM_EPH_INT 0x20
226
227#define RCR 4
228enum RxCfg { RxAllMulti = 0x0004, RxPromisc = 0x0002,
229 RxEnable = 0x0100, RxStripCRC = 0x0200};
230#define RCR_SOFTRESET 0x8000 /* resets the chip */
231#define RCR_STRIP_CRC 0x200 /* strips CRC */
232#define RCR_ENABLE 0x100 /* IFF this is set, we can receive packets */
233#define RCR_ALMUL 0x4 /* receive all multicast packets */
234#define RCR_PROMISC 0x2 /* enable promiscuous mode */
235
236/* the normal settings for the RCR register : */
237#define RCR_NORMAL (RCR_STRIP_CRC | RCR_ENABLE)
238#define RCR_CLEAR 0x0 /* set it to a base state */
239#define COUNTER 6
240
241/* BANK 3 -- not the same values as in smc9194! */
242#define MULTICAST0 0
243#define MULTICAST2 2
244#define MULTICAST4 4
245#define MULTICAST6 6
246#define MGMT 8
247#define REVISION 0x0a
248
249/* Transmit status bits. */
250#define TS_SUCCESS 0x0001
251#define TS_16COL 0x0010
252#define TS_LATCOL 0x0200
253#define TS_LOSTCAR 0x0400
254
255/* Receive status bits. */
256#define RS_ALGNERR 0x8000
257#define RS_BADCRC 0x2000
258#define RS_ODDFRAME 0x1000
259#define RS_TOOLONG 0x0800
260#define RS_TOOSHORT 0x0400
261#define RS_MULTICAST 0x0001
262#define RS_ERRORS (RS_ALGNERR | RS_BADCRC | RS_TOOLONG | RS_TOOSHORT)
263
264#define set_bits(v, p) outw(inw(p)|(v), (p))
265#define mask_bits(v, p) outw(inw(p)&(v), (p))
266
267/*====================================================================*/
268
cc3b4866 269static void smc91c92_detach(struct pcmcia_device *p_dev);
15b99ac1 270static int smc91c92_config(struct pcmcia_device *link);
fba395ee 271static void smc91c92_release(struct pcmcia_device *link);
1da177e4
LT		 272
273static int smc_open(struct net_device *dev);
274static int smc_close(struct net_device *dev);
275static int smc_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
276static void smc_tx_timeout(struct net_device *dev);
dbf02fae
SH		 277static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
278 struct net_device *dev);
7d12e780 279static irqreturn_t smc_interrupt(int irq, void *dev_id);
1da177e4 280static void smc_rx(struct net_device *dev);
1da177e4
LT		 281static void set_rx_mode(struct net_device *dev);
282static int s9k_config(struct net_device *dev, struct ifmap *map);
283static void smc_set_xcvr(struct net_device *dev, int if_port);
284static void smc_reset(struct net_device *dev);
285static void media_check(u_long arg);
906da809 286static void mdio_sync(unsigned int addr);
1da177e4
LT		 287static int mdio_read(struct net_device *dev, int phy_id, int loc);
288static void mdio_write(struct net_device *dev, int phy_id, int loc, int value);
289static int smc_link_ok(struct net_device *dev);
7282d491 290static const struct ethtool_ops ethtool_ops;
1da177e4 291
9b31b697
SH		 292static const struct net_device_ops smc_netdev_ops = {
293 .ndo_open = smc_open,
294 .ndo_stop = smc_close,
295 .ndo_start_xmit = smc_start_xmit,
296 .ndo_tx_timeout = smc_tx_timeout,
297 .ndo_set_config = s9k_config,
298 .ndo_set_multicast_list = set_rx_mode,
299 .ndo_do_ioctl = &smc_ioctl,
300 .ndo_change_mtu = eth_change_mtu,
301 .ndo_set_mac_address = eth_mac_addr,
302 .ndo_validate_addr = eth_validate_addr,
303};
304
1da177e4
LT		 305/*======================================================================
306
307 smc91c92_attach() creates an "instance" of the driver, allocating
308 local data structures for one device. The device is registered
309 with Card Services.
310
311======================================================================*/
312
15b99ac1 313static int smc91c92_probe(struct pcmcia_device *link)
1da177e4 314{
1da177e4 315 struct smc_private *smc;
1da177e4 316 struct net_device *dev;
1da177e4 317
dd0fab5b 318 dev_dbg(&link->dev, "smc91c92_attach()\n");
1da177e4
LT		 319
320 /* Create new ethernet device */
321 dev = alloc_etherdev(sizeof(struct smc_private));
322 if (!dev)
f8cfa618 323 return -ENOMEM;
1da177e4 324 smc = netdev_priv(dev);
fba395ee 325 smc->p_dev = link;
1da177e4
LT		 326 link->priv = dev;
327
328 spin_lock_init(&smc->lock);
329 link->io.NumPorts1 = 16;
330 link->io.Attributes1 = IO_DATA_PATH_WIDTH_AUTO;
331 link->io.IOAddrLines = 4;
5fa9167a 332 link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
1da177e4 333 link->irq.Handler = &smc_interrupt;
1da177e4 334 link->conf.Attributes = CONF_ENABLE_IRQ;
1da177e4
LT		 335 link->conf.IntType = INT_MEMORY_AND_IO;
336
337 /* The SMC91c92-specific entries in the device structure. */
9b31b697 338 dev->netdev_ops = &smc_netdev_ops;
1da177e4 339 SET_ETHTOOL_OPS(dev, &ethtool_ops);
1da177e4 340 dev->watchdog_timeo = TX_TIMEOUT;
1da177e4
LT		 341
342 smc->mii_if.dev = dev;
343 smc->mii_if.mdio_read = mdio_read;
344 smc->mii_if.mdio_write = mdio_write;
345 smc->mii_if.phy_id_mask = 0x1f;
346 smc->mii_if.reg_num_mask = 0x1f;
347
15b99ac1 348 return smc91c92_config(link);
1da177e4
LT		 349} /* smc91c92_attach */
350
351/*======================================================================
352
353 This deletes a driver "instance". The device is de-registered
354 with Card Services. If it has been released, all local data
355 structures are freed. Otherwise, the structures will be freed
356 when the device is released.
357
358======================================================================*/
359
fba395ee 360static void smc91c92_detach(struct pcmcia_device *link)
1da177e4
LT		 361{
362 struct net_device *dev = link->priv;
1da177e4 363
dd0fab5b 364 dev_dbg(&link->dev, "smc91c92_detach\n");
1da177e4 365
fd238232 366 if (link->dev_node)
1da177e4
LT		 367 unregister_netdev(dev);
368
e2d40963 369 smc91c92_release(link);
1da177e4 370
1da177e4
LT		 371 free_netdev(dev);
372} /* smc91c92_detach */
373
374/*====================================================================*/
375
376static int cvt_ascii_address(struct net_device *dev, char *s)
377{
378 int i, j, da, c;
379
380 if (strlen(s) != 12)
381 return -1;
382 for (i = 0; i < 6; i++) {
383 da = 0;
384 for (j = 0; j < 2; j++) {
385 c = *s++;
386 da <<= 4;
387 da += ((c >= '0') && (c <= '9')) ?
388 (c - '0') : ((c & 0x0f) + 9);
389 }
390 dev->dev_addr[i] = da;
391 }
392 return 0;
393}
394
dddfbd82 395/*====================================================================
1da177e4
LT		 396
397 Configuration stuff for Megahertz cards
398
399 mhz_3288_power() is used to power up a 3288's ethernet chip.
400 mhz_mfc_config() handles socket setup for multifunction (1144
401 and 3288) cards. mhz_setup() gets a card's hardware ethernet
402 address.
403
404======================================================================*/
405
fba395ee 406static int mhz_3288_power(struct pcmcia_device *link)
1da177e4
LT		 407{
408 struct net_device *dev = link->priv;
409 struct smc_private *smc = netdev_priv(dev);
410 u_char tmp;
411
412 /* Read the ISR twice... */
413 readb(smc->base+MEGAHERTZ_ISR);
414 udelay(5);
415 readb(smc->base+MEGAHERTZ_ISR);
416
417 /* Pause 200ms... */
418 mdelay(200);
419
420 /* Now read and write the COR... */
421 tmp = readb(smc->base + link->conf.ConfigBase + CISREG_COR);
422 udelay(5);
423 writeb(tmp, smc->base + link->conf.ConfigBase + CISREG_COR);
424
425 return 0;
426}
427
b54bf94b
DB		 428static int mhz_mfc_config_check(struct pcmcia_device *p_dev,
429 cistpl_cftable_entry_t *cf,
8e2fc39d 430 cistpl_cftable_entry_t *dflt,
ad913c11 431 unsigned int vcc,
b54bf94b
DB		 432 void *priv_data)
433{
434 int k;
b54bf94b
DB		 435 p_dev->io.BasePort2 = cf->io.win[0].base;
436 for (k = 0; k < 0x400; k += 0x10) {
437 if (k & 0x80)
438 continue;
439 p_dev->io.BasePort1 = k ^ 0x300;
440 if (!pcmcia_request_io(p_dev, &p_dev->io))
441 return 0;
442 }
443 return -ENODEV;
444}
445
fba395ee 446static int mhz_mfc_config(struct pcmcia_device *link)
1da177e4
LT		 447{
448 struct net_device *dev = link->priv;
449 struct smc_private *smc = netdev_priv(dev);
1da177e4
LT		 450 win_req_t req;
451 memreq_t mem;
b54bf94b 452 int i;
1da177e4
LT		 453
454 link->conf.Attributes |= CONF_ENABLE_SPKR;
455 link->conf.Status = CCSR_AUDIO_ENA;
cd2e18fe 456 link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
1da177e4
LT		 457 link->io.IOAddrLines = 16;
458 link->io.Attributes2 = IO_DATA_PATH_WIDTH_8;
459 link->io.NumPorts2 = 8;
460
1da177e4
LT		 461 /* The Megahertz combo cards have modem-like CIS entries, so
462 we have to explicitly try a bunch of port combinations. */
b54bf94b 463 if (pcmcia_loop_config(link, mhz_mfc_config_check, NULL))
dddfbd82
DB		 464 return -ENODEV;
465
1da177e4
LT		 466 dev->base_addr = link->io.BasePort1;
467
468 /* Allocate a memory window, for accessing the ISR */
469 req.Attributes = WIN_DATA_WIDTH_8|WIN_MEMORY_TYPE_AM|WIN_ENABLE;
470 req.Base = req.Size = 0;
471 req.AccessSpeed = 0;
6838b03f 472 i = pcmcia_request_window(link, &req, &link->win);
4c89e88b 473 if (i != 0)
dddfbd82
DB		 474 return -ENODEV;
475
1da177e4
LT		 476 smc->base = ioremap(req.Base, req.Size);
477 mem.CardOffset = mem.Page = 0;
478 if (smc->manfid == MANFID_MOTOROLA)
479 mem.CardOffset = link->conf.ConfigBase;
868575d1 480 i = pcmcia_map_mem_page(link, link->win, &mem);
1da177e4 481
8e95a202
JP		 482 if ((i == 0) &&
483 (smc->manfid == MANFID_MEGAHERTZ) &&
484 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
485 mhz_3288_power(link);
1da177e4 486
dddfbd82 487 return 0;
1da177e4
LT		 488}
489
dddfbd82
DB		 490static int pcmcia_get_versmac(struct pcmcia_device *p_dev,
491 tuple_t *tuple,
492 void *priv)
1da177e4 493{
dddfbd82
DB		 494 struct net_device *dev = priv;
495 cisparse_t parse;
4638aef4 496
dddfbd82
DB		 497 if (pcmcia_parse_tuple(tuple, &parse))
498 return -EINVAL;
1da177e4 499
dddfbd82
DB		 500 if ((parse.version_1.ns > 3) &&
501 (cvt_ascii_address(dev,
502 (parse.version_1.str + parse.version_1.ofs[3]))))
503 return 0;
4638aef4 504
dddfbd82
DB		 505 return -EINVAL;
506};
507
fba395ee 508static int mhz_setup(struct pcmcia_device *link)
1da177e4 509{
1da177e4 510 struct net_device *dev = link->priv;
dddfbd82
DB		 511 size_t len;
512 u8 *buf;
4638aef4 513 int rc;
1da177e4
LT		 514
515 /* Read the station address from the CIS. It is stored as the last
516 (fourth) string in the Version 1 Version/ID tuple. */
7d2e8d00
DB		 517 if ((link->prod_id[3]) &&
518 (cvt_ascii_address(dev, link->prod_id[3]) == 0))
519 return 0;
520
521 /* Workarounds for broken cards start here. */
a1a98b72 522 /* Ugh -- the EM1144 card has two VERS_1 tuples!?! */
dddfbd82
DB		 523 if (!pcmcia_loop_tuple(link, CISTPL_VERS_1, pcmcia_get_versmac, dev))
524 return 0;
1da177e4
LT		 525
526 /* Another possibility: for the EM3288, in a special tuple */
4638aef4 527 rc = -1;
dddfbd82
DB		 528 len = pcmcia_get_tuple(link, 0x81, &buf);
529 if (buf && len >= 13) {
530 buf[12] = '\0';
531 if (cvt_ascii_address(dev, buf))
532 rc = 0;
533 }
534 kfree(buf);
535
536 return rc;
537};
1da177e4
LT		 538
539/*======================================================================
540
541 Configuration stuff for the Motorola Mariner
542
543 mot_config() writes directly to the Mariner configuration
544 registers because the CIS is just bogus.
545
546======================================================================*/
547
fba395ee 548static void mot_config(struct pcmcia_device *link)
1da177e4
LT		 549{
550 struct net_device *dev = link->priv;
551 struct smc_private *smc = netdev_priv(dev);
906da809
OJ		 552 unsigned int ioaddr = dev->base_addr;
553 unsigned int iouart = link->io.BasePort2;
1da177e4
LT		 554
555 /* Set UART base address and force map with COR bit 1 */
556 writeb(iouart & 0xff, smc->base + MOT_UART + CISREG_IOBASE_0);
557 writeb((iouart >> 8) & 0xff, smc->base + MOT_UART + CISREG_IOBASE_1);
558 writeb(MOT_NORMAL, smc->base + MOT_UART + CISREG_COR);
559
560 /* Set SMC base address and force map with COR bit 1 */
561 writeb(ioaddr & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_0);
562 writeb((ioaddr >> 8) & 0xff, smc->base + MOT_LAN + CISREG_IOBASE_1);
563 writeb(MOT_NORMAL, smc->base + MOT_LAN + CISREG_COR);
564
565 /* Wait for things to settle down */
566 mdelay(100);
567}
568
fba395ee 569static int mot_setup(struct pcmcia_device *link)
1da177e4
LT		 570{
571 struct net_device *dev = link->priv;
906da809 572 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 573 int i, wait, loop;
574 u_int addr;
575
576 /* Read Ethernet address from Serial EEPROM */
577
578 for (i = 0; i < 3; i++) {
579 SMC_SELECT_BANK(2);
580 outw(MOT_EEPROM + i, ioaddr + POINTER);
581 SMC_SELECT_BANK(1);
582 outw((CTL_RELOAD | CTL_EE_SELECT), ioaddr + CONTROL);
583
584 for (loop = wait = 0; loop < 200; loop++) {
585 udelay(10);
586 wait = ((CTL_RELOAD | CTL_STORE) & inw(ioaddr + CONTROL));
587 if (wait == 0) break;
588 }
589
590 if (wait)
591 return -1;
592
593 addr = inw(ioaddr + GENERAL);
594 dev->dev_addr[2*i] = addr & 0xff;
595 dev->dev_addr[2*i+1] = (addr >> 8) & 0xff;
596 }
597
598 return 0;
599}
600
601/*====================================================================*/
602
b54bf94b
DB		 603static int smc_configcheck(struct pcmcia_device *p_dev,
604 cistpl_cftable_entry_t *cf,
8e2fc39d 605 cistpl_cftable_entry_t *dflt,
ad913c11 606 unsigned int vcc,
b54bf94b
DB		 607 void *priv_data)
608{
b54bf94b
DB		 609 p_dev->io.BasePort1 = cf->io.win[0].base;
610 p_dev->io.IOAddrLines = cf->io.flags & CISTPL_IO_LINES_MASK;
611 return pcmcia_request_io(p_dev, &p_dev->io);
612}
613
fba395ee 614static int smc_config(struct pcmcia_device *link)
1da177e4
LT		 615{
616 struct net_device *dev = link->priv;
1da177e4
LT		 617 int i;
618
1da177e4 619 link->io.NumPorts1 = 16;
b54bf94b
DB		 620 i = pcmcia_loop_config(link, smc_configcheck, NULL);
621 if (!i)
622 dev->base_addr = link->io.BasePort1;
4638aef4 623
1da177e4
LT		 624 return i;
625}
626
dddfbd82 627
fba395ee 628static int smc_setup(struct pcmcia_device *link)
1da177e4 629{
1da177e4 630 struct net_device *dev = link->priv;
1da177e4
LT		 631
632 /* Check for a LAN function extension tuple */
dddfbd82
DB		 633 if (!pcmcia_get_mac_from_cis(link, dev))
634 return 0;
635
1da177e4 636 /* Try the third string in the Version 1 Version/ID tuple. */
a9606fd3 637 if (link->prod_id[2]) {
dddfbd82
DB		 638 if (cvt_ascii_address(dev, link->prod_id[2]) == 0)
639 return 0;
4638aef4 640 }
dddfbd82 641 return -1;
1da177e4
LT		 642}
643
644/*====================================================================*/
645
fba395ee 646static int osi_config(struct pcmcia_device *link)
1da177e4
LT		 647{
648 struct net_device *dev = link->priv;
906da809 649 static const unsigned int com[4] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
1da177e4
LT		 650 int i, j;
651
652 link->conf.Attributes |= CONF_ENABLE_SPKR;
653 link->conf.Status = CCSR_AUDIO_ENA;
cd2e18fe 654 link->irq.Attributes = IRQ_TYPE_DYNAMIC_SHARING;
1da177e4
LT		 655 link->io.NumPorts1 = 64;
656 link->io.Attributes2 = IO_DATA_PATH_WIDTH_8;
657 link->io.NumPorts2 = 8;
658 link->io.IOAddrLines = 16;
659
660 /* Enable Hard Decode, LAN, Modem */
661 link->conf.ConfigIndex = 0x23;
662
663 for (i = j = 0; j < 4; j++) {
664 link->io.BasePort2 = com[j];
fba395ee 665 i = pcmcia_request_io(link, &link->io);
4c89e88b
DB		 666 if (i == 0)
667 break;
1da177e4 668 }
4c89e88b 669 if (i != 0) {
1da177e4
LT		 670 /* Fallback: turn off hard decode */
671 link->conf.ConfigIndex = 0x03;
672 link->io.NumPorts2 = 0;
fba395ee 673 i = pcmcia_request_io(link, &link->io);
1da177e4
LT		 674 }
675 dev->base_addr = link->io.BasePort1 + 0x10;
676 return i;
677}
678
75bf758f
JSR		 679static int osi_load_firmware(struct pcmcia_device *link)
680{
681 const struct firmware *fw;
682 int i, err;
683
684 err = request_firmware(&fw, FIRMWARE_NAME, &link->dev);
685 if (err) {
686 pr_err("Failed to load firmware \"%s\"\n", FIRMWARE_NAME);
687 return err;
688 }
689
690 /* Download the Seven of Diamonds firmware */
691 for (i = 0; i < fw->size; i++) {
692 outb(fw->data[i], link->io.BasePort1 + 2);
693 udelay(50);
694 }
695 release_firmware(fw);
696 return err;
697}
698
dddfbd82
DB		 699static int pcmcia_osi_mac(struct pcmcia_device *p_dev,
700 tuple_t *tuple,
701 void *priv)
1da177e4 702{
dddfbd82
DB		 703 struct net_device *dev = priv;
704 int i;
1da177e4 705
dddfbd82
DB		 706 if (tuple->TupleDataLen < 8)
707 return -EINVAL;
708 if (tuple->TupleData[0] != 0x04)
709 return -EINVAL;
710 for (i = 0; i < 6; i++)
711 dev->dev_addr[i] = tuple->TupleData[i+2];
712 return 0;
713};
4638aef4 714
4638aef4 715
dddfbd82
DB		 716static int osi_setup(struct pcmcia_device *link, u_short manfid, u_short cardid)
717{
718 struct net_device *dev = link->priv;
719 int rc;
1da177e4
LT		 720
721 /* Read the station address from tuple 0x90, subtuple 0x04 */
dddfbd82
DB		 722 if (pcmcia_loop_tuple(link, 0x90, pcmcia_osi_mac, dev))
723 return -1;
1da177e4
LT		 724
725 if (((manfid == MANFID_OSITECH) &&
726 (cardid == PRODID_OSITECH_SEVEN)) ||
727 ((manfid == MANFID_PSION) &&
728 (cardid == PRODID_PSION_NET100))) {
75bf758f
JSR		 729 rc = osi_load_firmware(link);
730 if (rc)
dddfbd82 731 return rc;
1da177e4
LT		 732 } else if (manfid == MANFID_OSITECH) {
733 /* Make sure both functions are powered up */
734 set_bits(0x300, link->io.BasePort1 + OSITECH_AUI_PWR);
735 /* Now, turn on the interrupt for both card functions */
736 set_bits(0x300, link->io.BasePort1 + OSITECH_RESET_ISR);
dd0fab5b 737 dev_dbg(&link->dev, "AUI/PWR: %4.4x RESET/ISR: %4.4x\n",
1da177e4
LT		 738 inw(link->io.BasePort1 + OSITECH_AUI_PWR),
739 inw(link->io.BasePort1 + OSITECH_RESET_ISR));
740 }
dddfbd82 741 return 0;
1da177e4
LT		 742}
743
fba395ee 744static int smc91c92_suspend(struct pcmcia_device *link)
98e4c28b 745{
98e4c28b
DB		 746 struct net_device *dev = link->priv;
747
e2d40963 748 if (link->open)
4bbed523 749 netif_device_detach(dev);
98e4c28b
DB		 750
751 return 0;
752}
753
fba395ee 754static int smc91c92_resume(struct pcmcia_device *link)
98e4c28b 755{
98e4c28b
DB		 756 struct net_device *dev = link->priv;
757 struct smc_private *smc = netdev_priv(dev);
758 int i;
759
e2d40963
DB		 760 if ((smc->manfid == MANFID_MEGAHERTZ) &&
761 (smc->cardid == PRODID_MEGAHERTZ_EM3288))
762 mhz_3288_power(link);
763 if (smc->manfid == MANFID_MOTOROLA)
764 mot_config(link);
765 if ((smc->manfid == MANFID_OSITECH) &&
766 (smc->cardid != PRODID_OSITECH_SEVEN)) {
767 /* Power up the card and enable interrupts */
768 set_bits(0x0300, dev->base_addr-0x10+OSITECH_AUI_PWR);
769 set_bits(0x0300, dev->base_addr-0x10+OSITECH_RESET_ISR);
770 }
771 if (((smc->manfid == MANFID_OSITECH) &&
772 (smc->cardid == PRODID_OSITECH_SEVEN)) ||
773 ((smc->manfid == MANFID_PSION) &&
774 (smc->cardid == PRODID_PSION_NET100))) {
75bf758f
JSR		 775 i = osi_load_firmware(link);
776 if (i) {
777 pr_err("smc91c92_cs: Failed to load firmware\n");
778 return i;
98e4c28b
DB		 779 }
780 }
e2d40963
DB		 781 if (link->open) {
782 smc_reset(dev);
783 netif_device_attach(dev);
784 }
98e4c28b
DB		 785
786 return 0;
787}
788
789
1da177e4
LT		 790/*======================================================================
791
792 This verifies that the chip is some SMC91cXX variant, and returns
793 the revision code if successful. Otherwise, it returns -ENODEV.
794
795======================================================================*/
796
fba395ee 797static int check_sig(struct pcmcia_device *link)
1da177e4
LT		 798{
799 struct net_device *dev = link->priv;
906da809 800 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 801 int width;
802 u_short s;
803
804 SMC_SELECT_BANK(1);
805 if (inw(ioaddr + BANK_SELECT) >> 8 != 0x33) {
806 /* Try powering up the chip */
807 outw(0, ioaddr + CONTROL);
808 mdelay(55);
809 }
810
811 /* Try setting bus width */
812 width = (link->io.Attributes1 == IO_DATA_PATH_WIDTH_AUTO);
813 s = inb(ioaddr + CONFIG);
814 if (width)
815 s |= CFG_16BIT;
816 else
817 s &= ~CFG_16BIT;
818 outb(s, ioaddr + CONFIG);
819
820 /* Check Base Address Register to make sure bus width is OK */
821 s = inw(ioaddr + BASE_ADDR);
822 if ((inw(ioaddr + BANK_SELECT) >> 8 == 0x33) &&
823 ((s >> 8) != (s & 0xff))) {
824 SMC_SELECT_BANK(3);
825 s = inw(ioaddr + REVISION);
826 return (s & 0xff);
827 }
828
829 if (width) {
4bbed523
DB		 830 modconf_t mod = {
831 .Attributes = CONF_IO_CHANGE_WIDTH,
832 };
833 printk(KERN_INFO "smc91c92_cs: using 8-bit IO window.\n");
834
fba395ee
DB		 835 smc91c92_suspend(link);
836 pcmcia_modify_configuration(link, &mod);
837 smc91c92_resume(link);
4bbed523 838 return check_sig(link);
1da177e4
LT		 839 }
840 return -ENODEV;
841}
842
843/*======================================================================
844
845 smc91c92_config() is scheduled to run after a CARD_INSERTION event
846 is received, to configure the PCMCIA socket, and to make the
847 ethernet device available to the system.
848
849======================================================================*/
850
15b99ac1 851static int smc91c92_config(struct pcmcia_device *link)
1da177e4 852{
1da177e4
LT		 853 struct net_device *dev = link->priv;
854 struct smc_private *smc = netdev_priv(dev);
1da177e4
LT		 855 char *name;
856 int i, j, rev;
906da809 857 unsigned int ioaddr;
1da177e4
LT		 858 u_long mir;
859
dd0fab5b 860 dev_dbg(&link->dev, "smc91c92_config\n");
1da177e4 861
efd50585
DB		 862 smc->manfid = link->manf_id;
863 smc->cardid = link->card_id;
1da177e4 864
1da177e4
LT		 865 if ((smc->manfid == MANFID_OSITECH) &&
866 (smc->cardid != PRODID_OSITECH_SEVEN)) {
867 i = osi_config(link);
868 } else if ((smc->manfid == MANFID_MOTOROLA) ||
869 ((smc->manfid == MANFID_MEGAHERTZ) &&
870 ((smc->cardid == PRODID_MEGAHERTZ_VARIOUS) ||
871 (smc->cardid == PRODID_MEGAHERTZ_EM3288)))) {
872 i = mhz_mfc_config(link);
873 } else {
874 i = smc_config(link);
875 }
dd0fab5b
DB		 876 if (i)
877 goto config_failed;
1da177e4 878
fba395ee 879 i = pcmcia_request_irq(link, &link->irq);
dd0fab5b
DB		 880 if (i)
881 goto config_failed;
fba395ee 882 i = pcmcia_request_configuration(link, &link->conf);
dd0fab5b
DB		 883 if (i)
884 goto config_failed;
1da177e4
LT		 885
886 if (smc->manfid == MANFID_MOTOROLA)
887 mot_config(link);
888
889 dev->irq = link->irq.AssignedIRQ;
890
891 if ((if_port >= 0) && (if_port <= 2))
892 dev->if_port = if_port;
893 else
894 printk(KERN_NOTICE "smc91c92_cs: invalid if_port requested\n");
895
896 switch (smc->manfid) {
897 case MANFID_OSITECH:
898 case MANFID_PSION:
899 i = osi_setup(link, smc->manfid, smc->cardid); break;
900 case MANFID_SMC:
901 case MANFID_NEW_MEDIA:
902 i = smc_setup(link); break;
903 case 0x128: /* For broken Megahertz cards */
904 case MANFID_MEGAHERTZ:
905 i = mhz_setup(link); break;
906 case MANFID_MOTOROLA:
907 default: /* get the hw address from EEPROM */
908 i = mot_setup(link); break;
909 }
910
911 if (i != 0) {
912 printk(KERN_NOTICE "smc91c92_cs: Unable to find hardware address.\n");
913 goto config_undo;
914 }
915
916 smc->duplex = 0;
917 smc->rx_ovrn = 0;
918
919 rev = check_sig(link);
920 name = "???";
921 if (rev > 0)
922 switch (rev >> 4) {
923 case 3: name = "92"; break;
924 case 4: name = ((rev & 15) >= 6) ? "96" : "94"; break;
925 case 5: name = "95"; break;
926 case 7: name = "100"; break;
927 case 8: name = "100-FD"; break;
928 case 9: name = "110"; break;
929 }
930
931 ioaddr = dev->base_addr;
932 if (rev > 0) {
933 u_long mcr;
934 SMC_SELECT_BANK(0);
935 mir = inw(ioaddr + MEMINFO) & 0xff;
936 if (mir == 0xff) mir++;
937 /* Get scale factor for memory size */
938 mcr = ((rev >> 4) > 3) ? inw(ioaddr + MEMCFG) : 0x0200;
939 mir *= 128 * (1<<((mcr >> 9) & 7));
940 SMC_SELECT_BANK(1);
941 smc->cfg = inw(ioaddr + CONFIG) & ~CFG_AUI_SELECT;
942 smc->cfg |= CFG_NO_WAIT | CFG_16BIT | CFG_STATIC;
943 if (smc->manfid == MANFID_OSITECH)
944 smc->cfg |= CFG_IRQ_SEL_1 | CFG_IRQ_SEL_0;
945 if ((rev >> 4) >= 7)
946 smc->cfg |= CFG_MII_SELECT;
947 } else
948 mir = 0;
949
950 if (smc->cfg & CFG_MII_SELECT) {
951 SMC_SELECT_BANK(3);
952
953 for (i = 0; i < 32; i++) {
954 j = mdio_read(dev, i, 1);
955 if ((j != 0) && (j != 0xffff)) break;
956 }
957 smc->mii_if.phy_id = (i < 32) ? i : -1;
958
959 SMC_SELECT_BANK(0);
960 }
961
fd238232 962 link->dev_node = &smc->node;
dd2e5a15 963 SET_NETDEV_DEV(dev, &link->dev);
1da177e4
LT		 964
965 if (register_netdev(dev) != 0) {
966 printk(KERN_ERR "smc91c92_cs: register_netdev() failed\n");
fd238232 967 link->dev_node = NULL;
1da177e4
LT		 968 goto config_undo;
969 }
970
971 strcpy(smc->node.dev_name, dev->name);
972
973 printk(KERN_INFO "%s: smc91c%s rev %d: io %#3lx, irq %d, "
e174961c 974 "hw_addr %pM\n",
0795af57 975 dev->name, name, (rev & 0x0f), dev->base_addr, dev->irq,
e174961c 976 dev->dev_addr);
1da177e4
LT		 977
978 if (rev > 0) {
979 if (mir & 0x3ff)
980 printk(KERN_INFO " %lu byte", mir);
981 else
982 printk(KERN_INFO " %lu kb", mir>>10);
983 printk(" buffer, %s xcvr\n", (smc->cfg & CFG_MII_SELECT) ?
984 "MII" : if_names[dev->if_port]);
985 }
986
987 if (smc->cfg & CFG_MII_SELECT) {
988 if (smc->mii_if.phy_id != -1) {
dd0fab5b 989 dev_dbg(&link->dev, " MII transceiver at index %d, status %x.\n",
1da177e4
LT		 990 smc->mii_if.phy_id, j);
991 } else {
992 printk(KERN_NOTICE " No MII transceivers found!\n");
993 }
994 }
15b99ac1 995 return 0;
1da177e4
LT		 996
997config_undo:
998 unregister_netdev(dev);
dd0fab5b 999config_failed:
1da177e4 1000 smc91c92_release(link);
15b99ac1 1001 return -ENODEV;
1da177e4
LT		 1002} /* smc91c92_config */
1003
1004/*======================================================================
1005
1006 After a card is removed, smc91c92_release() will unregister the net
1007 device, and release the PCMCIA configuration. If the device is
1008 still open, this will be postponed until it is closed.
1009
1010======================================================================*/
1011
fba395ee 1012static void smc91c92_release(struct pcmcia_device *link)
1da177e4 1013{
dd0fab5b 1014 dev_dbg(&link->dev, "smc91c92_release\n");
5f2a71fc
DB		 1015 if (link->win) {
1016 struct net_device *dev = link->priv;
1017 struct smc_private *smc = netdev_priv(dev);
1018 iounmap(smc->base);
1019 }
fba395ee 1020 pcmcia_disable_device(link);
1da177e4
LT		 1021}
1022
1da177e4
LT		 1023/*======================================================================
1024
1025 MII interface support for SMC91cXX based cards
1026======================================================================*/
1027
1028#define MDIO_SHIFT_CLK 0x04
1029#define MDIO_DATA_OUT 0x01
1030#define MDIO_DIR_WRITE 0x08
1031#define MDIO_DATA_WRITE0 (MDIO_DIR_WRITE)
1032#define MDIO_DATA_WRITE1 (MDIO_DIR_WRITE | MDIO_DATA_OUT)
1033#define MDIO_DATA_READ 0x02
1034
906da809 1035static void mdio_sync(unsigned int addr)
1da177e4
LT		 1036{
1037 int bits;
1038 for (bits = 0; bits < 32; bits++) {
1039 outb(MDIO_DATA_WRITE1, addr);
1040 outb(MDIO_DATA_WRITE1 | MDIO_SHIFT_CLK, addr);
1041 }
1042}
1043
1044static int mdio_read(struct net_device *dev, int phy_id, int loc)
1045{
906da809 1046 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT		 1047 u_int cmd = (0x06<<10)|(phy_id<<5)|loc;
1048 int i, retval = 0;
1049
1050 mdio_sync(addr);
1051 for (i = 13; i >= 0; i--) {
1052 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1053 outb(dat, addr);
1054 outb(dat | MDIO_SHIFT_CLK, addr);
1055 }
1056 for (i = 19; i > 0; i--) {
1057 outb(0, addr);
1058 retval = (retval << 1) | ((inb(addr) & MDIO_DATA_READ) != 0);
1059 outb(MDIO_SHIFT_CLK, addr);
1060 }
1061 return (retval>>1) & 0xffff;
1062}
1063
1064static void mdio_write(struct net_device *dev, int phy_id, int loc, int value)
1065{
906da809 1066 unsigned int addr = dev->base_addr + MGMT;
1da177e4
LT		 1067 u_int cmd = (0x05<<28)|(phy_id<<23)|(loc<<18)|(1<<17)|value;
1068 int i;
1069
1070 mdio_sync(addr);
1071 for (i = 31; i >= 0; i--) {
1072 int dat = (cmd&(1<<i)) ? MDIO_DATA_WRITE1 : MDIO_DATA_WRITE0;
1073 outb(dat, addr);
1074 outb(dat | MDIO_SHIFT_CLK, addr);
1075 }
1076 for (i = 1; i >= 0; i--) {
1077 outb(0, addr);
1078 outb(MDIO_SHIFT_CLK, addr);
1079 }
1080}
1081
1082/*======================================================================
1083
1084 The driver core code, most of which should be common with a
1085 non-PCMCIA implementation.
1086
1087======================================================================*/
1088
1089#ifdef PCMCIA_DEBUG
1090static void smc_dump(struct net_device *dev)
1091{
906da809 1092 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1093 u_short i, w, save;
1094 save = inw(ioaddr + BANK_SELECT);
1095 for (w = 0; w < 4; w++) {
1096 SMC_SELECT_BANK(w);
1097 printk(KERN_DEBUG "bank %d: ", w);
1098 for (i = 0; i < 14; i += 2)
1099 printk(" %04x", inw(ioaddr + i));
1100 printk("\n");
1101 }
1102 outw(save, ioaddr + BANK_SELECT);
1103}
1104#endif
1105
1106static int smc_open(struct net_device *dev)
1107{
1108 struct smc_private *smc = netdev_priv(dev);
fba395ee 1109 struct pcmcia_device *link = smc->p_dev;
1da177e4 1110
dd0fab5b 1111 dev_dbg(&link->dev, "%s: smc_open(%p), ID/Window %4.4x.\n",
1da177e4 1112 dev->name, dev, inw(dev->base_addr + BANK_SELECT));
dd0fab5b
DB		 1113#ifdef PCMCIA_DEBUG
1114 smc_dump(dev);
1da177e4
LT		 1115#endif
1116
1117 /* Check that the PCMCIA card is still here. */
9940ec36 1118 if (!pcmcia_dev_present(link))
1da177e4
LT		 1119 return -ENODEV;
1120 /* Physical device present signature. */
1121 if (check_sig(link) < 0) {
1122 printk("smc91c92_cs: Yikes! Bad chip signature!\n");
1123 return -ENODEV;
1124 }
1125 link->open++;
1126
1127 netif_start_queue(dev);
1128 smc->saved_skb = NULL;
1129 smc->packets_waiting = 0;
1130
1131 smc_reset(dev);
1132 init_timer(&smc->media);
1133 smc->media.function = &media_check;
1134 smc->media.data = (u_long) dev;
1135 smc->media.expires = jiffies + HZ;
1136 add_timer(&smc->media);
1137
1138 return 0;
1139} /* smc_open */
1140
1141/*====================================================================*/
1142
1143static int smc_close(struct net_device *dev)
1144{
1145 struct smc_private *smc = netdev_priv(dev);
fba395ee 1146 struct pcmcia_device *link = smc->p_dev;
906da809 1147 unsigned int ioaddr = dev->base_addr;
1da177e4 1148
dd0fab5b 1149 dev_dbg(&link->dev, "%s: smc_close(), status %4.4x.\n",
1da177e4
LT		 1150 dev->name, inw(ioaddr + BANK_SELECT));
1151
1152 netif_stop_queue(dev);
1153
1154 /* Shut off all interrupts, and turn off the Tx and Rx sections.
1155 Don't bother to check for chip present. */
1156 SMC_SELECT_BANK(2); /* Nominally paranoia, but do no assume... */
1157 outw(0, ioaddr + INTERRUPT);
1158 SMC_SELECT_BANK(0);
1159 mask_bits(0xff00, ioaddr + RCR);
1160 mask_bits(0xff00, ioaddr + TCR);
1161
1162 /* Put the chip into power-down mode. */
1163 SMC_SELECT_BANK(1);
1164 outw(CTL_POWERDOWN, ioaddr + CONTROL );
1165
1166 link->open--;
1167 del_timer_sync(&smc->media);
1168
1169 return 0;
1170} /* smc_close */
1171
1172/*======================================================================
1173
1174 Transfer a packet to the hardware and trigger the packet send.
1175 This may be called at either from either the Tx queue code
1176 or the interrupt handler.
1177
1178======================================================================*/
1179
1180static void smc_hardware_send_packet(struct net_device * dev)
1181{
1182 struct smc_private *smc = netdev_priv(dev);
1183 struct sk_buff *skb = smc->saved_skb;
906da809 1184 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1185 u_char packet_no;
1186
1187 if (!skb) {
1188 printk(KERN_ERR "%s: In XMIT with no packet to send.\n", dev->name);
1189 return;
1190 }
1191
1192 /* There should be a packet slot waiting. */
1193 packet_no = inw(ioaddr + PNR_ARR) >> 8;
1194 if (packet_no & 0x80) {
1195 /* If not, there is a hardware problem! Likely an ejected card. */
1196 printk(KERN_WARNING "%s: 91c92 hardware Tx buffer allocation"
1197 " failed, status %#2.2x.\n", dev->name, packet_no);
1198 dev_kfree_skb_irq(skb);
1199 smc->saved_skb = NULL;
1200 netif_start_queue(dev);
1201 return;
1202 }
1203
6fb7298c 1204 dev->stats.tx_bytes += skb->len;
1da177e4
LT		 1205 /* The card should use the just-allocated buffer. */
1206 outw(packet_no, ioaddr + PNR_ARR);
1207 /* point to the beginning of the packet */
1208 outw(PTR_AUTOINC , ioaddr + POINTER);
1209
1210 /* Send the packet length (+6 for status, length and ctl byte)
1211 and the status word (set to zeros). */
1212 {
1213 u_char *buf = skb->data;
1214 u_int length = skb->len; /* The chip will pad to ethernet min. */
1215
dd0fab5b 1216 pr_debug("%s: Trying to xmit packet of length %d.\n",
1da177e4
LT		 1217 dev->name, length);
1218
1219 /* send the packet length: +6 for status word, length, and ctl */
1220 outw(0, ioaddr + DATA_1);
1221 outw(length + 6, ioaddr + DATA_1);
1222 outsw(ioaddr + DATA_1, buf, length >> 1);
1223
1224 /* The odd last byte, if there is one, goes in the control word. */
1225 outw((length & 1) ? 0x2000 | buf[length-1] : 0, ioaddr + DATA_1);
1226 }
1227
1228 /* Enable the Tx interrupts, both Tx (TxErr) and TxEmpty. */
1229 outw(((IM_TX_INT|IM_TX_EMPTY_INT)<<8) |
1230 (inw(ioaddr + INTERRUPT) & 0xff00),
1231 ioaddr + INTERRUPT);
1232
1233 /* The chip does the rest of the work. */
1234 outw(MC_ENQUEUE , ioaddr + MMU_CMD);
1235
1236 smc->saved_skb = NULL;
1237 dev_kfree_skb_irq(skb);
1238 dev->trans_start = jiffies;
1239 netif_start_queue(dev);
1240 return;
1241}
1242
1243/*====================================================================*/
1244
1245static void smc_tx_timeout(struct net_device *dev)
1246{
1247 struct smc_private *smc = netdev_priv(dev);
906da809 1248 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1249
1250 printk(KERN_NOTICE "%s: SMC91c92 transmit timed out, "
1251 "Tx_status %2.2x status %4.4x.\n",
1252 dev->name, inw(ioaddr)&0xff, inw(ioaddr + 2));
6fb7298c 1253 dev->stats.tx_errors++;
1da177e4
LT		 1254 smc_reset(dev);
1255 dev->trans_start = jiffies;
1256 smc->saved_skb = NULL;
1257 netif_wake_queue(dev);
1258}
1259
dbf02fae
SH		 1260static netdev_tx_t smc_start_xmit(struct sk_buff *skb,
1261 struct net_device *dev)
1da177e4
LT		 1262{
1263 struct smc_private *smc = netdev_priv(dev);
906da809 1264 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1265 u_short num_pages;
1266 short time_out, ir;
85e27831 1267 unsigned long flags;
1da177e4
LT		 1268
1269 netif_stop_queue(dev);
1270
dd0fab5b 1271 pr_debug("%s: smc_start_xmit(length = %d) called,"
1da177e4
LT		 1272 " status %4.4x.\n", dev->name, skb->len, inw(ioaddr + 2));
1273
1274 if (smc->saved_skb) {
1275 /* THIS SHOULD NEVER HAPPEN. */
6fb7298c 1276 dev->stats.tx_aborted_errors++;
1da177e4
LT		 1277 printk(KERN_DEBUG "%s: Internal error -- sent packet while busy.\n",
1278 dev->name);
5b548140 1279 return NETDEV_TX_BUSY;
1da177e4
LT		 1280 }
1281 smc->saved_skb = skb;
1282
1283 num_pages = skb->len >> 8;
1284
1285 if (num_pages > 7) {
1286 printk(KERN_ERR "%s: Far too big packet error.\n", dev->name);
1287 dev_kfree_skb (skb);
1288 smc->saved_skb = NULL;
6fb7298c 1289 dev->stats.tx_dropped++;
6ed10654 1290 return NETDEV_TX_OK; /* Do not re-queue this packet. */
1da177e4
LT		 1291 }
1292 /* A packet is now waiting. */
1293 smc->packets_waiting++;
1294
85e27831 1295 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 1296 SMC_SELECT_BANK(2); /* Paranoia, we should always be in window 2 */
1297
1298 /* need MC_RESET to keep the memory consistent. errata? */
1299 if (smc->rx_ovrn) {
1300 outw(MC_RESET, ioaddr + MMU_CMD);
1301 smc->rx_ovrn = 0;
1302 }
1303
1304 /* Allocate the memory; send the packet now if we win. */
1305 outw(MC_ALLOC | num_pages, ioaddr + MMU_CMD);
1306 for (time_out = MEMORY_WAIT_TIME; time_out >= 0; time_out--) {
1307 ir = inw(ioaddr+INTERRUPT);
1308 if (ir & IM_ALLOC_INT) {
1309 /* Acknowledge the interrupt, send the packet. */
1310 outw((ir&0xff00) | IM_ALLOC_INT, ioaddr + INTERRUPT);
1311 smc_hardware_send_packet(dev); /* Send the packet now.. */
85e27831 1312 spin_unlock_irqrestore(&smc->lock, flags);
6ed10654 1313 return NETDEV_TX_OK;
1da177e4
LT		 1314 }
1315 }
1316
1317 /* Otherwise defer until the Tx-space-allocated interrupt. */
dd0fab5b 1318 pr_debug("%s: memory allocation deferred.\n", dev->name);
1da177e4 1319 outw((IM_ALLOC_INT << 8) | (ir & 0xff00), ioaddr + INTERRUPT);
85e27831 1320 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4 1321
6ed10654 1322 return NETDEV_TX_OK;
1da177e4
LT		 1323}
1324
1325/*======================================================================
1326
1327 Handle a Tx anomolous event. Entered while in Window 2.
1328
1329======================================================================*/
1330
1331static void smc_tx_err(struct net_device * dev)
1332{
1333 struct smc_private *smc = netdev_priv(dev);
906da809 1334 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1335 int saved_packet = inw(ioaddr + PNR_ARR) & 0xff;
1336 int packet_no = inw(ioaddr + FIFO_PORTS) & 0x7f;
1337 int tx_status;
1338
1339 /* select this as the packet to read from */
1340 outw(packet_no, ioaddr + PNR_ARR);
1341
1342 /* read the first word from this packet */
1343 outw(PTR_AUTOINC | PTR_READ | 0, ioaddr + POINTER);
1344
1345 tx_status = inw(ioaddr + DATA_1);
1346
6fb7298c
SH		 1347 dev->stats.tx_errors++;
1348 if (tx_status & TS_LOSTCAR) dev->stats.tx_carrier_errors++;
1349 if (tx_status & TS_LATCOL) dev->stats.tx_window_errors++;
1da177e4 1350 if (tx_status & TS_16COL) {
6fb7298c 1351 dev->stats.tx_aborted_errors++;
1da177e4
LT		 1352 smc->tx_err++;
1353 }
1354
1355 if (tx_status & TS_SUCCESS) {
1356 printk(KERN_NOTICE "%s: Successful packet caused error "
1357 "interrupt?\n", dev->name);
1358 }
1359 /* re-enable transmit */
1360 SMC_SELECT_BANK(0);
1361 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1362 SMC_SELECT_BANK(2);
1363
1364 outw(MC_FREEPKT, ioaddr + MMU_CMD); /* Free the packet memory. */
1365
1366 /* one less packet waiting for me */
1367 smc->packets_waiting--;
1368
1369 outw(saved_packet, ioaddr + PNR_ARR);
1370 return;
1371}
1372
1373/*====================================================================*/
1374
1375static void smc_eph_irq(struct net_device *dev)
1376{
1377 struct smc_private *smc = netdev_priv(dev);
906da809 1378 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1379 u_short card_stats, ephs;
1380
1381 SMC_SELECT_BANK(0);
1382 ephs = inw(ioaddr + EPH);
dd0fab5b 1383 pr_debug("%s: Ethernet protocol handler interrupt, status"
1da177e4
LT		 1384 " %4.4x.\n", dev->name, ephs);
1385 /* Could be a counter roll-over warning: update stats. */
1386 card_stats = inw(ioaddr + COUNTER);
1387 /* single collisions */
6fb7298c 1388 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT		 1389 card_stats >>= 4;
1390 /* multiple collisions */
6fb7298c 1391 dev->stats.collisions += card_stats & 0xF;
1da177e4
LT		 1392#if 0 /* These are for when linux supports these statistics */
1393 card_stats >>= 4; /* deferred */
1394 card_stats >>= 4; /* excess deferred */
1395#endif
1396 /* If we had a transmit error we must re-enable the transmitter. */
1397 outw(inw(ioaddr + TCR) | TCR_ENABLE | smc->duplex, ioaddr + TCR);
1398
1399 /* Clear a link error interrupt. */
1400 SMC_SELECT_BANK(1);
1401 outw(CTL_AUTO_RELEASE | 0x0000, ioaddr + CONTROL);
1402 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1403 ioaddr + CONTROL);
1404 SMC_SELECT_BANK(2);
1405}
1406
1407/*====================================================================*/
1408
7d12e780 1409static irqreturn_t smc_interrupt(int irq, void *dev_id)
1da177e4
LT		 1410{
1411 struct net_device *dev = dev_id;
1412 struct smc_private *smc = netdev_priv(dev);
906da809 1413 unsigned int ioaddr;
1da177e4
LT		 1414 u_short saved_bank, saved_pointer, mask, status;
1415 unsigned int handled = 1;
1416 char bogus_cnt = INTR_WORK; /* Work we are willing to do. */
1417
1418 if (!netif_device_present(dev))
1419 return IRQ_NONE;
1420
1421 ioaddr = dev->base_addr;
1422
dd0fab5b 1423 pr_debug("%s: SMC91c92 interrupt %d at %#x.\n", dev->name,
1da177e4
LT		 1424 irq, ioaddr);
1425
85e27831 1426 spin_lock(&smc->lock);
1da177e4
LT		 1427 smc->watchdog = 0;
1428 saved_bank = inw(ioaddr + BANK_SELECT);
1429 if ((saved_bank & 0xff00) != 0x3300) {
1430 /* The device does not exist -- the card could be off-line, or
1431 maybe it has been ejected. */
dd0fab5b 1432 pr_debug("%s: SMC91c92 interrupt %d for non-existent"
1da177e4
LT		 1433 "/ejected device.\n", dev->name, irq);
1434 handled = 0;
1435 goto irq_done;
1436 }
1437
1438 SMC_SELECT_BANK(2);
1439 saved_pointer = inw(ioaddr + POINTER);
1440 mask = inw(ioaddr + INTERRUPT) >> 8;
1441 /* clear all interrupts */
1442 outw(0, ioaddr + INTERRUPT);
1443
1444 do { /* read the status flag, and mask it */
1445 status = inw(ioaddr + INTERRUPT) & 0xff;
dd0fab5b 1446 pr_debug("%s: Status is %#2.2x (mask %#2.2x).\n", dev->name,
1da177e4
LT		 1447 status, mask);
1448 if ((status & mask) == 0) {
1449 if (bogus_cnt == INTR_WORK)
1450 handled = 0;
1451 break;
1452 }
1453 if (status & IM_RCV_INT) {
1454 /* Got a packet(s). */
1455 smc_rx(dev);
1456 }
1457 if (status & IM_TX_INT) {
1458 smc_tx_err(dev);
1459 outw(IM_TX_INT, ioaddr + INTERRUPT);
1460 }
1461 status &= mask;
1462 if (status & IM_TX_EMPTY_INT) {
1463 outw(IM_TX_EMPTY_INT, ioaddr + INTERRUPT);
1464 mask &= ~IM_TX_EMPTY_INT;
6fb7298c 1465 dev->stats.tx_packets += smc->packets_waiting;
1da177e4
LT		 1466 smc->packets_waiting = 0;
1467 }
1468 if (status & IM_ALLOC_INT) {
1469 /* Clear this interrupt so it doesn't happen again */
1470 mask &= ~IM_ALLOC_INT;
1471
1472 smc_hardware_send_packet(dev);
1473
1474 /* enable xmit interrupts based on this */
1475 mask |= (IM_TX_EMPTY_INT | IM_TX_INT);
1476
1477 /* and let the card send more packets to me */
1478 netif_wake_queue(dev);
1479 }
1480 if (status & IM_RX_OVRN_INT) {
6fb7298c
SH		 1481 dev->stats.rx_errors++;
1482 dev->stats.rx_fifo_errors++;
1da177e4
LT		 1483 if (smc->duplex)
1484 smc->rx_ovrn = 1; /* need MC_RESET outside smc_interrupt */
1485 outw(IM_RX_OVRN_INT, ioaddr + INTERRUPT);
1486 }
1487 if (status & IM_EPH_INT)
1488 smc_eph_irq(dev);
1489 } while (--bogus_cnt);
1490
dd0fab5b 1491 pr_debug(" Restoring saved registers mask %2.2x bank %4.4x"
1da177e4
LT		 1492 " pointer %4.4x.\n", mask, saved_bank, saved_pointer);
1493
1494 /* restore state register */
1495 outw((mask<<8), ioaddr + INTERRUPT);
1496 outw(saved_pointer, ioaddr + POINTER);
1497 SMC_SELECT_BANK(saved_bank);
1498
dd0fab5b 1499 pr_debug("%s: Exiting interrupt IRQ%d.\n", dev->name, irq);
1da177e4
LT		 1500
1501irq_done:
1502
1503 if ((smc->manfid == MANFID_OSITECH) &&
1504 (smc->cardid != PRODID_OSITECH_SEVEN)) {
1505 /* Retrigger interrupt if needed */
1506 mask_bits(0x00ff, ioaddr-0x10+OSITECH_RESET_ISR);
1507 set_bits(0x0300, ioaddr-0x10+OSITECH_RESET_ISR);
1508 }
1509 if (smc->manfid == MANFID_MOTOROLA) {
1510 u_char cor;
1511 cor = readb(smc->base + MOT_UART + CISREG_COR);
1512 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_UART + CISREG_COR);
1513 writeb(cor, smc->base + MOT_UART + CISREG_COR);
1514 cor = readb(smc->base + MOT_LAN + CISREG_COR);
1515 writeb(cor & ~COR_IREQ_ENA, smc->base + MOT_LAN + CISREG_COR);
1516 writeb(cor, smc->base + MOT_LAN + CISREG_COR);
1517 }
1518#ifdef DOES_NOT_WORK
1519 if (smc->base != NULL) { /* Megahertz MFC's */
1520 readb(smc->base+MEGAHERTZ_ISR);
1521 readb(smc->base+MEGAHERTZ_ISR);
1522 }
1523#endif
85e27831 1524 spin_unlock(&smc->lock);
1da177e4
LT		 1525 return IRQ_RETVAL(handled);
1526}
1527
1528/*====================================================================*/
1529
1530static void smc_rx(struct net_device *dev)
1531{
906da809 1532 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1533 int rx_status;
1534 int packet_length; /* Caution: not frame length, rather words
1535 to transfer from the chip. */
1536
1537 /* Assertion: we are in Window 2. */
1538
1539 if (inw(ioaddr + FIFO_PORTS) & FP_RXEMPTY) {
1540 printk(KERN_ERR "%s: smc_rx() with nothing on Rx FIFO.\n",
1541 dev->name);
1542 return;
1543 }
1544
1545 /* Reset the read pointer, and read the status and packet length. */
1546 outw(PTR_READ | PTR_RCV | PTR_AUTOINC, ioaddr + POINTER);
1547 rx_status = inw(ioaddr + DATA_1);
1548 packet_length = inw(ioaddr + DATA_1) & 0x07ff;
1549
dd0fab5b 1550 pr_debug("%s: Receive status %4.4x length %d.\n",
1da177e4
LT		 1551 dev->name, rx_status, packet_length);
1552
1553 if (!(rx_status & RS_ERRORS)) {
1554 /* do stuff to make a new packet */
1555 struct sk_buff *skb;
1556
1557 /* Note: packet_length adds 5 or 6 extra bytes here! */
1558 skb = dev_alloc_skb(packet_length+2);
1559
1560 if (skb == NULL) {
dd0fab5b 1561 pr_debug("%s: Low memory, packet dropped.\n", dev->name);
6fb7298c 1562 dev->stats.rx_dropped++;
1da177e4
LT		 1563 outw(MC_RELEASE, ioaddr + MMU_CMD);
1564 return;
1565 }
1566
1567 packet_length -= (rx_status & RS_ODDFRAME ? 5 : 6);
1568 skb_reserve(skb, 2);
1569 insw(ioaddr+DATA_1, skb_put(skb, packet_length),
1570 (packet_length+1)>>1);
1571 skb->protocol = eth_type_trans(skb, dev);
1572
1da177e4
LT		 1573 netif_rx(skb);
1574 dev->last_rx = jiffies;
6fb7298c
SH		 1575 dev->stats.rx_packets++;
1576 dev->stats.rx_bytes += packet_length;
1da177e4 1577 if (rx_status & RS_MULTICAST)
6fb7298c 1578 dev->stats.multicast++;
1da177e4
LT		 1579 } else {
1580 /* error ... */
6fb7298c 1581 dev->stats.rx_errors++;
1da177e4 1582
6fb7298c 1583 if (rx_status & RS_ALGNERR) dev->stats.rx_frame_errors++;
1da177e4 1584 if (rx_status & (RS_TOOSHORT | RS_TOOLONG))
6fb7298c
SH		 1585 dev->stats.rx_length_errors++;
1586 if (rx_status & RS_BADCRC) dev->stats.rx_crc_errors++;
1da177e4
LT		 1587 }
1588 /* Let the MMU free the memory of this packet. */
1589 outw(MC_RELEASE, ioaddr + MMU_CMD);
1590
1591 return;
1592}
1593
1da177e4
LT		 1594/*======================================================================
1595
1596 Set the receive mode.
1597
1598 This routine is used by both the protocol level to notify us of
1599 promiscuous/multicast mode changes, and by the open/reset code to
1600 initialize the Rx registers. We always set the multicast list and
1601 leave the receiver running.
1602
1603======================================================================*/
1604
1605static void set_rx_mode(struct net_device *dev)
1606{
906da809 1607 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1608 struct smc_private *smc = netdev_priv(dev);
1609 u_int multicast_table[ 2 ] = { 0, };
1610 unsigned long flags;
1611 u_short rx_cfg_setting;
1612
1613 if (dev->flags & IFF_PROMISC) {
1da177e4
LT		 1614 rx_cfg_setting = RxStripCRC | RxEnable | RxPromisc | RxAllMulti;
1615 } else if (dev->flags & IFF_ALLMULTI)
1616 rx_cfg_setting = RxStripCRC | RxEnable | RxAllMulti;
1617 else {
4cd24eaf 1618 if (!netdev_mc_empty(dev)) {
91fea585
JP		 1619 struct dev_mc_list *mc_addr;
1620
1621 netdev_for_each_mc_addr(mc_addr, dev) {
1622 u_int position = ether_crc(6, mc_addr->dmi_addr);
1623#ifndef final_version /* Verify multicast address. */
1624 if ((mc_addr->dmi_addr[0] & 1) == 0)
1625 continue;
1626#endif
1627 multicast_table[position >> 29] |= 1 << ((position >> 26) & 7);
1628 }
1da177e4
LT		 1629 }
1630 rx_cfg_setting = RxStripCRC | RxEnable;
1631 }
1632
1633 /* Load MC table and Rx setting into the chip without interrupts. */
1634 spin_lock_irqsave(&smc->lock, flags);
1635 SMC_SELECT_BANK(3);
1636 outl(multicast_table[0], ioaddr + MULTICAST0);
1637 outl(multicast_table[1], ioaddr + MULTICAST4);
1638 SMC_SELECT_BANK(0);
1639 outw(rx_cfg_setting, ioaddr + RCR);
1640 SMC_SELECT_BANK(2);
1641 spin_unlock_irqrestore(&smc->lock, flags);
1642
1643 return;
1644}
1645
1646/*======================================================================
1647
1648 Senses when a card's config changes. Here, it's coax or TP.
1649
1650======================================================================*/
1651
1652static int s9k_config(struct net_device *dev, struct ifmap *map)
1653{
1654 struct smc_private *smc = netdev_priv(dev);
1655 if ((map->port != (u_char)(-1)) && (map->port != dev->if_port)) {
1656 if (smc->cfg & CFG_MII_SELECT)
1657 return -EOPNOTSUPP;
1658 else if (map->port > 2)
1659 return -EINVAL;
1660 dev->if_port = map->port;
1661 printk(KERN_INFO "%s: switched to %s port\n",
1662 dev->name, if_names[dev->if_port]);
1663 smc_reset(dev);
1664 }
1665 return 0;
1666}
1667
1668/*======================================================================
1669
1670 Reset the chip, reloading every register that might be corrupted.
1671
1672======================================================================*/
1673
1674/*
1675 Set transceiver type, perhaps to something other than what the user
1676 specified in dev->if_port.
1677*/
1678static void smc_set_xcvr(struct net_device *dev, int if_port)
1679{
1680 struct smc_private *smc = netdev_priv(dev);
906da809 1681 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1682 u_short saved_bank;
1683
1684 saved_bank = inw(ioaddr + BANK_SELECT);
1685 SMC_SELECT_BANK(1);
1686 if (if_port == 2) {
1687 outw(smc->cfg | CFG_AUI_SELECT, ioaddr + CONFIG);
1688 if ((smc->manfid == MANFID_OSITECH) &&
1689 (smc->cardid != PRODID_OSITECH_SEVEN))
1690 set_bits(OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1691 smc->media_status = ((dev->if_port == 0) ? 0x0001 : 0x0002);
1692 } else {
1693 outw(smc->cfg, ioaddr + CONFIG);
1694 if ((smc->manfid == MANFID_OSITECH) &&
1695 (smc->cardid != PRODID_OSITECH_SEVEN))
1696 mask_bits(~OSI_AUI_PWR, ioaddr - 0x10 + OSITECH_AUI_PWR);
1697 smc->media_status = ((dev->if_port == 0) ? 0x0012 : 0x4001);
1698 }
1699 SMC_SELECT_BANK(saved_bank);
1700}
1701
1702static void smc_reset(struct net_device *dev)
1703{
906da809 1704 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1705 struct smc_private *smc = netdev_priv(dev);
1706 int i;
1707
dd0fab5b 1708 pr_debug("%s: smc91c92 reset called.\n", dev->name);
1da177e4
LT		 1709
1710 /* The first interaction must be a write to bring the chip out
1711 of sleep mode. */
1712 SMC_SELECT_BANK(0);
1713 /* Reset the chip. */
1714 outw(RCR_SOFTRESET, ioaddr + RCR);
1715 udelay(10);
1716
1717 /* Clear the transmit and receive configuration registers. */
1718 outw(RCR_CLEAR, ioaddr + RCR);
1719 outw(TCR_CLEAR, ioaddr + TCR);
1720
1721 /* Set the Window 1 control, configuration and station addr registers.
1722 No point in writing the I/O base register ;-> */
1723 SMC_SELECT_BANK(1);
d6e05edc 1724 /* Automatically release successfully transmitted packets,
1da177e4
LT		 1725 Accept link errors, counter and Tx error interrupts. */
1726 outw(CTL_AUTO_RELEASE | CTL_TE_ENABLE | CTL_CR_ENABLE,
1727 ioaddr + CONTROL);
1728 smc_set_xcvr(dev, dev->if_port);
1729 if ((smc->manfid == MANFID_OSITECH) &&
1730 (smc->cardid != PRODID_OSITECH_SEVEN))
1731 outw((dev->if_port == 2 ? OSI_AUI_PWR : 0) |
1732 (inw(ioaddr-0x10+OSITECH_AUI_PWR) & 0xff00),
1733 ioaddr - 0x10 + OSITECH_AUI_PWR);
1734
1735 /* Fill in the physical address. The databook is wrong about the order! */
1736 for (i = 0; i < 6; i += 2)
1737 outw((dev->dev_addr[i+1]<<8)+dev->dev_addr[i],
1738 ioaddr + ADDR0 + i);
1739
1740 /* Reset the MMU */
1741 SMC_SELECT_BANK(2);
1742 outw(MC_RESET, ioaddr + MMU_CMD);
1743 outw(0, ioaddr + INTERRUPT);
1744
1745 /* Re-enable the chip. */
1746 SMC_SELECT_BANK(0);
1747 outw(((smc->cfg & CFG_MII_SELECT) ? 0 : TCR_MONCSN) |
1748 TCR_ENABLE | TCR_PAD_EN | smc->duplex, ioaddr + TCR);
1749 set_rx_mode(dev);
1750
1751 if (smc->cfg & CFG_MII_SELECT) {
1752 SMC_SELECT_BANK(3);
1753
1754 /* Reset MII */
1755 mdio_write(dev, smc->mii_if.phy_id, 0, 0x8000);
1756
1757 /* Advertise 100F, 100H, 10F, 10H */
1758 mdio_write(dev, smc->mii_if.phy_id, 4, 0x01e1);
1759
1760 /* Restart MII autonegotiation */
1761 mdio_write(dev, smc->mii_if.phy_id, 0, 0x0000);
1762 mdio_write(dev, smc->mii_if.phy_id, 0, 0x1200);
1763 }
1764
1765 /* Enable interrupts. */
1766 SMC_SELECT_BANK(2);
1767 outw((IM_EPH_INT | IM_RX_OVRN_INT | IM_RCV_INT) << 8,
1768 ioaddr + INTERRUPT);
1769}
1770
1771/*======================================================================
1772
1773 Media selection timer routine
1774
1775======================================================================*/
1776
1777static void media_check(u_long arg)
1778{
1779 struct net_device *dev = (struct net_device *) arg;
1780 struct smc_private *smc = netdev_priv(dev);
906da809 1781 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1782 u_short i, media, saved_bank;
1783 u_short link;
85e27831
K		 1784 unsigned long flags;
1785
1786 spin_lock_irqsave(&smc->lock, flags);
1da177e4
LT		 1787
1788 saved_bank = inw(ioaddr + BANK_SELECT);
1789
1790 if (!netif_device_present(dev))
1791 goto reschedule;
1792
1793 SMC_SELECT_BANK(2);
1794
1795 /* need MC_RESET to keep the memory consistent. errata? */
1796 if (smc->rx_ovrn) {
1797 outw(MC_RESET, ioaddr + MMU_CMD);
1798 smc->rx_ovrn = 0;
1799 }
1800 i = inw(ioaddr + INTERRUPT);
1801 SMC_SELECT_BANK(0);
1802 media = inw(ioaddr + EPH) & EPH_LINK_OK;
1803 SMC_SELECT_BANK(1);
1804 media |= (inw(ioaddr + CONFIG) & CFG_AUI_SELECT) ? 2 : 1;
1805
1806 /* Check for pending interrupt with watchdog flag set: with
1807 this, we can limp along even if the interrupt is blocked */
1808 if (smc->watchdog++ && ((i>>8) & i)) {
1809 if (!smc->fast_poll)
1810 printk(KERN_INFO "%s: interrupt(s) dropped!\n", dev->name);
e363d138 1811 smc_interrupt(dev->irq, dev);
1da177e4
LT		 1812 smc->fast_poll = HZ;
1813 }
1814 if (smc->fast_poll) {
1815 smc->fast_poll--;
1816 smc->media.expires = jiffies + HZ/100;
1817 add_timer(&smc->media);
1818 SMC_SELECT_BANK(saved_bank);
85e27831 1819 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1820 return;
1821 }
1822
1823 if (smc->cfg & CFG_MII_SELECT) {
1824 if (smc->mii_if.phy_id < 0)
1825 goto reschedule;
1826
1827 SMC_SELECT_BANK(3);
1828 link = mdio_read(dev, smc->mii_if.phy_id, 1);
1829 if (!link || (link == 0xffff)) {
1830 printk(KERN_INFO "%s: MII is missing!\n", dev->name);
1831 smc->mii_if.phy_id = -1;
1832 goto reschedule;
1833 }
1834
1835 link &= 0x0004;
1836 if (link != smc->link_status) {
1837 u_short p = mdio_read(dev, smc->mii_if.phy_id, 5);
1838 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1839 (link) ? "found" : "lost");
1840 smc->duplex = (((p & 0x0100) || ((p & 0x1c0) == 0x40))
1841 ? TCR_FDUPLX : 0);
1842 if (link) {
1843 printk(KERN_INFO "%s: autonegotiation complete: "
1844 "%sbaseT-%cD selected\n", dev->name,
1845 ((p & 0x0180) ? "100" : "10"),
1846 (smc->duplex ? 'F' : 'H'));
1847 }
1848 SMC_SELECT_BANK(0);
1849 outw(inw(ioaddr + TCR) | smc->duplex, ioaddr + TCR);
1850 smc->link_status = link;
1851 }
1852 goto reschedule;
1853 }
1854
1855 /* Ignore collisions unless we've had no rx's recently */
4851d3aa 1856 if (time_after(jiffies, dev->last_rx + HZ)) {
1da177e4
LT		 1857 if (smc->tx_err || (smc->media_status & EPH_16COL))
1858 media |= EPH_16COL;
1859 }
1860 smc->tx_err = 0;
1861
1862 if (media != smc->media_status) {
1863 if ((media & smc->media_status & 1) &&
1864 ((smc->media_status ^ media) & EPH_LINK_OK))
1865 printk(KERN_INFO "%s: %s link beat\n", dev->name,
1866 (smc->media_status & EPH_LINK_OK ? "lost" : "found"));
1867 else if ((media & smc->media_status & 2) &&
1868 ((smc->media_status ^ media) & EPH_16COL))
1869 printk(KERN_INFO "%s: coax cable %s\n", dev->name,
1870 (media & EPH_16COL ? "problem" : "ok"));
1871 if (dev->if_port == 0) {
1872 if (media & 1) {
1873 if (media & EPH_LINK_OK)
1874 printk(KERN_INFO "%s: flipped to 10baseT\n",
1875 dev->name);
1876 else
1877 smc_set_xcvr(dev, 2);
1878 } else {
1879 if (media & EPH_16COL)
1880 smc_set_xcvr(dev, 1);
1881 else
1882 printk(KERN_INFO "%s: flipped to 10base2\n",
1883 dev->name);
1884 }
1885 }
1886 smc->media_status = media;
1887 }
1888
1889reschedule:
1890 smc->media.expires = jiffies + HZ;
1891 add_timer(&smc->media);
1892 SMC_SELECT_BANK(saved_bank);
85e27831 1893 spin_unlock_irqrestore(&smc->lock, flags);
1da177e4
LT		 1894}
1895
1896static int smc_link_ok(struct net_device *dev)
1897{
906da809 1898 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1899 struct smc_private *smc = netdev_priv(dev);
1900
1901 if (smc->cfg & CFG_MII_SELECT) {
1902 return mii_link_ok(&smc->mii_if);
1903 } else {
1904 SMC_SELECT_BANK(0);
1905 return inw(ioaddr + EPH) & EPH_LINK_OK;
1906 }
1907}
1908
1909static int smc_netdev_get_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1910{
1911 u16 tmp;
906da809 1912 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1913
1914 ecmd->supported = (SUPPORTED_TP | SUPPORTED_AUI |
1915 SUPPORTED_10baseT_Half | SUPPORTED_10baseT_Full);
1916
1917 SMC_SELECT_BANK(1);
1918 tmp = inw(ioaddr + CONFIG);
1919 ecmd->port = (tmp & CFG_AUI_SELECT) ? PORT_AUI : PORT_TP;
1920 ecmd->transceiver = XCVR_INTERNAL;
1921 ecmd->speed = SPEED_10;
1922 ecmd->phy_address = ioaddr + MGMT;
1923
1924 SMC_SELECT_BANK(0);
1925 tmp = inw(ioaddr + TCR);
1926 ecmd->duplex = (tmp & TCR_FDUPLX) ? DUPLEX_FULL : DUPLEX_HALF;
1927
1928 return 0;
1929}
1930
1931static int smc_netdev_set_ecmd(struct net_device *dev, struct ethtool_cmd *ecmd)
1932{
1933 u16 tmp;
906da809 1934 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1935
1936 if (ecmd->speed != SPEED_10)
1937 return -EINVAL;
1938 if (ecmd->duplex != DUPLEX_HALF && ecmd->duplex != DUPLEX_FULL)
1939 return -EINVAL;
1940 if (ecmd->port != PORT_TP && ecmd->port != PORT_AUI)
1941 return -EINVAL;
1942 if (ecmd->transceiver != XCVR_INTERNAL)
1943 return -EINVAL;
1944
1945 if (ecmd->port == PORT_AUI)
1946 smc_set_xcvr(dev, 1);
1947 else
1948 smc_set_xcvr(dev, 0);
1949
1950 SMC_SELECT_BANK(0);
1951 tmp = inw(ioaddr + TCR);
1952 if (ecmd->duplex == DUPLEX_FULL)
1953 tmp |= TCR_FDUPLX;
1954 else
1955 tmp &= ~TCR_FDUPLX;
1956 outw(tmp, ioaddr + TCR);
1957
1958 return 0;
1959}
1960
1961static int check_if_running(struct net_device *dev)
1962{
1963 if (!netif_running(dev))
1964 return -EINVAL;
1965 return 0;
1966}
1967
1968static void smc_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1969{
1970 strcpy(info->driver, DRV_NAME);
1971 strcpy(info->version, DRV_VERSION);
1972}
1973
1974static int smc_get_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1975{
1976 struct smc_private *smc = netdev_priv(dev);
906da809 1977 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1978 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1979 int ret;
1980
1da177e4 1981 spin_lock_irq(&smc->lock);
85e27831 1982 SMC_SELECT_BANK(3);
1da177e4
LT		 1983 if (smc->cfg & CFG_MII_SELECT)
1984 ret = mii_ethtool_gset(&smc->mii_if, ecmd);
1985 else
1986 ret = smc_netdev_get_ecmd(dev, ecmd);
1da177e4 1987 SMC_SELECT_BANK(saved_bank);
85e27831 1988 spin_unlock_irq(&smc->lock);
1da177e4
LT		 1989 return ret;
1990}
1991
1992static int smc_set_settings(struct net_device *dev, struct ethtool_cmd *ecmd)
1993{
1994 struct smc_private *smc = netdev_priv(dev);
906da809 1995 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 1996 u16 saved_bank = inw(ioaddr + BANK_SELECT);
1997 int ret;
1998
1da177e4 1999 spin_lock_irq(&smc->lock);
85e27831 2000 SMC_SELECT_BANK(3);
1da177e4
LT		 2001 if (smc->cfg & CFG_MII_SELECT)
2002 ret = mii_ethtool_sset(&smc->mii_if, ecmd);
2003 else
2004 ret = smc_netdev_set_ecmd(dev, ecmd);
1da177e4 2005 SMC_SELECT_BANK(saved_bank);
85e27831 2006 spin_unlock_irq(&smc->lock);
1da177e4
LT		 2007 return ret;
2008}
2009
2010static u32 smc_get_link(struct net_device *dev)
2011{
2012 struct smc_private *smc = netdev_priv(dev);
906da809 2013 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 2014 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2015 u32 ret;
2016
1da177e4 2017 spin_lock_irq(&smc->lock);
85e27831 2018 SMC_SELECT_BANK(3);
1da177e4 2019 ret = smc_link_ok(dev);
1da177e4 2020 SMC_SELECT_BANK(saved_bank);
85e27831 2021 spin_unlock_irq(&smc->lock);
1da177e4
LT		 2022 return ret;
2023}
2024
1da177e4
LT		 2025static int smc_nway_reset(struct net_device *dev)
2026{
2027 struct smc_private *smc = netdev_priv(dev);
2028 if (smc->cfg & CFG_MII_SELECT) {
906da809 2029 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 2030 u16 saved_bank = inw(ioaddr + BANK_SELECT);
2031 int res;
2032
2033 SMC_SELECT_BANK(3);
2034 res = mii_nway_restart(&smc->mii_if);
2035 SMC_SELECT_BANK(saved_bank);
2036
2037 return res;
2038 } else
2039 return -EOPNOTSUPP;
2040}
2041
7282d491 2042static const struct ethtool_ops ethtool_ops = {
1da177e4
LT		 2043 .begin = check_if_running,
2044 .get_drvinfo = smc_get_drvinfo,
2045 .get_settings = smc_get_settings,
2046 .set_settings = smc_set_settings,
2047 .get_link = smc_get_link,
1da177e4
LT		 2048 .nway_reset = smc_nway_reset,
2049};
2050
2051static int smc_ioctl (struct net_device *dev, struct ifreq *rq, int cmd)
2052{
2053 struct smc_private *smc = netdev_priv(dev);
2054 struct mii_ioctl_data *mii = if_mii(rq);
2055 int rc = 0;
2056 u16 saved_bank;
906da809 2057 unsigned int ioaddr = dev->base_addr;
1da177e4
LT		 2058
2059 if (!netif_running(dev))
2060 return -EINVAL;
2061
2062 spin_lock_irq(&smc->lock);
2063 saved_bank = inw(ioaddr + BANK_SELECT);
2064 SMC_SELECT_BANK(3);
2065 rc = generic_mii_ioctl(&smc->mii_if, mii, cmd, NULL);
2066 SMC_SELECT_BANK(saved_bank);
2067 spin_unlock_irq(&smc->lock);
2068 return rc;
2069}
2070
5c672220
DB		 2071static struct pcmcia_device_id smc91c92_ids[] = {
2072 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0109, 0x0501),
2073 PCMCIA_PFC_DEVICE_MANF_CARD(0, 0x0140, 0x000a),
2074 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3288", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x04cd2988, 0x46a52d63),
2075 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "CC/XJEM3336", "DATA/FAX/CELL ETHERNET MODEM", 0xf510db04, 0x0143b773, 0x46a52d63),
2076 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "EM1144T", "PCMCIA MODEM", 0xf510db04, 0x856d66c8, 0xbd6c43ef),
2077 PCMCIA_PFC_DEVICE_PROD_ID123(0, "MEGAHERTZ", "XJEM1144/CCEM1144", "PCMCIA MODEM", 0xf510db04, 0x52d21e1e, 0xbd6c43ef),
2078 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Gateway 2000", "XJEM3336", 0xdd9989be, 0x662c394c),
2079 PCMCIA_PFC_DEVICE_PROD_ID12(0, "MEGAHERTZ", "XJEM1144/CCEM1144", 0xf510db04, 0x52d21e1e),
d277ad0e
K		 2080 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Diamonds Modem+Ethernet", 0xc2f80cd, 0x656947b9),
2081 PCMCIA_PFC_DEVICE_PROD_ID12(0, "Ositech", "Trumpcard:Jack of Hearts Modem+Ethernet", 0xc2f80cd, 0xdc9ba5ed),
5c672220
DB		 2082 PCMCIA_MFC_DEVICE_MANF_CARD(0, 0x016c, 0x0020),
2083 PCMCIA_DEVICE_MANF_CARD(0x016c, 0x0023),
2084 PCMCIA_DEVICE_PROD_ID123("BASICS by New Media Corporation", "Ethernet", "SMC91C94", 0x23c78a9d, 0x00b2e941, 0xcef397fb),
2085 PCMCIA_DEVICE_PROD_ID12("ARGOSY", "Fast Ethernet PCCard", 0x78f308dc, 0xdcea68bc),
2086 PCMCIA_DEVICE_PROD_ID12("dit Co., Ltd.", "PC Card-10/100BTX", 0xe59365c8, 0x6a2161d1),
2087 PCMCIA_DEVICE_PROD_ID12("DYNALINK", "L100C", 0x6a26d1cf, 0xc16ce9c5),
2088 PCMCIA_DEVICE_PROD_ID12("Farallon", "Farallon Enet", 0x58d93fc4, 0x244734e9),
2089 PCMCIA_DEVICE_PROD_ID12("Megahertz", "CC10BT/2", 0x33234748, 0x3c95b953),
2090 PCMCIA_DEVICE_PROD_ID12("MELCO/SMC", "LPC-TX", 0xa2cd8e6d, 0x42da662a),
d277ad0e
K		 2091 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Four of Diamonds Ethernet", 0xc2f80cd, 0xb3466314),
2092 PCMCIA_DEVICE_PROD_ID12("Ositech", "Trumpcard:Seven of Diamonds Ethernet", 0xc2f80cd, 0x194b650a),
5c672220
DB		 2093 PCMCIA_DEVICE_PROD_ID12("PCMCIA", "Fast Ethernet PCCard", 0x281f1c5d, 0xdcea68bc),
2094 PCMCIA_DEVICE_PROD_ID12("Psion", "10Mb Ethernet", 0x4ef00b21, 0x844be9e9),
2095 PCMCIA_DEVICE_PROD_ID12("SMC", "EtherEZ Ethernet 8020", 0xc4f8b18b, 0x4a0eeb2d),
2096 /* These conflict with other cards! */
2097 /* PCMCIA_DEVICE_MANF_CARD(0x0186, 0x0100), */
2098 /* PCMCIA_DEVICE_MANF_CARD(0x8a01, 0xc1ab), */
2099 PCMCIA_DEVICE_NULL,
2100};
2101MODULE_DEVICE_TABLE(pcmcia, smc91c92_ids);
2102
1da177e4
LT		 2103static struct pcmcia_driver smc91c92_cs_driver = {
2104 .owner = THIS_MODULE,
2105 .drv = {
2106 .name = "smc91c92_cs",
2107 },
15b99ac1 2108 .probe = smc91c92_probe,
cc3b4866 2109 .remove = smc91c92_detach,
5c672220 2110 .id_table = smc91c92_ids,
98e4c28b
DB		 2111 .suspend = smc91c92_suspend,
2112 .resume = smc91c92_resume,
1da177e4
LT		 2113};
2114
2115static int __init init_smc91c92_cs(void)
2116{
2117 return pcmcia_register_driver(&smc91c92_cs_driver);
2118}
2119
2120static void __exit exit_smc91c92_cs(void)
2121{
2122 pcmcia_unregister_driver(&smc91c92_cs_driver);
1da177e4
LT		 2123}
2124
2125module_init(init_smc91c92_cs);
2126module_exit(exit_smc91c92_cs);
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