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[net-next-2.6.git] / drivers / net / ixgbevf / ixgbevf_main.c
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92915f71
GR		 1/*******************************************************************************
2
3 Intel 82599 Virtual Function driver
4 Copyright(c) 1999 - 2009 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
24 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
25
26*******************************************************************************/
27
28
29/******************************************************************************
30 Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
31******************************************************************************/
32#include <linux/types.h>
33#include <linux/module.h>
34#include <linux/pci.h>
35#include <linux/netdevice.h>
36#include <linux/vmalloc.h>
37#include <linux/string.h>
38#include <linux/in.h>
39#include <linux/ip.h>
40#include <linux/tcp.h>
41#include <linux/ipv6.h>
5a0e3ad6 42#include <linux/slab.h>
92915f71
GR		 43#include <net/checksum.h>
44#include <net/ip6_checksum.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47
48#include "ixgbevf.h"
49
50char ixgbevf_driver_name[] = "ixgbevf";
51static const char ixgbevf_driver_string[] =
52 "Intel(R) 82599 Virtual Function";
53
54#define DRV_VERSION "1.0.0-k0"
55const char ixgbevf_driver_version[] = DRV_VERSION;
56static char ixgbevf_copyright[] = "Copyright (c) 2009 Intel Corporation.";
57
58static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
59 [board_82599_vf] = &ixgbevf_vf_info,
60};
61
62/* ixgbevf_pci_tbl - PCI Device ID Table
63 *
64 * Wildcard entries (PCI_ANY_ID) should come last
65 * Last entry must be all 0s
66 *
67 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
68 * Class, Class Mask, private data (not used) }
69 */
70static struct pci_device_id ixgbevf_pci_tbl[] = {
71 {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF),
72 board_82599_vf},
73
74 /* required last entry */
75 {0, }
76};
77MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
78
79MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
80MODULE_DESCRIPTION("Intel(R) 82599 Virtual Function Driver");
81MODULE_LICENSE("GPL");
82MODULE_VERSION(DRV_VERSION);
83
84#define DEFAULT_DEBUG_LEVEL_SHIFT 3
85
86/* forward decls */
87static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector);
88static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
89 u32 itr_reg);
90
91static inline void ixgbevf_release_rx_desc(struct ixgbe_hw *hw,
92 struct ixgbevf_ring *rx_ring,
93 u32 val)
94{
95 /*
96 * Force memory writes to complete before letting h/w
97 * know there are new descriptors to fetch. (Only
98 * applicable for weak-ordered memory model archs,
99 * such as IA-64).
100 */
101 wmb();
102 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(rx_ring->reg_idx), val);
103}
104
105/*
106 * ixgbe_set_ivar - set the IVAR registers, mapping interrupt causes to vectors
107 * @adapter: pointer to adapter struct
108 * @direction: 0 for Rx, 1 for Tx, -1 for other causes
109 * @queue: queue to map the corresponding interrupt to
110 * @msix_vector: the vector to map to the corresponding queue
111 *
112 */
113static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
114 u8 queue, u8 msix_vector)
115{
116 u32 ivar, index;
117 struct ixgbe_hw *hw = &adapter->hw;
118 if (direction == -1) {
119 /* other causes */
120 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
121 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
122 ivar &= ~0xFF;
123 ivar |= msix_vector;
124 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
125 } else {
126 /* tx or rx causes */
127 msix_vector |= IXGBE_IVAR_ALLOC_VAL;
128 index = ((16 * (queue & 1)) + (8 * direction));
129 ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
130 ivar &= ~(0xFF << index);
131 ivar |= (msix_vector << index);
132 IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
133 }
134}
135
136static void ixgbevf_unmap_and_free_tx_resource(struct ixgbevf_adapter *adapter,
137 struct ixgbevf_tx_buffer
138 *tx_buffer_info)
139{
140 if (tx_buffer_info->dma) {
141 if (tx_buffer_info->mapped_as_page)
142 pci_unmap_page(adapter->pdev,
143 tx_buffer_info->dma,
144 tx_buffer_info->length,
145 PCI_DMA_TODEVICE);
146 else
147 pci_unmap_single(adapter->pdev,
148 tx_buffer_info->dma,
149 tx_buffer_info->length,
150 PCI_DMA_TODEVICE);
151 tx_buffer_info->dma = 0;
152 }
153 if (tx_buffer_info->skb) {
154 dev_kfree_skb_any(tx_buffer_info->skb);
155 tx_buffer_info->skb = NULL;
156 }
157 tx_buffer_info->time_stamp = 0;
158 /* tx_buffer_info must be completely set up in the transmit path */
159}
160
161static inline bool ixgbevf_check_tx_hang(struct ixgbevf_adapter *adapter,
162 struct ixgbevf_ring *tx_ring,
163 unsigned int eop)
164{
165 struct ixgbe_hw *hw = &adapter->hw;
166 u32 head, tail;
167
168 /* Detect a transmit hang in hardware, this serializes the
169 * check with the clearing of time_stamp and movement of eop */
170 head = readl(hw->hw_addr + tx_ring->head);
171 tail = readl(hw->hw_addr + tx_ring->tail);
172 adapter->detect_tx_hung = false;
173 if ((head != tail) &&
174 tx_ring->tx_buffer_info[eop].time_stamp &&
175 time_after(jiffies, tx_ring->tx_buffer_info[eop].time_stamp + HZ)) {
176 /* detected Tx unit hang */
177 union ixgbe_adv_tx_desc *tx_desc;
178 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
179 printk(KERN_ERR "Detected Tx Unit Hang\n"
180 " Tx Queue <%d>\n"
181 " TDH, TDT <%x>, <%x>\n"
182 " next_to_use <%x>\n"
183 " next_to_clean <%x>\n"
184 "tx_buffer_info[next_to_clean]\n"
185 " time_stamp <%lx>\n"
186 " jiffies <%lx>\n",
187 tx_ring->queue_index,
188 head, tail,
189 tx_ring->next_to_use, eop,
190 tx_ring->tx_buffer_info[eop].time_stamp, jiffies);
191 return true;
192 }
193
194 return false;
195}
196
197#define IXGBE_MAX_TXD_PWR 14
198#define IXGBE_MAX_DATA_PER_TXD (1 << IXGBE_MAX_TXD_PWR)
199
200/* Tx Descriptors needed, worst case */
201#define TXD_USE_COUNT(S) (((S) >> IXGBE_MAX_TXD_PWR) + \
202 (((S) & (IXGBE_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
203#ifdef MAX_SKB_FRAGS
204#define DESC_NEEDED (TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD) /* skb->data */ + \
205 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1) /* for context */
206#else
207#define DESC_NEEDED TXD_USE_COUNT(IXGBE_MAX_DATA_PER_TXD)
208#endif
209
210static void ixgbevf_tx_timeout(struct net_device *netdev);
211
212/**
213 * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
214 * @adapter: board private structure
215 * @tx_ring: tx ring to clean
216 **/
217static bool ixgbevf_clean_tx_irq(struct ixgbevf_adapter *adapter,
218 struct ixgbevf_ring *tx_ring)
219{
220 struct net_device *netdev = adapter->netdev;
221 struct ixgbe_hw *hw = &adapter->hw;
222 union ixgbe_adv_tx_desc *tx_desc, *eop_desc;
223 struct ixgbevf_tx_buffer *tx_buffer_info;
224 unsigned int i, eop, count = 0;
225 unsigned int total_bytes = 0, total_packets = 0;
226
227 i = tx_ring->next_to_clean;
228 eop = tx_ring->tx_buffer_info[i].next_to_watch;
229 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
230
231 while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
232 (count < tx_ring->work_limit)) {
233 bool cleaned = false;
234 for ( ; !cleaned; count++) {
235 struct sk_buff *skb;
236 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
237 tx_buffer_info = &tx_ring->tx_buffer_info[i];
238 cleaned = (i == eop);
239 skb = tx_buffer_info->skb;
240
241 if (cleaned && skb) {
242 unsigned int segs, bytecount;
243
244 /* gso_segs is currently only valid for tcp */
245 segs = skb_shinfo(skb)->gso_segs ?: 1;
246 /* multiply data chunks by size of headers */
247 bytecount = ((segs - 1) * skb_headlen(skb)) +
248 skb->len;
249 total_packets += segs;
250 total_bytes += bytecount;
251 }
252
253 ixgbevf_unmap_and_free_tx_resource(adapter,
254 tx_buffer_info);
255
256 tx_desc->wb.status = 0;
257
258 i++;
259 if (i == tx_ring->count)
260 i = 0;
261 }
262
263 eop = tx_ring->tx_buffer_info[i].next_to_watch;
264 eop_desc = IXGBE_TX_DESC_ADV(*tx_ring, eop);
265 }
266
267 tx_ring->next_to_clean = i;
268
269#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
270 if (unlikely(count && netif_carrier_ok(netdev) &&
271 (IXGBE_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))) {
272 /* Make sure that anybody stopping the queue after this
273 * sees the new next_to_clean.
274 */
275 smp_mb();
276#ifdef HAVE_TX_MQ
277 if (__netif_subqueue_stopped(netdev, tx_ring->queue_index) &&
278 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
279 netif_wake_subqueue(netdev, tx_ring->queue_index);
280 ++adapter->restart_queue;
281 }
282#else
283 if (netif_queue_stopped(netdev) &&
284 !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
285 netif_wake_queue(netdev);
286 ++adapter->restart_queue;
287 }
288#endif
289 }
290
291 if (adapter->detect_tx_hung) {
292 if (ixgbevf_check_tx_hang(adapter, tx_ring, i)) {
293 /* schedule immediate reset if we believe we hung */
294 printk(KERN_INFO
295 "tx hang %d detected, resetting adapter\n",
296 adapter->tx_timeout_count + 1);
297 ixgbevf_tx_timeout(adapter->netdev);
298 }
299 }
300
301 /* re-arm the interrupt */
302 if ((count >= tx_ring->work_limit) &&
303 (!test_bit(__IXGBEVF_DOWN, &adapter->state))) {
304 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, tx_ring->v_idx);
305 }
306
307 tx_ring->total_bytes += total_bytes;
308 tx_ring->total_packets += total_packets;
309
310 adapter->net_stats.tx_bytes += total_bytes;
311 adapter->net_stats.tx_packets += total_packets;
312
313 return (count < tx_ring->work_limit);
314}
315
316/**
317 * ixgbevf_receive_skb - Send a completed packet up the stack
318 * @q_vector: structure containing interrupt and ring information
319 * @skb: packet to send up
320 * @status: hardware indication of status of receive
321 * @rx_ring: rx descriptor ring (for a specific queue) to setup
322 * @rx_desc: rx descriptor
323 **/
324static void ixgbevf_receive_skb(struct ixgbevf_q_vector *q_vector,
325 struct sk_buff *skb, u8 status,
326 struct ixgbevf_ring *ring,
327 union ixgbe_adv_rx_desc *rx_desc)
328{
329 struct ixgbevf_adapter *adapter = q_vector->adapter;
330 bool is_vlan = (status & IXGBE_RXD_STAT_VP);
331 u16 tag = le16_to_cpu(rx_desc->wb.upper.vlan);
332 int ret;
333
334 if (!(adapter->flags & IXGBE_FLAG_IN_NETPOLL)) {
335 if (adapter->vlgrp && is_vlan)
336 vlan_gro_receive(&q_vector->napi,
337 adapter->vlgrp,
338 tag, skb);
339 else
340 napi_gro_receive(&q_vector->napi, skb);
341 } else {
342 if (adapter->vlgrp && is_vlan)
343 ret = vlan_hwaccel_rx(skb, adapter->vlgrp, tag);
344 else
345 ret = netif_rx(skb);
346 }
347}
348
349/**
350 * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
351 * @adapter: address of board private structure
352 * @status_err: hardware indication of status of receive
353 * @skb: skb currently being received and modified
354 **/
355static inline void ixgbevf_rx_checksum(struct ixgbevf_adapter *adapter,
356 u32 status_err, struct sk_buff *skb)
357{
358 skb->ip_summed = CHECKSUM_NONE;
359
360 /* Rx csum disabled */
361 if (!(adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED))
362 return;
363
364 /* if IP and error */
365 if ((status_err & IXGBE_RXD_STAT_IPCS) &&
366 (status_err & IXGBE_RXDADV_ERR_IPE)) {
367 adapter->hw_csum_rx_error++;
368 return;
369 }
370
371 if (!(status_err & IXGBE_RXD_STAT_L4CS))
372 return;
373
374 if (status_err & IXGBE_RXDADV_ERR_TCPE) {
375 adapter->hw_csum_rx_error++;
376 return;
377 }
378
379 /* It must be a TCP or UDP packet with a valid checksum */
380 skb->ip_summed = CHECKSUM_UNNECESSARY;
381 adapter->hw_csum_rx_good++;
382}
383
384/**
385 * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
386 * @adapter: address of board private structure
387 **/
388static void ixgbevf_alloc_rx_buffers(struct ixgbevf_adapter *adapter,
389 struct ixgbevf_ring *rx_ring,
390 int cleaned_count)
391{
392 struct pci_dev *pdev = adapter->pdev;
393 union ixgbe_adv_rx_desc *rx_desc;
394 struct ixgbevf_rx_buffer *bi;
395 struct sk_buff *skb;
396 unsigned int i;
397 unsigned int bufsz = rx_ring->rx_buf_len + NET_IP_ALIGN;
398
399 i = rx_ring->next_to_use;
400 bi = &rx_ring->rx_buffer_info[i];
401
402 while (cleaned_count--) {
403 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
404
405 if (!bi->page_dma &&
406 (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED)) {
407 if (!bi->page) {
408 bi->page = netdev_alloc_page(adapter->netdev);
409 if (!bi->page) {
410 adapter->alloc_rx_page_failed++;
411 goto no_buffers;
412 }
413 bi->page_offset = 0;
414 } else {
415 /* use a half page if we're re-using */
416 bi->page_offset ^= (PAGE_SIZE / 2);
417 }
418
419 bi->page_dma = pci_map_page(pdev, bi->page,
420 bi->page_offset,
421 (PAGE_SIZE / 2),
422 PCI_DMA_FROMDEVICE);
423 }
424
425 skb = bi->skb;
426 if (!skb) {
427 skb = netdev_alloc_skb(adapter->netdev,
428 bufsz);
429
430 if (!skb) {
431 adapter->alloc_rx_buff_failed++;
432 goto no_buffers;
433 }
434
435 /*
436 * Make buffer alignment 2 beyond a 16 byte boundary
437 * this will result in a 16 byte aligned IP header after
438 * the 14 byte MAC header is removed
439 */
440 skb_reserve(skb, NET_IP_ALIGN);
441
442 bi->skb = skb;
443 }
444 if (!bi->dma) {
445 bi->dma = pci_map_single(pdev, skb->data,
446 rx_ring->rx_buf_len,
447 PCI_DMA_FROMDEVICE);
448 }
449 /* Refresh the desc even if buffer_addrs didn't change because
450 * each write-back erases this info. */
451 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
452 rx_desc->read.pkt_addr = cpu_to_le64(bi->page_dma);
453 rx_desc->read.hdr_addr = cpu_to_le64(bi->dma);
454 } else {
455 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
456 }
457
458 i++;
459 if (i == rx_ring->count)
460 i = 0;
461 bi = &rx_ring->rx_buffer_info[i];
462 }
463
464no_buffers:
465 if (rx_ring->next_to_use != i) {
466 rx_ring->next_to_use = i;
467 if (i-- == 0)
468 i = (rx_ring->count - 1);
469
470 ixgbevf_release_rx_desc(&adapter->hw, rx_ring, i);
471 }
472}
473
474static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
475 u64 qmask)
476{
477 u32 mask;
478 struct ixgbe_hw *hw = &adapter->hw;
479
480 mask = (qmask & 0xFFFFFFFF);
481 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
482}
483
484static inline u16 ixgbevf_get_hdr_info(union ixgbe_adv_rx_desc *rx_desc)
485{
486 return rx_desc->wb.lower.lo_dword.hs_rss.hdr_info;
487}
488
489static inline u16 ixgbevf_get_pkt_info(union ixgbe_adv_rx_desc *rx_desc)
490{
491 return rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
492}
493
494static bool ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
495 struct ixgbevf_ring *rx_ring,
496 int *work_done, int work_to_do)
497{
498 struct ixgbevf_adapter *adapter = q_vector->adapter;
499 struct pci_dev *pdev = adapter->pdev;
500 union ixgbe_adv_rx_desc *rx_desc, *next_rxd;
501 struct ixgbevf_rx_buffer *rx_buffer_info, *next_buffer;
502 struct sk_buff *skb;
503 unsigned int i;
504 u32 len, staterr;
505 u16 hdr_info;
506 bool cleaned = false;
507 int cleaned_count = 0;
508 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
509
510 i = rx_ring->next_to_clean;
511 rx_desc = IXGBE_RX_DESC_ADV(*rx_ring, i);
512 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
513 rx_buffer_info = &rx_ring->rx_buffer_info[i];
514
515 while (staterr & IXGBE_RXD_STAT_DD) {
516 u32 upper_len = 0;
517 if (*work_done >= work_to_do)
518 break;
519 (*work_done)++;
520
521 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
522 hdr_info = le16_to_cpu(ixgbevf_get_hdr_info(rx_desc));
523 len = (hdr_info & IXGBE_RXDADV_HDRBUFLEN_MASK) >>
524 IXGBE_RXDADV_HDRBUFLEN_SHIFT;
525 if (hdr_info & IXGBE_RXDADV_SPH)
526 adapter->rx_hdr_split++;
527 if (len > IXGBEVF_RX_HDR_SIZE)
528 len = IXGBEVF_RX_HDR_SIZE;
529 upper_len = le16_to_cpu(rx_desc->wb.upper.length);
530 } else {
531 len = le16_to_cpu(rx_desc->wb.upper.length);
532 }
533 cleaned = true;
534 skb = rx_buffer_info->skb;
535 prefetch(skb->data - NET_IP_ALIGN);
536 rx_buffer_info->skb = NULL;
537
538 if (rx_buffer_info->dma) {
539 pci_unmap_single(pdev, rx_buffer_info->dma,
540 rx_ring->rx_buf_len,
541 PCI_DMA_FROMDEVICE);
542 rx_buffer_info->dma = 0;
543 skb_put(skb, len);
544 }
545
546 if (upper_len) {
547 pci_unmap_page(pdev, rx_buffer_info->page_dma,
548 PAGE_SIZE / 2, PCI_DMA_FROMDEVICE);
549 rx_buffer_info->page_dma = 0;
550 skb_fill_page_desc(skb, skb_shinfo(skb)->nr_frags,
551 rx_buffer_info->page,
552 rx_buffer_info->page_offset,
553 upper_len);
554
555 if ((rx_ring->rx_buf_len > (PAGE_SIZE / 2)) ||
556 (page_count(rx_buffer_info->page) != 1))
557 rx_buffer_info->page = NULL;
558 else
559 get_page(rx_buffer_info->page);
560
561 skb->len += upper_len;
562 skb->data_len += upper_len;
563 skb->truesize += upper_len;
564 }
565
566 i++;
567 if (i == rx_ring->count)
568 i = 0;
569
570 next_rxd = IXGBE_RX_DESC_ADV(*rx_ring, i);
571 prefetch(next_rxd);
572 cleaned_count++;
573
574 next_buffer = &rx_ring->rx_buffer_info[i];
575
576 if (!(staterr & IXGBE_RXD_STAT_EOP)) {
577 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
578 rx_buffer_info->skb = next_buffer->skb;
579 rx_buffer_info->dma = next_buffer->dma;
580 next_buffer->skb = skb;
581 next_buffer->dma = 0;
582 } else {
583 skb->next = next_buffer->skb;
584 skb->next->prev = skb;
585 }
586 adapter->non_eop_descs++;
587 goto next_desc;
588 }
589
590 /* ERR_MASK will only have valid bits if EOP set */
591 if (unlikely(staterr & IXGBE_RXDADV_ERR_FRAME_ERR_MASK)) {
592 dev_kfree_skb_irq(skb);
593 goto next_desc;
594 }
595
596 ixgbevf_rx_checksum(adapter, staterr, skb);
597
598 /* probably a little skewed due to removing CRC */
599 total_rx_bytes += skb->len;
600 total_rx_packets++;
601
602 /*
603 * Work around issue of some types of VM to VM loop back
604 * packets not getting split correctly
605 */
606 if (staterr & IXGBE_RXD_STAT_LB) {
e743d313 607 u32 header_fixup_len = skb_headlen(skb);
92915f71
GR		 608 if (header_fixup_len < 14)
609 skb_push(skb, header_fixup_len);
610 }
611 skb->protocol = eth_type_trans(skb, adapter->netdev);
612
613 ixgbevf_receive_skb(q_vector, skb, staterr, rx_ring, rx_desc);
92915f71
GR		 614
615next_desc:
616 rx_desc->wb.upper.status_error = 0;
617
618 /* return some buffers to hardware, one at a time is too slow */
619 if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
620 ixgbevf_alloc_rx_buffers(adapter, rx_ring,
621 cleaned_count);
622 cleaned_count = 0;
623 }
624
625 /* use prefetched values */
626 rx_desc = next_rxd;
627 rx_buffer_info = &rx_ring->rx_buffer_info[i];
628
629 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
630 }
631
632 rx_ring->next_to_clean = i;
633 cleaned_count = IXGBE_DESC_UNUSED(rx_ring);
634
635 if (cleaned_count)
636 ixgbevf_alloc_rx_buffers(adapter, rx_ring, cleaned_count);
637
638 rx_ring->total_packets += total_rx_packets;
639 rx_ring->total_bytes += total_rx_bytes;
640 adapter->net_stats.rx_bytes += total_rx_bytes;
641 adapter->net_stats.rx_packets += total_rx_packets;
642
643 return cleaned;
644}
645
646/**
647 * ixgbevf_clean_rxonly - msix (aka one shot) rx clean routine
648 * @napi: napi struct with our devices info in it
649 * @budget: amount of work driver is allowed to do this pass, in packets
650 *
651 * This function is optimized for cleaning one queue only on a single
652 * q_vector!!!
653 **/
654static int ixgbevf_clean_rxonly(struct napi_struct *napi, int budget)
655{
656 struct ixgbevf_q_vector *q_vector =
657 container_of(napi, struct ixgbevf_q_vector, napi);
658 struct ixgbevf_adapter *adapter = q_vector->adapter;
659 struct ixgbevf_ring *rx_ring = NULL;
660 int work_done = 0;
661 long r_idx;
662
663 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
664 rx_ring = &(adapter->rx_ring[r_idx]);
665
666 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
667
668 /* If all Rx work done, exit the polling mode */
669 if (work_done < budget) {
670 napi_complete(napi);
671 if (adapter->itr_setting & 1)
672 ixgbevf_set_itr_msix(q_vector);
673 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
674 ixgbevf_irq_enable_queues(adapter, rx_ring->v_idx);
675 }
676
677 return work_done;
678}
679
680/**
681 * ixgbevf_clean_rxonly_many - msix (aka one shot) rx clean routine
682 * @napi: napi struct with our devices info in it
683 * @budget: amount of work driver is allowed to do this pass, in packets
684 *
685 * This function will clean more than one rx queue associated with a
686 * q_vector.
687 **/
688static int ixgbevf_clean_rxonly_many(struct napi_struct *napi, int budget)
689{
690 struct ixgbevf_q_vector *q_vector =
691 container_of(napi, struct ixgbevf_q_vector, napi);
692 struct ixgbevf_adapter *adapter = q_vector->adapter;
693 struct ixgbevf_ring *rx_ring = NULL;
694 int work_done = 0, i;
695 long r_idx;
696 u64 enable_mask = 0;
697
698 /* attempt to distribute budget to each queue fairly, but don't allow
699 * the budget to go below 1 because we'll exit polling */
700 budget /= (q_vector->rxr_count ?: 1);
701 budget = max(budget, 1);
702 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
703 for (i = 0; i < q_vector->rxr_count; i++) {
704 rx_ring = &(adapter->rx_ring[r_idx]);
705 ixgbevf_clean_rx_irq(q_vector, rx_ring, &work_done, budget);
706 enable_mask |= rx_ring->v_idx;
707 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
708 r_idx + 1);
709 }
710
711#ifndef HAVE_NETDEV_NAPI_LIST
712 if (!netif_running(adapter->netdev))
713 work_done = 0;
714
715#endif
716 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
717 rx_ring = &(adapter->rx_ring[r_idx]);
718
719 /* If all Rx work done, exit the polling mode */
720 if (work_done < budget) {
721 napi_complete(napi);
722 if (adapter->itr_setting & 1)
723 ixgbevf_set_itr_msix(q_vector);
724 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
725 ixgbevf_irq_enable_queues(adapter, enable_mask);
726 }
727
728 return work_done;
729}
730
731
732/**
733 * ixgbevf_configure_msix - Configure MSI-X hardware
734 * @adapter: board private structure
735 *
736 * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
737 * interrupts.
738 **/
739static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
740{
741 struct ixgbevf_q_vector *q_vector;
742 struct ixgbe_hw *hw = &adapter->hw;
743 int i, j, q_vectors, v_idx, r_idx;
744 u32 mask;
745
746 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
747
748 /*
749 * Populate the IVAR table and set the ITR values to the
750 * corresponding register.
751 */
752 for (v_idx = 0; v_idx < q_vectors; v_idx++) {
753 q_vector = adapter->q_vector[v_idx];
984b3f57 754 /* XXX for_each_set_bit(...) */
92915f71
GR		 755 r_idx = find_first_bit(q_vector->rxr_idx,
756 adapter->num_rx_queues);
757
758 for (i = 0; i < q_vector->rxr_count; i++) {
759 j = adapter->rx_ring[r_idx].reg_idx;
760 ixgbevf_set_ivar(adapter, 0, j, v_idx);
761 r_idx = find_next_bit(q_vector->rxr_idx,
762 adapter->num_rx_queues,
763 r_idx + 1);
764 }
765 r_idx = find_first_bit(q_vector->txr_idx,
766 adapter->num_tx_queues);
767
768 for (i = 0; i < q_vector->txr_count; i++) {
769 j = adapter->tx_ring[r_idx].reg_idx;
770 ixgbevf_set_ivar(adapter, 1, j, v_idx);
771 r_idx = find_next_bit(q_vector->txr_idx,
772 adapter->num_tx_queues,
773 r_idx + 1);
774 }
775
776 /* if this is a tx only vector halve the interrupt rate */
777 if (q_vector->txr_count && !q_vector->rxr_count)
778 q_vector->eitr = (adapter->eitr_param >> 1);
779 else if (q_vector->rxr_count)
780 /* rx only */
781 q_vector->eitr = adapter->eitr_param;
782
783 ixgbevf_write_eitr(adapter, v_idx, q_vector->eitr);
784 }
785
786 ixgbevf_set_ivar(adapter, -1, 1, v_idx);
787
788 /* set up to autoclear timer, and the vectors */
789 mask = IXGBE_EIMS_ENABLE_MASK;
790 mask &= ~IXGBE_EIMS_OTHER;
791 IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, mask);
792}
793
794enum latency_range {
795 lowest_latency = 0,
796 low_latency = 1,
797 bulk_latency = 2,
798 latency_invalid = 255
799};
800
801/**
802 * ixgbevf_update_itr - update the dynamic ITR value based on statistics
803 * @adapter: pointer to adapter
804 * @eitr: eitr setting (ints per sec) to give last timeslice
805 * @itr_setting: current throttle rate in ints/second
806 * @packets: the number of packets during this measurement interval
807 * @bytes: the number of bytes during this measurement interval
808 *
809 * Stores a new ITR value based on packets and byte
810 * counts during the last interrupt. The advantage of per interrupt
811 * computation is faster updates and more accurate ITR for the current
812 * traffic pattern. Constants in this function were computed
813 * based on theoretical maximum wire speed and thresholds were set based
814 * on testing data as well as attempting to minimize response time
815 * while increasing bulk throughput.
816 **/
817static u8 ixgbevf_update_itr(struct ixgbevf_adapter *adapter,
818 u32 eitr, u8 itr_setting,
819 int packets, int bytes)
820{
821 unsigned int retval = itr_setting;
822 u32 timepassed_us;
823 u64 bytes_perint;
824
825 if (packets == 0)
826 goto update_itr_done;
827
828
829 /* simple throttlerate management
830 * 0-20MB/s lowest (100000 ints/s)
831 * 20-100MB/s low (20000 ints/s)
832 * 100-1249MB/s bulk (8000 ints/s)
833 */
834 /* what was last interrupt timeslice? */
835 timepassed_us = 1000000/eitr;
836 bytes_perint = bytes / timepassed_us; /* bytes/usec */
837
838 switch (itr_setting) {
839 case lowest_latency:
840 if (bytes_perint > adapter->eitr_low)
841 retval = low_latency;
842 break;
843 case low_latency:
844 if (bytes_perint > adapter->eitr_high)
845 retval = bulk_latency;
846 else if (bytes_perint <= adapter->eitr_low)
847 retval = lowest_latency;
848 break;
849 case bulk_latency:
850 if (bytes_perint <= adapter->eitr_high)
851 retval = low_latency;
852 break;
853 }
854
855update_itr_done:
856 return retval;
857}
858
859/**
860 * ixgbevf_write_eitr - write VTEITR register in hardware specific way
861 * @adapter: pointer to adapter struct
862 * @v_idx: vector index into q_vector array
863 * @itr_reg: new value to be written in *register* format, not ints/s
864 *
865 * This function is made to be called by ethtool and by the driver
866 * when it needs to update VTEITR registers at runtime. Hardware
867 * specific quirks/differences are taken care of here.
868 */
869static void ixgbevf_write_eitr(struct ixgbevf_adapter *adapter, int v_idx,
870 u32 itr_reg)
871{
872 struct ixgbe_hw *hw = &adapter->hw;
873
874 itr_reg = EITR_INTS_PER_SEC_TO_REG(itr_reg);
875
876 /*
877 * set the WDIS bit to not clear the timer bits and cause an
878 * immediate assertion of the interrupt
879 */
880 itr_reg |= IXGBE_EITR_CNT_WDIS;
881
882 IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
883}
884
885static void ixgbevf_set_itr_msix(struct ixgbevf_q_vector *q_vector)
886{
887 struct ixgbevf_adapter *adapter = q_vector->adapter;
888 u32 new_itr;
889 u8 current_itr, ret_itr;
890 int i, r_idx, v_idx = q_vector->v_idx;
891 struct ixgbevf_ring *rx_ring, *tx_ring;
892
893 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
894 for (i = 0; i < q_vector->txr_count; i++) {
895 tx_ring = &(adapter->tx_ring[r_idx]);
896 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
897 q_vector->tx_itr,
898 tx_ring->total_packets,
899 tx_ring->total_bytes);
900 /* if the result for this queue would decrease interrupt
901 * rate for this vector then use that result */
902 q_vector->tx_itr = ((q_vector->tx_itr > ret_itr) ?
903 q_vector->tx_itr - 1 : ret_itr);
904 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
905 r_idx + 1);
906 }
907
908 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
909 for (i = 0; i < q_vector->rxr_count; i++) {
910 rx_ring = &(adapter->rx_ring[r_idx]);
911 ret_itr = ixgbevf_update_itr(adapter, q_vector->eitr,
912 q_vector->rx_itr,
913 rx_ring->total_packets,
914 rx_ring->total_bytes);
915 /* if the result for this queue would decrease interrupt
916 * rate for this vector then use that result */
917 q_vector->rx_itr = ((q_vector->rx_itr > ret_itr) ?
918 q_vector->rx_itr - 1 : ret_itr);
919 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
920 r_idx + 1);
921 }
922
923 current_itr = max(q_vector->rx_itr, q_vector->tx_itr);
924
925 switch (current_itr) {
926 /* counts and packets in update_itr are dependent on these numbers */
927 case lowest_latency:
928 new_itr = 100000;
929 break;
930 case low_latency:
931 new_itr = 20000; /* aka hwitr = ~200 */
932 break;
933 case bulk_latency:
934 default:
935 new_itr = 8000;
936 break;
937 }
938
939 if (new_itr != q_vector->eitr) {
940 u32 itr_reg;
941
942 /* save the algorithm value here, not the smoothed one */
943 q_vector->eitr = new_itr;
944 /* do an exponential smoothing */
945 new_itr = ((q_vector->eitr * 90)/100) + ((new_itr * 10)/100);
946 itr_reg = EITR_INTS_PER_SEC_TO_REG(new_itr);
947 ixgbevf_write_eitr(adapter, v_idx, itr_reg);
948 }
949
950 return;
951}
952
953static irqreturn_t ixgbevf_msix_mbx(int irq, void *data)
954{
955 struct net_device *netdev = data;
956 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
957 struct ixgbe_hw *hw = &adapter->hw;
958 u32 eicr;
a9ee25a2 959 u32 msg;
92915f71
GR		 960
961 eicr = IXGBE_READ_REG(hw, IXGBE_VTEICS);
962 IXGBE_WRITE_REG(hw, IXGBE_VTEICR, eicr);
963
a9ee25a2
GR		 964 hw->mbx.ops.read(hw, &msg, 1);
965
966 if ((msg & IXGBE_MBVFICR_VFREQ_MASK) == IXGBE_PF_CONTROL_MSG)
967 mod_timer(&adapter->watchdog_timer,
4c3a8223 968 round_jiffies(jiffies + 1));
a9ee25a2 969
92915f71
GR		 970 return IRQ_HANDLED;
971}
972
973static irqreturn_t ixgbevf_msix_clean_tx(int irq, void *data)
974{
975 struct ixgbevf_q_vector *q_vector = data;
976 struct ixgbevf_adapter *adapter = q_vector->adapter;
977 struct ixgbevf_ring *tx_ring;
978 int i, r_idx;
979
980 if (!q_vector->txr_count)
981 return IRQ_HANDLED;
982
983 r_idx = find_first_bit(q_vector->txr_idx, adapter->num_tx_queues);
984 for (i = 0; i < q_vector->txr_count; i++) {
985 tx_ring = &(adapter->tx_ring[r_idx]);
986 tx_ring->total_bytes = 0;
987 tx_ring->total_packets = 0;
988 ixgbevf_clean_tx_irq(adapter, tx_ring);
989 r_idx = find_next_bit(q_vector->txr_idx, adapter->num_tx_queues,
990 r_idx + 1);
991 }
992
993 if (adapter->itr_setting & 1)
994 ixgbevf_set_itr_msix(q_vector);
995
996 return IRQ_HANDLED;
997}
998
999/**
1000 * ixgbe_msix_clean_rx - single unshared vector rx clean (all queues)
1001 * @irq: unused
1002 * @data: pointer to our q_vector struct for this interrupt vector
1003 **/
1004static irqreturn_t ixgbevf_msix_clean_rx(int irq, void *data)
1005{
1006 struct ixgbevf_q_vector *q_vector = data;
1007 struct ixgbevf_adapter *adapter = q_vector->adapter;
1008 struct ixgbe_hw *hw = &adapter->hw;
1009 struct ixgbevf_ring *rx_ring;
1010 int r_idx;
1011 int i;
1012
1013 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1014 for (i = 0; i < q_vector->rxr_count; i++) {
1015 rx_ring = &(adapter->rx_ring[r_idx]);
1016 rx_ring->total_bytes = 0;
1017 rx_ring->total_packets = 0;
1018 r_idx = find_next_bit(q_vector->rxr_idx, adapter->num_rx_queues,
1019 r_idx + 1);
1020 }
1021
1022 if (!q_vector->rxr_count)
1023 return IRQ_HANDLED;
1024
1025 r_idx = find_first_bit(q_vector->rxr_idx, adapter->num_rx_queues);
1026 rx_ring = &(adapter->rx_ring[r_idx]);
1027 /* disable interrupts on this vector only */
1028 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, rx_ring->v_idx);
1029 napi_schedule(&q_vector->napi);
1030
1031
1032 return IRQ_HANDLED;
1033}
1034
1035static irqreturn_t ixgbevf_msix_clean_many(int irq, void *data)
1036{
1037 ixgbevf_msix_clean_rx(irq, data);
1038 ixgbevf_msix_clean_tx(irq, data);
1039
1040 return IRQ_HANDLED;
1041}
1042
1043static inline void map_vector_to_rxq(struct ixgbevf_adapter *a, int v_idx,
1044 int r_idx)
1045{
1046 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1047
1048 set_bit(r_idx, q_vector->rxr_idx);
1049 q_vector->rxr_count++;
1050 a->rx_ring[r_idx].v_idx = 1 << v_idx;
1051}
1052
1053static inline void map_vector_to_txq(struct ixgbevf_adapter *a, int v_idx,
1054 int t_idx)
1055{
1056 struct ixgbevf_q_vector *q_vector = a->q_vector[v_idx];
1057
1058 set_bit(t_idx, q_vector->txr_idx);
1059 q_vector->txr_count++;
1060 a->tx_ring[t_idx].v_idx = 1 << v_idx;
1061}
1062
1063/**
1064 * ixgbevf_map_rings_to_vectors - Maps descriptor rings to vectors
1065 * @adapter: board private structure to initialize
1066 *
1067 * This function maps descriptor rings to the queue-specific vectors
1068 * we were allotted through the MSI-X enabling code. Ideally, we'd have
1069 * one vector per ring/queue, but on a constrained vector budget, we
1070 * group the rings as "efficiently" as possible. You would add new
1071 * mapping configurations in here.
1072 **/
1073static int ixgbevf_map_rings_to_vectors(struct ixgbevf_adapter *adapter)
1074{
1075 int q_vectors;
1076 int v_start = 0;
1077 int rxr_idx = 0, txr_idx = 0;
1078 int rxr_remaining = adapter->num_rx_queues;
1079 int txr_remaining = adapter->num_tx_queues;
1080 int i, j;
1081 int rqpv, tqpv;
1082 int err = 0;
1083
1084 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1085
1086 /*
1087 * The ideal configuration...
1088 * We have enough vectors to map one per queue.
1089 */
1090 if (q_vectors == adapter->num_rx_queues + adapter->num_tx_queues) {
1091 for (; rxr_idx < rxr_remaining; v_start++, rxr_idx++)
1092 map_vector_to_rxq(adapter, v_start, rxr_idx);
1093
1094 for (; txr_idx < txr_remaining; v_start++, txr_idx++)
1095 map_vector_to_txq(adapter, v_start, txr_idx);
1096 goto out;
1097 }
1098
1099 /*
1100 * If we don't have enough vectors for a 1-to-1
1101 * mapping, we'll have to group them so there are
1102 * multiple queues per vector.
1103 */
1104 /* Re-adjusting *qpv takes care of the remainder. */
1105 for (i = v_start; i < q_vectors; i++) {
1106 rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - i);
1107 for (j = 0; j < rqpv; j++) {
1108 map_vector_to_rxq(adapter, i, rxr_idx);
1109 rxr_idx++;
1110 rxr_remaining--;
1111 }
1112 }
1113 for (i = v_start; i < q_vectors; i++) {
1114 tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - i);
1115 for (j = 0; j < tqpv; j++) {
1116 map_vector_to_txq(adapter, i, txr_idx);
1117 txr_idx++;
1118 txr_remaining--;
1119 }
1120 }
1121
1122out:
1123 return err;
1124}
1125
1126/**
1127 * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
1128 * @adapter: board private structure
1129 *
1130 * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
1131 * interrupts from the kernel.
1132 **/
1133static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
1134{
1135 struct net_device *netdev = adapter->netdev;
1136 irqreturn_t (*handler)(int, void *);
1137 int i, vector, q_vectors, err;
1138 int ri = 0, ti = 0;
1139
1140 /* Decrement for Other and TCP Timer vectors */
1141 q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1142
1143#define SET_HANDLER(_v) (((_v)->rxr_count && (_v)->txr_count) \
1144 ? &ixgbevf_msix_clean_many : \
1145 (_v)->rxr_count ? &ixgbevf_msix_clean_rx : \
1146 (_v)->txr_count ? &ixgbevf_msix_clean_tx : \
1147 NULL)
1148 for (vector = 0; vector < q_vectors; vector++) {
1149 handler = SET_HANDLER(adapter->q_vector[vector]);
1150
1151 if (handler == &ixgbevf_msix_clean_rx) {
1152 sprintf(adapter->name[vector], "%s-%s-%d",
1153 netdev->name, "rx", ri++);
1154 } else if (handler == &ixgbevf_msix_clean_tx) {
1155 sprintf(adapter->name[vector], "%s-%s-%d",
1156 netdev->name, "tx", ti++);
1157 } else if (handler == &ixgbevf_msix_clean_many) {
1158 sprintf(adapter->name[vector], "%s-%s-%d",
1159 netdev->name, "TxRx", vector);
1160 } else {
1161 /* skip this unused q_vector */
1162 continue;
1163 }
1164 err = request_irq(adapter->msix_entries[vector].vector,
1165 handler, 0, adapter->name[vector],
1166 adapter->q_vector[vector]);
1167 if (err) {
1168 hw_dbg(&adapter->hw,
1169 "request_irq failed for MSIX interrupt "
1170 "Error: %d\n", err);
1171 goto free_queue_irqs;
1172 }
1173 }
1174
1175 sprintf(adapter->name[vector], "%s:mbx", netdev->name);
1176 err = request_irq(adapter->msix_entries[vector].vector,
1177 &ixgbevf_msix_mbx, 0, adapter->name[vector], netdev);
1178 if (err) {
1179 hw_dbg(&adapter->hw,
1180 "request_irq for msix_mbx failed: %d\n", err);
1181 goto free_queue_irqs;
1182 }
1183
1184 return 0;
1185
1186free_queue_irqs:
1187 for (i = vector - 1; i >= 0; i--)
1188 free_irq(adapter->msix_entries[--vector].vector,
1189 &(adapter->q_vector[i]));
1190 pci_disable_msix(adapter->pdev);
1191 kfree(adapter->msix_entries);
1192 adapter->msix_entries = NULL;
1193 return err;
1194}
1195
1196static inline void ixgbevf_reset_q_vectors(struct ixgbevf_adapter *adapter)
1197{
1198 int i, q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1199
1200 for (i = 0; i < q_vectors; i++) {
1201 struct ixgbevf_q_vector *q_vector = adapter->q_vector[i];
1202 bitmap_zero(q_vector->rxr_idx, MAX_RX_QUEUES);
1203 bitmap_zero(q_vector->txr_idx, MAX_TX_QUEUES);
1204 q_vector->rxr_count = 0;
1205 q_vector->txr_count = 0;
1206 q_vector->eitr = adapter->eitr_param;
1207 }
1208}
1209
1210/**
1211 * ixgbevf_request_irq - initialize interrupts
1212 * @adapter: board private structure
1213 *
1214 * Attempts to configure interrupts using the best available
1215 * capabilities of the hardware and kernel.
1216 **/
1217static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
1218{
1219 int err = 0;
1220
1221 err = ixgbevf_request_msix_irqs(adapter);
1222
1223 if (err)
1224 hw_dbg(&adapter->hw,
1225 "request_irq failed, Error %d\n", err);
1226
1227 return err;
1228}
1229
1230static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
1231{
1232 struct net_device *netdev = adapter->netdev;
1233 int i, q_vectors;
1234
1235 q_vectors = adapter->num_msix_vectors;
1236
1237 i = q_vectors - 1;
1238
1239 free_irq(adapter->msix_entries[i].vector, netdev);
1240 i--;
1241
1242 for (; i >= 0; i--) {
1243 free_irq(adapter->msix_entries[i].vector,
1244 adapter->q_vector[i]);
1245 }
1246
1247 ixgbevf_reset_q_vectors(adapter);
1248}
1249
1250/**
1251 * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
1252 * @adapter: board private structure
1253 **/
1254static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
1255{
1256 int i;
1257 struct ixgbe_hw *hw = &adapter->hw;
1258
1259 IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
1260
1261 IXGBE_WRITE_FLUSH(hw);
1262
1263 for (i = 0; i < adapter->num_msix_vectors; i++)
1264 synchronize_irq(adapter->msix_entries[i].vector);
1265}
1266
1267/**
1268 * ixgbevf_irq_enable - Enable default interrupt generation settings
1269 * @adapter: board private structure
1270 **/
1271static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter,
1272 bool queues, bool flush)
1273{
1274 struct ixgbe_hw *hw = &adapter->hw;
1275 u32 mask;
1276 u64 qmask;
1277
1278 mask = (IXGBE_EIMS_ENABLE_MASK & ~IXGBE_EIMS_RTX_QUEUE);
1279 qmask = ~0;
1280
1281 IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, mask);
1282
1283 if (queues)
1284 ixgbevf_irq_enable_queues(adapter, qmask);
1285
1286 if (flush)
1287 IXGBE_WRITE_FLUSH(hw);
1288}
1289
1290/**
1291 * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
1292 * @adapter: board private structure
1293 *
1294 * Configure the Tx unit of the MAC after a reset.
1295 **/
1296static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
1297{
1298 u64 tdba;
1299 struct ixgbe_hw *hw = &adapter->hw;
1300 u32 i, j, tdlen, txctrl;
1301
1302 /* Setup the HW Tx Head and Tail descriptor pointers */
1303 for (i = 0; i < adapter->num_tx_queues; i++) {
1304 struct ixgbevf_ring *ring = &adapter->tx_ring[i];
1305 j = ring->reg_idx;
1306 tdba = ring->dma;
1307 tdlen = ring->count * sizeof(union ixgbe_adv_tx_desc);
1308 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(j),
1309 (tdba & DMA_BIT_MASK(32)));
1310 IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(j), (tdba >> 32));
1311 IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(j), tdlen);
1312 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(j), 0);
1313 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(j), 0);
1314 adapter->tx_ring[i].head = IXGBE_VFTDH(j);
1315 adapter->tx_ring[i].tail = IXGBE_VFTDT(j);
1316 /* Disable Tx Head Writeback RO bit, since this hoses
1317 * bookkeeping if things aren't delivered in order.
1318 */
1319 txctrl = IXGBE_READ_REG(hw, IXGBE_VFDCA_TXCTRL(j));
1320 txctrl &= ~IXGBE_DCA_TXCTRL_TX_WB_RO_EN;
1321 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(j), txctrl);
1322 }
1323}
1324
1325#define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
1326
1327static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter, int index)
1328{
1329 struct ixgbevf_ring *rx_ring;
1330 struct ixgbe_hw *hw = &adapter->hw;
1331 u32 srrctl;
1332
1333 rx_ring = &adapter->rx_ring[index];
1334
1335 srrctl = IXGBE_SRRCTL_DROP_EN;
1336
1337 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1338 u16 bufsz = IXGBEVF_RXBUFFER_2048;
1339 /* grow the amount we can receive on large page machines */
1340 if (bufsz < (PAGE_SIZE / 2))
1341 bufsz = (PAGE_SIZE / 2);
1342 /* cap the bufsz at our largest descriptor size */
1343 bufsz = min((u16)IXGBEVF_MAX_RXBUFFER, bufsz);
1344
1345 srrctl |= bufsz >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1346 srrctl |= IXGBE_SRRCTL_DESCTYPE_HDR_SPLIT_ALWAYS;
1347 srrctl |= ((IXGBEVF_RX_HDR_SIZE <<
1348 IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT) &
1349 IXGBE_SRRCTL_BSIZEHDR_MASK);
1350 } else {
1351 srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
1352
1353 if (rx_ring->rx_buf_len == MAXIMUM_ETHERNET_VLAN_SIZE)
1354 srrctl |= IXGBEVF_RXBUFFER_2048 >>
1355 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1356 else
1357 srrctl |= rx_ring->rx_buf_len >>
1358 IXGBE_SRRCTL_BSIZEPKT_SHIFT;
1359 }
1360 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
1361}
1362
1363/**
1364 * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
1365 * @adapter: board private structure
1366 *
1367 * Configure the Rx unit of the MAC after a reset.
1368 **/
1369static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
1370{
1371 u64 rdba;
1372 struct ixgbe_hw *hw = &adapter->hw;
1373 struct net_device *netdev = adapter->netdev;
1374 int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
1375 int i, j;
1376 u32 rdlen;
1377 int rx_buf_len;
1378
1379 /* Decide whether to use packet split mode or not */
1380 if (netdev->mtu > ETH_DATA_LEN) {
1381 if (adapter->flags & IXGBE_FLAG_RX_PS_CAPABLE)
1382 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1383 else
1384 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1385 } else {
1386 if (adapter->flags & IXGBE_FLAG_RX_1BUF_CAPABLE)
1387 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
1388 else
1389 adapter->flags |= IXGBE_FLAG_RX_PS_ENABLED;
1390 }
1391
1392 /* Set the RX buffer length according to the mode */
1393 if (adapter->flags & IXGBE_FLAG_RX_PS_ENABLED) {
1394 /* PSRTYPE must be initialized in 82599 */
1395 u32 psrtype = IXGBE_PSRTYPE_TCPHDR |
1396 IXGBE_PSRTYPE_UDPHDR |
1397 IXGBE_PSRTYPE_IPV4HDR |
1398 IXGBE_PSRTYPE_IPV6HDR |
1399 IXGBE_PSRTYPE_L2HDR;
1400 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
1401 rx_buf_len = IXGBEVF_RX_HDR_SIZE;
1402 } else {
1403 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
1404 if (netdev->mtu <= ETH_DATA_LEN)
1405 rx_buf_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1406 else
1407 rx_buf_len = ALIGN(max_frame, 1024);
1408 }
1409
1410 rdlen = adapter->rx_ring[0].count * sizeof(union ixgbe_adv_rx_desc);
1411 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1412 * the Base and Length of the Rx Descriptor Ring */
1413 for (i = 0; i < adapter->num_rx_queues; i++) {
1414 rdba = adapter->rx_ring[i].dma;
1415 j = adapter->rx_ring[i].reg_idx;
1416 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(j),
1417 (rdba & DMA_BIT_MASK(32)));
1418 IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(j), (rdba >> 32));
1419 IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(j), rdlen);
1420 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(j), 0);
1421 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(j), 0);
1422 adapter->rx_ring[i].head = IXGBE_VFRDH(j);
1423 adapter->rx_ring[i].tail = IXGBE_VFRDT(j);
1424 adapter->rx_ring[i].rx_buf_len = rx_buf_len;
1425
1426 ixgbevf_configure_srrctl(adapter, j);
1427 }
1428}
1429
1430static void ixgbevf_vlan_rx_register(struct net_device *netdev,
1431 struct vlan_group *grp)
1432{
1433 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1434 struct ixgbe_hw *hw = &adapter->hw;
1435 int i, j;
1436 u32 ctrl;
1437
1438 adapter->vlgrp = grp;
1439
1440 for (i = 0; i < adapter->num_rx_queues; i++) {
1441 j = adapter->rx_ring[i].reg_idx;
1442 ctrl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1443 ctrl |= IXGBE_RXDCTL_VME;
1444 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), ctrl);
1445 }
1446}
1447
1448static void ixgbevf_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1449{
1450 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1451 struct ixgbe_hw *hw = &adapter->hw;
1452 struct net_device *v_netdev;
1453
1454 /* add VID to filter table */
1455 if (hw->mac.ops.set_vfta)
1456 hw->mac.ops.set_vfta(hw, vid, 0, true);
1457 /*
1458 * Copy feature flags from netdev to the vlan netdev for this vid.
1459 * This allows things like TSO to bubble down to our vlan device.
1460 */
1461 v_netdev = vlan_group_get_device(adapter->vlgrp, vid);
1462 v_netdev->features |= adapter->netdev->features;
1463 vlan_group_set_device(adapter->vlgrp, vid, v_netdev);
1464}
1465
1466static void ixgbevf_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1467{
1468 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1469 struct ixgbe_hw *hw = &adapter->hw;
1470
1471 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1472 ixgbevf_irq_disable(adapter);
1473
1474 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1475
1476 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
1477 ixgbevf_irq_enable(adapter, true, true);
1478
1479 /* remove VID from filter table */
1480 if (hw->mac.ops.set_vfta)
1481 hw->mac.ops.set_vfta(hw, vid, 0, false);
1482}
1483
1484static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
1485{
1486 ixgbevf_vlan_rx_register(adapter->netdev, adapter->vlgrp);
1487
1488 if (adapter->vlgrp) {
1489 u16 vid;
1490 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
1491 if (!vlan_group_get_device(adapter->vlgrp, vid))
1492 continue;
1493 ixgbevf_vlan_rx_add_vid(adapter->netdev, vid);
1494 }
1495 }
1496}
1497
92915f71
GR		 1498/**
1499 * ixgbevf_set_rx_mode - Multicast set
1500 * @netdev: network interface device structure
1501 *
1502 * The set_rx_method entry point is called whenever the multicast address
1503 * list or the network interface flags are updated. This routine is
1504 * responsible for configuring the hardware for proper multicast mode.
1505 **/
1506static void ixgbevf_set_rx_mode(struct net_device *netdev)
1507{
1508 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
1509 struct ixgbe_hw *hw = &adapter->hw;
92915f71
GR		 1510
1511 /* reprogram multicast list */
92915f71 1512 if (hw->mac.ops.update_mc_addr_list)
5c58c47a 1513 hw->mac.ops.update_mc_addr_list(hw, netdev);
92915f71
GR		 1514}
1515
1516static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
1517{
1518 int q_idx;
1519 struct ixgbevf_q_vector *q_vector;
1520 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1521
1522 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1523 struct napi_struct *napi;
1524 q_vector = adapter->q_vector[q_idx];
1525 if (!q_vector->rxr_count)
1526 continue;
1527 napi = &q_vector->napi;
1528 if (q_vector->rxr_count > 1)
1529 napi->poll = &ixgbevf_clean_rxonly_many;
1530
1531 napi_enable(napi);
1532 }
1533}
1534
1535static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
1536{
1537 int q_idx;
1538 struct ixgbevf_q_vector *q_vector;
1539 int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1540
1541 for (q_idx = 0; q_idx < q_vectors; q_idx++) {
1542 q_vector = adapter->q_vector[q_idx];
1543 if (!q_vector->rxr_count)
1544 continue;
1545 napi_disable(&q_vector->napi);
1546 }
1547}
1548
1549static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
1550{
1551 struct net_device *netdev = adapter->netdev;
1552 int i;
1553
1554 ixgbevf_set_rx_mode(netdev);
1555
1556 ixgbevf_restore_vlan(adapter);
1557
1558 ixgbevf_configure_tx(adapter);
1559 ixgbevf_configure_rx(adapter);
1560 for (i = 0; i < adapter->num_rx_queues; i++) {
1561 struct ixgbevf_ring *ring = &adapter->rx_ring[i];
1562 ixgbevf_alloc_rx_buffers(adapter, ring, ring->count);
1563 ring->next_to_use = ring->count - 1;
1564 writel(ring->next_to_use, adapter->hw.hw_addr + ring->tail);
1565 }
1566}
1567
1568#define IXGBE_MAX_RX_DESC_POLL 10
1569static inline void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
1570 int rxr)
1571{
1572 struct ixgbe_hw *hw = &adapter->hw;
1573 int j = adapter->rx_ring[rxr].reg_idx;
1574 int k;
1575
1576 for (k = 0; k < IXGBE_MAX_RX_DESC_POLL; k++) {
1577 if (IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j)) & IXGBE_RXDCTL_ENABLE)
1578 break;
1579 else
1580 msleep(1);
1581 }
1582 if (k >= IXGBE_MAX_RX_DESC_POLL) {
1583 hw_dbg(hw, "RXDCTL.ENABLE on Rx queue %d "
1584 "not set within the polling period\n", rxr);
1585 }
1586
1587 ixgbevf_release_rx_desc(&adapter->hw, &adapter->rx_ring[rxr],
1588 (adapter->rx_ring[rxr].count - 1));
1589}
1590
33bd9f60
GR		 1591static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
1592{
1593 /* Only save pre-reset stats if there are some */
1594 if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
1595 adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
1596 adapter->stats.base_vfgprc;
1597 adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
1598 adapter->stats.base_vfgptc;
1599 adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
1600 adapter->stats.base_vfgorc;
1601 adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
1602 adapter->stats.base_vfgotc;
1603 adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
1604 adapter->stats.base_vfmprc;
1605 }
1606}
1607
1608static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
1609{
1610 struct ixgbe_hw *hw = &adapter->hw;
1611
1612 adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
1613 adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
1614 adapter->stats.last_vfgorc |=
1615 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
1616 adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
1617 adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
1618 adapter->stats.last_vfgotc |=
1619 (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
1620 adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
1621
1622 adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
1623 adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
1624 adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
1625 adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
1626 adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
1627}
1628
92915f71
GR		 1629static int ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
1630{
1631 struct net_device *netdev = adapter->netdev;
1632 struct ixgbe_hw *hw = &adapter->hw;
1633 int i, j = 0;
1634 int num_rx_rings = adapter->num_rx_queues;
1635 u32 txdctl, rxdctl;
1636
1637 for (i = 0; i < adapter->num_tx_queues; i++) {
1638 j = adapter->tx_ring[i].reg_idx;
1639 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1640 /* enable WTHRESH=8 descriptors, to encourage burst writeback */
1641 txdctl |= (8 << 16);
1642 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1643 }
1644
1645 for (i = 0; i < adapter->num_tx_queues; i++) {
1646 j = adapter->tx_ring[i].reg_idx;
1647 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1648 txdctl |= IXGBE_TXDCTL_ENABLE;
1649 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j), txdctl);
1650 }
1651
1652 for (i = 0; i < num_rx_rings; i++) {
1653 j = adapter->rx_ring[i].reg_idx;
1654 rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(j));
1655 rxdctl |= IXGBE_RXDCTL_ENABLE;
1656 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(j), rxdctl);
1657 ixgbevf_rx_desc_queue_enable(adapter, i);
1658 }
1659
1660 ixgbevf_configure_msix(adapter);
1661
1662 if (hw->mac.ops.set_rar) {
1663 if (is_valid_ether_addr(hw->mac.addr))
1664 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
1665 else
1666 hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
1667 }
1668
1669 clear_bit(__IXGBEVF_DOWN, &adapter->state);
1670 ixgbevf_napi_enable_all(adapter);
1671
1672 /* enable transmits */
1673 netif_tx_start_all_queues(netdev);
1674
33bd9f60
GR		 1675 ixgbevf_save_reset_stats(adapter);
1676 ixgbevf_init_last_counter_stats(adapter);
1677
92915f71
GR		 1678 /* bring the link up in the watchdog, this could race with our first
1679 * link up interrupt but shouldn't be a problem */
1680 adapter->flags |= IXGBE_FLAG_NEED_LINK_UPDATE;
1681 adapter->link_check_timeout = jiffies;
1682 mod_timer(&adapter->watchdog_timer, jiffies);
1683 return 0;
1684}
1685
1686int ixgbevf_up(struct ixgbevf_adapter *adapter)
1687{
1688 int err;
1689 struct ixgbe_hw *hw = &adapter->hw;
1690
1691 ixgbevf_configure(adapter);
1692
1693 err = ixgbevf_up_complete(adapter);
1694
1695 /* clear any pending interrupts, may auto mask */
1696 IXGBE_READ_REG(hw, IXGBE_VTEICR);
1697
1698 ixgbevf_irq_enable(adapter, true, true);
1699
1700 return err;
1701}
1702
1703/**
1704 * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
1705 * @adapter: board private structure
1706 * @rx_ring: ring to free buffers from
1707 **/
1708static void ixgbevf_clean_rx_ring(struct ixgbevf_adapter *adapter,
1709 struct ixgbevf_ring *rx_ring)
1710{
1711 struct pci_dev *pdev = adapter->pdev;
1712 unsigned long size;
1713 unsigned int i;
1714
c0456c23
GR		 1715 if (!rx_ring->rx_buffer_info)
1716 return;
92915f71 1717
c0456c23 1718 /* Free all the Rx ring sk_buffs */
92915f71
GR		 1719 for (i = 0; i < rx_ring->count; i++) {
1720 struct ixgbevf_rx_buffer *rx_buffer_info;
1721
1722 rx_buffer_info = &rx_ring->rx_buffer_info[i];
1723 if (rx_buffer_info->dma) {
1724 pci_unmap_single(pdev, rx_buffer_info->dma,
1725 rx_ring->rx_buf_len,
1726 PCI_DMA_FROMDEVICE);
1727 rx_buffer_info->dma = 0;
1728 }
1729 if (rx_buffer_info->skb) {
1730 struct sk_buff *skb = rx_buffer_info->skb;
1731 rx_buffer_info->skb = NULL;
1732 do {
1733 struct sk_buff *this = skb;
1734 skb = skb->prev;
1735 dev_kfree_skb(this);
1736 } while (skb);
1737 }
1738 if (!rx_buffer_info->page)
1739 continue;
1740 pci_unmap_page(pdev, rx_buffer_info->page_dma, PAGE_SIZE / 2,
1741 PCI_DMA_FROMDEVICE);
1742 rx_buffer_info->page_dma = 0;
1743 put_page(rx_buffer_info->page);
1744 rx_buffer_info->page = NULL;
1745 rx_buffer_info->page_offset = 0;
1746 }
1747
1748 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
1749 memset(rx_ring->rx_buffer_info, 0, size);
1750
1751 /* Zero out the descriptor ring */
1752 memset(rx_ring->desc, 0, rx_ring->size);
1753
1754 rx_ring->next_to_clean = 0;
1755 rx_ring->next_to_use = 0;
1756
1757 if (rx_ring->head)
1758 writel(0, adapter->hw.hw_addr + rx_ring->head);
1759 if (rx_ring->tail)
1760 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1761}
1762
1763/**
1764 * ixgbevf_clean_tx_ring - Free Tx Buffers
1765 * @adapter: board private structure
1766 * @tx_ring: ring to be cleaned
1767 **/
1768static void ixgbevf_clean_tx_ring(struct ixgbevf_adapter *adapter,
1769 struct ixgbevf_ring *tx_ring)
1770{
1771 struct ixgbevf_tx_buffer *tx_buffer_info;
1772 unsigned long size;
1773 unsigned int i;
1774
c0456c23
GR		 1775 if (!tx_ring->tx_buffer_info)
1776 return;
1777
92915f71
GR		 1778 /* Free all the Tx ring sk_buffs */
1779
1780 for (i = 0; i < tx_ring->count; i++) {
1781 tx_buffer_info = &tx_ring->tx_buffer_info[i];
1782 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
1783 }
1784
1785 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
1786 memset(tx_ring->tx_buffer_info, 0, size);
1787
1788 memset(tx_ring->desc, 0, tx_ring->size);
1789
1790 tx_ring->next_to_use = 0;
1791 tx_ring->next_to_clean = 0;
1792
1793 if (tx_ring->head)
1794 writel(0, adapter->hw.hw_addr + tx_ring->head);
1795 if (tx_ring->tail)
1796 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1797}
1798
1799/**
1800 * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
1801 * @adapter: board private structure
1802 **/
1803static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
1804{
1805 int i;
1806
1807 for (i = 0; i < adapter->num_rx_queues; i++)
1808 ixgbevf_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1809}
1810
1811/**
1812 * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
1813 * @adapter: board private structure
1814 **/
1815static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
1816{
1817 int i;
1818
1819 for (i = 0; i < adapter->num_tx_queues; i++)
1820 ixgbevf_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1821}
1822
1823void ixgbevf_down(struct ixgbevf_adapter *adapter)
1824{
1825 struct net_device *netdev = adapter->netdev;
1826 struct ixgbe_hw *hw = &adapter->hw;
1827 u32 txdctl;
1828 int i, j;
1829
1830 /* signal that we are down to the interrupt handler */
1831 set_bit(__IXGBEVF_DOWN, &adapter->state);
1832 /* disable receives */
1833
1834 netif_tx_disable(netdev);
1835
1836 msleep(10);
1837
1838 netif_tx_stop_all_queues(netdev);
1839
1840 ixgbevf_irq_disable(adapter);
1841
1842 ixgbevf_napi_disable_all(adapter);
1843
1844 del_timer_sync(&adapter->watchdog_timer);
1845 /* can't call flush scheduled work here because it can deadlock
1846 * if linkwatch_event tries to acquire the rtnl_lock which we are
1847 * holding */
1848 while (adapter->flags & IXGBE_FLAG_IN_WATCHDOG_TASK)
1849 msleep(1);
1850
1851 /* disable transmits in the hardware now that interrupts are off */
1852 for (i = 0; i < adapter->num_tx_queues; i++) {
1853 j = adapter->tx_ring[i].reg_idx;
1854 txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(j));
1855 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(j),
1856 (txdctl & ~IXGBE_TXDCTL_ENABLE));
1857 }
1858
1859 netif_carrier_off(netdev);
1860
1861 if (!pci_channel_offline(adapter->pdev))
1862 ixgbevf_reset(adapter);
1863
1864 ixgbevf_clean_all_tx_rings(adapter);
1865 ixgbevf_clean_all_rx_rings(adapter);
1866}
1867
1868void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
1869{
c0456c23
GR		 1870 struct ixgbe_hw *hw = &adapter->hw;
1871
92915f71 1872 WARN_ON(in_interrupt());
c0456c23 1873
92915f71
GR		 1874 while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
1875 msleep(1);
1876
c0456c23
GR		 1877 /*
1878 * Check if PF is up before re-init. If not then skip until
1879 * later when the PF is up and ready to service requests from
1880 * the VF via mailbox. If the VF is up and running then the
1881 * watchdog task will continue to schedule reset tasks until
1882 * the PF is up and running.
1883 */
1884 if (!hw->mac.ops.reset_hw(hw)) {
1885 ixgbevf_down(adapter);
1886 ixgbevf_up(adapter);
1887 }
92915f71
GR		 1888
1889 clear_bit(__IXGBEVF_RESETTING, &adapter->state);
1890}
1891
1892void ixgbevf_reset(struct ixgbevf_adapter *adapter)
1893{
1894 struct ixgbe_hw *hw = &adapter->hw;
1895 struct net_device *netdev = adapter->netdev;
1896
1897 if (hw->mac.ops.reset_hw(hw))
1898 hw_dbg(hw, "PF still resetting\n");
1899 else
1900 hw->mac.ops.init_hw(hw);
1901
1902 if (is_valid_ether_addr(adapter->hw.mac.addr)) {
1903 memcpy(netdev->dev_addr, adapter->hw.mac.addr,
1904 netdev->addr_len);
1905 memcpy(netdev->perm_addr, adapter->hw.mac.addr,
1906 netdev->addr_len);
1907 }
1908}
1909
1910static void ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
1911 int vectors)
1912{
1913 int err, vector_threshold;
1914
1915 /* We'll want at least 3 (vector_threshold):
1916 * 1) TxQ[0] Cleanup
1917 * 2) RxQ[0] Cleanup
1918 * 3) Other (Link Status Change, etc.)
1919 */
1920 vector_threshold = MIN_MSIX_COUNT;
1921
1922 /* The more we get, the more we will assign to Tx/Rx Cleanup
1923 * for the separate queues...where Rx Cleanup >= Tx Cleanup.
1924 * Right now, we simply care about how many we'll get; we'll
1925 * set them up later while requesting irq's.
1926 */
1927 while (vectors >= vector_threshold) {
1928 err = pci_enable_msix(adapter->pdev, adapter->msix_entries,
1929 vectors);
1930 if (!err) /* Success in acquiring all requested vectors. */
1931 break;
1932 else if (err < 0)
1933 vectors = 0; /* Nasty failure, quit now */
1934 else /* err == number of vectors we should try again with */
1935 vectors = err;
1936 }
1937
1938 if (vectors < vector_threshold) {
1939 /* Can't allocate enough MSI-X interrupts? Oh well.
1940 * This just means we'll go with either a single MSI
1941 * vector or fall back to legacy interrupts.
1942 */
1943 hw_dbg(&adapter->hw,
1944 "Unable to allocate MSI-X interrupts\n");
1945 kfree(adapter->msix_entries);
1946 adapter->msix_entries = NULL;
1947 } else {
1948 /*
1949 * Adjust for only the vectors we'll use, which is minimum
1950 * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
1951 * vectors we were allocated.
1952 */
1953 adapter->num_msix_vectors = vectors;
1954 }
1955}
1956
1957/*
1958 * ixgbe_set_num_queues: Allocate queues for device, feature dependant
1959 * @adapter: board private structure to initialize
1960 *
1961 * This is the top level queue allocation routine. The order here is very
1962 * important, starting with the "most" number of features turned on at once,
1963 * and ending with the smallest set of features. This way large combinations
1964 * can be allocated if they're turned on, and smaller combinations are the
1965 * fallthrough conditions.
1966 *
1967 **/
1968static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
1969{
1970 /* Start with base case */
1971 adapter->num_rx_queues = 1;
1972 adapter->num_tx_queues = 1;
1973 adapter->num_rx_pools = adapter->num_rx_queues;
1974 adapter->num_rx_queues_per_pool = 1;
1975}
1976
1977/**
1978 * ixgbevf_alloc_queues - Allocate memory for all rings
1979 * @adapter: board private structure to initialize
1980 *
1981 * We allocate one ring per queue at run-time since we don't know the
1982 * number of queues at compile-time. The polling_netdev array is
1983 * intended for Multiqueue, but should work fine with a single queue.
1984 **/
1985static int ixgbevf_alloc_queues(struct ixgbevf_adapter *adapter)
1986{
1987 int i;
1988
1989 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1990 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1991 if (!adapter->tx_ring)
1992 goto err_tx_ring_allocation;
1993
1994 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1995 sizeof(struct ixgbevf_ring), GFP_KERNEL);
1996 if (!adapter->rx_ring)
1997 goto err_rx_ring_allocation;
1998
1999 for (i = 0; i < adapter->num_tx_queues; i++) {
2000 adapter->tx_ring[i].count = adapter->tx_ring_count;
2001 adapter->tx_ring[i].queue_index = i;
2002 adapter->tx_ring[i].reg_idx = i;
2003 }
2004
2005 for (i = 0; i < adapter->num_rx_queues; i++) {
2006 adapter->rx_ring[i].count = adapter->rx_ring_count;
2007 adapter->rx_ring[i].queue_index = i;
2008 adapter->rx_ring[i].reg_idx = i;
2009 }
2010
2011 return 0;
2012
2013err_rx_ring_allocation:
2014 kfree(adapter->tx_ring);
2015err_tx_ring_allocation:
2016 return -ENOMEM;
2017}
2018
2019/**
2020 * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
2021 * @adapter: board private structure to initialize
2022 *
2023 * Attempt to configure the interrupts using the best available
2024 * capabilities of the hardware and the kernel.
2025 **/
2026static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
2027{
2028 int err = 0;
2029 int vector, v_budget;
2030
2031 /*
2032 * It's easy to be greedy for MSI-X vectors, but it really
2033 * doesn't do us much good if we have a lot more vectors
2034 * than CPU's. So let's be conservative and only ask for
2035 * (roughly) twice the number of vectors as there are CPU's.
2036 */
2037 v_budget = min(adapter->num_rx_queues + adapter->num_tx_queues,
2038 (int)(num_online_cpus() * 2)) + NON_Q_VECTORS;
2039
2040 /* A failure in MSI-X entry allocation isn't fatal, but it does
2041 * mean we disable MSI-X capabilities of the adapter. */
2042 adapter->msix_entries = kcalloc(v_budget,
2043 sizeof(struct msix_entry), GFP_KERNEL);
2044 if (!adapter->msix_entries) {
2045 err = -ENOMEM;
2046 goto out;
2047 }
2048
2049 for (vector = 0; vector < v_budget; vector++)
2050 adapter->msix_entries[vector].entry = vector;
2051
2052 ixgbevf_acquire_msix_vectors(adapter, v_budget);
2053
2054out:
2055 return err;
2056}
2057
2058/**
2059 * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
2060 * @adapter: board private structure to initialize
2061 *
2062 * We allocate one q_vector per queue interrupt. If allocation fails we
2063 * return -ENOMEM.
2064 **/
2065static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
2066{
2067 int q_idx, num_q_vectors;
2068 struct ixgbevf_q_vector *q_vector;
2069 int napi_vectors;
2070 int (*poll)(struct napi_struct *, int);
2071
2072 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2073 napi_vectors = adapter->num_rx_queues;
2074 poll = &ixgbevf_clean_rxonly;
2075
2076 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2077 q_vector = kzalloc(sizeof(struct ixgbevf_q_vector), GFP_KERNEL);
2078 if (!q_vector)
2079 goto err_out;
2080 q_vector->adapter = adapter;
2081 q_vector->v_idx = q_idx;
2082 q_vector->eitr = adapter->eitr_param;
2083 if (q_idx < napi_vectors)
2084 netif_napi_add(adapter->netdev, &q_vector->napi,
2085 (*poll), 64);
2086 adapter->q_vector[q_idx] = q_vector;
2087 }
2088
2089 return 0;
2090
2091err_out:
2092 while (q_idx) {
2093 q_idx--;
2094 q_vector = adapter->q_vector[q_idx];
2095 netif_napi_del(&q_vector->napi);
2096 kfree(q_vector);
2097 adapter->q_vector[q_idx] = NULL;
2098 }
2099 return -ENOMEM;
2100}
2101
2102/**
2103 * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
2104 * @adapter: board private structure to initialize
2105 *
2106 * This function frees the memory allocated to the q_vectors. In addition if
2107 * NAPI is enabled it will delete any references to the NAPI struct prior
2108 * to freeing the q_vector.
2109 **/
2110static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
2111{
2112 int q_idx, num_q_vectors;
2113 int napi_vectors;
2114
2115 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2116 napi_vectors = adapter->num_rx_queues;
2117
2118 for (q_idx = 0; q_idx < num_q_vectors; q_idx++) {
2119 struct ixgbevf_q_vector *q_vector = adapter->q_vector[q_idx];
2120
2121 adapter->q_vector[q_idx] = NULL;
2122 if (q_idx < napi_vectors)
2123 netif_napi_del(&q_vector->napi);
2124 kfree(q_vector);
2125 }
2126}
2127
2128/**
2129 * ixgbevf_reset_interrupt_capability - Reset MSIX setup
2130 * @adapter: board private structure
2131 *
2132 **/
2133static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
2134{
2135 pci_disable_msix(adapter->pdev);
2136 kfree(adapter->msix_entries);
2137 adapter->msix_entries = NULL;
2138
2139 return;
2140}
2141
2142/**
2143 * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
2144 * @adapter: board private structure to initialize
2145 *
2146 **/
2147static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
2148{
2149 int err;
2150
2151 /* Number of supported queues */
2152 ixgbevf_set_num_queues(adapter);
2153
2154 err = ixgbevf_set_interrupt_capability(adapter);
2155 if (err) {
2156 hw_dbg(&adapter->hw,
2157 "Unable to setup interrupt capabilities\n");
2158 goto err_set_interrupt;
2159 }
2160
2161 err = ixgbevf_alloc_q_vectors(adapter);
2162 if (err) {
2163 hw_dbg(&adapter->hw, "Unable to allocate memory for queue "
2164 "vectors\n");
2165 goto err_alloc_q_vectors;
2166 }
2167
2168 err = ixgbevf_alloc_queues(adapter);
2169 if (err) {
2170 printk(KERN_ERR "Unable to allocate memory for queues\n");
2171 goto err_alloc_queues;
2172 }
2173
2174 hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, "
2175 "Tx Queue count = %u\n",
2176 (adapter->num_rx_queues > 1) ? "Enabled" :
2177 "Disabled", adapter->num_rx_queues, adapter->num_tx_queues);
2178
2179 set_bit(__IXGBEVF_DOWN, &adapter->state);
2180
2181 return 0;
2182err_alloc_queues:
2183 ixgbevf_free_q_vectors(adapter);
2184err_alloc_q_vectors:
2185 ixgbevf_reset_interrupt_capability(adapter);
2186err_set_interrupt:
2187 return err;
2188}
2189
2190/**
2191 * ixgbevf_sw_init - Initialize general software structures
2192 * (struct ixgbevf_adapter)
2193 * @adapter: board private structure to initialize
2194 *
2195 * ixgbevf_sw_init initializes the Adapter private data structure.
2196 * Fields are initialized based on PCI device information and
2197 * OS network device settings (MTU size).
2198 **/
2199static int __devinit ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
2200{
2201 struct ixgbe_hw *hw = &adapter->hw;
2202 struct pci_dev *pdev = adapter->pdev;
2203 int err;
2204
2205 /* PCI config space info */
2206
2207 hw->vendor_id = pdev->vendor;
2208 hw->device_id = pdev->device;
2209 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
2210 hw->subsystem_vendor_id = pdev->subsystem_vendor;
2211 hw->subsystem_device_id = pdev->subsystem_device;
2212
2213 hw->mbx.ops.init_params(hw);
2214 hw->mac.max_tx_queues = MAX_TX_QUEUES;
2215 hw->mac.max_rx_queues = MAX_RX_QUEUES;
2216 err = hw->mac.ops.reset_hw(hw);
2217 if (err) {
2218 dev_info(&pdev->dev,
2219 "PF still in reset state, assigning new address\n");
2220 random_ether_addr(hw->mac.addr);
2221 } else {
2222 err = hw->mac.ops.init_hw(hw);
2223 if (err) {
2224 printk(KERN_ERR "init_shared_code failed: %d\n", err);
2225 goto out;
2226 }
2227 }
2228
2229 /* Enable dynamic interrupt throttling rates */
2230 adapter->eitr_param = 20000;
2231 adapter->itr_setting = 1;
2232
2233 /* set defaults for eitr in MegaBytes */
2234 adapter->eitr_low = 10;
2235 adapter->eitr_high = 20;
2236
2237 /* set default ring sizes */
2238 adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
2239 adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
2240
2241 /* enable rx csum by default */
2242 adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
2243
2244 set_bit(__IXGBEVF_DOWN, &adapter->state);
2245
2246out:
2247 return err;
2248}
2249
92915f71
GR		 2250#define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
2251 { \
2252 u32 current_counter = IXGBE_READ_REG(hw, reg); \
2253 if (current_counter < last_counter) \
2254 counter += 0x100000000LL; \
2255 last_counter = current_counter; \
2256 counter &= 0xFFFFFFFF00000000LL; \
2257 counter |= current_counter; \
2258 }
2259
2260#define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
2261 { \
2262 u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
2263 u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
2264 u64 current_counter = (current_counter_msb << 32) | \
2265 current_counter_lsb; \
2266 if (current_counter < last_counter) \
2267 counter += 0x1000000000LL; \
2268 last_counter = current_counter; \
2269 counter &= 0xFFFFFFF000000000LL; \
2270 counter |= current_counter; \
2271 }
2272/**
2273 * ixgbevf_update_stats - Update the board statistics counters.
2274 * @adapter: board private structure
2275 **/
2276void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
2277{
2278 struct ixgbe_hw *hw = &adapter->hw;
2279
2280 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
2281 adapter->stats.vfgprc);
2282 UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
2283 adapter->stats.vfgptc);
2284 UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
2285 adapter->stats.last_vfgorc,
2286 adapter->stats.vfgorc);
2287 UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
2288 adapter->stats.last_vfgotc,
2289 adapter->stats.vfgotc);
2290 UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
2291 adapter->stats.vfmprc);
2292
2293 /* Fill out the OS statistics structure */
2294 adapter->net_stats.multicast = adapter->stats.vfmprc -
2295 adapter->stats.base_vfmprc;
2296}
2297
2298/**
2299 * ixgbevf_watchdog - Timer Call-back
2300 * @data: pointer to adapter cast into an unsigned long
2301 **/
2302static void ixgbevf_watchdog(unsigned long data)
2303{
2304 struct ixgbevf_adapter *adapter = (struct ixgbevf_adapter *)data;
2305 struct ixgbe_hw *hw = &adapter->hw;
2306 u64 eics = 0;
2307 int i;
2308
2309 /*
2310 * Do the watchdog outside of interrupt context due to the lovely
2311 * delays that some of the newer hardware requires
2312 */
2313
2314 if (test_bit(__IXGBEVF_DOWN, &adapter->state))
2315 goto watchdog_short_circuit;
2316
2317 /* get one bit for every active tx/rx interrupt vector */
2318 for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
2319 struct ixgbevf_q_vector *qv = adapter->q_vector[i];
2320 if (qv->rxr_count || qv->txr_count)
2321 eics |= (1 << i);
2322 }
2323
2324 IXGBE_WRITE_REG(hw, IXGBE_VTEICS, (u32)eics);
2325
2326watchdog_short_circuit:
2327 schedule_work(&adapter->watchdog_task);
2328}
2329
2330/**
2331 * ixgbevf_tx_timeout - Respond to a Tx Hang
2332 * @netdev: network interface device structure
2333 **/
2334static void ixgbevf_tx_timeout(struct net_device *netdev)
2335{
2336 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2337
2338 /* Do the reset outside of interrupt context */
2339 schedule_work(&adapter->reset_task);
2340}
2341
2342static void ixgbevf_reset_task(struct work_struct *work)
2343{
2344 struct ixgbevf_adapter *adapter;
2345 adapter = container_of(work, struct ixgbevf_adapter, reset_task);
2346
2347 /* If we're already down or resetting, just bail */
2348 if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
2349 test_bit(__IXGBEVF_RESETTING, &adapter->state))
2350 return;
2351
2352 adapter->tx_timeout_count++;
2353
2354 ixgbevf_reinit_locked(adapter);
2355}
2356
2357/**
2358 * ixgbevf_watchdog_task - worker thread to bring link up
2359 * @work: pointer to work_struct containing our data
2360 **/
2361static void ixgbevf_watchdog_task(struct work_struct *work)
2362{
2363 struct ixgbevf_adapter *adapter = container_of(work,
2364 struct ixgbevf_adapter,
2365 watchdog_task);
2366 struct net_device *netdev = adapter->netdev;
2367 struct ixgbe_hw *hw = &adapter->hw;
2368 u32 link_speed = adapter->link_speed;
2369 bool link_up = adapter->link_up;
2370
2371 adapter->flags |= IXGBE_FLAG_IN_WATCHDOG_TASK;
2372
2373 /*
2374 * Always check the link on the watchdog because we have
2375 * no LSC interrupt
2376 */
2377 if (hw->mac.ops.check_link) {
2378 if ((hw->mac.ops.check_link(hw, &link_speed,
2379 &link_up, false)) != 0) {
2380 adapter->link_up = link_up;
2381 adapter->link_speed = link_speed;
da6b3330
GR		 2382 netif_carrier_off(netdev);
2383 netif_tx_stop_all_queues(netdev);
92915f71
GR		 2384 schedule_work(&adapter->reset_task);
2385 goto pf_has_reset;
2386 }
2387 } else {
2388 /* always assume link is up, if no check link
2389 * function */
2390 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
2391 link_up = true;
2392 }
2393 adapter->link_up = link_up;
2394 adapter->link_speed = link_speed;
2395
2396 if (link_up) {
2397 if (!netif_carrier_ok(netdev)) {
300bc060
JP		 2398 hw_dbg(&adapter->hw, "NIC Link is Up, %u Gbps\n",
2399 (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
2400 10 : 1);
92915f71
GR		 2401 netif_carrier_on(netdev);
2402 netif_tx_wake_all_queues(netdev);
2403 } else {
2404 /* Force detection of hung controller */
2405 adapter->detect_tx_hung = true;
2406 }
2407 } else {
2408 adapter->link_up = false;
2409 adapter->link_speed = 0;
2410 if (netif_carrier_ok(netdev)) {
2411 hw_dbg(&adapter->hw, "NIC Link is Down\n");
2412 netif_carrier_off(netdev);
2413 netif_tx_stop_all_queues(netdev);
2414 }
2415 }
2416
92915f71
GR		 2417 ixgbevf_update_stats(adapter);
2418
33bd9f60 2419pf_has_reset:
92915f71
GR		 2420 /* Force detection of hung controller every watchdog period */
2421 adapter->detect_tx_hung = true;
2422
2423 /* Reset the timer */
2424 if (!test_bit(__IXGBEVF_DOWN, &adapter->state))
2425 mod_timer(&adapter->watchdog_timer,
2426 round_jiffies(jiffies + (2 * HZ)));
2427
2428 adapter->flags &= ~IXGBE_FLAG_IN_WATCHDOG_TASK;
2429}
2430
2431/**
2432 * ixgbevf_free_tx_resources - Free Tx Resources per Queue
2433 * @adapter: board private structure
2434 * @tx_ring: Tx descriptor ring for a specific queue
2435 *
2436 * Free all transmit software resources
2437 **/
2438void ixgbevf_free_tx_resources(struct ixgbevf_adapter *adapter,
2439 struct ixgbevf_ring *tx_ring)
2440{
2441 struct pci_dev *pdev = adapter->pdev;
2442
92915f71
GR		 2443 ixgbevf_clean_tx_ring(adapter, tx_ring);
2444
2445 vfree(tx_ring->tx_buffer_info);
2446 tx_ring->tx_buffer_info = NULL;
2447
2448 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
2449
2450 tx_ring->desc = NULL;
2451}
2452
2453/**
2454 * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
2455 * @adapter: board private structure
2456 *
2457 * Free all transmit software resources
2458 **/
2459static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
2460{
2461 int i;
2462
2463 for (i = 0; i < adapter->num_tx_queues; i++)
2464 if (adapter->tx_ring[i].desc)
2465 ixgbevf_free_tx_resources(adapter,
2466 &adapter->tx_ring[i]);
2467
2468}
2469
2470/**
2471 * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
2472 * @adapter: board private structure
2473 * @tx_ring: tx descriptor ring (for a specific queue) to setup
2474 *
2475 * Return 0 on success, negative on failure
2476 **/
2477int ixgbevf_setup_tx_resources(struct ixgbevf_adapter *adapter,
2478 struct ixgbevf_ring *tx_ring)
2479{
2480 struct pci_dev *pdev = adapter->pdev;
2481 int size;
2482
2483 size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
2484 tx_ring->tx_buffer_info = vmalloc(size);
2485 if (!tx_ring->tx_buffer_info)
2486 goto err;
2487 memset(tx_ring->tx_buffer_info, 0, size);
2488
2489 /* round up to nearest 4K */
2490 tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
2491 tx_ring->size = ALIGN(tx_ring->size, 4096);
2492
2493 tx_ring->desc = pci_alloc_consistent(pdev, tx_ring->size,
2494 &tx_ring->dma);
2495 if (!tx_ring->desc)
2496 goto err;
2497
2498 tx_ring->next_to_use = 0;
2499 tx_ring->next_to_clean = 0;
2500 tx_ring->work_limit = tx_ring->count;
2501 return 0;
2502
2503err:
2504 vfree(tx_ring->tx_buffer_info);
2505 tx_ring->tx_buffer_info = NULL;
2506 hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit "
2507 "descriptor ring\n");
2508 return -ENOMEM;
2509}
2510
2511/**
2512 * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
2513 * @adapter: board private structure
2514 *
2515 * If this function returns with an error, then it's possible one or
2516 * more of the rings is populated (while the rest are not). It is the
2517 * callers duty to clean those orphaned rings.
2518 *
2519 * Return 0 on success, negative on failure
2520 **/
2521static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
2522{
2523 int i, err = 0;
2524
2525 for (i = 0; i < adapter->num_tx_queues; i++) {
2526 err = ixgbevf_setup_tx_resources(adapter, &adapter->tx_ring[i]);
2527 if (!err)
2528 continue;
2529 hw_dbg(&adapter->hw,
2530 "Allocation for Tx Queue %u failed\n", i);
2531 break;
2532 }
2533
2534 return err;
2535}
2536
2537/**
2538 * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
2539 * @adapter: board private structure
2540 * @rx_ring: rx descriptor ring (for a specific queue) to setup
2541 *
2542 * Returns 0 on success, negative on failure
2543 **/
2544int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
2545 struct ixgbevf_ring *rx_ring)
2546{
2547 struct pci_dev *pdev = adapter->pdev;
2548 int size;
2549
2550 size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
2551 rx_ring->rx_buffer_info = vmalloc(size);
2552 if (!rx_ring->rx_buffer_info) {
2553 hw_dbg(&adapter->hw,
2554 "Unable to vmalloc buffer memory for "
2555 "the receive descriptor ring\n");
2556 goto alloc_failed;
2557 }
2558 memset(rx_ring->rx_buffer_info, 0, size);
2559
2560 /* Round up to nearest 4K */
2561 rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
2562 rx_ring->size = ALIGN(rx_ring->size, 4096);
2563
2564 rx_ring->desc = pci_alloc_consistent(pdev, rx_ring->size,
2565 &rx_ring->dma);
2566
2567 if (!rx_ring->desc) {
2568 hw_dbg(&adapter->hw,
2569 "Unable to allocate memory for "
2570 "the receive descriptor ring\n");
2571 vfree(rx_ring->rx_buffer_info);
2572 rx_ring->rx_buffer_info = NULL;
2573 goto alloc_failed;
2574 }
2575
2576 rx_ring->next_to_clean = 0;
2577 rx_ring->next_to_use = 0;
2578
2579 return 0;
2580alloc_failed:
2581 return -ENOMEM;
2582}
2583
2584/**
2585 * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
2586 * @adapter: board private structure
2587 *
2588 * If this function returns with an error, then it's possible one or
2589 * more of the rings is populated (while the rest are not). It is the
2590 * callers duty to clean those orphaned rings.
2591 *
2592 * Return 0 on success, negative on failure
2593 **/
2594static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
2595{
2596 int i, err = 0;
2597
2598 for (i = 0; i < adapter->num_rx_queues; i++) {
2599 err = ixgbevf_setup_rx_resources(adapter, &adapter->rx_ring[i]);
2600 if (!err)
2601 continue;
2602 hw_dbg(&adapter->hw,
2603 "Allocation for Rx Queue %u failed\n", i);
2604 break;
2605 }
2606 return err;
2607}
2608
2609/**
2610 * ixgbevf_free_rx_resources - Free Rx Resources
2611 * @adapter: board private structure
2612 * @rx_ring: ring to clean the resources from
2613 *
2614 * Free all receive software resources
2615 **/
2616void ixgbevf_free_rx_resources(struct ixgbevf_adapter *adapter,
2617 struct ixgbevf_ring *rx_ring)
2618{
2619 struct pci_dev *pdev = adapter->pdev;
2620
2621 ixgbevf_clean_rx_ring(adapter, rx_ring);
2622
2623 vfree(rx_ring->rx_buffer_info);
2624 rx_ring->rx_buffer_info = NULL;
2625
2626 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2627
2628 rx_ring->desc = NULL;
2629}
2630
2631/**
2632 * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
2633 * @adapter: board private structure
2634 *
2635 * Free all receive software resources
2636 **/
2637static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
2638{
2639 int i;
2640
2641 for (i = 0; i < adapter->num_rx_queues; i++)
2642 if (adapter->rx_ring[i].desc)
2643 ixgbevf_free_rx_resources(adapter,
2644 &adapter->rx_ring[i]);
2645}
2646
2647/**
2648 * ixgbevf_open - Called when a network interface is made active
2649 * @netdev: network interface device structure
2650 *
2651 * Returns 0 on success, negative value on failure
2652 *
2653 * The open entry point is called when a network interface is made
2654 * active by the system (IFF_UP). At this point all resources needed
2655 * for transmit and receive operations are allocated, the interrupt
2656 * handler is registered with the OS, the watchdog timer is started,
2657 * and the stack is notified that the interface is ready.
2658 **/
2659static int ixgbevf_open(struct net_device *netdev)
2660{
2661 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2662 struct ixgbe_hw *hw = &adapter->hw;
2663 int err;
2664
2665 /* disallow open during test */
2666 if (test_bit(__IXGBEVF_TESTING, &adapter->state))
2667 return -EBUSY;
2668
2669 if (hw->adapter_stopped) {
2670 ixgbevf_reset(adapter);
2671 /* if adapter is still stopped then PF isn't up and
2672 * the vf can't start. */
2673 if (hw->adapter_stopped) {
2674 err = IXGBE_ERR_MBX;
2675 printk(KERN_ERR "Unable to start - perhaps the PF"
29b8dd02 2676 " Driver isn't up yet\n");
92915f71
GR		 2677 goto err_setup_reset;
2678 }
2679 }
2680
2681 /* allocate transmit descriptors */
2682 err = ixgbevf_setup_all_tx_resources(adapter);
2683 if (err)
2684 goto err_setup_tx;
2685
2686 /* allocate receive descriptors */
2687 err = ixgbevf_setup_all_rx_resources(adapter);
2688 if (err)
2689 goto err_setup_rx;
2690
2691 ixgbevf_configure(adapter);
2692
2693 /*
2694 * Map the Tx/Rx rings to the vectors we were allotted.
2695 * if request_irq will be called in this function map_rings
2696 * must be called *before* up_complete
2697 */
2698 ixgbevf_map_rings_to_vectors(adapter);
2699
2700 err = ixgbevf_up_complete(adapter);
2701 if (err)
2702 goto err_up;
2703
2704 /* clear any pending interrupts, may auto mask */
2705 IXGBE_READ_REG(hw, IXGBE_VTEICR);
2706 err = ixgbevf_request_irq(adapter);
2707 if (err)
2708 goto err_req_irq;
2709
2710 ixgbevf_irq_enable(adapter, true, true);
2711
2712 return 0;
2713
2714err_req_irq:
2715 ixgbevf_down(adapter);
2716err_up:
2717 ixgbevf_free_irq(adapter);
2718err_setup_rx:
2719 ixgbevf_free_all_rx_resources(adapter);
2720err_setup_tx:
2721 ixgbevf_free_all_tx_resources(adapter);
2722 ixgbevf_reset(adapter);
2723
2724err_setup_reset:
2725
2726 return err;
2727}
2728
2729/**
2730 * ixgbevf_close - Disables a network interface
2731 * @netdev: network interface device structure
2732 *
2733 * Returns 0, this is not allowed to fail
2734 *
2735 * The close entry point is called when an interface is de-activated
2736 * by the OS. The hardware is still under the drivers control, but
2737 * needs to be disabled. A global MAC reset is issued to stop the
2738 * hardware, and all transmit and receive resources are freed.
2739 **/
2740static int ixgbevf_close(struct net_device *netdev)
2741{
2742 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
2743
2744 ixgbevf_down(adapter);
2745 ixgbevf_free_irq(adapter);
2746
2747 ixgbevf_free_all_tx_resources(adapter);
2748 ixgbevf_free_all_rx_resources(adapter);
2749
2750 return 0;
2751}
2752
2753static int ixgbevf_tso(struct ixgbevf_adapter *adapter,
2754 struct ixgbevf_ring *tx_ring,
2755 struct sk_buff *skb, u32 tx_flags, u8 *hdr_len)
2756{
2757 struct ixgbe_adv_tx_context_desc *context_desc;
2758 unsigned int i;
2759 int err;
2760 struct ixgbevf_tx_buffer *tx_buffer_info;
2761 u32 vlan_macip_lens = 0, type_tucmd_mlhl;
2762 u32 mss_l4len_idx, l4len;
2763
2764 if (skb_is_gso(skb)) {
2765 if (skb_header_cloned(skb)) {
2766 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2767 if (err)
2768 return err;
2769 }
2770 l4len = tcp_hdrlen(skb);
2771 *hdr_len += l4len;
2772
2773 if (skb->protocol == htons(ETH_P_IP)) {
2774 struct iphdr *iph = ip_hdr(skb);
2775 iph->tot_len = 0;
2776 iph->check = 0;
2777 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2778 iph->daddr, 0,
2779 IPPROTO_TCP,
2780 0);
2781 adapter->hw_tso_ctxt++;
9010bc33 2782 } else if (skb_is_gso_v6(skb)) {
92915f71
GR		 2783 ipv6_hdr(skb)->payload_len = 0;
2784 tcp_hdr(skb)->check =
2785 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2786 &ipv6_hdr(skb)->daddr,
2787 0, IPPROTO_TCP, 0);
2788 adapter->hw_tso6_ctxt++;
2789 }
2790
2791 i = tx_ring->next_to_use;
2792
2793 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2794 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2795
2796 /* VLAN MACLEN IPLEN */
2797 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2798 vlan_macip_lens |=
2799 (tx_flags & IXGBE_TX_FLAGS_VLAN_MASK);
2800 vlan_macip_lens |= ((skb_network_offset(skb)) <<
2801 IXGBE_ADVTXD_MACLEN_SHIFT);
2802 *hdr_len += skb_network_offset(skb);
2803 vlan_macip_lens |=
2804 (skb_transport_header(skb) - skb_network_header(skb));
2805 *hdr_len +=
2806 (skb_transport_header(skb) - skb_network_header(skb));
2807 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2808 context_desc->seqnum_seed = 0;
2809
2810 /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
2811 type_tucmd_mlhl = (IXGBE_TXD_CMD_DEXT |
2812 IXGBE_ADVTXD_DTYP_CTXT);
2813
2814 if (skb->protocol == htons(ETH_P_IP))
2815 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2816 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_L4T_TCP;
2817 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2818
2819 /* MSS L4LEN IDX */
2820 mss_l4len_idx =
2821 (skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT);
2822 mss_l4len_idx |= (l4len << IXGBE_ADVTXD_L4LEN_SHIFT);
2823 /* use index 1 for TSO */
2824 mss_l4len_idx |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
2825 context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
2826
2827 tx_buffer_info->time_stamp = jiffies;
2828 tx_buffer_info->next_to_watch = i;
2829
2830 i++;
2831 if (i == tx_ring->count)
2832 i = 0;
2833 tx_ring->next_to_use = i;
2834
2835 return true;
2836 }
2837
2838 return false;
2839}
2840
2841static bool ixgbevf_tx_csum(struct ixgbevf_adapter *adapter,
2842 struct ixgbevf_ring *tx_ring,
2843 struct sk_buff *skb, u32 tx_flags)
2844{
2845 struct ixgbe_adv_tx_context_desc *context_desc;
2846 unsigned int i;
2847 struct ixgbevf_tx_buffer *tx_buffer_info;
2848 u32 vlan_macip_lens = 0, type_tucmd_mlhl = 0;
2849
2850 if (skb->ip_summed == CHECKSUM_PARTIAL ||
2851 (tx_flags & IXGBE_TX_FLAGS_VLAN)) {
2852 i = tx_ring->next_to_use;
2853 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2854 context_desc = IXGBE_TX_CTXTDESC_ADV(*tx_ring, i);
2855
2856 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
2857 vlan_macip_lens |= (tx_flags &
2858 IXGBE_TX_FLAGS_VLAN_MASK);
2859 vlan_macip_lens |= (skb_network_offset(skb) <<
2860 IXGBE_ADVTXD_MACLEN_SHIFT);
2861 if (skb->ip_summed == CHECKSUM_PARTIAL)
2862 vlan_macip_lens |= (skb_transport_header(skb) -
2863 skb_network_header(skb));
2864
2865 context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
2866 context_desc->seqnum_seed = 0;
2867
2868 type_tucmd_mlhl |= (IXGBE_TXD_CMD_DEXT |
2869 IXGBE_ADVTXD_DTYP_CTXT);
2870
2871 if (skb->ip_summed == CHECKSUM_PARTIAL) {
2872 switch (skb->protocol) {
2873 case __constant_htons(ETH_P_IP):
2874 type_tucmd_mlhl |= IXGBE_ADVTXD_TUCMD_IPV4;
2875 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2876 type_tucmd_mlhl |=
2877 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2878 break;
2879 case __constant_htons(ETH_P_IPV6):
2880 /* XXX what about other V6 headers?? */
2881 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2882 type_tucmd_mlhl |=
2883 IXGBE_ADVTXD_TUCMD_L4T_TCP;
2884 break;
2885 default:
2886 if (unlikely(net_ratelimit())) {
2887 printk(KERN_WARNING
2888 "partial checksum but "
2889 "proto=%x!\n",
2890 skb->protocol);
2891 }
2892 break;
2893 }
2894 }
2895
2896 context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd_mlhl);
2897 /* use index zero for tx checksum offload */
2898 context_desc->mss_l4len_idx = 0;
2899
2900 tx_buffer_info->time_stamp = jiffies;
2901 tx_buffer_info->next_to_watch = i;
2902
2903 adapter->hw_csum_tx_good++;
2904 i++;
2905 if (i == tx_ring->count)
2906 i = 0;
2907 tx_ring->next_to_use = i;
2908
2909 return true;
2910 }
2911
2912 return false;
2913}
2914
2915static int ixgbevf_tx_map(struct ixgbevf_adapter *adapter,
2916 struct ixgbevf_ring *tx_ring,
2917 struct sk_buff *skb, u32 tx_flags,
2918 unsigned int first)
2919{
2920 struct pci_dev *pdev = adapter->pdev;
2921 struct ixgbevf_tx_buffer *tx_buffer_info;
2922 unsigned int len;
2923 unsigned int total = skb->len;
65deeed7 2924 unsigned int offset = 0, size, count = 0;
92915f71
GR		 2925 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
2926 unsigned int f;
65deeed7 2927 int i;
92915f71
GR		 2928
2929 i = tx_ring->next_to_use;
2930
2931 len = min(skb_headlen(skb), total);
2932 while (len) {
2933 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2934 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2935
2936 tx_buffer_info->length = size;
2937 tx_buffer_info->mapped_as_page = false;
2938 tx_buffer_info->dma = pci_map_single(adapter->pdev,
2939 skb->data + offset,
2940 size, PCI_DMA_TODEVICE);
2941 if (pci_dma_mapping_error(pdev, tx_buffer_info->dma))
2942 goto dma_error;
2943 tx_buffer_info->time_stamp = jiffies;
2944 tx_buffer_info->next_to_watch = i;
2945
2946 len -= size;
2947 total -= size;
2948 offset += size;
2949 count++;
2950 i++;
2951 if (i == tx_ring->count)
2952 i = 0;
2953 }
2954
2955 for (f = 0; f < nr_frags; f++) {
2956 struct skb_frag_struct *frag;
2957
2958 frag = &skb_shinfo(skb)->frags[f];
2959 len = min((unsigned int)frag->size, total);
2960 offset = frag->page_offset;
2961
2962 while (len) {
2963 tx_buffer_info = &tx_ring->tx_buffer_info[i];
2964 size = min(len, (unsigned int)IXGBE_MAX_DATA_PER_TXD);
2965
2966 tx_buffer_info->length = size;
2967 tx_buffer_info->dma = pci_map_page(adapter->pdev,
2968 frag->page,
2969 offset,
2970 size,
2971 PCI_DMA_TODEVICE);
2972 tx_buffer_info->mapped_as_page = true;
2973 if (pci_dma_mapping_error(pdev, tx_buffer_info->dma))
2974 goto dma_error;
2975 tx_buffer_info->time_stamp = jiffies;
2976 tx_buffer_info->next_to_watch = i;
2977
2978 len -= size;
2979 total -= size;
2980 offset += size;
2981 count++;
2982 i++;
2983 if (i == tx_ring->count)
2984 i = 0;
2985 }
2986 if (total == 0)
2987 break;
2988 }
2989
2990 if (i == 0)
2991 i = tx_ring->count - 1;
2992 else
2993 i = i - 1;
2994 tx_ring->tx_buffer_info[i].skb = skb;
2995 tx_ring->tx_buffer_info[first].next_to_watch = i;
2996
2997 return count;
2998
2999dma_error:
3000 dev_err(&pdev->dev, "TX DMA map failed\n");
3001
3002 /* clear timestamp and dma mappings for failed tx_buffer_info map */
3003 tx_buffer_info->dma = 0;
3004 tx_buffer_info->time_stamp = 0;
3005 tx_buffer_info->next_to_watch = 0;
3006 count--;
3007
3008 /* clear timestamp and dma mappings for remaining portion of packet */
3009 while (count >= 0) {
3010 count--;
3011 i--;
3012 if (i < 0)
3013 i += tx_ring->count;
3014 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3015 ixgbevf_unmap_and_free_tx_resource(adapter, tx_buffer_info);
3016 }
3017
3018 return count;
3019}
3020
3021static void ixgbevf_tx_queue(struct ixgbevf_adapter *adapter,
3022 struct ixgbevf_ring *tx_ring, int tx_flags,
3023 int count, u32 paylen, u8 hdr_len)
3024{
3025 union ixgbe_adv_tx_desc *tx_desc = NULL;
3026 struct ixgbevf_tx_buffer *tx_buffer_info;
3027 u32 olinfo_status = 0, cmd_type_len = 0;
3028 unsigned int i;
3029
3030 u32 txd_cmd = IXGBE_TXD_CMD_EOP | IXGBE_TXD_CMD_RS | IXGBE_TXD_CMD_IFCS;
3031
3032 cmd_type_len |= IXGBE_ADVTXD_DTYP_DATA;
3033
3034 cmd_type_len |= IXGBE_ADVTXD_DCMD_IFCS | IXGBE_ADVTXD_DCMD_DEXT;
3035
3036 if (tx_flags & IXGBE_TX_FLAGS_VLAN)
3037 cmd_type_len |= IXGBE_ADVTXD_DCMD_VLE;
3038
3039 if (tx_flags & IXGBE_TX_FLAGS_TSO) {
3040 cmd_type_len |= IXGBE_ADVTXD_DCMD_TSE;
3041
3042 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3043 IXGBE_ADVTXD_POPTS_SHIFT;
3044
3045 /* use index 1 context for tso */
3046 olinfo_status |= (1 << IXGBE_ADVTXD_IDX_SHIFT);
3047 if (tx_flags & IXGBE_TX_FLAGS_IPV4)
3048 olinfo_status |= IXGBE_TXD_POPTS_IXSM <<
3049 IXGBE_ADVTXD_POPTS_SHIFT;
3050
3051 } else if (tx_flags & IXGBE_TX_FLAGS_CSUM)
3052 olinfo_status |= IXGBE_TXD_POPTS_TXSM <<
3053 IXGBE_ADVTXD_POPTS_SHIFT;
3054
3055 olinfo_status |= ((paylen - hdr_len) << IXGBE_ADVTXD_PAYLEN_SHIFT);
3056
3057 i = tx_ring->next_to_use;
3058 while (count--) {
3059 tx_buffer_info = &tx_ring->tx_buffer_info[i];
3060 tx_desc = IXGBE_TX_DESC_ADV(*tx_ring, i);
3061 tx_desc->read.buffer_addr = cpu_to_le64(tx_buffer_info->dma);
3062 tx_desc->read.cmd_type_len =
3063 cpu_to_le32(cmd_type_len | tx_buffer_info->length);
3064 tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
3065 i++;
3066 if (i == tx_ring->count)
3067 i = 0;
3068 }
3069
3070 tx_desc->read.cmd_type_len |= cpu_to_le32(txd_cmd);
3071
3072 /*
3073 * Force memory writes to complete before letting h/w
3074 * know there are new descriptors to fetch. (Only
3075 * applicable for weak-ordered memory model archs,
3076 * such as IA-64).
3077 */
3078 wmb();
3079
3080 tx_ring->next_to_use = i;
3081 writel(i, adapter->hw.hw_addr + tx_ring->tail);
3082}
3083
3084static int __ixgbevf_maybe_stop_tx(struct net_device *netdev,
3085 struct ixgbevf_ring *tx_ring, int size)
3086{
3087 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3088
3089 netif_stop_subqueue(netdev, tx_ring->queue_index);
3090 /* Herbert's original patch had:
3091 * smp_mb__after_netif_stop_queue();
3092 * but since that doesn't exist yet, just open code it. */
3093 smp_mb();
3094
3095 /* We need to check again in a case another CPU has just
3096 * made room available. */
3097 if (likely(IXGBE_DESC_UNUSED(tx_ring) < size))
3098 return -EBUSY;
3099
3100 /* A reprieve! - use start_queue because it doesn't call schedule */
3101 netif_start_subqueue(netdev, tx_ring->queue_index);
3102 ++adapter->restart_queue;
3103 return 0;
3104}
3105
3106static int ixgbevf_maybe_stop_tx(struct net_device *netdev,
3107 struct ixgbevf_ring *tx_ring, int size)
3108{
3109 if (likely(IXGBE_DESC_UNUSED(tx_ring) >= size))
3110 return 0;
3111 return __ixgbevf_maybe_stop_tx(netdev, tx_ring, size);
3112}
3113
3114static int ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3115{
3116 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3117 struct ixgbevf_ring *tx_ring;
3118 unsigned int first;
3119 unsigned int tx_flags = 0;
3120 u8 hdr_len = 0;
3121 int r_idx = 0, tso;
3122 int count = 0;
3123
3124 unsigned int f;
3125
3126 tx_ring = &adapter->tx_ring[r_idx];
3127
3128 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
3129 tx_flags |= vlan_tx_tag_get(skb);
3130 tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
3131 tx_flags |= IXGBE_TX_FLAGS_VLAN;
3132 }
3133
3134 /* four things can cause us to need a context descriptor */
3135 if (skb_is_gso(skb) ||
3136 (skb->ip_summed == CHECKSUM_PARTIAL) ||
3137 (tx_flags & IXGBE_TX_FLAGS_VLAN))
3138 count++;
3139
3140 count += TXD_USE_COUNT(skb_headlen(skb));
3141 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
3142 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
3143
3144 if (ixgbevf_maybe_stop_tx(netdev, tx_ring, count)) {
3145 adapter->tx_busy++;
3146 return NETDEV_TX_BUSY;
3147 }
3148
3149 first = tx_ring->next_to_use;
3150
3151 if (skb->protocol == htons(ETH_P_IP))
3152 tx_flags |= IXGBE_TX_FLAGS_IPV4;
3153 tso = ixgbevf_tso(adapter, tx_ring, skb, tx_flags, &hdr_len);
3154 if (tso < 0) {
3155 dev_kfree_skb_any(skb);
3156 return NETDEV_TX_OK;
3157 }
3158
3159 if (tso)
3160 tx_flags |= IXGBE_TX_FLAGS_TSO;
3161 else if (ixgbevf_tx_csum(adapter, tx_ring, skb, tx_flags) &&
3162 (skb->ip_summed == CHECKSUM_PARTIAL))
3163 tx_flags |= IXGBE_TX_FLAGS_CSUM;
3164
3165 ixgbevf_tx_queue(adapter, tx_ring, tx_flags,
3166 ixgbevf_tx_map(adapter, tx_ring, skb, tx_flags, first),
3167 skb->len, hdr_len);
3168
3169 netdev->trans_start = jiffies;
3170
3171 ixgbevf_maybe_stop_tx(netdev, tx_ring, DESC_NEEDED);
3172
3173 return NETDEV_TX_OK;
3174}
3175
3176/**
3177 * ixgbevf_get_stats - Get System Network Statistics
3178 * @netdev: network interface device structure
3179 *
3180 * Returns the address of the device statistics structure.
3181 * The statistics are actually updated from the timer callback.
3182 **/
3183static struct net_device_stats *ixgbevf_get_stats(struct net_device *netdev)
3184{
3185 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3186
3187 /* only return the current stats */
3188 return &adapter->net_stats;
3189}
3190
3191/**
3192 * ixgbevf_set_mac - Change the Ethernet Address of the NIC
3193 * @netdev: network interface device structure
3194 * @p: pointer to an address structure
3195 *
3196 * Returns 0 on success, negative on failure
3197 **/
3198static int ixgbevf_set_mac(struct net_device *netdev, void *p)
3199{
3200 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3201 struct ixgbe_hw *hw = &adapter->hw;
3202 struct sockaddr *addr = p;
3203
3204 if (!is_valid_ether_addr(addr->sa_data))
3205 return -EADDRNOTAVAIL;
3206
3207 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3208 memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
3209
3210 if (hw->mac.ops.set_rar)
3211 hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
3212
3213 return 0;
3214}
3215
3216/**
3217 * ixgbevf_change_mtu - Change the Maximum Transfer Unit
3218 * @netdev: network interface device structure
3219 * @new_mtu: new value for maximum frame size
3220 *
3221 * Returns 0 on success, negative on failure
3222 **/
3223static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
3224{
3225 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3226 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
3227
3228 /* MTU < 68 is an error and causes problems on some kernels */
3229 if ((new_mtu < 68) || (max_frame > MAXIMUM_ETHERNET_VLAN_SIZE))
3230 return -EINVAL;
3231
3232 hw_dbg(&adapter->hw, "changing MTU from %d to %d\n",
3233 netdev->mtu, new_mtu);
3234 /* must set new MTU before calling down or up */
3235 netdev->mtu = new_mtu;
3236
3237 if (netif_running(netdev))
3238 ixgbevf_reinit_locked(adapter);
3239
3240 return 0;
3241}
3242
3243static void ixgbevf_shutdown(struct pci_dev *pdev)
3244{
3245 struct net_device *netdev = pci_get_drvdata(pdev);
3246 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3247
3248 netif_device_detach(netdev);
3249
3250 if (netif_running(netdev)) {
3251 ixgbevf_down(adapter);
3252 ixgbevf_free_irq(adapter);
3253 ixgbevf_free_all_tx_resources(adapter);
3254 ixgbevf_free_all_rx_resources(adapter);
3255 }
3256
3257#ifdef CONFIG_PM
3258 pci_save_state(pdev);
3259#endif
3260
3261 pci_disable_device(pdev);
3262}
3263
92915f71
GR		 3264static const struct net_device_ops ixgbe_netdev_ops = {
3265 .ndo_open = &ixgbevf_open,
3266 .ndo_stop = &ixgbevf_close,
3267 .ndo_start_xmit = &ixgbevf_xmit_frame,
3268 .ndo_get_stats = &ixgbevf_get_stats,
3269 .ndo_set_rx_mode = &ixgbevf_set_rx_mode,
3270 .ndo_set_multicast_list = &ixgbevf_set_rx_mode,
3271 .ndo_validate_addr = eth_validate_addr,
3272 .ndo_set_mac_address = &ixgbevf_set_mac,
3273 .ndo_change_mtu = &ixgbevf_change_mtu,
3274 .ndo_tx_timeout = &ixgbevf_tx_timeout,
3275 .ndo_vlan_rx_register = &ixgbevf_vlan_rx_register,
3276 .ndo_vlan_rx_add_vid = &ixgbevf_vlan_rx_add_vid,
3277 .ndo_vlan_rx_kill_vid = &ixgbevf_vlan_rx_kill_vid,
3278};
92915f71
GR		 3279
3280static void ixgbevf_assign_netdev_ops(struct net_device *dev)
3281{
3282 struct ixgbevf_adapter *adapter;
3283 adapter = netdev_priv(dev);
92915f71 3284 dev->netdev_ops = &ixgbe_netdev_ops;
92915f71
GR		 3285 ixgbevf_set_ethtool_ops(dev);
3286 dev->watchdog_timeo = 5 * HZ;
3287}
3288
3289/**
3290 * ixgbevf_probe - Device Initialization Routine
3291 * @pdev: PCI device information struct
3292 * @ent: entry in ixgbevf_pci_tbl
3293 *
3294 * Returns 0 on success, negative on failure
3295 *
3296 * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
3297 * The OS initialization, configuring of the adapter private structure,
3298 * and a hardware reset occur.
3299 **/
3300static int __devinit ixgbevf_probe(struct pci_dev *pdev,
3301 const struct pci_device_id *ent)
3302{
3303 struct net_device *netdev;
3304 struct ixgbevf_adapter *adapter = NULL;
3305 struct ixgbe_hw *hw = NULL;
3306 const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
3307 static int cards_found;
3308 int err, pci_using_dac;
3309
3310 err = pci_enable_device(pdev);
3311 if (err)
3312 return err;
3313
3314 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
3315 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
3316 pci_using_dac = 1;
3317 } else {
3318 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3319 if (err) {
3320 err = pci_set_consistent_dma_mask(pdev,
3321 DMA_BIT_MASK(32));
3322 if (err) {
3323 dev_err(&pdev->dev, "No usable DMA "
3324 "configuration, aborting\n");
3325 goto err_dma;
3326 }
3327 }
3328 pci_using_dac = 0;
3329 }
3330
3331 err = pci_request_regions(pdev, ixgbevf_driver_name);
3332 if (err) {
3333 dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
3334 goto err_pci_reg;
3335 }
3336
3337 pci_set_master(pdev);
3338
3339#ifdef HAVE_TX_MQ
3340 netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
3341 MAX_TX_QUEUES);
3342#else
3343 netdev = alloc_etherdev(sizeof(struct ixgbevf_adapter));
3344#endif
3345 if (!netdev) {
3346 err = -ENOMEM;
3347 goto err_alloc_etherdev;
3348 }
3349
3350 SET_NETDEV_DEV(netdev, &pdev->dev);
3351
3352 pci_set_drvdata(pdev, netdev);
3353 adapter = netdev_priv(netdev);
3354
3355 adapter->netdev = netdev;
3356 adapter->pdev = pdev;
3357 hw = &adapter->hw;
3358 hw->back = adapter;
3359 adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
3360
3361 /*
3362 * call save state here in standalone driver because it relies on
3363 * adapter struct to exist, and needs to call netdev_priv
3364 */
3365 pci_save_state(pdev);
3366
3367 hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
3368 pci_resource_len(pdev, 0));
3369 if (!hw->hw_addr) {
3370 err = -EIO;
3371 goto err_ioremap;
3372 }
3373
3374 ixgbevf_assign_netdev_ops(netdev);
3375
3376 adapter->bd_number = cards_found;
3377
3378 /* Setup hw api */
3379 memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
3380 hw->mac.type = ii->mac;
3381
3382 memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
3383 sizeof(struct ixgbe_mac_operations));
3384
3385 adapter->flags &= ~IXGBE_FLAG_RX_PS_CAPABLE;
3386 adapter->flags &= ~IXGBE_FLAG_RX_PS_ENABLED;
3387 adapter->flags |= IXGBE_FLAG_RX_1BUF_CAPABLE;
3388
3389 /* setup the private structure */
3390 err = ixgbevf_sw_init(adapter);
3391
92915f71
GR		 3392#ifdef MAX_SKB_FRAGS
3393 netdev->features = NETIF_F_SG |
3394 NETIF_F_IP_CSUM |
3395 NETIF_F_HW_VLAN_TX |
3396 NETIF_F_HW_VLAN_RX |
3397 NETIF_F_HW_VLAN_FILTER;
3398
3399 netdev->features |= NETIF_F_IPV6_CSUM;
3400 netdev->features |= NETIF_F_TSO;
3401 netdev->features |= NETIF_F_TSO6;
3402 netdev->vlan_features |= NETIF_F_TSO;
3403 netdev->vlan_features |= NETIF_F_TSO6;
3404 netdev->vlan_features |= NETIF_F_IP_CSUM;
3405 netdev->vlan_features |= NETIF_F_SG;
3406
3407 if (pci_using_dac)
3408 netdev->features |= NETIF_F_HIGHDMA;
3409
3410#endif /* MAX_SKB_FRAGS */
3411
3412 /* The HW MAC address was set and/or determined in sw_init */
3413 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
3414 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
3415
3416 if (!is_valid_ether_addr(netdev->dev_addr)) {
3417 printk(KERN_ERR "invalid MAC address\n");
3418 err = -EIO;
3419 goto err_sw_init;
3420 }
3421
3422 init_timer(&adapter->watchdog_timer);
3423 adapter->watchdog_timer.function = &ixgbevf_watchdog;
3424 adapter->watchdog_timer.data = (unsigned long)adapter;
3425
3426 INIT_WORK(&adapter->reset_task, ixgbevf_reset_task);
3427 INIT_WORK(&adapter->watchdog_task, ixgbevf_watchdog_task);
3428
3429 err = ixgbevf_init_interrupt_scheme(adapter);
3430 if (err)
3431 goto err_sw_init;
3432
3433 /* pick up the PCI bus settings for reporting later */
3434 if (hw->mac.ops.get_bus_info)
3435 hw->mac.ops.get_bus_info(hw);
3436
3437
3438 netif_carrier_off(netdev);
3439 netif_tx_stop_all_queues(netdev);
3440
3441 strcpy(netdev->name, "eth%d");
3442
3443 err = register_netdev(netdev);
3444 if (err)
3445 goto err_register;
3446
3447 adapter->netdev_registered = true;
3448
33bd9f60
GR		 3449 ixgbevf_init_last_counter_stats(adapter);
3450
92915f71
GR		 3451 /* print the MAC address */
3452 hw_dbg(hw, "%2.2x:%2.2x:%2.2x:%2.2x:%2.2x:%2.2x\n",
3453 netdev->dev_addr[0],
3454 netdev->dev_addr[1],
3455 netdev->dev_addr[2],
3456 netdev->dev_addr[3],
3457 netdev->dev_addr[4],
3458 netdev->dev_addr[5]);
3459
3460 hw_dbg(hw, "MAC: %d\n", hw->mac.type);
3461
d6dbee86 3462 hw_dbg(hw, "LRO is disabled\n");
92915f71
GR		 3463
3464 hw_dbg(hw, "Intel(R) 82599 Virtual Function\n");
3465 cards_found++;
3466 return 0;
3467
3468err_register:
3469err_sw_init:
3470 ixgbevf_reset_interrupt_capability(adapter);
3471 iounmap(hw->hw_addr);
3472err_ioremap:
3473 free_netdev(netdev);
3474err_alloc_etherdev:
3475 pci_release_regions(pdev);
3476err_pci_reg:
3477err_dma:
3478 pci_disable_device(pdev);
3479 return err;
3480}
3481
3482/**
3483 * ixgbevf_remove - Device Removal Routine
3484 * @pdev: PCI device information struct
3485 *
3486 * ixgbevf_remove is called by the PCI subsystem to alert the driver
3487 * that it should release a PCI device. The could be caused by a
3488 * Hot-Plug event, or because the driver is going to be removed from
3489 * memory.
3490 **/
3491static void __devexit ixgbevf_remove(struct pci_dev *pdev)
3492{
3493 struct net_device *netdev = pci_get_drvdata(pdev);
3494 struct ixgbevf_adapter *adapter = netdev_priv(netdev);
3495
3496 set_bit(__IXGBEVF_DOWN, &adapter->state);
3497
3498 del_timer_sync(&adapter->watchdog_timer);
3499
3500 cancel_work_sync(&adapter->watchdog_task);
3501
3502 flush_scheduled_work();
3503
3504 if (adapter->netdev_registered) {
3505 unregister_netdev(netdev);
3506 adapter->netdev_registered = false;
3507 }
3508
3509 ixgbevf_reset_interrupt_capability(adapter);
3510
3511 iounmap(adapter->hw.hw_addr);
3512 pci_release_regions(pdev);
3513
3514 hw_dbg(&adapter->hw, "Remove complete\n");
3515
3516 kfree(adapter->tx_ring);
3517 kfree(adapter->rx_ring);
3518
3519 free_netdev(netdev);
3520
3521 pci_disable_device(pdev);
3522}
3523
3524static struct pci_driver ixgbevf_driver = {
3525 .name = ixgbevf_driver_name,
3526 .id_table = ixgbevf_pci_tbl,
3527 .probe = ixgbevf_probe,
3528 .remove = __devexit_p(ixgbevf_remove),
3529 .shutdown = ixgbevf_shutdown,
3530};
3531
3532/**
3533 * ixgbe_init_module - Driver Registration Routine
3534 *
3535 * ixgbe_init_module is the first routine called when the driver is
3536 * loaded. All it does is register with the PCI subsystem.
3537 **/
3538static int __init ixgbevf_init_module(void)
3539{
3540 int ret;
3541 printk(KERN_INFO "ixgbevf: %s - version %s\n", ixgbevf_driver_string,
3542 ixgbevf_driver_version);
3543
3544 printk(KERN_INFO "%s\n", ixgbevf_copyright);
3545
3546 ret = pci_register_driver(&ixgbevf_driver);
3547 return ret;
3548}
3549
3550module_init(ixgbevf_init_module);
3551
3552/**
3553 * ixgbe_exit_module - Driver Exit Cleanup Routine
3554 *
3555 * ixgbe_exit_module is called just before the driver is removed
3556 * from memory.
3557 **/
3558static void __exit ixgbevf_exit_module(void)
3559{
3560 pci_unregister_driver(&ixgbevf_driver);
3561}
3562
3563#ifdef DEBUG
3564/**
3565 * ixgbe_get_hw_dev_name - return device name string
3566 * used by hardware layer to print debugging information
3567 **/
3568char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
3569{
3570 struct ixgbevf_adapter *adapter = hw->back;
3571 return adapter->netdev->name;
3572}
3573
3574#endif
3575module_exit(ixgbevf_exit_module);
3576
3577/* ixgbevf_main.c */
Clone of davem's net-next-2.6 tree