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[net-next-2.6.git] / drivers / net / ixgb / ixgb_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/10GbE Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
0abb6eb1 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "ixgb.h"
30
1da177e4 31char ixgb_driver_name[] = "ixgb";
e9ab1d14 32static char ixgb_driver_string[] = "Intel(R) PRO/10GbE Network Driver";
1da177e4
LT		 33
34#ifndef CONFIG_IXGB_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
a3ffab87 39#define DRV_VERSION "1.0.126-k2"DRIVERNAPI
01e5abc2 40char ixgb_driver_version[] = DRV_VERSION;
d3f464b5 41static char ixgb_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 42
43/* ixgb_pci_tbl - PCI Device ID Table
44 *
45 * Wildcard entries (PCI_ANY_ID) should come last
46 * Last entry must be all 0s
47 *
48 * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
49 * Class, Class Mask, private data (not used) }
50 */
51static struct pci_device_id ixgb_pci_tbl[] = {
52 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX,
53 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
940829e2
AK		 54 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_CX4,
55 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
1da177e4
LT		 56 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_SR,
57 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
58 {INTEL_VENDOR_ID, IXGB_DEVICE_ID_82597EX_LR,
59 PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0},
60
61 /* required last entry */
62 {0,}
63};
64
65MODULE_DEVICE_TABLE(pci, ixgb_pci_tbl);
66
67/* Local Function Prototypes */
68
69int ixgb_up(struct ixgb_adapter *adapter);
70void ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog);
71void ixgb_reset(struct ixgb_adapter *adapter);
72int ixgb_setup_tx_resources(struct ixgb_adapter *adapter);
73int ixgb_setup_rx_resources(struct ixgb_adapter *adapter);
74void ixgb_free_tx_resources(struct ixgb_adapter *adapter);
75void ixgb_free_rx_resources(struct ixgb_adapter *adapter);
76void ixgb_update_stats(struct ixgb_adapter *adapter);
77
78static int ixgb_init_module(void);
79static void ixgb_exit_module(void);
80static int ixgb_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
81static void __devexit ixgb_remove(struct pci_dev *pdev);
82static int ixgb_sw_init(struct ixgb_adapter *adapter);
83static int ixgb_open(struct net_device *netdev);
84static int ixgb_close(struct net_device *netdev);
85static void ixgb_configure_tx(struct ixgb_adapter *adapter);
86static void ixgb_configure_rx(struct ixgb_adapter *adapter);
87static void ixgb_setup_rctl(struct ixgb_adapter *adapter);
88static void ixgb_clean_tx_ring(struct ixgb_adapter *adapter);
89static void ixgb_clean_rx_ring(struct ixgb_adapter *adapter);
90static void ixgb_set_multi(struct net_device *netdev);
91static void ixgb_watchdog(unsigned long data);
92static int ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
93static struct net_device_stats *ixgb_get_stats(struct net_device *netdev);
94static int ixgb_change_mtu(struct net_device *netdev, int new_mtu);
95static int ixgb_set_mac(struct net_device *netdev, void *p);
7d12e780 96static irqreturn_t ixgb_intr(int irq, void *data);
1da177e4 97static boolean_t ixgb_clean_tx_irq(struct ixgb_adapter *adapter);
ac79c82e 98
1da177e4
LT		 99#ifdef CONFIG_IXGB_NAPI
100static int ixgb_clean(struct net_device *netdev, int *budget);
101static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter,
102 int *work_done, int work_to_do);
103#else
104static boolean_t ixgb_clean_rx_irq(struct ixgb_adapter *adapter);
105#endif
106static void ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter);
107void ixgb_set_ethtool_ops(struct net_device *netdev);
108static void ixgb_tx_timeout(struct net_device *dev);
c4028958 109static void ixgb_tx_timeout_task(struct work_struct *work);
1da177e4
LT		 110static void ixgb_vlan_rx_register(struct net_device *netdev,
111 struct vlan_group *grp);
112static void ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
113static void ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
114static void ixgb_restore_vlan(struct ixgb_adapter *adapter);
115
1da177e4
LT		 116#ifdef CONFIG_NET_POLL_CONTROLLER
117/* for netdump / net console */
118static void ixgb_netpoll(struct net_device *dev);
119#endif
120
01748fbb
LV		 121static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
122 enum pci_channel_state state);
123static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev);
124static void ixgb_io_resume (struct pci_dev *pdev);
1da177e4 125
01748fbb 126/* Exported from other modules */
1da177e4
LT		 127extern void ixgb_check_options(struct ixgb_adapter *adapter);
128
01748fbb
LV		 129static struct pci_error_handlers ixgb_err_handler = {
130 .error_detected = ixgb_io_error_detected,
131 .slot_reset = ixgb_io_slot_reset,
132 .resume = ixgb_io_resume,
133};
134
1da177e4 135static struct pci_driver ixgb_driver = {
c2eba932 136 .name = ixgb_driver_name,
1da177e4 137 .id_table = ixgb_pci_tbl,
c2eba932
MC		 138 .probe = ixgb_probe,
139 .remove = __devexit_p(ixgb_remove),
01748fbb 140 .err_handler = &ixgb_err_handler
1da177e4
LT		 141};
142
143MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
144MODULE_DESCRIPTION("Intel(R) PRO/10GbE Network Driver");
145MODULE_LICENSE("GPL");
01e5abc2 146MODULE_VERSION(DRV_VERSION);
1da177e4 147
ec9c3f5d
AK		 148#define DEFAULT_DEBUG_LEVEL_SHIFT 3
149static int debug = DEFAULT_DEBUG_LEVEL_SHIFT;
150module_param(debug, int, 0);
151MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
152
1da177e4 153/* some defines for controlling descriptor fetches in h/w */
3ae84d92
JB		 154#define RXDCTL_WTHRESH_DEFAULT 15 /* chip writes back at this many or RXT0 */
155#define RXDCTL_PTHRESH_DEFAULT 0 /* chip considers prefech below
156 * this */
157#define RXDCTL_HTHRESH_DEFAULT 0 /* chip will only prefetch if tail
158 * is pushed this many descriptors
159 * from head */
1da177e4
LT		 160
161/**
162 * ixgb_init_module - Driver Registration Routine
163 *
164 * ixgb_init_module is the first routine called when the driver is
165 * loaded. All it does is register with the PCI subsystem.
166 **/
167
168static int __init
169ixgb_init_module(void)
170{
1da177e4
LT		 171 printk(KERN_INFO "%s - version %s\n",
172 ixgb_driver_string, ixgb_driver_version);
173
174 printk(KERN_INFO "%s\n", ixgb_copyright);
175
29917620 176 return pci_register_driver(&ixgb_driver);
1da177e4
LT		 177}
178
179module_init(ixgb_init_module);
180
181/**
182 * ixgb_exit_module - Driver Exit Cleanup Routine
183 *
184 * ixgb_exit_module is called just before the driver is removed
185 * from memory.
186 **/
187
188static void __exit
189ixgb_exit_module(void)
190{
1da177e4
LT		 191 pci_unregister_driver(&ixgb_driver);
192}
193
194module_exit(ixgb_exit_module);
195
196/**
197 * ixgb_irq_disable - Mask off interrupt generation on the NIC
198 * @adapter: board private structure
199 **/
200
235949d1 201static void
1da177e4
LT		 202ixgb_irq_disable(struct ixgb_adapter *adapter)
203{
204 atomic_inc(&adapter->irq_sem);
205 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
206 IXGB_WRITE_FLUSH(&adapter->hw);
207 synchronize_irq(adapter->pdev->irq);
208}
209
210/**
211 * ixgb_irq_enable - Enable default interrupt generation settings
212 * @adapter: board private structure
213 **/
214
235949d1 215static void
1da177e4
LT		 216ixgb_irq_enable(struct ixgb_adapter *adapter)
217{
218 if(atomic_dec_and_test(&adapter->irq_sem)) {
219 IXGB_WRITE_REG(&adapter->hw, IMS,
6dfbb6dd
MC		 220 IXGB_INT_RXT0 | IXGB_INT_RXDMT0 | IXGB_INT_TXDW |
221 IXGB_INT_LSC);
1da177e4
LT		 222 IXGB_WRITE_FLUSH(&adapter->hw);
223 }
224}
225
226int
227ixgb_up(struct ixgb_adapter *adapter)
228{
229 struct net_device *netdev = adapter->netdev;
230 int err;
231 int max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
232 struct ixgb_hw *hw = &adapter->hw;
233
234 /* hardware has been reset, we need to reload some things */
235
8556f0d1 236 ixgb_rar_set(hw, netdev->dev_addr, 0);
1da177e4
LT		 237 ixgb_set_multi(netdev);
238
239 ixgb_restore_vlan(adapter);
240
241 ixgb_configure_tx(adapter);
242 ixgb_setup_rctl(adapter);
243 ixgb_configure_rx(adapter);
244 ixgb_alloc_rx_buffers(adapter);
245
e59d1696
AK		 246 /* disable interrupts and get the hardware into a known state */
247 IXGB_WRITE_REG(&adapter->hw, IMC, 0xffffffff);
248
1da177e4
LT		 249#ifdef CONFIG_PCI_MSI
250 {
251 boolean_t pcix = (IXGB_READ_REG(&adapter->hw, STATUS) &
252 IXGB_STATUS_PCIX_MODE) ? TRUE : FALSE;
253 adapter->have_msi = TRUE;
254
255 if (!pcix)
256 adapter->have_msi = FALSE;
257 else if((err = pci_enable_msi(adapter->pdev))) {
ec9c3f5d 258 DPRINTK(PROBE, ERR,
1da177e4
LT		 259 "Unable to allocate MSI interrupt Error: %d\n", err);
260 adapter->have_msi = FALSE;
261 /* proceed to try to request regular interrupt */
262 }
263 }
264
265#endif
266 if((err = request_irq(adapter->pdev->irq, &ixgb_intr,
1fb9df5d 267 IRQF_SHARED | IRQF_SAMPLE_RANDOM,
ec9c3f5d
AK		 268 netdev->name, netdev))) {
269 DPRINTK(PROBE, ERR,
270 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 271 return err;
ec9c3f5d 272 }
1da177e4 273
1da177e4
LT		 274 if((hw->max_frame_size != max_frame) ||
275 (hw->max_frame_size !=
276 (IXGB_READ_REG(hw, MFS) >> IXGB_MFS_SHIFT))) {
277
278 hw->max_frame_size = max_frame;
279
280 IXGB_WRITE_REG(hw, MFS, hw->max_frame_size << IXGB_MFS_SHIFT);
281
282 if(hw->max_frame_size >
283 IXGB_MAX_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH) {
284 uint32_t ctrl0 = IXGB_READ_REG(hw, CTRL0);
285
286 if(!(ctrl0 & IXGB_CTRL0_JFE)) {
287 ctrl0 |= IXGB_CTRL0_JFE;
288 IXGB_WRITE_REG(hw, CTRL0, ctrl0);
289 }
290 }
291 }
292
293 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 294
295#ifdef CONFIG_IXGB_NAPI
296 netif_poll_enable(netdev);
297#endif
e59d1696
AK		 298 ixgb_irq_enable(adapter);
299
1da177e4
LT		 300 return 0;
301}
302
303void
304ixgb_down(struct ixgb_adapter *adapter, boolean_t kill_watchdog)
305{
306 struct net_device *netdev = adapter->netdev;
307
308 ixgb_irq_disable(adapter);
309 free_irq(adapter->pdev->irq, netdev);
310#ifdef CONFIG_PCI_MSI
311 if(adapter->have_msi == TRUE)
312 pci_disable_msi(adapter->pdev);
313
314#endif
315 if(kill_watchdog)
316 del_timer_sync(&adapter->watchdog_timer);
317#ifdef CONFIG_IXGB_NAPI
318 netif_poll_disable(netdev);
319#endif
320 adapter->link_speed = 0;
321 adapter->link_duplex = 0;
322 netif_carrier_off(netdev);
323 netif_stop_queue(netdev);
324
325 ixgb_reset(adapter);
326 ixgb_clean_tx_ring(adapter);
327 ixgb_clean_rx_ring(adapter);
328}
329
330void
331ixgb_reset(struct ixgb_adapter *adapter)
332{
333
334 ixgb_adapter_stop(&adapter->hw);
335 if(!ixgb_init_hw(&adapter->hw))
ec9c3f5d 336 DPRINTK(PROBE, ERR, "ixgb_init_hw failed.\n");
1da177e4
LT		 337}
338
339/**
340 * ixgb_probe - Device Initialization Routine
341 * @pdev: PCI device information struct
342 * @ent: entry in ixgb_pci_tbl
343 *
344 * Returns 0 on success, negative on failure
345 *
346 * ixgb_probe initializes an adapter identified by a pci_dev structure.
347 * The OS initialization, configuring of the adapter private structure,
348 * and a hardware reset occur.
349 **/
350
351static int __devinit
352ixgb_probe(struct pci_dev *pdev,
353 const struct pci_device_id *ent)
354{
355 struct net_device *netdev = NULL;
356 struct ixgb_adapter *adapter;
357 static int cards_found = 0;
358 unsigned long mmio_start;
359 int mmio_len;
360 int pci_using_dac;
361 int i;
362 int err;
363
364 if((err = pci_enable_device(pdev)))
365 return err;
366
c91e468a
AS		 367 if(!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
368 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 369 pci_using_dac = 1;
370 } else {
c91e468a
AS		 371 if((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) ||
372 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
ec9c3f5d
AK		 373 printk(KERN_ERR
374 "ixgb: No usable DMA configuration, aborting\n");
c91e468a 375 goto err_dma_mask;
1da177e4
LT		 376 }
377 pci_using_dac = 0;
378 }
379
380 if((err = pci_request_regions(pdev, ixgb_driver_name)))
c91e468a 381 goto err_request_regions;
1da177e4
LT		 382
383 pci_set_master(pdev);
384
385 netdev = alloc_etherdev(sizeof(struct ixgb_adapter));
386 if(!netdev) {
387 err = -ENOMEM;
388 goto err_alloc_etherdev;
389 }
390
391 SET_MODULE_OWNER(netdev);
392 SET_NETDEV_DEV(netdev, &pdev->dev);
393
394 pci_set_drvdata(pdev, netdev);
8908c6cd 395 adapter = netdev_priv(netdev);
1da177e4
LT		 396 adapter->netdev = netdev;
397 adapter->pdev = pdev;
398 adapter->hw.back = adapter;
ec9c3f5d 399 adapter->msg_enable = netif_msg_init(debug, DEFAULT_DEBUG_LEVEL_SHIFT);
1da177e4
LT		 400
401 mmio_start = pci_resource_start(pdev, BAR_0);
402 mmio_len = pci_resource_len(pdev, BAR_0);
403
404 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
405 if(!adapter->hw.hw_addr) {
406 err = -EIO;
407 goto err_ioremap;
408 }
409
410 for(i = BAR_1; i <= BAR_5; i++) {
411 if(pci_resource_len(pdev, i) == 0)
412 continue;
413 if(pci_resource_flags(pdev, i) & IORESOURCE_IO) {
414 adapter->hw.io_base = pci_resource_start(pdev, i);
415 break;
416 }
417 }
418
419 netdev->open = &ixgb_open;
420 netdev->stop = &ixgb_close;
421 netdev->hard_start_xmit = &ixgb_xmit_frame;
422 netdev->get_stats = &ixgb_get_stats;
423 netdev->set_multicast_list = &ixgb_set_multi;
424 netdev->set_mac_address = &ixgb_set_mac;
425 netdev->change_mtu = &ixgb_change_mtu;
426 ixgb_set_ethtool_ops(netdev);
427 netdev->tx_timeout = &ixgb_tx_timeout;
9b8118df 428 netdev->watchdog_timeo = 5 * HZ;
1da177e4
LT		 429#ifdef CONFIG_IXGB_NAPI
430 netdev->poll = &ixgb_clean;
431 netdev->weight = 64;
432#endif
433 netdev->vlan_rx_register = ixgb_vlan_rx_register;
434 netdev->vlan_rx_add_vid = ixgb_vlan_rx_add_vid;
435 netdev->vlan_rx_kill_vid = ixgb_vlan_rx_kill_vid;
436#ifdef CONFIG_NET_POLL_CONTROLLER
437 netdev->poll_controller = ixgb_netpoll;
438#endif
439
0eb5a34c 440 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT		 441 netdev->mem_start = mmio_start;
442 netdev->mem_end = mmio_start + mmio_len;
443 netdev->base_addr = adapter->hw.io_base;
444
445 adapter->bd_number = cards_found;
446 adapter->link_speed = 0;
447 adapter->link_duplex = 0;
448
449 /* setup the private structure */
450
451 if((err = ixgb_sw_init(adapter)))
452 goto err_sw_init;
453
454 netdev->features = NETIF_F_SG |
455 NETIF_F_HW_CSUM |
456 NETIF_F_HW_VLAN_TX |
457 NETIF_F_HW_VLAN_RX |
458 NETIF_F_HW_VLAN_FILTER;
1da177e4 459 netdev->features |= NETIF_F_TSO;
f017f14b
AK		 460#ifdef NETIF_F_LLTX
461 netdev->features |= NETIF_F_LLTX;
462#endif
1da177e4
LT		 463
464 if(pci_using_dac)
465 netdev->features |= NETIF_F_HIGHDMA;
466
467 /* make sure the EEPROM is good */
468
469 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
ec9c3f5d 470 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 471 err = -EIO;
472 goto err_eeprom;
473 }
474
475 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
df859c51 476 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
1da177e4 477
df859c51 478 if(!is_valid_ether_addr(netdev->perm_addr)) {
ec9c3f5d 479 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 480 err = -EIO;
481 goto err_eeprom;
482 }
483
484 adapter->part_num = ixgb_get_ee_pba_number(&adapter->hw);
485
486 init_timer(&adapter->watchdog_timer);
487 adapter->watchdog_timer.function = &ixgb_watchdog;
488 adapter->watchdog_timer.data = (unsigned long)adapter;
489
c4028958 490 INIT_WORK(&adapter->tx_timeout_task, ixgb_tx_timeout_task);
1da177e4 491
ec9c3f5d 492 strcpy(netdev->name, "eth%d");
1da177e4
LT		 493 if((err = register_netdev(netdev)))
494 goto err_register;
495
496 /* we're going to reset, so assume we have no link for now */
497
498 netif_carrier_off(netdev);
499 netif_stop_queue(netdev);
500
ec9c3f5d 501 DPRINTK(PROBE, INFO, "Intel(R) PRO/10GbE Network Connection\n");
1da177e4
LT		 502 ixgb_check_options(adapter);
503 /* reset the hardware with the new settings */
504
505 ixgb_reset(adapter);
506
507 cards_found++;
508 return 0;
509
510err_register:
511err_sw_init:
512err_eeprom:
513 iounmap(adapter->hw.hw_addr);
514err_ioremap:
515 free_netdev(netdev);
516err_alloc_etherdev:
517 pci_release_regions(pdev);
c91e468a
AS		 518err_request_regions:
519err_dma_mask:
520 pci_disable_device(pdev);
1da177e4
LT		 521 return err;
522}
523
524/**
525 * ixgb_remove - Device Removal Routine
526 * @pdev: PCI device information struct
527 *
528 * ixgb_remove is called by the PCI subsystem to alert the driver
529 * that it should release a PCI device. The could be caused by a
530 * Hot-Plug event, or because the driver is going to be removed from
531 * memory.
532 **/
533
534static void __devexit
535ixgb_remove(struct pci_dev *pdev)
536{
537 struct net_device *netdev = pci_get_drvdata(pdev);
8908c6cd 538 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 539
540 unregister_netdev(netdev);
541
542 iounmap(adapter->hw.hw_addr);
543 pci_release_regions(pdev);
544
545 free_netdev(netdev);
546}
547
548/**
549 * ixgb_sw_init - Initialize general software structures (struct ixgb_adapter)
550 * @adapter: board private structure to initialize
551 *
552 * ixgb_sw_init initializes the Adapter private data structure.
553 * Fields are initialized based on PCI device information and
554 * OS network device settings (MTU size).
555 **/
556
557static int __devinit
558ixgb_sw_init(struct ixgb_adapter *adapter)
559{
560 struct ixgb_hw *hw = &adapter->hw;
561 struct net_device *netdev = adapter->netdev;
562 struct pci_dev *pdev = adapter->pdev;
563
564 /* PCI config space info */
565
566 hw->vendor_id = pdev->vendor;
567 hw->device_id = pdev->device;
568 hw->subsystem_vendor_id = pdev->subsystem_vendor;
569 hw->subsystem_id = pdev->subsystem_device;
570
1da177e4 571 hw->max_frame_size = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
3f3dc0dd 572 adapter->rx_buffer_len = hw->max_frame_size;
1da177e4
LT		 573
574 if((hw->device_id == IXGB_DEVICE_ID_82597EX)
940829e2
AK		 575 || (hw->device_id == IXGB_DEVICE_ID_82597EX_CX4)
576 || (hw->device_id == IXGB_DEVICE_ID_82597EX_LR)
577 || (hw->device_id == IXGB_DEVICE_ID_82597EX_SR))
1da177e4
LT		 578 hw->mac_type = ixgb_82597;
579 else {
580 /* should never have loaded on this device */
ec9c3f5d 581 DPRINTK(PROBE, ERR, "unsupported device id\n");
1da177e4
LT		 582 }
583
584 /* enable flow control to be programmed */
585 hw->fc.send_xon = 1;
586
587 atomic_set(&adapter->irq_sem, 1);
588 spin_lock_init(&adapter->tx_lock);
589
590 return 0;
591}
592
593/**
594 * ixgb_open - Called when a network interface is made active
595 * @netdev: network interface device structure
596 *
597 * Returns 0 on success, negative value on failure
598 *
599 * The open entry point is called when a network interface is made
600 * active by the system (IFF_UP). At this point all resources needed
601 * for transmit and receive operations are allocated, the interrupt
602 * handler is registered with the OS, the watchdog timer is started,
603 * and the stack is notified that the interface is ready.
604 **/
605
606static int
607ixgb_open(struct net_device *netdev)
608{
8908c6cd 609 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 610 int err;
611
612 /* allocate transmit descriptors */
613
614 if((err = ixgb_setup_tx_resources(adapter)))
615 goto err_setup_tx;
616
617 /* allocate receive descriptors */
618
619 if((err = ixgb_setup_rx_resources(adapter)))
620 goto err_setup_rx;
621
622 if((err = ixgb_up(adapter)))
623 goto err_up;
624
625 return 0;
626
627err_up:
628 ixgb_free_rx_resources(adapter);
629err_setup_rx:
630 ixgb_free_tx_resources(adapter);
631err_setup_tx:
632 ixgb_reset(adapter);
633
634 return err;
635}
636
637/**
638 * ixgb_close - Disables a network interface
639 * @netdev: network interface device structure
640 *
641 * Returns 0, this is not allowed to fail
642 *
643 * The close entry point is called when an interface is de-activated
644 * by the OS. The hardware is still under the drivers control, but
645 * needs to be disabled. A global MAC reset is issued to stop the
646 * hardware, and all transmit and receive resources are freed.
647 **/
648
649static int
650ixgb_close(struct net_device *netdev)
651{
8908c6cd 652 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 653
654 ixgb_down(adapter, TRUE);
655
656 ixgb_free_tx_resources(adapter);
657 ixgb_free_rx_resources(adapter);
658
659 return 0;
660}
661
662/**
663 * ixgb_setup_tx_resources - allocate Tx resources (Descriptors)
664 * @adapter: board private structure
665 *
666 * Return 0 on success, negative on failure
667 **/
668
669int
670ixgb_setup_tx_resources(struct ixgb_adapter *adapter)
671{
672 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
673 struct pci_dev *pdev = adapter->pdev;
674 int size;
675
676 size = sizeof(struct ixgb_buffer) * txdr->count;
677 txdr->buffer_info = vmalloc(size);
678 if(!txdr->buffer_info) {
ec9c3f5d
AK		 679 DPRINTK(PROBE, ERR,
680 "Unable to allocate transmit descriptor ring memory\n");
1da177e4
LT		 681 return -ENOMEM;
682 }
683 memset(txdr->buffer_info, 0, size);
684
685 /* round up to nearest 4K */
686
687 txdr->size = txdr->count * sizeof(struct ixgb_tx_desc);
688 IXGB_ROUNDUP(txdr->size, 4096);
689
690 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
691 if(!txdr->desc) {
692 vfree(txdr->buffer_info);
ec9c3f5d
AK		 693 DPRINTK(PROBE, ERR,
694 "Unable to allocate transmit descriptor memory\n");
1da177e4
LT		 695 return -ENOMEM;
696 }
697 memset(txdr->desc, 0, txdr->size);
698
699 txdr->next_to_use = 0;
700 txdr->next_to_clean = 0;
701
702 return 0;
703}
704
705/**
706 * ixgb_configure_tx - Configure 82597 Transmit Unit after Reset.
707 * @adapter: board private structure
708 *
709 * Configure the Tx unit of the MAC after a reset.
710 **/
711
712static void
713ixgb_configure_tx(struct ixgb_adapter *adapter)
714{
715 uint64_t tdba = adapter->tx_ring.dma;
716 uint32_t tdlen = adapter->tx_ring.count * sizeof(struct ixgb_tx_desc);
717 uint32_t tctl;
718 struct ixgb_hw *hw = &adapter->hw;
719
720 /* Setup the Base and Length of the Tx Descriptor Ring
721 * tx_ring.dma can be either a 32 or 64 bit value
722 */
723
724 IXGB_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
725 IXGB_WRITE_REG(hw, TDBAH, (tdba >> 32));
726
727 IXGB_WRITE_REG(hw, TDLEN, tdlen);
728
729 /* Setup the HW Tx Head and Tail descriptor pointers */
730
731 IXGB_WRITE_REG(hw, TDH, 0);
732 IXGB_WRITE_REG(hw, TDT, 0);
733
734 /* don't set up txdctl, it induces performance problems if configured
735 * incorrectly */
736 /* Set the Tx Interrupt Delay register */
737
738 IXGB_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
739
740 /* Program the Transmit Control Register */
741
742 tctl = IXGB_TCTL_TCE | IXGB_TCTL_TXEN | IXGB_TCTL_TPDE;
743 IXGB_WRITE_REG(hw, TCTL, tctl);
744
745 /* Setup Transmit Descriptor Settings for this adapter */
746 adapter->tx_cmd_type =
747 IXGB_TX_DESC_TYPE
748 | (adapter->tx_int_delay_enable ? IXGB_TX_DESC_CMD_IDE : 0);
749}
750
751/**
752 * ixgb_setup_rx_resources - allocate Rx resources (Descriptors)
753 * @adapter: board private structure
754 *
755 * Returns 0 on success, negative on failure
756 **/
757
758int
759ixgb_setup_rx_resources(struct ixgb_adapter *adapter)
760{
761 struct ixgb_desc_ring *rxdr = &adapter->rx_ring;
762 struct pci_dev *pdev = adapter->pdev;
763 int size;
764
765 size = sizeof(struct ixgb_buffer) * rxdr->count;
766 rxdr->buffer_info = vmalloc(size);
767 if(!rxdr->buffer_info) {
ec9c3f5d
AK		 768 DPRINTK(PROBE, ERR,
769 "Unable to allocate receive descriptor ring\n");
1da177e4
LT		 770 return -ENOMEM;
771 }
772 memset(rxdr->buffer_info, 0, size);
773
774 /* Round up to nearest 4K */
775
776 rxdr->size = rxdr->count * sizeof(struct ixgb_rx_desc);
777 IXGB_ROUNDUP(rxdr->size, 4096);
778
779 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
780
781 if(!rxdr->desc) {
782 vfree(rxdr->buffer_info);
ec9c3f5d
AK		 783 DPRINTK(PROBE, ERR,
784 "Unable to allocate receive descriptors\n");
1da177e4
LT		 785 return -ENOMEM;
786 }
787 memset(rxdr->desc, 0, rxdr->size);
788
789 rxdr->next_to_clean = 0;
790 rxdr->next_to_use = 0;
791
792 return 0;
793}
794
795/**
796 * ixgb_setup_rctl - configure the receive control register
797 * @adapter: Board private structure
798 **/
799
800static void
801ixgb_setup_rctl(struct ixgb_adapter *adapter)
802{
803 uint32_t rctl;
804
805 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
806
807 rctl &= ~(3 << IXGB_RCTL_MO_SHIFT);
808
809 rctl |=
810 IXGB_RCTL_BAM | IXGB_RCTL_RDMTS_1_2 |
811 IXGB_RCTL_RXEN | IXGB_RCTL_CFF |
812 (adapter->hw.mc_filter_type << IXGB_RCTL_MO_SHIFT);
813
814 rctl |= IXGB_RCTL_SECRC;
815
3f3dc0dd 816 if (adapter->rx_buffer_len <= IXGB_RXBUFFER_2048)
1da177e4 817 rctl |= IXGB_RCTL_BSIZE_2048;
3f3dc0dd 818 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_4096)
1da177e4 819 rctl |= IXGB_RCTL_BSIZE_4096;
3f3dc0dd 820 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_8192)
1da177e4 821 rctl |= IXGB_RCTL_BSIZE_8192;
3f3dc0dd 822 else if (adapter->rx_buffer_len <= IXGB_RXBUFFER_16384)
1da177e4 823 rctl |= IXGB_RCTL_BSIZE_16384;
1da177e4
LT		 824
825 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
826}
827
828/**
829 * ixgb_configure_rx - Configure 82597 Receive Unit after Reset.
830 * @adapter: board private structure
831 *
832 * Configure the Rx unit of the MAC after a reset.
833 **/
834
835static void
836ixgb_configure_rx(struct ixgb_adapter *adapter)
837{
838 uint64_t rdba = adapter->rx_ring.dma;
839 uint32_t rdlen = adapter->rx_ring.count * sizeof(struct ixgb_rx_desc);
840 struct ixgb_hw *hw = &adapter->hw;
841 uint32_t rctl;
842 uint32_t rxcsum;
843 uint32_t rxdctl;
844
845 /* make sure receives are disabled while setting up the descriptors */
846
847 rctl = IXGB_READ_REG(hw, RCTL);
848 IXGB_WRITE_REG(hw, RCTL, rctl & ~IXGB_RCTL_RXEN);
849
850 /* set the Receive Delay Timer Register */
851
852 IXGB_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
853
854 /* Setup the Base and Length of the Rx Descriptor Ring */
855
856 IXGB_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
857 IXGB_WRITE_REG(hw, RDBAH, (rdba >> 32));
858
859 IXGB_WRITE_REG(hw, RDLEN, rdlen);
860
861 /* Setup the HW Rx Head and Tail Descriptor Pointers */
862 IXGB_WRITE_REG(hw, RDH, 0);
863 IXGB_WRITE_REG(hw, RDT, 0);
864
865 /* set up pre-fetching of receive buffers so we get some before we
866 * run out (default hardware behavior is to run out before fetching
867 * more). This sets up to fetch if HTHRESH rx descriptors are avail
868 * and the descriptors in hw cache are below PTHRESH. This avoids
869 * the hardware behavior of fetching <=512 descriptors in a single
870 * burst that pre-empts all other activity, usually causing fifo
871 * overflows. */
872 /* use WTHRESH to burst write 16 descriptors or burst when RXT0 */
873 rxdctl = RXDCTL_WTHRESH_DEFAULT << IXGB_RXDCTL_WTHRESH_SHIFT |
874 RXDCTL_HTHRESH_DEFAULT << IXGB_RXDCTL_HTHRESH_SHIFT |
875 RXDCTL_PTHRESH_DEFAULT << IXGB_RXDCTL_PTHRESH_SHIFT;
876 IXGB_WRITE_REG(hw, RXDCTL, rxdctl);
877
878 /* Enable Receive Checksum Offload for TCP and UDP */
879 if(adapter->rx_csum == TRUE) {
880 rxcsum = IXGB_READ_REG(hw, RXCSUM);
881 rxcsum |= IXGB_RXCSUM_TUOFL;
882 IXGB_WRITE_REG(hw, RXCSUM, rxcsum);
883 }
884
885 /* Enable Receives */
886
887 IXGB_WRITE_REG(hw, RCTL, rctl);
888}
889
890/**
891 * ixgb_free_tx_resources - Free Tx Resources
892 * @adapter: board private structure
893 *
894 * Free all transmit software resources
895 **/
896
897void
898ixgb_free_tx_resources(struct ixgb_adapter *adapter)
899{
900 struct pci_dev *pdev = adapter->pdev;
901
902 ixgb_clean_tx_ring(adapter);
903
904 vfree(adapter->tx_ring.buffer_info);
905 adapter->tx_ring.buffer_info = NULL;
906
907 pci_free_consistent(pdev, adapter->tx_ring.size,
908 adapter->tx_ring.desc, adapter->tx_ring.dma);
909
910 adapter->tx_ring.desc = NULL;
911}
912
235949d1 913static void
1da177e4
LT		 914ixgb_unmap_and_free_tx_resource(struct ixgb_adapter *adapter,
915 struct ixgb_buffer *buffer_info)
916{
917 struct pci_dev *pdev = adapter->pdev;
1dfdd7df
AK		 918
919 if (buffer_info->dma)
920 pci_unmap_page(pdev, buffer_info->dma, buffer_info->length,
921 PCI_DMA_TODEVICE);
922
923 if (buffer_info->skb)
1da177e4 924 dev_kfree_skb_any(buffer_info->skb);
1dfdd7df
AK		 925
926 buffer_info->skb = NULL;
927 buffer_info->dma = 0;
928 buffer_info->time_stamp = 0;
929 /* these fields must always be initialized in tx
930 * buffer_info->length = 0;
931 * buffer_info->next_to_watch = 0; */
1da177e4
LT		 932}
933
934/**
935 * ixgb_clean_tx_ring - Free Tx Buffers
936 * @adapter: board private structure
937 **/
938
939static void
940ixgb_clean_tx_ring(struct ixgb_adapter *adapter)
941{
942 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
943 struct ixgb_buffer *buffer_info;
944 unsigned long size;
945 unsigned int i;
946
947 /* Free all the Tx ring sk_buffs */
948
949 for(i = 0; i < tx_ring->count; i++) {
950 buffer_info = &tx_ring->buffer_info[i];
951 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
952 }
953
954 size = sizeof(struct ixgb_buffer) * tx_ring->count;
955 memset(tx_ring->buffer_info, 0, size);
956
957 /* Zero out the descriptor ring */
958
959 memset(tx_ring->desc, 0, tx_ring->size);
960
961 tx_ring->next_to_use = 0;
962 tx_ring->next_to_clean = 0;
963
964 IXGB_WRITE_REG(&adapter->hw, TDH, 0);
965 IXGB_WRITE_REG(&adapter->hw, TDT, 0);
966}
967
968/**
969 * ixgb_free_rx_resources - Free Rx Resources
970 * @adapter: board private structure
971 *
972 * Free all receive software resources
973 **/
974
975void
976ixgb_free_rx_resources(struct ixgb_adapter *adapter)
977{
978 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
979 struct pci_dev *pdev = adapter->pdev;
980
981 ixgb_clean_rx_ring(adapter);
982
983 vfree(rx_ring->buffer_info);
984 rx_ring->buffer_info = NULL;
985
986 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
987
988 rx_ring->desc = NULL;
989}
990
991/**
992 * ixgb_clean_rx_ring - Free Rx Buffers
993 * @adapter: board private structure
994 **/
995
996static void
997ixgb_clean_rx_ring(struct ixgb_adapter *adapter)
998{
999 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1000 struct ixgb_buffer *buffer_info;
1001 struct pci_dev *pdev = adapter->pdev;
1002 unsigned long size;
1003 unsigned int i;
1004
1005 /* Free all the Rx ring sk_buffs */
1006
1007 for(i = 0; i < rx_ring->count; i++) {
1008 buffer_info = &rx_ring->buffer_info[i];
1009 if(buffer_info->skb) {
1010
1011 pci_unmap_single(pdev,
1012 buffer_info->dma,
1013 buffer_info->length,
1014 PCI_DMA_FROMDEVICE);
1015
1016 dev_kfree_skb(buffer_info->skb);
1017
1018 buffer_info->skb = NULL;
1019 }
1020 }
1021
1022 size = sizeof(struct ixgb_buffer) * rx_ring->count;
1023 memset(rx_ring->buffer_info, 0, size);
1024
1025 /* Zero out the descriptor ring */
1026
1027 memset(rx_ring->desc, 0, rx_ring->size);
1028
1029 rx_ring->next_to_clean = 0;
1030 rx_ring->next_to_use = 0;
1031
1032 IXGB_WRITE_REG(&adapter->hw, RDH, 0);
1033 IXGB_WRITE_REG(&adapter->hw, RDT, 0);
1034}
1035
1036/**
1037 * ixgb_set_mac - Change the Ethernet Address of the NIC
1038 * @netdev: network interface device structure
1039 * @p: pointer to an address structure
1040 *
1041 * Returns 0 on success, negative on failure
1042 **/
1043
1044static int
1045ixgb_set_mac(struct net_device *netdev, void *p)
1046{
8908c6cd 1047 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1048 struct sockaddr *addr = p;
1049
1050 if(!is_valid_ether_addr(addr->sa_data))
1051 return -EADDRNOTAVAIL;
1052
1053 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1054
1055 ixgb_rar_set(&adapter->hw, addr->sa_data, 0);
1056
1057 return 0;
1058}
1059
1060/**
1061 * ixgb_set_multi - Multicast and Promiscuous mode set
1062 * @netdev: network interface device structure
1063 *
1064 * The set_multi entry point is called whenever the multicast address
1065 * list or the network interface flags are updated. This routine is
1066 * responsible for configuring the hardware for proper multicast,
1067 * promiscuous mode, and all-multi behavior.
1068 **/
1069
1070static void
1071ixgb_set_multi(struct net_device *netdev)
1072{
8908c6cd 1073 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1074 struct ixgb_hw *hw = &adapter->hw;
1075 struct dev_mc_list *mc_ptr;
1076 uint32_t rctl;
1077 int i;
1078
1079 /* Check for Promiscuous and All Multicast modes */
1080
1081 rctl = IXGB_READ_REG(hw, RCTL);
1082
1083 if(netdev->flags & IFF_PROMISC) {
1084 rctl |= (IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1085 } else if(netdev->flags & IFF_ALLMULTI) {
1086 rctl |= IXGB_RCTL_MPE;
1087 rctl &= ~IXGB_RCTL_UPE;
1088 } else {
1089 rctl &= ~(IXGB_RCTL_UPE | IXGB_RCTL_MPE);
1090 }
1091
1092 if(netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES) {
1093 rctl |= IXGB_RCTL_MPE;
1094 IXGB_WRITE_REG(hw, RCTL, rctl);
1095 } else {
1096 uint8_t mta[netdev->mc_count * IXGB_ETH_LENGTH_OF_ADDRESS];
1097
1098 IXGB_WRITE_REG(hw, RCTL, rctl);
1099
1100 for(i = 0, mc_ptr = netdev->mc_list; mc_ptr;
1101 i++, mc_ptr = mc_ptr->next)
1102 memcpy(&mta[i * IXGB_ETH_LENGTH_OF_ADDRESS],
1103 mc_ptr->dmi_addr, IXGB_ETH_LENGTH_OF_ADDRESS);
1104
1105 ixgb_mc_addr_list_update(hw, mta, netdev->mc_count, 0);
1106 }
1107}
1108
1109/**
1110 * ixgb_watchdog - Timer Call-back
1111 * @data: pointer to netdev cast into an unsigned long
1112 **/
1113
1114static void
1115ixgb_watchdog(unsigned long data)
1116{
1117 struct ixgb_adapter *adapter = (struct ixgb_adapter *)data;
1118 struct net_device *netdev = adapter->netdev;
1119 struct ixgb_desc_ring *txdr = &adapter->tx_ring;
1120
1121 ixgb_check_for_link(&adapter->hw);
1122
1123 if (ixgb_check_for_bad_link(&adapter->hw)) {
1124 /* force the reset path */
1125 netif_stop_queue(netdev);
1126 }
1127
1128 if(adapter->hw.link_up) {
1129 if(!netif_carrier_ok(netdev)) {
ec9c3f5d
AK		 1130 DPRINTK(LINK, INFO,
1131 "NIC Link is Up 10000 Mbps Full Duplex\n");
1da177e4
LT		 1132 adapter->link_speed = 10000;
1133 adapter->link_duplex = FULL_DUPLEX;
1134 netif_carrier_on(netdev);
1135 netif_wake_queue(netdev);
1136 }
1137 } else {
1138 if(netif_carrier_ok(netdev)) {
1139 adapter->link_speed = 0;
1140 adapter->link_duplex = 0;
ec9c3f5d 1141 DPRINTK(LINK, INFO, "NIC Link is Down\n");
1da177e4
LT		 1142 netif_carrier_off(netdev);
1143 netif_stop_queue(netdev);
1144
1145 }
1146 }
1147
1148 ixgb_update_stats(adapter);
1149
1150 if(!netif_carrier_ok(netdev)) {
1151 if(IXGB_DESC_UNUSED(txdr) + 1 < txdr->count) {
1152 /* We've lost link, so the controller stops DMA,
1153 * but we've got queued Tx work that's never going
1154 * to get done, so reset controller to flush Tx.
1155 * (Do the reset outside of interrupt context). */
1156 schedule_work(&adapter->tx_timeout_task);
1157 }
1158 }
1159
1160 /* Force detection of hung controller every watchdog period */
1161 adapter->detect_tx_hung = TRUE;
1162
1163 /* generate an interrupt to force clean up of any stragglers */
1164 IXGB_WRITE_REG(&adapter->hw, ICS, IXGB_INT_TXDW);
1165
1166 /* Reset the timer */
1167 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
1168}
1169
1170#define IXGB_TX_FLAGS_CSUM 0x00000001
1171#define IXGB_TX_FLAGS_VLAN 0x00000002
1172#define IXGB_TX_FLAGS_TSO 0x00000004
1173
235949d1 1174static int
1da177e4
LT		 1175ixgb_tso(struct ixgb_adapter *adapter, struct sk_buff *skb)
1176{
1da177e4
LT		 1177 struct ixgb_context_desc *context_desc;
1178 unsigned int i;
1179 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
1180 uint16_t ipcse, tucse, mss;
1181 int err;
1182
89114afd 1183 if (likely(skb_is_gso(skb))) {
adc54139 1184 struct ixgb_buffer *buffer_info;
eddc9ec5
ACM		 1185 struct iphdr *iph;
1186
1da177e4
LT		 1187 if (skb_header_cloned(skb)) {
1188 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
1189 if (err)
1190 return err;
1191 }
1192
1193 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
7967168c 1194 mss = skb_shinfo(skb)->gso_size;
eddc9ec5
ACM		 1195 iph = ip_hdr(skb);
1196 iph->tot_len = 0;
1197 iph->check = 0;
1198 skb->h.th->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
1da177e4 1199 0, IPPROTO_TCP, 0);
bbe735e4 1200 ipcss = skb_network_offset(skb);
eddc9ec5 1201 ipcso = (void *)&(iph->check) - (void *)skb->data;
1da177e4
LT		 1202 ipcse = skb->h.raw - skb->data - 1;
1203 tucss = skb->h.raw - skb->data;
1204 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
1205 tucse = 0;
1206
1207 i = adapter->tx_ring.next_to_use;
1208 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
adc54139
JB		 1209 buffer_info = &adapter->tx_ring.buffer_info[i];
1210 WARN_ON(buffer_info->dma != 0);
1da177e4
LT		 1211
1212 context_desc->ipcss = ipcss;
1213 context_desc->ipcso = ipcso;
1214 context_desc->ipcse = cpu_to_le16(ipcse);
1215 context_desc->tucss = tucss;
1216 context_desc->tucso = tucso;
1217 context_desc->tucse = cpu_to_le16(tucse);
1218 context_desc->mss = cpu_to_le16(mss);
1219 context_desc->hdr_len = hdr_len;
1220 context_desc->status = 0;
1221 context_desc->cmd_type_len = cpu_to_le32(
1222 IXGB_CONTEXT_DESC_TYPE
1223 | IXGB_CONTEXT_DESC_CMD_TSE
1224 | IXGB_CONTEXT_DESC_CMD_IP
1225 | IXGB_CONTEXT_DESC_CMD_TCP
1da177e4
LT		 1226 | IXGB_CONTEXT_DESC_CMD_IDE
1227 | (skb->len - (hdr_len)));
1228
06c2f9ec 1229
1da177e4
LT		 1230 if(++i == adapter->tx_ring.count) i = 0;
1231 adapter->tx_ring.next_to_use = i;
1232
1233 return 1;
1234 }
1da177e4
LT		 1235
1236 return 0;
1237}
1238
235949d1 1239static boolean_t
1da177e4
LT		 1240ixgb_tx_csum(struct ixgb_adapter *adapter, struct sk_buff *skb)
1241{
1242 struct ixgb_context_desc *context_desc;
1243 unsigned int i;
1244 uint8_t css, cso;
1245
84fa7933 1246 if(likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
adc54139 1247 struct ixgb_buffer *buffer_info;
1da177e4 1248 css = skb->h.raw - skb->data;
ff1dcadb 1249 cso = css + skb->csum_offset;
1da177e4
LT		 1250
1251 i = adapter->tx_ring.next_to_use;
1252 context_desc = IXGB_CONTEXT_DESC(adapter->tx_ring, i);
adc54139
JB		 1253 buffer_info = &adapter->tx_ring.buffer_info[i];
1254 WARN_ON(buffer_info->dma != 0);
1da177e4
LT		 1255
1256 context_desc->tucss = css;
1257 context_desc->tucso = cso;
1258 context_desc->tucse = 0;
1259 /* zero out any previously existing data in one instruction */
1260 *(uint32_t *)&(context_desc->ipcss) = 0;
1261 context_desc->status = 0;
1262 context_desc->hdr_len = 0;
1263 context_desc->mss = 0;
1264 context_desc->cmd_type_len =
1265 cpu_to_le32(IXGB_CONTEXT_DESC_TYPE
06c2f9ec 1266 | IXGB_TX_DESC_CMD_IDE);
1da177e4
LT		 1267
1268 if(++i == adapter->tx_ring.count) i = 0;
1269 adapter->tx_ring.next_to_use = i;
1270
1271 return TRUE;
1272 }
1273
1274 return FALSE;
1275}
1276
1277#define IXGB_MAX_TXD_PWR 14
1278#define IXGB_MAX_DATA_PER_TXD (1<<IXGB_MAX_TXD_PWR)
1279
235949d1 1280static int
1da177e4
LT		 1281ixgb_tx_map(struct ixgb_adapter *adapter, struct sk_buff *skb,
1282 unsigned int first)
1283{
1284 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1285 struct ixgb_buffer *buffer_info;
1286 int len = skb->len;
1287 unsigned int offset = 0, size, count = 0, i;
5d927853 1288 unsigned int mss = skb_shinfo(skb)->gso_size;
1da177e4
LT		 1289
1290 unsigned int nr_frags = skb_shinfo(skb)->nr_frags;
1291 unsigned int f;
ac79c82e 1292
1da177e4
LT		 1293 len -= skb->data_len;
1294
1295 i = tx_ring->next_to_use;
1296
1297 while(len) {
1298 buffer_info = &tx_ring->buffer_info[i];
709cf018 1299 size = min(len, IXGB_MAX_DATA_PER_TXD);
5d927853
JB		 1300 /* Workaround for premature desc write-backs
1301 * in TSO mode. Append 4-byte sentinel desc */
1302 if (unlikely(mss && !nr_frags && size == len && size > 8))
1303 size -= 4;
1304
1da177e4 1305 buffer_info->length = size;
adc54139 1306 WARN_ON(buffer_info->dma != 0);
1da177e4
LT		 1307 buffer_info->dma =
1308 pci_map_single(adapter->pdev,
1309 skb->data + offset,
1310 size,
1311 PCI_DMA_TODEVICE);
1312 buffer_info->time_stamp = jiffies;
1dfdd7df 1313 buffer_info->next_to_watch = 0;
1da177e4
LT		 1314
1315 len -= size;
1316 offset += size;
1317 count++;
1318 if(++i == tx_ring->count) i = 0;
1319 }
1320
1321 for(f = 0; f < nr_frags; f++) {
1322 struct skb_frag_struct *frag;
1323
1324 frag = &skb_shinfo(skb)->frags[f];
1325 len = frag->size;
1326 offset = 0;
1327
1328 while(len) {
1329 buffer_info = &tx_ring->buffer_info[i];
709cf018 1330 size = min(len, IXGB_MAX_DATA_PER_TXD);
5d927853
JB		 1331
1332 /* Workaround for premature desc write-backs
1333 * in TSO mode. Append 4-byte sentinel desc */
1334 if (unlikely(mss && !nr_frags && size == len
1335 && size > 8))
1336 size -= 4;
1337
1da177e4
LT		 1338 buffer_info->length = size;
1339 buffer_info->dma =
1340 pci_map_page(adapter->pdev,
1341 frag->page,
1342 frag->page_offset + offset,
1343 size,
1344 PCI_DMA_TODEVICE);
1345 buffer_info->time_stamp = jiffies;
1dfdd7df 1346 buffer_info->next_to_watch = 0;
1da177e4
LT		 1347
1348 len -= size;
1349 offset += size;
1350 count++;
1351 if(++i == tx_ring->count) i = 0;
1352 }
1353 }
1354 i = (i == 0) ? tx_ring->count - 1 : i - 1;
1355 tx_ring->buffer_info[i].skb = skb;
1356 tx_ring->buffer_info[first].next_to_watch = i;
1357
1358 return count;
1359}
1360
235949d1 1361static void
1da177e4
LT		 1362ixgb_tx_queue(struct ixgb_adapter *adapter, int count, int vlan_id,int tx_flags)
1363{
1364 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1365 struct ixgb_tx_desc *tx_desc = NULL;
1366 struct ixgb_buffer *buffer_info;
1367 uint32_t cmd_type_len = adapter->tx_cmd_type;
1368 uint8_t status = 0;
1369 uint8_t popts = 0;
1370 unsigned int i;
1371
1372 if(tx_flags & IXGB_TX_FLAGS_TSO) {
1373 cmd_type_len |= IXGB_TX_DESC_CMD_TSE;
1374 popts |= (IXGB_TX_DESC_POPTS_IXSM | IXGB_TX_DESC_POPTS_TXSM);
1375 }
1376
1377 if(tx_flags & IXGB_TX_FLAGS_CSUM)
1378 popts |= IXGB_TX_DESC_POPTS_TXSM;
1379
1380 if(tx_flags & IXGB_TX_FLAGS_VLAN) {
1381 cmd_type_len |= IXGB_TX_DESC_CMD_VLE;
1382 }
1383
1384 i = tx_ring->next_to_use;
1385
1386 while(count--) {
1387 buffer_info = &tx_ring->buffer_info[i];
1388 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1389 tx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
1390 tx_desc->cmd_type_len =
1391 cpu_to_le32(cmd_type_len | buffer_info->length);
1392 tx_desc->status = status;
1393 tx_desc->popts = popts;
1394 tx_desc->vlan = cpu_to_le16(vlan_id);
1395
1396 if(++i == tx_ring->count) i = 0;
1397 }
1398
1399 tx_desc->cmd_type_len |= cpu_to_le32(IXGB_TX_DESC_CMD_EOP
1400 | IXGB_TX_DESC_CMD_RS );
1401
1402 /* Force memory writes to complete before letting h/w
1403 * know there are new descriptors to fetch. (Only
1404 * applicable for weak-ordered memory model archs,
1405 * such as IA-64). */
1406 wmb();
1407
1408 tx_ring->next_to_use = i;
1409 IXGB_WRITE_REG(&adapter->hw, TDT, i);
1410}
1411
dfd341e4
JB		 1412static int __ixgb_maybe_stop_tx(struct net_device *netdev, int size)
1413{
1414 struct ixgb_adapter *adapter = netdev_priv(netdev);
1415 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1416
1417 netif_stop_queue(netdev);
1418 /* Herbert's original patch had:
1419 * smp_mb__after_netif_stop_queue();
1420 * but since that doesn't exist yet, just open code it. */
1421 smp_mb();
1422
1423 /* We need to check again in a case another CPU has just
1424 * made room available. */
1425 if (likely(IXGB_DESC_UNUSED(tx_ring) < size))
1426 return -EBUSY;
1427
1428 /* A reprieve! */
1429 netif_start_queue(netdev);
1430 ++adapter->restart_queue;
1431 return 0;
1432}
1433
1434static int ixgb_maybe_stop_tx(struct net_device *netdev,
1435 struct ixgb_desc_ring *tx_ring, int size)
1436{
1437 if (likely(IXGB_DESC_UNUSED(tx_ring) >= size))
1438 return 0;
1439 return __ixgb_maybe_stop_tx(netdev, size);
1440}
1441
1442
1da177e4
LT		 1443/* Tx Descriptors needed, worst case */
1444#define TXD_USE_COUNT(S) (((S) >> IXGB_MAX_TXD_PWR) + \
1445 (((S) & (IXGB_MAX_DATA_PER_TXD - 1)) ? 1 : 0))
5d927853
JB		 1446#define DESC_NEEDED TXD_USE_COUNT(IXGB_MAX_DATA_PER_TXD) /* skb->date */ + \
1447 MAX_SKB_FRAGS * TXD_USE_COUNT(PAGE_SIZE) + 1 /* for context */ \
1448 + 1 /* one more needed for sentinel TSO workaround */
1da177e4
LT		 1449
1450static int
1451ixgb_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1452{
8908c6cd 1453 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1454 unsigned int first;
1455 unsigned int tx_flags = 0;
1456 unsigned long flags;
1457 int vlan_id = 0;
1458 int tso;
1459
1460 if(skb->len <= 0) {
1461 dev_kfree_skb_any(skb);
1462 return 0;
1463 }
1464
f017f14b
AK		 1465#ifdef NETIF_F_LLTX
1466 local_irq_save(flags);
1467 if (!spin_trylock(&adapter->tx_lock)) {
1468 /* Collision - tell upper layer to requeue */
1469 local_irq_restore(flags);
1470 return NETDEV_TX_LOCKED;
1471 }
1472#else
1da177e4 1473 spin_lock_irqsave(&adapter->tx_lock, flags);
f017f14b
AK		 1474#endif
1475
dfd341e4
JB		 1476 if (unlikely(ixgb_maybe_stop_tx(netdev, &adapter->tx_ring,
1477 DESC_NEEDED))) {
1da177e4
LT		 1478 netif_stop_queue(netdev);
1479 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1480 return NETDEV_TX_BUSY;
1da177e4 1481 }
f017f14b
AK		 1482
1483#ifndef NETIF_F_LLTX
1da177e4 1484 spin_unlock_irqrestore(&adapter->tx_lock, flags);
f017f14b 1485#endif
1da177e4
LT		 1486
1487 if(adapter->vlgrp && vlan_tx_tag_present(skb)) {
1488 tx_flags |= IXGB_TX_FLAGS_VLAN;
1489 vlan_id = vlan_tx_tag_get(skb);
1490 }
1491
1492 first = adapter->tx_ring.next_to_use;
1493
1494 tso = ixgb_tso(adapter, skb);
1495 if (tso < 0) {
1496 dev_kfree_skb_any(skb);
f017f14b
AK		 1497#ifdef NETIF_F_LLTX
1498 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1499#endif
1da177e4
LT		 1500 return NETDEV_TX_OK;
1501 }
1502
96f9c2e2 1503 if (likely(tso))
1da177e4
LT		 1504 tx_flags |= IXGB_TX_FLAGS_TSO;
1505 else if(ixgb_tx_csum(adapter, skb))
1506 tx_flags |= IXGB_TX_FLAGS_CSUM;
1507
1508 ixgb_tx_queue(adapter, ixgb_tx_map(adapter, skb, first), vlan_id,
1509 tx_flags);
1510
1511 netdev->trans_start = jiffies;
1512
f017f14b
AK		 1513#ifdef NETIF_F_LLTX
1514 /* Make sure there is space in the ring for the next send. */
dfd341e4 1515 ixgb_maybe_stop_tx(netdev, &adapter->tx_ring, DESC_NEEDED);
f017f14b
AK		 1516
1517 spin_unlock_irqrestore(&adapter->tx_lock, flags);
1518
1519#endif
1520 return NETDEV_TX_OK;
1da177e4
LT		 1521}
1522
1523/**
1524 * ixgb_tx_timeout - Respond to a Tx Hang
1525 * @netdev: network interface device structure
1526 **/
1527
1528static void
1529ixgb_tx_timeout(struct net_device *netdev)
1530{
8908c6cd 1531 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1532
1533 /* Do the reset outside of interrupt context */
1534 schedule_work(&adapter->tx_timeout_task);
1535}
1536
1537static void
c4028958 1538ixgb_tx_timeout_task(struct work_struct *work)
1da177e4 1539{
c4028958
DH		 1540 struct ixgb_adapter *adapter =
1541 container_of(work, struct ixgb_adapter, tx_timeout_task);
1da177e4 1542
9b8118df 1543 adapter->tx_timeout_count++;
1da177e4
LT		 1544 ixgb_down(adapter, TRUE);
1545 ixgb_up(adapter);
1546}
1547
1548/**
1549 * ixgb_get_stats - Get System Network Statistics
1550 * @netdev: network interface device structure
1551 *
1552 * Returns the address of the device statistics structure.
1553 * The statistics are actually updated from the timer callback.
1554 **/
1555
1556static struct net_device_stats *
1557ixgb_get_stats(struct net_device *netdev)
1558{
8908c6cd 1559 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1560
1561 return &adapter->net_stats;
1562}
1563
1564/**
1565 * ixgb_change_mtu - Change the Maximum Transfer Unit
1566 * @netdev: network interface device structure
1567 * @new_mtu: new value for maximum frame size
1568 *
1569 * Returns 0 on success, negative on failure
1570 **/
1571
1572static int
1573ixgb_change_mtu(struct net_device *netdev, int new_mtu)
1574{
8908c6cd 1575 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1576 int max_frame = new_mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1577 int old_max_frame = netdev->mtu + ENET_HEADER_SIZE + ENET_FCS_LENGTH;
1578
1579
1580 if((max_frame < IXGB_MIN_ENET_FRAME_SIZE_WITHOUT_FCS + ENET_FCS_LENGTH)
1581 || (max_frame > IXGB_MAX_JUMBO_FRAME_SIZE + ENET_FCS_LENGTH)) {
ec9c3f5d 1582 DPRINTK(PROBE, ERR, "Invalid MTU setting %d\n", new_mtu);
1da177e4
LT		 1583 return -EINVAL;
1584 }
1585
3f3dc0dd 1586 adapter->rx_buffer_len = max_frame;
1da177e4
LT		 1587
1588 netdev->mtu = new_mtu;
1589
3f3dc0dd 1590 if ((old_max_frame != max_frame) && netif_running(netdev)) {
1da177e4
LT		 1591 ixgb_down(adapter, TRUE);
1592 ixgb_up(adapter);
1593 }
1594
1595 return 0;
1596}
1597
1598/**
1599 * ixgb_update_stats - Update the board statistics counters.
1600 * @adapter: board private structure
1601 **/
1602
1603void
1604ixgb_update_stats(struct ixgb_adapter *adapter)
1605{
5633684d 1606 struct net_device *netdev = adapter->netdev;
01748fbb
LV		 1607 struct pci_dev *pdev = adapter->pdev;
1608
1609 /* Prevent stats update while adapter is being reset */
81b1955e 1610 if (pci_channel_offline(pdev))
01748fbb 1611 return;
5633684d
MC		 1612
1613 if((netdev->flags & IFF_PROMISC) || (netdev->flags & IFF_ALLMULTI) ||
1614 (netdev->mc_count > IXGB_MAX_NUM_MULTICAST_ADDRESSES)) {
1615 u64 multi = IXGB_READ_REG(&adapter->hw, MPRCL);
1616 u32 bcast_l = IXGB_READ_REG(&adapter->hw, BPRCL);
1617 u32 bcast_h = IXGB_READ_REG(&adapter->hw, BPRCH);
1618 u64 bcast = ((u64)bcast_h << 32) | bcast_l;
1619
1620 multi |= ((u64)IXGB_READ_REG(&adapter->hw, MPRCH) << 32);
1621 /* fix up multicast stats by removing broadcasts */
7b89178d
MC		 1622 if(multi >= bcast)
1623 multi -= bcast;
5633684d
MC		 1624
1625 adapter->stats.mprcl += (multi & 0xFFFFFFFF);
1626 adapter->stats.mprch += (multi >> 32);
1627 adapter->stats.bprcl += bcast_l;
1628 adapter->stats.bprch += bcast_h;
1629 } else {
1630 adapter->stats.mprcl += IXGB_READ_REG(&adapter->hw, MPRCL);
1631 adapter->stats.mprch += IXGB_READ_REG(&adapter->hw, MPRCH);
1632 adapter->stats.bprcl += IXGB_READ_REG(&adapter->hw, BPRCL);
1633 adapter->stats.bprch += IXGB_READ_REG(&adapter->hw, BPRCH);
1634 }
1da177e4
LT		 1635 adapter->stats.tprl += IXGB_READ_REG(&adapter->hw, TPRL);
1636 adapter->stats.tprh += IXGB_READ_REG(&adapter->hw, TPRH);
1637 adapter->stats.gprcl += IXGB_READ_REG(&adapter->hw, GPRCL);
1638 adapter->stats.gprch += IXGB_READ_REG(&adapter->hw, GPRCH);
1da177e4
LT		 1639 adapter->stats.uprcl += IXGB_READ_REG(&adapter->hw, UPRCL);
1640 adapter->stats.uprch += IXGB_READ_REG(&adapter->hw, UPRCH);
1641 adapter->stats.vprcl += IXGB_READ_REG(&adapter->hw, VPRCL);
1642 adapter->stats.vprch += IXGB_READ_REG(&adapter->hw, VPRCH);
1643 adapter->stats.jprcl += IXGB_READ_REG(&adapter->hw, JPRCL);
1644 adapter->stats.jprch += IXGB_READ_REG(&adapter->hw, JPRCH);
1645 adapter->stats.gorcl += IXGB_READ_REG(&adapter->hw, GORCL);
1646 adapter->stats.gorch += IXGB_READ_REG(&adapter->hw, GORCH);
1647 adapter->stats.torl += IXGB_READ_REG(&adapter->hw, TORL);
1648 adapter->stats.torh += IXGB_READ_REG(&adapter->hw, TORH);
1649 adapter->stats.rnbc += IXGB_READ_REG(&adapter->hw, RNBC);
1650 adapter->stats.ruc += IXGB_READ_REG(&adapter->hw, RUC);
1651 adapter->stats.roc += IXGB_READ_REG(&adapter->hw, ROC);
1652 adapter->stats.rlec += IXGB_READ_REG(&adapter->hw, RLEC);
1653 adapter->stats.crcerrs += IXGB_READ_REG(&adapter->hw, CRCERRS);
1654 adapter->stats.icbc += IXGB_READ_REG(&adapter->hw, ICBC);
1655 adapter->stats.ecbc += IXGB_READ_REG(&adapter->hw, ECBC);
1656 adapter->stats.mpc += IXGB_READ_REG(&adapter->hw, MPC);
1657 adapter->stats.tptl += IXGB_READ_REG(&adapter->hw, TPTL);
1658 adapter->stats.tpth += IXGB_READ_REG(&adapter->hw, TPTH);
1659 adapter->stats.gptcl += IXGB_READ_REG(&adapter->hw, GPTCL);
1660 adapter->stats.gptch += IXGB_READ_REG(&adapter->hw, GPTCH);
1661 adapter->stats.bptcl += IXGB_READ_REG(&adapter->hw, BPTCL);
1662 adapter->stats.bptch += IXGB_READ_REG(&adapter->hw, BPTCH);
1663 adapter->stats.mptcl += IXGB_READ_REG(&adapter->hw, MPTCL);
1664 adapter->stats.mptch += IXGB_READ_REG(&adapter->hw, MPTCH);
1665 adapter->stats.uptcl += IXGB_READ_REG(&adapter->hw, UPTCL);
1666 adapter->stats.uptch += IXGB_READ_REG(&adapter->hw, UPTCH);
1667 adapter->stats.vptcl += IXGB_READ_REG(&adapter->hw, VPTCL);
1668 adapter->stats.vptch += IXGB_READ_REG(&adapter->hw, VPTCH);
1669 adapter->stats.jptcl += IXGB_READ_REG(&adapter->hw, JPTCL);
1670 adapter->stats.jptch += IXGB_READ_REG(&adapter->hw, JPTCH);
1671 adapter->stats.gotcl += IXGB_READ_REG(&adapter->hw, GOTCL);
1672 adapter->stats.gotch += IXGB_READ_REG(&adapter->hw, GOTCH);
1673 adapter->stats.totl += IXGB_READ_REG(&adapter->hw, TOTL);
1674 adapter->stats.toth += IXGB_READ_REG(&adapter->hw, TOTH);
1675 adapter->stats.dc += IXGB_READ_REG(&adapter->hw, DC);
1676 adapter->stats.plt64c += IXGB_READ_REG(&adapter->hw, PLT64C);
1677 adapter->stats.tsctc += IXGB_READ_REG(&adapter->hw, TSCTC);
1678 adapter->stats.tsctfc += IXGB_READ_REG(&adapter->hw, TSCTFC);
1679 adapter->stats.ibic += IXGB_READ_REG(&adapter->hw, IBIC);
1680 adapter->stats.rfc += IXGB_READ_REG(&adapter->hw, RFC);
1681 adapter->stats.lfc += IXGB_READ_REG(&adapter->hw, LFC);
1682 adapter->stats.pfrc += IXGB_READ_REG(&adapter->hw, PFRC);
1683 adapter->stats.pftc += IXGB_READ_REG(&adapter->hw, PFTC);
1684 adapter->stats.mcfrc += IXGB_READ_REG(&adapter->hw, MCFRC);
1685 adapter->stats.mcftc += IXGB_READ_REG(&adapter->hw, MCFTC);
1686 adapter->stats.xonrxc += IXGB_READ_REG(&adapter->hw, XONRXC);
1687 adapter->stats.xontxc += IXGB_READ_REG(&adapter->hw, XONTXC);
1688 adapter->stats.xoffrxc += IXGB_READ_REG(&adapter->hw, XOFFRXC);
1689 adapter->stats.xofftxc += IXGB_READ_REG(&adapter->hw, XOFFTXC);
1690 adapter->stats.rjc += IXGB_READ_REG(&adapter->hw, RJC);
1691
1692 /* Fill out the OS statistics structure */
1693
1694 adapter->net_stats.rx_packets = adapter->stats.gprcl;
1695 adapter->net_stats.tx_packets = adapter->stats.gptcl;
1696 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
1697 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
1698 adapter->net_stats.multicast = adapter->stats.mprcl;
1699 adapter->net_stats.collisions = 0;
1700
1701 /* ignore RLEC as it reports errors for padded (<64bytes) frames
1702 * with a length in the type/len field */
1703 adapter->net_stats.rx_errors =
1704 /* adapter->stats.rnbc + */ adapter->stats.crcerrs +
1705 adapter->stats.ruc +
1706 adapter->stats.roc /*+ adapter->stats.rlec */ +
1707 adapter->stats.icbc +
1708 adapter->stats.ecbc + adapter->stats.mpc;
1709
1da177e4
LT		 1710 /* see above
1711 * adapter->net_stats.rx_length_errors = adapter->stats.rlec;
1712 */
1713
1714 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
1715 adapter->net_stats.rx_fifo_errors = adapter->stats.mpc;
1716 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
1717 adapter->net_stats.rx_over_errors = adapter->stats.mpc;
1718
1719 adapter->net_stats.tx_errors = 0;
1720 adapter->net_stats.rx_frame_errors = 0;
1721 adapter->net_stats.tx_aborted_errors = 0;
1722 adapter->net_stats.tx_carrier_errors = 0;
1723 adapter->net_stats.tx_fifo_errors = 0;
1724 adapter->net_stats.tx_heartbeat_errors = 0;
1725 adapter->net_stats.tx_window_errors = 0;
1726}
1727
1728#define IXGB_MAX_INTR 10
1729/**
1730 * ixgb_intr - Interrupt Handler
1731 * @irq: interrupt number
1732 * @data: pointer to a network interface device structure
1da177e4
LT		 1733 **/
1734
1735static irqreturn_t
7d12e780 1736ixgb_intr(int irq, void *data)
1da177e4
LT		 1737{
1738 struct net_device *netdev = data;
8908c6cd 1739 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1740 struct ixgb_hw *hw = &adapter->hw;
1741 uint32_t icr = IXGB_READ_REG(hw, ICR);
1742#ifndef CONFIG_IXGB_NAPI
1743 unsigned int i;
1744#endif
1745
1746 if(unlikely(!icr))
1747 return IRQ_NONE; /* Not our interrupt */
1748
1749 if(unlikely(icr & (IXGB_INT_RXSEQ | IXGB_INT_LSC))) {
1750 mod_timer(&adapter->watchdog_timer, jiffies);
1751 }
1752
1753#ifdef CONFIG_IXGB_NAPI
1754 if(netif_rx_schedule_prep(netdev)) {
1755
1756 /* Disable interrupts and register for poll. The flush
1757 of the posted write is intentionally left out.
1758 */
1759
1760 atomic_inc(&adapter->irq_sem);
1761 IXGB_WRITE_REG(&adapter->hw, IMC, ~0);
1762 __netif_rx_schedule(netdev);
1763 }
1764#else
1765 /* yes, that is actually a & and it is meant to make sure that
1766 * every pass through this for loop checks both receive and
1767 * transmit queues for completed descriptors, intended to
1768 * avoid starvation issues and assist tx/rx fairness. */
1769 for(i = 0; i < IXGB_MAX_INTR; i++)
1770 if(!ixgb_clean_rx_irq(adapter) &
1771 !ixgb_clean_tx_irq(adapter))
1772 break;
1773#endif
1774 return IRQ_HANDLED;
1775}
1776
1777#ifdef CONFIG_IXGB_NAPI
1778/**
1779 * ixgb_clean - NAPI Rx polling callback
1780 * @adapter: board private structure
1781 **/
1782
1783static int
1784ixgb_clean(struct net_device *netdev, int *budget)
1785{
8908c6cd 1786 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1787 int work_to_do = min(*budget, netdev->quota);
1788 int tx_cleaned;
1789 int work_done = 0;
1790
1791 tx_cleaned = ixgb_clean_tx_irq(adapter);
1792 ixgb_clean_rx_irq(adapter, &work_done, work_to_do);
1793
1794 *budget -= work_done;
1795 netdev->quota -= work_done;
1796
1797 /* if no Tx and not enough Rx work done, exit the polling mode */
1798 if((!tx_cleaned && (work_done == 0)) || !netif_running(netdev)) {
1799 netif_rx_complete(netdev);
1800 ixgb_irq_enable(adapter);
1801 return 0;
1802 }
1803
1804 return 1;
1805}
1806#endif
1807
1808/**
1809 * ixgb_clean_tx_irq - Reclaim resources after transmit completes
1810 * @adapter: board private structure
1811 **/
1812
1813static boolean_t
1814ixgb_clean_tx_irq(struct ixgb_adapter *adapter)
1815{
1816 struct ixgb_desc_ring *tx_ring = &adapter->tx_ring;
1817 struct net_device *netdev = adapter->netdev;
1818 struct ixgb_tx_desc *tx_desc, *eop_desc;
1819 struct ixgb_buffer *buffer_info;
1820 unsigned int i, eop;
1821 boolean_t cleaned = FALSE;
1822
1823 i = tx_ring->next_to_clean;
1824 eop = tx_ring->buffer_info[i].next_to_watch;
1825 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1826
1827 while(eop_desc->status & IXGB_TX_DESC_STATUS_DD) {
1828
1829 for(cleaned = FALSE; !cleaned; ) {
1830 tx_desc = IXGB_TX_DESC(*tx_ring, i);
1831 buffer_info = &tx_ring->buffer_info[i];
1832
1833 if (tx_desc->popts
1834 & (IXGB_TX_DESC_POPTS_TXSM |
1835 IXGB_TX_DESC_POPTS_IXSM))
1836 adapter->hw_csum_tx_good++;
1837
1838 ixgb_unmap_and_free_tx_resource(adapter, buffer_info);
1839
1840 *(uint32_t *)&(tx_desc->status) = 0;
1841
1842 cleaned = (i == eop);
1843 if(++i == tx_ring->count) i = 0;
1844 }
1845
1846 eop = tx_ring->buffer_info[i].next_to_watch;
1847 eop_desc = IXGB_TX_DESC(*tx_ring, eop);
1848 }
1849
1850 tx_ring->next_to_clean = i;
1851
3352a3b2
AK		 1852 if (unlikely(netif_queue_stopped(netdev))) {
1853 spin_lock(&adapter->tx_lock);
1854 if (netif_queue_stopped(netdev) && netif_carrier_ok(netdev) &&
ab8ced2f 1855 (IXGB_DESC_UNUSED(tx_ring) >= DESC_NEEDED))
3352a3b2
AK		 1856 netif_wake_queue(netdev);
1857 spin_unlock(&adapter->tx_lock);
1da177e4 1858 }
1da177e4
LT		 1859
1860 if(adapter->detect_tx_hung) {
1861 /* detect a transmit hang in hardware, this serializes the
1862 * check with the clearing of time_stamp and movement of i */
1863 adapter->detect_tx_hung = FALSE;
9b8118df
AK		 1864 if (tx_ring->buffer_info[eop].dma &&
1865 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + HZ)
1da177e4 1866 && !(IXGB_READ_REG(&adapter->hw, STATUS) &
9b8118df
AK		 1867 IXGB_STATUS_TXOFF)) {
1868 /* detected Tx unit hang */
1869 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
1870 " TDH <%x>\n"
1871 " TDT <%x>\n"
1872 " next_to_use <%x>\n"
1873 " next_to_clean <%x>\n"
1874 "buffer_info[next_to_clean]\n"
1875 " time_stamp <%lx>\n"
1876 " next_to_watch <%x>\n"
1877 " jiffies <%lx>\n"
1878 " next_to_watch.status <%x>\n",
1879 IXGB_READ_REG(&adapter->hw, TDH),
1880 IXGB_READ_REG(&adapter->hw, TDT),
1881 tx_ring->next_to_use,
1882 tx_ring->next_to_clean,
1883 tx_ring->buffer_info[eop].time_stamp,
1884 eop,
1885 jiffies,
1886 eop_desc->status);
1da177e4 1887 netif_stop_queue(netdev);
9b8118df 1888 }
1da177e4
LT		 1889 }
1890
1891 return cleaned;
1892}
1893
1894/**
1895 * ixgb_rx_checksum - Receive Checksum Offload for 82597.
1896 * @adapter: board private structure
1897 * @rx_desc: receive descriptor
1898 * @sk_buff: socket buffer with received data
1899 **/
1900
235949d1 1901static void
1da177e4
LT		 1902ixgb_rx_checksum(struct ixgb_adapter *adapter,
1903 struct ixgb_rx_desc *rx_desc,
1904 struct sk_buff *skb)
1905{
1906 /* Ignore Checksum bit is set OR
1907 * TCP Checksum has not been calculated
1908 */
1909 if((rx_desc->status & IXGB_RX_DESC_STATUS_IXSM) ||
1910 (!(rx_desc->status & IXGB_RX_DESC_STATUS_TCPCS))) {
1911 skb->ip_summed = CHECKSUM_NONE;
1912 return;
1913 }
1914
1915 /* At this point we know the hardware did the TCP checksum */
1916 /* now look at the TCP checksum error bit */
1917 if(rx_desc->errors & IXGB_RX_DESC_ERRORS_TCPE) {
1918 /* let the stack verify checksum errors */
1919 skb->ip_summed = CHECKSUM_NONE;
1920 adapter->hw_csum_rx_error++;
1921 } else {
1922 /* TCP checksum is good */
1923 skb->ip_summed = CHECKSUM_UNNECESSARY;
1924 adapter->hw_csum_rx_good++;
1925 }
1926}
1927
1928/**
1929 * ixgb_clean_rx_irq - Send received data up the network stack,
1930 * @adapter: board private structure
1931 **/
1932
1933static boolean_t
1934#ifdef CONFIG_IXGB_NAPI
1935ixgb_clean_rx_irq(struct ixgb_adapter *adapter, int *work_done, int work_to_do)
1936#else
1937ixgb_clean_rx_irq(struct ixgb_adapter *adapter)
1938#endif
1939{
1940 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
1941 struct net_device *netdev = adapter->netdev;
1942 struct pci_dev *pdev = adapter->pdev;
1943 struct ixgb_rx_desc *rx_desc, *next_rxd;
1944 struct ixgb_buffer *buffer_info, *next_buffer, *next2_buffer;
1da177e4
LT		 1945 uint32_t length;
1946 unsigned int i, j;
1947 boolean_t cleaned = FALSE;
1948
1949 i = rx_ring->next_to_clean;
1950 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1951 buffer_info = &rx_ring->buffer_info[i];
1952
1953 while(rx_desc->status & IXGB_RX_DESC_STATUS_DD) {
f404de1c
MC		 1954 struct sk_buff *skb, *next_skb;
1955 u8 status;
1da177e4
LT		 1956
1957#ifdef CONFIG_IXGB_NAPI
1958 if(*work_done >= work_to_do)
1959 break;
1960
1961 (*work_done)++;
1962#endif
f404de1c 1963 status = rx_desc->status;
1da177e4 1964 skb = buffer_info->skb;
1dfdd7df 1965 buffer_info->skb = NULL;
f404de1c 1966
1da177e4
LT		 1967 prefetch(skb->data);
1968
1969 if(++i == rx_ring->count) i = 0;
1970 next_rxd = IXGB_RX_DESC(*rx_ring, i);
1971 prefetch(next_rxd);
1972
1973 if((j = i + 1) == rx_ring->count) j = 0;
1974 next2_buffer = &rx_ring->buffer_info[j];
1975 prefetch(next2_buffer);
1976
1977 next_buffer = &rx_ring->buffer_info[i];
1978 next_skb = next_buffer->skb;
1979 prefetch(next_skb);
1980
1da177e4
LT		 1981 cleaned = TRUE;
1982
1983 pci_unmap_single(pdev,
1984 buffer_info->dma,
1985 buffer_info->length,
1986 PCI_DMA_FROMDEVICE);
1987
1988 length = le16_to_cpu(rx_desc->length);
1989
f404de1c 1990 if(unlikely(!(status & IXGB_RX_DESC_STATUS_EOP))) {
1da177e4
LT		 1991
1992 /* All receives must fit into a single buffer */
1993
1994 IXGB_DBG("Receive packet consumed multiple buffers "
1995 "length<%x>\n", length);
1996
1997 dev_kfree_skb_irq(skb);
f404de1c 1998 goto rxdesc_done;
1da177e4
LT		 1999 }
2000
2001 if (unlikely(rx_desc->errors
2002 & (IXGB_RX_DESC_ERRORS_CE | IXGB_RX_DESC_ERRORS_SE
2003 | IXGB_RX_DESC_ERRORS_P |
2004 IXGB_RX_DESC_ERRORS_RXE))) {
2005
2006 dev_kfree_skb_irq(skb);
f404de1c 2007 goto rxdesc_done;
1da177e4
LT		 2008 }
2009
6b900bb4
AK		 2010 /* code added for copybreak, this should improve
2011 * performance for small packets with large amounts
2012 * of reassembly being done in the stack */
2013#define IXGB_CB_LENGTH 256
2014 if (length < IXGB_CB_LENGTH) {
2015 struct sk_buff *new_skb =
5791704f 2016 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
6b900bb4
AK		 2017 if (new_skb) {
2018 skb_reserve(new_skb, NET_IP_ALIGN);
6b900bb4
AK		 2019 memcpy(new_skb->data - NET_IP_ALIGN,
2020 skb->data - NET_IP_ALIGN,
2021 length + NET_IP_ALIGN);
2022 /* save the skb in buffer_info as good */
2023 buffer_info->skb = skb;
2024 skb = new_skb;
2025 }
2026 }
2027 /* end copybreak code */
2028
1da177e4
LT		 2029 /* Good Receive */
2030 skb_put(skb, length);
2031
2032 /* Receive Checksum Offload */
2033 ixgb_rx_checksum(adapter, rx_desc, skb);
2034
2035 skb->protocol = eth_type_trans(skb, netdev);
2036#ifdef CONFIG_IXGB_NAPI
f404de1c 2037 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 2038 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2039 le16_to_cpu(rx_desc->special) &
2040 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2041 } else {
2042 netif_receive_skb(skb);
2043 }
2044#else /* CONFIG_IXGB_NAPI */
f404de1c 2045 if(adapter->vlgrp && (status & IXGB_RX_DESC_STATUS_VP)) {
1da177e4
LT		 2046 vlan_hwaccel_rx(skb, adapter->vlgrp,
2047 le16_to_cpu(rx_desc->special) &
2048 IXGB_RX_DESC_SPECIAL_VLAN_MASK);
2049 } else {
2050 netif_rx(skb);
2051 }
2052#endif /* CONFIG_IXGB_NAPI */
2053 netdev->last_rx = jiffies;
2054
f404de1c
MC		 2055rxdesc_done:
2056 /* clean up descriptor, might be written over by hw */
1da177e4 2057 rx_desc->status = 0;
1da177e4 2058
f404de1c 2059 /* use prefetched values */
1da177e4
LT		 2060 rx_desc = next_rxd;
2061 buffer_info = next_buffer;
2062 }
2063
2064 rx_ring->next_to_clean = i;
2065
2066 ixgb_alloc_rx_buffers(adapter);
2067
2068 return cleaned;
2069}
2070
2071/**
2072 * ixgb_alloc_rx_buffers - Replace used receive buffers
2073 * @adapter: address of board private structure
2074 **/
2075
2076static void
2077ixgb_alloc_rx_buffers(struct ixgb_adapter *adapter)
2078{
2079 struct ixgb_desc_ring *rx_ring = &adapter->rx_ring;
2080 struct net_device *netdev = adapter->netdev;
2081 struct pci_dev *pdev = adapter->pdev;
2082 struct ixgb_rx_desc *rx_desc;
2083 struct ixgb_buffer *buffer_info;
2084 struct sk_buff *skb;
2085 unsigned int i;
2086 int num_group_tail_writes;
2087 long cleancount;
2088
2089 i = rx_ring->next_to_use;
2090 buffer_info = &rx_ring->buffer_info[i];
2091 cleancount = IXGB_DESC_UNUSED(rx_ring);
2092
2093 num_group_tail_writes = IXGB_RX_BUFFER_WRITE;
2094
41639fed
MC		 2095 /* leave three descriptors unused */
2096 while(--cleancount > 2) {
1dfdd7df 2097 /* recycle! its good for you */
69c7a940
AK		 2098 skb = buffer_info->skb;
2099 if (skb) {
1dfdd7df
AK		 2100 skb_trim(skb, 0);
2101 goto map_skb;
2102 }
1da177e4 2103
69c7a940
AK		 2104 skb = netdev_alloc_skb(netdev, adapter->rx_buffer_len
2105 + NET_IP_ALIGN);
1dfdd7df 2106 if (unlikely(!skb)) {
1da177e4 2107 /* Better luck next round */
1dfdd7df 2108 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 2109 break;
2110 }
2111
2112 /* Make buffer alignment 2 beyond a 16 byte boundary
2113 * this will result in a 16 byte aligned IP header after
2114 * the 14 byte MAC header is removed
2115 */
2116 skb_reserve(skb, NET_IP_ALIGN);
2117
1da177e4
LT		 2118 buffer_info->skb = skb;
2119 buffer_info->length = adapter->rx_buffer_len;
1dfdd7df
AK		 2120map_skb:
2121 buffer_info->dma = pci_map_single(pdev,
2122 skb->data,
2123 adapter->rx_buffer_len,
2124 PCI_DMA_FROMDEVICE);
1da177e4 2125
1dfdd7df 2126 rx_desc = IXGB_RX_DESC(*rx_ring, i);
1da177e4 2127 rx_desc->buff_addr = cpu_to_le64(buffer_info->dma);
41639fed
MC		 2128 /* guarantee DD bit not set now before h/w gets descriptor
2129 * this is the rest of the workaround for h/w double
2130 * writeback. */
2131 rx_desc->status = 0;
1da177e4 2132
1da177e4
LT		 2133
2134 if(++i == rx_ring->count) i = 0;
2135 buffer_info = &rx_ring->buffer_info[i];
2136 }
2137
1dfdd7df
AK		 2138 if (likely(rx_ring->next_to_use != i)) {
2139 rx_ring->next_to_use = i;
2140 if (unlikely(i-- == 0))
2141 i = (rx_ring->count - 1);
2142
2143 /* Force memory writes to complete before letting h/w
2144 * know there are new descriptors to fetch. (Only
2145 * applicable for weak-ordered memory model archs, such
2146 * as IA-64). */
2147 wmb();
2148 IXGB_WRITE_REG(&adapter->hw, RDT, i);
2149 }
1da177e4
LT		 2150}
2151
2152/**
2153 * ixgb_vlan_rx_register - enables or disables vlan tagging/stripping.
2154 *
2155 * @param netdev network interface device structure
2156 * @param grp indicates to enable or disable tagging/stripping
2157 **/
2158static void
2159ixgb_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
2160{
8908c6cd 2161 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2162 uint32_t ctrl, rctl;
2163
2164 ixgb_irq_disable(adapter);
2165 adapter->vlgrp = grp;
2166
2167 if(grp) {
2168 /* enable VLAN tag insert/strip */
2169 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2170 ctrl |= IXGB_CTRL0_VME;
2171 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2172
2173 /* enable VLAN receive filtering */
2174
2175 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2176 rctl |= IXGB_RCTL_VFE;
2177 rctl &= ~IXGB_RCTL_CFIEN;
2178 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2179 } else {
2180 /* disable VLAN tag insert/strip */
2181
2182 ctrl = IXGB_READ_REG(&adapter->hw, CTRL0);
2183 ctrl &= ~IXGB_CTRL0_VME;
2184 IXGB_WRITE_REG(&adapter->hw, CTRL0, ctrl);
2185
2186 /* disable VLAN filtering */
2187
2188 rctl = IXGB_READ_REG(&adapter->hw, RCTL);
2189 rctl &= ~IXGB_RCTL_VFE;
2190 IXGB_WRITE_REG(&adapter->hw, RCTL, rctl);
2191 }
2192
2193 ixgb_irq_enable(adapter);
2194}
2195
2196static void
2197ixgb_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
2198{
8908c6cd 2199 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2200 uint32_t vfta, index;
2201
2202 /* add VID to filter table */
2203
2204 index = (vid >> 5) & 0x7F;
2205 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2206 vfta |= (1 << (vid & 0x1F));
2207 ixgb_write_vfta(&adapter->hw, index, vfta);
2208}
2209
2210static void
2211ixgb_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
2212{
8908c6cd 2213 struct ixgb_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2214 uint32_t vfta, index;
2215
2216 ixgb_irq_disable(adapter);
2217
5c15bdec 2218 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1da177e4
LT		 2219
2220 ixgb_irq_enable(adapter);
2221
2222 /* remove VID from filter table*/
2223
2224 index = (vid >> 5) & 0x7F;
2225 vfta = IXGB_READ_REG_ARRAY(&adapter->hw, VFTA, index);
2226 vfta &= ~(1 << (vid & 0x1F));
2227 ixgb_write_vfta(&adapter->hw, index, vfta);
2228}
2229
2230static void
2231ixgb_restore_vlan(struct ixgb_adapter *adapter)
2232{
2233 ixgb_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2234
2235 if(adapter->vlgrp) {
2236 uint16_t vid;
2237 for(vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 2238 if(!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 2239 continue;
2240 ixgb_vlan_rx_add_vid(adapter->netdev, vid);
2241 }
2242 }
2243}
2244
1da177e4
LT		 2245#ifdef CONFIG_NET_POLL_CONTROLLER
2246/*
2247 * Polling 'interrupt' - used by things like netconsole to send skbs
2248 * without having to re-enable interrupts. It's not called while
2249 * the interrupt routine is executing.
2250 */
2251
2252static void ixgb_netpoll(struct net_device *dev)
2253{
f990b426 2254 struct ixgb_adapter *adapter = netdev_priv(dev);
ac79c82e 2255
1da177e4 2256 disable_irq(adapter->pdev->irq);
7d12e780 2257 ixgb_intr(adapter->pdev->irq, dev);
1da177e4
LT		 2258 enable_irq(adapter->pdev->irq);
2259}
2260#endif
2261
01748fbb
LV		 2262/**
2263 * ixgb_io_error_detected() - called when PCI error is detected
2264 * @pdev pointer to pci device with error
2265 * @state pci channel state after error
2266 *
2267 * This callback is called by the PCI subsystem whenever
2268 * a PCI bus error is detected.
2269 */
2270static pci_ers_result_t ixgb_io_error_detected (struct pci_dev *pdev,
2271 enum pci_channel_state state)
2272{
2273 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2274 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV		 2275
2276 if(netif_running(netdev))
2277 ixgb_down(adapter, TRUE);
2278
2279 pci_disable_device(pdev);
2280
2281 /* Request a slot reset. */
2282 return PCI_ERS_RESULT_NEED_RESET;
2283}
2284
2285/**
2286 * ixgb_io_slot_reset - called after the pci bus has been reset.
2287 * @pdev pointer to pci device with error
2288 *
2289 * This callback is called after the PCI buss has been reset.
2290 * Basically, this tries to restart the card from scratch.
2291 * This is a shortened version of the device probe/discovery code,
2292 * it resembles the first-half of the ixgb_probe() routine.
2293 */
2294static pci_ers_result_t ixgb_io_slot_reset (struct pci_dev *pdev)
2295{
2296 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2297 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV		 2298
2299 if(pci_enable_device(pdev)) {
2300 DPRINTK(PROBE, ERR, "Cannot re-enable PCI device after reset.\n");
2301 return PCI_ERS_RESULT_DISCONNECT;
2302 }
2303
2304 /* Perform card reset only on one instance of the card */
2305 if (0 != PCI_FUNC (pdev->devfn))
2306 return PCI_ERS_RESULT_RECOVERED;
2307
2308 pci_set_master(pdev);
2309
2310 netif_carrier_off(netdev);
2311 netif_stop_queue(netdev);
2312 ixgb_reset(adapter);
2313
2314 /* Make sure the EEPROM is good */
2315 if(!ixgb_validate_eeprom_checksum(&adapter->hw)) {
2316 DPRINTK(PROBE, ERR, "After reset, the EEPROM checksum is not valid.\n");
2317 return PCI_ERS_RESULT_DISCONNECT;
2318 }
2319 ixgb_get_ee_mac_addr(&adapter->hw, netdev->dev_addr);
2320 memcpy(netdev->perm_addr, netdev->dev_addr, netdev->addr_len);
2321
2322 if(!is_valid_ether_addr(netdev->perm_addr)) {
2323 DPRINTK(PROBE, ERR, "After reset, invalid MAC address.\n");
2324 return PCI_ERS_RESULT_DISCONNECT;
2325 }
2326
2327 return PCI_ERS_RESULT_RECOVERED;
2328}
2329
2330/**
2331 * ixgb_io_resume - called when its OK to resume normal operations
2332 * @pdev pointer to pci device with error
2333 *
2334 * The error recovery driver tells us that its OK to resume
2335 * normal operation. Implementation resembles the second-half
2336 * of the ixgb_probe() routine.
2337 */
2338static void ixgb_io_resume (struct pci_dev *pdev)
2339{
2340 struct net_device *netdev = pci_get_drvdata(pdev);
f7d4fa01 2341 struct ixgb_adapter *adapter = netdev_priv(netdev);
01748fbb
LV		 2342
2343 pci_set_master(pdev);
2344
2345 if(netif_running(netdev)) {
2346 if(ixgb_up(adapter)) {
2347 printk ("ixgb: can't bring device back up after reset\n");
2348 return;
2349 }
2350 }
2351
2352 netif_device_attach(netdev);
2353 mod_timer(&adapter->watchdog_timer, jiffies);
2354}
2355
1da177e4 2356/* ixgb_main.c */
Clone of davem's net-next-2.6 tree