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[net-next-2.6.git] / drivers / net / irda / ali-ircc.c
CommitLineData
1da177e4
LT		 1/*********************************************************************
2 *
3 * Filename: ali-ircc.h
4 * Version: 0.5
5 * Description: Driver for the ALI M1535D and M1543C FIR Controller
6 * Status: Experimental.
7 * Author: Benjamin Kong <benjamin_kong@ali.com.tw>
8 * Created at: 2000/10/16 03:46PM
9 * Modified at: 2001/1/3 02:55PM
10 * Modified by: Benjamin Kong <benjamin_kong@ali.com.tw>
11 * Modified at: 2003/11/6 and support for ALi south-bridge chipsets M1563
12 * Modified by: Clear Zhang <clear_zhang@ali.com.tw>
13 *
14 * Copyright (c) 2000 Benjamin Kong <benjamin_kong@ali.com.tw>
15 * All Rights Reserved
16 *
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
21 *
22 ********************************************************************/
23
24#include <linux/module.h>
5a0e3ad6 25#include <linux/gfp.h>
1da177e4
LT		 26
27#include <linux/kernel.h>
28#include <linux/types.h>
29#include <linux/skbuff.h>
30#include <linux/netdevice.h>
31#include <linux/ioport.h>
32#include <linux/delay.h>
1da177e4
LT		 33#include <linux/init.h>
34#include <linux/rtnetlink.h>
35#include <linux/serial_reg.h>
36#include <linux/dma-mapping.h>
898b1d16 37#include <linux/platform_device.h>
1da177e4
LT		 38
39#include <asm/io.h>
40#include <asm/dma.h>
41#include <asm/byteorder.h>
42
1da177e4
LT		 43#include <net/irda/wrapper.h>
44#include <net/irda/irda.h>
45#include <net/irda/irda_device.h>
46
47#include "ali-ircc.h"
48
49#define CHIP_IO_EXTENT 8
50#define BROKEN_DONGLE_ID
51
898b1d16
SO		 52#define ALI_IRCC_DRIVER_NAME "ali-ircc"
53
54/* Power Management */
55static int ali_ircc_suspend(struct platform_device *dev, pm_message_t state);
56static int ali_ircc_resume(struct platform_device *dev);
57
58static struct platform_driver ali_ircc_driver = {
59 .suspend = ali_ircc_suspend,
60 .resume = ali_ircc_resume,
61 .driver = {
62 .name = ALI_IRCC_DRIVER_NAME,
72abb461 63 .owner = THIS_MODULE,
898b1d16
SO		 64 },
65};
1da177e4
LT		 66
67/* Module parameters */
68static int qos_mtt_bits = 0x07; /* 1 ms or more */
69
70/* Use BIOS settions by default, but user may supply module parameters */
71static unsigned int io[] = { ~0, ~0, ~0, ~0 };
72static unsigned int irq[] = { 0, 0, 0, 0 };
73static unsigned int dma[] = { 0, 0, 0, 0 };
74
75static int ali_ircc_probe_53(ali_chip_t *chip, chipio_t *info);
76static int ali_ircc_init_43(ali_chip_t *chip, chipio_t *info);
77static int ali_ircc_init_53(ali_chip_t *chip, chipio_t *info);
78
79/* These are the currently known ALi sourth-bridge chipsets, the only one difference
80 * is that M1543C doesn't support HP HDSL-3600
81 */
82static ali_chip_t chips[] =
83{
84 { "M1543", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x43, ali_ircc_probe_53, ali_ircc_init_43 },
85 { "M1535", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x53, ali_ircc_probe_53, ali_ircc_init_53 },
86 { "M1563", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x63, ali_ircc_probe_53, ali_ircc_init_53 },
87 { NULL }
88};
89
90/* Max 4 instances for now */
91static struct ali_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
92
93/* Dongle Types */
94static char *dongle_types[] = {
95 "TFDS6000",
96 "HP HSDL-3600",
97 "HP HSDL-1100",
98 "No dongle connected",
99};
100
101/* Some prototypes */
102static int ali_ircc_open(int i, chipio_t *info);
103
104static int ali_ircc_close(struct ali_ircc_cb *self);
105
106static int ali_ircc_setup(chipio_t *info);
107static int ali_ircc_is_receiving(struct ali_ircc_cb *self);
108static int ali_ircc_net_open(struct net_device *dev);
109static int ali_ircc_net_close(struct net_device *dev);
110static int ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
1da177e4 111static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud);
1da177e4
LT		 112
113/* SIR function */
6518bbb8
SH		 114static netdev_tx_t ali_ircc_sir_hard_xmit(struct sk_buff *skb,
115 struct net_device *dev);
1da177e4
LT		 116static irqreturn_t ali_ircc_sir_interrupt(struct ali_ircc_cb *self);
117static void ali_ircc_sir_receive(struct ali_ircc_cb *self);
118static void ali_ircc_sir_write_wakeup(struct ali_ircc_cb *self);
119static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len);
120static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed);
121
122/* FIR function */
6518bbb8
SH		 123static netdev_tx_t ali_ircc_fir_hard_xmit(struct sk_buff *skb,
124 struct net_device *dev);
1da177e4
LT		 125static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 speed);
126static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self);
127static int ali_ircc_dma_receive(struct ali_ircc_cb *self);
128static int ali_ircc_dma_receive_complete(struct ali_ircc_cb *self);
129static int ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self);
130static void ali_ircc_dma_xmit(struct ali_ircc_cb *self);
131
132/* My Function */
133static int ali_ircc_read_dongle_id (int i, chipio_t *info);
134static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed);
135
136/* ALi chip function */
137static void SIR2FIR(int iobase);
138static void FIR2SIR(int iobase);
139static void SetCOMInterrupts(struct ali_ircc_cb *self , unsigned char enable);
140
141/*
142 * Function ali_ircc_init ()
143 *
144 * Initialize chip. Find out whay kinds of chips we are dealing with
145 * and their configuation registers address
146 */
147static int __init ali_ircc_init(void)
148{
149 ali_chip_t *chip;
150 chipio_t info;
9c6c6795 151 int ret;
1da177e4
LT		 152 int cfg, cfg_base;
153 int reg, revision;
154 int i = 0;
155
a97a6f10 156 IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__);
898b1d16
SO		 157
158 ret = platform_driver_register(&ali_ircc_driver);
159 if (ret) {
160 IRDA_ERROR("%s, Can't register driver!\n",
161 ALI_IRCC_DRIVER_NAME);
162 return ret;
163 }
164
9c6c6795 165 ret = -ENODEV;
1da177e4
LT		 166
167 /* Probe for all the ALi chipsets we know about */
168 for (chip= chips; chip->name; chip++, i++)
169 {
a97a6f10 170 IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __func__, chip->name);
1da177e4
LT		 171
172 /* Try all config registers for this chip */
173 for (cfg=0; cfg<2; cfg++)
174 {
175 cfg_base = chip->cfg[cfg];
176 if (!cfg_base)
177 continue;
178
179 memset(&info, 0, sizeof(chipio_t));
180 info.cfg_base = cfg_base;
181 info.fir_base = io[i];
182 info.dma = dma[i];
183 info.irq = irq[i];
184
185
186 /* Enter Configuration */
187 outb(chip->entr1, cfg_base);
188 outb(chip->entr2, cfg_base);
189
190 /* Select Logical Device 5 Registers (UART2) */
191 outb(0x07, cfg_base);
192 outb(0x05, cfg_base+1);
193
194 /* Read Chip Identification Register */
195 outb(chip->cid_index, cfg_base);
196 reg = inb(cfg_base+1);
197
198 if (reg == chip->cid_value)
199 {
a97a6f10 200 IRDA_DEBUG(2, "%s(), Chip found at 0x%03x\n", __func__, cfg_base);
1da177e4
LT		 201
202 outb(0x1F, cfg_base);
203 revision = inb(cfg_base+1);
a97a6f10 204 IRDA_DEBUG(2, "%s(), Found %s chip, revision=%d\n", __func__,
1da177e4
LT		 205 chip->name, revision);
206
207 /*
208 * If the user supplies the base address, then
209 * we init the chip, if not we probe the values
210 * set by the BIOS
211 */
212 if (io[i] < 2000)
213 {
214 chip->init(chip, &info);
215 }
216 else
217 {
218 chip->probe(chip, &info);
219 }
220
221 if (ali_ircc_open(i, &info) == 0)
222 ret = 0;
223 i++;
224 }
225 else
226 {
a97a6f10 227 IRDA_DEBUG(2, "%s(), No %s chip at 0x%03x\n", __func__, chip->name, cfg_base);
1da177e4
LT		 228 }
229 /* Exit configuration */
230 outb(0xbb, cfg_base);
231 }
232 }
233
a97a6f10 234 IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__);
898b1d16
SO		 235
236 if (ret)
237 platform_driver_unregister(&ali_ircc_driver);
238
1da177e4
LT		 239 return ret;
240}
241
242/*
243 * Function ali_ircc_cleanup ()
244 *
245 * Close all configured chips
246 *
247 */
248static void __exit ali_ircc_cleanup(void)
249{
250 int i;
251
a97a6f10 252 IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__);
1da177e4 253
9c3bd683 254 for (i=0; i < ARRAY_SIZE(dev_self); i++) {
1da177e4
LT		 255 if (dev_self[i])
256 ali_ircc_close(dev_self[i]);
257 }
258
898b1d16
SO		 259 platform_driver_unregister(&ali_ircc_driver);
260
a97a6f10 261 IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__);
1da177e4
LT		 262}
263
2d44a222
SH		 264static const struct net_device_ops ali_ircc_sir_ops = {
265 .ndo_open = ali_ircc_net_open,
266 .ndo_stop = ali_ircc_net_close,
267 .ndo_start_xmit = ali_ircc_sir_hard_xmit,
268 .ndo_do_ioctl = ali_ircc_net_ioctl,
269};
270
271static const struct net_device_ops ali_ircc_fir_ops = {
272 .ndo_open = ali_ircc_net_open,
273 .ndo_stop = ali_ircc_net_close,
274 .ndo_start_xmit = ali_ircc_fir_hard_xmit,
275 .ndo_do_ioctl = ali_ircc_net_ioctl,
276};
277
1da177e4
LT		 278/*
279 * Function ali_ircc_open (int i, chipio_t *inf)
280 *
281 * Open driver instance
282 *
283 */
284static int ali_ircc_open(int i, chipio_t *info)
285{
286 struct net_device *dev;
287 struct ali_ircc_cb *self;
1da177e4
LT		 288 int dongle_id;
289 int err;
290
a97a6f10 291 IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__);
9c3bd683
BH		 292
293 if (i >= ARRAY_SIZE(dev_self)) {
294 IRDA_ERROR("%s(), maximum number of supported chips reached!\n",
a97a6f10 295 __func__);
9c3bd683
BH		 296 return -ENOMEM;
297 }
1da177e4
LT		 298
299 /* Set FIR FIFO and DMA Threshold */
300 if ((ali_ircc_setup(info)) == -1)
301 return -1;
302
303 dev = alloc_irdadev(sizeof(*self));
304 if (dev == NULL) {
305 IRDA_ERROR("%s(), can't allocate memory for control block!\n",
a97a6f10 306 __func__);
1da177e4
LT		 307 return -ENOMEM;
308 }
309
4cf1653a 310 self = netdev_priv(dev);
1da177e4
LT		 311 self->netdev = dev;
312 spin_lock_init(&self->lock);
313
314 /* Need to store self somewhere */
315 dev_self[i] = self;
316 self->index = i;
317
318 /* Initialize IO */
319 self->io.cfg_base = info->cfg_base; /* In ali_ircc_probe_53 assign */
320 self->io.fir_base = info->fir_base; /* info->sir_base = info->fir_base */
321 self->io.sir_base = info->sir_base; /* ALi SIR and FIR use the same address */
322 self->io.irq = info->irq;
323 self->io.fir_ext = CHIP_IO_EXTENT;
324 self->io.dma = info->dma;
325 self->io.fifo_size = 16; /* SIR: 16, FIR: 32 Benjamin 2000/11/1 */
326
327 /* Reserve the ioports that we need */
898b1d16
SO		 328 if (!request_region(self->io.fir_base, self->io.fir_ext,
329 ALI_IRCC_DRIVER_NAME)) {
a97a6f10 330 IRDA_WARNING("%s(), can't get iobase of 0x%03x\n", __func__,
1da177e4
LT		 331 self->io.fir_base);
332 err = -ENODEV;
333 goto err_out1;
334 }
335
336 /* Initialize QoS for this device */
337 irda_init_max_qos_capabilies(&self->qos);
338
339 /* The only value we must override it the baudrate */
340 self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
341 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8); // benjamin 2000/11/8 05:27PM
342
343 self->qos.min_turn_time.bits = qos_mtt_bits;
344
345 irda_qos_bits_to_value(&self->qos);
346
347 /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
348 self->rx_buff.truesize = 14384;
349 self->tx_buff.truesize = 14384;
350
351 /* Allocate memory if needed */
352 self->rx_buff.head =
353 dma_alloc_coherent(NULL, self->rx_buff.truesize,
354 &self->rx_buff_dma, GFP_KERNEL);
355 if (self->rx_buff.head == NULL) {
356 err = -ENOMEM;
357 goto err_out2;
358 }
359 memset(self->rx_buff.head, 0, self->rx_buff.truesize);
360
361 self->tx_buff.head =
362 dma_alloc_coherent(NULL, self->tx_buff.truesize,
363 &self->tx_buff_dma, GFP_KERNEL);
364 if (self->tx_buff.head == NULL) {
365 err = -ENOMEM;
366 goto err_out3;
367 }
368 memset(self->tx_buff.head, 0, self->tx_buff.truesize);
369
370 self->rx_buff.in_frame = FALSE;
371 self->rx_buff.state = OUTSIDE_FRAME;
372 self->tx_buff.data = self->tx_buff.head;
373 self->rx_buff.data = self->rx_buff.head;
374
375 /* Reset Tx queue info */
376 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
377 self->tx_fifo.tail = self->tx_buff.head;
378
1da177e4 379 /* Override the network functions we need to use */
2d44a222 380 dev->netdev_ops = &ali_ircc_sir_ops;
1da177e4
LT		 381
382 err = register_netdev(dev);
383 if (err) {
a97a6f10 384 IRDA_ERROR("%s(), register_netdev() failed!\n", __func__);
1da177e4
LT		 385 goto err_out4;
386 }
387 IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name);
388
389 /* Check dongle id */
390 dongle_id = ali_ircc_read_dongle_id(i, info);
a97a6f10 391 IRDA_MESSAGE("%s(), %s, Found dongle: %s\n", __func__,
898b1d16 392 ALI_IRCC_DRIVER_NAME, dongle_types[dongle_id]);
1da177e4
LT		 393
394 self->io.dongle_id = dongle_id;
1da177e4 395
a97a6f10 396 IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__);
1da177e4
LT		 397
398 return 0;
399
400 err_out4:
401 dma_free_coherent(NULL, self->tx_buff.truesize,
402 self->tx_buff.head, self->tx_buff_dma);
403 err_out3:
404 dma_free_coherent(NULL, self->rx_buff.truesize,
405 self->rx_buff.head, self->rx_buff_dma);
406 err_out2:
407 release_region(self->io.fir_base, self->io.fir_ext);
408 err_out1:
409 dev_self[i] = NULL;
410 free_netdev(dev);
411 return err;
412}
413
414
415/*
416 * Function ali_ircc_close (self)
417 *
418 * Close driver instance
419 *
420 */
421static int __exit ali_ircc_close(struct ali_ircc_cb *self)
422{
423 int iobase;
424
a97a6f10 425 IRDA_DEBUG(4, "%s(), ---------------- Start ----------------\n", __func__);
1da177e4
LT		 426
427 IRDA_ASSERT(self != NULL, return -1;);
428
429 iobase = self->io.fir_base;
430
431 /* Remove netdevice */
432 unregister_netdev(self->netdev);
433
434 /* Release the PORT that this driver is using */
a97a6f10 435 IRDA_DEBUG(4, "%s(), Releasing Region %03x\n", __func__, self->io.fir_base);
1da177e4
LT		 436 release_region(self->io.fir_base, self->io.fir_ext);
437
438 if (self->tx_buff.head)
439 dma_free_coherent(NULL, self->tx_buff.truesize,
440 self->tx_buff.head, self->tx_buff_dma);
441
442 if (self->rx_buff.head)
443 dma_free_coherent(NULL, self->rx_buff.truesize,
444 self->rx_buff.head, self->rx_buff_dma);
445
446 dev_self[self->index] = NULL;
447 free_netdev(self->netdev);
448
a97a6f10 449 IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__);
1da177e4
LT		 450
451 return 0;
452}
453
454/*
455 * Function ali_ircc_init_43 (chip, info)
456 *
457 * Initialize the ALi M1543 chip.
458 */
459static int ali_ircc_init_43(ali_chip_t *chip, chipio_t *info)
460{
461 /* All controller information like I/O address, DMA channel, IRQ
462 * are set by BIOS
463 */
464
465 return 0;
466}
467
468/*
469 * Function ali_ircc_init_53 (chip, info)
470 *
471 * Initialize the ALi M1535 chip.
472 */
473static int ali_ircc_init_53(ali_chip_t *chip, chipio_t *info)
474{
475 /* All controller information like I/O address, DMA channel, IRQ
476 * are set by BIOS
477 */
478
479 return 0;
480}
481
482/*
483 * Function ali_ircc_probe_53 (chip, info)
484 *
485 * Probes for the ALi M1535D or M1535
486 */
487static int ali_ircc_probe_53(ali_chip_t *chip, chipio_t *info)
488{
489 int cfg_base = info->cfg_base;
490 int hi, low, reg;
491
a97a6f10 492 IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__);
1da177e4
LT		 493
494 /* Enter Configuration */
495 outb(chip->entr1, cfg_base);
496 outb(chip->entr2, cfg_base);
497
498 /* Select Logical Device 5 Registers (UART2) */
499 outb(0x07, cfg_base);
500 outb(0x05, cfg_base+1);
501
502 /* Read address control register */
503 outb(0x60, cfg_base);
504 hi = inb(cfg_base+1);
505 outb(0x61, cfg_base);
506 low = inb(cfg_base+1);
507 info->fir_base = (hi<<8) + low;
508
509 info->sir_base = info->fir_base;
510
a97a6f10 511 IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __func__, info->fir_base);
1da177e4
LT		 512
513 /* Read IRQ control register */
514 outb(0x70, cfg_base);
515 reg = inb(cfg_base+1);
516 info->irq = reg & 0x0f;
a97a6f10 517 IRDA_DEBUG(2, "%s(), probing irq=%d\n", __func__, info->irq);
1da177e4
LT		 518
519 /* Read DMA channel */
520 outb(0x74, cfg_base);
521 reg = inb(cfg_base+1);
522 info->dma = reg & 0x07;
523
524 if(info->dma == 0x04)
a97a6f10 525 IRDA_WARNING("%s(), No DMA channel assigned !\n", __func__);
1da177e4 526 else
a97a6f10 527 IRDA_DEBUG(2, "%s(), probing dma=%d\n", __func__, info->dma);
1da177e4
LT		 528
529 /* Read Enabled Status */
530 outb(0x30, cfg_base);
531 reg = inb(cfg_base+1);
532 info->enabled = (reg & 0x80) && (reg & 0x01);
a97a6f10 533 IRDA_DEBUG(2, "%s(), probing enabled=%d\n", __func__, info->enabled);
1da177e4
LT		 534
535 /* Read Power Status */
536 outb(0x22, cfg_base);
537 reg = inb(cfg_base+1);
538 info->suspended = (reg & 0x20);
a97a6f10 539 IRDA_DEBUG(2, "%s(), probing suspended=%d\n", __func__, info->suspended);
1da177e4
LT		 540
541 /* Exit configuration */
542 outb(0xbb, cfg_base);
543
a97a6f10 544 IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__);
1da177e4
LT		 545
546 return 0;
547}
548
549/*
550 * Function ali_ircc_setup (info)
551 *
552 * Set FIR FIFO and DMA Threshold
553 * Returns non-negative on success.
554 *
555 */
556static int ali_ircc_setup(chipio_t *info)
557{
558 unsigned char tmp;
559 int version;
560 int iobase = info->fir_base;
561
a97a6f10 562 IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__);
1da177e4
LT		 563
564 /* Locking comments :
565 * Most operations here need to be protected. We are called before
566 * the device instance is created in ali_ircc_open(), therefore
567 * nobody can bother us - Jean II */
568
569 /* Switch to FIR space */
570 SIR2FIR(iobase);
571
572 /* Master Reset */
573 outb(0x40, iobase+FIR_MCR); // benjamin 2000/11/30 11:45AM
574
575 /* Read FIR ID Version Register */
576 switch_bank(iobase, BANK3);
577 version = inb(iobase+FIR_ID_VR);
578
579 /* Should be 0x00 in the M1535/M1535D */
580 if(version != 0x00)
581 {
898b1d16
SO		 582 IRDA_ERROR("%s, Wrong chip version %02x\n",
583 ALI_IRCC_DRIVER_NAME, version);
1da177e4
LT		 584 return -1;
585 }
586
1da177e4
LT		 587 /* Set FIR FIFO Threshold Register */
588 switch_bank(iobase, BANK1);
589 outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR);
590
591 /* Set FIR DMA Threshold Register */
592 outb(RX_DMA_Threshold, iobase+FIR_DMA_TR);
593
594 /* CRC enable */
595 switch_bank(iobase, BANK2);
596 outb(inb(iobase+FIR_IRDA_CR) | IRDA_CR_CRC, iobase+FIR_IRDA_CR);
597
598 /* NDIS driver set TX Length here BANK2 Alias 3, Alias4*/
599
600 /* Switch to Bank 0 */
601 switch_bank(iobase, BANK0);
602
603 tmp = inb(iobase+FIR_LCR_B);
604 tmp &=~0x20; // disable SIP
605 tmp |= 0x80; // these two steps make RX mode
606 tmp &= 0xbf;
607 outb(tmp, iobase+FIR_LCR_B);
608
609 /* Disable Interrupt */
610 outb(0x00, iobase+FIR_IER);
611
612
613 /* Switch to SIR space */
614 FIR2SIR(iobase);
615
898b1d16
SO		 616 IRDA_MESSAGE("%s, driver loaded (Benjamin Kong)\n",
617 ALI_IRCC_DRIVER_NAME);
1da177e4
LT		 618
619 /* Enable receive interrupts */
620 // outb(UART_IER_RDI, iobase+UART_IER); //benjamin 2000/11/23 01:25PM
621 // Turn on the interrupts in ali_ircc_net_open
622
a97a6f10 623 IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__);
1da177e4
LT		 624
625 return 0;
626}
627
628/*
629 * Function ali_ircc_read_dongle_id (int index, info)
630 *
631 * Try to read dongle indentification. This procedure needs to be executed
632 * once after power-on/reset. It also needs to be used whenever you suspect
633 * that the user may have plugged/unplugged the IrDA Dongle.
634 */
635static int ali_ircc_read_dongle_id (int i, chipio_t *info)
636{
637 int dongle_id, reg;
638 int cfg_base = info->cfg_base;
639
a97a6f10 640 IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__);
1da177e4
LT		 641
642 /* Enter Configuration */
643 outb(chips[i].entr1, cfg_base);
644 outb(chips[i].entr2, cfg_base);
645
646 /* Select Logical Device 5 Registers (UART2) */
647 outb(0x07, cfg_base);
648 outb(0x05, cfg_base+1);
649
650 /* Read Dongle ID */
651 outb(0xf0, cfg_base);
652 reg = inb(cfg_base+1);
653 dongle_id = ((reg>>6)&0x02) | ((reg>>5)&0x01);
a97a6f10 654 IRDA_DEBUG(2, "%s(), probing dongle_id=%d, dongle_types=%s\n", __func__,
1da177e4
LT		 655 dongle_id, dongle_types[dongle_id]);
656
657 /* Exit configuration */
658 outb(0xbb, cfg_base);
659
a97a6f10 660 IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__);
1da177e4
LT		 661
662 return dongle_id;
663}
664
665/*
666 * Function ali_ircc_interrupt (irq, dev_id, regs)
667 *
668 * An interrupt from the chip has arrived. Time to do some work
669 *
670 */
7d12e780 671static irqreturn_t ali_ircc_interrupt(int irq, void *dev_id)
1da177e4 672{
c31f28e7 673 struct net_device *dev = dev_id;
1da177e4
LT		 674 struct ali_ircc_cb *self;
675 int ret;
676
a97a6f10 677 IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__);
1da177e4 678
4cf1653a 679 self = netdev_priv(dev);
1da177e4
LT		 680
681 spin_lock(&self->lock);
682
683 /* Dispatch interrupt handler for the current speed */
684 if (self->io.speed > 115200)
685 ret = ali_ircc_fir_interrupt(self);
686 else
687 ret = ali_ircc_sir_interrupt(self);
688
689 spin_unlock(&self->lock);
690
a97a6f10 691 IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__);
1da177e4
LT		 692 return ret;
693}
694/*
695 * Function ali_ircc_fir_interrupt(irq, struct ali_ircc_cb *self)
696 *
697 * Handle MIR/FIR interrupt
698 *
699 */
700static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self)
701{
702 __u8 eir, OldMessageCount;
703 int iobase, tmp;
704
a97a6f10 705 IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__);
1da177e4
LT		 706
707 iobase = self->io.fir_base;
708
709 switch_bank(iobase, BANK0);
710 self->InterruptID = inb(iobase+FIR_IIR);
711 self->BusStatus = inb(iobase+FIR_BSR);
712
713 OldMessageCount = (self->LineStatus + 1) & 0x07;
714 self->LineStatus = inb(iobase+FIR_LSR);
715 //self->ier = inb(iobase+FIR_IER); 2000/12/1 04:32PM
716 eir = self->InterruptID & self->ier; /* Mask out the interesting ones */
717
a97a6f10
HH		 718 IRDA_DEBUG(1, "%s(), self->InterruptID = %x\n", __func__,self->InterruptID);
719 IRDA_DEBUG(1, "%s(), self->LineStatus = %x\n", __func__,self->LineStatus);
720 IRDA_DEBUG(1, "%s(), self->ier = %x\n", __func__,self->ier);
721 IRDA_DEBUG(1, "%s(), eir = %x\n", __func__,eir);
1da177e4
LT		 722
723 /* Disable interrupts */
724 SetCOMInterrupts(self, FALSE);
725
726 /* Tx or Rx Interrupt */
727
728 if (eir & IIR_EOM)
729 {
730 if (self->io.direction == IO_XMIT) /* TX */
731 {
a97a6f10 732 IRDA_DEBUG(1, "%s(), ******* IIR_EOM (Tx) *******\n", __func__);
1da177e4
LT		 733
734 if(ali_ircc_dma_xmit_complete(self))
735 {
736 if (irda_device_txqueue_empty(self->netdev))
737 {
738 /* Prepare for receive */
739 ali_ircc_dma_receive(self);
740 self->ier = IER_EOM;
741 }
742 }
743 else
744 {
745 self->ier = IER_EOM;
746 }
747
748 }
749 else /* RX */
750 {
a97a6f10 751 IRDA_DEBUG(1, "%s(), ******* IIR_EOM (Rx) *******\n", __func__);
1da177e4
LT		 752
753 if(OldMessageCount > ((self->LineStatus+1) & 0x07))
754 {
755 self->rcvFramesOverflow = TRUE;
a97a6f10 756 IRDA_DEBUG(1, "%s(), ******* self->rcvFramesOverflow = TRUE ******** \n", __func__);
1da177e4
LT		 757 }
758
759 if (ali_ircc_dma_receive_complete(self))
760 {
a97a6f10 761 IRDA_DEBUG(1, "%s(), ******* receive complete ******** \n", __func__);
1da177e4
LT		 762
763 self->ier = IER_EOM;
764 }
765 else
766 {
a97a6f10 767 IRDA_DEBUG(1, "%s(), ******* Not receive complete ******** \n", __func__);
1da177e4
LT		 768
769 self->ier = IER_EOM | IER_TIMER;
770 }
771
772 }
773 }
774 /* Timer Interrupt */
775 else if (eir & IIR_TIMER)
776 {
777 if(OldMessageCount > ((self->LineStatus+1) & 0x07))
778 {
779 self->rcvFramesOverflow = TRUE;
a97a6f10 780 IRDA_DEBUG(1, "%s(), ******* self->rcvFramesOverflow = TRUE ******* \n", __func__);
1da177e4
LT		 781 }
782 /* Disable Timer */
783 switch_bank(iobase, BANK1);
784 tmp = inb(iobase+FIR_CR);
785 outb( tmp& ~CR_TIMER_EN, iobase+FIR_CR);
786
787 /* Check if this is a Tx timer interrupt */
788 if (self->io.direction == IO_XMIT)
789 {
790 ali_ircc_dma_xmit(self);
791
792 /* Interrupt on EOM */
793 self->ier = IER_EOM;
794
795 }
796 else /* Rx */
797 {
798 if(ali_ircc_dma_receive_complete(self))
799 {
800 self->ier = IER_EOM;
801 }
802 else
803 {
804 self->ier = IER_EOM | IER_TIMER;
805 }
806 }
807 }
808
809 /* Restore Interrupt */
810 SetCOMInterrupts(self, TRUE);
811
a97a6f10 812 IRDA_DEBUG(1, "%s(), ----------------- End ---------------\n", __func__);
1da177e4
LT		 813 return IRQ_RETVAL(eir);
814}
815
816/*
817 * Function ali_ircc_sir_interrupt (irq, self, eir)
818 *
819 * Handle SIR interrupt
820 *
821 */
822static irqreturn_t ali_ircc_sir_interrupt(struct ali_ircc_cb *self)
823{
824 int iobase;
825 int iir, lsr;
826
a97a6f10 827 IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__);
1da177e4
LT		 828
829 iobase = self->io.sir_base;
830
831 iir = inb(iobase+UART_IIR) & UART_IIR_ID;
832 if (iir) {
833 /* Clear interrupt */
834 lsr = inb(iobase+UART_LSR);
835
a97a6f10 836 IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n", __func__,
1da177e4
LT		 837 iir, lsr, iobase);
838
839 switch (iir)
840 {
841 case UART_IIR_RLSI:
a97a6f10 842 IRDA_DEBUG(2, "%s(), RLSI\n", __func__);
1da177e4
LT		 843 break;
844 case UART_IIR_RDI:
845 /* Receive interrupt */
846 ali_ircc_sir_receive(self);
847 break;
848 case UART_IIR_THRI:
849 if (lsr & UART_LSR_THRE)
850 {
851 /* Transmitter ready for data */
852 ali_ircc_sir_write_wakeup(self);
853 }
854 break;
855 default:
a97a6f10 856 IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n", __func__, iir);
1da177e4
LT		 857 break;
858 }
859
860 }
861
862
a97a6f10 863 IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__);
1da177e4
LT		 864
865 return IRQ_RETVAL(iir);
866}
867
868
869/*
870 * Function ali_ircc_sir_receive (self)
871 *
872 * Receive one frame from the infrared port
873 *
874 */
875static void ali_ircc_sir_receive(struct ali_ircc_cb *self)
876{
877 int boguscount = 0;
878 int iobase;
879
a97a6f10 880 IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__);
1da177e4
LT		 881 IRDA_ASSERT(self != NULL, return;);
882
883 iobase = self->io.sir_base;
884
885 /*
886 * Receive all characters in Rx FIFO, unwrap and unstuff them.
887 * async_unwrap_char will deliver all found frames
888 */
889 do {
af049081 890 async_unwrap_char(self->netdev, &self->netdev->stats, &self->rx_buff,
1da177e4
LT		 891 inb(iobase+UART_RX));
892
893 /* Make sure we don't stay here too long */
894 if (boguscount++ > 32) {
a97a6f10 895 IRDA_DEBUG(2,"%s(), breaking!\n", __func__);
1da177e4
LT		 896 break;
897 }
898 } while (inb(iobase+UART_LSR) & UART_LSR_DR);
899
a97a6f10 900 IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 901}
902
903/*
904 * Function ali_ircc_sir_write_wakeup (tty)
905 *
906 * Called by the driver when there's room for more data. If we have
907 * more packets to send, we send them here.
908 *
909 */
910static void ali_ircc_sir_write_wakeup(struct ali_ircc_cb *self)
911{
912 int actual = 0;
913 int iobase;
914
915 IRDA_ASSERT(self != NULL, return;);
916
a97a6f10 917 IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ );
1da177e4
LT		 918
919 iobase = self->io.sir_base;
920
921 /* Finished with frame? */
922 if (self->tx_buff.len > 0)
923 {
924 /* Write data left in transmit buffer */
925 actual = ali_ircc_sir_write(iobase, self->io.fifo_size,
926 self->tx_buff.data, self->tx_buff.len);
927 self->tx_buff.data += actual;
928 self->tx_buff.len -= actual;
929 }
930 else
931 {
932 if (self->new_speed)
933 {
934 /* We must wait until all data are gone */
935 while(!(inb(iobase+UART_LSR) & UART_LSR_TEMT))
a97a6f10 936 IRDA_DEBUG(1, "%s(), UART_LSR_THRE\n", __func__ );
1da177e4 937
a97a6f10 938 IRDA_DEBUG(1, "%s(), Changing speed! self->new_speed = %d\n", __func__ , self->new_speed);
1da177e4
LT		 939 ali_ircc_change_speed(self, self->new_speed);
940 self->new_speed = 0;
941
942 // benjamin 2000/11/10 06:32PM
943 if (self->io.speed > 115200)
944 {
a97a6f10 945 IRDA_DEBUG(2, "%s(), ali_ircc_change_speed from UART_LSR_TEMT \n", __func__ );
1da177e4
LT		 946
947 self->ier = IER_EOM;
948 // SetCOMInterrupts(self, TRUE);
949 return;
950 }
951 }
952 else
953 {
954 netif_wake_queue(self->netdev);
955 }
956
af049081 957 self->netdev->stats.tx_packets++;
1da177e4
LT		 958
959 /* Turn on receive interrupts */
960 outb(UART_IER_RDI, iobase+UART_IER);
961 }
962
a97a6f10 963 IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 964}
965
966static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud)
967{
968 struct net_device *dev = self->netdev;
969 int iobase;
970
a97a6f10 971 IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ );
1da177e4 972
a97a6f10 973 IRDA_DEBUG(2, "%s(), setting speed = %d \n", __func__ , baud);
1da177e4
LT		 974
975 /* This function *must* be called with irq off and spin-lock.
976 * - Jean II */
977
978 iobase = self->io.fir_base;
979
980 SetCOMInterrupts(self, FALSE); // 2000/11/24 11:43AM
981
982 /* Go to MIR, FIR Speed */
983 if (baud > 115200)
984 {
985
986
987 ali_ircc_fir_change_speed(self, baud);
988
989 /* Install FIR xmit handler*/
2d44a222 990 dev->netdev_ops = &ali_ircc_fir_ops;
1da177e4
LT		 991
992 /* Enable Interuupt */
993 self->ier = IER_EOM; // benjamin 2000/11/20 07:24PM
994
995 /* Be ready for incomming frames */
996 ali_ircc_dma_receive(self); // benajmin 2000/11/8 07:46PM not complete
997 }
998 /* Go to SIR Speed */
999 else
1000 {
1001 ali_ircc_sir_change_speed(self, baud);
1002
1003 /* Install SIR xmit handler*/
2d44a222 1004 dev->netdev_ops = &ali_ircc_sir_ops;
1da177e4
LT		 1005 }
1006
1007
1008 SetCOMInterrupts(self, TRUE); // 2000/11/24 11:43AM
1009
1010 netif_wake_queue(self->netdev);
1011
a97a6f10 1012 IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 1013}
1014
1015static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 baud)
1016{
1017
1018 int iobase;
1019 struct ali_ircc_cb *self = (struct ali_ircc_cb *) priv;
1020 struct net_device *dev;
1021
a97a6f10 1022 IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ );
1da177e4
LT		 1023
1024 IRDA_ASSERT(self != NULL, return;);
1025
1026 dev = self->netdev;
1027 iobase = self->io.fir_base;
1028
a97a6f10 1029 IRDA_DEBUG(1, "%s(), self->io.speed = %d, change to speed = %d\n", __func__ ,self->io.speed,baud);
1da177e4
LT		 1030
1031 /* Come from SIR speed */
1032 if(self->io.speed <=115200)
1033 {
1034 SIR2FIR(iobase);
1035 }
1036
1037 /* Update accounting for new speed */
1038 self->io.speed = baud;
1039
1040 // Set Dongle Speed mode
1041 ali_ircc_change_dongle_speed(self, baud);
1042
a97a6f10 1043 IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 1044}
1045
1046/*
1047 * Function ali_sir_change_speed (self, speed)
1048 *
1049 * Set speed of IrDA port to specified baudrate
1050 *
1051 */
1052static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed)
1053{
1054 struct ali_ircc_cb *self = (struct ali_ircc_cb *) priv;
1055 unsigned long flags;
1056 int iobase;
1057 int fcr; /* FIFO control reg */
1058 int lcr; /* Line control reg */
1059 int divisor;
1060
a97a6f10 1061 IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ );
1da177e4 1062
a97a6f10 1063 IRDA_DEBUG(1, "%s(), Setting speed to: %d\n", __func__ , speed);
1da177e4
LT		 1064
1065 IRDA_ASSERT(self != NULL, return;);
1066
1067 iobase = self->io.sir_base;
1068
1069 /* Come from MIR or FIR speed */
1070 if(self->io.speed >115200)
1071 {
1072 // Set Dongle Speed mode first
1073 ali_ircc_change_dongle_speed(self, speed);
1074
1075 FIR2SIR(iobase);
1076 }
1077
1078 // Clear Line and Auxiluary status registers 2000/11/24 11:47AM
1079
1080 inb(iobase+UART_LSR);
1081 inb(iobase+UART_SCR);
1082
1083 /* Update accounting for new speed */
1084 self->io.speed = speed;
1085
1086 spin_lock_irqsave(&self->lock, flags);
1087
1088 divisor = 115200/speed;
1089
1090 fcr = UART_FCR_ENABLE_FIFO;
1091
1092 /*
1093 * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and
1094 * almost 1,7 ms at 19200 bps. At speeds above that we can just forget
1095 * about this timeout since it will always be fast enough.
1096 */
1097 if (self->io.speed < 38400)
1098 fcr |= UART_FCR_TRIGGER_1;
1099 else
1100 fcr |= UART_FCR_TRIGGER_14;
1101
1102 /* IrDA ports use 8N1 */
1103 lcr = UART_LCR_WLEN8;
1104
1105 outb(UART_LCR_DLAB | lcr, iobase+UART_LCR); /* Set DLAB */
1106 outb(divisor & 0xff, iobase+UART_DLL); /* Set speed */
1107 outb(divisor >> 8, iobase+UART_DLM);
1108 outb(lcr, iobase+UART_LCR); /* Set 8N1 */
1109 outb(fcr, iobase+UART_FCR); /* Enable FIFO's */
1110
1111 /* without this, the conection will be broken after come back from FIR speed,
1112 but with this, the SIR connection is harder to established */
1113 outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), iobase+UART_MCR);
1114
1115 spin_unlock_irqrestore(&self->lock, flags);
1116
a97a6f10 1117 IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 1118}
1119
1120static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed)
1121{
1122
1123 struct ali_ircc_cb *self = (struct ali_ircc_cb *) priv;
1124 int iobase,dongle_id;
1125 int tmp = 0;
1126
a97a6f10 1127 IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ );
1da177e4
LT		 1128
1129 iobase = self->io.fir_base; /* or iobase = self->io.sir_base; */
1130 dongle_id = self->io.dongle_id;
1131
1132 /* We are already locked, no need to do it again */
1133
a97a6f10 1134 IRDA_DEBUG(1, "%s(), Set Speed for %s , Speed = %d\n", __func__ , dongle_types[dongle_id], speed);
1da177e4
LT		 1135
1136 switch_bank(iobase, BANK2);
1137 tmp = inb(iobase+FIR_IRDA_CR);
1138
1139 /* IBM type dongle */
1140 if(dongle_id == 0)
1141 {
1142 if(speed == 4000000)
1143 {
1144 // __ __
1145 // SD/MODE __| |__ __
1146 // __ __
1147 // IRTX __ __| |__
1148 // T1 T2 T3 T4 T5
1149
1150 tmp &= ~IRDA_CR_HDLC; // HDLC=0
1151 tmp |= IRDA_CR_CRC; // CRC=1
1152
1153 switch_bank(iobase, BANK2);
1154 outb(tmp, iobase+FIR_IRDA_CR);
1155
1156 // T1 -> SD/MODE:0 IRTX:0
1157 tmp &= ~0x09;
1158 tmp |= 0x02;
1159 outb(tmp, iobase+FIR_IRDA_CR);
1160 udelay(2);
1161
1162 // T2 -> SD/MODE:1 IRTX:0
1163 tmp &= ~0x01;
1164 tmp |= 0x0a;
1165 outb(tmp, iobase+FIR_IRDA_CR);
1166 udelay(2);
1167
1168 // T3 -> SD/MODE:1 IRTX:1
1169 tmp |= 0x0b;
1170 outb(tmp, iobase+FIR_IRDA_CR);
1171 udelay(2);
1172
1173 // T4 -> SD/MODE:0 IRTX:1
1174 tmp &= ~0x08;
1175 tmp |= 0x03;
1176 outb(tmp, iobase+FIR_IRDA_CR);
1177 udelay(2);
1178
1179 // T5 -> SD/MODE:0 IRTX:0
1180 tmp &= ~0x09;
1181 tmp |= 0x02;
1182 outb(tmp, iobase+FIR_IRDA_CR);
1183 udelay(2);
1184
1185 // reset -> Normal TX output Signal
1186 outb(tmp & ~0x02, iobase+FIR_IRDA_CR);
1187 }
1188 else /* speed <=1152000 */
1189 {
1190 // __
1191 // SD/MODE __| |__
1192 //
1193 // IRTX ________
1194 // T1 T2 T3
1195
1196 /* MIR 115200, 57600 */
1197 if (speed==1152000)
1198 {
1199 tmp |= 0xA0; //HDLC=1, 1.152Mbps=1
1200 }
1201 else
1202 {
1203 tmp &=~0x80; //HDLC 0.576Mbps
1204 tmp |= 0x20; //HDLC=1,
1205 }
1206
1207 tmp |= IRDA_CR_CRC; // CRC=1
1208
1209 switch_bank(iobase, BANK2);
1210 outb(tmp, iobase+FIR_IRDA_CR);
1211
1212 /* MIR 115200, 57600 */
1213
1214 //switch_bank(iobase, BANK2);
1215 // T1 -> SD/MODE:0 IRTX:0
1216 tmp &= ~0x09;
1217 tmp |= 0x02;
1218 outb(tmp, iobase+FIR_IRDA_CR);
1219 udelay(2);
1220
1221 // T2 -> SD/MODE:1 IRTX:0
1222 tmp &= ~0x01;
1223 tmp |= 0x0a;
1224 outb(tmp, iobase+FIR_IRDA_CR);
1225
1226 // T3 -> SD/MODE:0 IRTX:0
1227 tmp &= ~0x09;
1228 tmp |= 0x02;
1229 outb(tmp, iobase+FIR_IRDA_CR);
1230 udelay(2);
1231
1232 // reset -> Normal TX output Signal
1233 outb(tmp & ~0x02, iobase+FIR_IRDA_CR);
1234 }
1235 }
1236 else if (dongle_id == 1) /* HP HDSL-3600 */
1237 {
1238 switch(speed)
1239 {
1240 case 4000000:
1241 tmp &= ~IRDA_CR_HDLC; // HDLC=0
1242 break;
1243
1244 case 1152000:
1245 tmp |= 0xA0; // HDLC=1, 1.152Mbps=1
1246 break;
1247
1248 case 576000:
1249 tmp &=~0x80; // HDLC 0.576Mbps
1250 tmp |= 0x20; // HDLC=1,
1251 break;
1252 }
1253
1254 tmp |= IRDA_CR_CRC; // CRC=1
1255
1256 switch_bank(iobase, BANK2);
1257 outb(tmp, iobase+FIR_IRDA_CR);
1258 }
1259 else /* HP HDSL-1100 */
1260 {
1261 if(speed <= 115200) /* SIR */
1262 {
1263
1264 tmp &= ~IRDA_CR_FIR_SIN; // HP sin select = 0
1265
1266 switch_bank(iobase, BANK2);
1267 outb(tmp, iobase+FIR_IRDA_CR);
1268 }
1269 else /* MIR FIR */
1270 {
1271
1272 switch(speed)
1273 {
1274 case 4000000:
1275 tmp &= ~IRDA_CR_HDLC; // HDLC=0
1276 break;
1277
1278 case 1152000:
1279 tmp |= 0xA0; // HDLC=1, 1.152Mbps=1
1280 break;
1281
1282 case 576000:
1283 tmp &=~0x80; // HDLC 0.576Mbps
1284 tmp |= 0x20; // HDLC=1,
1285 break;
1286 }
1287
1288 tmp |= IRDA_CR_CRC; // CRC=1
1289 tmp |= IRDA_CR_FIR_SIN; // HP sin select = 1
1290
1291 switch_bank(iobase, BANK2);
1292 outb(tmp, iobase+FIR_IRDA_CR);
1293 }
1294 }
1295
1296 switch_bank(iobase, BANK0);
1297
a97a6f10 1298 IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 1299}
1300
1301/*
1302 * Function ali_ircc_sir_write (driver)
1303 *
1304 * Fill Tx FIFO with transmit data
1305 *
1306 */
1307static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len)
1308{
1309 int actual = 0;
1310
a97a6f10 1311 IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ );
1da177e4
LT		 1312
1313 /* Tx FIFO should be empty! */
1314 if (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) {
a97a6f10 1315 IRDA_DEBUG(0, "%s(), failed, fifo not empty!\n", __func__ );
1da177e4
LT		 1316 return 0;
1317 }
1318
1319 /* Fill FIFO with current frame */
1320 while ((fifo_size-- > 0) && (actual < len)) {
1321 /* Transmit next byte */
1322 outb(buf[actual], iobase+UART_TX);
1323
1324 actual++;
1325 }
1326
a97a6f10 1327 IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 1328 return actual;
1329}
1330
1331/*
1332 * Function ali_ircc_net_open (dev)
1333 *
1334 * Start the device
1335 *
1336 */
1337static int ali_ircc_net_open(struct net_device *dev)
1338{
1339 struct ali_ircc_cb *self;
1340 int iobase;
1341 char hwname[32];
1342
a97a6f10 1343 IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ );
1da177e4
LT		 1344
1345 IRDA_ASSERT(dev != NULL, return -1;);
1346
4cf1653a 1347 self = netdev_priv(dev);
1da177e4
LT		 1348
1349 IRDA_ASSERT(self != NULL, return 0;);
1350
1351 iobase = self->io.fir_base;
1352
1353 /* Request IRQ and install Interrupt Handler */
1354 if (request_irq(self->io.irq, ali_ircc_interrupt, 0, dev->name, dev))
1355 {
898b1d16
SO		 1356 IRDA_WARNING("%s, unable to allocate irq=%d\n",
1357 ALI_IRCC_DRIVER_NAME,
1da177e4
LT		 1358 self->io.irq);
1359 return -EAGAIN;
1360 }
1361
1362 /*
1363 * Always allocate the DMA channel after the IRQ, and clean up on
1364 * failure.
1365 */
1366 if (request_dma(self->io.dma, dev->name)) {
898b1d16
SO		 1367 IRDA_WARNING("%s, unable to allocate dma=%d\n",
1368 ALI_IRCC_DRIVER_NAME,
1da177e4
LT		 1369 self->io.dma);
1370 free_irq(self->io.irq, self);
1371 return -EAGAIN;
1372 }
1373
1374 /* Turn on interrups */
1375 outb(UART_IER_RDI , iobase+UART_IER);
1376
1377 /* Ready to play! */
1378 netif_start_queue(dev); //benjamin by irport
1379
1380 /* Give self a hardware name */
1381 sprintf(hwname, "ALI-FIR @ 0x%03x", self->io.fir_base);
1382
1383 /*
1384 * Open new IrLAP layer instance, now that everything should be
1385 * initialized properly
1386 */
1387 self->irlap = irlap_open(dev, &self->qos, hwname);
1388
a97a6f10 1389 IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 1390
1391 return 0;
1392}
1393
1394/*
1395 * Function ali_ircc_net_close (dev)
1396 *
1397 * Stop the device
1398 *
1399 */
1400static int ali_ircc_net_close(struct net_device *dev)
1401{
1402
1403 struct ali_ircc_cb *self;
1404 //int iobase;
1405
a97a6f10 1406 IRDA_DEBUG(4, "%s(), ---------------- Start ----------------\n", __func__ );
1da177e4
LT		 1407
1408 IRDA_ASSERT(dev != NULL, return -1;);
1409
4cf1653a 1410 self = netdev_priv(dev);
1da177e4
LT		 1411 IRDA_ASSERT(self != NULL, return 0;);
1412
1413 /* Stop device */
1414 netif_stop_queue(dev);
1415
1416 /* Stop and remove instance of IrLAP */
1417 if (self->irlap)
1418 irlap_close(self->irlap);
1419 self->irlap = NULL;
1420
1421 disable_dma(self->io.dma);
1422
1423 /* Disable interrupts */
1424 SetCOMInterrupts(self, FALSE);
1425
1426 free_irq(self->io.irq, dev);
1427 free_dma(self->io.dma);
1428
a97a6f10 1429 IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 1430
1431 return 0;
1432}
1433
1434/*
1435 * Function ali_ircc_fir_hard_xmit (skb, dev)
1436 *
1437 * Transmit the frame
1438 *
1439 */
6518bbb8
SH		 1440static netdev_tx_t ali_ircc_fir_hard_xmit(struct sk_buff *skb,
1441 struct net_device *dev)
1da177e4
LT		 1442{
1443 struct ali_ircc_cb *self;
1444 unsigned long flags;
1445 int iobase;
1446 __u32 speed;
1447 int mtt, diff;
1448
a97a6f10 1449 IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ );
1da177e4 1450
4cf1653a 1451 self = netdev_priv(dev);
1da177e4
LT		 1452 iobase = self->io.fir_base;
1453
1454 netif_stop_queue(dev);
1455
1456 /* Make sure tests *& speed change are atomic */
1457 spin_lock_irqsave(&self->lock, flags);
1458
1459 /* Note : you should make sure that speed changes are not going
1460 * to corrupt any outgoing frame. Look at nsc-ircc for the gory
1461 * details - Jean II */
1462
1463 /* Check if we need to change the speed */
1464 speed = irda_get_next_speed(skb);
1465 if ((speed != self->io.speed) && (speed != -1)) {
1466 /* Check for empty frame */
1467 if (!skb->len) {
1468 ali_ircc_change_speed(self, speed);
1469 dev->trans_start = jiffies;
1470 spin_unlock_irqrestore(&self->lock, flags);
1471 dev_kfree_skb(skb);
6ed10654 1472 return NETDEV_TX_OK;
1da177e4
LT		 1473 } else
1474 self->new_speed = speed;
1475 }
1476
1477 /* Register and copy this frame to DMA memory */
1478 self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1479 self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1480 self->tx_fifo.tail += skb->len;
1481
af049081 1482 dev->stats.tx_bytes += skb->len;
1da177e4 1483
d626f62b
ACM		 1484 skb_copy_from_linear_data(skb, self->tx_fifo.queue[self->tx_fifo.free].start,
1485 skb->len);
1da177e4
LT		 1486 self->tx_fifo.len++;
1487 self->tx_fifo.free++;
1488
1489 /* Start transmit only if there is currently no transmit going on */
1490 if (self->tx_fifo.len == 1)
1491 {
1492 /* Check if we must wait the min turn time or not */
1493 mtt = irda_get_mtt(skb);
1494
1495 if (mtt)
1496 {
1497 /* Check how much time we have used already */
1498 do_gettimeofday(&self->now);
1499
1500 diff = self->now.tv_usec - self->stamp.tv_usec;
1501 /* self->stamp is set from ali_ircc_dma_receive_complete() */
1502
a97a6f10 1503 IRDA_DEBUG(1, "%s(), ******* diff = %d ******* \n", __func__ , diff);
1da177e4
LT		 1504
1505 if (diff < 0)
1506 diff += 1000000;
1507
1508 /* Check if the mtt is larger than the time we have
1509 * already used by all the protocol processing
1510 */
1511 if (mtt > diff)
1512 {
1513 mtt -= diff;
1514
1515 /*
1516 * Use timer if delay larger than 1000 us, and
1517 * use udelay for smaller values which should
1518 * be acceptable
1519 */
1520 if (mtt > 500)
1521 {
1522 /* Adjust for timer resolution */
1523 mtt = (mtt+250) / 500; /* 4 discard, 5 get advanced, Let's round off */
1524
a97a6f10 1525 IRDA_DEBUG(1, "%s(), ************** mtt = %d ***********\n", __func__ , mtt);
1da177e4
LT		 1526
1527 /* Setup timer */
1528 if (mtt == 1) /* 500 us */
1529 {
1530 switch_bank(iobase, BANK1);
1531 outb(TIMER_IIR_500, iobase+FIR_TIMER_IIR);
1532 }
1533 else if (mtt == 2) /* 1 ms */
1534 {
1535 switch_bank(iobase, BANK1);
1536 outb(TIMER_IIR_1ms, iobase+FIR_TIMER_IIR);
1537 }
1538 else /* > 2ms -> 4ms */
1539 {
1540 switch_bank(iobase, BANK1);
1541 outb(TIMER_IIR_2ms, iobase+FIR_TIMER_IIR);
1542 }
1543
1544
1545 /* Start timer */
1546 outb(inb(iobase+FIR_CR) | CR_TIMER_EN, iobase+FIR_CR);
1547 self->io.direction = IO_XMIT;
1548
1549 /* Enable timer interrupt */
1550 self->ier = IER_TIMER;
1551 SetCOMInterrupts(self, TRUE);
1552
1553 /* Timer will take care of the rest */
1554 goto out;
1555 }
1556 else
1557 udelay(mtt);
1558 } // if (if (mtt > diff)
1559 }// if (mtt)
1560
1561 /* Enable EOM interrupt */
1562 self->ier = IER_EOM;
1563 SetCOMInterrupts(self, TRUE);
1564
1565 /* Transmit frame */
1566 ali_ircc_dma_xmit(self);
1567 } // if (self->tx_fifo.len == 1)
1568
1569 out:
1570
1571 /* Not busy transmitting anymore if window is not full */
1572 if (self->tx_fifo.free < MAX_TX_WINDOW)
1573 netif_wake_queue(self->netdev);
1574
1575 /* Restore bank register */
1576 switch_bank(iobase, BANK0);
1577
1578 dev->trans_start = jiffies;
1579 spin_unlock_irqrestore(&self->lock, flags);
1580 dev_kfree_skb(skb);
1581
a97a6f10 1582 IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ );
6ed10654 1583 return NETDEV_TX_OK;
1da177e4
LT		 1584}
1585
1586
1587static void ali_ircc_dma_xmit(struct ali_ircc_cb *self)
1588{
1589 int iobase, tmp;
1590 unsigned char FIFO_OPTI, Hi, Lo;
1591
1592
a97a6f10 1593 IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ );
1da177e4
LT		 1594
1595 iobase = self->io.fir_base;
1596
1597 /* FIFO threshold , this method comes from NDIS5 code */
1598
1599 if(self->tx_fifo.queue[self->tx_fifo.ptr].len < TX_FIFO_Threshold)
1600 FIFO_OPTI = self->tx_fifo.queue[self->tx_fifo.ptr].len-1;
1601 else
1602 FIFO_OPTI = TX_FIFO_Threshold;
1603
1604 /* Disable DMA */
1605 switch_bank(iobase, BANK1);
1606 outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR);
1607
1608 self->io.direction = IO_XMIT;
1609
1610 irda_setup_dma(self->io.dma,
1611 ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1612 self->tx_buff.head) + self->tx_buff_dma,
1613 self->tx_fifo.queue[self->tx_fifo.ptr].len,
1614 DMA_TX_MODE);
1615
1616 /* Reset Tx FIFO */
1617 switch_bank(iobase, BANK0);
1618 outb(LCR_A_FIFO_RESET, iobase+FIR_LCR_A);
1619
1620 /* Set Tx FIFO threshold */
1621 if (self->fifo_opti_buf!=FIFO_OPTI)
1622 {
1623 switch_bank(iobase, BANK1);
1624 outb(FIFO_OPTI, iobase+FIR_FIFO_TR) ;
1625 self->fifo_opti_buf=FIFO_OPTI;
1626 }
1627
1628 /* Set Tx DMA threshold */
1629 switch_bank(iobase, BANK1);
1630 outb(TX_DMA_Threshold, iobase+FIR_DMA_TR);
1631
1632 /* Set max Tx frame size */
1633 Hi = (self->tx_fifo.queue[self->tx_fifo.ptr].len >> 8) & 0x0f;
1634 Lo = self->tx_fifo.queue[self->tx_fifo.ptr].len & 0xff;
1635 switch_bank(iobase, BANK2);
1636 outb(Hi, iobase+FIR_TX_DSR_HI);
1637 outb(Lo, iobase+FIR_TX_DSR_LO);
1638
1639 /* Disable SIP , Disable Brick Wall (we don't support in TX mode), Change to TX mode */
1640 switch_bank(iobase, BANK0);
1641 tmp = inb(iobase+FIR_LCR_B);
1642 tmp &= ~0x20; // Disable SIP
1643 outb(((unsigned char)(tmp & 0x3f) | LCR_B_TX_MODE) & ~LCR_B_BW, iobase+FIR_LCR_B);
a97a6f10 1644 IRDA_DEBUG(1, "%s(), ******* Change to TX mode: FIR_LCR_B = 0x%x ******* \n", __func__ , inb(iobase+FIR_LCR_B));
1da177e4
LT		 1645
1646 outb(0, iobase+FIR_LSR);
1647
1648 /* Enable DMA and Burst Mode */
1649 switch_bank(iobase, BANK1);
1650 outb(inb(iobase+FIR_CR) | CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR);
1651
1652 switch_bank(iobase, BANK0);
1653
a97a6f10 1654 IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 1655}
1656
1657static int ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self)
1658{
1659 int iobase;
1660 int ret = TRUE;
1661
a97a6f10 1662 IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ );
1da177e4
LT		 1663
1664 iobase = self->io.fir_base;
1665
1666 /* Disable DMA */
1667 switch_bank(iobase, BANK1);
1668 outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR);
1669
1670 /* Check for underrun! */
1671 switch_bank(iobase, BANK0);
1672 if((inb(iobase+FIR_LSR) & LSR_FRAME_ABORT) == LSR_FRAME_ABORT)
1673
1674 {
a97a6f10 1675 IRDA_ERROR("%s(), ********* LSR_FRAME_ABORT *********\n", __func__);
af049081
SH		 1676 self->netdev->stats.tx_errors++;
1677 self->netdev->stats.tx_fifo_errors++;
1da177e4
LT		 1678 }
1679 else
1680 {
af049081 1681 self->netdev->stats.tx_packets++;
1da177e4
LT		 1682 }
1683
1684 /* Check if we need to change the speed */
1685 if (self->new_speed)
1686 {
1687 ali_ircc_change_speed(self, self->new_speed);
1688 self->new_speed = 0;
1689 }
1690
1691 /* Finished with this frame, so prepare for next */
1692 self->tx_fifo.ptr++;
1693 self->tx_fifo.len--;
1694
1695 /* Any frames to be sent back-to-back? */
1696 if (self->tx_fifo.len)
1697 {
1698 ali_ircc_dma_xmit(self);
1699
1700 /* Not finished yet! */
1701 ret = FALSE;
1702 }
1703 else
1704 { /* Reset Tx FIFO info */
1705 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1706 self->tx_fifo.tail = self->tx_buff.head;
1707 }
1708
1709 /* Make sure we have room for more frames */
1710 if (self->tx_fifo.free < MAX_TX_WINDOW) {
1711 /* Not busy transmitting anymore */
1712 /* Tell the network layer, that we can accept more frames */
1713 netif_wake_queue(self->netdev);
1714 }
1715
1716 switch_bank(iobase, BANK0);
1717
a97a6f10 1718 IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 1719 return ret;
1720}
1721
1722/*
1723 * Function ali_ircc_dma_receive (self)
1724 *
1725 * Get ready for receiving a frame. The device will initiate a DMA
1726 * if it starts to receive a frame.
1727 *
1728 */
1729static int ali_ircc_dma_receive(struct ali_ircc_cb *self)
1730{
1731 int iobase, tmp;
1732
a97a6f10 1733 IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ );
1da177e4
LT		 1734
1735 iobase = self->io.fir_base;
1736
1737 /* Reset Tx FIFO info */
1738 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1739 self->tx_fifo.tail = self->tx_buff.head;
1740
1741 /* Disable DMA */
1742 switch_bank(iobase, BANK1);
1743 outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR);
1744
1745 /* Reset Message Count */
1746 switch_bank(iobase, BANK0);
1747 outb(0x07, iobase+FIR_LSR);
1748
1749 self->rcvFramesOverflow = FALSE;
1750
1751 self->LineStatus = inb(iobase+FIR_LSR) ;
1752
1753 /* Reset Rx FIFO info */
1754 self->io.direction = IO_RECV;
1755 self->rx_buff.data = self->rx_buff.head;
1756
1757 /* Reset Rx FIFO */
1758 // switch_bank(iobase, BANK0);
1759 outb(LCR_A_FIFO_RESET, iobase+FIR_LCR_A);
1760
1761 self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1762 self->st_fifo.tail = self->st_fifo.head = 0;
1763
1764 irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1765 DMA_RX_MODE);
1766
1767 /* Set Receive Mode,Brick Wall */
1768 //switch_bank(iobase, BANK0);
1769 tmp = inb(iobase+FIR_LCR_B);
1770 outb((unsigned char)(tmp &0x3f) | LCR_B_RX_MODE | LCR_B_BW , iobase + FIR_LCR_B); // 2000/12/1 05:16PM
a97a6f10 1771 IRDA_DEBUG(1, "%s(), *** Change To RX mode: FIR_LCR_B = 0x%x *** \n", __func__ , inb(iobase+FIR_LCR_B));
1da177e4
LT		 1772
1773 /* Set Rx Threshold */
1774 switch_bank(iobase, BANK1);
1775 outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR);
1776 outb(RX_DMA_Threshold, iobase+FIR_DMA_TR);
1777
1778 /* Enable DMA and Burst Mode */
1779 // switch_bank(iobase, BANK1);
1780 outb(CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR);
1781
1782 switch_bank(iobase, BANK0);
a97a6f10 1783 IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 1784 return 0;
1785}
1786
1787static int ali_ircc_dma_receive_complete(struct ali_ircc_cb *self)
1788{
1789 struct st_fifo *st_fifo;
1790 struct sk_buff *skb;
1791 __u8 status, MessageCount;
1792 int len, i, iobase, val;
1793
a97a6f10 1794 IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ );
1da177e4
LT		 1795
1796 st_fifo = &self->st_fifo;
1797 iobase = self->io.fir_base;
1798
1799 switch_bank(iobase, BANK0);
1800 MessageCount = inb(iobase+ FIR_LSR)&0x07;
1801
1802 if (MessageCount > 0)
a97a6f10 1803 IRDA_DEBUG(0, "%s(), Messsage count = %d,\n", __func__ , MessageCount);
1da177e4
LT		 1804
1805 for (i=0; i<=MessageCount; i++)
1806 {
1807 /* Bank 0 */
1808 switch_bank(iobase, BANK0);
1809 status = inb(iobase+FIR_LSR);
1810
1811 switch_bank(iobase, BANK2);
1812 len = inb(iobase+FIR_RX_DSR_HI) & 0x0f;
1813 len = len << 8;
1814 len |= inb(iobase+FIR_RX_DSR_LO);
1815
a97a6f10
HH		 1816 IRDA_DEBUG(1, "%s(), RX Length = 0x%.2x,\n", __func__ , len);
1817 IRDA_DEBUG(1, "%s(), RX Status = 0x%.2x,\n", __func__ , status);
1da177e4
LT		 1818
1819 if (st_fifo->tail >= MAX_RX_WINDOW) {
a97a6f10 1820 IRDA_DEBUG(0, "%s(), window is full!\n", __func__ );
1da177e4
LT		 1821 continue;
1822 }
1823
1824 st_fifo->entries[st_fifo->tail].status = status;
1825 st_fifo->entries[st_fifo->tail].len = len;
1826 st_fifo->pending_bytes += len;
1827 st_fifo->tail++;
1828 st_fifo->len++;
1829 }
1830
1831 for (i=0; i<=MessageCount; i++)
1832 {
1833 /* Get first entry */
1834 status = st_fifo->entries[st_fifo->head].status;
1835 len = st_fifo->entries[st_fifo->head].len;
1836 st_fifo->pending_bytes -= len;
1837 st_fifo->head++;
1838 st_fifo->len--;
1839
1840 /* Check for errors */
1841 if ((status & 0xd8) || self->rcvFramesOverflow || (len==0))
1842 {
a97a6f10 1843 IRDA_DEBUG(0,"%s(), ************* RX Errors ************ \n", __func__ );
1da177e4
LT		 1844
1845 /* Skip frame */
af049081 1846 self->netdev->stats.rx_errors++;
1da177e4
LT		 1847
1848 self->rx_buff.data += len;
1849
1850 if (status & LSR_FIFO_UR)
1851 {
af049081 1852 self->netdev->stats.rx_frame_errors++;
a97a6f10 1853 IRDA_DEBUG(0,"%s(), ************* FIFO Errors ************ \n", __func__ );
1da177e4
LT		 1854 }
1855 if (status & LSR_FRAME_ERROR)
1856 {
af049081 1857 self->netdev->stats.rx_frame_errors++;
a97a6f10 1858 IRDA_DEBUG(0,"%s(), ************* FRAME Errors ************ \n", __func__ );
1da177e4
LT		 1859 }
1860
1861 if (status & LSR_CRC_ERROR)
1862 {
af049081 1863 self->netdev->stats.rx_crc_errors++;
a97a6f10 1864 IRDA_DEBUG(0,"%s(), ************* CRC Errors ************ \n", __func__ );
1da177e4
LT		 1865 }
1866
1867 if(self->rcvFramesOverflow)
1868 {
af049081 1869 self->netdev->stats.rx_frame_errors++;
a97a6f10 1870 IRDA_DEBUG(0,"%s(), ************* Overran DMA buffer ************ \n", __func__ );
1da177e4
LT		 1871 }
1872 if(len == 0)
1873 {
af049081 1874 self->netdev->stats.rx_frame_errors++;
a97a6f10 1875 IRDA_DEBUG(0,"%s(), ********** Receive Frame Size = 0 ********* \n", __func__ );
1da177e4
LT		 1876 }
1877 }
1878 else
1879 {
1880
1881 if (st_fifo->pending_bytes < 32)
1882 {
1883 switch_bank(iobase, BANK0);
1884 val = inb(iobase+FIR_BSR);
1885 if ((val& BSR_FIFO_NOT_EMPTY)== 0x80)
1886 {
a97a6f10 1887 IRDA_DEBUG(0, "%s(), ************* BSR_FIFO_NOT_EMPTY ************ \n", __func__ );
1da177e4
LT		 1888
1889 /* Put this entry back in fifo */
1890 st_fifo->head--;
1891 st_fifo->len++;
1892 st_fifo->pending_bytes += len;
1893 st_fifo->entries[st_fifo->head].status = status;
1894 st_fifo->entries[st_fifo->head].len = len;
1895
1896 /*
1897 * DMA not finished yet, so try again
1898 * later, set timer value, resolution
1899 * 500 us
1900 */
1901
1902 switch_bank(iobase, BANK1);
1903 outb(TIMER_IIR_500, iobase+FIR_TIMER_IIR); // 2001/1/2 05:07PM
1904
1905 /* Enable Timer */
1906 outb(inb(iobase+FIR_CR) | CR_TIMER_EN, iobase+FIR_CR);
1907
1908 return FALSE; /* I'll be back! */
1909 }
1910 }
1911
1912 /*
1913 * Remember the time we received this frame, so we can
1914 * reduce the min turn time a bit since we will know
1915 * how much time we have used for protocol processing
1916 */
1917 do_gettimeofday(&self->stamp);
1918
1919 skb = dev_alloc_skb(len+1);
1920 if (skb == NULL)
1921 {
1922 IRDA_WARNING("%s(), memory squeeze, "
1923 "dropping frame.\n",
a97a6f10 1924 __func__);
af049081 1925 self->netdev->stats.rx_dropped++;
1da177e4
LT		 1926
1927 return FALSE;
1928 }
1929
1930 /* Make sure IP header gets aligned */
1931 skb_reserve(skb, 1);
1932
1933 /* Copy frame without CRC, CRC is removed by hardware*/
1934 skb_put(skb, len);
27d7ff46 1935 skb_copy_to_linear_data(skb, self->rx_buff.data, len);
1da177e4
LT		 1936
1937 /* Move to next frame */
1938 self->rx_buff.data += len;
af049081
SH		 1939 self->netdev->stats.rx_bytes += len;
1940 self->netdev->stats.rx_packets++;
1da177e4
LT		 1941
1942 skb->dev = self->netdev;
459a98ed 1943 skb_reset_mac_header(skb);
1da177e4
LT		 1944 skb->protocol = htons(ETH_P_IRDA);
1945 netif_rx(skb);
1da177e4
LT		 1946 }
1947 }
1948
1949 switch_bank(iobase, BANK0);
1950
a97a6f10 1951 IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 1952 return TRUE;
1953}
1954
1955
1956
1957/*
1958 * Function ali_ircc_sir_hard_xmit (skb, dev)
1959 *
1960 * Transmit the frame!
1961 *
1962 */
6518bbb8
SH		 1963static netdev_tx_t ali_ircc_sir_hard_xmit(struct sk_buff *skb,
1964 struct net_device *dev)
1da177e4
LT		 1965{
1966 struct ali_ircc_cb *self;
1967 unsigned long flags;
1968 int iobase;
1969 __u32 speed;
1970
a97a6f10 1971 IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ );
1da177e4 1972
ec634fe3 1973 IRDA_ASSERT(dev != NULL, return NETDEV_TX_OK;);
1da177e4 1974
4cf1653a 1975 self = netdev_priv(dev);
ec634fe3 1976 IRDA_ASSERT(self != NULL, return NETDEV_TX_OK;);
1da177e4
LT		 1977
1978 iobase = self->io.sir_base;
1979
1980 netif_stop_queue(dev);
1981
1982 /* Make sure tests *& speed change are atomic */
1983 spin_lock_irqsave(&self->lock, flags);
1984
1985 /* Note : you should make sure that speed changes are not going
1986 * to corrupt any outgoing frame. Look at nsc-ircc for the gory
1987 * details - Jean II */
1988
1989 /* Check if we need to change the speed */
1990 speed = irda_get_next_speed(skb);
1991 if ((speed != self->io.speed) && (speed != -1)) {
1992 /* Check for empty frame */
1993 if (!skb->len) {
1994 ali_ircc_change_speed(self, speed);
1995 dev->trans_start = jiffies;
1996 spin_unlock_irqrestore(&self->lock, flags);
1997 dev_kfree_skb(skb);
6ed10654 1998 return NETDEV_TX_OK;
1da177e4
LT		 1999 } else
2000 self->new_speed = speed;
2001 }
2002
2003 /* Init tx buffer */
2004 self->tx_buff.data = self->tx_buff.head;
2005
2006 /* Copy skb to tx_buff while wrapping, stuffing and making CRC */
2007 self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data,
2008 self->tx_buff.truesize);
2009
af049081 2010 self->netdev->stats.tx_bytes += self->tx_buff.len;
1da177e4
LT		 2011
2012 /* Turn on transmit finished interrupt. Will fire immediately! */
2013 outb(UART_IER_THRI, iobase+UART_IER);
2014
2015 dev->trans_start = jiffies;
2016 spin_unlock_irqrestore(&self->lock, flags);
2017
2018 dev_kfree_skb(skb);
2019
a97a6f10 2020 IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4 2021
6ed10654 2022 return NETDEV_TX_OK;
1da177e4
LT		 2023}
2024
2025
2026/*
2027 * Function ali_ircc_net_ioctl (dev, rq, cmd)
2028 *
2029 * Process IOCTL commands for this device
2030 *
2031 */
2032static int ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
2033{
2034 struct if_irda_req *irq = (struct if_irda_req *) rq;
2035 struct ali_ircc_cb *self;
2036 unsigned long flags;
2037 int ret = 0;
2038
a97a6f10 2039 IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ );
1da177e4
LT		 2040
2041 IRDA_ASSERT(dev != NULL, return -1;);
2042
4cf1653a 2043 self = netdev_priv(dev);
1da177e4
LT		 2044
2045 IRDA_ASSERT(self != NULL, return -1;);
2046
a97a6f10 2047 IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __func__ , dev->name, cmd);
1da177e4
LT		 2048
2049 switch (cmd) {
2050 case SIOCSBANDWIDTH: /* Set bandwidth */
a97a6f10 2051 IRDA_DEBUG(1, "%s(), SIOCSBANDWIDTH\n", __func__ );
1da177e4
LT		 2052 /*
2053 * This function will also be used by IrLAP to change the
2054 * speed, so we still must allow for speed change within
2055 * interrupt context.
2056 */
2057 if (!in_interrupt() && !capable(CAP_NET_ADMIN))
2058 return -EPERM;
2059
2060 spin_lock_irqsave(&self->lock, flags);
2061 ali_ircc_change_speed(self, irq->ifr_baudrate);
2062 spin_unlock_irqrestore(&self->lock, flags);
2063 break;
2064 case SIOCSMEDIABUSY: /* Set media busy */
a97a6f10 2065 IRDA_DEBUG(1, "%s(), SIOCSMEDIABUSY\n", __func__ );
1da177e4
LT		 2066 if (!capable(CAP_NET_ADMIN))
2067 return -EPERM;
2068 irda_device_set_media_busy(self->netdev, TRUE);
2069 break;
2070 case SIOCGRECEIVING: /* Check if we are receiving right now */
a97a6f10 2071 IRDA_DEBUG(2, "%s(), SIOCGRECEIVING\n", __func__ );
1da177e4
LT		 2072 /* This is protected */
2073 irq->ifr_receiving = ali_ircc_is_receiving(self);
2074 break;
2075 default:
2076 ret = -EOPNOTSUPP;
2077 }
2078
a97a6f10 2079 IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 2080
2081 return ret;
2082}
2083
2084/*
2085 * Function ali_ircc_is_receiving (self)
2086 *
2087 * Return TRUE is we are currently receiving a frame
2088 *
2089 */
2090static int ali_ircc_is_receiving(struct ali_ircc_cb *self)
2091{
2092 unsigned long flags;
2093 int status = FALSE;
2094 int iobase;
2095
a97a6f10 2096 IRDA_DEBUG(2, "%s(), ---------------- Start -----------------\n", __func__ );
1da177e4
LT		 2097
2098 IRDA_ASSERT(self != NULL, return FALSE;);
2099
2100 spin_lock_irqsave(&self->lock, flags);
2101
2102 if (self->io.speed > 115200)
2103 {
2104 iobase = self->io.fir_base;
2105
2106 switch_bank(iobase, BANK1);
2107 if((inb(iobase+FIR_FIFO_FR) & 0x3f) != 0)
2108 {
2109 /* We are receiving something */
a97a6f10 2110 IRDA_DEBUG(1, "%s(), We are receiving something\n", __func__ );
1da177e4
LT		 2111 status = TRUE;
2112 }
2113 switch_bank(iobase, BANK0);
2114 }
2115 else
2116 {
2117 status = (self->rx_buff.state != OUTSIDE_FRAME);
2118 }
2119
2120 spin_unlock_irqrestore(&self->lock, flags);
2121
a97a6f10 2122 IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 2123
2124 return status;
2125}
2126
898b1d16 2127static int ali_ircc_suspend(struct platform_device *dev, pm_message_t state)
1da177e4 2128{
898b1d16 2129 struct ali_ircc_cb *self = platform_get_drvdata(dev);
1da177e4 2130
898b1d16 2131 IRDA_MESSAGE("%s, Suspending\n", ALI_IRCC_DRIVER_NAME);
1da177e4
LT		 2132
2133 if (self->io.suspended)
898b1d16 2134 return 0;
1da177e4
LT		 2135
2136 ali_ircc_net_close(self->netdev);
2137
2138 self->io.suspended = 1;
2139
898b1d16 2140 return 0;
1da177e4
LT		 2141}
2142
898b1d16 2143static int ali_ircc_resume(struct platform_device *dev)
1da177e4 2144{
898b1d16 2145 struct ali_ircc_cb *self = platform_get_drvdata(dev);
1da177e4
LT		 2146
2147 if (!self->io.suspended)
898b1d16 2148 return 0;
1da177e4
LT		 2149
2150 ali_ircc_net_open(self->netdev);
2151
898b1d16 2152 IRDA_MESSAGE("%s, Waking up\n", ALI_IRCC_DRIVER_NAME);
1da177e4
LT		 2153
2154 self->io.suspended = 0;
1da177e4 2155
1da177e4
LT		 2156 return 0;
2157}
2158
1da177e4
LT		 2159/* ALi Chip Function */
2160
2161static void SetCOMInterrupts(struct ali_ircc_cb *self , unsigned char enable)
2162{
2163
2164 unsigned char newMask;
2165
2166 int iobase = self->io.fir_base; /* or sir_base */
2167
a97a6f10 2168 IRDA_DEBUG(2, "%s(), -------- Start -------- ( Enable = %d )\n", __func__ , enable);
1da177e4
LT		 2169
2170 /* Enable the interrupt which we wish to */
2171 if (enable){
2172 if (self->io.direction == IO_XMIT)
2173 {
2174 if (self->io.speed > 115200) /* FIR, MIR */
2175 {
2176 newMask = self->ier;
2177 }
2178 else /* SIR */
2179 {
2180 newMask = UART_IER_THRI | UART_IER_RDI;
2181 }
2182 }
2183 else {
2184 if (self->io.speed > 115200) /* FIR, MIR */
2185 {
2186 newMask = self->ier;
2187 }
2188 else /* SIR */
2189 {
2190 newMask = UART_IER_RDI;
2191 }
2192 }
2193 }
2194 else /* Disable all the interrupts */
2195 {
2196 newMask = 0x00;
2197
2198 }
2199
2200 //SIR and FIR has different registers
2201 if (self->io.speed > 115200)
2202 {
2203 switch_bank(iobase, BANK0);
2204 outb(newMask, iobase+FIR_IER);
2205 }
2206 else
2207 outb(newMask, iobase+UART_IER);
2208
a97a6f10 2209 IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 2210}
2211
2212static void SIR2FIR(int iobase)
2213{
2214 //unsigned char tmp;
2215
a97a6f10 2216 IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ );
1da177e4
LT		 2217
2218 /* Already protected (change_speed() or setup()), no need to lock.
2219 * Jean II */
2220
2221 outb(0x28, iobase+UART_MCR);
2222 outb(0x68, iobase+UART_MCR);
2223 outb(0x88, iobase+UART_MCR);
2224
2225 outb(0x60, iobase+FIR_MCR); /* Master Reset */
2226 outb(0x20, iobase+FIR_MCR); /* Master Interrupt Enable */
2227
2228 //tmp = inb(iobase+FIR_LCR_B); /* SIP enable */
2229 //tmp |= 0x20;
2230 //outb(tmp, iobase+FIR_LCR_B);
2231
a97a6f10 2232 IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 2233}
2234
2235static void FIR2SIR(int iobase)
2236{
2237 unsigned char val;
2238
a97a6f10 2239 IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ );
1da177e4
LT		 2240
2241 /* Already protected (change_speed() or setup()), no need to lock.
2242 * Jean II */
2243
2244 outb(0x20, iobase+FIR_MCR); /* IRQ to low */
2245 outb(0x00, iobase+UART_IER);
2246
2247 outb(0xA0, iobase+FIR_MCR); /* Don't set master reset */
2248 outb(0x00, iobase+UART_FCR);
2249 outb(0x07, iobase+UART_FCR);
2250
2251 val = inb(iobase+UART_RX);
2252 val = inb(iobase+UART_LSR);
2253 val = inb(iobase+UART_MSR);
2254
a97a6f10 2255 IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ );
1da177e4
LT		 2256}
2257
2258MODULE_AUTHOR("Benjamin Kong <benjamin_kong@ali.com.tw>");
2259MODULE_DESCRIPTION("ALi FIR Controller Driver");
2260MODULE_LICENSE("GPL");
72abb461 2261MODULE_ALIAS("platform:" ALI_IRCC_DRIVER_NAME);
1da177e4
LT		 2262
2263
2264module_param_array(io, int, NULL, 0);
2265MODULE_PARM_DESC(io, "Base I/O addresses");
2266module_param_array(irq, int, NULL, 0);
2267MODULE_PARM_DESC(irq, "IRQ lines");
2268module_param_array(dma, int, NULL, 0);
2269MODULE_PARM_DESC(dma, "DMA channels");
2270
2271module_init(ali_ircc_init);
2272module_exit(ali_ircc_cleanup);
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