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1da177e4 LT |
1 | /********************************************************************* |
2 | * | |
3 | * Filename: ali-ircc.h | |
4 | * Version: 0.5 | |
5 | * Description: Driver for the ALI M1535D and M1543C FIR Controller | |
6 | * Status: Experimental. | |
7 | * Author: Benjamin Kong <benjamin_kong@ali.com.tw> | |
8 | * Created at: 2000/10/16 03:46PM | |
9 | * Modified at: 2001/1/3 02:55PM | |
10 | * Modified by: Benjamin Kong <benjamin_kong@ali.com.tw> | |
11 | * Modified at: 2003/11/6 and support for ALi south-bridge chipsets M1563 | |
12 | * Modified by: Clear Zhang <clear_zhang@ali.com.tw> | |
13 | * | |
14 | * Copyright (c) 2000 Benjamin Kong <benjamin_kong@ali.com.tw> | |
15 | * All Rights Reserved | |
16 | * | |
17 | * This program is free software; you can redistribute it and/or | |
18 | * modify it under the terms of the GNU General Public License as | |
19 | * published by the Free Software Foundation; either version 2 of | |
20 | * the License, or (at your option) any later version. | |
21 | * | |
22 | ********************************************************************/ | |
23 | ||
24 | #include <linux/module.h> | |
25 | ||
26 | #include <linux/kernel.h> | |
27 | #include <linux/types.h> | |
28 | #include <linux/skbuff.h> | |
29 | #include <linux/netdevice.h> | |
30 | #include <linux/ioport.h> | |
31 | #include <linux/delay.h> | |
32 | #include <linux/slab.h> | |
33 | #include <linux/init.h> | |
34 | #include <linux/rtnetlink.h> | |
35 | #include <linux/serial_reg.h> | |
36 | #include <linux/dma-mapping.h> | |
898b1d16 | 37 | #include <linux/platform_device.h> |
1da177e4 LT |
38 | |
39 | #include <asm/io.h> | |
40 | #include <asm/dma.h> | |
41 | #include <asm/byteorder.h> | |
42 | ||
1da177e4 LT |
43 | #include <net/irda/wrapper.h> |
44 | #include <net/irda/irda.h> | |
45 | #include <net/irda/irda_device.h> | |
46 | ||
47 | #include "ali-ircc.h" | |
48 | ||
49 | #define CHIP_IO_EXTENT 8 | |
50 | #define BROKEN_DONGLE_ID | |
51 | ||
898b1d16 SO |
52 | #define ALI_IRCC_DRIVER_NAME "ali-ircc" |
53 | ||
54 | /* Power Management */ | |
55 | static int ali_ircc_suspend(struct platform_device *dev, pm_message_t state); | |
56 | static int ali_ircc_resume(struct platform_device *dev); | |
57 | ||
58 | static struct platform_driver ali_ircc_driver = { | |
59 | .suspend = ali_ircc_suspend, | |
60 | .resume = ali_ircc_resume, | |
61 | .driver = { | |
62 | .name = ALI_IRCC_DRIVER_NAME, | |
72abb461 | 63 | .owner = THIS_MODULE, |
898b1d16 SO |
64 | }, |
65 | }; | |
1da177e4 LT |
66 | |
67 | /* Module parameters */ | |
68 | static int qos_mtt_bits = 0x07; /* 1 ms or more */ | |
69 | ||
70 | /* Use BIOS settions by default, but user may supply module parameters */ | |
71 | static unsigned int io[] = { ~0, ~0, ~0, ~0 }; | |
72 | static unsigned int irq[] = { 0, 0, 0, 0 }; | |
73 | static unsigned int dma[] = { 0, 0, 0, 0 }; | |
74 | ||
75 | static int ali_ircc_probe_53(ali_chip_t *chip, chipio_t *info); | |
76 | static int ali_ircc_init_43(ali_chip_t *chip, chipio_t *info); | |
77 | static int ali_ircc_init_53(ali_chip_t *chip, chipio_t *info); | |
78 | ||
79 | /* These are the currently known ALi sourth-bridge chipsets, the only one difference | |
80 | * is that M1543C doesn't support HP HDSL-3600 | |
81 | */ | |
82 | static ali_chip_t chips[] = | |
83 | { | |
84 | { "M1543", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x43, ali_ircc_probe_53, ali_ircc_init_43 }, | |
85 | { "M1535", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x53, ali_ircc_probe_53, ali_ircc_init_53 }, | |
86 | { "M1563", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x63, ali_ircc_probe_53, ali_ircc_init_53 }, | |
87 | { NULL } | |
88 | }; | |
89 | ||
90 | /* Max 4 instances for now */ | |
91 | static struct ali_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL }; | |
92 | ||
93 | /* Dongle Types */ | |
94 | static char *dongle_types[] = { | |
95 | "TFDS6000", | |
96 | "HP HSDL-3600", | |
97 | "HP HSDL-1100", | |
98 | "No dongle connected", | |
99 | }; | |
100 | ||
101 | /* Some prototypes */ | |
102 | static int ali_ircc_open(int i, chipio_t *info); | |
103 | ||
104 | static int ali_ircc_close(struct ali_ircc_cb *self); | |
105 | ||
106 | static int ali_ircc_setup(chipio_t *info); | |
107 | static int ali_ircc_is_receiving(struct ali_ircc_cb *self); | |
108 | static int ali_ircc_net_open(struct net_device *dev); | |
109 | static int ali_ircc_net_close(struct net_device *dev); | |
110 | static int ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | |
1da177e4 | 111 | static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud); |
1da177e4 LT |
112 | static struct net_device_stats *ali_ircc_net_get_stats(struct net_device *dev); |
113 | ||
114 | /* SIR function */ | |
115 | static int ali_ircc_sir_hard_xmit(struct sk_buff *skb, struct net_device *dev); | |
116 | static irqreturn_t ali_ircc_sir_interrupt(struct ali_ircc_cb *self); | |
117 | static void ali_ircc_sir_receive(struct ali_ircc_cb *self); | |
118 | static void ali_ircc_sir_write_wakeup(struct ali_ircc_cb *self); | |
119 | static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len); | |
120 | static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed); | |
121 | ||
122 | /* FIR function */ | |
123 | static int ali_ircc_fir_hard_xmit(struct sk_buff *skb, struct net_device *dev); | |
124 | static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 speed); | |
125 | static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self); | |
126 | static int ali_ircc_dma_receive(struct ali_ircc_cb *self); | |
127 | static int ali_ircc_dma_receive_complete(struct ali_ircc_cb *self); | |
128 | static int ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self); | |
129 | static void ali_ircc_dma_xmit(struct ali_ircc_cb *self); | |
130 | ||
131 | /* My Function */ | |
132 | static int ali_ircc_read_dongle_id (int i, chipio_t *info); | |
133 | static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed); | |
134 | ||
135 | /* ALi chip function */ | |
136 | static void SIR2FIR(int iobase); | |
137 | static void FIR2SIR(int iobase); | |
138 | static void SetCOMInterrupts(struct ali_ircc_cb *self , unsigned char enable); | |
139 | ||
140 | /* | |
141 | * Function ali_ircc_init () | |
142 | * | |
143 | * Initialize chip. Find out whay kinds of chips we are dealing with | |
144 | * and their configuation registers address | |
145 | */ | |
146 | static int __init ali_ircc_init(void) | |
147 | { | |
148 | ali_chip_t *chip; | |
149 | chipio_t info; | |
9c6c6795 | 150 | int ret; |
1da177e4 LT |
151 | int cfg, cfg_base; |
152 | int reg, revision; | |
153 | int i = 0; | |
154 | ||
a97a6f10 | 155 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
898b1d16 SO |
156 | |
157 | ret = platform_driver_register(&ali_ircc_driver); | |
158 | if (ret) { | |
159 | IRDA_ERROR("%s, Can't register driver!\n", | |
160 | ALI_IRCC_DRIVER_NAME); | |
161 | return ret; | |
162 | } | |
163 | ||
9c6c6795 | 164 | ret = -ENODEV; |
1da177e4 LT |
165 | |
166 | /* Probe for all the ALi chipsets we know about */ | |
167 | for (chip= chips; chip->name; chip++, i++) | |
168 | { | |
a97a6f10 | 169 | IRDA_DEBUG(2, "%s(), Probing for %s ...\n", __func__, chip->name); |
1da177e4 LT |
170 | |
171 | /* Try all config registers for this chip */ | |
172 | for (cfg=0; cfg<2; cfg++) | |
173 | { | |
174 | cfg_base = chip->cfg[cfg]; | |
175 | if (!cfg_base) | |
176 | continue; | |
177 | ||
178 | memset(&info, 0, sizeof(chipio_t)); | |
179 | info.cfg_base = cfg_base; | |
180 | info.fir_base = io[i]; | |
181 | info.dma = dma[i]; | |
182 | info.irq = irq[i]; | |
183 | ||
184 | ||
185 | /* Enter Configuration */ | |
186 | outb(chip->entr1, cfg_base); | |
187 | outb(chip->entr2, cfg_base); | |
188 | ||
189 | /* Select Logical Device 5 Registers (UART2) */ | |
190 | outb(0x07, cfg_base); | |
191 | outb(0x05, cfg_base+1); | |
192 | ||
193 | /* Read Chip Identification Register */ | |
194 | outb(chip->cid_index, cfg_base); | |
195 | reg = inb(cfg_base+1); | |
196 | ||
197 | if (reg == chip->cid_value) | |
198 | { | |
a97a6f10 | 199 | IRDA_DEBUG(2, "%s(), Chip found at 0x%03x\n", __func__, cfg_base); |
1da177e4 LT |
200 | |
201 | outb(0x1F, cfg_base); | |
202 | revision = inb(cfg_base+1); | |
a97a6f10 | 203 | IRDA_DEBUG(2, "%s(), Found %s chip, revision=%d\n", __func__, |
1da177e4 LT |
204 | chip->name, revision); |
205 | ||
206 | /* | |
207 | * If the user supplies the base address, then | |
208 | * we init the chip, if not we probe the values | |
209 | * set by the BIOS | |
210 | */ | |
211 | if (io[i] < 2000) | |
212 | { | |
213 | chip->init(chip, &info); | |
214 | } | |
215 | else | |
216 | { | |
217 | chip->probe(chip, &info); | |
218 | } | |
219 | ||
220 | if (ali_ircc_open(i, &info) == 0) | |
221 | ret = 0; | |
222 | i++; | |
223 | } | |
224 | else | |
225 | { | |
a97a6f10 | 226 | IRDA_DEBUG(2, "%s(), No %s chip at 0x%03x\n", __func__, chip->name, cfg_base); |
1da177e4 LT |
227 | } |
228 | /* Exit configuration */ | |
229 | outb(0xbb, cfg_base); | |
230 | } | |
231 | } | |
232 | ||
a97a6f10 | 233 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
898b1d16 SO |
234 | |
235 | if (ret) | |
236 | platform_driver_unregister(&ali_ircc_driver); | |
237 | ||
1da177e4 LT |
238 | return ret; |
239 | } | |
240 | ||
241 | /* | |
242 | * Function ali_ircc_cleanup () | |
243 | * | |
244 | * Close all configured chips | |
245 | * | |
246 | */ | |
247 | static void __exit ali_ircc_cleanup(void) | |
248 | { | |
249 | int i; | |
250 | ||
a97a6f10 | 251 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 | 252 | |
9c3bd683 | 253 | for (i=0; i < ARRAY_SIZE(dev_self); i++) { |
1da177e4 LT |
254 | if (dev_self[i]) |
255 | ali_ircc_close(dev_self[i]); | |
256 | } | |
257 | ||
898b1d16 SO |
258 | platform_driver_unregister(&ali_ircc_driver); |
259 | ||
a97a6f10 | 260 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
1da177e4 LT |
261 | } |
262 | ||
263 | /* | |
264 | * Function ali_ircc_open (int i, chipio_t *inf) | |
265 | * | |
266 | * Open driver instance | |
267 | * | |
268 | */ | |
269 | static int ali_ircc_open(int i, chipio_t *info) | |
270 | { | |
271 | struct net_device *dev; | |
272 | struct ali_ircc_cb *self; | |
1da177e4 LT |
273 | int dongle_id; |
274 | int err; | |
275 | ||
a97a6f10 | 276 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
9c3bd683 BH |
277 | |
278 | if (i >= ARRAY_SIZE(dev_self)) { | |
279 | IRDA_ERROR("%s(), maximum number of supported chips reached!\n", | |
a97a6f10 | 280 | __func__); |
9c3bd683 BH |
281 | return -ENOMEM; |
282 | } | |
1da177e4 LT |
283 | |
284 | /* Set FIR FIFO and DMA Threshold */ | |
285 | if ((ali_ircc_setup(info)) == -1) | |
286 | return -1; | |
287 | ||
288 | dev = alloc_irdadev(sizeof(*self)); | |
289 | if (dev == NULL) { | |
290 | IRDA_ERROR("%s(), can't allocate memory for control block!\n", | |
a97a6f10 | 291 | __func__); |
1da177e4 LT |
292 | return -ENOMEM; |
293 | } | |
294 | ||
295 | self = dev->priv; | |
296 | self->netdev = dev; | |
297 | spin_lock_init(&self->lock); | |
298 | ||
299 | /* Need to store self somewhere */ | |
300 | dev_self[i] = self; | |
301 | self->index = i; | |
302 | ||
303 | /* Initialize IO */ | |
304 | self->io.cfg_base = info->cfg_base; /* In ali_ircc_probe_53 assign */ | |
305 | self->io.fir_base = info->fir_base; /* info->sir_base = info->fir_base */ | |
306 | self->io.sir_base = info->sir_base; /* ALi SIR and FIR use the same address */ | |
307 | self->io.irq = info->irq; | |
308 | self->io.fir_ext = CHIP_IO_EXTENT; | |
309 | self->io.dma = info->dma; | |
310 | self->io.fifo_size = 16; /* SIR: 16, FIR: 32 Benjamin 2000/11/1 */ | |
311 | ||
312 | /* Reserve the ioports that we need */ | |
898b1d16 SO |
313 | if (!request_region(self->io.fir_base, self->io.fir_ext, |
314 | ALI_IRCC_DRIVER_NAME)) { | |
a97a6f10 | 315 | IRDA_WARNING("%s(), can't get iobase of 0x%03x\n", __func__, |
1da177e4 LT |
316 | self->io.fir_base); |
317 | err = -ENODEV; | |
318 | goto err_out1; | |
319 | } | |
320 | ||
321 | /* Initialize QoS for this device */ | |
322 | irda_init_max_qos_capabilies(&self->qos); | |
323 | ||
324 | /* The only value we must override it the baudrate */ | |
325 | self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600| | |
326 | IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8); // benjamin 2000/11/8 05:27PM | |
327 | ||
328 | self->qos.min_turn_time.bits = qos_mtt_bits; | |
329 | ||
330 | irda_qos_bits_to_value(&self->qos); | |
331 | ||
332 | /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */ | |
333 | self->rx_buff.truesize = 14384; | |
334 | self->tx_buff.truesize = 14384; | |
335 | ||
336 | /* Allocate memory if needed */ | |
337 | self->rx_buff.head = | |
338 | dma_alloc_coherent(NULL, self->rx_buff.truesize, | |
339 | &self->rx_buff_dma, GFP_KERNEL); | |
340 | if (self->rx_buff.head == NULL) { | |
341 | err = -ENOMEM; | |
342 | goto err_out2; | |
343 | } | |
344 | memset(self->rx_buff.head, 0, self->rx_buff.truesize); | |
345 | ||
346 | self->tx_buff.head = | |
347 | dma_alloc_coherent(NULL, self->tx_buff.truesize, | |
348 | &self->tx_buff_dma, GFP_KERNEL); | |
349 | if (self->tx_buff.head == NULL) { | |
350 | err = -ENOMEM; | |
351 | goto err_out3; | |
352 | } | |
353 | memset(self->tx_buff.head, 0, self->tx_buff.truesize); | |
354 | ||
355 | self->rx_buff.in_frame = FALSE; | |
356 | self->rx_buff.state = OUTSIDE_FRAME; | |
357 | self->tx_buff.data = self->tx_buff.head; | |
358 | self->rx_buff.data = self->rx_buff.head; | |
359 | ||
360 | /* Reset Tx queue info */ | |
361 | self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0; | |
362 | self->tx_fifo.tail = self->tx_buff.head; | |
363 | ||
1da177e4 LT |
364 | /* Override the network functions we need to use */ |
365 | dev->hard_start_xmit = ali_ircc_sir_hard_xmit; | |
366 | dev->open = ali_ircc_net_open; | |
367 | dev->stop = ali_ircc_net_close; | |
368 | dev->do_ioctl = ali_ircc_net_ioctl; | |
369 | dev->get_stats = ali_ircc_net_get_stats; | |
370 | ||
371 | err = register_netdev(dev); | |
372 | if (err) { | |
a97a6f10 | 373 | IRDA_ERROR("%s(), register_netdev() failed!\n", __func__); |
1da177e4 LT |
374 | goto err_out4; |
375 | } | |
376 | IRDA_MESSAGE("IrDA: Registered device %s\n", dev->name); | |
377 | ||
378 | /* Check dongle id */ | |
379 | dongle_id = ali_ircc_read_dongle_id(i, info); | |
a97a6f10 | 380 | IRDA_MESSAGE("%s(), %s, Found dongle: %s\n", __func__, |
898b1d16 | 381 | ALI_IRCC_DRIVER_NAME, dongle_types[dongle_id]); |
1da177e4 LT |
382 | |
383 | self->io.dongle_id = dongle_id; | |
1da177e4 | 384 | |
a97a6f10 | 385 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
1da177e4 LT |
386 | |
387 | return 0; | |
388 | ||
389 | err_out4: | |
390 | dma_free_coherent(NULL, self->tx_buff.truesize, | |
391 | self->tx_buff.head, self->tx_buff_dma); | |
392 | err_out3: | |
393 | dma_free_coherent(NULL, self->rx_buff.truesize, | |
394 | self->rx_buff.head, self->rx_buff_dma); | |
395 | err_out2: | |
396 | release_region(self->io.fir_base, self->io.fir_ext); | |
397 | err_out1: | |
398 | dev_self[i] = NULL; | |
399 | free_netdev(dev); | |
400 | return err; | |
401 | } | |
402 | ||
403 | ||
404 | /* | |
405 | * Function ali_ircc_close (self) | |
406 | * | |
407 | * Close driver instance | |
408 | * | |
409 | */ | |
410 | static int __exit ali_ircc_close(struct ali_ircc_cb *self) | |
411 | { | |
412 | int iobase; | |
413 | ||
a97a6f10 | 414 | IRDA_DEBUG(4, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
415 | |
416 | IRDA_ASSERT(self != NULL, return -1;); | |
417 | ||
418 | iobase = self->io.fir_base; | |
419 | ||
420 | /* Remove netdevice */ | |
421 | unregister_netdev(self->netdev); | |
422 | ||
423 | /* Release the PORT that this driver is using */ | |
a97a6f10 | 424 | IRDA_DEBUG(4, "%s(), Releasing Region %03x\n", __func__, self->io.fir_base); |
1da177e4 LT |
425 | release_region(self->io.fir_base, self->io.fir_ext); |
426 | ||
427 | if (self->tx_buff.head) | |
428 | dma_free_coherent(NULL, self->tx_buff.truesize, | |
429 | self->tx_buff.head, self->tx_buff_dma); | |
430 | ||
431 | if (self->rx_buff.head) | |
432 | dma_free_coherent(NULL, self->rx_buff.truesize, | |
433 | self->rx_buff.head, self->rx_buff_dma); | |
434 | ||
435 | dev_self[self->index] = NULL; | |
436 | free_netdev(self->netdev); | |
437 | ||
a97a6f10 | 438 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
1da177e4 LT |
439 | |
440 | return 0; | |
441 | } | |
442 | ||
443 | /* | |
444 | * Function ali_ircc_init_43 (chip, info) | |
445 | * | |
446 | * Initialize the ALi M1543 chip. | |
447 | */ | |
448 | static int ali_ircc_init_43(ali_chip_t *chip, chipio_t *info) | |
449 | { | |
450 | /* All controller information like I/O address, DMA channel, IRQ | |
451 | * are set by BIOS | |
452 | */ | |
453 | ||
454 | return 0; | |
455 | } | |
456 | ||
457 | /* | |
458 | * Function ali_ircc_init_53 (chip, info) | |
459 | * | |
460 | * Initialize the ALi M1535 chip. | |
461 | */ | |
462 | static int ali_ircc_init_53(ali_chip_t *chip, chipio_t *info) | |
463 | { | |
464 | /* All controller information like I/O address, DMA channel, IRQ | |
465 | * are set by BIOS | |
466 | */ | |
467 | ||
468 | return 0; | |
469 | } | |
470 | ||
471 | /* | |
472 | * Function ali_ircc_probe_53 (chip, info) | |
473 | * | |
474 | * Probes for the ALi M1535D or M1535 | |
475 | */ | |
476 | static int ali_ircc_probe_53(ali_chip_t *chip, chipio_t *info) | |
477 | { | |
478 | int cfg_base = info->cfg_base; | |
479 | int hi, low, reg; | |
480 | ||
a97a6f10 | 481 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
482 | |
483 | /* Enter Configuration */ | |
484 | outb(chip->entr1, cfg_base); | |
485 | outb(chip->entr2, cfg_base); | |
486 | ||
487 | /* Select Logical Device 5 Registers (UART2) */ | |
488 | outb(0x07, cfg_base); | |
489 | outb(0x05, cfg_base+1); | |
490 | ||
491 | /* Read address control register */ | |
492 | outb(0x60, cfg_base); | |
493 | hi = inb(cfg_base+1); | |
494 | outb(0x61, cfg_base); | |
495 | low = inb(cfg_base+1); | |
496 | info->fir_base = (hi<<8) + low; | |
497 | ||
498 | info->sir_base = info->fir_base; | |
499 | ||
a97a6f10 | 500 | IRDA_DEBUG(2, "%s(), probing fir_base=0x%03x\n", __func__, info->fir_base); |
1da177e4 LT |
501 | |
502 | /* Read IRQ control register */ | |
503 | outb(0x70, cfg_base); | |
504 | reg = inb(cfg_base+1); | |
505 | info->irq = reg & 0x0f; | |
a97a6f10 | 506 | IRDA_DEBUG(2, "%s(), probing irq=%d\n", __func__, info->irq); |
1da177e4 LT |
507 | |
508 | /* Read DMA channel */ | |
509 | outb(0x74, cfg_base); | |
510 | reg = inb(cfg_base+1); | |
511 | info->dma = reg & 0x07; | |
512 | ||
513 | if(info->dma == 0x04) | |
a97a6f10 | 514 | IRDA_WARNING("%s(), No DMA channel assigned !\n", __func__); |
1da177e4 | 515 | else |
a97a6f10 | 516 | IRDA_DEBUG(2, "%s(), probing dma=%d\n", __func__, info->dma); |
1da177e4 LT |
517 | |
518 | /* Read Enabled Status */ | |
519 | outb(0x30, cfg_base); | |
520 | reg = inb(cfg_base+1); | |
521 | info->enabled = (reg & 0x80) && (reg & 0x01); | |
a97a6f10 | 522 | IRDA_DEBUG(2, "%s(), probing enabled=%d\n", __func__, info->enabled); |
1da177e4 LT |
523 | |
524 | /* Read Power Status */ | |
525 | outb(0x22, cfg_base); | |
526 | reg = inb(cfg_base+1); | |
527 | info->suspended = (reg & 0x20); | |
a97a6f10 | 528 | IRDA_DEBUG(2, "%s(), probing suspended=%d\n", __func__, info->suspended); |
1da177e4 LT |
529 | |
530 | /* Exit configuration */ | |
531 | outb(0xbb, cfg_base); | |
532 | ||
a97a6f10 | 533 | IRDA_DEBUG(2, "%s(), ----------------- End -----------------\n", __func__); |
1da177e4 LT |
534 | |
535 | return 0; | |
536 | } | |
537 | ||
538 | /* | |
539 | * Function ali_ircc_setup (info) | |
540 | * | |
541 | * Set FIR FIFO and DMA Threshold | |
542 | * Returns non-negative on success. | |
543 | * | |
544 | */ | |
545 | static int ali_ircc_setup(chipio_t *info) | |
546 | { | |
547 | unsigned char tmp; | |
548 | int version; | |
549 | int iobase = info->fir_base; | |
550 | ||
a97a6f10 | 551 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
552 | |
553 | /* Locking comments : | |
554 | * Most operations here need to be protected. We are called before | |
555 | * the device instance is created in ali_ircc_open(), therefore | |
556 | * nobody can bother us - Jean II */ | |
557 | ||
558 | /* Switch to FIR space */ | |
559 | SIR2FIR(iobase); | |
560 | ||
561 | /* Master Reset */ | |
562 | outb(0x40, iobase+FIR_MCR); // benjamin 2000/11/30 11:45AM | |
563 | ||
564 | /* Read FIR ID Version Register */ | |
565 | switch_bank(iobase, BANK3); | |
566 | version = inb(iobase+FIR_ID_VR); | |
567 | ||
568 | /* Should be 0x00 in the M1535/M1535D */ | |
569 | if(version != 0x00) | |
570 | { | |
898b1d16 SO |
571 | IRDA_ERROR("%s, Wrong chip version %02x\n", |
572 | ALI_IRCC_DRIVER_NAME, version); | |
1da177e4 LT |
573 | return -1; |
574 | } | |
575 | ||
1da177e4 LT |
576 | /* Set FIR FIFO Threshold Register */ |
577 | switch_bank(iobase, BANK1); | |
578 | outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR); | |
579 | ||
580 | /* Set FIR DMA Threshold Register */ | |
581 | outb(RX_DMA_Threshold, iobase+FIR_DMA_TR); | |
582 | ||
583 | /* CRC enable */ | |
584 | switch_bank(iobase, BANK2); | |
585 | outb(inb(iobase+FIR_IRDA_CR) | IRDA_CR_CRC, iobase+FIR_IRDA_CR); | |
586 | ||
587 | /* NDIS driver set TX Length here BANK2 Alias 3, Alias4*/ | |
588 | ||
589 | /* Switch to Bank 0 */ | |
590 | switch_bank(iobase, BANK0); | |
591 | ||
592 | tmp = inb(iobase+FIR_LCR_B); | |
593 | tmp &=~0x20; // disable SIP | |
594 | tmp |= 0x80; // these two steps make RX mode | |
595 | tmp &= 0xbf; | |
596 | outb(tmp, iobase+FIR_LCR_B); | |
597 | ||
598 | /* Disable Interrupt */ | |
599 | outb(0x00, iobase+FIR_IER); | |
600 | ||
601 | ||
602 | /* Switch to SIR space */ | |
603 | FIR2SIR(iobase); | |
604 | ||
898b1d16 SO |
605 | IRDA_MESSAGE("%s, driver loaded (Benjamin Kong)\n", |
606 | ALI_IRCC_DRIVER_NAME); | |
1da177e4 LT |
607 | |
608 | /* Enable receive interrupts */ | |
609 | // outb(UART_IER_RDI, iobase+UART_IER); //benjamin 2000/11/23 01:25PM | |
610 | // Turn on the interrupts in ali_ircc_net_open | |
611 | ||
a97a6f10 | 612 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__); |
1da177e4 LT |
613 | |
614 | return 0; | |
615 | } | |
616 | ||
617 | /* | |
618 | * Function ali_ircc_read_dongle_id (int index, info) | |
619 | * | |
620 | * Try to read dongle indentification. This procedure needs to be executed | |
621 | * once after power-on/reset. It also needs to be used whenever you suspect | |
622 | * that the user may have plugged/unplugged the IrDA Dongle. | |
623 | */ | |
624 | static int ali_ircc_read_dongle_id (int i, chipio_t *info) | |
625 | { | |
626 | int dongle_id, reg; | |
627 | int cfg_base = info->cfg_base; | |
628 | ||
a97a6f10 | 629 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
630 | |
631 | /* Enter Configuration */ | |
632 | outb(chips[i].entr1, cfg_base); | |
633 | outb(chips[i].entr2, cfg_base); | |
634 | ||
635 | /* Select Logical Device 5 Registers (UART2) */ | |
636 | outb(0x07, cfg_base); | |
637 | outb(0x05, cfg_base+1); | |
638 | ||
639 | /* Read Dongle ID */ | |
640 | outb(0xf0, cfg_base); | |
641 | reg = inb(cfg_base+1); | |
642 | dongle_id = ((reg>>6)&0x02) | ((reg>>5)&0x01); | |
a97a6f10 | 643 | IRDA_DEBUG(2, "%s(), probing dongle_id=%d, dongle_types=%s\n", __func__, |
1da177e4 LT |
644 | dongle_id, dongle_types[dongle_id]); |
645 | ||
646 | /* Exit configuration */ | |
647 | outb(0xbb, cfg_base); | |
648 | ||
a97a6f10 | 649 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__); |
1da177e4 LT |
650 | |
651 | return dongle_id; | |
652 | } | |
653 | ||
654 | /* | |
655 | * Function ali_ircc_interrupt (irq, dev_id, regs) | |
656 | * | |
657 | * An interrupt from the chip has arrived. Time to do some work | |
658 | * | |
659 | */ | |
7d12e780 | 660 | static irqreturn_t ali_ircc_interrupt(int irq, void *dev_id) |
1da177e4 | 661 | { |
c31f28e7 | 662 | struct net_device *dev = dev_id; |
1da177e4 LT |
663 | struct ali_ircc_cb *self; |
664 | int ret; | |
665 | ||
a97a6f10 | 666 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 | 667 | |
c31f28e7 | 668 | self = dev->priv; |
1da177e4 LT |
669 | |
670 | spin_lock(&self->lock); | |
671 | ||
672 | /* Dispatch interrupt handler for the current speed */ | |
673 | if (self->io.speed > 115200) | |
674 | ret = ali_ircc_fir_interrupt(self); | |
675 | else | |
676 | ret = ali_ircc_sir_interrupt(self); | |
677 | ||
678 | spin_unlock(&self->lock); | |
679 | ||
a97a6f10 | 680 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__); |
1da177e4 LT |
681 | return ret; |
682 | } | |
683 | /* | |
684 | * Function ali_ircc_fir_interrupt(irq, struct ali_ircc_cb *self) | |
685 | * | |
686 | * Handle MIR/FIR interrupt | |
687 | * | |
688 | */ | |
689 | static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self) | |
690 | { | |
691 | __u8 eir, OldMessageCount; | |
692 | int iobase, tmp; | |
693 | ||
a97a6f10 | 694 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
695 | |
696 | iobase = self->io.fir_base; | |
697 | ||
698 | switch_bank(iobase, BANK0); | |
699 | self->InterruptID = inb(iobase+FIR_IIR); | |
700 | self->BusStatus = inb(iobase+FIR_BSR); | |
701 | ||
702 | OldMessageCount = (self->LineStatus + 1) & 0x07; | |
703 | self->LineStatus = inb(iobase+FIR_LSR); | |
704 | //self->ier = inb(iobase+FIR_IER); 2000/12/1 04:32PM | |
705 | eir = self->InterruptID & self->ier; /* Mask out the interesting ones */ | |
706 | ||
a97a6f10 HH |
707 | IRDA_DEBUG(1, "%s(), self->InterruptID = %x\n", __func__,self->InterruptID); |
708 | IRDA_DEBUG(1, "%s(), self->LineStatus = %x\n", __func__,self->LineStatus); | |
709 | IRDA_DEBUG(1, "%s(), self->ier = %x\n", __func__,self->ier); | |
710 | IRDA_DEBUG(1, "%s(), eir = %x\n", __func__,eir); | |
1da177e4 LT |
711 | |
712 | /* Disable interrupts */ | |
713 | SetCOMInterrupts(self, FALSE); | |
714 | ||
715 | /* Tx or Rx Interrupt */ | |
716 | ||
717 | if (eir & IIR_EOM) | |
718 | { | |
719 | if (self->io.direction == IO_XMIT) /* TX */ | |
720 | { | |
a97a6f10 | 721 | IRDA_DEBUG(1, "%s(), ******* IIR_EOM (Tx) *******\n", __func__); |
1da177e4 LT |
722 | |
723 | if(ali_ircc_dma_xmit_complete(self)) | |
724 | { | |
725 | if (irda_device_txqueue_empty(self->netdev)) | |
726 | { | |
727 | /* Prepare for receive */ | |
728 | ali_ircc_dma_receive(self); | |
729 | self->ier = IER_EOM; | |
730 | } | |
731 | } | |
732 | else | |
733 | { | |
734 | self->ier = IER_EOM; | |
735 | } | |
736 | ||
737 | } | |
738 | else /* RX */ | |
739 | { | |
a97a6f10 | 740 | IRDA_DEBUG(1, "%s(), ******* IIR_EOM (Rx) *******\n", __func__); |
1da177e4 LT |
741 | |
742 | if(OldMessageCount > ((self->LineStatus+1) & 0x07)) | |
743 | { | |
744 | self->rcvFramesOverflow = TRUE; | |
a97a6f10 | 745 | IRDA_DEBUG(1, "%s(), ******* self->rcvFramesOverflow = TRUE ******** \n", __func__); |
1da177e4 LT |
746 | } |
747 | ||
748 | if (ali_ircc_dma_receive_complete(self)) | |
749 | { | |
a97a6f10 | 750 | IRDA_DEBUG(1, "%s(), ******* receive complete ******** \n", __func__); |
1da177e4 LT |
751 | |
752 | self->ier = IER_EOM; | |
753 | } | |
754 | else | |
755 | { | |
a97a6f10 | 756 | IRDA_DEBUG(1, "%s(), ******* Not receive complete ******** \n", __func__); |
1da177e4 LT |
757 | |
758 | self->ier = IER_EOM | IER_TIMER; | |
759 | } | |
760 | ||
761 | } | |
762 | } | |
763 | /* Timer Interrupt */ | |
764 | else if (eir & IIR_TIMER) | |
765 | { | |
766 | if(OldMessageCount > ((self->LineStatus+1) & 0x07)) | |
767 | { | |
768 | self->rcvFramesOverflow = TRUE; | |
a97a6f10 | 769 | IRDA_DEBUG(1, "%s(), ******* self->rcvFramesOverflow = TRUE ******* \n", __func__); |
1da177e4 LT |
770 | } |
771 | /* Disable Timer */ | |
772 | switch_bank(iobase, BANK1); | |
773 | tmp = inb(iobase+FIR_CR); | |
774 | outb( tmp& ~CR_TIMER_EN, iobase+FIR_CR); | |
775 | ||
776 | /* Check if this is a Tx timer interrupt */ | |
777 | if (self->io.direction == IO_XMIT) | |
778 | { | |
779 | ali_ircc_dma_xmit(self); | |
780 | ||
781 | /* Interrupt on EOM */ | |
782 | self->ier = IER_EOM; | |
783 | ||
784 | } | |
785 | else /* Rx */ | |
786 | { | |
787 | if(ali_ircc_dma_receive_complete(self)) | |
788 | { | |
789 | self->ier = IER_EOM; | |
790 | } | |
791 | else | |
792 | { | |
793 | self->ier = IER_EOM | IER_TIMER; | |
794 | } | |
795 | } | |
796 | } | |
797 | ||
798 | /* Restore Interrupt */ | |
799 | SetCOMInterrupts(self, TRUE); | |
800 | ||
a97a6f10 | 801 | IRDA_DEBUG(1, "%s(), ----------------- End ---------------\n", __func__); |
1da177e4 LT |
802 | return IRQ_RETVAL(eir); |
803 | } | |
804 | ||
805 | /* | |
806 | * Function ali_ircc_sir_interrupt (irq, self, eir) | |
807 | * | |
808 | * Handle SIR interrupt | |
809 | * | |
810 | */ | |
811 | static irqreturn_t ali_ircc_sir_interrupt(struct ali_ircc_cb *self) | |
812 | { | |
813 | int iobase; | |
814 | int iir, lsr; | |
815 | ||
a97a6f10 | 816 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
817 | |
818 | iobase = self->io.sir_base; | |
819 | ||
820 | iir = inb(iobase+UART_IIR) & UART_IIR_ID; | |
821 | if (iir) { | |
822 | /* Clear interrupt */ | |
823 | lsr = inb(iobase+UART_LSR); | |
824 | ||
a97a6f10 | 825 | IRDA_DEBUG(4, "%s(), iir=%02x, lsr=%02x, iobase=%#x\n", __func__, |
1da177e4 LT |
826 | iir, lsr, iobase); |
827 | ||
828 | switch (iir) | |
829 | { | |
830 | case UART_IIR_RLSI: | |
a97a6f10 | 831 | IRDA_DEBUG(2, "%s(), RLSI\n", __func__); |
1da177e4 LT |
832 | break; |
833 | case UART_IIR_RDI: | |
834 | /* Receive interrupt */ | |
835 | ali_ircc_sir_receive(self); | |
836 | break; | |
837 | case UART_IIR_THRI: | |
838 | if (lsr & UART_LSR_THRE) | |
839 | { | |
840 | /* Transmitter ready for data */ | |
841 | ali_ircc_sir_write_wakeup(self); | |
842 | } | |
843 | break; | |
844 | default: | |
a97a6f10 | 845 | IRDA_DEBUG(0, "%s(), unhandled IIR=%#x\n", __func__, iir); |
1da177e4 LT |
846 | break; |
847 | } | |
848 | ||
849 | } | |
850 | ||
851 | ||
a97a6f10 | 852 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__); |
1da177e4 LT |
853 | |
854 | return IRQ_RETVAL(iir); | |
855 | } | |
856 | ||
857 | ||
858 | /* | |
859 | * Function ali_ircc_sir_receive (self) | |
860 | * | |
861 | * Receive one frame from the infrared port | |
862 | * | |
863 | */ | |
864 | static void ali_ircc_sir_receive(struct ali_ircc_cb *self) | |
865 | { | |
866 | int boguscount = 0; | |
867 | int iobase; | |
868 | ||
a97a6f10 | 869 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__); |
1da177e4 LT |
870 | IRDA_ASSERT(self != NULL, return;); |
871 | ||
872 | iobase = self->io.sir_base; | |
873 | ||
874 | /* | |
875 | * Receive all characters in Rx FIFO, unwrap and unstuff them. | |
876 | * async_unwrap_char will deliver all found frames | |
877 | */ | |
878 | do { | |
879 | async_unwrap_char(self->netdev, &self->stats, &self->rx_buff, | |
880 | inb(iobase+UART_RX)); | |
881 | ||
882 | /* Make sure we don't stay here too long */ | |
883 | if (boguscount++ > 32) { | |
a97a6f10 | 884 | IRDA_DEBUG(2,"%s(), breaking!\n", __func__); |
1da177e4 LT |
885 | break; |
886 | } | |
887 | } while (inb(iobase+UART_LSR) & UART_LSR_DR); | |
888 | ||
a97a6f10 | 889 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
890 | } |
891 | ||
892 | /* | |
893 | * Function ali_ircc_sir_write_wakeup (tty) | |
894 | * | |
895 | * Called by the driver when there's room for more data. If we have | |
896 | * more packets to send, we send them here. | |
897 | * | |
898 | */ | |
899 | static void ali_ircc_sir_write_wakeup(struct ali_ircc_cb *self) | |
900 | { | |
901 | int actual = 0; | |
902 | int iobase; | |
903 | ||
904 | IRDA_ASSERT(self != NULL, return;); | |
905 | ||
a97a6f10 | 906 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
907 | |
908 | iobase = self->io.sir_base; | |
909 | ||
910 | /* Finished with frame? */ | |
911 | if (self->tx_buff.len > 0) | |
912 | { | |
913 | /* Write data left in transmit buffer */ | |
914 | actual = ali_ircc_sir_write(iobase, self->io.fifo_size, | |
915 | self->tx_buff.data, self->tx_buff.len); | |
916 | self->tx_buff.data += actual; | |
917 | self->tx_buff.len -= actual; | |
918 | } | |
919 | else | |
920 | { | |
921 | if (self->new_speed) | |
922 | { | |
923 | /* We must wait until all data are gone */ | |
924 | while(!(inb(iobase+UART_LSR) & UART_LSR_TEMT)) | |
a97a6f10 | 925 | IRDA_DEBUG(1, "%s(), UART_LSR_THRE\n", __func__ ); |
1da177e4 | 926 | |
a97a6f10 | 927 | IRDA_DEBUG(1, "%s(), Changing speed! self->new_speed = %d\n", __func__ , self->new_speed); |
1da177e4 LT |
928 | ali_ircc_change_speed(self, self->new_speed); |
929 | self->new_speed = 0; | |
930 | ||
931 | // benjamin 2000/11/10 06:32PM | |
932 | if (self->io.speed > 115200) | |
933 | { | |
a97a6f10 | 934 | IRDA_DEBUG(2, "%s(), ali_ircc_change_speed from UART_LSR_TEMT \n", __func__ ); |
1da177e4 LT |
935 | |
936 | self->ier = IER_EOM; | |
937 | // SetCOMInterrupts(self, TRUE); | |
938 | return; | |
939 | } | |
940 | } | |
941 | else | |
942 | { | |
943 | netif_wake_queue(self->netdev); | |
944 | } | |
945 | ||
946 | self->stats.tx_packets++; | |
947 | ||
948 | /* Turn on receive interrupts */ | |
949 | outb(UART_IER_RDI, iobase+UART_IER); | |
950 | } | |
951 | ||
a97a6f10 | 952 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
953 | } |
954 | ||
955 | static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud) | |
956 | { | |
957 | struct net_device *dev = self->netdev; | |
958 | int iobase; | |
959 | ||
a97a6f10 | 960 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 | 961 | |
a97a6f10 | 962 | IRDA_DEBUG(2, "%s(), setting speed = %d \n", __func__ , baud); |
1da177e4 LT |
963 | |
964 | /* This function *must* be called with irq off and spin-lock. | |
965 | * - Jean II */ | |
966 | ||
967 | iobase = self->io.fir_base; | |
968 | ||
969 | SetCOMInterrupts(self, FALSE); // 2000/11/24 11:43AM | |
970 | ||
971 | /* Go to MIR, FIR Speed */ | |
972 | if (baud > 115200) | |
973 | { | |
974 | ||
975 | ||
976 | ali_ircc_fir_change_speed(self, baud); | |
977 | ||
978 | /* Install FIR xmit handler*/ | |
979 | dev->hard_start_xmit = ali_ircc_fir_hard_xmit; | |
980 | ||
981 | /* Enable Interuupt */ | |
982 | self->ier = IER_EOM; // benjamin 2000/11/20 07:24PM | |
983 | ||
984 | /* Be ready for incomming frames */ | |
985 | ali_ircc_dma_receive(self); // benajmin 2000/11/8 07:46PM not complete | |
986 | } | |
987 | /* Go to SIR Speed */ | |
988 | else | |
989 | { | |
990 | ali_ircc_sir_change_speed(self, baud); | |
991 | ||
992 | /* Install SIR xmit handler*/ | |
993 | dev->hard_start_xmit = ali_ircc_sir_hard_xmit; | |
994 | } | |
995 | ||
996 | ||
997 | SetCOMInterrupts(self, TRUE); // 2000/11/24 11:43AM | |
998 | ||
999 | netif_wake_queue(self->netdev); | |
1000 | ||
a97a6f10 | 1001 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1002 | } |
1003 | ||
1004 | static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 baud) | |
1005 | { | |
1006 | ||
1007 | int iobase; | |
1008 | struct ali_ircc_cb *self = (struct ali_ircc_cb *) priv; | |
1009 | struct net_device *dev; | |
1010 | ||
a97a6f10 | 1011 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
1012 | |
1013 | IRDA_ASSERT(self != NULL, return;); | |
1014 | ||
1015 | dev = self->netdev; | |
1016 | iobase = self->io.fir_base; | |
1017 | ||
a97a6f10 | 1018 | IRDA_DEBUG(1, "%s(), self->io.speed = %d, change to speed = %d\n", __func__ ,self->io.speed,baud); |
1da177e4 LT |
1019 | |
1020 | /* Come from SIR speed */ | |
1021 | if(self->io.speed <=115200) | |
1022 | { | |
1023 | SIR2FIR(iobase); | |
1024 | } | |
1025 | ||
1026 | /* Update accounting for new speed */ | |
1027 | self->io.speed = baud; | |
1028 | ||
1029 | // Set Dongle Speed mode | |
1030 | ali_ircc_change_dongle_speed(self, baud); | |
1031 | ||
a97a6f10 | 1032 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1033 | } |
1034 | ||
1035 | /* | |
1036 | * Function ali_sir_change_speed (self, speed) | |
1037 | * | |
1038 | * Set speed of IrDA port to specified baudrate | |
1039 | * | |
1040 | */ | |
1041 | static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed) | |
1042 | { | |
1043 | struct ali_ircc_cb *self = (struct ali_ircc_cb *) priv; | |
1044 | unsigned long flags; | |
1045 | int iobase; | |
1046 | int fcr; /* FIFO control reg */ | |
1047 | int lcr; /* Line control reg */ | |
1048 | int divisor; | |
1049 | ||
a97a6f10 | 1050 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 | 1051 | |
a97a6f10 | 1052 | IRDA_DEBUG(1, "%s(), Setting speed to: %d\n", __func__ , speed); |
1da177e4 LT |
1053 | |
1054 | IRDA_ASSERT(self != NULL, return;); | |
1055 | ||
1056 | iobase = self->io.sir_base; | |
1057 | ||
1058 | /* Come from MIR or FIR speed */ | |
1059 | if(self->io.speed >115200) | |
1060 | { | |
1061 | // Set Dongle Speed mode first | |
1062 | ali_ircc_change_dongle_speed(self, speed); | |
1063 | ||
1064 | FIR2SIR(iobase); | |
1065 | } | |
1066 | ||
1067 | // Clear Line and Auxiluary status registers 2000/11/24 11:47AM | |
1068 | ||
1069 | inb(iobase+UART_LSR); | |
1070 | inb(iobase+UART_SCR); | |
1071 | ||
1072 | /* Update accounting for new speed */ | |
1073 | self->io.speed = speed; | |
1074 | ||
1075 | spin_lock_irqsave(&self->lock, flags); | |
1076 | ||
1077 | divisor = 115200/speed; | |
1078 | ||
1079 | fcr = UART_FCR_ENABLE_FIFO; | |
1080 | ||
1081 | /* | |
1082 | * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and | |
1083 | * almost 1,7 ms at 19200 bps. At speeds above that we can just forget | |
1084 | * about this timeout since it will always be fast enough. | |
1085 | */ | |
1086 | if (self->io.speed < 38400) | |
1087 | fcr |= UART_FCR_TRIGGER_1; | |
1088 | else | |
1089 | fcr |= UART_FCR_TRIGGER_14; | |
1090 | ||
1091 | /* IrDA ports use 8N1 */ | |
1092 | lcr = UART_LCR_WLEN8; | |
1093 | ||
1094 | outb(UART_LCR_DLAB | lcr, iobase+UART_LCR); /* Set DLAB */ | |
1095 | outb(divisor & 0xff, iobase+UART_DLL); /* Set speed */ | |
1096 | outb(divisor >> 8, iobase+UART_DLM); | |
1097 | outb(lcr, iobase+UART_LCR); /* Set 8N1 */ | |
1098 | outb(fcr, iobase+UART_FCR); /* Enable FIFO's */ | |
1099 | ||
1100 | /* without this, the conection will be broken after come back from FIR speed, | |
1101 | but with this, the SIR connection is harder to established */ | |
1102 | outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), iobase+UART_MCR); | |
1103 | ||
1104 | spin_unlock_irqrestore(&self->lock, flags); | |
1105 | ||
a97a6f10 | 1106 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1107 | } |
1108 | ||
1109 | static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed) | |
1110 | { | |
1111 | ||
1112 | struct ali_ircc_cb *self = (struct ali_ircc_cb *) priv; | |
1113 | int iobase,dongle_id; | |
1114 | int tmp = 0; | |
1115 | ||
a97a6f10 | 1116 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
1117 | |
1118 | iobase = self->io.fir_base; /* or iobase = self->io.sir_base; */ | |
1119 | dongle_id = self->io.dongle_id; | |
1120 | ||
1121 | /* We are already locked, no need to do it again */ | |
1122 | ||
a97a6f10 | 1123 | IRDA_DEBUG(1, "%s(), Set Speed for %s , Speed = %d\n", __func__ , dongle_types[dongle_id], speed); |
1da177e4 LT |
1124 | |
1125 | switch_bank(iobase, BANK2); | |
1126 | tmp = inb(iobase+FIR_IRDA_CR); | |
1127 | ||
1128 | /* IBM type dongle */ | |
1129 | if(dongle_id == 0) | |
1130 | { | |
1131 | if(speed == 4000000) | |
1132 | { | |
1133 | // __ __ | |
1134 | // SD/MODE __| |__ __ | |
1135 | // __ __ | |
1136 | // IRTX __ __| |__ | |
1137 | // T1 T2 T3 T4 T5 | |
1138 | ||
1139 | tmp &= ~IRDA_CR_HDLC; // HDLC=0 | |
1140 | tmp |= IRDA_CR_CRC; // CRC=1 | |
1141 | ||
1142 | switch_bank(iobase, BANK2); | |
1143 | outb(tmp, iobase+FIR_IRDA_CR); | |
1144 | ||
1145 | // T1 -> SD/MODE:0 IRTX:0 | |
1146 | tmp &= ~0x09; | |
1147 | tmp |= 0x02; | |
1148 | outb(tmp, iobase+FIR_IRDA_CR); | |
1149 | udelay(2); | |
1150 | ||
1151 | // T2 -> SD/MODE:1 IRTX:0 | |
1152 | tmp &= ~0x01; | |
1153 | tmp |= 0x0a; | |
1154 | outb(tmp, iobase+FIR_IRDA_CR); | |
1155 | udelay(2); | |
1156 | ||
1157 | // T3 -> SD/MODE:1 IRTX:1 | |
1158 | tmp |= 0x0b; | |
1159 | outb(tmp, iobase+FIR_IRDA_CR); | |
1160 | udelay(2); | |
1161 | ||
1162 | // T4 -> SD/MODE:0 IRTX:1 | |
1163 | tmp &= ~0x08; | |
1164 | tmp |= 0x03; | |
1165 | outb(tmp, iobase+FIR_IRDA_CR); | |
1166 | udelay(2); | |
1167 | ||
1168 | // T5 -> SD/MODE:0 IRTX:0 | |
1169 | tmp &= ~0x09; | |
1170 | tmp |= 0x02; | |
1171 | outb(tmp, iobase+FIR_IRDA_CR); | |
1172 | udelay(2); | |
1173 | ||
1174 | // reset -> Normal TX output Signal | |
1175 | outb(tmp & ~0x02, iobase+FIR_IRDA_CR); | |
1176 | } | |
1177 | else /* speed <=1152000 */ | |
1178 | { | |
1179 | // __ | |
1180 | // SD/MODE __| |__ | |
1181 | // | |
1182 | // IRTX ________ | |
1183 | // T1 T2 T3 | |
1184 | ||
1185 | /* MIR 115200, 57600 */ | |
1186 | if (speed==1152000) | |
1187 | { | |
1188 | tmp |= 0xA0; //HDLC=1, 1.152Mbps=1 | |
1189 | } | |
1190 | else | |
1191 | { | |
1192 | tmp &=~0x80; //HDLC 0.576Mbps | |
1193 | tmp |= 0x20; //HDLC=1, | |
1194 | } | |
1195 | ||
1196 | tmp |= IRDA_CR_CRC; // CRC=1 | |
1197 | ||
1198 | switch_bank(iobase, BANK2); | |
1199 | outb(tmp, iobase+FIR_IRDA_CR); | |
1200 | ||
1201 | /* MIR 115200, 57600 */ | |
1202 | ||
1203 | //switch_bank(iobase, BANK2); | |
1204 | // T1 -> SD/MODE:0 IRTX:0 | |
1205 | tmp &= ~0x09; | |
1206 | tmp |= 0x02; | |
1207 | outb(tmp, iobase+FIR_IRDA_CR); | |
1208 | udelay(2); | |
1209 | ||
1210 | // T2 -> SD/MODE:1 IRTX:0 | |
1211 | tmp &= ~0x01; | |
1212 | tmp |= 0x0a; | |
1213 | outb(tmp, iobase+FIR_IRDA_CR); | |
1214 | ||
1215 | // T3 -> SD/MODE:0 IRTX:0 | |
1216 | tmp &= ~0x09; | |
1217 | tmp |= 0x02; | |
1218 | outb(tmp, iobase+FIR_IRDA_CR); | |
1219 | udelay(2); | |
1220 | ||
1221 | // reset -> Normal TX output Signal | |
1222 | outb(tmp & ~0x02, iobase+FIR_IRDA_CR); | |
1223 | } | |
1224 | } | |
1225 | else if (dongle_id == 1) /* HP HDSL-3600 */ | |
1226 | { | |
1227 | switch(speed) | |
1228 | { | |
1229 | case 4000000: | |
1230 | tmp &= ~IRDA_CR_HDLC; // HDLC=0 | |
1231 | break; | |
1232 | ||
1233 | case 1152000: | |
1234 | tmp |= 0xA0; // HDLC=1, 1.152Mbps=1 | |
1235 | break; | |
1236 | ||
1237 | case 576000: | |
1238 | tmp &=~0x80; // HDLC 0.576Mbps | |
1239 | tmp |= 0x20; // HDLC=1, | |
1240 | break; | |
1241 | } | |
1242 | ||
1243 | tmp |= IRDA_CR_CRC; // CRC=1 | |
1244 | ||
1245 | switch_bank(iobase, BANK2); | |
1246 | outb(tmp, iobase+FIR_IRDA_CR); | |
1247 | } | |
1248 | else /* HP HDSL-1100 */ | |
1249 | { | |
1250 | if(speed <= 115200) /* SIR */ | |
1251 | { | |
1252 | ||
1253 | tmp &= ~IRDA_CR_FIR_SIN; // HP sin select = 0 | |
1254 | ||
1255 | switch_bank(iobase, BANK2); | |
1256 | outb(tmp, iobase+FIR_IRDA_CR); | |
1257 | } | |
1258 | else /* MIR FIR */ | |
1259 | { | |
1260 | ||
1261 | switch(speed) | |
1262 | { | |
1263 | case 4000000: | |
1264 | tmp &= ~IRDA_CR_HDLC; // HDLC=0 | |
1265 | break; | |
1266 | ||
1267 | case 1152000: | |
1268 | tmp |= 0xA0; // HDLC=1, 1.152Mbps=1 | |
1269 | break; | |
1270 | ||
1271 | case 576000: | |
1272 | tmp &=~0x80; // HDLC 0.576Mbps | |
1273 | tmp |= 0x20; // HDLC=1, | |
1274 | break; | |
1275 | } | |
1276 | ||
1277 | tmp |= IRDA_CR_CRC; // CRC=1 | |
1278 | tmp |= IRDA_CR_FIR_SIN; // HP sin select = 1 | |
1279 | ||
1280 | switch_bank(iobase, BANK2); | |
1281 | outb(tmp, iobase+FIR_IRDA_CR); | |
1282 | } | |
1283 | } | |
1284 | ||
1285 | switch_bank(iobase, BANK0); | |
1286 | ||
a97a6f10 | 1287 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1288 | } |
1289 | ||
1290 | /* | |
1291 | * Function ali_ircc_sir_write (driver) | |
1292 | * | |
1293 | * Fill Tx FIFO with transmit data | |
1294 | * | |
1295 | */ | |
1296 | static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len) | |
1297 | { | |
1298 | int actual = 0; | |
1299 | ||
a97a6f10 | 1300 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
1301 | |
1302 | /* Tx FIFO should be empty! */ | |
1303 | if (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) { | |
a97a6f10 | 1304 | IRDA_DEBUG(0, "%s(), failed, fifo not empty!\n", __func__ ); |
1da177e4 LT |
1305 | return 0; |
1306 | } | |
1307 | ||
1308 | /* Fill FIFO with current frame */ | |
1309 | while ((fifo_size-- > 0) && (actual < len)) { | |
1310 | /* Transmit next byte */ | |
1311 | outb(buf[actual], iobase+UART_TX); | |
1312 | ||
1313 | actual++; | |
1314 | } | |
1315 | ||
a97a6f10 | 1316 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1317 | return actual; |
1318 | } | |
1319 | ||
1320 | /* | |
1321 | * Function ali_ircc_net_open (dev) | |
1322 | * | |
1323 | * Start the device | |
1324 | * | |
1325 | */ | |
1326 | static int ali_ircc_net_open(struct net_device *dev) | |
1327 | { | |
1328 | struct ali_ircc_cb *self; | |
1329 | int iobase; | |
1330 | char hwname[32]; | |
1331 | ||
a97a6f10 | 1332 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
1333 | |
1334 | IRDA_ASSERT(dev != NULL, return -1;); | |
1335 | ||
1336 | self = (struct ali_ircc_cb *) dev->priv; | |
1337 | ||
1338 | IRDA_ASSERT(self != NULL, return 0;); | |
1339 | ||
1340 | iobase = self->io.fir_base; | |
1341 | ||
1342 | /* Request IRQ and install Interrupt Handler */ | |
1343 | if (request_irq(self->io.irq, ali_ircc_interrupt, 0, dev->name, dev)) | |
1344 | { | |
898b1d16 SO |
1345 | IRDA_WARNING("%s, unable to allocate irq=%d\n", |
1346 | ALI_IRCC_DRIVER_NAME, | |
1da177e4 LT |
1347 | self->io.irq); |
1348 | return -EAGAIN; | |
1349 | } | |
1350 | ||
1351 | /* | |
1352 | * Always allocate the DMA channel after the IRQ, and clean up on | |
1353 | * failure. | |
1354 | */ | |
1355 | if (request_dma(self->io.dma, dev->name)) { | |
898b1d16 SO |
1356 | IRDA_WARNING("%s, unable to allocate dma=%d\n", |
1357 | ALI_IRCC_DRIVER_NAME, | |
1da177e4 LT |
1358 | self->io.dma); |
1359 | free_irq(self->io.irq, self); | |
1360 | return -EAGAIN; | |
1361 | } | |
1362 | ||
1363 | /* Turn on interrups */ | |
1364 | outb(UART_IER_RDI , iobase+UART_IER); | |
1365 | ||
1366 | /* Ready to play! */ | |
1367 | netif_start_queue(dev); //benjamin by irport | |
1368 | ||
1369 | /* Give self a hardware name */ | |
1370 | sprintf(hwname, "ALI-FIR @ 0x%03x", self->io.fir_base); | |
1371 | ||
1372 | /* | |
1373 | * Open new IrLAP layer instance, now that everything should be | |
1374 | * initialized properly | |
1375 | */ | |
1376 | self->irlap = irlap_open(dev, &self->qos, hwname); | |
1377 | ||
a97a6f10 | 1378 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1379 | |
1380 | return 0; | |
1381 | } | |
1382 | ||
1383 | /* | |
1384 | * Function ali_ircc_net_close (dev) | |
1385 | * | |
1386 | * Stop the device | |
1387 | * | |
1388 | */ | |
1389 | static int ali_ircc_net_close(struct net_device *dev) | |
1390 | { | |
1391 | ||
1392 | struct ali_ircc_cb *self; | |
1393 | //int iobase; | |
1394 | ||
a97a6f10 | 1395 | IRDA_DEBUG(4, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
1396 | |
1397 | IRDA_ASSERT(dev != NULL, return -1;); | |
1398 | ||
1399 | self = (struct ali_ircc_cb *) dev->priv; | |
1400 | IRDA_ASSERT(self != NULL, return 0;); | |
1401 | ||
1402 | /* Stop device */ | |
1403 | netif_stop_queue(dev); | |
1404 | ||
1405 | /* Stop and remove instance of IrLAP */ | |
1406 | if (self->irlap) | |
1407 | irlap_close(self->irlap); | |
1408 | self->irlap = NULL; | |
1409 | ||
1410 | disable_dma(self->io.dma); | |
1411 | ||
1412 | /* Disable interrupts */ | |
1413 | SetCOMInterrupts(self, FALSE); | |
1414 | ||
1415 | free_irq(self->io.irq, dev); | |
1416 | free_dma(self->io.dma); | |
1417 | ||
a97a6f10 | 1418 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1419 | |
1420 | return 0; | |
1421 | } | |
1422 | ||
1423 | /* | |
1424 | * Function ali_ircc_fir_hard_xmit (skb, dev) | |
1425 | * | |
1426 | * Transmit the frame | |
1427 | * | |
1428 | */ | |
1429 | static int ali_ircc_fir_hard_xmit(struct sk_buff *skb, struct net_device *dev) | |
1430 | { | |
1431 | struct ali_ircc_cb *self; | |
1432 | unsigned long flags; | |
1433 | int iobase; | |
1434 | __u32 speed; | |
1435 | int mtt, diff; | |
1436 | ||
a97a6f10 | 1437 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 LT |
1438 | |
1439 | self = (struct ali_ircc_cb *) dev->priv; | |
1440 | iobase = self->io.fir_base; | |
1441 | ||
1442 | netif_stop_queue(dev); | |
1443 | ||
1444 | /* Make sure tests *& speed change are atomic */ | |
1445 | spin_lock_irqsave(&self->lock, flags); | |
1446 | ||
1447 | /* Note : you should make sure that speed changes are not going | |
1448 | * to corrupt any outgoing frame. Look at nsc-ircc for the gory | |
1449 | * details - Jean II */ | |
1450 | ||
1451 | /* Check if we need to change the speed */ | |
1452 | speed = irda_get_next_speed(skb); | |
1453 | if ((speed != self->io.speed) && (speed != -1)) { | |
1454 | /* Check for empty frame */ | |
1455 | if (!skb->len) { | |
1456 | ali_ircc_change_speed(self, speed); | |
1457 | dev->trans_start = jiffies; | |
1458 | spin_unlock_irqrestore(&self->lock, flags); | |
1459 | dev_kfree_skb(skb); | |
1460 | return 0; | |
1461 | } else | |
1462 | self->new_speed = speed; | |
1463 | } | |
1464 | ||
1465 | /* Register and copy this frame to DMA memory */ | |
1466 | self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail; | |
1467 | self->tx_fifo.queue[self->tx_fifo.free].len = skb->len; | |
1468 | self->tx_fifo.tail += skb->len; | |
1469 | ||
1470 | self->stats.tx_bytes += skb->len; | |
1471 | ||
d626f62b ACM |
1472 | skb_copy_from_linear_data(skb, self->tx_fifo.queue[self->tx_fifo.free].start, |
1473 | skb->len); | |
1da177e4 LT |
1474 | self->tx_fifo.len++; |
1475 | self->tx_fifo.free++; | |
1476 | ||
1477 | /* Start transmit only if there is currently no transmit going on */ | |
1478 | if (self->tx_fifo.len == 1) | |
1479 | { | |
1480 | /* Check if we must wait the min turn time or not */ | |
1481 | mtt = irda_get_mtt(skb); | |
1482 | ||
1483 | if (mtt) | |
1484 | { | |
1485 | /* Check how much time we have used already */ | |
1486 | do_gettimeofday(&self->now); | |
1487 | ||
1488 | diff = self->now.tv_usec - self->stamp.tv_usec; | |
1489 | /* self->stamp is set from ali_ircc_dma_receive_complete() */ | |
1490 | ||
a97a6f10 | 1491 | IRDA_DEBUG(1, "%s(), ******* diff = %d ******* \n", __func__ , diff); |
1da177e4 LT |
1492 | |
1493 | if (diff < 0) | |
1494 | diff += 1000000; | |
1495 | ||
1496 | /* Check if the mtt is larger than the time we have | |
1497 | * already used by all the protocol processing | |
1498 | */ | |
1499 | if (mtt > diff) | |
1500 | { | |
1501 | mtt -= diff; | |
1502 | ||
1503 | /* | |
1504 | * Use timer if delay larger than 1000 us, and | |
1505 | * use udelay for smaller values which should | |
1506 | * be acceptable | |
1507 | */ | |
1508 | if (mtt > 500) | |
1509 | { | |
1510 | /* Adjust for timer resolution */ | |
1511 | mtt = (mtt+250) / 500; /* 4 discard, 5 get advanced, Let's round off */ | |
1512 | ||
a97a6f10 | 1513 | IRDA_DEBUG(1, "%s(), ************** mtt = %d ***********\n", __func__ , mtt); |
1da177e4 LT |
1514 | |
1515 | /* Setup timer */ | |
1516 | if (mtt == 1) /* 500 us */ | |
1517 | { | |
1518 | switch_bank(iobase, BANK1); | |
1519 | outb(TIMER_IIR_500, iobase+FIR_TIMER_IIR); | |
1520 | } | |
1521 | else if (mtt == 2) /* 1 ms */ | |
1522 | { | |
1523 | switch_bank(iobase, BANK1); | |
1524 | outb(TIMER_IIR_1ms, iobase+FIR_TIMER_IIR); | |
1525 | } | |
1526 | else /* > 2ms -> 4ms */ | |
1527 | { | |
1528 | switch_bank(iobase, BANK1); | |
1529 | outb(TIMER_IIR_2ms, iobase+FIR_TIMER_IIR); | |
1530 | } | |
1531 | ||
1532 | ||
1533 | /* Start timer */ | |
1534 | outb(inb(iobase+FIR_CR) | CR_TIMER_EN, iobase+FIR_CR); | |
1535 | self->io.direction = IO_XMIT; | |
1536 | ||
1537 | /* Enable timer interrupt */ | |
1538 | self->ier = IER_TIMER; | |
1539 | SetCOMInterrupts(self, TRUE); | |
1540 | ||
1541 | /* Timer will take care of the rest */ | |
1542 | goto out; | |
1543 | } | |
1544 | else | |
1545 | udelay(mtt); | |
1546 | } // if (if (mtt > diff) | |
1547 | }// if (mtt) | |
1548 | ||
1549 | /* Enable EOM interrupt */ | |
1550 | self->ier = IER_EOM; | |
1551 | SetCOMInterrupts(self, TRUE); | |
1552 | ||
1553 | /* Transmit frame */ | |
1554 | ali_ircc_dma_xmit(self); | |
1555 | } // if (self->tx_fifo.len == 1) | |
1556 | ||
1557 | out: | |
1558 | ||
1559 | /* Not busy transmitting anymore if window is not full */ | |
1560 | if (self->tx_fifo.free < MAX_TX_WINDOW) | |
1561 | netif_wake_queue(self->netdev); | |
1562 | ||
1563 | /* Restore bank register */ | |
1564 | switch_bank(iobase, BANK0); | |
1565 | ||
1566 | dev->trans_start = jiffies; | |
1567 | spin_unlock_irqrestore(&self->lock, flags); | |
1568 | dev_kfree_skb(skb); | |
1569 | ||
a97a6f10 | 1570 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1571 | return 0; |
1572 | } | |
1573 | ||
1574 | ||
1575 | static void ali_ircc_dma_xmit(struct ali_ircc_cb *self) | |
1576 | { | |
1577 | int iobase, tmp; | |
1578 | unsigned char FIFO_OPTI, Hi, Lo; | |
1579 | ||
1580 | ||
a97a6f10 | 1581 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 LT |
1582 | |
1583 | iobase = self->io.fir_base; | |
1584 | ||
1585 | /* FIFO threshold , this method comes from NDIS5 code */ | |
1586 | ||
1587 | if(self->tx_fifo.queue[self->tx_fifo.ptr].len < TX_FIFO_Threshold) | |
1588 | FIFO_OPTI = self->tx_fifo.queue[self->tx_fifo.ptr].len-1; | |
1589 | else | |
1590 | FIFO_OPTI = TX_FIFO_Threshold; | |
1591 | ||
1592 | /* Disable DMA */ | |
1593 | switch_bank(iobase, BANK1); | |
1594 | outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR); | |
1595 | ||
1596 | self->io.direction = IO_XMIT; | |
1597 | ||
1598 | irda_setup_dma(self->io.dma, | |
1599 | ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start - | |
1600 | self->tx_buff.head) + self->tx_buff_dma, | |
1601 | self->tx_fifo.queue[self->tx_fifo.ptr].len, | |
1602 | DMA_TX_MODE); | |
1603 | ||
1604 | /* Reset Tx FIFO */ | |
1605 | switch_bank(iobase, BANK0); | |
1606 | outb(LCR_A_FIFO_RESET, iobase+FIR_LCR_A); | |
1607 | ||
1608 | /* Set Tx FIFO threshold */ | |
1609 | if (self->fifo_opti_buf!=FIFO_OPTI) | |
1610 | { | |
1611 | switch_bank(iobase, BANK1); | |
1612 | outb(FIFO_OPTI, iobase+FIR_FIFO_TR) ; | |
1613 | self->fifo_opti_buf=FIFO_OPTI; | |
1614 | } | |
1615 | ||
1616 | /* Set Tx DMA threshold */ | |
1617 | switch_bank(iobase, BANK1); | |
1618 | outb(TX_DMA_Threshold, iobase+FIR_DMA_TR); | |
1619 | ||
1620 | /* Set max Tx frame size */ | |
1621 | Hi = (self->tx_fifo.queue[self->tx_fifo.ptr].len >> 8) & 0x0f; | |
1622 | Lo = self->tx_fifo.queue[self->tx_fifo.ptr].len & 0xff; | |
1623 | switch_bank(iobase, BANK2); | |
1624 | outb(Hi, iobase+FIR_TX_DSR_HI); | |
1625 | outb(Lo, iobase+FIR_TX_DSR_LO); | |
1626 | ||
1627 | /* Disable SIP , Disable Brick Wall (we don't support in TX mode), Change to TX mode */ | |
1628 | switch_bank(iobase, BANK0); | |
1629 | tmp = inb(iobase+FIR_LCR_B); | |
1630 | tmp &= ~0x20; // Disable SIP | |
1631 | outb(((unsigned char)(tmp & 0x3f) | LCR_B_TX_MODE) & ~LCR_B_BW, iobase+FIR_LCR_B); | |
a97a6f10 | 1632 | IRDA_DEBUG(1, "%s(), ******* Change to TX mode: FIR_LCR_B = 0x%x ******* \n", __func__ , inb(iobase+FIR_LCR_B)); |
1da177e4 LT |
1633 | |
1634 | outb(0, iobase+FIR_LSR); | |
1635 | ||
1636 | /* Enable DMA and Burst Mode */ | |
1637 | switch_bank(iobase, BANK1); | |
1638 | outb(inb(iobase+FIR_CR) | CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR); | |
1639 | ||
1640 | switch_bank(iobase, BANK0); | |
1641 | ||
a97a6f10 | 1642 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1643 | } |
1644 | ||
1645 | static int ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self) | |
1646 | { | |
1647 | int iobase; | |
1648 | int ret = TRUE; | |
1649 | ||
a97a6f10 | 1650 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 LT |
1651 | |
1652 | iobase = self->io.fir_base; | |
1653 | ||
1654 | /* Disable DMA */ | |
1655 | switch_bank(iobase, BANK1); | |
1656 | outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR); | |
1657 | ||
1658 | /* Check for underrun! */ | |
1659 | switch_bank(iobase, BANK0); | |
1660 | if((inb(iobase+FIR_LSR) & LSR_FRAME_ABORT) == LSR_FRAME_ABORT) | |
1661 | ||
1662 | { | |
a97a6f10 | 1663 | IRDA_ERROR("%s(), ********* LSR_FRAME_ABORT *********\n", __func__); |
1da177e4 LT |
1664 | self->stats.tx_errors++; |
1665 | self->stats.tx_fifo_errors++; | |
1666 | } | |
1667 | else | |
1668 | { | |
1669 | self->stats.tx_packets++; | |
1670 | } | |
1671 | ||
1672 | /* Check if we need to change the speed */ | |
1673 | if (self->new_speed) | |
1674 | { | |
1675 | ali_ircc_change_speed(self, self->new_speed); | |
1676 | self->new_speed = 0; | |
1677 | } | |
1678 | ||
1679 | /* Finished with this frame, so prepare for next */ | |
1680 | self->tx_fifo.ptr++; | |
1681 | self->tx_fifo.len--; | |
1682 | ||
1683 | /* Any frames to be sent back-to-back? */ | |
1684 | if (self->tx_fifo.len) | |
1685 | { | |
1686 | ali_ircc_dma_xmit(self); | |
1687 | ||
1688 | /* Not finished yet! */ | |
1689 | ret = FALSE; | |
1690 | } | |
1691 | else | |
1692 | { /* Reset Tx FIFO info */ | |
1693 | self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0; | |
1694 | self->tx_fifo.tail = self->tx_buff.head; | |
1695 | } | |
1696 | ||
1697 | /* Make sure we have room for more frames */ | |
1698 | if (self->tx_fifo.free < MAX_TX_WINDOW) { | |
1699 | /* Not busy transmitting anymore */ | |
1700 | /* Tell the network layer, that we can accept more frames */ | |
1701 | netif_wake_queue(self->netdev); | |
1702 | } | |
1703 | ||
1704 | switch_bank(iobase, BANK0); | |
1705 | ||
a97a6f10 | 1706 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1707 | return ret; |
1708 | } | |
1709 | ||
1710 | /* | |
1711 | * Function ali_ircc_dma_receive (self) | |
1712 | * | |
1713 | * Get ready for receiving a frame. The device will initiate a DMA | |
1714 | * if it starts to receive a frame. | |
1715 | * | |
1716 | */ | |
1717 | static int ali_ircc_dma_receive(struct ali_ircc_cb *self) | |
1718 | { | |
1719 | int iobase, tmp; | |
1720 | ||
a97a6f10 | 1721 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 LT |
1722 | |
1723 | iobase = self->io.fir_base; | |
1724 | ||
1725 | /* Reset Tx FIFO info */ | |
1726 | self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0; | |
1727 | self->tx_fifo.tail = self->tx_buff.head; | |
1728 | ||
1729 | /* Disable DMA */ | |
1730 | switch_bank(iobase, BANK1); | |
1731 | outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR); | |
1732 | ||
1733 | /* Reset Message Count */ | |
1734 | switch_bank(iobase, BANK0); | |
1735 | outb(0x07, iobase+FIR_LSR); | |
1736 | ||
1737 | self->rcvFramesOverflow = FALSE; | |
1738 | ||
1739 | self->LineStatus = inb(iobase+FIR_LSR) ; | |
1740 | ||
1741 | /* Reset Rx FIFO info */ | |
1742 | self->io.direction = IO_RECV; | |
1743 | self->rx_buff.data = self->rx_buff.head; | |
1744 | ||
1745 | /* Reset Rx FIFO */ | |
1746 | // switch_bank(iobase, BANK0); | |
1747 | outb(LCR_A_FIFO_RESET, iobase+FIR_LCR_A); | |
1748 | ||
1749 | self->st_fifo.len = self->st_fifo.pending_bytes = 0; | |
1750 | self->st_fifo.tail = self->st_fifo.head = 0; | |
1751 | ||
1752 | irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize, | |
1753 | DMA_RX_MODE); | |
1754 | ||
1755 | /* Set Receive Mode,Brick Wall */ | |
1756 | //switch_bank(iobase, BANK0); | |
1757 | tmp = inb(iobase+FIR_LCR_B); | |
1758 | outb((unsigned char)(tmp &0x3f) | LCR_B_RX_MODE | LCR_B_BW , iobase + FIR_LCR_B); // 2000/12/1 05:16PM | |
a97a6f10 | 1759 | IRDA_DEBUG(1, "%s(), *** Change To RX mode: FIR_LCR_B = 0x%x *** \n", __func__ , inb(iobase+FIR_LCR_B)); |
1da177e4 LT |
1760 | |
1761 | /* Set Rx Threshold */ | |
1762 | switch_bank(iobase, BANK1); | |
1763 | outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR); | |
1764 | outb(RX_DMA_Threshold, iobase+FIR_DMA_TR); | |
1765 | ||
1766 | /* Enable DMA and Burst Mode */ | |
1767 | // switch_bank(iobase, BANK1); | |
1768 | outb(CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR); | |
1769 | ||
1770 | switch_bank(iobase, BANK0); | |
a97a6f10 | 1771 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1772 | return 0; |
1773 | } | |
1774 | ||
1775 | static int ali_ircc_dma_receive_complete(struct ali_ircc_cb *self) | |
1776 | { | |
1777 | struct st_fifo *st_fifo; | |
1778 | struct sk_buff *skb; | |
1779 | __u8 status, MessageCount; | |
1780 | int len, i, iobase, val; | |
1781 | ||
a97a6f10 | 1782 | IRDA_DEBUG(1, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 LT |
1783 | |
1784 | st_fifo = &self->st_fifo; | |
1785 | iobase = self->io.fir_base; | |
1786 | ||
1787 | switch_bank(iobase, BANK0); | |
1788 | MessageCount = inb(iobase+ FIR_LSR)&0x07; | |
1789 | ||
1790 | if (MessageCount > 0) | |
a97a6f10 | 1791 | IRDA_DEBUG(0, "%s(), Messsage count = %d,\n", __func__ , MessageCount); |
1da177e4 LT |
1792 | |
1793 | for (i=0; i<=MessageCount; i++) | |
1794 | { | |
1795 | /* Bank 0 */ | |
1796 | switch_bank(iobase, BANK0); | |
1797 | status = inb(iobase+FIR_LSR); | |
1798 | ||
1799 | switch_bank(iobase, BANK2); | |
1800 | len = inb(iobase+FIR_RX_DSR_HI) & 0x0f; | |
1801 | len = len << 8; | |
1802 | len |= inb(iobase+FIR_RX_DSR_LO); | |
1803 | ||
a97a6f10 HH |
1804 | IRDA_DEBUG(1, "%s(), RX Length = 0x%.2x,\n", __func__ , len); |
1805 | IRDA_DEBUG(1, "%s(), RX Status = 0x%.2x,\n", __func__ , status); | |
1da177e4 LT |
1806 | |
1807 | if (st_fifo->tail >= MAX_RX_WINDOW) { | |
a97a6f10 | 1808 | IRDA_DEBUG(0, "%s(), window is full!\n", __func__ ); |
1da177e4 LT |
1809 | continue; |
1810 | } | |
1811 | ||
1812 | st_fifo->entries[st_fifo->tail].status = status; | |
1813 | st_fifo->entries[st_fifo->tail].len = len; | |
1814 | st_fifo->pending_bytes += len; | |
1815 | st_fifo->tail++; | |
1816 | st_fifo->len++; | |
1817 | } | |
1818 | ||
1819 | for (i=0; i<=MessageCount; i++) | |
1820 | { | |
1821 | /* Get first entry */ | |
1822 | status = st_fifo->entries[st_fifo->head].status; | |
1823 | len = st_fifo->entries[st_fifo->head].len; | |
1824 | st_fifo->pending_bytes -= len; | |
1825 | st_fifo->head++; | |
1826 | st_fifo->len--; | |
1827 | ||
1828 | /* Check for errors */ | |
1829 | if ((status & 0xd8) || self->rcvFramesOverflow || (len==0)) | |
1830 | { | |
a97a6f10 | 1831 | IRDA_DEBUG(0,"%s(), ************* RX Errors ************ \n", __func__ ); |
1da177e4 LT |
1832 | |
1833 | /* Skip frame */ | |
1834 | self->stats.rx_errors++; | |
1835 | ||
1836 | self->rx_buff.data += len; | |
1837 | ||
1838 | if (status & LSR_FIFO_UR) | |
1839 | { | |
1840 | self->stats.rx_frame_errors++; | |
a97a6f10 | 1841 | IRDA_DEBUG(0,"%s(), ************* FIFO Errors ************ \n", __func__ ); |
1da177e4 LT |
1842 | } |
1843 | if (status & LSR_FRAME_ERROR) | |
1844 | { | |
1845 | self->stats.rx_frame_errors++; | |
a97a6f10 | 1846 | IRDA_DEBUG(0,"%s(), ************* FRAME Errors ************ \n", __func__ ); |
1da177e4 LT |
1847 | } |
1848 | ||
1849 | if (status & LSR_CRC_ERROR) | |
1850 | { | |
1851 | self->stats.rx_crc_errors++; | |
a97a6f10 | 1852 | IRDA_DEBUG(0,"%s(), ************* CRC Errors ************ \n", __func__ ); |
1da177e4 LT |
1853 | } |
1854 | ||
1855 | if(self->rcvFramesOverflow) | |
1856 | { | |
1857 | self->stats.rx_frame_errors++; | |
a97a6f10 | 1858 | IRDA_DEBUG(0,"%s(), ************* Overran DMA buffer ************ \n", __func__ ); |
1da177e4 LT |
1859 | } |
1860 | if(len == 0) | |
1861 | { | |
1862 | self->stats.rx_frame_errors++; | |
a97a6f10 | 1863 | IRDA_DEBUG(0,"%s(), ********** Receive Frame Size = 0 ********* \n", __func__ ); |
1da177e4 LT |
1864 | } |
1865 | } | |
1866 | else | |
1867 | { | |
1868 | ||
1869 | if (st_fifo->pending_bytes < 32) | |
1870 | { | |
1871 | switch_bank(iobase, BANK0); | |
1872 | val = inb(iobase+FIR_BSR); | |
1873 | if ((val& BSR_FIFO_NOT_EMPTY)== 0x80) | |
1874 | { | |
a97a6f10 | 1875 | IRDA_DEBUG(0, "%s(), ************* BSR_FIFO_NOT_EMPTY ************ \n", __func__ ); |
1da177e4 LT |
1876 | |
1877 | /* Put this entry back in fifo */ | |
1878 | st_fifo->head--; | |
1879 | st_fifo->len++; | |
1880 | st_fifo->pending_bytes += len; | |
1881 | st_fifo->entries[st_fifo->head].status = status; | |
1882 | st_fifo->entries[st_fifo->head].len = len; | |
1883 | ||
1884 | /* | |
1885 | * DMA not finished yet, so try again | |
1886 | * later, set timer value, resolution | |
1887 | * 500 us | |
1888 | */ | |
1889 | ||
1890 | switch_bank(iobase, BANK1); | |
1891 | outb(TIMER_IIR_500, iobase+FIR_TIMER_IIR); // 2001/1/2 05:07PM | |
1892 | ||
1893 | /* Enable Timer */ | |
1894 | outb(inb(iobase+FIR_CR) | CR_TIMER_EN, iobase+FIR_CR); | |
1895 | ||
1896 | return FALSE; /* I'll be back! */ | |
1897 | } | |
1898 | } | |
1899 | ||
1900 | /* | |
1901 | * Remember the time we received this frame, so we can | |
1902 | * reduce the min turn time a bit since we will know | |
1903 | * how much time we have used for protocol processing | |
1904 | */ | |
1905 | do_gettimeofday(&self->stamp); | |
1906 | ||
1907 | skb = dev_alloc_skb(len+1); | |
1908 | if (skb == NULL) | |
1909 | { | |
1910 | IRDA_WARNING("%s(), memory squeeze, " | |
1911 | "dropping frame.\n", | |
a97a6f10 | 1912 | __func__); |
1da177e4 LT |
1913 | self->stats.rx_dropped++; |
1914 | ||
1915 | return FALSE; | |
1916 | } | |
1917 | ||
1918 | /* Make sure IP header gets aligned */ | |
1919 | skb_reserve(skb, 1); | |
1920 | ||
1921 | /* Copy frame without CRC, CRC is removed by hardware*/ | |
1922 | skb_put(skb, len); | |
27d7ff46 | 1923 | skb_copy_to_linear_data(skb, self->rx_buff.data, len); |
1da177e4 LT |
1924 | |
1925 | /* Move to next frame */ | |
1926 | self->rx_buff.data += len; | |
1927 | self->stats.rx_bytes += len; | |
1928 | self->stats.rx_packets++; | |
1929 | ||
1930 | skb->dev = self->netdev; | |
459a98ed | 1931 | skb_reset_mac_header(skb); |
1da177e4 LT |
1932 | skb->protocol = htons(ETH_P_IRDA); |
1933 | netif_rx(skb); | |
1da177e4 LT |
1934 | } |
1935 | } | |
1936 | ||
1937 | switch_bank(iobase, BANK0); | |
1938 | ||
a97a6f10 | 1939 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
1940 | return TRUE; |
1941 | } | |
1942 | ||
1943 | ||
1944 | ||
1945 | /* | |
1946 | * Function ali_ircc_sir_hard_xmit (skb, dev) | |
1947 | * | |
1948 | * Transmit the frame! | |
1949 | * | |
1950 | */ | |
1951 | static int ali_ircc_sir_hard_xmit(struct sk_buff *skb, struct net_device *dev) | |
1952 | { | |
1953 | struct ali_ircc_cb *self; | |
1954 | unsigned long flags; | |
1955 | int iobase; | |
1956 | __u32 speed; | |
1957 | ||
a97a6f10 | 1958 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
1959 | |
1960 | IRDA_ASSERT(dev != NULL, return 0;); | |
1961 | ||
1962 | self = (struct ali_ircc_cb *) dev->priv; | |
1963 | IRDA_ASSERT(self != NULL, return 0;); | |
1964 | ||
1965 | iobase = self->io.sir_base; | |
1966 | ||
1967 | netif_stop_queue(dev); | |
1968 | ||
1969 | /* Make sure tests *& speed change are atomic */ | |
1970 | spin_lock_irqsave(&self->lock, flags); | |
1971 | ||
1972 | /* Note : you should make sure that speed changes are not going | |
1973 | * to corrupt any outgoing frame. Look at nsc-ircc for the gory | |
1974 | * details - Jean II */ | |
1975 | ||
1976 | /* Check if we need to change the speed */ | |
1977 | speed = irda_get_next_speed(skb); | |
1978 | if ((speed != self->io.speed) && (speed != -1)) { | |
1979 | /* Check for empty frame */ | |
1980 | if (!skb->len) { | |
1981 | ali_ircc_change_speed(self, speed); | |
1982 | dev->trans_start = jiffies; | |
1983 | spin_unlock_irqrestore(&self->lock, flags); | |
1984 | dev_kfree_skb(skb); | |
1985 | return 0; | |
1986 | } else | |
1987 | self->new_speed = speed; | |
1988 | } | |
1989 | ||
1990 | /* Init tx buffer */ | |
1991 | self->tx_buff.data = self->tx_buff.head; | |
1992 | ||
1993 | /* Copy skb to tx_buff while wrapping, stuffing and making CRC */ | |
1994 | self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data, | |
1995 | self->tx_buff.truesize); | |
1996 | ||
1997 | self->stats.tx_bytes += self->tx_buff.len; | |
1998 | ||
1999 | /* Turn on transmit finished interrupt. Will fire immediately! */ | |
2000 | outb(UART_IER_THRI, iobase+UART_IER); | |
2001 | ||
2002 | dev->trans_start = jiffies; | |
2003 | spin_unlock_irqrestore(&self->lock, flags); | |
2004 | ||
2005 | dev_kfree_skb(skb); | |
2006 | ||
a97a6f10 | 2007 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2008 | |
2009 | return 0; | |
2010 | } | |
2011 | ||
2012 | ||
2013 | /* | |
2014 | * Function ali_ircc_net_ioctl (dev, rq, cmd) | |
2015 | * | |
2016 | * Process IOCTL commands for this device | |
2017 | * | |
2018 | */ | |
2019 | static int ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | |
2020 | { | |
2021 | struct if_irda_req *irq = (struct if_irda_req *) rq; | |
2022 | struct ali_ircc_cb *self; | |
2023 | unsigned long flags; | |
2024 | int ret = 0; | |
2025 | ||
a97a6f10 | 2026 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
2027 | |
2028 | IRDA_ASSERT(dev != NULL, return -1;); | |
2029 | ||
2030 | self = dev->priv; | |
2031 | ||
2032 | IRDA_ASSERT(self != NULL, return -1;); | |
2033 | ||
a97a6f10 | 2034 | IRDA_DEBUG(2, "%s(), %s, (cmd=0x%X)\n", __func__ , dev->name, cmd); |
1da177e4 LT |
2035 | |
2036 | switch (cmd) { | |
2037 | case SIOCSBANDWIDTH: /* Set bandwidth */ | |
a97a6f10 | 2038 | IRDA_DEBUG(1, "%s(), SIOCSBANDWIDTH\n", __func__ ); |
1da177e4 LT |
2039 | /* |
2040 | * This function will also be used by IrLAP to change the | |
2041 | * speed, so we still must allow for speed change within | |
2042 | * interrupt context. | |
2043 | */ | |
2044 | if (!in_interrupt() && !capable(CAP_NET_ADMIN)) | |
2045 | return -EPERM; | |
2046 | ||
2047 | spin_lock_irqsave(&self->lock, flags); | |
2048 | ali_ircc_change_speed(self, irq->ifr_baudrate); | |
2049 | spin_unlock_irqrestore(&self->lock, flags); | |
2050 | break; | |
2051 | case SIOCSMEDIABUSY: /* Set media busy */ | |
a97a6f10 | 2052 | IRDA_DEBUG(1, "%s(), SIOCSMEDIABUSY\n", __func__ ); |
1da177e4 LT |
2053 | if (!capable(CAP_NET_ADMIN)) |
2054 | return -EPERM; | |
2055 | irda_device_set_media_busy(self->netdev, TRUE); | |
2056 | break; | |
2057 | case SIOCGRECEIVING: /* Check if we are receiving right now */ | |
a97a6f10 | 2058 | IRDA_DEBUG(2, "%s(), SIOCGRECEIVING\n", __func__ ); |
1da177e4 LT |
2059 | /* This is protected */ |
2060 | irq->ifr_receiving = ali_ircc_is_receiving(self); | |
2061 | break; | |
2062 | default: | |
2063 | ret = -EOPNOTSUPP; | |
2064 | } | |
2065 | ||
a97a6f10 | 2066 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2067 | |
2068 | return ret; | |
2069 | } | |
2070 | ||
2071 | /* | |
2072 | * Function ali_ircc_is_receiving (self) | |
2073 | * | |
2074 | * Return TRUE is we are currently receiving a frame | |
2075 | * | |
2076 | */ | |
2077 | static int ali_ircc_is_receiving(struct ali_ircc_cb *self) | |
2078 | { | |
2079 | unsigned long flags; | |
2080 | int status = FALSE; | |
2081 | int iobase; | |
2082 | ||
a97a6f10 | 2083 | IRDA_DEBUG(2, "%s(), ---------------- Start -----------------\n", __func__ ); |
1da177e4 LT |
2084 | |
2085 | IRDA_ASSERT(self != NULL, return FALSE;); | |
2086 | ||
2087 | spin_lock_irqsave(&self->lock, flags); | |
2088 | ||
2089 | if (self->io.speed > 115200) | |
2090 | { | |
2091 | iobase = self->io.fir_base; | |
2092 | ||
2093 | switch_bank(iobase, BANK1); | |
2094 | if((inb(iobase+FIR_FIFO_FR) & 0x3f) != 0) | |
2095 | { | |
2096 | /* We are receiving something */ | |
a97a6f10 | 2097 | IRDA_DEBUG(1, "%s(), We are receiving something\n", __func__ ); |
1da177e4 LT |
2098 | status = TRUE; |
2099 | } | |
2100 | switch_bank(iobase, BANK0); | |
2101 | } | |
2102 | else | |
2103 | { | |
2104 | status = (self->rx_buff.state != OUTSIDE_FRAME); | |
2105 | } | |
2106 | ||
2107 | spin_unlock_irqrestore(&self->lock, flags); | |
2108 | ||
a97a6f10 | 2109 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2110 | |
2111 | return status; | |
2112 | } | |
2113 | ||
2114 | static struct net_device_stats *ali_ircc_net_get_stats(struct net_device *dev) | |
2115 | { | |
2116 | struct ali_ircc_cb *self = (struct ali_ircc_cb *) dev->priv; | |
2117 | ||
a97a6f10 | 2118 | IRDA_DEBUG(2, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 | 2119 | |
a97a6f10 | 2120 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2121 | |
2122 | return &self->stats; | |
2123 | } | |
2124 | ||
898b1d16 | 2125 | static int ali_ircc_suspend(struct platform_device *dev, pm_message_t state) |
1da177e4 | 2126 | { |
898b1d16 | 2127 | struct ali_ircc_cb *self = platform_get_drvdata(dev); |
1da177e4 | 2128 | |
898b1d16 | 2129 | IRDA_MESSAGE("%s, Suspending\n", ALI_IRCC_DRIVER_NAME); |
1da177e4 LT |
2130 | |
2131 | if (self->io.suspended) | |
898b1d16 | 2132 | return 0; |
1da177e4 LT |
2133 | |
2134 | ali_ircc_net_close(self->netdev); | |
2135 | ||
2136 | self->io.suspended = 1; | |
2137 | ||
898b1d16 | 2138 | return 0; |
1da177e4 LT |
2139 | } |
2140 | ||
898b1d16 | 2141 | static int ali_ircc_resume(struct platform_device *dev) |
1da177e4 | 2142 | { |
898b1d16 | 2143 | struct ali_ircc_cb *self = platform_get_drvdata(dev); |
1da177e4 LT |
2144 | |
2145 | if (!self->io.suspended) | |
898b1d16 | 2146 | return 0; |
1da177e4 LT |
2147 | |
2148 | ali_ircc_net_open(self->netdev); | |
2149 | ||
898b1d16 | 2150 | IRDA_MESSAGE("%s, Waking up\n", ALI_IRCC_DRIVER_NAME); |
1da177e4 LT |
2151 | |
2152 | self->io.suspended = 0; | |
1da177e4 | 2153 | |
1da177e4 LT |
2154 | return 0; |
2155 | } | |
2156 | ||
1da177e4 LT |
2157 | /* ALi Chip Function */ |
2158 | ||
2159 | static void SetCOMInterrupts(struct ali_ircc_cb *self , unsigned char enable) | |
2160 | { | |
2161 | ||
2162 | unsigned char newMask; | |
2163 | ||
2164 | int iobase = self->io.fir_base; /* or sir_base */ | |
2165 | ||
a97a6f10 | 2166 | IRDA_DEBUG(2, "%s(), -------- Start -------- ( Enable = %d )\n", __func__ , enable); |
1da177e4 LT |
2167 | |
2168 | /* Enable the interrupt which we wish to */ | |
2169 | if (enable){ | |
2170 | if (self->io.direction == IO_XMIT) | |
2171 | { | |
2172 | if (self->io.speed > 115200) /* FIR, MIR */ | |
2173 | { | |
2174 | newMask = self->ier; | |
2175 | } | |
2176 | else /* SIR */ | |
2177 | { | |
2178 | newMask = UART_IER_THRI | UART_IER_RDI; | |
2179 | } | |
2180 | } | |
2181 | else { | |
2182 | if (self->io.speed > 115200) /* FIR, MIR */ | |
2183 | { | |
2184 | newMask = self->ier; | |
2185 | } | |
2186 | else /* SIR */ | |
2187 | { | |
2188 | newMask = UART_IER_RDI; | |
2189 | } | |
2190 | } | |
2191 | } | |
2192 | else /* Disable all the interrupts */ | |
2193 | { | |
2194 | newMask = 0x00; | |
2195 | ||
2196 | } | |
2197 | ||
2198 | //SIR and FIR has different registers | |
2199 | if (self->io.speed > 115200) | |
2200 | { | |
2201 | switch_bank(iobase, BANK0); | |
2202 | outb(newMask, iobase+FIR_IER); | |
2203 | } | |
2204 | else | |
2205 | outb(newMask, iobase+UART_IER); | |
2206 | ||
a97a6f10 | 2207 | IRDA_DEBUG(2, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2208 | } |
2209 | ||
2210 | static void SIR2FIR(int iobase) | |
2211 | { | |
2212 | //unsigned char tmp; | |
2213 | ||
a97a6f10 | 2214 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
2215 | |
2216 | /* Already protected (change_speed() or setup()), no need to lock. | |
2217 | * Jean II */ | |
2218 | ||
2219 | outb(0x28, iobase+UART_MCR); | |
2220 | outb(0x68, iobase+UART_MCR); | |
2221 | outb(0x88, iobase+UART_MCR); | |
2222 | ||
2223 | outb(0x60, iobase+FIR_MCR); /* Master Reset */ | |
2224 | outb(0x20, iobase+FIR_MCR); /* Master Interrupt Enable */ | |
2225 | ||
2226 | //tmp = inb(iobase+FIR_LCR_B); /* SIP enable */ | |
2227 | //tmp |= 0x20; | |
2228 | //outb(tmp, iobase+FIR_LCR_B); | |
2229 | ||
a97a6f10 | 2230 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2231 | } |
2232 | ||
2233 | static void FIR2SIR(int iobase) | |
2234 | { | |
2235 | unsigned char val; | |
2236 | ||
a97a6f10 | 2237 | IRDA_DEBUG(1, "%s(), ---------------- Start ----------------\n", __func__ ); |
1da177e4 LT |
2238 | |
2239 | /* Already protected (change_speed() or setup()), no need to lock. | |
2240 | * Jean II */ | |
2241 | ||
2242 | outb(0x20, iobase+FIR_MCR); /* IRQ to low */ | |
2243 | outb(0x00, iobase+UART_IER); | |
2244 | ||
2245 | outb(0xA0, iobase+FIR_MCR); /* Don't set master reset */ | |
2246 | outb(0x00, iobase+UART_FCR); | |
2247 | outb(0x07, iobase+UART_FCR); | |
2248 | ||
2249 | val = inb(iobase+UART_RX); | |
2250 | val = inb(iobase+UART_LSR); | |
2251 | val = inb(iobase+UART_MSR); | |
2252 | ||
a97a6f10 | 2253 | IRDA_DEBUG(1, "%s(), ----------------- End ------------------\n", __func__ ); |
1da177e4 LT |
2254 | } |
2255 | ||
2256 | MODULE_AUTHOR("Benjamin Kong <benjamin_kong@ali.com.tw>"); | |
2257 | MODULE_DESCRIPTION("ALi FIR Controller Driver"); | |
2258 | MODULE_LICENSE("GPL"); | |
72abb461 | 2259 | MODULE_ALIAS("platform:" ALI_IRCC_DRIVER_NAME); |
1da177e4 LT |
2260 | |
2261 | ||
2262 | module_param_array(io, int, NULL, 0); | |
2263 | MODULE_PARM_DESC(io, "Base I/O addresses"); | |
2264 | module_param_array(irq, int, NULL, 0); | |
2265 | MODULE_PARM_DESC(irq, "IRQ lines"); | |
2266 | module_param_array(dma, int, NULL, 0); | |
2267 | MODULE_PARM_DESC(dma, "DMA channels"); | |
2268 | ||
2269 | module_init(ali_ircc_init); | |
2270 | module_exit(ali_ircc_cleanup); |