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1da177e4 1/* eth16i.c An ICL EtherTeam 16i and 32 EISA ethernet driver for Linux
6aa20a22 2
1da177e4 3 Written 1994-1999 by Mika Kuoppala
6aa20a22 4
1da177e4
LT		 5 Copyright (C) 1994-1999 by Mika Kuoppala
6 Based on skeleton.c and heavily on at1700.c by Donald Becker
7
8 This software may be used and distributed according to the terms
9 of the GNU General Public License, incorporated herein by reference.
10
11 The author may be reached as miku@iki.fi
12
13 This driver supports following cards :
14 - ICL EtherTeam 16i
6aa20a22 15 - ICL EtherTeam 32 EISA
1da177e4
LT		 16 (Uses true 32 bit transfers rather than 16i compability mode)
17
18 Example Module usage:
19 insmod eth16i.o io=0x2a0 mediatype=bnc
20
21 mediatype can be one of the following: bnc,tp,dix,auto,eprom
22
23 'auto' will try to autoprobe mediatype.
24 'eprom' will use whatever type defined in eprom.
25
26 I have benchmarked driver with PII/300Mhz as a ftp client
27 and 486/33Mhz as a ftp server. Top speed was 1128.37 kilobytes/sec.
6aa20a22 28
1da177e4
LT		 29 Sources:
30 - skeleton.c a sample network driver core for linux,
31 written by Donald Becker <becker@scyld.com>
6aa20a22 32 - at1700.c a driver for Allied Telesis AT1700, written
1da177e4
LT		 33 by Donald Becker.
34 - e16iSRV.asm a Netware 3.X Server Driver for ICL EtherTeam16i
35 written by Markku Viima
36 - The Fujitsu MB86965 databook.
6aa20a22
JG		 37
38 Author thanks following persons due to their valueble assistance:
1da177e4 39 Markku Viima (ICL)
6aa20a22 40 Ari Valve (ICL)
1da177e4
LT		 41 Donald Becker
42 Kurt Huwig <kurt@huwig.de>
43
44 Revision history:
45
46 Version Date Description
6aa20a22 47
1da177e4
LT		 48 0.01 15.12-94 Initial version (card detection)
49 0.02 23.01-95 Interrupt is now hooked correctly
50 0.03 01.02-95 Rewrote initialization part
51 0.04 07.02-95 Base skeleton done...
52 Made a few changes to signature checking
53 to make it a bit reliable.
54 - fixed bug in tx_buf mapping
55 - fixed bug in initialization (DLC_EN
56 wasn't enabled when initialization
57 was done.)
58 0.05 08.02-95 If there were more than one packet to send,
59 transmit was jammed due to invalid
60 register write...now fixed
6aa20a22 61 0.06 19.02-95 Rewrote interrupt handling
1da177e4
LT		 62 0.07 13.04-95 Wrote EEPROM read routines
63 Card configuration now set according to
64 data read from EEPROM
65 0.08 23.06-95 Wrote part that tries to probe used interface
66 port if AUTO is selected
67
68 0.09 01.09-95 Added module support
6aa20a22 69
1da177e4
LT		 70 0.10 04.09-95 Fixed receive packet allocation to work
71 with kernels > 1.3.x
1da177e4 72
6aa20a22
JG		 73 0.20 20.09-95 Added support for EtherTeam32 EISA
74
75 0.21 17.10-95 Removed the unnecessary extern
1da177e4
LT		 76 init_etherdev() declaration. Some
77 other cleanups.
6aa20a22 78
1da177e4
LT		 79 0.22 22.02-96 Receive buffer was not flushed
80 correctly when faulty packet was
81 received. Now fixed.
82
6aa20a22 83 0.23 26.02-96 Made resetting the adapter
1da177e4 84 more reliable.
6aa20a22 85
1da177e4
LT		 86 0.24 27.02-96 Rewrote faulty packet handling in eth16i_rx
87
88 0.25 22.05-96 kfree() was missing from cleanup_module.
89
6aa20a22 90 0.26 11.06-96 Sometimes card was not found by
1da177e4 91 check_signature(). Now made more reliable.
6aa20a22
JG		 92
93 0.27 23.06-96 Oops. 16 consecutive collisions halted
94 adapter. Now will try to retransmit
1da177e4 95 MAX_COL_16 times before finally giving up.
6aa20a22 96
1da177e4
LT		 97 0.28 28.10-97 Added dev_id parameter (NULL) for free_irq
98
99 0.29 29.10-97 Multiple card support for module users
100
101 0.30 30.10-97 Fixed irq allocation bug.
102 (request_irq moved from probe to open)
103
104 0.30a 21.08-98 Card detection made more relaxed. Driver
105 had problems with some TCP/IP-PROM boots
6aa20a22 106 to find the card. Suggested by
1da177e4
LT		 107 Kurt Huwig <kurt@huwig.de>
108
109 0.31 28.08-98 Media interface port can now be selected
110 with module parameters or kernel
6aa20a22 111 boot parameters.
1da177e4 112
6aa20a22 113 0.32 31.08-98 IRQ was never freed if open/close
1da177e4 114 pair wasn't called. Now fixed.
6aa20a22 115
1da177e4
LT		 116 0.33 10.09-98 When eth16i_open() was called after
117 eth16i_close() chip never recovered.
118 Now more shallow reset is made on
119 close.
120
121 0.34 29.06-99 Fixed one bad #ifdef.
122 Changed ioaddr -> io for consistency
123
124 0.35 01.07-99 transmit,-receive bytes were never
6aa20a22 125 updated in stats.
1da177e4
LT		 126
127 Bugs:
6aa20a22
JG		 128 In some cases the media interface autoprobing code doesn't find
129 the correct interface type. In this case you can
130 manually choose the interface type in DOS with E16IC.EXE which is
1da177e4
LT		 131 configuration software for EtherTeam16i and EtherTeam32 cards.
132 This is also true for IRQ setting. You cannot use module
6aa20a22 133 parameter to configure IRQ of the card (yet).
1da177e4
LT		 134
135 To do:
136 - Real multicast support
137 - Rewrite the media interface autoprobing code. Its _horrible_ !
138 - Possibly merge all the MB86965 specific code to external
139 module for use by eth16.c and Donald's at1700.c
140 - IRQ configuration with module parameter. I will do
141 this when i will get enough info about setting
142 irq without configuration utility.
143*/
144
6aa20a22 145static char *version =
1da177e4
LT		 146 "eth16i.c: v0.35 01-Jul-1999 Mika Kuoppala (miku@iki.fi)\n";
147
148#include <linux/module.h>
149#include <linux/kernel.h>
6aa20a22
JG		 150#include <linux/types.h>
151#include <linux/fcntl.h>
152#include <linux/interrupt.h>
153#include <linux/ioport.h>
154#include <linux/in.h>
155#include <linux/slab.h>
156#include <linux/string.h>
1da177e4
LT		 157#include <linux/errno.h>
158#include <linux/init.h>
159#include <linux/spinlock.h>
160#include <linux/netdevice.h>
161#include <linux/etherdevice.h>
162#include <linux/skbuff.h>
163#include <linux/bitops.h>
ff5688ae 164#include <linux/jiffies.h>
53d5ed62 165#include <linux/io.h>
1da177e4 166
6aa20a22 167#include <asm/system.h>
1da177e4
LT		 168#include <asm/dma.h>
169
170
171
172/* Few macros */
6aa20a22
JG		 173#define BIT(a) ( (1 << (a)) )
174#define BITSET(ioaddr, bnum) ((outb(((inb(ioaddr)) | (bnum)), ioaddr)))
1da177e4
LT		 175#define BITCLR(ioaddr, bnum) ((outb(((inb(ioaddr)) & (~(bnum))), ioaddr)))
176
177/* This is the I/O address space for Etherteam 16i adapter. */
178#define ETH16I_IO_EXTENT 32
179
180/* Ticks before deciding that transmit has timed out */
181#define TX_TIMEOUT (400*HZ/1000)
182
183/* Maximum loop count when receiving packets */
184#define MAX_RX_LOOP 20
185
186/* Some interrupt masks */
187#define ETH16I_INTR_ON 0xef8a /* Higher is receive mask */
188#define ETH16I_INTR_OFF 0x0000
6aa20a22 189
1da177e4
LT		 190/* Buffers header status byte meanings */
191#define PKT_GOOD BIT(5)
192#define PKT_GOOD_RMT BIT(4)
193#define PKT_SHORT BIT(3)
194#define PKT_ALIGN_ERR BIT(2)
195#define PKT_CRC_ERR BIT(1)
196#define PKT_RX_BUF_OVERFLOW BIT(0)
197
198/* Transmit status register (DLCR0) */
199#define TX_STATUS_REG 0
200#define TX_DONE BIT(7)
201#define NET_BUSY BIT(6)
202#define TX_PKT_RCD BIT(5)
203#define CR_LOST BIT(4)
204#define TX_JABBER_ERR BIT(3)
205#define COLLISION BIT(2)
206#define COLLISIONS_16 BIT(1)
207
208/* Receive status register (DLCR1) */
209#define RX_STATUS_REG 1
210#define RX_PKT BIT(7) /* Packet received */
211#define BUS_RD_ERR BIT(6)
212#define SHORT_PKT_ERR BIT(3)
213#define ALIGN_ERR BIT(2)
214#define CRC_ERR BIT(1)
215#define RX_BUF_OVERFLOW BIT(0)
6aa20a22 216
1da177e4
LT		 217/* Transmit Interrupt Enable Register (DLCR2) */
218#define TX_INTR_REG 2
219#define TX_INTR_DONE BIT(7)
220#define TX_INTR_COL BIT(2)
221#define TX_INTR_16_COL BIT(1)
222
223/* Receive Interrupt Enable Register (DLCR3) */
224#define RX_INTR_REG 3
225#define RX_INTR_RECEIVE BIT(7)
226#define RX_INTR_SHORT_PKT BIT(3)
227#define RX_INTR_CRC_ERR BIT(1)
228#define RX_INTR_BUF_OVERFLOW BIT(0)
229
230/* Transmit Mode Register (DLCR4) */
231#define TRANSMIT_MODE_REG 4
232#define LOOPBACK_CONTROL BIT(1)
233#define CONTROL_OUTPUT BIT(2)
234
235/* Receive Mode Register (DLCR5) */
236#define RECEIVE_MODE_REG 5
237#define RX_BUFFER_EMPTY BIT(6)
238#define ACCEPT_BAD_PACKETS BIT(5)
239#define RECEIVE_SHORT_ADDR BIT(4)
240#define ACCEPT_SHORT_PACKETS BIT(3)
241#define REMOTE_RESET BIT(2)
242
243#define ADDRESS_FILTER_MODE BIT(1) | BIT(0)
244#define REJECT_ALL 0
245#define ACCEPT_ALL 3
246#define MODE_1 1 /* NODE ID, BC, MC, 2-24th bit */
247#define MODE_2 2 /* NODE ID, BC, MC, Hash Table */
248
249/* Configuration Register 0 (DLCR6) */
250#define CONFIG_REG_0 6
251#define DLC_EN BIT(7)
252#define SRAM_CYCLE_TIME_100NS BIT(6)
253#define SYSTEM_BUS_WIDTH_8 BIT(5) /* 1 = 8bit, 0 = 16bit */
254#define BUFFER_WIDTH_8 BIT(4) /* 1 = 8bit, 0 = 16bit */
6aa20a22 255#define TBS1 BIT(3)
1da177e4
LT		 256#define TBS0 BIT(2)
257#define SRAM_BS1 BIT(1) /* 00=8kb, 01=16kb */
258#define SRAM_BS0 BIT(0) /* 10=32kb, 11=64kb */
259
6aa20a22 260#ifndef ETH16I_TX_BUF_SIZE /* 0 = 2kb, 1 = 4kb */
1da177e4 261#define ETH16I_TX_BUF_SIZE 3 /* 2 = 8kb, 3 = 16kb */
6aa20a22 262#endif
1da177e4
LT		 263#define TX_BUF_1x2048 0
264#define TX_BUF_2x2048 1
265#define TX_BUF_2x4098 2
266#define TX_BUF_2x8192 3
267
268/* Configuration Register 1 (DLCR7) */
269#define CONFIG_REG_1 7
270#define POWERUP BIT(5)
271
272/* Transmit start register */
273#define TRANSMIT_START_REG 10
274#define TRANSMIT_START_RB 2
275#define TX_START BIT(7) /* Rest of register bit indicate*/
276 /* number of packets in tx buffer*/
277/* Node ID registers (DLCR8-13) */
278#define NODE_ID_0 8
279#define NODE_ID_RB 0
280
281/* Hash Table registers (HT8-15) */
282#define HASH_TABLE_0 8
283#define HASH_TABLE_RB 1
284
285/* Buffer memory ports */
286#define BUFFER_MEM_PORT_LB 8
287#define DATAPORT BUFFER_MEM_PORT_LB
288#define BUFFER_MEM_PORT_HB 9
289
290/* 16 Collision control register (BMPR11) */
291#define COL_16_REG 11
292#define HALT_ON_16 0x00
293#define RETRANS_AND_HALT_ON_16 0x02
294
295/* Maximum number of attempts to send after 16 concecutive collisions */
296#define MAX_COL_16 10
297
298/* DMA Burst and Transceiver Mode Register (BMPR13) */
299#define TRANSCEIVER_MODE_REG 13
6aa20a22 300#define TRANSCEIVER_MODE_RB 2
1da177e4
LT		 301#define IO_BASE_UNLOCK BIT(7)
302#define LOWER_SQUELCH_TRESH BIT(6)
303#define LINK_TEST_DISABLE BIT(5)
304#define AUI_SELECT BIT(4)
305#define DIS_AUTO_PORT_SEL BIT(3)
306
307/* Filter Self Receive Register (BMPR14) */
308#define FILTER_SELF_RX_REG 14
309#define SKIP_RX_PACKET BIT(2)
310#define FILTER_SELF_RECEIVE BIT(0)
311
312/* EEPROM Control Register (BMPR 16) */
313#define EEPROM_CTRL_REG 16
314
315/* EEPROM Data Register (BMPR 17) */
316#define EEPROM_DATA_REG 17
317
318/* NMC93CSx6 EEPROM Control Bits */
319#define CS_0 0x00
320#define CS_1 0x20
321#define SK_0 0x00
322#define SK_1 0x40
323#define DI_0 0x00
324#define DI_1 0x80
325
326/* NMC93CSx6 EEPROM Instructions */
327#define EEPROM_READ 0x80
328
329/* NMC93CSx6 EEPROM Addresses */
330#define E_NODEID_0 0x02
331#define E_NODEID_1 0x03
332#define E_NODEID_2 0x04
333#define E_PORT_SELECT 0x14
334 #define E_PORT_BNC 0x00
335 #define E_PORT_DIX 0x01
336 #define E_PORT_TP 0x02
337 #define E_PORT_AUTO 0x03
338 #define E_PORT_FROM_EPROM 0x04
339#define E_PRODUCT_CFG 0x30
6aa20a22 340
1da177e4
LT		 341
342/* Macro to slow down io between EEPROM clock transitions */
343#define eeprom_slow_io() do { int _i = 40; while(--_i > 0) { inb(0x80); }}while(0)
344
345/* Jumperless Configuration Register (BMPR19) */
346#define JUMPERLESS_CONFIG 19
347
348/* ID ROM registers, writing to them also resets some parts of chip */
349#define ID_ROM_0 24
350#define ID_ROM_7 31
351#define RESET ID_ROM_0
352
353/* This is the I/O address list to be probed when seeking the card */
354static unsigned int eth16i_portlist[] __initdata = {
6aa20a22 355 0x260, 0x280, 0x2A0, 0x240, 0x340, 0x320, 0x380, 0x300, 0
1da177e4
LT		 356};
357
6aa20a22 358static unsigned int eth32i_portlist[] __initdata = {
1da177e4 359 0x1000, 0x2000, 0x3000, 0x4000, 0x5000, 0x6000, 0x7000, 0x8000,
6aa20a22 360 0x9000, 0xA000, 0xB000, 0xC000, 0xD000, 0xE000, 0xF000, 0
1da177e4
LT		 361};
362
363/* This is the Interrupt lookup table for Eth16i card */
364static unsigned int eth16i_irqmap[] __initdata = { 9, 10, 5, 15, 0 };
365#define NUM_OF_ISA_IRQS 4
366
367/* This is the Interrupt lookup table for Eth32i card */
6aa20a22 368static unsigned int eth32i_irqmap[] __initdata = { 3, 5, 7, 9, 10, 11, 12, 15, 0 };
1da177e4
LT		 369#define EISA_IRQ_REG 0xc89
370#define NUM_OF_EISA_IRQS 8
371
372static unsigned int eth16i_tx_buf_map[] = { 2048, 2048, 4096, 8192 };
373
374/* Use 0 for production, 1 for verification, >2 for debug */
375#ifndef ETH16I_DEBUG
376#define ETH16I_DEBUG 0
377#endif
378static unsigned int eth16i_debug = ETH16I_DEBUG;
379
380/* Information for each board */
381
382struct eth16i_local {
383 struct net_device_stats stats;
384 unsigned char tx_started;
385 unsigned char tx_buf_busy;
386 unsigned short tx_queue; /* Number of packets in transmit buffer */
6aa20a22 387 unsigned short tx_queue_len;
1da177e4
LT		 388 unsigned int tx_buf_size;
389 unsigned long open_time;
390 unsigned long tx_buffered_packets;
391 unsigned long tx_buffered_bytes;
392 unsigned long col_16;
393 spinlock_t lock;
394};
395
396/* Function prototypes */
397
398static int eth16i_probe1(struct net_device *dev, int ioaddr);
399static int eth16i_check_signature(int ioaddr);
400static int eth16i_probe_port(int ioaddr);
401static void eth16i_set_port(int ioaddr, int porttype);
402static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l);
403static int eth16i_receive_probe_packet(int ioaddr);
404static int eth16i_get_irq(int ioaddr);
405static int eth16i_read_eeprom(int ioaddr, int offset);
406static int eth16i_read_eeprom_word(int ioaddr);
407static void eth16i_eeprom_cmd(int ioaddr, unsigned char command);
408static int eth16i_open(struct net_device *dev);
409static int eth16i_close(struct net_device *dev);
410static int eth16i_tx(struct sk_buff *skb, struct net_device *dev);
411static void eth16i_rx(struct net_device *dev);
412static void eth16i_timeout(struct net_device *dev);
7d12e780 413static irqreturn_t eth16i_interrupt(int irq, void *dev_id);
1da177e4
LT		 414static void eth16i_reset(struct net_device *dev);
415static void eth16i_timeout(struct net_device *dev);
416static void eth16i_skip_packet(struct net_device *dev);
6aa20a22 417static void eth16i_multicast(struct net_device *dev);
1da177e4
LT		 418static void eth16i_select_regbank(unsigned char regbank, int ioaddr);
419static void eth16i_initialize(struct net_device *dev, int boot);
420
421#if 0
422static int eth16i_set_irq(struct net_device *dev);
423#endif
424
425#ifdef MODULE
426static ushort eth16i_parse_mediatype(const char* s);
427#endif
428
429static struct net_device_stats *eth16i_get_stats(struct net_device *dev);
430
431static char cardname[] __initdata = "ICL EtherTeam 16i/32";
432
433static int __init do_eth16i_probe(struct net_device *dev)
434{
435 int i;
436 int ioaddr;
437 int base_addr = dev->base_addr;
6aa20a22 438
1da177e4
LT		 439 SET_MODULE_OWNER(dev);
440
6aa20a22 441 if(eth16i_debug > 4)
1da177e4
LT		 442 printk(KERN_DEBUG "Probing started for %s\n", cardname);
443
444 if(base_addr > 0x1ff) /* Check only single location */
445 return eth16i_probe1(dev, base_addr);
446 else if(base_addr != 0) /* Don't probe at all */
447 return -ENXIO;
448
449 /* Seek card from the ISA io address space */
450 for(i = 0; (ioaddr = eth16i_portlist[i]) ; i++)
451 if(eth16i_probe1(dev, ioaddr) == 0)
452 return 0;
453
454 /* Seek card from the EISA io address space */
455 for(i = 0; (ioaddr = eth32i_portlist[i]) ; i++)
456 if(eth16i_probe1(dev, ioaddr) == 0)
457 return 0;
458
459 return -ENODEV;
460}
461
462#ifndef MODULE
463struct net_device * __init eth16i_probe(int unit)
464{
465 struct net_device *dev = alloc_etherdev(sizeof(struct eth16i_local));
466 int err;
467
468 if (!dev)
469 return ERR_PTR(-ENOMEM);
470
471 sprintf(dev->name, "eth%d", unit);
472 netdev_boot_setup_check(dev);
473
474 err = do_eth16i_probe(dev);
475 if (err)
476 goto out;
1da177e4 477 return dev;
1da177e4
LT		 478out:
479 free_netdev(dev);
480 return ERR_PTR(err);
481}
482#endif
483
484static int __init eth16i_probe1(struct net_device *dev, int ioaddr)
485{
486 struct eth16i_local *lp = netdev_priv(dev);
487 static unsigned version_printed;
488 int retval;
489
490 /* Let's grab the region */
491 if (!request_region(ioaddr, ETH16I_IO_EXTENT, cardname))
492 return -EBUSY;
493
494 /*
6aa20a22 495 The MB86985 chip has on register which holds information in which
1da177e4
LT		 496 io address the chip lies. First read this register and compare
497 it to our current io address and if match then this could
498 be our chip.
499 */
500
501 if(ioaddr < 0x1000) {
6aa20a22 502 if(eth16i_portlist[(inb(ioaddr + JUMPERLESS_CONFIG) & 0x07)]
1da177e4
LT		 503 != ioaddr) {
504 retval = -ENODEV;
505 goto out;
506 }
507 }
508
509 /* Now we will go a bit deeper and try to find the chip's signature */
510
511 if(eth16i_check_signature(ioaddr) != 0) {
512 retval = -ENODEV;
513 goto out;
514 }
515
6aa20a22 516 /*
1da177e4 517 Now it seems that we have found a ethernet chip in this particular
6aa20a22 518 ioaddr. The MB86985 chip has this feature, that when you read a
1da177e4
LT		 519 certain register it will increase it's io base address to next
520 configurable slot. Now when we have found the chip, first thing is
521 to make sure that the chip's ioaddr will hold still here.
522 */
523
524 eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
525 outb(0x00, ioaddr + TRANSCEIVER_MODE_REG);
526
527 outb(0x00, ioaddr + RESET); /* Reset some parts of chip */
528 BITSET(ioaddr + CONFIG_REG_0, BIT(7)); /* Disable the data link */
529
530 if( (eth16i_debug & version_printed++) == 0)
531 printk(KERN_INFO "%s", version);
532
533 dev->base_addr = ioaddr;
534 dev->irq = eth16i_get_irq(ioaddr);
535
536 /* Try to obtain interrupt vector */
537
538 if ((retval = request_irq(dev->irq, (void *)&eth16i_interrupt, 0, cardname, dev))) {
6aa20a22 539 printk(KERN_WARNING "%s at %#3x, but is unusable due to conflicting IRQ %d.\n",
1da177e4
LT		 540 cardname, ioaddr, dev->irq);
541 goto out;
542 }
543
544 printk(KERN_INFO "%s: %s at %#3x, IRQ %d, ",
545 dev->name, cardname, ioaddr, dev->irq);
546
547
548 /* Now we will have to lock the chip's io address */
549 eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
6aa20a22 550 outb(0x38, ioaddr + TRANSCEIVER_MODE_REG);
1da177e4
LT		 551
552 eth16i_initialize(dev, 1); /* Initialize rest of the chip's registers */
553
554 /* Now let's same some energy by shutting down the chip ;) */
555 BITCLR(ioaddr + CONFIG_REG_1, POWERUP);
556
557 /* Initialize the device structure */
558 memset(lp, 0, sizeof(struct eth16i_local));
559 dev->open = eth16i_open;
560 dev->stop = eth16i_close;
561 dev->hard_start_xmit = eth16i_tx;
562 dev->get_stats = eth16i_get_stats;
563 dev->set_multicast_list = eth16i_multicast;
564 dev->tx_timeout = eth16i_timeout;
565 dev->watchdog_timeo = TX_TIMEOUT;
566 spin_lock_init(&lp->lock);
b1fc5505
HX		 567
568 retval = register_netdev(dev);
569 if (retval)
570 goto out1;
1da177e4 571 return 0;
b1fc5505
HX		 572out1:
573 free_irq(dev->irq, dev);
1da177e4
LT		 574out:
575 release_region(ioaddr, ETH16I_IO_EXTENT);
576 return retval;
577}
578
579
580static void eth16i_initialize(struct net_device *dev, int boot)
581{
582 int ioaddr = dev->base_addr;
583 int i, node_w = 0;
584 unsigned char node_byte = 0;
585
586 /* Setup station address */
587 eth16i_select_regbank(NODE_ID_RB, ioaddr);
588 for(i = 0 ; i < 3 ; i++) {
589 unsigned short node_val = eth16i_read_eeprom(ioaddr, E_NODEID_0 + i);
590 ((unsigned short *)dev->dev_addr)[i] = ntohs(node_val);
591 }
592
6aa20a22 593 for(i = 0; i < 6; i++) {
1da177e4
LT		 594 outb( ((unsigned char *)dev->dev_addr)[i], ioaddr + NODE_ID_0 + i);
595 if(boot) {
596 printk("%02x", inb(ioaddr + NODE_ID_0 + i));
597 if(i != 5)
598 printk(":");
599 }
600 }
601
602 /* Now we will set multicast addresses to accept none */
603 eth16i_select_regbank(HASH_TABLE_RB, ioaddr);
6aa20a22 604 for(i = 0; i < 8; i++)
1da177e4
LT		 605 outb(0x00, ioaddr + HASH_TABLE_0 + i);
606
607 /*
6aa20a22 608 Now let's disable the transmitter and receiver, set the buffer ram
1da177e4
LT		 609 cycle time, bus width and buffer data path width. Also we shall
610 set transmit buffer size and total buffer size.
611 */
612
613 eth16i_select_regbank(2, ioaddr);
614
615 node_byte = 0;
616 node_w = eth16i_read_eeprom(ioaddr, E_PRODUCT_CFG);
617
618 if( (node_w & 0xFF00) == 0x0800)
619 node_byte |= BUFFER_WIDTH_8;
620
621 node_byte |= SRAM_BS1;
622
623 if( (node_w & 0x00FF) == 64)
624 node_byte |= SRAM_BS0;
625
626 node_byte |= DLC_EN | SRAM_CYCLE_TIME_100NS | (ETH16I_TX_BUF_SIZE << 2);
627
628 outb(node_byte, ioaddr + CONFIG_REG_0);
629
630 /* We shall halt the transmitting, if 16 collisions are detected */
631 outb(HALT_ON_16, ioaddr + COL_16_REG);
632
633#ifdef MODULE
634 /* if_port already set by init_module() */
635#else
6aa20a22 636 dev->if_port = (dev->mem_start < E_PORT_FROM_EPROM) ?
1da177e4
LT		 637 dev->mem_start : E_PORT_FROM_EPROM;
638#endif
639
640 /* Set interface port type */
641 if(boot) {
642 char *porttype[] = {"BNC", "DIX", "TP", "AUTO", "FROM_EPROM" };
643
644 switch(dev->if_port)
645 {
646
647 case E_PORT_FROM_EPROM:
648 dev->if_port = eth16i_read_eeprom(ioaddr, E_PORT_SELECT);
649 break;
650
651 case E_PORT_AUTO:
652 dev->if_port = eth16i_probe_port(ioaddr);
653 break;
6aa20a22 654
1da177e4
LT		 655 case E_PORT_BNC:
656 case E_PORT_TP:
657 case E_PORT_DIX:
658 break;
659 }
660
661 printk(" %s interface.\n", porttype[dev->if_port]);
662
663 eth16i_set_port(ioaddr, dev->if_port);
664 }
665
666 /* Set Receive Mode to normal operation */
667 outb(MODE_2, ioaddr + RECEIVE_MODE_REG);
668}
669
670static int eth16i_probe_port(int ioaddr)
671{
672 int i;
673 int retcode;
674 unsigned char dummy_packet[64];
675
676 /* Powerup the chip */
677 outb(0xc0 | POWERUP, ioaddr + CONFIG_REG_1);
678
679 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
680
681 eth16i_select_regbank(NODE_ID_RB, ioaddr);
682
683 for(i = 0; i < 6; i++) {
684 dummy_packet[i] = inb(ioaddr + NODE_ID_0 + i);
685 dummy_packet[i+6] = inb(ioaddr + NODE_ID_0 + i);
686 }
687
688 dummy_packet[12] = 0x00;
689 dummy_packet[13] = 0x04;
690 memset(dummy_packet + 14, 0, sizeof(dummy_packet) - 14);
691
692 eth16i_select_regbank(2, ioaddr);
693
694 for(i = 0; i < 3; i++) {
695 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
696 BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
697 eth16i_set_port(ioaddr, i);
698
699 if(eth16i_debug > 1)
700 printk(KERN_DEBUG "Set port number %d\n", i);
701
702 retcode = eth16i_send_probe_packet(ioaddr, dummy_packet, 64);
703 if(retcode == 0) {
704 retcode = eth16i_receive_probe_packet(ioaddr);
705 if(retcode != -1) {
706 if(eth16i_debug > 1)
707 printk(KERN_DEBUG "Eth16i interface port found at %d\n", i);
708 return i;
709 }
710 }
711 else {
712 if(eth16i_debug > 1)
713 printk(KERN_DEBUG "TRANSMIT_DONE timeout when probing interface port\n");
714 }
715 }
716
717 if( eth16i_debug > 1)
718 printk(KERN_DEBUG "Using default port\n");
719
720 return E_PORT_BNC;
721}
722
723static void eth16i_set_port(int ioaddr, int porttype)
6aa20a22 724{
1da177e4
LT		 725 unsigned short temp = 0;
726
727 eth16i_select_regbank(TRANSCEIVER_MODE_RB, ioaddr);
728 outb(LOOPBACK_CONTROL, ioaddr + TRANSMIT_MODE_REG);
729
730 temp |= DIS_AUTO_PORT_SEL;
731
732 switch(porttype) {
733
734 case E_PORT_BNC :
735 temp |= AUI_SELECT;
736 break;
737
738 case E_PORT_TP :
739 break;
740
741 case E_PORT_DIX :
742 temp |= AUI_SELECT;
743 BITSET(ioaddr + TRANSMIT_MODE_REG, CONTROL_OUTPUT);
744 break;
6aa20a22 745 }
1da177e4
LT		 746
747 outb(temp, ioaddr + TRANSCEIVER_MODE_REG);
748
749 if(eth16i_debug > 1) {
750 printk(KERN_DEBUG "TRANSMIT_MODE_REG = %x\n", inb(ioaddr + TRANSMIT_MODE_REG));
6aa20a22 751 printk(KERN_DEBUG "TRANSCEIVER_MODE_REG = %x\n",
1da177e4
LT		 752 inb(ioaddr+TRANSCEIVER_MODE_REG));
753 }
754}
755
756static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l)
757{
ff5688ae 758 unsigned long starttime;
1da177e4
LT		 759
760 outb(0xff, ioaddr + TX_STATUS_REG);
761
762 outw(l, ioaddr + DATAPORT);
6aa20a22 763 outsw(ioaddr + DATAPORT, (unsigned short *)b, (l + 1) >> 1);
1da177e4
LT		 764
765 starttime = jiffies;
6aa20a22 766 outb(TX_START | 1, ioaddr + TRANSMIT_START_REG);
1da177e4
LT		 767
768 while( (inb(ioaddr + TX_STATUS_REG) & 0x80) == 0) {
ff5688ae 769 if( time_after(jiffies, starttime + TX_TIMEOUT)) {
1da177e4
LT		 770 return -1;
771 }
772 }
773
774 return 0;
775}
776
777static int eth16i_receive_probe_packet(int ioaddr)
778{
ff5688ae 779 unsigned long starttime;
1da177e4
LT		 780
781 starttime = jiffies;
782
783 while((inb(ioaddr + TX_STATUS_REG) & 0x20) == 0) {
ff5688ae 784 if( time_after(jiffies, starttime + TX_TIMEOUT)) {
1da177e4
LT		 785
786 if(eth16i_debug > 1)
787 printk(KERN_DEBUG "Timeout occurred waiting transmit packet received\n");
788 starttime = jiffies;
789 while((inb(ioaddr + RX_STATUS_REG) & 0x80) == 0) {
ff5688ae 790 if( time_after(jiffies, starttime + TX_TIMEOUT)) {
1da177e4
LT		 791 if(eth16i_debug > 1)
792 printk(KERN_DEBUG "Timeout occurred waiting receive packet\n");
793 return -1;
794 }
795 }
796
797 if(eth16i_debug > 1)
798 printk(KERN_DEBUG "RECEIVE_PACKET\n");
799 return(0); /* Found receive packet */
800 }
801 }
802
803 if(eth16i_debug > 1) {
804 printk(KERN_DEBUG "TRANSMIT_PACKET_RECEIVED %x\n", inb(ioaddr + TX_STATUS_REG));
805 printk(KERN_DEBUG "RX_STATUS_REG = %x\n", inb(ioaddr + RX_STATUS_REG));
806 }
807
808 return(0); /* Return success */
809}
810
811#if 0
812static int eth16i_set_irq(struct net_device* dev)
813{
814 const int ioaddr = dev->base_addr;
815 const int irq = dev->irq;
816 int i = 0;
817
6aa20a22 818 if(ioaddr < 0x1000) {
1da177e4
LT		 819 while(eth16i_irqmap[i] && eth16i_irqmap[i] != irq)
820 i++;
6aa20a22 821
1da177e4
LT		 822 if(i < NUM_OF_ISA_IRQS) {
823 u8 cbyte = inb(ioaddr + JUMPERLESS_CONFIG);
824 cbyte = (cbyte & 0x3F) | (i << 6);
825 outb(cbyte, ioaddr + JUMPERLESS_CONFIG);
826 return 0;
827 }
828 }
829 else {
830 printk(KERN_NOTICE "%s: EISA Interrupt cannot be set. Use EISA Configuration utility.\n", dev->name);
831 }
6aa20a22 832
1da177e4
LT		 833 return -1;
834
835}
836#endif
837
838static int __init eth16i_get_irq(int ioaddr)
839{
840 unsigned char cbyte;
841
842 if( ioaddr < 0x1000) {
843 cbyte = inb(ioaddr + JUMPERLESS_CONFIG);
844 return( eth16i_irqmap[ ((cbyte & 0xC0) >> 6) ] );
845 } else { /* Oh..the card is EISA so method getting IRQ different */
846 unsigned short index = 0;
847 cbyte = inb(ioaddr + EISA_IRQ_REG);
848 while( (cbyte & 0x01) == 0) {
849 cbyte = cbyte >> 1;
850 index++;
851 }
852 return( eth32i_irqmap[ index ] );
853 }
854}
855
856static int __init eth16i_check_signature(int ioaddr)
857{
858 int i;
859 unsigned char creg[4] = { 0 };
860
861 for(i = 0; i < 4 ; i++) {
862
863 creg[i] = inb(ioaddr + TRANSMIT_MODE_REG + i);
864
865 if(eth16i_debug > 1)
6aa20a22 866 printk("eth16i: read signature byte %x at %x\n",
1da177e4
LT		 867 creg[i],
868 ioaddr + TRANSMIT_MODE_REG + i);
869 }
870
871 creg[0] &= 0x0F; /* Mask collision cnr */
872 creg[2] &= 0x7F; /* Mask DCLEN bit */
873
874#if 0
6aa20a22 875 /*
1da177e4
LT		 876 This was removed because the card was sometimes left to state
877 from which it couldn't be find anymore. If there is need
878 to more strict check still this have to be fixed.
879 */
880 if( ! ((creg[0] == 0x06) && (creg[1] == 0x41)) ) {
881 if(creg[1] != 0x42)
882 return -1;
883 }
884#endif
885
886 if( !((creg[2] == 0x36) && (creg[3] == 0xE0)) ) {
887 creg[2] &= 0x40;
888 creg[3] &= 0x03;
6aa20a22 889
1da177e4
LT		 890 if( !((creg[2] == 0x40) && (creg[3] == 0x00)) )
891 return -1;
892 }
6aa20a22 893
1da177e4
LT		 894 if(eth16i_read_eeprom(ioaddr, E_NODEID_0) != 0)
895 return -1;
6aa20a22 896
1da177e4
LT		 897 if((eth16i_read_eeprom(ioaddr, E_NODEID_1) & 0xFF00) != 0x4B00)
898 return -1;
899
900 return 0;
901}
902
903static int eth16i_read_eeprom(int ioaddr, int offset)
904{
905 int data = 0;
906
907 eth16i_eeprom_cmd(ioaddr, EEPROM_READ | offset);
908 outb(CS_1, ioaddr + EEPROM_CTRL_REG);
909 data = eth16i_read_eeprom_word(ioaddr);
910 outb(CS_0 | SK_0, ioaddr + EEPROM_CTRL_REG);
911
6aa20a22 912 return(data);
1da177e4
LT		 913}
914
915static int eth16i_read_eeprom_word(int ioaddr)
916{
917 int i;
918 int data = 0;
6aa20a22 919
1da177e4
LT		 920 for(i = 16; i > 0; i--) {
921 outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
922 eeprom_slow_io();
923 outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
924 eeprom_slow_io();
6aa20a22 925 data = (data << 1) |
1da177e4 926 ((inb(ioaddr + EEPROM_DATA_REG) & DI_1) ? 1 : 0);
6aa20a22 927
1da177e4
LT		 928 eeprom_slow_io();
929 }
930
931 return(data);
932}
933
934static void eth16i_eeprom_cmd(int ioaddr, unsigned char command)
935{
936 int i;
937
938 outb(CS_0 | SK_0, ioaddr + EEPROM_CTRL_REG);
939 outb(DI_0, ioaddr + EEPROM_DATA_REG);
940 outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
941 outb(DI_1, ioaddr + EEPROM_DATA_REG);
942 outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
943
944 for(i = 7; i >= 0; i--) {
945 short cmd = ( (command & (1 << i)) ? DI_1 : DI_0 );
946 outb(cmd, ioaddr + EEPROM_DATA_REG);
947 outb(CS_1 | SK_0, ioaddr + EEPROM_CTRL_REG);
948 eeprom_slow_io();
949 outb(CS_1 | SK_1, ioaddr + EEPROM_CTRL_REG);
950 eeprom_slow_io();
6aa20a22 951 }
1da177e4
LT		 952}
953
954static int eth16i_open(struct net_device *dev)
955{
956 struct eth16i_local *lp = netdev_priv(dev);
957 int ioaddr = dev->base_addr;
6aa20a22 958
1da177e4
LT		 959 /* Powerup the chip */
960 outb(0xc0 | POWERUP, ioaddr + CONFIG_REG_1);
961
962 /* Initialize the chip */
6aa20a22 963 eth16i_initialize(dev, 0);
1da177e4
LT		 964
965 /* Set the transmit buffer size */
966 lp->tx_buf_size = eth16i_tx_buf_map[ETH16I_TX_BUF_SIZE & 0x03];
967
968 if(eth16i_debug > 0)
6aa20a22 969 printk(KERN_DEBUG "%s: transmit buffer size %d\n",
1da177e4
LT		 970 dev->name, lp->tx_buf_size);
971
972 /* Now enable Transmitter and Receiver sections */
973 BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
974
975 /* Now switch to register bank 2, for run time operation */
976 eth16i_select_regbank(2, ioaddr);
977
978 lp->open_time = jiffies;
979 lp->tx_started = 0;
980 lp->tx_queue = 0;
981 lp->tx_queue_len = 0;
982
983 /* Turn on interrupts*/
6aa20a22 984 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1da177e4
LT		 985
986 netif_start_queue(dev);
987 return 0;
988}
989
990static int eth16i_close(struct net_device *dev)
991{
992 struct eth16i_local *lp = netdev_priv(dev);
993 int ioaddr = dev->base_addr;
994
995 eth16i_reset(dev);
996
997 /* Turn off interrupts*/
6aa20a22 998 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
1da177e4
LT		 999
1000 netif_stop_queue(dev);
6aa20a22 1001
1da177e4
LT		 1002 lp->open_time = 0;
1003
1004 /* Disable transmit and receive */
1005 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
1006
1007 /* Reset the chip */
1008 /* outb(0xff, ioaddr + RESET); */
1009 /* outw(0xffff, ioaddr + TX_STATUS_REG); */
6aa20a22 1010
1da177e4
LT		 1011 outb(0x00, ioaddr + CONFIG_REG_1);
1012
1013 return 0;
1014}
1015
1016static void eth16i_timeout(struct net_device *dev)
1017{
1018 struct eth16i_local *lp = netdev_priv(dev);
1019 int ioaddr = dev->base_addr;
6aa20a22
JG		 1020 /*
1021 If we get here, some higher level has decided that
1022 we are broken. There should really be a "kick me"
1023 function call instead.
1da177e4
LT		 1024 */
1025
1026 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
6aa20a22 1027 printk(KERN_WARNING "%s: transmit timed out with status %04x, %s ?\n",
1da177e4 1028 dev->name,
6aa20a22 1029 inw(ioaddr + TX_STATUS_REG), (inb(ioaddr + TX_STATUS_REG) & TX_DONE) ?
1da177e4
LT		 1030 "IRQ conflict" : "network cable problem");
1031
1032 dev->trans_start = jiffies;
1033
1034 /* Let's dump all registers */
6aa20a22 1035 if(eth16i_debug > 0) {
1da177e4 1036 printk(KERN_DEBUG "%s: timeout: %02x %02x %02x %02x %02x %02x %02x %02x.\n",
6aa20a22
JG		 1037 dev->name, inb(ioaddr + 0),
1038 inb(ioaddr + 1), inb(ioaddr + 2),
1039 inb(ioaddr + 3), inb(ioaddr + 4),
1da177e4
LT		 1040 inb(ioaddr + 5),
1041 inb(ioaddr + 6), inb(ioaddr + 7));
1042
1043 printk(KERN_DEBUG "%s: transmit start reg: %02x. collision reg %02x\n",
1044 dev->name, inb(ioaddr + TRANSMIT_START_REG),
1045 inb(ioaddr + COL_16_REG));
1046 printk(KERN_DEBUG "lp->tx_queue = %d\n", lp->tx_queue);
1047 printk(KERN_DEBUG "lp->tx_queue_len = %d\n", lp->tx_queue_len);
1048 printk(KERN_DEBUG "lp->tx_started = %d\n", lp->tx_started);
1049 }
1050 lp->stats.tx_errors++;
1051 eth16i_reset(dev);
1052 dev->trans_start = jiffies;
1053 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1054 netif_wake_queue(dev);
1055}
1056
1057static int eth16i_tx(struct sk_buff *skb, struct net_device *dev)
1058{
1059 struct eth16i_local *lp = netdev_priv(dev);
1060 int ioaddr = dev->base_addr;
1061 int status = 0;
1062 ushort length = skb->len;
1063 unsigned char *buf;
1064 unsigned long flags;
1065
1066 if (length < ETH_ZLEN) {
5b057c6b 1067 if (skb_padto(skb, ETH_ZLEN))
1da177e4
LT		 1068 return 0;
1069 length = ETH_ZLEN;
1070 }
1071 buf = skb->data;
1072
1073 netif_stop_queue(dev);
6aa20a22 1074
1da177e4
LT		 1075 /* Turn off TX interrupts */
1076 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
6aa20a22 1077
1da177e4
LT		 1078 /* We would be better doing the disable_irq tricks the 3c509 does,
1079 that would make this suck a lot less */
6aa20a22 1080
1da177e4
LT		 1081 spin_lock_irqsave(&lp->lock, flags);
1082
1083 if( (length + 2) > (lp->tx_buf_size - lp->tx_queue_len)) {
6aa20a22
JG		 1084 if(eth16i_debug > 0)
1085 printk(KERN_WARNING "%s: Transmit buffer full.\n", dev->name);
1086 }
1da177e4
LT		 1087 else {
1088 outw(length, ioaddr + DATAPORT);
1089
6aa20a22 1090 if( ioaddr < 0x1000 )
1da177e4
LT		 1091 outsw(ioaddr + DATAPORT, buf, (length + 1) >> 1);
1092 else {
1093 unsigned char frag = length % 4;
1094 outsl(ioaddr + DATAPORT, buf, length >> 2);
1095 if( frag != 0 ) {
1096 outsw(ioaddr + DATAPORT, (buf + (length & 0xFFFC)), 1);
6aa20a22
JG		 1097 if( frag == 3 )
1098 outsw(ioaddr + DATAPORT,
1da177e4
LT		 1099 (buf + (length & 0xFFFC) + 2), 1);
1100 }
1101 }
1102 lp->tx_buffered_packets++;
1103 lp->tx_buffered_bytes = length;
1104 lp->tx_queue++;
1105 lp->tx_queue_len += length + 2;
1106 }
1107 lp->tx_buf_busy = 0;
1108
1109 if(lp->tx_started == 0) {
1110 /* If the transmitter is idle..always trigger a transmit */
1111 outb(TX_START | lp->tx_queue, ioaddr + TRANSMIT_START_REG);
1112 lp->tx_queue = 0;
1113 lp->tx_queue_len = 0;
1114 dev->trans_start = jiffies;
1115 lp->tx_started = 1;
1116 netif_wake_queue(dev);
1117 }
1118 else if(lp->tx_queue_len < lp->tx_buf_size - (ETH_FRAME_LEN + 2)) {
1119 /* There is still more room for one more packet in tx buffer */
1120 netif_wake_queue(dev);
1121 }
6aa20a22 1122
1da177e4 1123 spin_unlock_irqrestore(&lp->lock, flags);
6aa20a22 1124
1da177e4
LT		 1125 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
1126 /* Turn TX interrupts back on */
1127 /* outb(TX_INTR_DONE | TX_INTR_16_COL, ioaddr + TX_INTR_REG); */
1128 status = 0;
1129 dev_kfree_skb(skb);
1130 return 0;
1131}
1132
1133static void eth16i_rx(struct net_device *dev)
1134{
1135 struct eth16i_local *lp = netdev_priv(dev);
1136 int ioaddr = dev->base_addr;
1137 int boguscount = MAX_RX_LOOP;
1138
1139 /* Loop until all packets have been read */
1140 while( (inb(ioaddr + RECEIVE_MODE_REG) & RX_BUFFER_EMPTY) == 0) {
1141
6aa20a22 1142 /* Read status byte from receive buffer */
1da177e4
LT		 1143 ushort status = inw(ioaddr + DATAPORT);
1144
1145 /* Get the size of the packet from receive buffer */
1146 ushort pkt_len = inw(ioaddr + DATAPORT);
1147
1148 if(eth16i_debug > 4)
6aa20a22
JG		 1149 printk(KERN_DEBUG "%s: Receiving packet mode %02x status %04x.\n",
1150 dev->name,
1da177e4 1151 inb(ioaddr + RECEIVE_MODE_REG), status);
6aa20a22 1152
1da177e4
LT		 1153 if( !(status & PKT_GOOD) ) {
1154 lp->stats.rx_errors++;
1155
1156 if( (pkt_len < ETH_ZLEN) || (pkt_len > ETH_FRAME_LEN) ) {
1157 lp->stats.rx_length_errors++;
1158 eth16i_reset(dev);
6aa20a22 1159 return;
1da177e4 1160 }
6aa20a22 1161 else {
1da177e4
LT		 1162 eth16i_skip_packet(dev);
1163 lp->stats.rx_dropped++;
6aa20a22 1164 }
1da177e4
LT		 1165 }
1166 else { /* Ok so now we should have a good packet */
1167 struct sk_buff *skb;
1168
1169 skb = dev_alloc_skb(pkt_len + 3);
1170 if( skb == NULL ) {
6aa20a22 1171 printk(KERN_WARNING "%s: Could'n allocate memory for packet (len %d)\n",
1da177e4
LT		 1172 dev->name, pkt_len);
1173 eth16i_skip_packet(dev);
1174 lp->stats.rx_dropped++;
1175 break;
1176 }
1177
1178 skb->dev = dev;
1179 skb_reserve(skb,2);
6aa20a22
JG		 1180
1181 /*
1da177e4
LT		 1182 Now let's get the packet out of buffer.
1183 size is (pkt_len + 1) >> 1, cause we are now reading words
1184 and it have to be even aligned.
6aa20a22
JG		 1185 */
1186
1187 if(ioaddr < 0x1000)
1188 insw(ioaddr + DATAPORT, skb_put(skb, pkt_len),
1da177e4 1189 (pkt_len + 1) >> 1);
6aa20a22 1190 else {
1da177e4
LT		 1191 unsigned char *buf = skb_put(skb, pkt_len);
1192 unsigned char frag = pkt_len % 4;
1193
1194 insl(ioaddr + DATAPORT, buf, pkt_len >> 2);
1195
1196 if(frag != 0) {
1197 unsigned short rest[2];
1198 rest[0] = inw( ioaddr + DATAPORT );
1199 if(frag == 3)
1200 rest[1] = inw( ioaddr + DATAPORT );
1201
1202 memcpy(buf + (pkt_len & 0xfffc), (char *)rest, frag);
1203 }
1204 }
1205
1206 skb->protocol=eth_type_trans(skb, dev);
1207
1208 if( eth16i_debug > 5 ) {
1209 int i;
6aa20a22 1210 printk(KERN_DEBUG "%s: Received packet of length %d.\n",
1da177e4 1211 dev->name, pkt_len);
6aa20a22 1212 for(i = 0; i < 14; i++)
1da177e4
LT		 1213 printk(KERN_DEBUG " %02x", skb->data[i]);
1214 printk(KERN_DEBUG ".\n");
1215 }
1216 netif_rx(skb);
1217 dev->last_rx = jiffies;
1218 lp->stats.rx_packets++;
1219 lp->stats.rx_bytes += pkt_len;
1220
1221 } /* else */
1222
1223 if(--boguscount <= 0)
1224 break;
1225
1226 } /* while */
1227}
1228
7d12e780 1229static irqreturn_t eth16i_interrupt(int irq, void *dev_id)
1da177e4
LT		 1230{
1231 struct net_device *dev = dev_id;
1232 struct eth16i_local *lp;
1233 int ioaddr = 0, status;
1234 int handled = 0;
1235
1236 ioaddr = dev->base_addr;
1237 lp = netdev_priv(dev);
1238
1239 /* Turn off all interrupts from adapter */
1240 outw(ETH16I_INTR_OFF, ioaddr + TX_INTR_REG);
1241
1242 /* eth16i_tx won't be called */
1243 spin_lock(&lp->lock);
1244
1245 status = inw(ioaddr + TX_STATUS_REG); /* Get the status */
1246 outw(status, ioaddr + TX_STATUS_REG); /* Clear status bits */
1247
1248 if (status)
1249 handled = 1;
1250
1251 if(eth16i_debug > 3)
1252 printk(KERN_DEBUG "%s: Interrupt with status %04x.\n", dev->name, status);
1253
1254 if( status & 0x7f00 ) {
1255
1256 lp->stats.rx_errors++;
1257
6aa20a22 1258 if(status & (BUS_RD_ERR << 8) )
1da177e4
LT		 1259 printk(KERN_WARNING "%s: Bus read error.\n",dev->name);
1260 if(status & (SHORT_PKT_ERR << 8) ) lp->stats.rx_length_errors++;
1261 if(status & (ALIGN_ERR << 8) ) lp->stats.rx_frame_errors++;
1262 if(status & (CRC_ERR << 8) ) lp->stats.rx_crc_errors++;
1263 if(status & (RX_BUF_OVERFLOW << 8) ) lp->stats.rx_over_errors++;
1264 }
1265 if( status & 0x001a) {
1266
1267 lp->stats.tx_errors++;
1268
1269 if(status & CR_LOST) lp->stats.tx_carrier_errors++;
1270 if(status & TX_JABBER_ERR) lp->stats.tx_window_errors++;
1271
6aa20a22 1272#if 0
1da177e4 1273 if(status & COLLISION) {
6aa20a22 1274 lp->stats.collisions +=
1da177e4
LT		 1275 ((inb(ioaddr+TRANSMIT_MODE_REG) & 0xF0) >> 4);
1276 }
1277#endif
1278 if(status & COLLISIONS_16) {
6aa20a22 1279 if(lp->col_16 < MAX_COL_16) {
1da177e4
LT		 1280 lp->col_16++;
1281 lp->stats.collisions++;
1282 /* Resume transmitting, skip failed packet */
1283 outb(0x02, ioaddr + COL_16_REG);
1284 }
1285 else {
1286 printk(KERN_WARNING "%s: bailing out due to many consecutive 16-in-a-row collisions. Network cable problem?\n", dev->name);
1287 }
1288 }
1289 }
1290
1291 if( status & 0x00ff ) { /* Let's check the transmit status reg */
1292
1293 if(status & TX_DONE) { /* The transmit has been done */
1294 lp->stats.tx_packets = lp->tx_buffered_packets;
1295 lp->stats.tx_bytes += lp->tx_buffered_bytes;
6aa20a22 1296 lp->col_16 = 0;
1da177e4
LT		 1297
1298 if(lp->tx_queue) { /* Is there still packets ? */
1299 /* There was packet(s) so start transmitting and write also
1300 how many packets there is to be sended */
1301 outb(TX_START | lp->tx_queue, ioaddr + TRANSMIT_START_REG);
1302 lp->tx_queue = 0;
1303 lp->tx_queue_len = 0;
1304 lp->tx_started = 1;
1305 }
1306 else {
1307 lp->tx_started = 0;
1308 }
1309 netif_wake_queue(dev);
1310 }
1311 }
1312
6aa20a22 1313 if( ( status & 0x8000 ) ||
1da177e4
LT		 1314 ( (inb(ioaddr + RECEIVE_MODE_REG) & RX_BUFFER_EMPTY) == 0) ) {
1315 eth16i_rx(dev); /* We have packet in receive buffer */
6aa20a22
JG		 1316 }
1317
1da177e4
LT		 1318 /* Turn interrupts back on */
1319 outw(ETH16I_INTR_ON, ioaddr + TX_INTR_REG);
6aa20a22 1320
1da177e4
LT		 1321 if(lp->tx_queue_len < lp->tx_buf_size - (ETH_FRAME_LEN + 2)) {
1322 /* There is still more room for one more packet in tx buffer */
1323 netif_wake_queue(dev);
1324 }
6aa20a22 1325
1da177e4 1326 spin_unlock(&lp->lock);
6aa20a22 1327
1da177e4
LT		 1328 return IRQ_RETVAL(handled);
1329}
1330
1331static void eth16i_skip_packet(struct net_device *dev)
6aa20a22 1332{
1da177e4
LT		 1333 int ioaddr = dev->base_addr;
1334
1335 inw(ioaddr + DATAPORT);
1336 inw(ioaddr + DATAPORT);
1337 inw(ioaddr + DATAPORT);
1338
1339 outb(SKIP_RX_PACKET, ioaddr + FILTER_SELF_RX_REG);
1340 while( inb( ioaddr + FILTER_SELF_RX_REG ) != 0);
1341}
1342
1343static void eth16i_reset(struct net_device *dev)
1344{
1345 struct eth16i_local *lp = netdev_priv(dev);
1346 int ioaddr = dev->base_addr;
1347
6aa20a22 1348 if(eth16i_debug > 1)
1da177e4
LT		 1349 printk(KERN_DEBUG "%s: Resetting device.\n", dev->name);
1350
1351 BITSET(ioaddr + CONFIG_REG_0, DLC_EN);
6aa20a22 1352 outw(0xffff, ioaddr + TX_STATUS_REG);
1da177e4
LT		 1353 eth16i_select_regbank(2, ioaddr);
1354
1355 lp->tx_started = 0;
1356 lp->tx_buf_busy = 0;
1357 lp->tx_queue = 0;
6aa20a22 1358 lp->tx_queue_len = 0;
1da177e4
LT		 1359 BITCLR(ioaddr + CONFIG_REG_0, DLC_EN);
1360}
1361
1362static void eth16i_multicast(struct net_device *dev)
1363{
1364 int ioaddr = dev->base_addr;
6aa20a22
JG		 1365
1366 if(dev->mc_count || dev->flags&(IFF_ALLMULTI|IFF_PROMISC))
1da177e4
LT		 1367 {
1368 dev->flags|=IFF_PROMISC; /* Must do this */
6aa20a22 1369 outb(3, ioaddr + RECEIVE_MODE_REG);
1da177e4
LT		 1370 } else {
1371 outb(2, ioaddr + RECEIVE_MODE_REG);
1372 }
1373}
1374
1375static struct net_device_stats *eth16i_get_stats(struct net_device *dev)
1376{
1377 struct eth16i_local *lp = netdev_priv(dev);
1378 return &lp->stats;
1379}
1380
1381static void eth16i_select_regbank(unsigned char banknbr, int ioaddr)
1382{
1383 unsigned char data;
1384
1385 data = inb(ioaddr + CONFIG_REG_1);
6aa20a22 1386 outb( ((data & 0xF3) | ( (banknbr & 0x03) << 2)), ioaddr + CONFIG_REG_1);
1da177e4
LT		 1387}
1388
1389#ifdef MODULE
1390
1391static ushort eth16i_parse_mediatype(const char* s)
1392{
1393 if(!s)
1394 return E_PORT_FROM_EPROM;
6aa20a22 1395
1da177e4
LT		 1396 if (!strncmp(s, "bnc", 3))
1397 return E_PORT_BNC;
1398 else if (!strncmp(s, "tp", 2))
1399 return E_PORT_TP;
1400 else if (!strncmp(s, "dix", 3))
1401 return E_PORT_DIX;
1402 else if (!strncmp(s, "auto", 4))
1403 return E_PORT_AUTO;
1404 else
1405 return E_PORT_FROM_EPROM;
1406}
1407
1408#define MAX_ETH16I_CARDS 4 /* Max number of Eth16i cards per module */
1409
1410static struct net_device *dev_eth16i[MAX_ETH16I_CARDS];
1411static int io[MAX_ETH16I_CARDS];
1412#if 0
1413static int irq[MAX_ETH16I_CARDS];
1414#endif
1415static char* mediatype[MAX_ETH16I_CARDS];
1416static int debug = -1;
1417
1418MODULE_AUTHOR("Mika Kuoppala <miku@iki.fi>");
1419MODULE_DESCRIPTION("ICL EtherTeam 16i/32 driver");
1420MODULE_LICENSE("GPL");
1421
1422
1423module_param_array(io, int, NULL, 0);
1424MODULE_PARM_DESC(io, "eth16i I/O base address(es)");
1425
1426#if 0
1427module_param_array(irq, int, NULL, 0);
1428MODULE_PARM_DESC(irq, "eth16i interrupt request number");
1429#endif
1430
1431module_param_array(mediatype, charp, NULL, 0);
1432MODULE_PARM_DESC(mediatype, "eth16i media type of interface(s) (bnc,tp,dix,auto,eprom)");
1433
1434module_param(debug, int, 0);
1435MODULE_PARM_DESC(debug, "eth16i debug level (0-6)");
1436
58f149fc 1437int __init init_module(void)
1da177e4
LT		 1438{
1439 int this_dev, found = 0;
1440 struct net_device *dev;
1441
1442 for (this_dev = 0; this_dev < MAX_ETH16I_CARDS; this_dev++) {
1443 dev = alloc_etherdev(sizeof(struct eth16i_local));
1444 if (!dev)
1445 break;
1446
1447 dev->base_addr = io[this_dev];
1448
1449 if(debug != -1)
1450 eth16i_debug = debug;
1451
1452 if(eth16i_debug > 1)
1453 printk(KERN_NOTICE "eth16i(%d): interface type %s\n", this_dev, mediatype[this_dev] ? mediatype[this_dev] : "none" );
1454
1455 dev->if_port = eth16i_parse_mediatype(mediatype[this_dev]);
1456
1457 if(io[this_dev] == 0) {
1458 if(this_dev != 0) /* Only autoprobe 1st one */
1459 break;
1460
1461 printk(KERN_NOTICE "eth16i.c: Presently autoprobing (not recommended) for a single card.\n");
1462 }
1463
1464 if (do_eth16i_probe(dev) == 0) {
b1fc5505
HX		 1465 dev_eth16i[found++] = dev;
1466 continue;
1da177e4
LT		 1467 }
1468 printk(KERN_WARNING "eth16i.c No Eth16i card found (i/o = 0x%x).\n",
1469 io[this_dev]);
1470 free_netdev(dev);
1471 break;
1472 }
1473 if (found)
1474 return 0;
1475 return -ENXIO;
1476}
6aa20a22 1477
1da177e4
LT		 1478void cleanup_module(void)
1479{
1480 int this_dev;
1481
1482 for(this_dev = 0; this_dev < MAX_ETH16I_CARDS; this_dev++) {
1483 struct net_device *dev = dev_eth16i[this_dev];
6aa20a22 1484
1da177e4
LT		 1485 if(dev->priv) {
1486 unregister_netdev(dev);
1487 free_irq(dev->irq, dev);
1488 release_region(dev->base_addr, ETH16I_IO_EXTENT);
1489 free_netdev(dev);
1490 }
1491 }
1492}
1493#endif /* MODULE */
1494
1495/*
1496 * Local variables:
1497 * compile-command: "gcc -DMODULE -D__KERNEL__ -Wall -Wstrict-prototypes -O6 -c eth16i.c"
1498 * alt-compile-command: "gcc -DMODVERSIONS -DMODULE -D__KERNEL__ -Wall -Wstrict -prototypes -O6 -c eth16i.c"
1499 * tab-width: 8
1500 * c-basic-offset: 8
1501 * c-indent-level: 8
1502 * End:
1503 */
1504
1505/* End of file eth16i.c */
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