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Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net-2.6
[net-next-2.6.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
c7e54b1b 4 Copyright(c) 1999 - 2009 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/module.h>
30#include <linux/types.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/vmalloc.h>
34#include <linux/pagemap.h>
35#include <linux/delay.h>
36#include <linux/netdevice.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/mii.h>
42#include <linux/ethtool.h>
43#include <linux/if_vlan.h>
44#include <linux/cpu.h>
45#include <linux/smp.h>
97ac8cae 46#include <linux/pm_qos_params.h>
111b9dc5 47#include <linux/aer.h>
bc7f75fa
AK		 48
49#include "e1000.h"
50
3be8c940 51#define DRV_VERSION "1.0.2-k2"
bc7f75fa
AK		 52char e1000e_driver_name[] = "e1000e";
53const char e1000e_driver_version[] = DRV_VERSION;
54
55static const struct e1000_info *e1000_info_tbl[] = {
56 [board_82571] = &e1000_82571_info,
57 [board_82572] = &e1000_82572_info,
58 [board_82573] = &e1000_82573_info,
4662e82b 59 [board_82574] = &e1000_82574_info,
8c81c9c3 60 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 61 [board_80003es2lan] = &e1000_es2_info,
62 [board_ich8lan] = &e1000_ich8_info,
63 [board_ich9lan] = &e1000_ich9_info,
f4187b56 64 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 65 [board_pchlan] = &e1000_pch_info,
bc7f75fa
AK		 66};
67
bc7f75fa
AK		 68/**
69 * e1000_desc_unused - calculate if we have unused descriptors
70 **/
71static int e1000_desc_unused(struct e1000_ring *ring)
72{
73 if (ring->next_to_clean > ring->next_to_use)
74 return ring->next_to_clean - ring->next_to_use - 1;
75
76 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
77}
78
79/**
ad68076e 80 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 81 * @adapter: board private structure
82 * @status: descriptor status field as written by hardware
83 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
84 * @skb: pointer to sk_buff to be indicated to stack
85 **/
86static void e1000_receive_skb(struct e1000_adapter *adapter,
87 struct net_device *netdev,
88 struct sk_buff *skb,
a39fe742 89 u8 status, __le16 vlan)
bc7f75fa
AK		 90{
91 skb->protocol = eth_type_trans(skb, netdev);
92
93 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 94 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
95 le16_to_cpu(vlan), skb);
bc7f75fa 96 else
89c88b16 97 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 98}
99
100/**
101 * e1000_rx_checksum - Receive Checksum Offload for 82543
102 * @adapter: board private structure
103 * @status_err: receive descriptor status and error fields
104 * @csum: receive descriptor csum field
105 * @sk_buff: socket buffer with received data
106 **/
107static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
108 u32 csum, struct sk_buff *skb)
109{
110 u16 status = (u16)status_err;
111 u8 errors = (u8)(status_err >> 24);
112 skb->ip_summed = CHECKSUM_NONE;
113
114 /* Ignore Checksum bit is set */
115 if (status & E1000_RXD_STAT_IXSM)
116 return;
117 /* TCP/UDP checksum error bit is set */
118 if (errors & E1000_RXD_ERR_TCPE) {
119 /* let the stack verify checksum errors */
120 adapter->hw_csum_err++;
121 return;
122 }
123
124 /* TCP/UDP Checksum has not been calculated */
125 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
126 return;
127
128 /* It must be a TCP or UDP packet with a valid checksum */
129 if (status & E1000_RXD_STAT_TCPCS) {
130 /* TCP checksum is good */
131 skb->ip_summed = CHECKSUM_UNNECESSARY;
132 } else {
ad68076e
BA		 133 /*
134 * IP fragment with UDP payload
135 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 136 * and then put the value in host order for further stack use.
137 */
a39fe742
AV		 138 __sum16 sum = (__force __sum16)htons(csum);
139 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 140 skb->ip_summed = CHECKSUM_COMPLETE;
141 }
142 adapter->hw_csum_good++;
143}
144
145/**
146 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
147 * @adapter: address of board private structure
148 **/
149static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
150 int cleaned_count)
151{
152 struct net_device *netdev = adapter->netdev;
153 struct pci_dev *pdev = adapter->pdev;
154 struct e1000_ring *rx_ring = adapter->rx_ring;
155 struct e1000_rx_desc *rx_desc;
156 struct e1000_buffer *buffer_info;
157 struct sk_buff *skb;
158 unsigned int i;
89d71a66 159 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 160
161 i = rx_ring->next_to_use;
162 buffer_info = &rx_ring->buffer_info[i];
163
164 while (cleaned_count--) {
165 skb = buffer_info->skb;
166 if (skb) {
167 skb_trim(skb, 0);
168 goto map_skb;
169 }
170
89d71a66 171 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 172 if (!skb) {
173 /* Better luck next round */
174 adapter->alloc_rx_buff_failed++;
175 break;
176 }
177
bc7f75fa
AK		 178 buffer_info->skb = skb;
179map_skb:
180 buffer_info->dma = pci_map_single(pdev, skb->data,
181 adapter->rx_buffer_len,
182 PCI_DMA_FROMDEVICE);
8d8bb39b 183 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 184 dev_err(&pdev->dev, "RX DMA map failed\n");
185 adapter->rx_dma_failed++;
186 break;
187 }
188
189 rx_desc = E1000_RX_DESC(*rx_ring, i);
190 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
191
192 i++;
193 if (i == rx_ring->count)
194 i = 0;
195 buffer_info = &rx_ring->buffer_info[i];
196 }
197
198 if (rx_ring->next_to_use != i) {
199 rx_ring->next_to_use = i;
200 if (i-- == 0)
201 i = (rx_ring->count - 1);
202
ad68076e
BA		 203 /*
204 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 205 * know there are new descriptors to fetch. (Only
206 * applicable for weak-ordered memory model archs,
ad68076e
BA		 207 * such as IA-64).
208 */
bc7f75fa
AK		 209 wmb();
210 writel(i, adapter->hw.hw_addr + rx_ring->tail);
211 }
212}
213
214/**
215 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
216 * @adapter: address of board private structure
217 **/
218static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
219 int cleaned_count)
220{
221 struct net_device *netdev = adapter->netdev;
222 struct pci_dev *pdev = adapter->pdev;
223 union e1000_rx_desc_packet_split *rx_desc;
224 struct e1000_ring *rx_ring = adapter->rx_ring;
225 struct e1000_buffer *buffer_info;
226 struct e1000_ps_page *ps_page;
227 struct sk_buff *skb;
228 unsigned int i, j;
229
230 i = rx_ring->next_to_use;
231 buffer_info = &rx_ring->buffer_info[i];
232
233 while (cleaned_count--) {
234 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
235
236 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 237 ps_page = &buffer_info->ps_pages[j];
238 if (j >= adapter->rx_ps_pages) {
239 /* all unused desc entries get hw null ptr */
a39fe742 240 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 241 continue;
242 }
243 if (!ps_page->page) {
244 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 245 if (!ps_page->page) {
47f44e40
AK		 246 adapter->alloc_rx_buff_failed++;
247 goto no_buffers;
248 }
249 ps_page->dma = pci_map_page(pdev,
250 ps_page->page,
251 0, PAGE_SIZE,
252 PCI_DMA_FROMDEVICE);
8d8bb39b 253 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
47f44e40
AK		 254 dev_err(&adapter->pdev->dev,
255 "RX DMA page map failed\n");
256 adapter->rx_dma_failed++;
257 goto no_buffers;
bc7f75fa 258 }
bc7f75fa 259 }
47f44e40
AK		 260 /*
261 * Refresh the desc even if buffer_addrs
262 * didn't change because each write-back
263 * erases this info.
264 */
265 rx_desc->read.buffer_addr[j+1] =
266 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 267 }
268
89d71a66
ED		 269 skb = netdev_alloc_skb_ip_align(netdev,
270 adapter->rx_ps_bsize0);
bc7f75fa
AK		 271
272 if (!skb) {
273 adapter->alloc_rx_buff_failed++;
274 break;
275 }
276
bc7f75fa
AK		 277 buffer_info->skb = skb;
278 buffer_info->dma = pci_map_single(pdev, skb->data,
279 adapter->rx_ps_bsize0,
280 PCI_DMA_FROMDEVICE);
8d8bb39b 281 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 282 dev_err(&pdev->dev, "RX DMA map failed\n");
283 adapter->rx_dma_failed++;
284 /* cleanup skb */
285 dev_kfree_skb_any(skb);
286 buffer_info->skb = NULL;
287 break;
288 }
289
290 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
291
292 i++;
293 if (i == rx_ring->count)
294 i = 0;
295 buffer_info = &rx_ring->buffer_info[i];
296 }
297
298no_buffers:
299 if (rx_ring->next_to_use != i) {
300 rx_ring->next_to_use = i;
301
302 if (!(i--))
303 i = (rx_ring->count - 1);
304
ad68076e
BA		 305 /*
306 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 307 * know there are new descriptors to fetch. (Only
308 * applicable for weak-ordered memory model archs,
ad68076e
BA		 309 * such as IA-64).
310 */
bc7f75fa 311 wmb();
ad68076e
BA		 312 /*
313 * Hardware increments by 16 bytes, but packet split
bc7f75fa
AK		 314 * descriptors are 32 bytes...so we increment tail
315 * twice as much.
316 */
317 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
318 }
319}
320
97ac8cae
BA		 321/**
322 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
323 * @adapter: address of board private structure
97ac8cae
BA		 324 * @cleaned_count: number of buffers to allocate this pass
325 **/
326
327static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
328 int cleaned_count)
329{
330 struct net_device *netdev = adapter->netdev;
331 struct pci_dev *pdev = adapter->pdev;
332 struct e1000_rx_desc *rx_desc;
333 struct e1000_ring *rx_ring = adapter->rx_ring;
334 struct e1000_buffer *buffer_info;
335 struct sk_buff *skb;
336 unsigned int i;
89d71a66 337 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 338
339 i = rx_ring->next_to_use;
340 buffer_info = &rx_ring->buffer_info[i];
341
342 while (cleaned_count--) {
343 skb = buffer_info->skb;
344 if (skb) {
345 skb_trim(skb, 0);
346 goto check_page;
347 }
348
89d71a66 349 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 350 if (unlikely(!skb)) {
351 /* Better luck next round */
352 adapter->alloc_rx_buff_failed++;
353 break;
354 }
355
97ac8cae
BA		 356 buffer_info->skb = skb;
357check_page:
358 /* allocate a new page if necessary */
359 if (!buffer_info->page) {
360 buffer_info->page = alloc_page(GFP_ATOMIC);
361 if (unlikely(!buffer_info->page)) {
362 adapter->alloc_rx_buff_failed++;
363 break;
364 }
365 }
366
367 if (!buffer_info->dma)
368 buffer_info->dma = pci_map_page(pdev,
369 buffer_info->page, 0,
370 PAGE_SIZE,
371 PCI_DMA_FROMDEVICE);
372
373 rx_desc = E1000_RX_DESC(*rx_ring, i);
374 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
375
376 if (unlikely(++i == rx_ring->count))
377 i = 0;
378 buffer_info = &rx_ring->buffer_info[i];
379 }
380
381 if (likely(rx_ring->next_to_use != i)) {
382 rx_ring->next_to_use = i;
383 if (unlikely(i-- == 0))
384 i = (rx_ring->count - 1);
385
386 /* Force memory writes to complete before letting h/w
387 * know there are new descriptors to fetch. (Only
388 * applicable for weak-ordered memory model archs,
389 * such as IA-64). */
390 wmb();
391 writel(i, adapter->hw.hw_addr + rx_ring->tail);
392 }
393}
394
bc7f75fa
AK		 395/**
396 * e1000_clean_rx_irq - Send received data up the network stack; legacy
397 * @adapter: board private structure
398 *
399 * the return value indicates whether actual cleaning was done, there
400 * is no guarantee that everything was cleaned
401 **/
402static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
403 int *work_done, int work_to_do)
404{
405 struct net_device *netdev = adapter->netdev;
406 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 407 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 408 struct e1000_ring *rx_ring = adapter->rx_ring;
409 struct e1000_rx_desc *rx_desc, *next_rxd;
410 struct e1000_buffer *buffer_info, *next_buffer;
411 u32 length;
412 unsigned int i;
413 int cleaned_count = 0;
414 bool cleaned = 0;
415 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
416
417 i = rx_ring->next_to_clean;
418 rx_desc = E1000_RX_DESC(*rx_ring, i);
419 buffer_info = &rx_ring->buffer_info[i];
420
421 while (rx_desc->status & E1000_RXD_STAT_DD) {
422 struct sk_buff *skb;
423 u8 status;
424
425 if (*work_done >= work_to_do)
426 break;
427 (*work_done)++;
428
429 status = rx_desc->status;
430 skb = buffer_info->skb;
431 buffer_info->skb = NULL;
432
433 prefetch(skb->data - NET_IP_ALIGN);
434
435 i++;
436 if (i == rx_ring->count)
437 i = 0;
438 next_rxd = E1000_RX_DESC(*rx_ring, i);
439 prefetch(next_rxd);
440
441 next_buffer = &rx_ring->buffer_info[i];
442
443 cleaned = 1;
444 cleaned_count++;
445 pci_unmap_single(pdev,
446 buffer_info->dma,
447 adapter->rx_buffer_len,
448 PCI_DMA_FROMDEVICE);
449 buffer_info->dma = 0;
450
451 length = le16_to_cpu(rx_desc->length);
452
453 /* !EOP means multiple descriptors were used to store a single
454 * packet, also make sure the frame isn't just CRC only */
455 if (!(status & E1000_RXD_STAT_EOP) || (length <= 4)) {
456 /* All receives must fit into a single buffer */
3bb99fe2 457 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 458 /* recycle */
459 buffer_info->skb = skb;
460 goto next_desc;
461 }
462
463 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
464 /* recycle */
465 buffer_info->skb = skb;
466 goto next_desc;
467 }
468
eb7c3adb
JK		 469 /* adjust length to remove Ethernet CRC */
470 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
471 length -= 4;
472
bc7f75fa
AK		 473 total_rx_bytes += length;
474 total_rx_packets++;
475
ad68076e
BA		 476 /*
477 * code added for copybreak, this should improve
bc7f75fa 478 * performance for small packets with large amounts
ad68076e
BA		 479 * of reassembly being done in the stack
480 */
bc7f75fa
AK		 481 if (length < copybreak) {
482 struct sk_buff *new_skb =
89d71a66 483 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 484 if (new_skb) {
808ff676
BA		 485 skb_copy_to_linear_data_offset(new_skb,
486 -NET_IP_ALIGN,
487 (skb->data -
488 NET_IP_ALIGN),
489 (length +
490 NET_IP_ALIGN));
bc7f75fa
AK		 491 /* save the skb in buffer_info as good */
492 buffer_info->skb = skb;
493 skb = new_skb;
494 }
495 /* else just continue with the old one */
496 }
497 /* end copybreak code */
498 skb_put(skb, length);
499
500 /* Receive Checksum Offload */
501 e1000_rx_checksum(adapter,
502 (u32)(status) |
503 ((u32)(rx_desc->errors) << 24),
504 le16_to_cpu(rx_desc->csum), skb);
505
506 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
507
508next_desc:
509 rx_desc->status = 0;
510
511 /* return some buffers to hardware, one at a time is too slow */
512 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
513 adapter->alloc_rx_buf(adapter, cleaned_count);
514 cleaned_count = 0;
515 }
516
517 /* use prefetched values */
518 rx_desc = next_rxd;
519 buffer_info = next_buffer;
520 }
521 rx_ring->next_to_clean = i;
522
523 cleaned_count = e1000_desc_unused(rx_ring);
524 if (cleaned_count)
525 adapter->alloc_rx_buf(adapter, cleaned_count);
526
bc7f75fa 527 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 528 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 529 netdev->stats.rx_bytes += total_rx_bytes;
530 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 531 return cleaned;
532}
533
bc7f75fa
AK		 534static void e1000_put_txbuf(struct e1000_adapter *adapter,
535 struct e1000_buffer *buffer_info)
536{
8ddc951c 537 buffer_info->dma = 0;
bc7f75fa 538 if (buffer_info->skb) {
8ddc951c
JB		 539 skb_dma_unmap(&adapter->pdev->dev, buffer_info->skb,
540 DMA_TO_DEVICE);
bc7f75fa
AK		 541 dev_kfree_skb_any(buffer_info->skb);
542 buffer_info->skb = NULL;
543 }
1b7719c4 544 buffer_info->time_stamp = 0;
bc7f75fa
AK		 545}
546
41cec6f1 547static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 548{
41cec6f1
BA		 549 struct e1000_adapter *adapter = container_of(work,
550 struct e1000_adapter,
551 print_hang_task);
bc7f75fa
AK		 552 struct e1000_ring *tx_ring = adapter->tx_ring;
553 unsigned int i = tx_ring->next_to_clean;
554 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
555 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 556 struct e1000_hw *hw = &adapter->hw;
557 u16 phy_status, phy_1000t_status, phy_ext_status;
558 u16 pci_status;
559
560 e1e_rphy(hw, PHY_STATUS, &phy_status);
561 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
562 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 563
41cec6f1
BA		 564 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
565
566 /* detected Hardware unit hang */
567 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 568 " TDH <%x>\n"
569 " TDT <%x>\n"
570 " next_to_use <%x>\n"
571 " next_to_clean <%x>\n"
572 "buffer_info[next_to_clean]:\n"
573 " time_stamp <%lx>\n"
574 " next_to_watch <%x>\n"
575 " jiffies <%lx>\n"
41cec6f1
BA		 576 " next_to_watch.status <%x>\n"
577 "MAC Status <%x>\n"
578 "PHY Status <%x>\n"
579 "PHY 1000BASE-T Status <%x>\n"
580 "PHY Extended Status <%x>\n"
581 "PCI Status <%x>\n",
44defeb3
JK		 582 readl(adapter->hw.hw_addr + tx_ring->head),
583 readl(adapter->hw.hw_addr + tx_ring->tail),
584 tx_ring->next_to_use,
585 tx_ring->next_to_clean,
586 tx_ring->buffer_info[eop].time_stamp,
587 eop,
588 jiffies,
41cec6f1
BA		 589 eop_desc->upper.fields.status,
590 er32(STATUS),
591 phy_status,
592 phy_1000t_status,
593 phy_ext_status,
594 pci_status);
bc7f75fa
AK		 595}
596
597/**
598 * e1000_clean_tx_irq - Reclaim resources after transmit completes
599 * @adapter: board private structure
600 *
601 * the return value indicates whether actual cleaning was done, there
602 * is no guarantee that everything was cleaned
603 **/
604static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
605{
606 struct net_device *netdev = adapter->netdev;
607 struct e1000_hw *hw = &adapter->hw;
608 struct e1000_ring *tx_ring = adapter->tx_ring;
609 struct e1000_tx_desc *tx_desc, *eop_desc;
610 struct e1000_buffer *buffer_info;
611 unsigned int i, eop;
612 unsigned int count = 0;
bc7f75fa
AK		 613 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
614
615 i = tx_ring->next_to_clean;
616 eop = tx_ring->buffer_info[i].next_to_watch;
617 eop_desc = E1000_TX_DESC(*tx_ring, eop);
618
12d04a3c
AD		 619 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
620 (count < tx_ring->count)) {
a86043c2
JB		 621 bool cleaned = false;
622 for (; !cleaned; count++) {
bc7f75fa
AK		 623 tx_desc = E1000_TX_DESC(*tx_ring, i);
624 buffer_info = &tx_ring->buffer_info[i];
625 cleaned = (i == eop);
626
627 if (cleaned) {
628 struct sk_buff *skb = buffer_info->skb;
629 unsigned int segs, bytecount;
630 segs = skb_shinfo(skb)->gso_segs ?: 1;
631 /* multiply data chunks by size of headers */
632 bytecount = ((segs - 1) * skb_headlen(skb)) +
633 skb->len;
634 total_tx_packets += segs;
635 total_tx_bytes += bytecount;
636 }
637
638 e1000_put_txbuf(adapter, buffer_info);
639 tx_desc->upper.data = 0;
640
641 i++;
642 if (i == tx_ring->count)
643 i = 0;
644 }
645
646 eop = tx_ring->buffer_info[i].next_to_watch;
647 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 648 }
649
650 tx_ring->next_to_clean = i;
651
652#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 653 if (count && netif_carrier_ok(netdev) &&
654 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 655 /* Make sure that anybody stopping the queue after this
656 * sees the new next_to_clean.
657 */
658 smp_mb();
659
660 if (netif_queue_stopped(netdev) &&
661 !(test_bit(__E1000_DOWN, &adapter->state))) {
662 netif_wake_queue(netdev);
663 ++adapter->restart_queue;
664 }
665 }
666
667 if (adapter->detect_tx_hung) {
41cec6f1
BA		 668 /*
669 * Detect a transmit hang in hardware, this serializes the
670 * check with the clearing of time_stamp and movement of i
671 */
bc7f75fa 672 adapter->detect_tx_hung = 0;
12d04a3c
AD		 673 if (tx_ring->buffer_info[i].time_stamp &&
674 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
bc7f75fa 675 + (adapter->tx_timeout_factor * HZ))
ad68076e 676 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 677 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 678 netif_stop_queue(netdev);
679 }
680 }
681 adapter->total_tx_bytes += total_tx_bytes;
682 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 683 netdev->stats.tx_bytes += total_tx_bytes;
684 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 685 return (count < tx_ring->count);
bc7f75fa
AK		 686}
687
bc7f75fa
AK		 688/**
689 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
690 * @adapter: board private structure
691 *
692 * the return value indicates whether actual cleaning was done, there
693 * is no guarantee that everything was cleaned
694 **/
695static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
696 int *work_done, int work_to_do)
697{
3bb99fe2 698 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 699 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
700 struct net_device *netdev = adapter->netdev;
701 struct pci_dev *pdev = adapter->pdev;
702 struct e1000_ring *rx_ring = adapter->rx_ring;
703 struct e1000_buffer *buffer_info, *next_buffer;
704 struct e1000_ps_page *ps_page;
705 struct sk_buff *skb;
706 unsigned int i, j;
707 u32 length, staterr;
708 int cleaned_count = 0;
709 bool cleaned = 0;
710 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
711
712 i = rx_ring->next_to_clean;
713 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
714 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
715 buffer_info = &rx_ring->buffer_info[i];
716
717 while (staterr & E1000_RXD_STAT_DD) {
718 if (*work_done >= work_to_do)
719 break;
720 (*work_done)++;
721 skb = buffer_info->skb;
722
723 /* in the packet split case this is header only */
724 prefetch(skb->data - NET_IP_ALIGN);
725
726 i++;
727 if (i == rx_ring->count)
728 i = 0;
729 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
730 prefetch(next_rxd);
731
732 next_buffer = &rx_ring->buffer_info[i];
733
734 cleaned = 1;
735 cleaned_count++;
736 pci_unmap_single(pdev, buffer_info->dma,
737 adapter->rx_ps_bsize0,
738 PCI_DMA_FROMDEVICE);
739 buffer_info->dma = 0;
740
741 if (!(staterr & E1000_RXD_STAT_EOP)) {
3bb99fe2
BA		 742 e_dbg("Packet Split buffers didn't pick up the full "
743 "packet\n");
bc7f75fa
AK		 744 dev_kfree_skb_irq(skb);
745 goto next_desc;
746 }
747
748 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
749 dev_kfree_skb_irq(skb);
750 goto next_desc;
751 }
752
753 length = le16_to_cpu(rx_desc->wb.middle.length0);
754
755 if (!length) {
3bb99fe2
BA		 756 e_dbg("Last part of the packet spanning multiple "
757 "descriptors\n");
bc7f75fa
AK		 758 dev_kfree_skb_irq(skb);
759 goto next_desc;
760 }
761
762 /* Good Receive */
763 skb_put(skb, length);
764
765 {
ad68076e
BA		 766 /*
767 * this looks ugly, but it seems compiler issues make it
768 * more efficient than reusing j
769 */
bc7f75fa
AK		 770 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
771
ad68076e
BA		 772 /*
773 * page alloc/put takes too long and effects small packet
774 * throughput, so unsplit small packets and save the alloc/put
775 * only valid in softirq (napi) context to call kmap_*
776 */
bc7f75fa
AK		 777 if (l1 && (l1 <= copybreak) &&
778 ((length + l1) <= adapter->rx_ps_bsize0)) {
779 u8 *vaddr;
780
47f44e40 781 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 782
ad68076e
BA		 783 /*
784 * there is no documentation about how to call
bc7f75fa 785 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 786 * very long
787 */
bc7f75fa
AK		 788 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
789 PAGE_SIZE, PCI_DMA_FROMDEVICE);
790 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
791 memcpy(skb_tail_pointer(skb), vaddr, l1);
792 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
793 pci_dma_sync_single_for_device(pdev, ps_page->dma,
794 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 795
eb7c3adb
JK		 796 /* remove the CRC */
797 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
798 l1 -= 4;
799
bc7f75fa
AK		 800 skb_put(skb, l1);
801 goto copydone;
802 } /* if */
803 }
804
805 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
806 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
807 if (!length)
808 break;
809
47f44e40 810 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 811 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
812 PCI_DMA_FROMDEVICE);
813 ps_page->dma = 0;
814 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
815 ps_page->page = NULL;
816 skb->len += length;
817 skb->data_len += length;
818 skb->truesize += length;
819 }
820
eb7c3adb
JK		 821 /* strip the ethernet crc, problem is we're using pages now so
822 * this whole operation can get a little cpu intensive
823 */
824 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
825 pskb_trim(skb, skb->len - 4);
826
bc7f75fa
AK		 827copydone:
828 total_rx_bytes += skb->len;
829 total_rx_packets++;
830
831 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
832 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
833
834 if (rx_desc->wb.upper.header_status &
835 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
836 adapter->rx_hdr_split++;
837
838 e1000_receive_skb(adapter, netdev, skb,
839 staterr, rx_desc->wb.middle.vlan);
840
841next_desc:
842 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
843 buffer_info->skb = NULL;
844
845 /* return some buffers to hardware, one at a time is too slow */
846 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
847 adapter->alloc_rx_buf(adapter, cleaned_count);
848 cleaned_count = 0;
849 }
850
851 /* use prefetched values */
852 rx_desc = next_rxd;
853 buffer_info = next_buffer;
854
855 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
856 }
857 rx_ring->next_to_clean = i;
858
859 cleaned_count = e1000_desc_unused(rx_ring);
860 if (cleaned_count)
861 adapter->alloc_rx_buf(adapter, cleaned_count);
862
bc7f75fa 863 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 864 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 865 netdev->stats.rx_bytes += total_rx_bytes;
866 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 867 return cleaned;
868}
869
97ac8cae
BA		 870/**
871 * e1000_consume_page - helper function
872 **/
873static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
874 u16 length)
875{
876 bi->page = NULL;
877 skb->len += length;
878 skb->data_len += length;
879 skb->truesize += length;
880}
881
882/**
883 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
884 * @adapter: board private structure
885 *
886 * the return value indicates whether actual cleaning was done, there
887 * is no guarantee that everything was cleaned
888 **/
889
890static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
891 int *work_done, int work_to_do)
892{
893 struct net_device *netdev = adapter->netdev;
894 struct pci_dev *pdev = adapter->pdev;
895 struct e1000_ring *rx_ring = adapter->rx_ring;
896 struct e1000_rx_desc *rx_desc, *next_rxd;
897 struct e1000_buffer *buffer_info, *next_buffer;
898 u32 length;
899 unsigned int i;
900 int cleaned_count = 0;
901 bool cleaned = false;
902 unsigned int total_rx_bytes=0, total_rx_packets=0;
903
904 i = rx_ring->next_to_clean;
905 rx_desc = E1000_RX_DESC(*rx_ring, i);
906 buffer_info = &rx_ring->buffer_info[i];
907
908 while (rx_desc->status & E1000_RXD_STAT_DD) {
909 struct sk_buff *skb;
910 u8 status;
911
912 if (*work_done >= work_to_do)
913 break;
914 (*work_done)++;
915
916 status = rx_desc->status;
917 skb = buffer_info->skb;
918 buffer_info->skb = NULL;
919
920 ++i;
921 if (i == rx_ring->count)
922 i = 0;
923 next_rxd = E1000_RX_DESC(*rx_ring, i);
924 prefetch(next_rxd);
925
926 next_buffer = &rx_ring->buffer_info[i];
927
928 cleaned = true;
929 cleaned_count++;
930 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
931 PCI_DMA_FROMDEVICE);
932 buffer_info->dma = 0;
933
934 length = le16_to_cpu(rx_desc->length);
935
936 /* errors is only valid for DD + EOP descriptors */
937 if (unlikely((status & E1000_RXD_STAT_EOP) &&
938 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
939 /* recycle both page and skb */
940 buffer_info->skb = skb;
941 /* an error means any chain goes out the window
942 * too */
943 if (rx_ring->rx_skb_top)
944 dev_kfree_skb(rx_ring->rx_skb_top);
945 rx_ring->rx_skb_top = NULL;
946 goto next_desc;
947 }
948
949#define rxtop rx_ring->rx_skb_top
950 if (!(status & E1000_RXD_STAT_EOP)) {
951 /* this descriptor is only the beginning (or middle) */
952 if (!rxtop) {
953 /* this is the beginning of a chain */
954 rxtop = skb;
955 skb_fill_page_desc(rxtop, 0, buffer_info->page,
956 0, length);
957 } else {
958 /* this is the middle of a chain */
959 skb_fill_page_desc(rxtop,
960 skb_shinfo(rxtop)->nr_frags,
961 buffer_info->page, 0, length);
962 /* re-use the skb, only consumed the page */
963 buffer_info->skb = skb;
964 }
965 e1000_consume_page(buffer_info, rxtop, length);
966 goto next_desc;
967 } else {
968 if (rxtop) {
969 /* end of the chain */
970 skb_fill_page_desc(rxtop,
971 skb_shinfo(rxtop)->nr_frags,
972 buffer_info->page, 0, length);
973 /* re-use the current skb, we only consumed the
974 * page */
975 buffer_info->skb = skb;
976 skb = rxtop;
977 rxtop = NULL;
978 e1000_consume_page(buffer_info, skb, length);
979 } else {
980 /* no chain, got EOP, this buf is the packet
981 * copybreak to save the put_page/alloc_page */
982 if (length <= copybreak &&
983 skb_tailroom(skb) >= length) {
984 u8 *vaddr;
985 vaddr = kmap_atomic(buffer_info->page,
986 KM_SKB_DATA_SOFTIRQ);
987 memcpy(skb_tail_pointer(skb), vaddr,
988 length);
989 kunmap_atomic(vaddr,
990 KM_SKB_DATA_SOFTIRQ);
991 /* re-use the page, so don't erase
992 * buffer_info->page */
993 skb_put(skb, length);
994 } else {
995 skb_fill_page_desc(skb, 0,
996 buffer_info->page, 0,
997 length);
998 e1000_consume_page(buffer_info, skb,
999 length);
1000 }
1001 }
1002 }
1003
1004 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1005 e1000_rx_checksum(adapter,
1006 (u32)(status) |
1007 ((u32)(rx_desc->errors) << 24),
1008 le16_to_cpu(rx_desc->csum), skb);
1009
1010 /* probably a little skewed due to removing CRC */
1011 total_rx_bytes += skb->len;
1012 total_rx_packets++;
1013
1014 /* eth type trans needs skb->data to point to something */
1015 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1016 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1017 dev_kfree_skb(skb);
1018 goto next_desc;
1019 }
1020
1021 e1000_receive_skb(adapter, netdev, skb, status,
1022 rx_desc->special);
1023
1024next_desc:
1025 rx_desc->status = 0;
1026
1027 /* return some buffers to hardware, one at a time is too slow */
1028 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1029 adapter->alloc_rx_buf(adapter, cleaned_count);
1030 cleaned_count = 0;
1031 }
1032
1033 /* use prefetched values */
1034 rx_desc = next_rxd;
1035 buffer_info = next_buffer;
1036 }
1037 rx_ring->next_to_clean = i;
1038
1039 cleaned_count = e1000_desc_unused(rx_ring);
1040 if (cleaned_count)
1041 adapter->alloc_rx_buf(adapter, cleaned_count);
1042
1043 adapter->total_rx_bytes += total_rx_bytes;
1044 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1045 netdev->stats.rx_bytes += total_rx_bytes;
1046 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1047 return cleaned;
1048}
1049
bc7f75fa
AK		 1050/**
1051 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1052 * @adapter: board private structure
1053 **/
1054static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1055{
1056 struct e1000_ring *rx_ring = adapter->rx_ring;
1057 struct e1000_buffer *buffer_info;
1058 struct e1000_ps_page *ps_page;
1059 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1060 unsigned int i, j;
1061
1062 /* Free all the Rx ring sk_buffs */
1063 for (i = 0; i < rx_ring->count; i++) {
1064 buffer_info = &rx_ring->buffer_info[i];
1065 if (buffer_info->dma) {
1066 if (adapter->clean_rx == e1000_clean_rx_irq)
1067 pci_unmap_single(pdev, buffer_info->dma,
1068 adapter->rx_buffer_len,
1069 PCI_DMA_FROMDEVICE);
97ac8cae
BA		 1070 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1071 pci_unmap_page(pdev, buffer_info->dma,
1072 PAGE_SIZE,
1073 PCI_DMA_FROMDEVICE);
bc7f75fa
AK		 1074 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1075 pci_unmap_single(pdev, buffer_info->dma,
1076 adapter->rx_ps_bsize0,
1077 PCI_DMA_FROMDEVICE);
1078 buffer_info->dma = 0;
1079 }
1080
97ac8cae
BA		 1081 if (buffer_info->page) {
1082 put_page(buffer_info->page);
1083 buffer_info->page = NULL;
1084 }
1085
bc7f75fa
AK		 1086 if (buffer_info->skb) {
1087 dev_kfree_skb(buffer_info->skb);
1088 buffer_info->skb = NULL;
1089 }
1090
1091 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1092 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1093 if (!ps_page->page)
1094 break;
1095 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1096 PCI_DMA_FROMDEVICE);
1097 ps_page->dma = 0;
1098 put_page(ps_page->page);
1099 ps_page->page = NULL;
1100 }
1101 }
1102
1103 /* there also may be some cached data from a chained receive */
1104 if (rx_ring->rx_skb_top) {
1105 dev_kfree_skb(rx_ring->rx_skb_top);
1106 rx_ring->rx_skb_top = NULL;
1107 }
1108
bc7f75fa
AK		 1109 /* Zero out the descriptor ring */
1110 memset(rx_ring->desc, 0, rx_ring->size);
1111
1112 rx_ring->next_to_clean = 0;
1113 rx_ring->next_to_use = 0;
1114
1115 writel(0, adapter->hw.hw_addr + rx_ring->head);
1116 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1117}
1118
a8f88ff5
JB		 1119static void e1000e_downshift_workaround(struct work_struct *work)
1120{
1121 struct e1000_adapter *adapter = container_of(work,
1122 struct e1000_adapter, downshift_task);
1123
1124 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1125}
1126
bc7f75fa
AK		 1127/**
1128 * e1000_intr_msi - Interrupt Handler
1129 * @irq: interrupt number
1130 * @data: pointer to a network interface device structure
1131 **/
1132static irqreturn_t e1000_intr_msi(int irq, void *data)
1133{
1134 struct net_device *netdev = data;
1135 struct e1000_adapter *adapter = netdev_priv(netdev);
1136 struct e1000_hw *hw = &adapter->hw;
1137 u32 icr = er32(ICR);
1138
ad68076e
BA		 1139 /*
1140 * read ICR disables interrupts using IAM
1141 */
bc7f75fa 1142
573cca8c 1143 if (icr & E1000_ICR_LSC) {
bc7f75fa 1144 hw->mac.get_link_status = 1;
ad68076e
BA		 1145 /*
1146 * ICH8 workaround-- Call gig speed drop workaround on cable
1147 * disconnect (LSC) before accessing any PHY registers
1148 */
bc7f75fa
AK		 1149 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1150 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1151 schedule_work(&adapter->downshift_task);
bc7f75fa 1152
ad68076e
BA		 1153 /*
1154 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1155 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1156 * adapter in watchdog
1157 */
bc7f75fa
AK		 1158 if (netif_carrier_ok(netdev) &&
1159 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1160 /* disable receives */
1161 u32 rctl = er32(RCTL);
1162 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1163 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1164 }
1165 /* guard against interrupt when we're going down */
1166 if (!test_bit(__E1000_DOWN, &adapter->state))
1167 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1168 }
1169
288379f0 1170 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1171 adapter->total_tx_bytes = 0;
1172 adapter->total_tx_packets = 0;
1173 adapter->total_rx_bytes = 0;
1174 adapter->total_rx_packets = 0;
288379f0 1175 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1176 }
1177
1178 return IRQ_HANDLED;
1179}
1180
1181/**
1182 * e1000_intr - Interrupt Handler
1183 * @irq: interrupt number
1184 * @data: pointer to a network interface device structure
1185 **/
1186static irqreturn_t e1000_intr(int irq, void *data)
1187{
1188 struct net_device *netdev = data;
1189 struct e1000_adapter *adapter = netdev_priv(netdev);
1190 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1191 u32 rctl, icr = er32(ICR);
4662e82b 1192
a68ea775 1193 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1194 return IRQ_NONE; /* Not our interrupt */
1195
ad68076e
BA		 1196 /*
1197 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1198 * not set, then the adapter didn't send an interrupt
1199 */
bc7f75fa
AK		 1200 if (!(icr & E1000_ICR_INT_ASSERTED))
1201 return IRQ_NONE;
1202
ad68076e
BA		 1203 /*
1204 * Interrupt Auto-Mask...upon reading ICR,
1205 * interrupts are masked. No need for the
1206 * IMC write
1207 */
bc7f75fa 1208
573cca8c 1209 if (icr & E1000_ICR_LSC) {
bc7f75fa 1210 hw->mac.get_link_status = 1;
ad68076e
BA		 1211 /*
1212 * ICH8 workaround-- Call gig speed drop workaround on cable
1213 * disconnect (LSC) before accessing any PHY registers
1214 */
bc7f75fa
AK		 1215 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1216 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1217 schedule_work(&adapter->downshift_task);
bc7f75fa 1218
ad68076e
BA		 1219 /*
1220 * 80003ES2LAN workaround--
bc7f75fa
AK		 1221 * For packet buffer work-around on link down event;
1222 * disable receives here in the ISR and
1223 * reset adapter in watchdog
1224 */
1225 if (netif_carrier_ok(netdev) &&
1226 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1227 /* disable receives */
1228 rctl = er32(RCTL);
1229 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1230 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1231 }
1232 /* guard against interrupt when we're going down */
1233 if (!test_bit(__E1000_DOWN, &adapter->state))
1234 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1235 }
1236
288379f0 1237 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1238 adapter->total_tx_bytes = 0;
1239 adapter->total_tx_packets = 0;
1240 adapter->total_rx_bytes = 0;
1241 adapter->total_rx_packets = 0;
288379f0 1242 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1243 }
1244
1245 return IRQ_HANDLED;
1246}
1247
4662e82b
BA		 1248static irqreturn_t e1000_msix_other(int irq, void *data)
1249{
1250 struct net_device *netdev = data;
1251 struct e1000_adapter *adapter = netdev_priv(netdev);
1252 struct e1000_hw *hw = &adapter->hw;
1253 u32 icr = er32(ICR);
1254
1255 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1256 if (!test_bit(__E1000_DOWN, &adapter->state))
1257 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1258 return IRQ_NONE;
1259 }
1260
1261 if (icr & adapter->eiac_mask)
1262 ew32(ICS, (icr & adapter->eiac_mask));
1263
1264 if (icr & E1000_ICR_OTHER) {
1265 if (!(icr & E1000_ICR_LSC))
1266 goto no_link_interrupt;
1267 hw->mac.get_link_status = 1;
1268 /* guard against interrupt when we're going down */
1269 if (!test_bit(__E1000_DOWN, &adapter->state))
1270 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1271 }
1272
1273no_link_interrupt:
a3c69fef
JB		 1274 if (!test_bit(__E1000_DOWN, &adapter->state))
1275 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1276
1277 return IRQ_HANDLED;
1278}
1279
1280
1281static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1282{
1283 struct net_device *netdev = data;
1284 struct e1000_adapter *adapter = netdev_priv(netdev);
1285 struct e1000_hw *hw = &adapter->hw;
1286 struct e1000_ring *tx_ring = adapter->tx_ring;
1287
1288
1289 adapter->total_tx_bytes = 0;
1290 adapter->total_tx_packets = 0;
1291
1292 if (!e1000_clean_tx_irq(adapter))
1293 /* Ring was not completely cleaned, so fire another interrupt */
1294 ew32(ICS, tx_ring->ims_val);
1295
1296 return IRQ_HANDLED;
1297}
1298
1299static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1300{
1301 struct net_device *netdev = data;
1302 struct e1000_adapter *adapter = netdev_priv(netdev);
1303
1304 /* Write the ITR value calculated at the end of the
1305 * previous interrupt.
1306 */
1307 if (adapter->rx_ring->set_itr) {
1308 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1309 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1310 adapter->rx_ring->set_itr = 0;
1311 }
1312
288379f0 1313 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1314 adapter->total_rx_bytes = 0;
1315 adapter->total_rx_packets = 0;
288379f0 1316 __napi_schedule(&adapter->napi);
4662e82b
BA		 1317 }
1318 return IRQ_HANDLED;
1319}
1320
1321/**
1322 * e1000_configure_msix - Configure MSI-X hardware
1323 *
1324 * e1000_configure_msix sets up the hardware to properly
1325 * generate MSI-X interrupts.
1326 **/
1327static void e1000_configure_msix(struct e1000_adapter *adapter)
1328{
1329 struct e1000_hw *hw = &adapter->hw;
1330 struct e1000_ring *rx_ring = adapter->rx_ring;
1331 struct e1000_ring *tx_ring = adapter->tx_ring;
1332 int vector = 0;
1333 u32 ctrl_ext, ivar = 0;
1334
1335 adapter->eiac_mask = 0;
1336
1337 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1338 if (hw->mac.type == e1000_82574) {
1339 u32 rfctl = er32(RFCTL);
1340 rfctl |= E1000_RFCTL_ACK_DIS;
1341 ew32(RFCTL, rfctl);
1342 }
1343
1344#define E1000_IVAR_INT_ALLOC_VALID 0x8
1345 /* Configure Rx vector */
1346 rx_ring->ims_val = E1000_IMS_RXQ0;
1347 adapter->eiac_mask |= rx_ring->ims_val;
1348 if (rx_ring->itr_val)
1349 writel(1000000000 / (rx_ring->itr_val * 256),
1350 hw->hw_addr + rx_ring->itr_register);
1351 else
1352 writel(1, hw->hw_addr + rx_ring->itr_register);
1353 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1354
1355 /* Configure Tx vector */
1356 tx_ring->ims_val = E1000_IMS_TXQ0;
1357 vector++;
1358 if (tx_ring->itr_val)
1359 writel(1000000000 / (tx_ring->itr_val * 256),
1360 hw->hw_addr + tx_ring->itr_register);
1361 else
1362 writel(1, hw->hw_addr + tx_ring->itr_register);
1363 adapter->eiac_mask |= tx_ring->ims_val;
1364 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1365
1366 /* set vector for Other Causes, e.g. link changes */
1367 vector++;
1368 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1369 if (rx_ring->itr_val)
1370 writel(1000000000 / (rx_ring->itr_val * 256),
1371 hw->hw_addr + E1000_EITR_82574(vector));
1372 else
1373 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1374
1375 /* Cause Tx interrupts on every write back */
1376 ivar |= (1 << 31);
1377
1378 ew32(IVAR, ivar);
1379
1380 /* enable MSI-X PBA support */
1381 ctrl_ext = er32(CTRL_EXT);
1382 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1383
1384 /* Auto-Mask Other interrupts upon ICR read */
1385#define E1000_EIAC_MASK_82574 0x01F00000
1386 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1387 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1388 ew32(CTRL_EXT, ctrl_ext);
1389 e1e_flush();
1390}
1391
1392void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1393{
1394 if (adapter->msix_entries) {
1395 pci_disable_msix(adapter->pdev);
1396 kfree(adapter->msix_entries);
1397 adapter->msix_entries = NULL;
1398 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1399 pci_disable_msi(adapter->pdev);
1400 adapter->flags &= ~FLAG_MSI_ENABLED;
1401 }
1402
1403 return;
1404}
1405
1406/**
1407 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1408 *
1409 * Attempt to configure interrupts using the best available
1410 * capabilities of the hardware and kernel.
1411 **/
1412void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1413{
1414 int err;
1415 int numvecs, i;
1416
1417
1418 switch (adapter->int_mode) {
1419 case E1000E_INT_MODE_MSIX:
1420 if (adapter->flags & FLAG_HAS_MSIX) {
1421 numvecs = 3; /* RxQ0, TxQ0 and other */
1422 adapter->msix_entries = kcalloc(numvecs,
1423 sizeof(struct msix_entry),
1424 GFP_KERNEL);
1425 if (adapter->msix_entries) {
1426 for (i = 0; i < numvecs; i++)
1427 adapter->msix_entries[i].entry = i;
1428
1429 err = pci_enable_msix(adapter->pdev,
1430 adapter->msix_entries,
1431 numvecs);
1432 if (err == 0)
1433 return;
1434 }
1435 /* MSI-X failed, so fall through and try MSI */
1436 e_err("Failed to initialize MSI-X interrupts. "
1437 "Falling back to MSI interrupts.\n");
1438 e1000e_reset_interrupt_capability(adapter);
1439 }
1440 adapter->int_mode = E1000E_INT_MODE_MSI;
1441 /* Fall through */
1442 case E1000E_INT_MODE_MSI:
1443 if (!pci_enable_msi(adapter->pdev)) {
1444 adapter->flags |= FLAG_MSI_ENABLED;
1445 } else {
1446 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1447 e_err("Failed to initialize MSI interrupts. Falling "
1448 "back to legacy interrupts.\n");
1449 }
1450 /* Fall through */
1451 case E1000E_INT_MODE_LEGACY:
1452 /* Don't do anything; this is the system default */
1453 break;
1454 }
1455
1456 return;
1457}
1458
1459/**
1460 * e1000_request_msix - Initialize MSI-X interrupts
1461 *
1462 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1463 * kernel.
1464 **/
1465static int e1000_request_msix(struct e1000_adapter *adapter)
1466{
1467 struct net_device *netdev = adapter->netdev;
1468 int err = 0, vector = 0;
1469
1470 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1471 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1472 else
1473 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1474 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1475 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1476 netdev);
1477 if (err)
1478 goto out;
1479 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1480 adapter->rx_ring->itr_val = adapter->itr;
1481 vector++;
1482
1483 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1484 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1485 else
1486 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1487 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1488 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1489 netdev);
1490 if (err)
1491 goto out;
1492 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1493 adapter->tx_ring->itr_val = adapter->itr;
1494 vector++;
1495
1496 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1497 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1498 if (err)
1499 goto out;
1500
1501 e1000_configure_msix(adapter);
1502 return 0;
1503out:
1504 return err;
1505}
1506
f8d59f78
BA		 1507/**
1508 * e1000_request_irq - initialize interrupts
1509 *
1510 * Attempts to configure interrupts using the best available
1511 * capabilities of the hardware and kernel.
1512 **/
bc7f75fa
AK		 1513static int e1000_request_irq(struct e1000_adapter *adapter)
1514{
1515 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1516 int err;
1517
4662e82b
BA		 1518 if (adapter->msix_entries) {
1519 err = e1000_request_msix(adapter);
1520 if (!err)
1521 return err;
1522 /* fall back to MSI */
1523 e1000e_reset_interrupt_capability(adapter);
1524 adapter->int_mode = E1000E_INT_MODE_MSI;
1525 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1526 }
4662e82b 1527 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1528 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1529 netdev->name, netdev);
1530 if (!err)
1531 return err;
bc7f75fa 1532
4662e82b
BA		 1533 /* fall back to legacy interrupt */
1534 e1000e_reset_interrupt_capability(adapter);
1535 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1536 }
1537
a0607fd3 1538 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1539 netdev->name, netdev);
1540 if (err)
1541 e_err("Unable to allocate interrupt, Error: %d\n", err);
1542
bc7f75fa
AK		 1543 return err;
1544}
1545
1546static void e1000_free_irq(struct e1000_adapter *adapter)
1547{
1548 struct net_device *netdev = adapter->netdev;
1549
4662e82b
BA		 1550 if (adapter->msix_entries) {
1551 int vector = 0;
1552
1553 free_irq(adapter->msix_entries[vector].vector, netdev);
1554 vector++;
1555
1556 free_irq(adapter->msix_entries[vector].vector, netdev);
1557 vector++;
1558
1559 /* Other Causes interrupt vector */
1560 free_irq(adapter->msix_entries[vector].vector, netdev);
1561 return;
bc7f75fa 1562 }
4662e82b
BA		 1563
1564 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1565}
1566
1567/**
1568 * e1000_irq_disable - Mask off interrupt generation on the NIC
1569 **/
1570static void e1000_irq_disable(struct e1000_adapter *adapter)
1571{
1572 struct e1000_hw *hw = &adapter->hw;
1573
bc7f75fa 1574 ew32(IMC, ~0);
4662e82b
BA		 1575 if (adapter->msix_entries)
1576 ew32(EIAC_82574, 0);
bc7f75fa
AK		 1577 e1e_flush();
1578 synchronize_irq(adapter->pdev->irq);
1579}
1580
1581/**
1582 * e1000_irq_enable - Enable default interrupt generation settings
1583 **/
1584static void e1000_irq_enable(struct e1000_adapter *adapter)
1585{
1586 struct e1000_hw *hw = &adapter->hw;
1587
4662e82b
BA		 1588 if (adapter->msix_entries) {
1589 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1590 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1591 } else {
1592 ew32(IMS, IMS_ENABLE_MASK);
1593 }
74ef9c39 1594 e1e_flush();
bc7f75fa
AK		 1595}
1596
1597/**
1598 * e1000_get_hw_control - get control of the h/w from f/w
1599 * @adapter: address of board private structure
1600 *
489815ce 1601 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1602 * For ASF and Pass Through versions of f/w this means that
1603 * the driver is loaded. For AMT version (only with 82573)
1604 * of the f/w this means that the network i/f is open.
1605 **/
1606static void e1000_get_hw_control(struct e1000_adapter *adapter)
1607{
1608 struct e1000_hw *hw = &adapter->hw;
1609 u32 ctrl_ext;
1610 u32 swsm;
1611
1612 /* Let firmware know the driver has taken over */
1613 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1614 swsm = er32(SWSM);
1615 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1616 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1617 ctrl_ext = er32(CTRL_EXT);
ad68076e 1618 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1619 }
1620}
1621
1622/**
1623 * e1000_release_hw_control - release control of the h/w to f/w
1624 * @adapter: address of board private structure
1625 *
489815ce 1626 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1627 * For ASF and Pass Through versions of f/w this means that the
1628 * driver is no longer loaded. For AMT version (only with 82573) i
1629 * of the f/w this means that the network i/f is closed.
1630 *
1631 **/
1632static void e1000_release_hw_control(struct e1000_adapter *adapter)
1633{
1634 struct e1000_hw *hw = &adapter->hw;
1635 u32 ctrl_ext;
1636 u32 swsm;
1637
1638 /* Let firmware taken over control of h/w */
1639 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1640 swsm = er32(SWSM);
1641 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1642 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1643 ctrl_ext = er32(CTRL_EXT);
ad68076e 1644 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1645 }
1646}
1647
bc7f75fa
AK		 1648/**
1649 * @e1000_alloc_ring - allocate memory for a ring structure
1650 **/
1651static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1652 struct e1000_ring *ring)
1653{
1654 struct pci_dev *pdev = adapter->pdev;
1655
1656 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1657 GFP_KERNEL);
1658 if (!ring->desc)
1659 return -ENOMEM;
1660
1661 return 0;
1662}
1663
1664/**
1665 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1666 * @adapter: board private structure
1667 *
1668 * Return 0 on success, negative on failure
1669 **/
1670int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1671{
1672 struct e1000_ring *tx_ring = adapter->tx_ring;
1673 int err = -ENOMEM, size;
1674
1675 size = sizeof(struct e1000_buffer) * tx_ring->count;
1676 tx_ring->buffer_info = vmalloc(size);
1677 if (!tx_ring->buffer_info)
1678 goto err;
1679 memset(tx_ring->buffer_info, 0, size);
1680
1681 /* round up to nearest 4K */
1682 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1683 tx_ring->size = ALIGN(tx_ring->size, 4096);
1684
1685 err = e1000_alloc_ring_dma(adapter, tx_ring);
1686 if (err)
1687 goto err;
1688
1689 tx_ring->next_to_use = 0;
1690 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 1691
1692 return 0;
1693err:
1694 vfree(tx_ring->buffer_info);
44defeb3 1695 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1696 return err;
1697}
1698
1699/**
1700 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1701 * @adapter: board private structure
1702 *
1703 * Returns 0 on success, negative on failure
1704 **/
1705int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1706{
1707 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 1708 struct e1000_buffer *buffer_info;
1709 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 1710
1711 size = sizeof(struct e1000_buffer) * rx_ring->count;
1712 rx_ring->buffer_info = vmalloc(size);
1713 if (!rx_ring->buffer_info)
1714 goto err;
1715 memset(rx_ring->buffer_info, 0, size);
1716
47f44e40
AK		 1717 for (i = 0; i < rx_ring->count; i++) {
1718 buffer_info = &rx_ring->buffer_info[i];
1719 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1720 sizeof(struct e1000_ps_page),
1721 GFP_KERNEL);
1722 if (!buffer_info->ps_pages)
1723 goto err_pages;
1724 }
bc7f75fa
AK		 1725
1726 desc_len = sizeof(union e1000_rx_desc_packet_split);
1727
1728 /* Round up to nearest 4K */
1729 rx_ring->size = rx_ring->count * desc_len;
1730 rx_ring->size = ALIGN(rx_ring->size, 4096);
1731
1732 err = e1000_alloc_ring_dma(adapter, rx_ring);
1733 if (err)
47f44e40 1734 goto err_pages;
bc7f75fa
AK		 1735
1736 rx_ring->next_to_clean = 0;
1737 rx_ring->next_to_use = 0;
1738 rx_ring->rx_skb_top = NULL;
1739
1740 return 0;
47f44e40
AK		 1741
1742err_pages:
1743 for (i = 0; i < rx_ring->count; i++) {
1744 buffer_info = &rx_ring->buffer_info[i];
1745 kfree(buffer_info->ps_pages);
1746 }
bc7f75fa
AK		 1747err:
1748 vfree(rx_ring->buffer_info);
44defeb3 1749 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1750 return err;
1751}
1752
1753/**
1754 * e1000_clean_tx_ring - Free Tx Buffers
1755 * @adapter: board private structure
1756 **/
1757static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1758{
1759 struct e1000_ring *tx_ring = adapter->tx_ring;
1760 struct e1000_buffer *buffer_info;
1761 unsigned long size;
1762 unsigned int i;
1763
1764 for (i = 0; i < tx_ring->count; i++) {
1765 buffer_info = &tx_ring->buffer_info[i];
1766 e1000_put_txbuf(adapter, buffer_info);
1767 }
1768
1769 size = sizeof(struct e1000_buffer) * tx_ring->count;
1770 memset(tx_ring->buffer_info, 0, size);
1771
1772 memset(tx_ring->desc, 0, tx_ring->size);
1773
1774 tx_ring->next_to_use = 0;
1775 tx_ring->next_to_clean = 0;
1776
1777 writel(0, adapter->hw.hw_addr + tx_ring->head);
1778 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1779}
1780
1781/**
1782 * e1000e_free_tx_resources - Free Tx Resources per Queue
1783 * @adapter: board private structure
1784 *
1785 * Free all transmit software resources
1786 **/
1787void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1788{
1789 struct pci_dev *pdev = adapter->pdev;
1790 struct e1000_ring *tx_ring = adapter->tx_ring;
1791
1792 e1000_clean_tx_ring(adapter);
1793
1794 vfree(tx_ring->buffer_info);
1795 tx_ring->buffer_info = NULL;
1796
1797 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1798 tx_ring->dma);
1799 tx_ring->desc = NULL;
1800}
1801
1802/**
1803 * e1000e_free_rx_resources - Free Rx Resources
1804 * @adapter: board private structure
1805 *
1806 * Free all receive software resources
1807 **/
1808
1809void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1810{
1811 struct pci_dev *pdev = adapter->pdev;
1812 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1813 int i;
bc7f75fa
AK		 1814
1815 e1000_clean_rx_ring(adapter);
1816
47f44e40
AK		 1817 for (i = 0; i < rx_ring->count; i++) {
1818 kfree(rx_ring->buffer_info[i].ps_pages);
1819 }
1820
bc7f75fa
AK		 1821 vfree(rx_ring->buffer_info);
1822 rx_ring->buffer_info = NULL;
1823
bc7f75fa
AK		 1824 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1825 rx_ring->dma);
1826 rx_ring->desc = NULL;
1827}
1828
1829/**
1830 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 1831 * @adapter: pointer to adapter
1832 * @itr_setting: current adapter->itr
1833 * @packets: the number of packets during this measurement interval
1834 * @bytes: the number of bytes during this measurement interval
1835 *
bc7f75fa
AK		 1836 * Stores a new ITR value based on packets and byte
1837 * counts during the last interrupt. The advantage of per interrupt
1838 * computation is faster updates and more accurate ITR for the current
1839 * traffic pattern. Constants in this function were computed
1840 * based on theoretical maximum wire speed and thresholds were set based
1841 * on testing data as well as attempting to minimize response time
4662e82b
BA		 1842 * while increasing bulk throughput. This functionality is controlled
1843 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 1844 **/
1845static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1846 u16 itr_setting, int packets,
1847 int bytes)
1848{
1849 unsigned int retval = itr_setting;
1850
1851 if (packets == 0)
1852 goto update_itr_done;
1853
1854 switch (itr_setting) {
1855 case lowest_latency:
1856 /* handle TSO and jumbo frames */
1857 if (bytes/packets > 8000)
1858 retval = bulk_latency;
1859 else if ((packets < 5) && (bytes > 512)) {
1860 retval = low_latency;
1861 }
1862 break;
1863 case low_latency: /* 50 usec aka 20000 ints/s */
1864 if (bytes > 10000) {
1865 /* this if handles the TSO accounting */
1866 if (bytes/packets > 8000) {
1867 retval = bulk_latency;
1868 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1869 retval = bulk_latency;
1870 } else if ((packets > 35)) {
1871 retval = lowest_latency;
1872 }
1873 } else if (bytes/packets > 2000) {
1874 retval = bulk_latency;
1875 } else if (packets <= 2 && bytes < 512) {
1876 retval = lowest_latency;
1877 }
1878 break;
1879 case bulk_latency: /* 250 usec aka 4000 ints/s */
1880 if (bytes > 25000) {
1881 if (packets > 35) {
1882 retval = low_latency;
1883 }
1884 } else if (bytes < 6000) {
1885 retval = low_latency;
1886 }
1887 break;
1888 }
1889
1890update_itr_done:
1891 return retval;
1892}
1893
1894static void e1000_set_itr(struct e1000_adapter *adapter)
1895{
1896 struct e1000_hw *hw = &adapter->hw;
1897 u16 current_itr;
1898 u32 new_itr = adapter->itr;
1899
1900 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1901 if (adapter->link_speed != SPEED_1000) {
1902 current_itr = 0;
1903 new_itr = 4000;
1904 goto set_itr_now;
1905 }
1906
1907 adapter->tx_itr = e1000_update_itr(adapter,
1908 adapter->tx_itr,
1909 adapter->total_tx_packets,
1910 adapter->total_tx_bytes);
1911 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1912 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1913 adapter->tx_itr = low_latency;
1914
1915 adapter->rx_itr = e1000_update_itr(adapter,
1916 adapter->rx_itr,
1917 adapter->total_rx_packets,
1918 adapter->total_rx_bytes);
1919 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1920 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1921 adapter->rx_itr = low_latency;
1922
1923 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1924
1925 switch (current_itr) {
1926 /* counts and packets in update_itr are dependent on these numbers */
1927 case lowest_latency:
1928 new_itr = 70000;
1929 break;
1930 case low_latency:
1931 new_itr = 20000; /* aka hwitr = ~200 */
1932 break;
1933 case bulk_latency:
1934 new_itr = 4000;
1935 break;
1936 default:
1937 break;
1938 }
1939
1940set_itr_now:
1941 if (new_itr != adapter->itr) {
ad68076e
BA		 1942 /*
1943 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1944 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 1945 * increasing
1946 */
bc7f75fa
AK		 1947 new_itr = new_itr > adapter->itr ?
1948 min(adapter->itr + (new_itr >> 2), new_itr) :
1949 new_itr;
1950 adapter->itr = new_itr;
4662e82b
BA		 1951 adapter->rx_ring->itr_val = new_itr;
1952 if (adapter->msix_entries)
1953 adapter->rx_ring->set_itr = 1;
1954 else
1955 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 1956 }
1957}
1958
4662e82b
BA		 1959/**
1960 * e1000_alloc_queues - Allocate memory for all rings
1961 * @adapter: board private structure to initialize
1962 **/
1963static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1964{
1965 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1966 if (!adapter->tx_ring)
1967 goto err;
1968
1969 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1970 if (!adapter->rx_ring)
1971 goto err;
1972
1973 return 0;
1974err:
1975 e_err("Unable to allocate memory for queues\n");
1976 kfree(adapter->rx_ring);
1977 kfree(adapter->tx_ring);
1978 return -ENOMEM;
1979}
1980
bc7f75fa
AK		 1981/**
1982 * e1000_clean - NAPI Rx polling callback
ad68076e 1983 * @napi: struct associated with this polling callback
489815ce 1984 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 1985 **/
1986static int e1000_clean(struct napi_struct *napi, int budget)
1987{
1988 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 1989 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1990 struct net_device *poll_dev = adapter->netdev;
679e8a0f 1991 int tx_cleaned = 1, work_done = 0;
bc7f75fa 1992
4cf1653a 1993 adapter = netdev_priv(poll_dev);
bc7f75fa 1994
4662e82b
BA		 1995 if (adapter->msix_entries &&
1996 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
1997 goto clean_rx;
1998
92af3e95 1999 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2000
4662e82b 2001clean_rx:
bc7f75fa 2002 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2003
12d04a3c 2004 if (!tx_cleaned)
d2c7ddd6 2005 work_done = budget;
bc7f75fa 2006
53e52c72
DM		 2007 /* If budget not fully consumed, exit the polling mode */
2008 if (work_done < budget) {
bc7f75fa
AK		 2009 if (adapter->itr_setting & 3)
2010 e1000_set_itr(adapter);
288379f0 2011 napi_complete(napi);
a3c69fef
JB		 2012 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2013 if (adapter->msix_entries)
2014 ew32(IMS, adapter->rx_ring->ims_val);
2015 else
2016 e1000_irq_enable(adapter);
2017 }
bc7f75fa
AK		 2018 }
2019
2020 return work_done;
2021}
2022
2023static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2024{
2025 struct e1000_adapter *adapter = netdev_priv(netdev);
2026 struct e1000_hw *hw = &adapter->hw;
2027 u32 vfta, index;
2028
2029 /* don't update vlan cookie if already programmed */
2030 if ((adapter->hw.mng_cookie.status &
2031 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2032 (vid == adapter->mng_vlan_id))
2033 return;
2034 /* add VID to filter table */
2035 index = (vid >> 5) & 0x7F;
2036 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2037 vfta |= (1 << (vid & 0x1F));
2038 e1000e_write_vfta(hw, index, vfta);
2039}
2040
2041static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2042{
2043 struct e1000_adapter *adapter = netdev_priv(netdev);
2044 struct e1000_hw *hw = &adapter->hw;
2045 u32 vfta, index;
2046
74ef9c39
JB		 2047 if (!test_bit(__E1000_DOWN, &adapter->state))
2048 e1000_irq_disable(adapter);
bc7f75fa 2049 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2050
2051 if (!test_bit(__E1000_DOWN, &adapter->state))
2052 e1000_irq_enable(adapter);
bc7f75fa
AK		 2053
2054 if ((adapter->hw.mng_cookie.status &
2055 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2056 (vid == adapter->mng_vlan_id)) {
2057 /* release control to f/w */
2058 e1000_release_hw_control(adapter);
2059 return;
2060 }
2061
2062 /* remove VID from filter table */
2063 index = (vid >> 5) & 0x7F;
2064 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2065 vfta &= ~(1 << (vid & 0x1F));
2066 e1000e_write_vfta(hw, index, vfta);
2067}
2068
2069static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2070{
2071 struct net_device *netdev = adapter->netdev;
2072 u16 vid = adapter->hw.mng_cookie.vlan_id;
2073 u16 old_vid = adapter->mng_vlan_id;
2074
2075 if (!adapter->vlgrp)
2076 return;
2077
2078 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2079 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2080 if (adapter->hw.mng_cookie.status &
2081 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2082 e1000_vlan_rx_add_vid(netdev, vid);
2083 adapter->mng_vlan_id = vid;
2084 }
2085
2086 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2087 (vid != old_vid) &&
2088 !vlan_group_get_device(adapter->vlgrp, old_vid))
2089 e1000_vlan_rx_kill_vid(netdev, old_vid);
2090 } else {
2091 adapter->mng_vlan_id = vid;
2092 }
2093}
2094
2095
2096static void e1000_vlan_rx_register(struct net_device *netdev,
2097 struct vlan_group *grp)
2098{
2099 struct e1000_adapter *adapter = netdev_priv(netdev);
2100 struct e1000_hw *hw = &adapter->hw;
2101 u32 ctrl, rctl;
2102
74ef9c39
JB		 2103 if (!test_bit(__E1000_DOWN, &adapter->state))
2104 e1000_irq_disable(adapter);
bc7f75fa
AK		 2105 adapter->vlgrp = grp;
2106
2107 if (grp) {
2108 /* enable VLAN tag insert/strip */
2109 ctrl = er32(CTRL);
2110 ctrl |= E1000_CTRL_VME;
2111 ew32(CTRL, ctrl);
2112
2113 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2114 /* enable VLAN receive filtering */
2115 rctl = er32(RCTL);
bc7f75fa
AK		 2116 rctl &= ~E1000_RCTL_CFIEN;
2117 ew32(RCTL, rctl);
2118 e1000_update_mng_vlan(adapter);
2119 }
2120 } else {
2121 /* disable VLAN tag insert/strip */
2122 ctrl = er32(CTRL);
2123 ctrl &= ~E1000_CTRL_VME;
2124 ew32(CTRL, ctrl);
2125
2126 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2127 if (adapter->mng_vlan_id !=
2128 (u16)E1000_MNG_VLAN_NONE) {
2129 e1000_vlan_rx_kill_vid(netdev,
2130 adapter->mng_vlan_id);
2131 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2132 }
2133 }
2134 }
2135
74ef9c39
JB		 2136 if (!test_bit(__E1000_DOWN, &adapter->state))
2137 e1000_irq_enable(adapter);
bc7f75fa
AK		 2138}
2139
2140static void e1000_restore_vlan(struct e1000_adapter *adapter)
2141{
2142 u16 vid;
2143
2144 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2145
2146 if (!adapter->vlgrp)
2147 return;
2148
2149 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2150 if (!vlan_group_get_device(adapter->vlgrp, vid))
2151 continue;
2152 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2153 }
2154}
2155
2156static void e1000_init_manageability(struct e1000_adapter *adapter)
2157{
2158 struct e1000_hw *hw = &adapter->hw;
2159 u32 manc, manc2h;
2160
2161 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2162 return;
2163
2164 manc = er32(MANC);
2165
ad68076e
BA		 2166 /*
2167 * enable receiving management packets to the host. this will probably
bc7f75fa 2168 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2169 * the packets will be handled on SMBUS
2170 */
bc7f75fa
AK		 2171 manc |= E1000_MANC_EN_MNG2HOST;
2172 manc2h = er32(MANC2H);
2173#define E1000_MNG2HOST_PORT_623 (1 << 5)
2174#define E1000_MNG2HOST_PORT_664 (1 << 6)
2175 manc2h |= E1000_MNG2HOST_PORT_623;
2176 manc2h |= E1000_MNG2HOST_PORT_664;
2177 ew32(MANC2H, manc2h);
2178 ew32(MANC, manc);
2179}
2180
2181/**
2182 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2183 * @adapter: board private structure
2184 *
2185 * Configure the Tx unit of the MAC after a reset.
2186 **/
2187static void e1000_configure_tx(struct e1000_adapter *adapter)
2188{
2189 struct e1000_hw *hw = &adapter->hw;
2190 struct e1000_ring *tx_ring = adapter->tx_ring;
2191 u64 tdba;
2192 u32 tdlen, tctl, tipg, tarc;
2193 u32 ipgr1, ipgr2;
2194
2195 /* Setup the HW Tx Head and Tail descriptor pointers */
2196 tdba = tx_ring->dma;
2197 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2198 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2199 ew32(TDBAH, (tdba >> 32));
2200 ew32(TDLEN, tdlen);
2201 ew32(TDH, 0);
2202 ew32(TDT, 0);
2203 tx_ring->head = E1000_TDH;
2204 tx_ring->tail = E1000_TDT;
2205
2206 /* Set the default values for the Tx Inter Packet Gap timer */
2207 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2208 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2209 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2210
2211 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2212 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2213
2214 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2215 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2216 ew32(TIPG, tipg);
2217
2218 /* Set the Tx Interrupt Delay register */
2219 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2220 /* Tx irq moderation */
bc7f75fa
AK		 2221 ew32(TADV, adapter->tx_abs_int_delay);
2222
2223 /* Program the Transmit Control Register */
2224 tctl = er32(TCTL);
2225 tctl &= ~E1000_TCTL_CT;
2226 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2227 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2228
2229 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2230 tarc = er32(TARC(0));
ad68076e
BA		 2231 /*
2232 * set the speed mode bit, we'll clear it if we're not at
2233 * gigabit link later
2234 */
bc7f75fa
AK		 2235#define SPEED_MODE_BIT (1 << 21)
2236 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2237 ew32(TARC(0), tarc);
bc7f75fa
AK		 2238 }
2239
2240 /* errata: program both queues to unweighted RR */
2241 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2242 tarc = er32(TARC(0));
bc7f75fa 2243 tarc |= 1;
e9ec2c0f
JK		 2244 ew32(TARC(0), tarc);
2245 tarc = er32(TARC(1));
bc7f75fa 2246 tarc |= 1;
e9ec2c0f 2247 ew32(TARC(1), tarc);
bc7f75fa
AK		 2248 }
2249
bc7f75fa
AK		 2250 /* Setup Transmit Descriptor Settings for eop descriptor */
2251 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2252
2253 /* only set IDE if we are delaying interrupts using the timers */
2254 if (adapter->tx_int_delay)
2255 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2256
2257 /* enable Report Status bit */
2258 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2259
2260 ew32(TCTL, tctl);
2261
edfea6e6
SH		 2262 e1000e_config_collision_dist(hw);
2263
bc7f75fa
AK		 2264 adapter->tx_queue_len = adapter->netdev->tx_queue_len;
2265}
2266
2267/**
2268 * e1000_setup_rctl - configure the receive control registers
2269 * @adapter: Board private structure
2270 **/
2271#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2272 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2273static void e1000_setup_rctl(struct e1000_adapter *adapter)
2274{
2275 struct e1000_hw *hw = &adapter->hw;
2276 u32 rctl, rfctl;
2277 u32 psrctl = 0;
2278 u32 pages = 0;
2279
2280 /* Program MC offset vector base */
2281 rctl = er32(RCTL);
2282 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2283 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2284 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2285 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2286
2287 /* Do not Store bad packets */
2288 rctl &= ~E1000_RCTL_SBP;
2289
2290 /* Enable Long Packet receive */
2291 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2292 rctl &= ~E1000_RCTL_LPE;
2293 else
2294 rctl |= E1000_RCTL_LPE;
2295
eb7c3adb
JK		 2296 /* Some systems expect that the CRC is included in SMBUS traffic. The
2297 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2298 * host memory when this is enabled
2299 */
2300 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2301 rctl |= E1000_RCTL_SECRC;
5918bd88 2302
a4f58f54
BA		 2303 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2304 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2305 u16 phy_data;
2306
2307 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2308 phy_data &= 0xfff8;
2309 phy_data |= (1 << 2);
2310 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2311
2312 e1e_rphy(hw, 22, &phy_data);
2313 phy_data &= 0x0fff;
2314 phy_data |= (1 << 14);
2315 e1e_wphy(hw, 0x10, 0x2823);
2316 e1e_wphy(hw, 0x11, 0x0003);
2317 e1e_wphy(hw, 22, phy_data);
2318 }
2319
bc7f75fa
AK		 2320 /* Setup buffer sizes */
2321 rctl &= ~E1000_RCTL_SZ_4096;
2322 rctl |= E1000_RCTL_BSEX;
2323 switch (adapter->rx_buffer_len) {
2324 case 256:
2325 rctl |= E1000_RCTL_SZ_256;
2326 rctl &= ~E1000_RCTL_BSEX;
2327 break;
2328 case 512:
2329 rctl |= E1000_RCTL_SZ_512;
2330 rctl &= ~E1000_RCTL_BSEX;
2331 break;
2332 case 1024:
2333 rctl |= E1000_RCTL_SZ_1024;
2334 rctl &= ~E1000_RCTL_BSEX;
2335 break;
2336 case 2048:
2337 default:
2338 rctl |= E1000_RCTL_SZ_2048;
2339 rctl &= ~E1000_RCTL_BSEX;
2340 break;
2341 case 4096:
2342 rctl |= E1000_RCTL_SZ_4096;
2343 break;
2344 case 8192:
2345 rctl |= E1000_RCTL_SZ_8192;
2346 break;
2347 case 16384:
2348 rctl |= E1000_RCTL_SZ_16384;
2349 break;
2350 }
2351
2352 /*
2353 * 82571 and greater support packet-split where the protocol
2354 * header is placed in skb->data and the packet data is
2355 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2356 * In the case of a non-split, skb->data is linearly filled,
2357 * followed by the page buffers. Therefore, skb->data is
2358 * sized to hold the largest protocol header.
2359 *
2360 * allocations using alloc_page take too long for regular MTU
2361 * so only enable packet split for jumbo frames
2362 *
2363 * Using pages when the page size is greater than 16k wastes
2364 * a lot of memory, since we allocate 3 pages at all times
2365 * per packet.
2366 */
bc7f75fa 2367 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA		 2368 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2369 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2370 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2371 else
2372 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2373
2374 if (adapter->rx_ps_pages) {
2375 /* Configure extra packet-split registers */
2376 rfctl = er32(RFCTL);
2377 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2378 /*
2379 * disable packet split support for IPv6 extension headers,
2380 * because some malformed IPv6 headers can hang the Rx
2381 */
bc7f75fa
AK		 2382 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2383 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2384
2385 ew32(RFCTL, rfctl);
2386
140a7480
AK		 2387 /* Enable Packet split descriptors */
2388 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2389
2390 psrctl |= adapter->rx_ps_bsize0 >>
2391 E1000_PSRCTL_BSIZE0_SHIFT;
2392
2393 switch (adapter->rx_ps_pages) {
2394 case 3:
2395 psrctl |= PAGE_SIZE <<
2396 E1000_PSRCTL_BSIZE3_SHIFT;
2397 case 2:
2398 psrctl |= PAGE_SIZE <<
2399 E1000_PSRCTL_BSIZE2_SHIFT;
2400 case 1:
2401 psrctl |= PAGE_SIZE >>
2402 E1000_PSRCTL_BSIZE1_SHIFT;
2403 break;
2404 }
2405
2406 ew32(PSRCTL, psrctl);
2407 }
2408
2409 ew32(RCTL, rctl);
318a94d6
JK		 2410 /* just started the receive unit, no need to restart */
2411 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2412}
2413
2414/**
2415 * e1000_configure_rx - Configure Receive Unit after Reset
2416 * @adapter: board private structure
2417 *
2418 * Configure the Rx unit of the MAC after a reset.
2419 **/
2420static void e1000_configure_rx(struct e1000_adapter *adapter)
2421{
2422 struct e1000_hw *hw = &adapter->hw;
2423 struct e1000_ring *rx_ring = adapter->rx_ring;
2424 u64 rdba;
2425 u32 rdlen, rctl, rxcsum, ctrl_ext;
2426
2427 if (adapter->rx_ps_pages) {
2428 /* this is a 32 byte descriptor */
2429 rdlen = rx_ring->count *
2430 sizeof(union e1000_rx_desc_packet_split);
2431 adapter->clean_rx = e1000_clean_rx_irq_ps;
2432 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2433 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2434 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2435 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2436 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2437 } else {
97ac8cae 2438 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2439 adapter->clean_rx = e1000_clean_rx_irq;
2440 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2441 }
2442
2443 /* disable receives while setting up the descriptors */
2444 rctl = er32(RCTL);
2445 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2446 e1e_flush();
2447 msleep(10);
2448
2449 /* set the Receive Delay Timer Register */
2450 ew32(RDTR, adapter->rx_int_delay);
2451
2452 /* irq moderation */
2453 ew32(RADV, adapter->rx_abs_int_delay);
2454 if (adapter->itr_setting != 0)
ad68076e 2455 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2456
2457 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2458 /* Auto-Mask interrupts upon ICR access */
2459 ctrl_ext |= E1000_CTRL_EXT_IAME;
2460 ew32(IAM, 0xffffffff);
2461 ew32(CTRL_EXT, ctrl_ext);
2462 e1e_flush();
2463
ad68076e
BA		 2464 /*
2465 * Setup the HW Rx Head and Tail Descriptor Pointers and
2466 * the Base and Length of the Rx Descriptor Ring
2467 */
bc7f75fa 2468 rdba = rx_ring->dma;
284901a9 2469 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2470 ew32(RDBAH, (rdba >> 32));
2471 ew32(RDLEN, rdlen);
2472 ew32(RDH, 0);
2473 ew32(RDT, 0);
2474 rx_ring->head = E1000_RDH;
2475 rx_ring->tail = E1000_RDT;
2476
2477 /* Enable Receive Checksum Offload for TCP and UDP */
2478 rxcsum = er32(RXCSUM);
2479 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2480 rxcsum |= E1000_RXCSUM_TUOFL;
2481
ad68076e
BA		 2482 /*
2483 * IPv4 payload checksum for UDP fragments must be
2484 * used in conjunction with packet-split.
2485 */
bc7f75fa
AK		 2486 if (adapter->rx_ps_pages)
2487 rxcsum |= E1000_RXCSUM_IPPCSE;
2488 } else {
2489 rxcsum &= ~E1000_RXCSUM_TUOFL;
2490 /* no need to clear IPPCSE as it defaults to 0 */
2491 }
2492 ew32(RXCSUM, rxcsum);
2493
ad68076e
BA		 2494 /*
2495 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2496 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2497 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2498 */
53ec5498
BA		 2499 if (adapter->flags & FLAG_HAS_ERT) {
2500 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2501 u32 rxdctl = er32(RXDCTL(0));
2502 ew32(RXDCTL(0), rxdctl | 0x3);
2503 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2504 /*
2505 * With jumbo frames and early-receive enabled,
2506 * excessive C-state transition latencies result in
2507 * dropped transactions.
2508 */
2509 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2510 adapter->netdev->name, 55);
2511 } else {
2512 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2513 adapter->netdev->name,
2514 PM_QOS_DEFAULT_VALUE);
2515 }
97ac8cae 2516 }
bc7f75fa
AK		 2517
2518 /* Enable Receives */
2519 ew32(RCTL, rctl);
2520}
2521
2522/**
e2de3eb6 2523 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2524 * @hw: pointer to the HW structure
2525 * @mc_addr_list: array of multicast addresses to program
2526 * @mc_addr_count: number of multicast addresses to program
2527 * @rar_used_count: the first RAR register free to program
2528 * @rar_count: total number of supported Receive Address Registers
2529 *
2530 * Updates the Receive Address Registers and Multicast Table Array.
2531 * The caller must have a packed mc_addr_list of multicast addresses.
2532 * The parameter rar_count will usually be hw->mac.rar_entry_count
2533 * unless there are workarounds that change this. Currently no func pointer
2534 * exists and all implementations are handled in the generic version of this
2535 * function.
2536 **/
e2de3eb6
JK		 2537static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
2538 u32 mc_addr_count, u32 rar_used_count,
2539 u32 rar_count)
bc7f75fa 2540{
e2de3eb6 2541 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count,
bc7f75fa
AK		 2542 rar_used_count, rar_count);
2543}
2544
2545/**
2546 * e1000_set_multi - Multicast and Promiscuous mode set
2547 * @netdev: network interface device structure
2548 *
2549 * The set_multi entry point is called whenever the multicast address
2550 * list or the network interface flags are updated. This routine is
2551 * responsible for configuring the hardware for proper multicast,
2552 * promiscuous mode, and all-multi behavior.
2553 **/
2554static void e1000_set_multi(struct net_device *netdev)
2555{
2556 struct e1000_adapter *adapter = netdev_priv(netdev);
2557 struct e1000_hw *hw = &adapter->hw;
2558 struct e1000_mac_info *mac = &hw->mac;
2559 struct dev_mc_list *mc_ptr;
2560 u8 *mta_list;
2561 u32 rctl;
2562 int i;
2563
2564 /* Check for Promiscuous and All Multicast modes */
2565
2566 rctl = er32(RCTL);
2567
2568 if (netdev->flags & IFF_PROMISC) {
2569 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2570 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2571 } else {
746b9f02
PM		 2572 if (netdev->flags & IFF_ALLMULTI) {
2573 rctl |= E1000_RCTL_MPE;
2574 rctl &= ~E1000_RCTL_UPE;
2575 } else {
2576 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2577 }
78ed11a5 2578 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2579 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2580 }
2581
2582 ew32(RCTL, rctl);
2583
2584 if (netdev->mc_count) {
2585 mta_list = kmalloc(netdev->mc_count * 6, GFP_ATOMIC);
2586 if (!mta_list)
2587 return;
2588
2589 /* prepare a packed array of only addresses. */
2590 mc_ptr = netdev->mc_list;
2591
2592 for (i = 0; i < netdev->mc_count; i++) {
2593 if (!mc_ptr)
2594 break;
2595 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr,
2596 ETH_ALEN);
2597 mc_ptr = mc_ptr->next;
2598 }
2599
e2de3eb6 2600 e1000_update_mc_addr_list(hw, mta_list, i, 1,
bc7f75fa
AK		 2601 mac->rar_entry_count);
2602 kfree(mta_list);
2603 } else {
2604 /*
2605 * if we're called from probe, we might not have
2606 * anything to do here, so clear out the list
2607 */
e2de3eb6 2608 e1000_update_mc_addr_list(hw, NULL, 0, 1, mac->rar_entry_count);
bc7f75fa
AK		 2609 }
2610}
2611
2612/**
ad68076e 2613 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 2614 * @adapter: private board structure
2615 **/
2616static void e1000_configure(struct e1000_adapter *adapter)
2617{
2618 e1000_set_multi(adapter->netdev);
2619
2620 e1000_restore_vlan(adapter);
2621 e1000_init_manageability(adapter);
2622
2623 e1000_configure_tx(adapter);
2624 e1000_setup_rctl(adapter);
2625 e1000_configure_rx(adapter);
ad68076e 2626 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 2627}
2628
2629/**
2630 * e1000e_power_up_phy - restore link in case the phy was powered down
2631 * @adapter: address of board private structure
2632 *
2633 * The phy may be powered down to save power and turn off link when the
2634 * driver is unloaded and wake on lan is not enabled (among others)
2635 * *** this routine MUST be followed by a call to e1000e_reset ***
2636 **/
2637void e1000e_power_up_phy(struct e1000_adapter *adapter)
2638{
2639 u16 mii_reg = 0;
2640
2641 /* Just clear the power down bit to wake the phy back up */
318a94d6 2642 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
ad68076e
BA		 2643 /*
2644 * According to the manual, the phy will retain its
2645 * settings across a power-down/up cycle
2646 */
bc7f75fa
AK		 2647 e1e_rphy(&adapter->hw, PHY_CONTROL, &mii_reg);
2648 mii_reg &= ~MII_CR_POWER_DOWN;
2649 e1e_wphy(&adapter->hw, PHY_CONTROL, mii_reg);
2650 }
2651
2652 adapter->hw.mac.ops.setup_link(&adapter->hw);
2653}
2654
2655/**
2656 * e1000_power_down_phy - Power down the PHY
2657 *
2658 * Power down the PHY so no link is implied when interface is down
2659 * The PHY cannot be powered down is management or WoL is active
2660 */
2661static void e1000_power_down_phy(struct e1000_adapter *adapter)
2662{
2663 struct e1000_hw *hw = &adapter->hw;
2664 u16 mii_reg;
2665
2666 /* WoL is enabled */
23b66e2b 2667 if (adapter->wol)
bc7f75fa
AK		 2668 return;
2669
2670 /* non-copper PHY? */
318a94d6 2671 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 2672 return;
2673
2674 /* reset is blocked because of a SoL/IDER session */
ad68076e 2675 if (e1000e_check_mng_mode(hw) || e1000_check_reset_block(hw))
bc7f75fa
AK		 2676 return;
2677
489815ce 2678 /* manageability (AMT) is enabled */
bc7f75fa
AK		 2679 if (er32(MANC) & E1000_MANC_SMBUS_EN)
2680 return;
2681
2682 /* power down the PHY */
2683 e1e_rphy(hw, PHY_CONTROL, &mii_reg);
2684 mii_reg |= MII_CR_POWER_DOWN;
2685 e1e_wphy(hw, PHY_CONTROL, mii_reg);
2686 mdelay(1);
2687}
2688
2689/**
2690 * e1000e_reset - bring the hardware into a known good state
2691 *
2692 * This function boots the hardware and enables some settings that
2693 * require a configuration cycle of the hardware - those cannot be
2694 * set/changed during runtime. After reset the device needs to be
ad68076e 2695 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 2696 */
2697void e1000e_reset(struct e1000_adapter *adapter)
2698{
2699 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2700 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 2701 struct e1000_hw *hw = &adapter->hw;
2702 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2703 u32 pba = adapter->pba;
bc7f75fa
AK		 2704 u16 hwm;
2705
ad68076e 2706 /* reset Packet Buffer Allocation to default */
318a94d6 2707 ew32(PBA, pba);
df762464 2708
318a94d6 2709 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 2710 /*
2711 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 2712 * large enough to accommodate two full transmit packets,
2713 * rounded up to the next 1KB and expressed in KB. Likewise,
2714 * the Rx FIFO should be large enough to accommodate at least
2715 * one full receive packet and is similarly rounded up and
ad68076e
BA		 2716 * expressed in KB.
2717 */
df762464 2718 pba = er32(PBA);
bc7f75fa 2719 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2720 tx_space = pba >> 16;
bc7f75fa 2721 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2722 pba &= 0xffff;
ad68076e
BA		 2723 /*
2724 * the Tx fifo also stores 16 bytes of information about the tx
2725 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 2726 */
2727 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 2728 sizeof(struct e1000_tx_desc) -
2729 ETH_FCS_LEN) * 2;
2730 min_tx_space = ALIGN(min_tx_space, 1024);
2731 min_tx_space >>= 10;
2732 /* software strips receive CRC, so leave room for it */
318a94d6 2733 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 2734 min_rx_space = ALIGN(min_rx_space, 1024);
2735 min_rx_space >>= 10;
2736
ad68076e
BA		 2737 /*
2738 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2739 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 2740 * allocation, take space away from current Rx allocation
2741 */
df762464
AK		 2742 if ((tx_space < min_tx_space) &&
2743 ((min_tx_space - tx_space) < pba)) {
2744 pba -= min_tx_space - tx_space;
bc7f75fa 2745
ad68076e
BA		 2746 /*
2747 * if short on Rx space, Rx wins and must trump tx
2748 * adjustment or use Early Receive if available
2749 */
df762464 2750 if ((pba < min_rx_space) &&
bc7f75fa
AK		 2751 (!(adapter->flags & FLAG_HAS_ERT)))
2752 /* ERT enabled in e1000_configure_rx */
df762464 2753 pba = min_rx_space;
bc7f75fa 2754 }
df762464
AK		 2755
2756 ew32(PBA, pba);
bc7f75fa
AK		 2757 }
2758
bc7f75fa 2759
ad68076e
BA		 2760 /*
2761 * flow control settings
2762 *
38eb394e 2763 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 2764 * (or the size used for early receive) above it in the Rx FIFO.
2765 * Set it to the lower of:
2766 * - 90% of the Rx FIFO size, and
2767 * - the full Rx FIFO size minus the early receive size (for parts
2768 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 2769 * - the full Rx FIFO size minus one full frame
ad68076e 2770 */
38eb394e
BA		 2771 if (hw->mac.type == e1000_pchlan) {
2772 /*
2773 * Workaround PCH LOM adapter hangs with certain network
2774 * loads. If hangs persist, try disabling Tx flow control.
2775 */
2776 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2777 fc->high_water = 0x3500;
2778 fc->low_water = 0x1500;
2779 } else {
2780 fc->high_water = 0x5000;
2781 fc->low_water = 0x3000;
2782 }
2783 } else {
2784 if ((adapter->flags & FLAG_HAS_ERT) &&
2785 (adapter->netdev->mtu > ETH_DATA_LEN))
2786 hwm = min(((pba << 10) * 9 / 10),
2787 ((pba << 10) - (E1000_ERT_2048 << 3)));
2788 else
2789 hwm = min(((pba << 10) * 9 / 10),
2790 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 2791
38eb394e
BA		 2792 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
2793 fc->low_water = fc->high_water - 8;
2794 }
bc7f75fa
AK		 2795
2796 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2797 fc->pause_time = 0xFFFF;
bc7f75fa 2798 else
318a94d6
JK		 2799 fc->pause_time = E1000_FC_PAUSE_TIME;
2800 fc->send_xon = 1;
5c48ef3e 2801 fc->current_mode = fc->requested_mode;
bc7f75fa
AK		 2802
2803 /* Allow time for pending master requests to run */
2804 mac->ops.reset_hw(hw);
97ac8cae
BA		 2805
2806 /*
2807 * For parts with AMT enabled, let the firmware know
2808 * that the network interface is in control
2809 */
c43bc57e 2810 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 2811 e1000_get_hw_control(adapter);
2812
bc7f75fa 2813 ew32(WUC, 0);
a4f58f54
BA		 2814 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
2815 e1e_wphy(&adapter->hw, BM_WUC, 0);
bc7f75fa
AK		 2816
2817 if (mac->ops.init_hw(hw))
44defeb3 2818 e_err("Hardware Error\n");
bc7f75fa 2819
38eb394e
BA		 2820 /* additional part of the flow-control workaround above */
2821 if (hw->mac.type == e1000_pchlan)
2822 ew32(FCRTV_PCH, 0x1000);
2823
bc7f75fa
AK		 2824 e1000_update_mng_vlan(adapter);
2825
2826 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2827 ew32(VET, ETH_P_8021Q);
2828
2829 e1000e_reset_adaptive(hw);
2830 e1000_get_phy_info(hw);
2831
918d7197
BA		 2832 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
2833 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 2834 u16 phy_data = 0;
ad68076e
BA		 2835 /*
2836 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2837 * the return value of this function because there is nothing
ad68076e
BA		 2838 * different we would do if it failed
2839 */
bc7f75fa
AK		 2840 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2841 phy_data &= ~IGP02E1000_PM_SPD;
2842 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2843 }
bc7f75fa
AK		 2844}
2845
2846int e1000e_up(struct e1000_adapter *adapter)
2847{
2848 struct e1000_hw *hw = &adapter->hw;
2849
53ec5498
BA		 2850 /* DMA latency requirement to workaround early-receive/jumbo issue */
2851 if (adapter->flags & FLAG_HAS_ERT)
2852 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY,
2853 adapter->netdev->name,
2854 PM_QOS_DEFAULT_VALUE);
2855
bc7f75fa
AK		 2856 /* hardware has been reset, we need to reload some things */
2857 e1000_configure(adapter);
2858
2859 clear_bit(__E1000_DOWN, &adapter->state);
2860
2861 napi_enable(&adapter->napi);
4662e82b
BA		 2862 if (adapter->msix_entries)
2863 e1000_configure_msix(adapter);
bc7f75fa
AK		 2864 e1000_irq_enable(adapter);
2865
4cb9be7a
JB		 2866 netif_wake_queue(adapter->netdev);
2867
bc7f75fa
AK		 2868 /* fire a link change interrupt to start the watchdog */
2869 ew32(ICS, E1000_ICS_LSC);
2870 return 0;
2871}
2872
2873void e1000e_down(struct e1000_adapter *adapter)
2874{
2875 struct net_device *netdev = adapter->netdev;
2876 struct e1000_hw *hw = &adapter->hw;
2877 u32 tctl, rctl;
2878
ad68076e
BA		 2879 /*
2880 * signal that we're down so the interrupt handler does not
2881 * reschedule our watchdog timer
2882 */
bc7f75fa
AK		 2883 set_bit(__E1000_DOWN, &adapter->state);
2884
2885 /* disable receives in the hardware */
2886 rctl = er32(RCTL);
2887 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2888 /* flush and sleep below */
2889
4cb9be7a 2890 netif_stop_queue(netdev);
bc7f75fa
AK		 2891
2892 /* disable transmits in the hardware */
2893 tctl = er32(TCTL);
2894 tctl &= ~E1000_TCTL_EN;
2895 ew32(TCTL, tctl);
2896 /* flush both disables and wait for them to finish */
2897 e1e_flush();
2898 msleep(10);
2899
2900 napi_disable(&adapter->napi);
2901 e1000_irq_disable(adapter);
2902
2903 del_timer_sync(&adapter->watchdog_timer);
2904 del_timer_sync(&adapter->phy_info_timer);
2905
2906 netdev->tx_queue_len = adapter->tx_queue_len;
2907 netif_carrier_off(netdev);
2908 adapter->link_speed = 0;
2909 adapter->link_duplex = 0;
2910
52cc3086
JK		 2911 if (!pci_channel_offline(adapter->pdev))
2912 e1000e_reset(adapter);
bc7f75fa
AK		 2913 e1000_clean_tx_ring(adapter);
2914 e1000_clean_rx_ring(adapter);
2915
53ec5498
BA		 2916 if (adapter->flags & FLAG_HAS_ERT)
2917 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY,
2918 adapter->netdev->name);
2919
bc7f75fa
AK		 2920 /*
2921 * TODO: for power management, we could drop the link and
2922 * pci_disable_device here.
2923 */
2924}
2925
2926void e1000e_reinit_locked(struct e1000_adapter *adapter)
2927{
2928 might_sleep();
2929 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2930 msleep(1);
2931 e1000e_down(adapter);
2932 e1000e_up(adapter);
2933 clear_bit(__E1000_RESETTING, &adapter->state);
2934}
2935
2936/**
2937 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2938 * @adapter: board private structure to initialize
2939 *
2940 * e1000_sw_init initializes the Adapter private data structure.
2941 * Fields are initialized based on PCI device information and
2942 * OS network device settings (MTU size).
2943 **/
2944static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2945{
bc7f75fa
AK		 2946 struct net_device *netdev = adapter->netdev;
2947
2948 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2949 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 2950 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2951 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 2952
4662e82b 2953 e1000e_set_interrupt_capability(adapter);
bc7f75fa 2954
4662e82b
BA		 2955 if (e1000_alloc_queues(adapter))
2956 return -ENOMEM;
bc7f75fa 2957
bc7f75fa 2958 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 2959 e1000_irq_disable(adapter);
2960
bc7f75fa
AK		 2961 set_bit(__E1000_DOWN, &adapter->state);
2962 return 0;
bc7f75fa
AK		 2963}
2964
f8d59f78
BA		 2965/**
2966 * e1000_intr_msi_test - Interrupt Handler
2967 * @irq: interrupt number
2968 * @data: pointer to a network interface device structure
2969 **/
2970static irqreturn_t e1000_intr_msi_test(int irq, void *data)
2971{
2972 struct net_device *netdev = data;
2973 struct e1000_adapter *adapter = netdev_priv(netdev);
2974 struct e1000_hw *hw = &adapter->hw;
2975 u32 icr = er32(ICR);
2976
3bb99fe2 2977 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 2978 if (icr & E1000_ICR_RXSEQ) {
2979 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
2980 wmb();
2981 }
2982
2983 return IRQ_HANDLED;
2984}
2985
2986/**
2987 * e1000_test_msi_interrupt - Returns 0 for successful test
2988 * @adapter: board private struct
2989 *
2990 * code flow taken from tg3.c
2991 **/
2992static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2993{
2994 struct net_device *netdev = adapter->netdev;
2995 struct e1000_hw *hw = &adapter->hw;
2996 int err;
2997
2998 /* poll_enable hasn't been called yet, so don't need disable */
2999 /* clear any pending events */
3000 er32(ICR);
3001
3002 /* free the real vector and request a test handler */
3003 e1000_free_irq(adapter);
4662e82b 3004 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 3005
3006 /* Assume that the test fails, if it succeeds then the test
3007 * MSI irq handler will unset this flag */
3008 adapter->flags |= FLAG_MSI_TEST_FAILED;
3009
3010 err = pci_enable_msi(adapter->pdev);
3011 if (err)
3012 goto msi_test_failed;
3013
a0607fd3 3014 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 3015 netdev->name, netdev);
3016 if (err) {
3017 pci_disable_msi(adapter->pdev);
3018 goto msi_test_failed;
3019 }
3020
3021 wmb();
3022
3023 e1000_irq_enable(adapter);
3024
3025 /* fire an unusual interrupt on the test handler */
3026 ew32(ICS, E1000_ICS_RXSEQ);
3027 e1e_flush();
3028 msleep(50);
3029
3030 e1000_irq_disable(adapter);
3031
3032 rmb();
3033
3034 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3035 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 3036 err = -EIO;
3037 e_info("MSI interrupt test failed!\n");
3038 }
3039
3040 free_irq(adapter->pdev->irq, netdev);
3041 pci_disable_msi(adapter->pdev);
3042
3043 if (err == -EIO)
3044 goto msi_test_failed;
3045
3046 /* okay so the test worked, restore settings */
3bb99fe2 3047 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3048msi_test_failed:
4662e82b 3049 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3050 e1000_request_irq(adapter);
3051 return err;
3052}
3053
3054/**
3055 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3056 * @adapter: board private struct
3057 *
3058 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3059 **/
3060static int e1000_test_msi(struct e1000_adapter *adapter)
3061{
3062 int err;
3063 u16 pci_cmd;
3064
3065 if (!(adapter->flags & FLAG_MSI_ENABLED))
3066 return 0;
3067
3068 /* disable SERR in case the MSI write causes a master abort */
3069 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3070 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3071 pci_cmd & ~PCI_COMMAND_SERR);
3072
3073 err = e1000_test_msi_interrupt(adapter);
3074
3075 /* restore previous setting of command word */
3076 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3077
3078 /* success ! */
3079 if (!err)
3080 return 0;
3081
3082 /* EIO means MSI test failed */
3083 if (err != -EIO)
3084 return err;
3085
3086 /* back to INTx mode */
3087 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3088
3089 e1000_free_irq(adapter);
3090
3091 err = e1000_request_irq(adapter);
3092
3093 return err;
3094}
3095
bc7f75fa
AK		 3096/**
3097 * e1000_open - Called when a network interface is made active
3098 * @netdev: network interface device structure
3099 *
3100 * Returns 0 on success, negative value on failure
3101 *
3102 * The open entry point is called when a network interface is made
3103 * active by the system (IFF_UP). At this point all resources needed
3104 * for transmit and receive operations are allocated, the interrupt
3105 * handler is registered with the OS, the watchdog timer is started,
3106 * and the stack is notified that the interface is ready.
3107 **/
3108static int e1000_open(struct net_device *netdev)
3109{
3110 struct e1000_adapter *adapter = netdev_priv(netdev);
3111 struct e1000_hw *hw = &adapter->hw;
3112 int err;
3113
3114 /* disallow open during test */
3115 if (test_bit(__E1000_TESTING, &adapter->state))
3116 return -EBUSY;
3117
9c563d20
JB		 3118 netif_carrier_off(netdev);
3119
bc7f75fa
AK		 3120 /* allocate transmit descriptors */
3121 err = e1000e_setup_tx_resources(adapter);
3122 if (err)
3123 goto err_setup_tx;
3124
3125 /* allocate receive descriptors */
3126 err = e1000e_setup_rx_resources(adapter);
3127 if (err)
3128 goto err_setup_rx;
3129
3130 e1000e_power_up_phy(adapter);
3131
3132 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3133 if ((adapter->hw.mng_cookie.status &
3134 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3135 e1000_update_mng_vlan(adapter);
3136
ad68076e
BA		 3137 /*
3138 * If AMT is enabled, let the firmware know that the network
3139 * interface is now open
3140 */
c43bc57e 3141 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3142 e1000_get_hw_control(adapter);
3143
ad68076e
BA		 3144 /*
3145 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3146 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3147 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3148 * clean_rx handler before we do so.
3149 */
bc7f75fa
AK		 3150 e1000_configure(adapter);
3151
3152 err = e1000_request_irq(adapter);
3153 if (err)
3154 goto err_req_irq;
3155
f8d59f78
BA		 3156 /*
3157 * Work around PCIe errata with MSI interrupts causing some chipsets to
3158 * ignore e1000e MSI messages, which means we need to test our MSI
3159 * interrupt now
3160 */
4662e82b 3161 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3162 err = e1000_test_msi(adapter);
3163 if (err) {
3164 e_err("Interrupt allocation failed\n");
3165 goto err_req_irq;
3166 }
3167 }
3168
bc7f75fa
AK		 3169 /* From here on the code is the same as e1000e_up() */
3170 clear_bit(__E1000_DOWN, &adapter->state);
3171
3172 napi_enable(&adapter->napi);
3173
3174 e1000_irq_enable(adapter);
3175
4cb9be7a 3176 netif_start_queue(netdev);
d55b53ff 3177
bc7f75fa
AK		 3178 /* fire a link status change interrupt to start the watchdog */
3179 ew32(ICS, E1000_ICS_LSC);
3180
3181 return 0;
3182
3183err_req_irq:
3184 e1000_release_hw_control(adapter);
3185 e1000_power_down_phy(adapter);
3186 e1000e_free_rx_resources(adapter);
3187err_setup_rx:
3188 e1000e_free_tx_resources(adapter);
3189err_setup_tx:
3190 e1000e_reset(adapter);
3191
3192 return err;
3193}
3194
3195/**
3196 * e1000_close - Disables a network interface
3197 * @netdev: network interface device structure
3198 *
3199 * Returns 0, this is not allowed to fail
3200 *
3201 * The close entry point is called when an interface is de-activated
3202 * by the OS. The hardware is still under the drivers control, but
3203 * needs to be disabled. A global MAC reset is issued to stop the
3204 * hardware, and all transmit and receive resources are freed.
3205 **/
3206static int e1000_close(struct net_device *netdev)
3207{
3208 struct e1000_adapter *adapter = netdev_priv(netdev);
3209
3210 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3211 e1000e_down(adapter);
3212 e1000_power_down_phy(adapter);
3213 e1000_free_irq(adapter);
3214
3215 e1000e_free_tx_resources(adapter);
3216 e1000e_free_rx_resources(adapter);
3217
ad68076e
BA		 3218 /*
3219 * kill manageability vlan ID if supported, but not if a vlan with
3220 * the same ID is registered on the host OS (let 8021q kill it)
3221 */
bc7f75fa
AK		 3222 if ((adapter->hw.mng_cookie.status &
3223 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3224 !(adapter->vlgrp &&
3225 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3226 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3227
ad68076e
BA		 3228 /*
3229 * If AMT is enabled, let the firmware know that the network
3230 * interface is now closed
3231 */
c43bc57e 3232 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3233 e1000_release_hw_control(adapter);
3234
3235 return 0;
3236}
3237/**
3238 * e1000_set_mac - Change the Ethernet Address of the NIC
3239 * @netdev: network interface device structure
3240 * @p: pointer to an address structure
3241 *
3242 * Returns 0 on success, negative on failure
3243 **/
3244static int e1000_set_mac(struct net_device *netdev, void *p)
3245{
3246 struct e1000_adapter *adapter = netdev_priv(netdev);
3247 struct sockaddr *addr = p;
3248
3249 if (!is_valid_ether_addr(addr->sa_data))
3250 return -EADDRNOTAVAIL;
3251
3252 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3253 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3254
3255 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3256
3257 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3258 /* activate the work around */
3259 e1000e_set_laa_state_82571(&adapter->hw, 1);
3260
ad68076e
BA		 3261 /*
3262 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3263 * between the time RAR[0] gets clobbered and the time it
3264 * gets fixed (in e1000_watchdog), the actual LAA is in one
3265 * of the RARs and no incoming packets directed to this port
3266 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3267 * RAR[14]
3268 */
bc7f75fa
AK		 3269 e1000e_rar_set(&adapter->hw,
3270 adapter->hw.mac.addr,
3271 adapter->hw.mac.rar_entry_count - 1);
3272 }
3273
3274 return 0;
3275}
3276
a8f88ff5
JB		 3277/**
3278 * e1000e_update_phy_task - work thread to update phy
3279 * @work: pointer to our work struct
3280 *
3281 * this worker thread exists because we must acquire a
3282 * semaphore to read the phy, which we could msleep while
3283 * waiting for it, and we can't msleep in a timer.
3284 **/
3285static void e1000e_update_phy_task(struct work_struct *work)
3286{
3287 struct e1000_adapter *adapter = container_of(work,
3288 struct e1000_adapter, update_phy_task);
3289 e1000_get_phy_info(&adapter->hw);
3290}
3291
ad68076e
BA		 3292/*
3293 * Need to wait a few seconds after link up to get diagnostic information from
3294 * the phy
3295 */
bc7f75fa
AK		 3296static void e1000_update_phy_info(unsigned long data)
3297{
3298 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3299 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3300}
3301
3302/**
3303 * e1000e_update_stats - Update the board statistics counters
3304 * @adapter: board private structure
3305 **/
3306void e1000e_update_stats(struct e1000_adapter *adapter)
3307{
7274c20f 3308 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3309 struct e1000_hw *hw = &adapter->hw;
3310 struct pci_dev *pdev = adapter->pdev;
a4f58f54 3311 u16 phy_data;
bc7f75fa
AK		 3312
3313 /*
3314 * Prevent stats update while adapter is being reset, or if the pci
3315 * connection is down.
3316 */
3317 if (adapter->link_speed == 0)
3318 return;
3319 if (pci_channel_offline(pdev))
3320 return;
3321
bc7f75fa
AK		 3322 adapter->stats.crcerrs += er32(CRCERRS);
3323 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3324 adapter->stats.gorc += er32(GORCL);
3325 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3326 adapter->stats.bprc += er32(BPRC);
3327 adapter->stats.mprc += er32(MPRC);
3328 adapter->stats.roc += er32(ROC);
3329
bc7f75fa 3330 adapter->stats.mpc += er32(MPC);
a4f58f54
BA		 3331 if ((hw->phy.type == e1000_phy_82578) ||
3332 (hw->phy.type == e1000_phy_82577)) {
3333 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
3334 e1e_rphy(hw, HV_SCC_LOWER, &phy_data);
3335 adapter->stats.scc += phy_data;
3336
3337 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
3338 e1e_rphy(hw, HV_ECOL_LOWER, &phy_data);
3339 adapter->stats.ecol += phy_data;
3340
3341 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
3342 e1e_rphy(hw, HV_MCC_LOWER, &phy_data);
3343 adapter->stats.mcc += phy_data;
3344
3345 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
3346 e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data);
3347 adapter->stats.latecol += phy_data;
3348
3349 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
3350 e1e_rphy(hw, HV_DC_LOWER, &phy_data);
3351 adapter->stats.dc += phy_data;
3352 } else {
3353 adapter->stats.scc += er32(SCC);
3354 adapter->stats.ecol += er32(ECOL);
3355 adapter->stats.mcc += er32(MCC);
3356 adapter->stats.latecol += er32(LATECOL);
3357 adapter->stats.dc += er32(DC);
3358 }
bc7f75fa
AK		 3359 adapter->stats.xonrxc += er32(XONRXC);
3360 adapter->stats.xontxc += er32(XONTXC);
3361 adapter->stats.xoffrxc += er32(XOFFRXC);
3362 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3363 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3364 adapter->stats.gotc += er32(GOTCL);
3365 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3366 adapter->stats.rnbc += er32(RNBC);
3367 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3368
3369 adapter->stats.mptc += er32(MPTC);
3370 adapter->stats.bptc += er32(BPTC);
3371
3372 /* used for adaptive IFS */
3373
3374 hw->mac.tx_packet_delta = er32(TPT);
3375 adapter->stats.tpt += hw->mac.tx_packet_delta;
a4f58f54
BA		 3376 if ((hw->phy.type == e1000_phy_82578) ||
3377 (hw->phy.type == e1000_phy_82577)) {
3378 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
3379 e1e_rphy(hw, HV_COLC_LOWER, &phy_data);
3380 hw->mac.collision_delta = phy_data;
3381 } else {
3382 hw->mac.collision_delta = er32(COLC);
3383 }
bc7f75fa
AK		 3384 adapter->stats.colc += hw->mac.collision_delta;
3385
3386 adapter->stats.algnerrc += er32(ALGNERRC);
3387 adapter->stats.rxerrc += er32(RXERRC);
a4f58f54
BA		 3388 if ((hw->phy.type == e1000_phy_82578) ||
3389 (hw->phy.type == e1000_phy_82577)) {
3390 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
3391 e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data);
3392 adapter->stats.tncrs += phy_data;
3393 } else {
3394 if ((hw->mac.type != e1000_82574) &&
3395 (hw->mac.type != e1000_82583))
3396 adapter->stats.tncrs += er32(TNCRS);
3397 }
bc7f75fa
AK		 3398 adapter->stats.cexterr += er32(CEXTERR);
3399 adapter->stats.tsctc += er32(TSCTC);
3400 adapter->stats.tsctfc += er32(TSCTFC);
3401
bc7f75fa 3402 /* Fill out the OS statistics structure */
7274c20f
AK		 3403 netdev->stats.multicast = adapter->stats.mprc;
3404 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3405
3406 /* Rx Errors */
3407
ad68076e
BA		 3408 /*
3409 * RLEC on some newer hardware can be incorrect so build
3410 * our own version based on RUC and ROC
3411 */
7274c20f 3412 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3413 adapter->stats.crcerrs + adapter->stats.algnerrc +
3414 adapter->stats.ruc + adapter->stats.roc +
3415 adapter->stats.cexterr;
7274c20f 3416 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3417 adapter->stats.roc;
7274c20f
AK		 3418 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3419 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3420 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3421
3422 /* Tx Errors */
7274c20f 3423 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3424 adapter->stats.latecol;
7274c20f
AK		 3425 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3426 netdev->stats.tx_window_errors = adapter->stats.latecol;
3427 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3428
3429 /* Tx Dropped needs to be maintained elsewhere */
3430
bc7f75fa
AK		 3431 /* Management Stats */
3432 adapter->stats.mgptc += er32(MGTPTC);
3433 adapter->stats.mgprc += er32(MGTPRC);
3434 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3435}
3436
7c25769f
BA		 3437/**
3438 * e1000_phy_read_status - Update the PHY register status snapshot
3439 * @adapter: board private structure
3440 **/
3441static void e1000_phy_read_status(struct e1000_adapter *adapter)
3442{
3443 struct e1000_hw *hw = &adapter->hw;
3444 struct e1000_phy_regs *phy = &adapter->phy_regs;
3445 int ret_val;
7c25769f
BA		 3446
3447 if ((er32(STATUS) & E1000_STATUS_LU) &&
3448 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3449 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3450 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3451 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3452 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3453 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3454 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3455 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3456 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3457 if (ret_val)
44defeb3 3458 e_warn("Error reading PHY register\n");
7c25769f
BA		 3459 } else {
3460 /*
3461 * Do not read PHY registers if link is not up
3462 * Set values to typical power-on defaults
3463 */
3464 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3465 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3466 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3467 BMSR_ERCAP);
3468 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3469 ADVERTISE_ALL | ADVERTISE_CSMA);
3470 phy->lpa = 0;
3471 phy->expansion = EXPANSION_ENABLENPAGE;
3472 phy->ctrl1000 = ADVERTISE_1000FULL;
3473 phy->stat1000 = 0;
3474 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3475 }
7c25769f
BA		 3476}
3477
bc7f75fa
AK		 3478static void e1000_print_link_info(struct e1000_adapter *adapter)
3479{
bc7f75fa
AK		 3480 struct e1000_hw *hw = &adapter->hw;
3481 u32 ctrl = er32(CTRL);
3482
8f12fe86
BA		 3483 /* Link status message must follow this format for user tools */
3484 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3485 "Flow Control: %s\n",
3486 adapter->netdev->name,
44defeb3
JK		 3487 adapter->link_speed,
3488 (adapter->link_duplex == FULL_DUPLEX) ?
3489 "Full Duplex" : "Half Duplex",
3490 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3491 "RX/TX" :
3492 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3493 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3494}
3495
a20e4cf9 3496bool e1000_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3497{
3498 struct e1000_hw *hw = &adapter->hw;
3499 bool link_active = 0;
3500 s32 ret_val = 0;
3501
3502 /*
3503 * get_link_status is set on LSC (link status) interrupt or
3504 * Rx sequence error interrupt. get_link_status will stay
3505 * false until the check_for_link establishes link
3506 * for copper adapters ONLY
3507 */
3508 switch (hw->phy.media_type) {
3509 case e1000_media_type_copper:
3510 if (hw->mac.get_link_status) {
3511 ret_val = hw->mac.ops.check_for_link(hw);
3512 link_active = !hw->mac.get_link_status;
3513 } else {
3514 link_active = 1;
3515 }
3516 break;
3517 case e1000_media_type_fiber:
3518 ret_val = hw->mac.ops.check_for_link(hw);
3519 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3520 break;
3521 case e1000_media_type_internal_serdes:
3522 ret_val = hw->mac.ops.check_for_link(hw);
3523 link_active = adapter->hw.mac.serdes_has_link;
3524 break;
3525 default:
3526 case e1000_media_type_unknown:
3527 break;
3528 }
3529
3530 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3531 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3532 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3533 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 3534 }
3535
3536 return link_active;
3537}
3538
3539static void e1000e_enable_receives(struct e1000_adapter *adapter)
3540{
3541 /* make sure the receive unit is started */
3542 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3543 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3544 struct e1000_hw *hw = &adapter->hw;
3545 u32 rctl = er32(RCTL);
3546 ew32(RCTL, rctl | E1000_RCTL_EN);
3547 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3548 }
3549}
3550
bc7f75fa
AK		 3551/**
3552 * e1000_watchdog - Timer Call-back
3553 * @data: pointer to adapter cast into an unsigned long
3554 **/
3555static void e1000_watchdog(unsigned long data)
3556{
3557 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3558
3559 /* Do the rest outside of interrupt context */
3560 schedule_work(&adapter->watchdog_task);
3561
3562 /* TODO: make this use queue_delayed_work() */
3563}
3564
3565static void e1000_watchdog_task(struct work_struct *work)
3566{
3567 struct e1000_adapter *adapter = container_of(work,
3568 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 3569 struct net_device *netdev = adapter->netdev;
3570 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3571 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 3572 struct e1000_ring *tx_ring = adapter->tx_ring;
3573 struct e1000_hw *hw = &adapter->hw;
3574 u32 link, tctl;
bc7f75fa
AK		 3575 int tx_pending = 0;
3576
318a94d6
JK		 3577 link = e1000_has_link(adapter);
3578 if ((netif_carrier_ok(netdev)) && link) {
3579 e1000e_enable_receives(adapter);
bc7f75fa 3580 goto link_up;
bc7f75fa
AK		 3581 }
3582
3583 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3584 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3585 e1000_update_mng_vlan(adapter);
3586
bc7f75fa
AK		 3587 if (link) {
3588 if (!netif_carrier_ok(netdev)) {
3589 bool txb2b = 1;
318a94d6 3590 /* update snapshot of PHY registers on LSC */
7c25769f 3591 e1000_phy_read_status(adapter);
bc7f75fa
AK		 3592 mac->ops.get_link_up_info(&adapter->hw,
3593 &adapter->link_speed,
3594 &adapter->link_duplex);
3595 e1000_print_link_info(adapter);
f4187b56
BA		 3596 /*
3597 * On supported PHYs, check for duplex mismatch only
3598 * if link has autonegotiated at 10/100 half
3599 */
3600 if ((hw->phy.type == e1000_phy_igp_3 ||
3601 hw->phy.type == e1000_phy_bm) &&
3602 (hw->mac.autoneg == true) &&
3603 (adapter->link_speed == SPEED_10 ||
3604 adapter->link_speed == SPEED_100) &&
3605 (adapter->link_duplex == HALF_DUPLEX)) {
3606 u16 autoneg_exp;
3607
3608 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3609
3610 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3611 e_info("Autonegotiated half duplex but"
3612 " link partner cannot autoneg. "
3613 " Try forcing full duplex if "
3614 "link gets many collisions.\n");
3615 }
3616
ad68076e
BA		 3617 /*
3618 * tweak tx_queue_len according to speed/duplex
3619 * and adjust the timeout factor
3620 */
bc7f75fa
AK		 3621 netdev->tx_queue_len = adapter->tx_queue_len;
3622 adapter->tx_timeout_factor = 1;
3623 switch (adapter->link_speed) {
3624 case SPEED_10:
3625 txb2b = 0;
3626 netdev->tx_queue_len = 10;
10f1b492 3627 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 3628 break;
3629 case SPEED_100:
3630 txb2b = 0;
3631 netdev->tx_queue_len = 100;
4c86e0b9 3632 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 3633 break;
3634 }
3635
ad68076e
BA		 3636 /*
3637 * workaround: re-program speed mode bit after
3638 * link-up event
3639 */
bc7f75fa
AK		 3640 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3641 !txb2b) {
3642 u32 tarc0;
e9ec2c0f 3643 tarc0 = er32(TARC(0));
bc7f75fa 3644 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3645 ew32(TARC(0), tarc0);
bc7f75fa
AK		 3646 }
3647
ad68076e
BA		 3648 /*
3649 * disable TSO for pcie and 10/100 speeds, to avoid
3650 * some hardware issues
3651 */
bc7f75fa
AK		 3652 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3653 switch (adapter->link_speed) {
3654 case SPEED_10:
3655 case SPEED_100:
44defeb3 3656 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 3657 netdev->features &= ~NETIF_F_TSO;
3658 netdev->features &= ~NETIF_F_TSO6;
3659 break;
3660 case SPEED_1000:
3661 netdev->features |= NETIF_F_TSO;
3662 netdev->features |= NETIF_F_TSO6;
3663 break;
3664 default:
3665 /* oops */
3666 break;
3667 }
3668 }
3669
ad68076e
BA		 3670 /*
3671 * enable transmits in the hardware, need to do this
3672 * after setting TARC(0)
3673 */
bc7f75fa
AK		 3674 tctl = er32(TCTL);
3675 tctl |= E1000_TCTL_EN;
3676 ew32(TCTL, tctl);
3677
75eb0fad
BA		 3678 /*
3679 * Perform any post-link-up configuration before
3680 * reporting link up.
3681 */
3682 if (phy->ops.cfg_on_link_up)
3683 phy->ops.cfg_on_link_up(hw);
3684
bc7f75fa 3685 netif_carrier_on(netdev);
bc7f75fa
AK		 3686
3687 if (!test_bit(__E1000_DOWN, &adapter->state))
3688 mod_timer(&adapter->phy_info_timer,
3689 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 3690 }
3691 } else {
3692 if (netif_carrier_ok(netdev)) {
3693 adapter->link_speed = 0;
3694 adapter->link_duplex = 0;
8f12fe86
BA		 3695 /* Link status message must follow this format */
3696 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
3697 adapter->netdev->name);
bc7f75fa 3698 netif_carrier_off(netdev);
bc7f75fa
AK		 3699 if (!test_bit(__E1000_DOWN, &adapter->state))
3700 mod_timer(&adapter->phy_info_timer,
3701 round_jiffies(jiffies + 2 * HZ));
3702
3703 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3704 schedule_work(&adapter->reset_task);
3705 }
3706 }
3707
3708link_up:
3709 e1000e_update_stats(adapter);
3710
3711 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3712 adapter->tpt_old = adapter->stats.tpt;
3713 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3714 adapter->colc_old = adapter->stats.colc;
3715
7c25769f
BA		 3716 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3717 adapter->gorc_old = adapter->stats.gorc;
3718 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3719 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 3720
3721 e1000e_update_adaptive(&adapter->hw);
3722
3723 if (!netif_carrier_ok(netdev)) {
3724 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3725 tx_ring->count);
3726 if (tx_pending) {
ad68076e
BA		 3727 /*
3728 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 3729 * but we've got queued Tx work that's never going
3730 * to get done, so reset controller to flush Tx.
ad68076e
BA		 3731 * (Do the reset outside of interrupt context).
3732 */
bc7f75fa
AK		 3733 adapter->tx_timeout_count++;
3734 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 3735 /* return immediately since reset is imminent */
3736 return;
bc7f75fa
AK		 3737 }
3738 }
3739
ad68076e 3740 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 3741 if (adapter->msix_entries)
3742 ew32(ICS, adapter->rx_ring->ims_val);
3743 else
3744 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 3745
3746 /* Force detection of hung controller every watchdog period */
3747 adapter->detect_tx_hung = 1;
3748
ad68076e
BA		 3749 /*
3750 * With 82571 controllers, LAA may be overwritten due to controller
3751 * reset from the other port. Set the appropriate LAA in RAR[0]
3752 */
bc7f75fa
AK		 3753 if (e1000e_get_laa_state_82571(hw))
3754 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3755
3756 /* Reset the timer */
3757 if (!test_bit(__E1000_DOWN, &adapter->state))
3758 mod_timer(&adapter->watchdog_timer,
3759 round_jiffies(jiffies + 2 * HZ));
3760}
3761
3762#define E1000_TX_FLAGS_CSUM 0x00000001
3763#define E1000_TX_FLAGS_VLAN 0x00000002
3764#define E1000_TX_FLAGS_TSO 0x00000004
3765#define E1000_TX_FLAGS_IPV4 0x00000008
3766#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3767#define E1000_TX_FLAGS_VLAN_SHIFT 16
3768
3769static int e1000_tso(struct e1000_adapter *adapter,
3770 struct sk_buff *skb)
3771{
3772 struct e1000_ring *tx_ring = adapter->tx_ring;
3773 struct e1000_context_desc *context_desc;
3774 struct e1000_buffer *buffer_info;
3775 unsigned int i;
3776 u32 cmd_length = 0;
3777 u16 ipcse = 0, tucse, mss;
3778 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3779 int err;
3780
3d5e33c9
BA		 3781 if (!skb_is_gso(skb))
3782 return 0;
bc7f75fa 3783
3d5e33c9
BA		 3784 if (skb_header_cloned(skb)) {
3785 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3786 if (err)
3787 return err;
bc7f75fa
AK		 3788 }
3789
3d5e33c9
BA		 3790 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3791 mss = skb_shinfo(skb)->gso_size;
3792 if (skb->protocol == htons(ETH_P_IP)) {
3793 struct iphdr *iph = ip_hdr(skb);
3794 iph->tot_len = 0;
3795 iph->check = 0;
3796 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
3797 0, IPPROTO_TCP, 0);
3798 cmd_length = E1000_TXD_CMD_IP;
3799 ipcse = skb_transport_offset(skb) - 1;
3800 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3801 ipv6_hdr(skb)->payload_len = 0;
3802 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3803 &ipv6_hdr(skb)->daddr,
3804 0, IPPROTO_TCP, 0);
3805 ipcse = 0;
3806 }
3807 ipcss = skb_network_offset(skb);
3808 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3809 tucss = skb_transport_offset(skb);
3810 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3811 tucse = 0;
3812
3813 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3814 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3815
3816 i = tx_ring->next_to_use;
3817 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3818 buffer_info = &tx_ring->buffer_info[i];
3819
3820 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3821 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3822 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3823 context_desc->upper_setup.tcp_fields.tucss = tucss;
3824 context_desc->upper_setup.tcp_fields.tucso = tucso;
3825 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3826 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3827 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3828 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3829
3830 buffer_info->time_stamp = jiffies;
3831 buffer_info->next_to_watch = i;
3832
3833 i++;
3834 if (i == tx_ring->count)
3835 i = 0;
3836 tx_ring->next_to_use = i;
3837
3838 return 1;
bc7f75fa
AK		 3839}
3840
3841static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3842{
3843 struct e1000_ring *tx_ring = adapter->tx_ring;
3844 struct e1000_context_desc *context_desc;
3845 struct e1000_buffer *buffer_info;
3846 unsigned int i;
3847 u8 css;
af807c82 3848 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 3849 __be16 protocol;
bc7f75fa 3850
af807c82
DG		 3851 if (skb->ip_summed != CHECKSUM_PARTIAL)
3852 return 0;
bc7f75fa 3853
5f66f208
AJ		 3854 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
3855 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
3856 else
3857 protocol = skb->protocol;
3858
3f518390 3859 switch (protocol) {
09640e63 3860 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 3861 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3862 cmd_len |= E1000_TXD_CMD_TCP;
3863 break;
09640e63 3864 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 3865 /* XXX not handling all IPV6 headers */
3866 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3867 cmd_len |= E1000_TXD_CMD_TCP;
3868 break;
3869 default:
3870 if (unlikely(net_ratelimit()))
5f66f208
AJ		 3871 e_warn("checksum_partial proto=%x!\n",
3872 be16_to_cpu(protocol));
af807c82 3873 break;
bc7f75fa
AK		 3874 }
3875
af807c82
DG		 3876 css = skb_transport_offset(skb);
3877
3878 i = tx_ring->next_to_use;
3879 buffer_info = &tx_ring->buffer_info[i];
3880 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3881
3882 context_desc->lower_setup.ip_config = 0;
3883 context_desc->upper_setup.tcp_fields.tucss = css;
3884 context_desc->upper_setup.tcp_fields.tucso =
3885 css + skb->csum_offset;
3886 context_desc->upper_setup.tcp_fields.tucse = 0;
3887 context_desc->tcp_seg_setup.data = 0;
3888 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
3889
3890 buffer_info->time_stamp = jiffies;
3891 buffer_info->next_to_watch = i;
3892
3893 i++;
3894 if (i == tx_ring->count)
3895 i = 0;
3896 tx_ring->next_to_use = i;
3897
3898 return 1;
bc7f75fa
AK		 3899}
3900
3901#define E1000_MAX_PER_TXD 8192
3902#define E1000_MAX_TXD_PWR 12
3903
3904static int e1000_tx_map(struct e1000_adapter *adapter,
3905 struct sk_buff *skb, unsigned int first,
3906 unsigned int max_per_txd, unsigned int nr_frags,
3907 unsigned int mss)
3908{
3909 struct e1000_ring *tx_ring = adapter->tx_ring;
1b7719c4 3910 struct e1000_buffer *buffer_info;
8ddc951c
JB		 3911 unsigned int len = skb_headlen(skb);
3912 unsigned int offset, size, count = 0, i;
bc7f75fa 3913 unsigned int f;
1b7719c4 3914 dma_addr_t *map;
bc7f75fa
AK		 3915
3916 i = tx_ring->next_to_use;
3917
8ddc951c
JB		 3918 if (skb_dma_map(&adapter->pdev->dev, skb, DMA_TO_DEVICE)) {
3919 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
3920 adapter->tx_dma_failed++;
1b7719c4 3921 return 0;
8ddc951c
JB		 3922 }
3923
1b7719c4 3924 map = skb_shinfo(skb)->dma_maps;
8ddc951c
JB		 3925 offset = 0;
3926
bc7f75fa 3927 while (len) {
1b7719c4 3928 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 3929 size = min(len, max_per_txd);
3930
bc7f75fa 3931 buffer_info->length = size;
bc7f75fa 3932 buffer_info->time_stamp = jiffies;
bc7f75fa 3933 buffer_info->next_to_watch = i;
042a53a9 3934 buffer_info->dma = skb_shinfo(skb)->dma_head + offset;
1b7719c4 3935 count++;
bc7f75fa
AK		 3936
3937 len -= size;
3938 offset += size;
1b7719c4
AD		 3939
3940 if (len) {
3941 i++;
3942 if (i == tx_ring->count)
3943 i = 0;
3944 }
bc7f75fa
AK		 3945 }
3946
3947 for (f = 0; f < nr_frags; f++) {
3948 struct skb_frag_struct *frag;
3949
3950 frag = &skb_shinfo(skb)->frags[f];
3951 len = frag->size;
8ddc951c 3952 offset = 0;
bc7f75fa
AK		 3953
3954 while (len) {
1b7719c4
AD		 3955 i++;
3956 if (i == tx_ring->count)
3957 i = 0;
3958
bc7f75fa
AK		 3959 buffer_info = &tx_ring->buffer_info[i];
3960 size = min(len, max_per_txd);
bc7f75fa
AK		 3961
3962 buffer_info->length = size;
3963 buffer_info->time_stamp = jiffies;
bc7f75fa 3964 buffer_info->next_to_watch = i;
042a53a9 3965 buffer_info->dma = map[f] + offset;
bc7f75fa
AK		 3966
3967 len -= size;
3968 offset += size;
3969 count++;
bc7f75fa
AK		 3970 }
3971 }
3972
bc7f75fa
AK		 3973 tx_ring->buffer_info[i].skb = skb;
3974 tx_ring->buffer_info[first].next_to_watch = i;
3975
3976 return count;
3977}
3978
3979static void e1000_tx_queue(struct e1000_adapter *adapter,
3980 int tx_flags, int count)
3981{
3982 struct e1000_ring *tx_ring = adapter->tx_ring;
3983 struct e1000_tx_desc *tx_desc = NULL;
3984 struct e1000_buffer *buffer_info;
3985 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3986 unsigned int i;
3987
3988 if (tx_flags & E1000_TX_FLAGS_TSO) {
3989 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3990 E1000_TXD_CMD_TSE;
3991 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3992
3993 if (tx_flags & E1000_TX_FLAGS_IPV4)
3994 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3995 }
3996
3997 if (tx_flags & E1000_TX_FLAGS_CSUM) {
3998 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3999 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4000 }
4001
4002 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4003 txd_lower |= E1000_TXD_CMD_VLE;
4004 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4005 }
4006
4007 i = tx_ring->next_to_use;
4008
4009 while (count--) {
4010 buffer_info = &tx_ring->buffer_info[i];
4011 tx_desc = E1000_TX_DESC(*tx_ring, i);
4012 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4013 tx_desc->lower.data =
4014 cpu_to_le32(txd_lower | buffer_info->length);
4015 tx_desc->upper.data = cpu_to_le32(txd_upper);
4016
4017 i++;
4018 if (i == tx_ring->count)
4019 i = 0;
4020 }
4021
4022 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4023
ad68076e
BA		 4024 /*
4025 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4026 * know there are new descriptors to fetch. (Only
4027 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4028 * such as IA-64).
4029 */
bc7f75fa
AK		 4030 wmb();
4031
4032 tx_ring->next_to_use = i;
4033 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4034 /*
4035 * we need this if more than one processor can write to our tail
4036 * at a time, it synchronizes IO on IA64/Altix systems
4037 */
bc7f75fa
AK		 4038 mmiowb();
4039}
4040
4041#define MINIMUM_DHCP_PACKET_SIZE 282
4042static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4043 struct sk_buff *skb)
4044{
4045 struct e1000_hw *hw = &adapter->hw;
4046 u16 length, offset;
4047
4048 if (vlan_tx_tag_present(skb)) {
4049 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id)
4050 && (adapter->hw.mng_cookie.status &
4051 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4052 return 0;
4053 }
4054
4055 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4056 return 0;
4057
4058 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4059 return 0;
4060
4061 {
4062 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4063 struct udphdr *udp;
4064
4065 if (ip->protocol != IPPROTO_UDP)
4066 return 0;
4067
4068 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4069 if (ntohs(udp->dest) != 67)
4070 return 0;
4071
4072 offset = (u8 *)udp + 8 - skb->data;
4073 length = skb->len - offset;
4074 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4075 }
4076
4077 return 0;
4078}
4079
4080static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4081{
4082 struct e1000_adapter *adapter = netdev_priv(netdev);
4083
4084 netif_stop_queue(netdev);
ad68076e
BA		 4085 /*
4086 * Herbert's original patch had:
bc7f75fa 4087 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4088 * but since that doesn't exist yet, just open code it.
4089 */
bc7f75fa
AK		 4090 smp_mb();
4091
ad68076e
BA		 4092 /*
4093 * We need to check again in a case another CPU has just
4094 * made room available.
4095 */
bc7f75fa
AK		 4096 if (e1000_desc_unused(adapter->tx_ring) < size)
4097 return -EBUSY;
4098
4099 /* A reprieve! */
4100 netif_start_queue(netdev);
4101 ++adapter->restart_queue;
4102 return 0;
4103}
4104
4105static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4106{
4107 struct e1000_adapter *adapter = netdev_priv(netdev);
4108
4109 if (e1000_desc_unused(adapter->tx_ring) >= size)
4110 return 0;
4111 return __e1000_maybe_stop_tx(netdev, size);
4112}
4113
4114#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4115static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4116 struct net_device *netdev)
bc7f75fa
AK		 4117{
4118 struct e1000_adapter *adapter = netdev_priv(netdev);
4119 struct e1000_ring *tx_ring = adapter->tx_ring;
4120 unsigned int first;
4121 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4122 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4123 unsigned int tx_flags = 0;
4e6c709c 4124 unsigned int len = skb->len - skb->data_len;
4e6c709c
AK		 4125 unsigned int nr_frags;
4126 unsigned int mss;
bc7f75fa
AK		 4127 int count = 0;
4128 int tso;
4129 unsigned int f;
bc7f75fa
AK		 4130
4131 if (test_bit(__E1000_DOWN, &adapter->state)) {
4132 dev_kfree_skb_any(skb);
4133 return NETDEV_TX_OK;
4134 }
4135
4136 if (skb->len <= 0) {
4137 dev_kfree_skb_any(skb);
4138 return NETDEV_TX_OK;
4139 }
4140
4141 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4142 /*
4143 * The controller does a simple calculation to
bc7f75fa
AK		 4144 * make sure there is enough room in the FIFO before
4145 * initiating the DMA for each buffer. The calc is:
4146 * 4 = ceil(buffer len/mss). To make sure we don't
4147 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4148 * drops.
4149 */
bc7f75fa
AK		 4150 if (mss) {
4151 u8 hdr_len;
4152 max_per_txd = min(mss << 2, max_per_txd);
4153 max_txd_pwr = fls(max_per_txd) - 1;
4154
ad68076e
BA		 4155 /*
4156 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4157 * points to just header, pull a few bytes of payload from
4158 * frags into skb->data
4159 */
bc7f75fa 4160 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4161 /*
4162 * we do this workaround for ES2LAN, but it is un-necessary,
4163 * avoiding it could save a lot of cycles
4164 */
4e6c709c 4165 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4166 unsigned int pull_size;
4167
4168 pull_size = min((unsigned int)4, skb->data_len);
4169 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4170 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4171 dev_kfree_skb_any(skb);
4172 return NETDEV_TX_OK;
4173 }
4174 len = skb->len - skb->data_len;
4175 }
4176 }
4177
4178 /* reserve a descriptor for the offload context */
4179 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4180 count++;
4181 count++;
4182
4183 count += TXD_USE_COUNT(len, max_txd_pwr);
4184
4185 nr_frags = skb_shinfo(skb)->nr_frags;
4186 for (f = 0; f < nr_frags; f++)
4187 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4188 max_txd_pwr);
4189
4190 if (adapter->hw.mac.tx_pkt_filtering)
4191 e1000_transfer_dhcp_info(adapter, skb);
4192
ad68076e
BA		 4193 /*
4194 * need: count + 2 desc gap to keep tail from touching
4195 * head, otherwise try next time
4196 */
92af3e95 4197 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4198 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4199
4200 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4201 tx_flags |= E1000_TX_FLAGS_VLAN;
4202 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4203 }
4204
4205 first = tx_ring->next_to_use;
4206
4207 tso = e1000_tso(adapter, skb);
4208 if (tso < 0) {
4209 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4210 return NETDEV_TX_OK;
4211 }
4212
4213 if (tso)
4214 tx_flags |= E1000_TX_FLAGS_TSO;
4215 else if (e1000_tx_csum(adapter, skb))
4216 tx_flags |= E1000_TX_FLAGS_CSUM;
4217
ad68076e
BA		 4218 /*
4219 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4220 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4221 * no longer assume, we must.
4222 */
bc7f75fa
AK		 4223 if (skb->protocol == htons(ETH_P_IP))
4224 tx_flags |= E1000_TX_FLAGS_IPV4;
4225
1b7719c4 4226 /* if count is 0 then mapping error has occured */
bc7f75fa 4227 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4228 if (count) {
4229 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4230 /* Make sure there is space in the ring for the next send. */
4231 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4232
4233 } else {
bc7f75fa 4234 dev_kfree_skb_any(skb);
1b7719c4
AD		 4235 tx_ring->buffer_info[first].time_stamp = 0;
4236 tx_ring->next_to_use = first;
bc7f75fa
AK		 4237 }
4238
bc7f75fa
AK		 4239 return NETDEV_TX_OK;
4240}
4241
4242/**
4243 * e1000_tx_timeout - Respond to a Tx Hang
4244 * @netdev: network interface device structure
4245 **/
4246static void e1000_tx_timeout(struct net_device *netdev)
4247{
4248 struct e1000_adapter *adapter = netdev_priv(netdev);
4249
4250 /* Do the reset outside of interrupt context */
4251 adapter->tx_timeout_count++;
4252 schedule_work(&adapter->reset_task);
4253}
4254
4255static void e1000_reset_task(struct work_struct *work)
4256{
4257 struct e1000_adapter *adapter;
4258 adapter = container_of(work, struct e1000_adapter, reset_task);
4259
4260 e1000e_reinit_locked(adapter);
4261}
4262
4263/**
4264 * e1000_get_stats - Get System Network Statistics
4265 * @netdev: network interface device structure
4266 *
4267 * Returns the address of the device statistics structure.
4268 * The statistics are actually updated from the timer callback.
4269 **/
4270static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4271{
bc7f75fa 4272 /* only return the current stats */
7274c20f 4273 return &netdev->stats;
bc7f75fa
AK		 4274}
4275
4276/**
4277 * e1000_change_mtu - Change the Maximum Transfer Unit
4278 * @netdev: network interface device structure
4279 * @new_mtu: new value for maximum frame size
4280 *
4281 * Returns 0 on success, negative on failure
4282 **/
4283static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4284{
4285 struct e1000_adapter *adapter = netdev_priv(netdev);
4286 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4287
2adc55c9
BA		 4288 /* Jumbo frame support */
4289 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4290 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4291 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4292 return -EINVAL;
4293 }
4294
2adc55c9
BA		 4295 /* Supported frame sizes */
4296 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4297 (max_frame > adapter->max_hw_frame_size)) {
4298 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4299 return -EINVAL;
4300 }
4301
4302 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4303 msleep(1);
610c9928 4304 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4305 adapter->max_frame_size = max_frame;
610c9928
BA		 4306 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4307 netdev->mtu = new_mtu;
bc7f75fa
AK		 4308 if (netif_running(netdev))
4309 e1000e_down(adapter);
4310
ad68076e
BA		 4311 /*
4312 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4313 * means we reserve 2 more, this pushes us to allocate from the next
4314 * larger slab size.
ad68076e 4315 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4316 * However with the new *_jumbo_rx* routines, jumbo receives will use
4317 * fragmented skbs
ad68076e 4318 */
bc7f75fa
AK		 4319
4320 if (max_frame <= 256)
4321 adapter->rx_buffer_len = 256;
4322 else if (max_frame <= 512)
4323 adapter->rx_buffer_len = 512;
4324 else if (max_frame <= 1024)
4325 adapter->rx_buffer_len = 1024;
4326 else if (max_frame <= 2048)
4327 adapter->rx_buffer_len = 2048;
4328 else
4329 adapter->rx_buffer_len = 4096;
4330
4331 /* adjust allocation if LPE protects us, and we aren't using SBP */
4332 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4333 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4334 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4335 + ETH_FCS_LEN;
bc7f75fa 4336
bc7f75fa
AK		 4337 if (netif_running(netdev))
4338 e1000e_up(adapter);
4339 else
4340 e1000e_reset(adapter);
4341
4342 clear_bit(__E1000_RESETTING, &adapter->state);
4343
4344 return 0;
4345}
4346
4347static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4348 int cmd)
4349{
4350 struct e1000_adapter *adapter = netdev_priv(netdev);
4351 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4352
318a94d6 4353 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4354 return -EOPNOTSUPP;
4355
4356 switch (cmd) {
4357 case SIOCGMIIPHY:
4358 data->phy_id = adapter->hw.phy.addr;
4359 break;
4360 case SIOCGMIIREG:
b16a002e
BA		 4361 e1000_phy_read_status(adapter);
4362
7c25769f
BA		 4363 switch (data->reg_num & 0x1F) {
4364 case MII_BMCR:
4365 data->val_out = adapter->phy_regs.bmcr;
4366 break;
4367 case MII_BMSR:
4368 data->val_out = adapter->phy_regs.bmsr;
4369 break;
4370 case MII_PHYSID1:
4371 data->val_out = (adapter->hw.phy.id >> 16);
4372 break;
4373 case MII_PHYSID2:
4374 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4375 break;
4376 case MII_ADVERTISE:
4377 data->val_out = adapter->phy_regs.advertise;
4378 break;
4379 case MII_LPA:
4380 data->val_out = adapter->phy_regs.lpa;
4381 break;
4382 case MII_EXPANSION:
4383 data->val_out = adapter->phy_regs.expansion;
4384 break;
4385 case MII_CTRL1000:
4386 data->val_out = adapter->phy_regs.ctrl1000;
4387 break;
4388 case MII_STAT1000:
4389 data->val_out = adapter->phy_regs.stat1000;
4390 break;
4391 case MII_ESTATUS:
4392 data->val_out = adapter->phy_regs.estatus;
4393 break;
4394 default:
bc7f75fa
AK		 4395 return -EIO;
4396 }
bc7f75fa
AK		 4397 break;
4398 case SIOCSMIIREG:
4399 default:
4400 return -EOPNOTSUPP;
4401 }
4402 return 0;
4403}
4404
4405static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4406{
4407 switch (cmd) {
4408 case SIOCGMIIPHY:
4409 case SIOCGMIIREG:
4410 case SIOCSMIIREG:
4411 return e1000_mii_ioctl(netdev, ifr, cmd);
4412 default:
4413 return -EOPNOTSUPP;
4414 }
4415}
4416
a4f58f54
BA		 4417static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4418{
4419 struct e1000_hw *hw = &adapter->hw;
4420 u32 i, mac_reg;
4421 u16 phy_reg;
4422 int retval = 0;
4423
4424 /* copy MAC RARs to PHY RARs */
4425 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4426 mac_reg = er32(RAL(i));
4427 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF));
4428 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF));
4429 mac_reg = er32(RAH(i));
4430 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF));
4431 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF));
4432 }
4433
4434 /* copy MAC MTA to PHY MTA */
4435 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4436 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4437 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4438 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4439 }
4440
4441 /* configure PHY Rx Control register */
4442 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4443 mac_reg = er32(RCTL);
4444 if (mac_reg & E1000_RCTL_UPE)
4445 phy_reg |= BM_RCTL_UPE;
4446 if (mac_reg & E1000_RCTL_MPE)
4447 phy_reg |= BM_RCTL_MPE;
4448 phy_reg &= ~(BM_RCTL_MO_MASK);
4449 if (mac_reg & E1000_RCTL_MO_3)
4450 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4451 << BM_RCTL_MO_SHIFT);
4452 if (mac_reg & E1000_RCTL_BAM)
4453 phy_reg |= BM_RCTL_BAM;
4454 if (mac_reg & E1000_RCTL_PMCF)
4455 phy_reg |= BM_RCTL_PMCF;
4456 mac_reg = er32(CTRL);
4457 if (mac_reg & E1000_CTRL_RFCE)
4458 phy_reg |= BM_RCTL_RFCE;
4459 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4460
4461 /* enable PHY wakeup in MAC register */
4462 ew32(WUFC, wufc);
4463 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4464
4465 /* configure and enable PHY wakeup in PHY registers */
4466 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4467 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4468
4469 /* activate PHY wakeup */
94d8186a 4470 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 4471 if (retval) {
4472 e_err("Could not acquire PHY\n");
4473 return retval;
4474 }
4475 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4476 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4477 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4478 if (retval) {
4479 e_err("Could not read PHY page 769\n");
4480 goto out;
4481 }
4482 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4483 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4484 if (retval)
4485 e_err("Could not set PHY Host Wakeup bit\n");
4486out:
94d8186a 4487 hw->phy.ops.release(hw);
a4f58f54
BA		 4488
4489 return retval;
4490}
4491
4f9de721 4492static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
bc7f75fa
AK		 4493{
4494 struct net_device *netdev = pci_get_drvdata(pdev);
4495 struct e1000_adapter *adapter = netdev_priv(netdev);
4496 struct e1000_hw *hw = &adapter->hw;
4497 u32 ctrl, ctrl_ext, rctl, status;
4498 u32 wufc = adapter->wol;
4499 int retval = 0;
4500
4501 netif_device_detach(netdev);
4502
4503 if (netif_running(netdev)) {
4504 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4505 e1000e_down(adapter);
4506 e1000_free_irq(adapter);
4507 }
4662e82b 4508 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 4509
4510 retval = pci_save_state(pdev);
4511 if (retval)
4512 return retval;
4513
4514 status = er32(STATUS);
4515 if (status & E1000_STATUS_LU)
4516 wufc &= ~E1000_WUFC_LNKC;
4517
4518 if (wufc) {
4519 e1000_setup_rctl(adapter);
4520 e1000_set_multi(netdev);
4521
4522 /* turn on all-multi mode if wake on multicast is enabled */
4523 if (wufc & E1000_WUFC_MC) {
4524 rctl = er32(RCTL);
4525 rctl |= E1000_RCTL_MPE;
4526 ew32(RCTL, rctl);
4527 }
4528
4529 ctrl = er32(CTRL);
4530 /* advertise wake from D3Cold */
4531 #define E1000_CTRL_ADVD3WUC 0x00100000
4532 /* phy power management enable */
4533 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 4534 ctrl |= E1000_CTRL_ADVD3WUC;
4535 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
4536 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 4537 ew32(CTRL, ctrl);
4538
318a94d6
JK		 4539 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4540 adapter->hw.phy.media_type ==
4541 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 4542 /* keep the laser running in D3 */
4543 ctrl_ext = er32(CTRL_EXT);
4544 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4545 ew32(CTRL_EXT, ctrl_ext);
4546 }
4547
97ac8cae
BA		 4548 if (adapter->flags & FLAG_IS_ICH)
4549 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4550
bc7f75fa
AK		 4551 /* Allow time for pending master requests to run */
4552 e1000e_disable_pcie_master(&adapter->hw);
4553
82776a4b 4554 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 4555 /* enable wakeup by the PHY */
4556 retval = e1000_init_phy_wakeup(adapter, wufc);
4557 if (retval)
4558 return retval;
4559 } else {
4560 /* enable wakeup by the MAC */
4561 ew32(WUFC, wufc);
4562 ew32(WUC, E1000_WUC_PME_EN);
4563 }
bc7f75fa
AK		 4564 } else {
4565 ew32(WUC, 0);
4566 ew32(WUFC, 0);
bc7f75fa
AK		 4567 }
4568
4f9de721
RW		 4569 *enable_wake = !!wufc;
4570
bc7f75fa 4571 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 4572 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
4573 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 4574 *enable_wake = true;
bc7f75fa
AK		 4575
4576 if (adapter->hw.phy.type == e1000_phy_igp_3)
4577 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4578
ad68076e
BA		 4579 /*
4580 * Release control of h/w to f/w. If f/w is AMT enabled, this
4581 * would have already happened in close and is redundant.
4582 */
bc7f75fa
AK		 4583 e1000_release_hw_control(adapter);
4584
4585 pci_disable_device(pdev);
4586
4f9de721
RW		 4587 return 0;
4588}
4589
4590static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
4591{
4592 if (sleep && wake) {
4593 pci_prepare_to_sleep(pdev);
4594 return;
4595 }
4596
4597 pci_wake_from_d3(pdev, wake);
4598 pci_set_power_state(pdev, PCI_D3hot);
4599}
4600
4601static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
4602 bool wake)
4603{
4604 struct net_device *netdev = pci_get_drvdata(pdev);
4605 struct e1000_adapter *adapter = netdev_priv(netdev);
4606
005cbdfc
AD		 4607 /*
4608 * The pci-e switch on some quad port adapters will report a
4609 * correctable error when the MAC transitions from D0 to D3. To
4610 * prevent this we need to mask off the correctable errors on the
4611 * downstream port of the pci-e switch.
4612 */
4613 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4614 struct pci_dev *us_dev = pdev->bus->self;
4615 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4616 u16 devctl;
4617
4618 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4619 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4620 (devctl & ~PCI_EXP_DEVCTL_CERE));
4621
4f9de721 4622 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 4623
4624 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4625 } else {
4f9de721 4626 e1000_power_off(pdev, sleep, wake);
005cbdfc 4627 }
bc7f75fa
AK		 4628}
4629
1eae4eb2
AK		 4630static void e1000e_disable_l1aspm(struct pci_dev *pdev)
4631{
4632 int pos;
1eae4eb2
AK		 4633 u16 val;
4634
4635 /*
4636 * 82573 workaround - disable L1 ASPM on mobile chipsets
4637 *
4638 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
4639 * resulting in lost data or garbage information on the pci-e link
4640 * level. This could result in (false) bad EEPROM checksum errors,
4641 * long ping times (up to 2s) or even a system freeze/hang.
4642 *
4643 * Unfortunately this feature saves about 1W power consumption when
4644 * active.
4645 */
4646 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1eae4eb2
AK		 4647 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
4648 if (val & 0x2) {
4649 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
4650 val &= ~0x2;
4651 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
4652 }
4653}
4654
bc7f75fa 4655#ifdef CONFIG_PM
4f9de721
RW		 4656static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4657{
4658 int retval;
4659 bool wake;
4660
4661 retval = __e1000_shutdown(pdev, &wake);
4662 if (!retval)
4663 e1000_complete_shutdown(pdev, true, wake);
4664
4665 return retval;
4666}
4667
bc7f75fa
AK		 4668static int e1000_resume(struct pci_dev *pdev)
4669{
4670 struct net_device *netdev = pci_get_drvdata(pdev);
4671 struct e1000_adapter *adapter = netdev_priv(netdev);
4672 struct e1000_hw *hw = &adapter->hw;
4673 u32 err;
4674
4675 pci_set_power_state(pdev, PCI_D0);
4676 pci_restore_state(pdev);
1eae4eb2 4677 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4678
f0f422e5 4679 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4680 if (err) {
4681 dev_err(&pdev->dev,
4682 "Cannot enable PCI device from suspend\n");
4683 return err;
4684 }
4685
4686 pci_set_master(pdev);
4687
4688 pci_enable_wake(pdev, PCI_D3hot, 0);
4689 pci_enable_wake(pdev, PCI_D3cold, 0);
4690
4662e82b 4691 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 4692 if (netif_running(netdev)) {
4693 err = e1000_request_irq(adapter);
4694 if (err)
4695 return err;
4696 }
4697
4698 e1000e_power_up_phy(adapter);
a4f58f54
BA		 4699
4700 /* report the system wakeup cause from S3/S4 */
4701 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
4702 u16 phy_data;
4703
4704 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
4705 if (phy_data) {
4706 e_info("PHY Wakeup cause - %s\n",
4707 phy_data & E1000_WUS_EX ? "Unicast Packet" :
4708 phy_data & E1000_WUS_MC ? "Multicast Packet" :
4709 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
4710 phy_data & E1000_WUS_MAG ? "Magic Packet" :
4711 phy_data & E1000_WUS_LNKC ? "Link Status "
4712 " Change" : "other");
4713 }
4714 e1e_wphy(&adapter->hw, BM_WUS, ~0);
4715 } else {
4716 u32 wus = er32(WUS);
4717 if (wus) {
4718 e_info("MAC Wakeup cause - %s\n",
4719 wus & E1000_WUS_EX ? "Unicast Packet" :
4720 wus & E1000_WUS_MC ? "Multicast Packet" :
4721 wus & E1000_WUS_BC ? "Broadcast Packet" :
4722 wus & E1000_WUS_MAG ? "Magic Packet" :
4723 wus & E1000_WUS_LNKC ? "Link Status Change" :
4724 "other");
4725 }
4726 ew32(WUS, ~0);
4727 }
4728
bc7f75fa 4729 e1000e_reset(adapter);
bc7f75fa
AK		 4730
4731 e1000_init_manageability(adapter);
4732
4733 if (netif_running(netdev))
4734 e1000e_up(adapter);
4735
4736 netif_device_attach(netdev);
4737
ad68076e
BA		 4738 /*
4739 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4740 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4741 * under the control of the driver.
4742 */
c43bc57e 4743 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4744 e1000_get_hw_control(adapter);
4745
4746 return 0;
4747}
4748#endif
4749
4750static void e1000_shutdown(struct pci_dev *pdev)
4751{
4f9de721
RW		 4752 bool wake = false;
4753
4754 __e1000_shutdown(pdev, &wake);
4755
4756 if (system_state == SYSTEM_POWER_OFF)
4757 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 4758}
4759
4760#ifdef CONFIG_NET_POLL_CONTROLLER
4761/*
4762 * Polling 'interrupt' - used by things like netconsole to send skbs
4763 * without having to re-enable interrupts. It's not called while
4764 * the interrupt routine is executing.
4765 */
4766static void e1000_netpoll(struct net_device *netdev)
4767{
4768 struct e1000_adapter *adapter = netdev_priv(netdev);
4769
4770 disable_irq(adapter->pdev->irq);
4771 e1000_intr(adapter->pdev->irq, netdev);
4772
bc7f75fa
AK		 4773 enable_irq(adapter->pdev->irq);
4774}
4775#endif
4776
4777/**
4778 * e1000_io_error_detected - called when PCI error is detected
4779 * @pdev: Pointer to PCI device
4780 * @state: The current pci connection state
4781 *
4782 * This function is called after a PCI bus error affecting
4783 * this device has been detected.
4784 */
4785static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4786 pci_channel_state_t state)
4787{
4788 struct net_device *netdev = pci_get_drvdata(pdev);
4789 struct e1000_adapter *adapter = netdev_priv(netdev);
4790
4791 netif_device_detach(netdev);
4792
c93b5a76
MM		 4793 if (state == pci_channel_io_perm_failure)
4794 return PCI_ERS_RESULT_DISCONNECT;
4795
bc7f75fa
AK		 4796 if (netif_running(netdev))
4797 e1000e_down(adapter);
4798 pci_disable_device(pdev);
4799
4800 /* Request a slot slot reset. */
4801 return PCI_ERS_RESULT_NEED_RESET;
4802}
4803
4804/**
4805 * e1000_io_slot_reset - called after the pci bus has been reset.
4806 * @pdev: Pointer to PCI device
4807 *
4808 * Restart the card from scratch, as if from a cold-boot. Implementation
4809 * resembles the first-half of the e1000_resume routine.
4810 */
4811static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4812{
4813 struct net_device *netdev = pci_get_drvdata(pdev);
4814 struct e1000_adapter *adapter = netdev_priv(netdev);
4815 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4816 int err;
111b9dc5 4817 pci_ers_result_t result;
bc7f75fa 4818
1eae4eb2 4819 e1000e_disable_l1aspm(pdev);
f0f422e5 4820 err = pci_enable_device_mem(pdev);
6e4f6f6b 4821 if (err) {
bc7f75fa
AK		 4822 dev_err(&pdev->dev,
4823 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 4824 result = PCI_ERS_RESULT_DISCONNECT;
4825 } else {
4826 pci_set_master(pdev);
4827 pci_restore_state(pdev);
bc7f75fa 4828
111b9dc5
JB		 4829 pci_enable_wake(pdev, PCI_D3hot, 0);
4830 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 4831
111b9dc5
JB		 4832 e1000e_reset(adapter);
4833 ew32(WUS, ~0);
4834 result = PCI_ERS_RESULT_RECOVERED;
4835 }
bc7f75fa 4836
111b9dc5
JB		 4837 pci_cleanup_aer_uncorrect_error_status(pdev);
4838
4839 return result;
bc7f75fa
AK		 4840}
4841
4842/**
4843 * e1000_io_resume - called when traffic can start flowing again.
4844 * @pdev: Pointer to PCI device
4845 *
4846 * This callback is called when the error recovery driver tells us that
4847 * its OK to resume normal operation. Implementation resembles the
4848 * second-half of the e1000_resume routine.
4849 */
4850static void e1000_io_resume(struct pci_dev *pdev)
4851{
4852 struct net_device *netdev = pci_get_drvdata(pdev);
4853 struct e1000_adapter *adapter = netdev_priv(netdev);
4854
4855 e1000_init_manageability(adapter);
4856
4857 if (netif_running(netdev)) {
4858 if (e1000e_up(adapter)) {
4859 dev_err(&pdev->dev,
4860 "can't bring device back up after reset\n");
4861 return;
4862 }
4863 }
4864
4865 netif_device_attach(netdev);
4866
ad68076e
BA		 4867 /*
4868 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4869 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4870 * under the control of the driver.
4871 */
c43bc57e 4872 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4873 e1000_get_hw_control(adapter);
4874
4875}
4876
4877static void e1000_print_device_info(struct e1000_adapter *adapter)
4878{
4879 struct e1000_hw *hw = &adapter->hw;
4880 struct net_device *netdev = adapter->netdev;
69e3fd8c 4881 u32 pba_num;
bc7f75fa
AK		 4882
4883 /* print bus type/speed/width info */
7c510e4b 4884 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 4885 /* bus width */
4886 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4887 "Width x1"),
4888 /* MAC address */
7c510e4b 4889 netdev->dev_addr);
44defeb3
JK		 4890 e_info("Intel(R) PRO/%s Network Connection\n",
4891 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4892 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 4893 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4894 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 4895}
4896
10aa4c04
AK		 4897static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4898{
4899 struct e1000_hw *hw = &adapter->hw;
4900 int ret_val;
4901 u16 buf = 0;
4902
4903 if (hw->mac.type != e1000_82573)
4904 return;
4905
4906 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 4907 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 4908 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 4909 dev_warn(&adapter->pdev->dev,
4910 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04
AK		 4911 }
4912
4913 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
e243455d 4914 if (!ret_val && (le16_to_cpu(buf) & (3 << 2))) {
10aa4c04 4915 /* ASPM enable */
6c2a9efa
FP		 4916 dev_warn(&adapter->pdev->dev,
4917 "Warning: detected ASPM enabled in EEPROM\n");
10aa4c04
AK		 4918 }
4919}
4920
651c2466
SH		 4921static const struct net_device_ops e1000e_netdev_ops = {
4922 .ndo_open = e1000_open,
4923 .ndo_stop = e1000_close,
00829823 4924 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 4925 .ndo_get_stats = e1000_get_stats,
4926 .ndo_set_multicast_list = e1000_set_multi,
4927 .ndo_set_mac_address = e1000_set_mac,
4928 .ndo_change_mtu = e1000_change_mtu,
4929 .ndo_do_ioctl = e1000_ioctl,
4930 .ndo_tx_timeout = e1000_tx_timeout,
4931 .ndo_validate_addr = eth_validate_addr,
4932
4933 .ndo_vlan_rx_register = e1000_vlan_rx_register,
4934 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
4935 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
4936#ifdef CONFIG_NET_POLL_CONTROLLER
4937 .ndo_poll_controller = e1000_netpoll,
4938#endif
4939};
4940
bc7f75fa
AK		 4941/**
4942 * e1000_probe - Device Initialization Routine
4943 * @pdev: PCI device information struct
4944 * @ent: entry in e1000_pci_tbl
4945 *
4946 * Returns 0 on success, negative on failure
4947 *
4948 * e1000_probe initializes an adapter identified by a pci_dev structure.
4949 * The OS initialization, configuring of the adapter private structure,
4950 * and a hardware reset occur.
4951 **/
4952static int __devinit e1000_probe(struct pci_dev *pdev,
4953 const struct pci_device_id *ent)
4954{
4955 struct net_device *netdev;
4956 struct e1000_adapter *adapter;
4957 struct e1000_hw *hw;
4958 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 4959 resource_size_t mmio_start, mmio_len;
4960 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 4961
4962 static int cards_found;
4963 int i, err, pci_using_dac;
4964 u16 eeprom_data = 0;
4965 u16 eeprom_apme_mask = E1000_EEPROM_APME;
4966
1eae4eb2 4967 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4968
f0f422e5 4969 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4970 if (err)
4971 return err;
4972
4973 pci_using_dac = 0;
6a35528a 4974 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa 4975 if (!err) {
6a35528a 4976 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa
AK		 4977 if (!err)
4978 pci_using_dac = 1;
4979 } else {
284901a9 4980 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
bc7f75fa
AK		 4981 if (err) {
4982 err = pci_set_consistent_dma_mask(pdev,
284901a9 4983 DMA_BIT_MASK(32));
bc7f75fa
AK		 4984 if (err) {
4985 dev_err(&pdev->dev, "No usable DMA "
4986 "configuration, aborting\n");
4987 goto err_dma;
4988 }
4989 }
4990 }
4991
e8de1481 4992 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 4993 pci_select_bars(pdev, IORESOURCE_MEM),
4994 e1000e_driver_name);
bc7f75fa
AK		 4995 if (err)
4996 goto err_pci_reg;
4997
68eac460 4998 /* AER (Advanced Error Reporting) hooks */
19d5afd4 4999 pci_enable_pcie_error_reporting(pdev);
68eac460 5000
bc7f75fa 5001 pci_set_master(pdev);
438b365a
BA		 5002 /* PCI config space info */
5003 err = pci_save_state(pdev);
5004 if (err)
5005 goto err_alloc_etherdev;
bc7f75fa
AK		 5006
5007 err = -ENOMEM;
5008 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5009 if (!netdev)
5010 goto err_alloc_etherdev;
5011
bc7f75fa
AK		 5012 SET_NETDEV_DEV(netdev, &pdev->dev);
5013
5014 pci_set_drvdata(pdev, netdev);
5015 adapter = netdev_priv(netdev);
5016 hw = &adapter->hw;
5017 adapter->netdev = netdev;
5018 adapter->pdev = pdev;
5019 adapter->ei = ei;
5020 adapter->pba = ei->pba;
5021 adapter->flags = ei->flags;
eb7c3adb 5022 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5023 adapter->hw.adapter = adapter;
5024 adapter->hw.mac.type = ei->mac;
2adc55c9 5025 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5026 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5027
5028 mmio_start = pci_resource_start(pdev, 0);
5029 mmio_len = pci_resource_len(pdev, 0);
5030
5031 err = -EIO;
5032 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5033 if (!adapter->hw.hw_addr)
5034 goto err_ioremap;
5035
5036 if ((adapter->flags & FLAG_HAS_FLASH) &&
5037 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5038 flash_start = pci_resource_start(pdev, 1);
5039 flash_len = pci_resource_len(pdev, 1);
5040 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5041 if (!adapter->hw.flash_address)
5042 goto err_flashmap;
5043 }
5044
5045 /* construct the net_device struct */
651c2466 5046 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5047 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5048 netdev->watchdog_timeo = 5 * HZ;
5049 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5050 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5051
5052 netdev->mem_start = mmio_start;
5053 netdev->mem_end = mmio_start + mmio_len;
5054
5055 adapter->bd_number = cards_found++;
5056
4662e82b
BA		 5057 e1000e_check_options(adapter);
5058
bc7f75fa
AK		 5059 /* setup adapter struct */
5060 err = e1000_sw_init(adapter);
5061 if (err)
5062 goto err_sw_init;
5063
5064 err = -EIO;
5065
5066 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5067 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5068 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5069
69e3fd8c 5070 err = ei->get_variants(adapter);
bc7f75fa
AK		 5071 if (err)
5072 goto err_hw_init;
5073
4a770358
BA		 5074 if ((adapter->flags & FLAG_IS_ICH) &&
5075 (adapter->flags & FLAG_READ_ONLY_NVM))
5076 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5077
bc7f75fa
AK		 5078 hw->mac.ops.get_bus_info(&adapter->hw);
5079
318a94d6 5080 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5081
5082 /* Copper options */
318a94d6 5083 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5084 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5085 adapter->hw.phy.disable_polarity_correction = 0;
5086 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5087 }
5088
5089 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5090 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5091
5092 netdev->features = NETIF_F_SG |
5093 NETIF_F_HW_CSUM |
5094 NETIF_F_HW_VLAN_TX |
5095 NETIF_F_HW_VLAN_RX;
5096
5097 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5098 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5099
5100 netdev->features |= NETIF_F_TSO;
5101 netdev->features |= NETIF_F_TSO6;
5102
a5136e23
JK		 5103 netdev->vlan_features |= NETIF_F_TSO;
5104 netdev->vlan_features |= NETIF_F_TSO6;
5105 netdev->vlan_features |= NETIF_F_HW_CSUM;
5106 netdev->vlan_features |= NETIF_F_SG;
5107
bc7f75fa
AK		 5108 if (pci_using_dac)
5109 netdev->features |= NETIF_F_HIGHDMA;
5110
bc7f75fa
AK		 5111 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5112 adapter->flags |= FLAG_MNG_PT_ENABLED;
5113
ad68076e
BA		 5114 /*
5115 * before reading the NVM, reset the controller to
5116 * put the device in a known good starting state
5117 */
bc7f75fa
AK		 5118 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5119
5120 /*
5121 * systems with ASPM and others may see the checksum fail on the first
5122 * attempt. Let's give it a few tries
5123 */
5124 for (i = 0;; i++) {
5125 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5126 break;
5127 if (i == 2) {
44defeb3 5128 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5129 err = -EIO;
5130 goto err_eeprom;
5131 }
5132 }
5133
10aa4c04
AK		 5134 e1000_eeprom_checks(adapter);
5135
bc7f75fa
AK		 5136 /* copy the MAC address out of the NVM */
5137 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5138 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5139
5140 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5141 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5142
5143 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5144 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5145 err = -EIO;
5146 goto err_eeprom;
5147 }
5148
5149 init_timer(&adapter->watchdog_timer);
5150 adapter->watchdog_timer.function = &e1000_watchdog;
5151 adapter->watchdog_timer.data = (unsigned long) adapter;
5152
5153 init_timer(&adapter->phy_info_timer);
5154 adapter->phy_info_timer.function = &e1000_update_phy_info;
5155 adapter->phy_info_timer.data = (unsigned long) adapter;
5156
5157 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5158 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5159 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5160 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5161 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5162
bc7f75fa
AK		 5163 /* Initialize link parameters. User can change them with ethtool */
5164 adapter->hw.mac.autoneg = 1;
309af40b 5165 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5166 adapter->hw.fc.requested_mode = e1000_fc_default;
5167 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5168 adapter->hw.phy.autoneg_advertised = 0x2f;
5169
5170 /* ring size defaults */
5171 adapter->rx_ring->count = 256;
5172 adapter->tx_ring->count = 256;
5173
5174 /*
5175 * Initial Wake on LAN setting - If APM wake is enabled in
5176 * the EEPROM, enable the ACPI Magic Packet filter
5177 */
5178 if (adapter->flags & FLAG_APME_IN_WUC) {
5179 /* APME bit in EEPROM is mapped to WUC.APME */
5180 eeprom_data = er32(WUC);
5181 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5182 if (eeprom_data & E1000_WUC_PHY_WAKE)
5183 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5184 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5185 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5186 (adapter->hw.bus.func == 1))
5187 e1000_read_nvm(&adapter->hw,
5188 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5189 else
5190 e1000_read_nvm(&adapter->hw,
5191 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5192 }
5193
5194 /* fetch WoL from EEPROM */
5195 if (eeprom_data & eeprom_apme_mask)
5196 adapter->eeprom_wol |= E1000_WUFC_MAG;
5197
5198 /*
5199 * now that we have the eeprom settings, apply the special cases
5200 * where the eeprom may be wrong or the board simply won't support
5201 * wake on lan on a particular port
5202 */
5203 if (!(adapter->flags & FLAG_HAS_WOL))
5204 adapter->eeprom_wol = 0;
5205
5206 /* initialize the wol settings based on the eeprom settings */
5207 adapter->wol = adapter->eeprom_wol;
6ff68026 5208 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5209
84527590
BA		 5210 /* save off EEPROM version number */
5211 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5212
bc7f75fa
AK		 5213 /* reset the hardware with the new settings */
5214 e1000e_reset(adapter);
5215
ad68076e
BA		 5216 /*
5217 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5218 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5219 * under the control of the driver.
5220 */
c43bc57e 5221 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5222 e1000_get_hw_control(adapter);
5223
bc7f75fa
AK		 5224 strcpy(netdev->name, "eth%d");
5225 err = register_netdev(netdev);
5226 if (err)
5227 goto err_register;
5228
9c563d20
JB		 5229 /* carrier off reporting is important to ethtool even BEFORE open */
5230 netif_carrier_off(netdev);
5231
bc7f75fa
AK		 5232 e1000_print_device_info(adapter);
5233
5234 return 0;
5235
5236err_register:
c43bc57e
JB		 5237 if (!(adapter->flags & FLAG_HAS_AMT))
5238 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5239err_eeprom:
5240 if (!e1000_check_reset_block(&adapter->hw))
5241 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5242err_hw_init:
bc7f75fa 5243
bc7f75fa
AK		 5244 kfree(adapter->tx_ring);
5245 kfree(adapter->rx_ring);
5246err_sw_init:
c43bc57e
JB		 5247 if (adapter->hw.flash_address)
5248 iounmap(adapter->hw.flash_address);
e82f54ba 5249 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5250err_flashmap:
bc7f75fa
AK		 5251 iounmap(adapter->hw.hw_addr);
5252err_ioremap:
5253 free_netdev(netdev);
5254err_alloc_etherdev:
f0f422e5
BA		 5255 pci_release_selected_regions(pdev,
5256 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5257err_pci_reg:
5258err_dma:
5259 pci_disable_device(pdev);
5260 return err;
5261}
5262
5263/**
5264 * e1000_remove - Device Removal Routine
5265 * @pdev: PCI device information struct
5266 *
5267 * e1000_remove is called by the PCI subsystem to alert the driver
5268 * that it should release a PCI device. The could be caused by a
5269 * Hot-Plug event, or because the driver is going to be removed from
5270 * memory.
5271 **/
5272static void __devexit e1000_remove(struct pci_dev *pdev)
5273{
5274 struct net_device *netdev = pci_get_drvdata(pdev);
5275 struct e1000_adapter *adapter = netdev_priv(netdev);
5276
ad68076e
BA		 5277 /*
5278 * flush_scheduled work may reschedule our watchdog task, so
5279 * explicitly disable watchdog tasks from being rescheduled
5280 */
bc7f75fa
AK		 5281 set_bit(__E1000_DOWN, &adapter->state);
5282 del_timer_sync(&adapter->watchdog_timer);
5283 del_timer_sync(&adapter->phy_info_timer);
5284
41cec6f1
BA		 5285 cancel_work_sync(&adapter->reset_task);
5286 cancel_work_sync(&adapter->watchdog_task);
5287 cancel_work_sync(&adapter->downshift_task);
5288 cancel_work_sync(&adapter->update_phy_task);
5289 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK		 5290 flush_scheduled_work();
5291
ad68076e
BA		 5292 /*
5293 * Release control of h/w to f/w. If f/w is AMT enabled, this
5294 * would have already happened in close and is redundant.
5295 */
bc7f75fa
AK		 5296 e1000_release_hw_control(adapter);
5297
5298 unregister_netdev(netdev);
5299
5300 if (!e1000_check_reset_block(&adapter->hw))
5301 e1000_phy_hw_reset(&adapter->hw);
5302
4662e82b 5303 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5304 kfree(adapter->tx_ring);
5305 kfree(adapter->rx_ring);
5306
5307 iounmap(adapter->hw.hw_addr);
5308 if (adapter->hw.flash_address)
5309 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5310 pci_release_selected_regions(pdev,
5311 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5312
5313 free_netdev(netdev);
5314
111b9dc5 5315 /* AER disable */
19d5afd4 5316 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5317
bc7f75fa
AK		 5318 pci_disable_device(pdev);
5319}
5320
5321/* PCI Error Recovery (ERS) */
5322static struct pci_error_handlers e1000_err_handler = {
5323 .error_detected = e1000_io_error_detected,
5324 .slot_reset = e1000_io_slot_reset,
5325 .resume = e1000_io_resume,
5326};
5327
5328static struct pci_device_id e1000_pci_tbl[] = {
bc7f75fa
AK		 5329 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5330 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5331 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5332 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5333 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5334 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5335 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5336 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5337 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5338
bc7f75fa
AK		 5339 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5340 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5341 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5342 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5343
bc7f75fa
AK		 5344 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5345 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5346 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5347
4662e82b 5348 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5349 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5350 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5351
bc7f75fa
AK		 5352 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5353 board_80003es2lan },
5354 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5355 board_80003es2lan },
5356 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5357 board_80003es2lan },
5358 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5359 board_80003es2lan },
ad68076e 5360
bc7f75fa
AK		 5361 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5362 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5363 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5364 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5365 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5366 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5367 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
ad68076e 5368
bc7f75fa
AK		 5369 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5370 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5371 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5372 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5373 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5374 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5375 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5376 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5377 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5378
5379 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5380 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5381 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5382
f4187b56
BA		 5383 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5384 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5385
a4f58f54
BA		 5386 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5387 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5388 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5389 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5390
bc7f75fa
AK		 5391 { } /* terminate list */
5392};
5393MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5394
5395/* PCI Device API Driver */
5396static struct pci_driver e1000_driver = {
5397 .name = e1000e_driver_name,
5398 .id_table = e1000_pci_tbl,
5399 .probe = e1000_probe,
5400 .remove = __devexit_p(e1000_remove),
5401#ifdef CONFIG_PM
ad68076e 5402 /* Power Management Hooks */
bc7f75fa
AK		 5403 .suspend = e1000_suspend,
5404 .resume = e1000_resume,
5405#endif
5406 .shutdown = e1000_shutdown,
5407 .err_handler = &e1000_err_handler
5408};
5409
5410/**
5411 * e1000_init_module - Driver Registration Routine
5412 *
5413 * e1000_init_module is the first routine called when the driver is
5414 * loaded. All it does is register with the PCI subsystem.
5415 **/
5416static int __init e1000_init_module(void)
5417{
5418 int ret;
5419 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n",
5420 e1000e_driver_name, e1000e_driver_version);
c7e54b1b 5421 printk(KERN_INFO "%s: Copyright (c) 1999 - 2009 Intel Corporation.\n",
bc7f75fa
AK		 5422 e1000e_driver_name);
5423 ret = pci_register_driver(&e1000_driver);
53ec5498 5424
bc7f75fa
AK		 5425 return ret;
5426}
5427module_init(e1000_init_module);
5428
5429/**
5430 * e1000_exit_module - Driver Exit Cleanup Routine
5431 *
5432 * e1000_exit_module is called just before the driver is removed
5433 * from memory.
5434 **/
5435static void __exit e1000_exit_module(void)
5436{
5437 pci_unregister_driver(&e1000_driver);
5438}
5439module_exit(e1000_exit_module);
5440
5441
5442MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5443MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5444MODULE_LICENSE("GPL");
5445MODULE_VERSION(DRV_VERSION);
5446
5447/* e1000_main.c */
Clone of davem's net-next-2.6 tree