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drivers/net: request_irq - Remove unnecessary leading & from second arg
[net-next-2.6.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
ad68076e 4 Copyright(c) 1999 - 2008 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include <linux/module.h>
30#include <linux/types.h>
31#include <linux/init.h>
32#include <linux/pci.h>
33#include <linux/vmalloc.h>
34#include <linux/pagemap.h>
35#include <linux/delay.h>
36#include <linux/netdevice.h>
37#include <linux/tcp.h>
38#include <linux/ipv6.h>
39#include <net/checksum.h>
40#include <net/ip6_checksum.h>
41#include <linux/mii.h>
42#include <linux/ethtool.h>
43#include <linux/if_vlan.h>
44#include <linux/cpu.h>
45#include <linux/smp.h>
97ac8cae 46#include <linux/pm_qos_params.h>
111b9dc5 47#include <linux/aer.h>
bc7f75fa
AK		 48
49#include "e1000.h"
50
3be8c940 51#define DRV_VERSION "1.0.2-k2"
bc7f75fa
AK		 52char e1000e_driver_name[] = "e1000e";
53const char e1000e_driver_version[] = DRV_VERSION;
54
55static const struct e1000_info *e1000_info_tbl[] = {
56 [board_82571] = &e1000_82571_info,
57 [board_82572] = &e1000_82572_info,
58 [board_82573] = &e1000_82573_info,
4662e82b 59 [board_82574] = &e1000_82574_info,
8c81c9c3 60 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 61 [board_80003es2lan] = &e1000_es2_info,
62 [board_ich8lan] = &e1000_ich8_info,
63 [board_ich9lan] = &e1000_ich9_info,
f4187b56 64 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 65 [board_pchlan] = &e1000_pch_info,
bc7f75fa
AK		 66};
67
68#ifdef DEBUG
69/**
70 * e1000_get_hw_dev_name - return device name string
71 * used by hardware layer to print debugging information
72 **/
73char *e1000e_get_hw_dev_name(struct e1000_hw *hw)
74{
589c085f 75 return hw->adapter->netdev->name;
bc7f75fa
AK		 76}
77#endif
78
79/**
80 * e1000_desc_unused - calculate if we have unused descriptors
81 **/
82static int e1000_desc_unused(struct e1000_ring *ring)
83{
84 if (ring->next_to_clean > ring->next_to_use)
85 return ring->next_to_clean - ring->next_to_use - 1;
86
87 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
88}
89
90/**
ad68076e 91 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 92 * @adapter: board private structure
93 * @status: descriptor status field as written by hardware
94 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
95 * @skb: pointer to sk_buff to be indicated to stack
96 **/
97static void e1000_receive_skb(struct e1000_adapter *adapter,
98 struct net_device *netdev,
99 struct sk_buff *skb,
a39fe742 100 u8 status, __le16 vlan)
bc7f75fa
AK		 101{
102 skb->protocol = eth_type_trans(skb, netdev);
103
104 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 105 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
106 le16_to_cpu(vlan), skb);
bc7f75fa 107 else
89c88b16 108 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 109}
110
111/**
112 * e1000_rx_checksum - Receive Checksum Offload for 82543
113 * @adapter: board private structure
114 * @status_err: receive descriptor status and error fields
115 * @csum: receive descriptor csum field
116 * @sk_buff: socket buffer with received data
117 **/
118static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
119 u32 csum, struct sk_buff *skb)
120{
121 u16 status = (u16)status_err;
122 u8 errors = (u8)(status_err >> 24);
123 skb->ip_summed = CHECKSUM_NONE;
124
125 /* Ignore Checksum bit is set */
126 if (status & E1000_RXD_STAT_IXSM)
127 return;
128 /* TCP/UDP checksum error bit is set */
129 if (errors & E1000_RXD_ERR_TCPE) {
130 /* let the stack verify checksum errors */
131 adapter->hw_csum_err++;
132 return;
133 }
134
135 /* TCP/UDP Checksum has not been calculated */
136 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
137 return;
138
139 /* It must be a TCP or UDP packet with a valid checksum */
140 if (status & E1000_RXD_STAT_TCPCS) {
141 /* TCP checksum is good */
142 skb->ip_summed = CHECKSUM_UNNECESSARY;
143 } else {
ad68076e
BA		 144 /*
145 * IP fragment with UDP payload
146 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 147 * and then put the value in host order for further stack use.
148 */
a39fe742
AV		 149 __sum16 sum = (__force __sum16)htons(csum);
150 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 151 skb->ip_summed = CHECKSUM_COMPLETE;
152 }
153 adapter->hw_csum_good++;
154}
155
156/**
157 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
158 * @adapter: address of board private structure
159 **/
160static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
161 int cleaned_count)
162{
163 struct net_device *netdev = adapter->netdev;
164 struct pci_dev *pdev = adapter->pdev;
165 struct e1000_ring *rx_ring = adapter->rx_ring;
166 struct e1000_rx_desc *rx_desc;
167 struct e1000_buffer *buffer_info;
168 struct sk_buff *skb;
169 unsigned int i;
89d71a66 170 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 171
172 i = rx_ring->next_to_use;
173 buffer_info = &rx_ring->buffer_info[i];
174
175 while (cleaned_count--) {
176 skb = buffer_info->skb;
177 if (skb) {
178 skb_trim(skb, 0);
179 goto map_skb;
180 }
181
89d71a66 182 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 183 if (!skb) {
184 /* Better luck next round */
185 adapter->alloc_rx_buff_failed++;
186 break;
187 }
188
bc7f75fa
AK		 189 buffer_info->skb = skb;
190map_skb:
191 buffer_info->dma = pci_map_single(pdev, skb->data,
192 adapter->rx_buffer_len,
193 PCI_DMA_FROMDEVICE);
8d8bb39b 194 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 195 dev_err(&pdev->dev, "RX DMA map failed\n");
196 adapter->rx_dma_failed++;
197 break;
198 }
199
200 rx_desc = E1000_RX_DESC(*rx_ring, i);
201 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
202
203 i++;
204 if (i == rx_ring->count)
205 i = 0;
206 buffer_info = &rx_ring->buffer_info[i];
207 }
208
209 if (rx_ring->next_to_use != i) {
210 rx_ring->next_to_use = i;
211 if (i-- == 0)
212 i = (rx_ring->count - 1);
213
ad68076e
BA		 214 /*
215 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 216 * know there are new descriptors to fetch. (Only
217 * applicable for weak-ordered memory model archs,
ad68076e
BA		 218 * such as IA-64).
219 */
bc7f75fa
AK		 220 wmb();
221 writel(i, adapter->hw.hw_addr + rx_ring->tail);
222 }
223}
224
225/**
226 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
227 * @adapter: address of board private structure
228 **/
229static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
230 int cleaned_count)
231{
232 struct net_device *netdev = adapter->netdev;
233 struct pci_dev *pdev = adapter->pdev;
234 union e1000_rx_desc_packet_split *rx_desc;
235 struct e1000_ring *rx_ring = adapter->rx_ring;
236 struct e1000_buffer *buffer_info;
237 struct e1000_ps_page *ps_page;
238 struct sk_buff *skb;
239 unsigned int i, j;
240
241 i = rx_ring->next_to_use;
242 buffer_info = &rx_ring->buffer_info[i];
243
244 while (cleaned_count--) {
245 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
246
247 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 248 ps_page = &buffer_info->ps_pages[j];
249 if (j >= adapter->rx_ps_pages) {
250 /* all unused desc entries get hw null ptr */
a39fe742 251 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 252 continue;
253 }
254 if (!ps_page->page) {
255 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 256 if (!ps_page->page) {
47f44e40
AK		 257 adapter->alloc_rx_buff_failed++;
258 goto no_buffers;
259 }
260 ps_page->dma = pci_map_page(pdev,
261 ps_page->page,
262 0, PAGE_SIZE,
263 PCI_DMA_FROMDEVICE);
8d8bb39b 264 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
47f44e40
AK		 265 dev_err(&adapter->pdev->dev,
266 "RX DMA page map failed\n");
267 adapter->rx_dma_failed++;
268 goto no_buffers;
bc7f75fa 269 }
bc7f75fa 270 }
47f44e40
AK		 271 /*
272 * Refresh the desc even if buffer_addrs
273 * didn't change because each write-back
274 * erases this info.
275 */
276 rx_desc->read.buffer_addr[j+1] =
277 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 278 }
279
89d71a66
ED		 280 skb = netdev_alloc_skb_ip_align(netdev,
281 adapter->rx_ps_bsize0);
bc7f75fa
AK		 282
283 if (!skb) {
284 adapter->alloc_rx_buff_failed++;
285 break;
286 }
287
bc7f75fa
AK		 288 buffer_info->skb = skb;
289 buffer_info->dma = pci_map_single(pdev, skb->data,
290 adapter->rx_ps_bsize0,
291 PCI_DMA_FROMDEVICE);
8d8bb39b 292 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 293 dev_err(&pdev->dev, "RX DMA map failed\n");
294 adapter->rx_dma_failed++;
295 /* cleanup skb */
296 dev_kfree_skb_any(skb);
297 buffer_info->skb = NULL;
298 break;
299 }
300
301 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
302
303 i++;
304 if (i == rx_ring->count)
305 i = 0;
306 buffer_info = &rx_ring->buffer_info[i];
307 }
308
309no_buffers:
310 if (rx_ring->next_to_use != i) {
311 rx_ring->next_to_use = i;
312
313 if (!(i--))
314 i = (rx_ring->count - 1);
315
ad68076e
BA		 316 /*
317 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 318 * know there are new descriptors to fetch. (Only
319 * applicable for weak-ordered memory model archs,
ad68076e
BA		 320 * such as IA-64).
321 */
bc7f75fa 322 wmb();
ad68076e
BA		 323 /*
324 * Hardware increments by 16 bytes, but packet split
bc7f75fa
AK		 325 * descriptors are 32 bytes...so we increment tail
326 * twice as much.
327 */
328 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
329 }
330}
331
97ac8cae
BA		 332/**
333 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
334 * @adapter: address of board private structure
97ac8cae
BA		 335 * @cleaned_count: number of buffers to allocate this pass
336 **/
337
338static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
339 int cleaned_count)
340{
341 struct net_device *netdev = adapter->netdev;
342 struct pci_dev *pdev = adapter->pdev;
343 struct e1000_rx_desc *rx_desc;
344 struct e1000_ring *rx_ring = adapter->rx_ring;
345 struct e1000_buffer *buffer_info;
346 struct sk_buff *skb;
347 unsigned int i;
89d71a66 348 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 349
350 i = rx_ring->next_to_use;
351 buffer_info = &rx_ring->buffer_info[i];
352
353 while (cleaned_count--) {
354 skb = buffer_info->skb;
355 if (skb) {
356 skb_trim(skb, 0);
357 goto check_page;
358 }
359
89d71a66 360 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 361 if (unlikely(!skb)) {
362 /* Better luck next round */
363 adapter->alloc_rx_buff_failed++;
364 break;
365 }
366
97ac8cae
BA		 367 buffer_info->skb = skb;
368check_page:
369 /* allocate a new page if necessary */
370 if (!buffer_info->page) {
371 buffer_info->page = alloc_page(GFP_ATOMIC);
372 if (unlikely(!buffer_info->page)) {
373 adapter->alloc_rx_buff_failed++;
374 break;
375 }
376 }
377
378 if (!buffer_info->dma)
379 buffer_info->dma = pci_map_page(pdev,
380 buffer_info->page, 0,
381 PAGE_SIZE,
382 PCI_DMA_FROMDEVICE);
383
384 rx_desc = E1000_RX_DESC(*rx_ring, i);
385 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
386
387 if (unlikely(++i == rx_ring->count))
388 i = 0;
389 buffer_info = &rx_ring->buffer_info[i];
390 }
391
392 if (likely(rx_ring->next_to_use != i)) {
393 rx_ring->next_to_use = i;
394 if (unlikely(i-- == 0))
395 i = (rx_ring->count - 1);
396
397 /* Force memory writes to complete before letting h/w
398 * know there are new descriptors to fetch. (Only
399 * applicable for weak-ordered memory model archs,
400 * such as IA-64). */
401 wmb();
402 writel(i, adapter->hw.hw_addr + rx_ring->tail);
403 }
404}
405
bc7f75fa
AK		 406/**
407 * e1000_clean_rx_irq - Send received data up the network stack; legacy
408 * @adapter: board private structure
409 *
410 * the return value indicates whether actual cleaning was done, there
411 * is no guarantee that everything was cleaned
412 **/
413static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
414 int *work_done, int work_to_do)
415{
416 struct net_device *netdev = adapter->netdev;
417 struct pci_dev *pdev = adapter->pdev;
418 struct e1000_ring *rx_ring = adapter->rx_ring;
419 struct e1000_rx_desc *rx_desc, *next_rxd;
420 struct e1000_buffer *buffer_info, *next_buffer;
421 u32 length;
422 unsigned int i;
423 int cleaned_count = 0;
424 bool cleaned = 0;
425 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
426
427 i = rx_ring->next_to_clean;
428 rx_desc = E1000_RX_DESC(*rx_ring, i);
429 buffer_info = &rx_ring->buffer_info[i];
430
431 while (rx_desc->status & E1000_RXD_STAT_DD) {
432 struct sk_buff *skb;
433 u8 status;
434
435 if (*work_done >= work_to_do)
436 break;
437 (*work_done)++;
438
439 status = rx_desc->status;
440 skb = buffer_info->skb;
441 buffer_info->skb = NULL;
442
443 prefetch(skb->data - NET_IP_ALIGN);
444
445 i++;
446 if (i == rx_ring->count)
447 i = 0;
448 next_rxd = E1000_RX_DESC(*rx_ring, i);
449 prefetch(next_rxd);
450
451 next_buffer = &rx_ring->buffer_info[i];
452
453 cleaned = 1;
454 cleaned_count++;
455 pci_unmap_single(pdev,
456 buffer_info->dma,
457 adapter->rx_buffer_len,
458 PCI_DMA_FROMDEVICE);
459 buffer_info->dma = 0;
460
461 length = le16_to_cpu(rx_desc->length);
462
463 /* !EOP means multiple descriptors were used to store a single
464 * packet, also make sure the frame isn't just CRC only */
465 if (!(status & E1000_RXD_STAT_EOP) || (length <= 4)) {
466 /* All receives must fit into a single buffer */
44defeb3
JK		 467 e_dbg("%s: Receive packet consumed multiple buffers\n",
468 netdev->name);
bc7f75fa
AK		 469 /* recycle */
470 buffer_info->skb = skb;
471 goto next_desc;
472 }
473
474 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
475 /* recycle */
476 buffer_info->skb = skb;
477 goto next_desc;
478 }
479
eb7c3adb
JK		 480 /* adjust length to remove Ethernet CRC */
481 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
482 length -= 4;
483
bc7f75fa
AK		 484 total_rx_bytes += length;
485 total_rx_packets++;
486
ad68076e
BA		 487 /*
488 * code added for copybreak, this should improve
bc7f75fa 489 * performance for small packets with large amounts
ad68076e
BA		 490 * of reassembly being done in the stack
491 */
bc7f75fa
AK		 492 if (length < copybreak) {
493 struct sk_buff *new_skb =
89d71a66 494 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 495 if (new_skb) {
808ff676
BA		 496 skb_copy_to_linear_data_offset(new_skb,
497 -NET_IP_ALIGN,
498 (skb->data -
499 NET_IP_ALIGN),
500 (length +
501 NET_IP_ALIGN));
bc7f75fa
AK		 502 /* save the skb in buffer_info as good */
503 buffer_info->skb = skb;
504 skb = new_skb;
505 }
506 /* else just continue with the old one */
507 }
508 /* end copybreak code */
509 skb_put(skb, length);
510
511 /* Receive Checksum Offload */
512 e1000_rx_checksum(adapter,
513 (u32)(status) |
514 ((u32)(rx_desc->errors) << 24),
515 le16_to_cpu(rx_desc->csum), skb);
516
517 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
518
519next_desc:
520 rx_desc->status = 0;
521
522 /* return some buffers to hardware, one at a time is too slow */
523 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
524 adapter->alloc_rx_buf(adapter, cleaned_count);
525 cleaned_count = 0;
526 }
527
528 /* use prefetched values */
529 rx_desc = next_rxd;
530 buffer_info = next_buffer;
531 }
532 rx_ring->next_to_clean = i;
533
534 cleaned_count = e1000_desc_unused(rx_ring);
535 if (cleaned_count)
536 adapter->alloc_rx_buf(adapter, cleaned_count);
537
bc7f75fa 538 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 539 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 540 netdev->stats.rx_bytes += total_rx_bytes;
541 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 542 return cleaned;
543}
544
bc7f75fa
AK		 545static void e1000_put_txbuf(struct e1000_adapter *adapter,
546 struct e1000_buffer *buffer_info)
547{
8ddc951c 548 buffer_info->dma = 0;
bc7f75fa 549 if (buffer_info->skb) {
8ddc951c
JB		 550 skb_dma_unmap(&adapter->pdev->dev, buffer_info->skb,
551 DMA_TO_DEVICE);
bc7f75fa
AK		 552 dev_kfree_skb_any(buffer_info->skb);
553 buffer_info->skb = NULL;
554 }
1b7719c4 555 buffer_info->time_stamp = 0;
bc7f75fa
AK		 556}
557
558static void e1000_print_tx_hang(struct e1000_adapter *adapter)
559{
560 struct e1000_ring *tx_ring = adapter->tx_ring;
561 unsigned int i = tx_ring->next_to_clean;
562 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
563 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 564
565 /* detected Tx unit hang */
44defeb3
JK		 566 e_err("Detected Tx Unit Hang:\n"
567 " TDH <%x>\n"
568 " TDT <%x>\n"
569 " next_to_use <%x>\n"
570 " next_to_clean <%x>\n"
571 "buffer_info[next_to_clean]:\n"
572 " time_stamp <%lx>\n"
573 " next_to_watch <%x>\n"
574 " jiffies <%lx>\n"
575 " next_to_watch.status <%x>\n",
576 readl(adapter->hw.hw_addr + tx_ring->head),
577 readl(adapter->hw.hw_addr + tx_ring->tail),
578 tx_ring->next_to_use,
579 tx_ring->next_to_clean,
580 tx_ring->buffer_info[eop].time_stamp,
581 eop,
582 jiffies,
583 eop_desc->upper.fields.status);
bc7f75fa
AK		 584}
585
586/**
587 * e1000_clean_tx_irq - Reclaim resources after transmit completes
588 * @adapter: board private structure
589 *
590 * the return value indicates whether actual cleaning was done, there
591 * is no guarantee that everything was cleaned
592 **/
593static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
594{
595 struct net_device *netdev = adapter->netdev;
596 struct e1000_hw *hw = &adapter->hw;
597 struct e1000_ring *tx_ring = adapter->tx_ring;
598 struct e1000_tx_desc *tx_desc, *eop_desc;
599 struct e1000_buffer *buffer_info;
600 unsigned int i, eop;
601 unsigned int count = 0;
bc7f75fa
AK		 602 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
603
604 i = tx_ring->next_to_clean;
605 eop = tx_ring->buffer_info[i].next_to_watch;
606 eop_desc = E1000_TX_DESC(*tx_ring, eop);
607
12d04a3c
AD		 608 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
609 (count < tx_ring->count)) {
a86043c2
JB		 610 bool cleaned = false;
611 for (; !cleaned; count++) {
bc7f75fa
AK		 612 tx_desc = E1000_TX_DESC(*tx_ring, i);
613 buffer_info = &tx_ring->buffer_info[i];
614 cleaned = (i == eop);
615
616 if (cleaned) {
617 struct sk_buff *skb = buffer_info->skb;
618 unsigned int segs, bytecount;
619 segs = skb_shinfo(skb)->gso_segs ?: 1;
620 /* multiply data chunks by size of headers */
621 bytecount = ((segs - 1) * skb_headlen(skb)) +
622 skb->len;
623 total_tx_packets += segs;
624 total_tx_bytes += bytecount;
625 }
626
627 e1000_put_txbuf(adapter, buffer_info);
628 tx_desc->upper.data = 0;
629
630 i++;
631 if (i == tx_ring->count)
632 i = 0;
633 }
634
635 eop = tx_ring->buffer_info[i].next_to_watch;
636 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 637 }
638
639 tx_ring->next_to_clean = i;
640
641#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 642 if (count && netif_carrier_ok(netdev) &&
643 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 644 /* Make sure that anybody stopping the queue after this
645 * sees the new next_to_clean.
646 */
647 smp_mb();
648
649 if (netif_queue_stopped(netdev) &&
650 !(test_bit(__E1000_DOWN, &adapter->state))) {
651 netif_wake_queue(netdev);
652 ++adapter->restart_queue;
653 }
654 }
655
656 if (adapter->detect_tx_hung) {
1b7719c4
AD		 657 /* Detect a transmit hang in hardware, this serializes the
658 * check with the clearing of time_stamp and movement of i */
bc7f75fa 659 adapter->detect_tx_hung = 0;
12d04a3c
AD		 660 if (tx_ring->buffer_info[i].time_stamp &&
661 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
bc7f75fa 662 + (adapter->tx_timeout_factor * HZ))
ad68076e 663 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
bc7f75fa
AK		 664 e1000_print_tx_hang(adapter);
665 netif_stop_queue(netdev);
666 }
667 }
668 adapter->total_tx_bytes += total_tx_bytes;
669 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 670 netdev->stats.tx_bytes += total_tx_bytes;
671 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 672 return (count < tx_ring->count);
bc7f75fa
AK		 673}
674
bc7f75fa
AK		 675/**
676 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
677 * @adapter: board private structure
678 *
679 * the return value indicates whether actual cleaning was done, there
680 * is no guarantee that everything was cleaned
681 **/
682static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
683 int *work_done, int work_to_do)
684{
685 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
686 struct net_device *netdev = adapter->netdev;
687 struct pci_dev *pdev = adapter->pdev;
688 struct e1000_ring *rx_ring = adapter->rx_ring;
689 struct e1000_buffer *buffer_info, *next_buffer;
690 struct e1000_ps_page *ps_page;
691 struct sk_buff *skb;
692 unsigned int i, j;
693 u32 length, staterr;
694 int cleaned_count = 0;
695 bool cleaned = 0;
696 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
697
698 i = rx_ring->next_to_clean;
699 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
700 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
701 buffer_info = &rx_ring->buffer_info[i];
702
703 while (staterr & E1000_RXD_STAT_DD) {
704 if (*work_done >= work_to_do)
705 break;
706 (*work_done)++;
707 skb = buffer_info->skb;
708
709 /* in the packet split case this is header only */
710 prefetch(skb->data - NET_IP_ALIGN);
711
712 i++;
713 if (i == rx_ring->count)
714 i = 0;
715 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
716 prefetch(next_rxd);
717
718 next_buffer = &rx_ring->buffer_info[i];
719
720 cleaned = 1;
721 cleaned_count++;
722 pci_unmap_single(pdev, buffer_info->dma,
723 adapter->rx_ps_bsize0,
724 PCI_DMA_FROMDEVICE);
725 buffer_info->dma = 0;
726
727 if (!(staterr & E1000_RXD_STAT_EOP)) {
44defeb3
JK		 728 e_dbg("%s: Packet Split buffers didn't pick up the "
729 "full packet\n", netdev->name);
bc7f75fa
AK		 730 dev_kfree_skb_irq(skb);
731 goto next_desc;
732 }
733
734 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
735 dev_kfree_skb_irq(skb);
736 goto next_desc;
737 }
738
739 length = le16_to_cpu(rx_desc->wb.middle.length0);
740
741 if (!length) {
44defeb3
JK		 742 e_dbg("%s: Last part of the packet spanning multiple "
743 "descriptors\n", netdev->name);
bc7f75fa
AK		 744 dev_kfree_skb_irq(skb);
745 goto next_desc;
746 }
747
748 /* Good Receive */
749 skb_put(skb, length);
750
751 {
ad68076e
BA		 752 /*
753 * this looks ugly, but it seems compiler issues make it
754 * more efficient than reusing j
755 */
bc7f75fa
AK		 756 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
757
ad68076e
BA		 758 /*
759 * page alloc/put takes too long and effects small packet
760 * throughput, so unsplit small packets and save the alloc/put
761 * only valid in softirq (napi) context to call kmap_*
762 */
bc7f75fa
AK		 763 if (l1 && (l1 <= copybreak) &&
764 ((length + l1) <= adapter->rx_ps_bsize0)) {
765 u8 *vaddr;
766
47f44e40 767 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 768
ad68076e
BA		 769 /*
770 * there is no documentation about how to call
bc7f75fa 771 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 772 * very long
773 */
bc7f75fa
AK		 774 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
775 PAGE_SIZE, PCI_DMA_FROMDEVICE);
776 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
777 memcpy(skb_tail_pointer(skb), vaddr, l1);
778 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
779 pci_dma_sync_single_for_device(pdev, ps_page->dma,
780 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 781
eb7c3adb
JK		 782 /* remove the CRC */
783 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
784 l1 -= 4;
785
bc7f75fa
AK		 786 skb_put(skb, l1);
787 goto copydone;
788 } /* if */
789 }
790
791 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
792 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
793 if (!length)
794 break;
795
47f44e40 796 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 797 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
798 PCI_DMA_FROMDEVICE);
799 ps_page->dma = 0;
800 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
801 ps_page->page = NULL;
802 skb->len += length;
803 skb->data_len += length;
804 skb->truesize += length;
805 }
806
eb7c3adb
JK		 807 /* strip the ethernet crc, problem is we're using pages now so
808 * this whole operation can get a little cpu intensive
809 */
810 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
811 pskb_trim(skb, skb->len - 4);
812
bc7f75fa
AK		 813copydone:
814 total_rx_bytes += skb->len;
815 total_rx_packets++;
816
817 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
818 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
819
820 if (rx_desc->wb.upper.header_status &
821 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
822 adapter->rx_hdr_split++;
823
824 e1000_receive_skb(adapter, netdev, skb,
825 staterr, rx_desc->wb.middle.vlan);
826
827next_desc:
828 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
829 buffer_info->skb = NULL;
830
831 /* return some buffers to hardware, one at a time is too slow */
832 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
833 adapter->alloc_rx_buf(adapter, cleaned_count);
834 cleaned_count = 0;
835 }
836
837 /* use prefetched values */
838 rx_desc = next_rxd;
839 buffer_info = next_buffer;
840
841 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
842 }
843 rx_ring->next_to_clean = i;
844
845 cleaned_count = e1000_desc_unused(rx_ring);
846 if (cleaned_count)
847 adapter->alloc_rx_buf(adapter, cleaned_count);
848
bc7f75fa 849 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 850 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 851 netdev->stats.rx_bytes += total_rx_bytes;
852 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 853 return cleaned;
854}
855
97ac8cae
BA		 856/**
857 * e1000_consume_page - helper function
858 **/
859static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
860 u16 length)
861{
862 bi->page = NULL;
863 skb->len += length;
864 skb->data_len += length;
865 skb->truesize += length;
866}
867
868/**
869 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
870 * @adapter: board private structure
871 *
872 * the return value indicates whether actual cleaning was done, there
873 * is no guarantee that everything was cleaned
874 **/
875
876static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
877 int *work_done, int work_to_do)
878{
879 struct net_device *netdev = adapter->netdev;
880 struct pci_dev *pdev = adapter->pdev;
881 struct e1000_ring *rx_ring = adapter->rx_ring;
882 struct e1000_rx_desc *rx_desc, *next_rxd;
883 struct e1000_buffer *buffer_info, *next_buffer;
884 u32 length;
885 unsigned int i;
886 int cleaned_count = 0;
887 bool cleaned = false;
888 unsigned int total_rx_bytes=0, total_rx_packets=0;
889
890 i = rx_ring->next_to_clean;
891 rx_desc = E1000_RX_DESC(*rx_ring, i);
892 buffer_info = &rx_ring->buffer_info[i];
893
894 while (rx_desc->status & E1000_RXD_STAT_DD) {
895 struct sk_buff *skb;
896 u8 status;
897
898 if (*work_done >= work_to_do)
899 break;
900 (*work_done)++;
901
902 status = rx_desc->status;
903 skb = buffer_info->skb;
904 buffer_info->skb = NULL;
905
906 ++i;
907 if (i == rx_ring->count)
908 i = 0;
909 next_rxd = E1000_RX_DESC(*rx_ring, i);
910 prefetch(next_rxd);
911
912 next_buffer = &rx_ring->buffer_info[i];
913
914 cleaned = true;
915 cleaned_count++;
916 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
917 PCI_DMA_FROMDEVICE);
918 buffer_info->dma = 0;
919
920 length = le16_to_cpu(rx_desc->length);
921
922 /* errors is only valid for DD + EOP descriptors */
923 if (unlikely((status & E1000_RXD_STAT_EOP) &&
924 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
925 /* recycle both page and skb */
926 buffer_info->skb = skb;
927 /* an error means any chain goes out the window
928 * too */
929 if (rx_ring->rx_skb_top)
930 dev_kfree_skb(rx_ring->rx_skb_top);
931 rx_ring->rx_skb_top = NULL;
932 goto next_desc;
933 }
934
935#define rxtop rx_ring->rx_skb_top
936 if (!(status & E1000_RXD_STAT_EOP)) {
937 /* this descriptor is only the beginning (or middle) */
938 if (!rxtop) {
939 /* this is the beginning of a chain */
940 rxtop = skb;
941 skb_fill_page_desc(rxtop, 0, buffer_info->page,
942 0, length);
943 } else {
944 /* this is the middle of a chain */
945 skb_fill_page_desc(rxtop,
946 skb_shinfo(rxtop)->nr_frags,
947 buffer_info->page, 0, length);
948 /* re-use the skb, only consumed the page */
949 buffer_info->skb = skb;
950 }
951 e1000_consume_page(buffer_info, rxtop, length);
952 goto next_desc;
953 } else {
954 if (rxtop) {
955 /* end of the chain */
956 skb_fill_page_desc(rxtop,
957 skb_shinfo(rxtop)->nr_frags,
958 buffer_info->page, 0, length);
959 /* re-use the current skb, we only consumed the
960 * page */
961 buffer_info->skb = skb;
962 skb = rxtop;
963 rxtop = NULL;
964 e1000_consume_page(buffer_info, skb, length);
965 } else {
966 /* no chain, got EOP, this buf is the packet
967 * copybreak to save the put_page/alloc_page */
968 if (length <= copybreak &&
969 skb_tailroom(skb) >= length) {
970 u8 *vaddr;
971 vaddr = kmap_atomic(buffer_info->page,
972 KM_SKB_DATA_SOFTIRQ);
973 memcpy(skb_tail_pointer(skb), vaddr,
974 length);
975 kunmap_atomic(vaddr,
976 KM_SKB_DATA_SOFTIRQ);
977 /* re-use the page, so don't erase
978 * buffer_info->page */
979 skb_put(skb, length);
980 } else {
981 skb_fill_page_desc(skb, 0,
982 buffer_info->page, 0,
983 length);
984 e1000_consume_page(buffer_info, skb,
985 length);
986 }
987 }
988 }
989
990 /* Receive Checksum Offload XXX recompute due to CRC strip? */
991 e1000_rx_checksum(adapter,
992 (u32)(status) |
993 ((u32)(rx_desc->errors) << 24),
994 le16_to_cpu(rx_desc->csum), skb);
995
996 /* probably a little skewed due to removing CRC */
997 total_rx_bytes += skb->len;
998 total_rx_packets++;
999
1000 /* eth type trans needs skb->data to point to something */
1001 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1002 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1003 dev_kfree_skb(skb);
1004 goto next_desc;
1005 }
1006
1007 e1000_receive_skb(adapter, netdev, skb, status,
1008 rx_desc->special);
1009
1010next_desc:
1011 rx_desc->status = 0;
1012
1013 /* return some buffers to hardware, one at a time is too slow */
1014 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1015 adapter->alloc_rx_buf(adapter, cleaned_count);
1016 cleaned_count = 0;
1017 }
1018
1019 /* use prefetched values */
1020 rx_desc = next_rxd;
1021 buffer_info = next_buffer;
1022 }
1023 rx_ring->next_to_clean = i;
1024
1025 cleaned_count = e1000_desc_unused(rx_ring);
1026 if (cleaned_count)
1027 adapter->alloc_rx_buf(adapter, cleaned_count);
1028
1029 adapter->total_rx_bytes += total_rx_bytes;
1030 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1031 netdev->stats.rx_bytes += total_rx_bytes;
1032 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1033 return cleaned;
1034}
1035
bc7f75fa
AK		 1036/**
1037 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1038 * @adapter: board private structure
1039 **/
1040static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1041{
1042 struct e1000_ring *rx_ring = adapter->rx_ring;
1043 struct e1000_buffer *buffer_info;
1044 struct e1000_ps_page *ps_page;
1045 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1046 unsigned int i, j;
1047
1048 /* Free all the Rx ring sk_buffs */
1049 for (i = 0; i < rx_ring->count; i++) {
1050 buffer_info = &rx_ring->buffer_info[i];
1051 if (buffer_info->dma) {
1052 if (adapter->clean_rx == e1000_clean_rx_irq)
1053 pci_unmap_single(pdev, buffer_info->dma,
1054 adapter->rx_buffer_len,
1055 PCI_DMA_FROMDEVICE);
97ac8cae
BA		 1056 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1057 pci_unmap_page(pdev, buffer_info->dma,
1058 PAGE_SIZE,
1059 PCI_DMA_FROMDEVICE);
bc7f75fa
AK		 1060 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1061 pci_unmap_single(pdev, buffer_info->dma,
1062 adapter->rx_ps_bsize0,
1063 PCI_DMA_FROMDEVICE);
1064 buffer_info->dma = 0;
1065 }
1066
97ac8cae
BA		 1067 if (buffer_info->page) {
1068 put_page(buffer_info->page);
1069 buffer_info->page = NULL;
1070 }
1071
bc7f75fa
AK		 1072 if (buffer_info->skb) {
1073 dev_kfree_skb(buffer_info->skb);
1074 buffer_info->skb = NULL;
1075 }
1076
1077 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1078 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1079 if (!ps_page->page)
1080 break;
1081 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1082 PCI_DMA_FROMDEVICE);
1083 ps_page->dma = 0;
1084 put_page(ps_page->page);
1085 ps_page->page = NULL;
1086 }
1087 }
1088
1089 /* there also may be some cached data from a chained receive */
1090 if (rx_ring->rx_skb_top) {
1091 dev_kfree_skb(rx_ring->rx_skb_top);
1092 rx_ring->rx_skb_top = NULL;
1093 }
1094
bc7f75fa
AK		 1095 /* Zero out the descriptor ring */
1096 memset(rx_ring->desc, 0, rx_ring->size);
1097
1098 rx_ring->next_to_clean = 0;
1099 rx_ring->next_to_use = 0;
1100
1101 writel(0, adapter->hw.hw_addr + rx_ring->head);
1102 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1103}
1104
a8f88ff5
JB		 1105static void e1000e_downshift_workaround(struct work_struct *work)
1106{
1107 struct e1000_adapter *adapter = container_of(work,
1108 struct e1000_adapter, downshift_task);
1109
1110 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1111}
1112
bc7f75fa
AK		 1113/**
1114 * e1000_intr_msi - Interrupt Handler
1115 * @irq: interrupt number
1116 * @data: pointer to a network interface device structure
1117 **/
1118static irqreturn_t e1000_intr_msi(int irq, void *data)
1119{
1120 struct net_device *netdev = data;
1121 struct e1000_adapter *adapter = netdev_priv(netdev);
1122 struct e1000_hw *hw = &adapter->hw;
1123 u32 icr = er32(ICR);
1124
ad68076e
BA		 1125 /*
1126 * read ICR disables interrupts using IAM
1127 */
bc7f75fa 1128
573cca8c 1129 if (icr & E1000_ICR_LSC) {
bc7f75fa 1130 hw->mac.get_link_status = 1;
ad68076e
BA		 1131 /*
1132 * ICH8 workaround-- Call gig speed drop workaround on cable
1133 * disconnect (LSC) before accessing any PHY registers
1134 */
bc7f75fa
AK		 1135 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1136 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1137 schedule_work(&adapter->downshift_task);
bc7f75fa 1138
ad68076e
BA		 1139 /*
1140 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1141 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1142 * adapter in watchdog
1143 */
bc7f75fa
AK		 1144 if (netif_carrier_ok(netdev) &&
1145 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1146 /* disable receives */
1147 u32 rctl = er32(RCTL);
1148 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1149 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1150 }
1151 /* guard against interrupt when we're going down */
1152 if (!test_bit(__E1000_DOWN, &adapter->state))
1153 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1154 }
1155
288379f0 1156 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1157 adapter->total_tx_bytes = 0;
1158 adapter->total_tx_packets = 0;
1159 adapter->total_rx_bytes = 0;
1160 adapter->total_rx_packets = 0;
288379f0 1161 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1162 }
1163
1164 return IRQ_HANDLED;
1165}
1166
1167/**
1168 * e1000_intr - Interrupt Handler
1169 * @irq: interrupt number
1170 * @data: pointer to a network interface device structure
1171 **/
1172static irqreturn_t e1000_intr(int irq, void *data)
1173{
1174 struct net_device *netdev = data;
1175 struct e1000_adapter *adapter = netdev_priv(netdev);
1176 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1177 u32 rctl, icr = er32(ICR);
4662e82b 1178
bc7f75fa
AK		 1179 if (!icr)
1180 return IRQ_NONE; /* Not our interrupt */
1181
ad68076e
BA		 1182 /*
1183 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1184 * not set, then the adapter didn't send an interrupt
1185 */
bc7f75fa
AK		 1186 if (!(icr & E1000_ICR_INT_ASSERTED))
1187 return IRQ_NONE;
1188
ad68076e
BA		 1189 /*
1190 * Interrupt Auto-Mask...upon reading ICR,
1191 * interrupts are masked. No need for the
1192 * IMC write
1193 */
bc7f75fa 1194
573cca8c 1195 if (icr & E1000_ICR_LSC) {
bc7f75fa 1196 hw->mac.get_link_status = 1;
ad68076e
BA		 1197 /*
1198 * ICH8 workaround-- Call gig speed drop workaround on cable
1199 * disconnect (LSC) before accessing any PHY registers
1200 */
bc7f75fa
AK		 1201 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1202 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1203 schedule_work(&adapter->downshift_task);
bc7f75fa 1204
ad68076e
BA		 1205 /*
1206 * 80003ES2LAN workaround--
bc7f75fa
AK		 1207 * For packet buffer work-around on link down event;
1208 * disable receives here in the ISR and
1209 * reset adapter in watchdog
1210 */
1211 if (netif_carrier_ok(netdev) &&
1212 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1213 /* disable receives */
1214 rctl = er32(RCTL);
1215 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1216 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1217 }
1218 /* guard against interrupt when we're going down */
1219 if (!test_bit(__E1000_DOWN, &adapter->state))
1220 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1221 }
1222
288379f0 1223 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1224 adapter->total_tx_bytes = 0;
1225 adapter->total_tx_packets = 0;
1226 adapter->total_rx_bytes = 0;
1227 adapter->total_rx_packets = 0;
288379f0 1228 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1229 }
1230
1231 return IRQ_HANDLED;
1232}
1233
4662e82b
BA		 1234static irqreturn_t e1000_msix_other(int irq, void *data)
1235{
1236 struct net_device *netdev = data;
1237 struct e1000_adapter *adapter = netdev_priv(netdev);
1238 struct e1000_hw *hw = &adapter->hw;
1239 u32 icr = er32(ICR);
1240
1241 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1242 if (!test_bit(__E1000_DOWN, &adapter->state))
1243 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1244 return IRQ_NONE;
1245 }
1246
1247 if (icr & adapter->eiac_mask)
1248 ew32(ICS, (icr & adapter->eiac_mask));
1249
1250 if (icr & E1000_ICR_OTHER) {
1251 if (!(icr & E1000_ICR_LSC))
1252 goto no_link_interrupt;
1253 hw->mac.get_link_status = 1;
1254 /* guard against interrupt when we're going down */
1255 if (!test_bit(__E1000_DOWN, &adapter->state))
1256 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1257 }
1258
1259no_link_interrupt:
a3c69fef
JB		 1260 if (!test_bit(__E1000_DOWN, &adapter->state))
1261 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1262
1263 return IRQ_HANDLED;
1264}
1265
1266
1267static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1268{
1269 struct net_device *netdev = data;
1270 struct e1000_adapter *adapter = netdev_priv(netdev);
1271 struct e1000_hw *hw = &adapter->hw;
1272 struct e1000_ring *tx_ring = adapter->tx_ring;
1273
1274
1275 adapter->total_tx_bytes = 0;
1276 adapter->total_tx_packets = 0;
1277
1278 if (!e1000_clean_tx_irq(adapter))
1279 /* Ring was not completely cleaned, so fire another interrupt */
1280 ew32(ICS, tx_ring->ims_val);
1281
1282 return IRQ_HANDLED;
1283}
1284
1285static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1286{
1287 struct net_device *netdev = data;
1288 struct e1000_adapter *adapter = netdev_priv(netdev);
1289
1290 /* Write the ITR value calculated at the end of the
1291 * previous interrupt.
1292 */
1293 if (adapter->rx_ring->set_itr) {
1294 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1295 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1296 adapter->rx_ring->set_itr = 0;
1297 }
1298
288379f0 1299 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1300 adapter->total_rx_bytes = 0;
1301 adapter->total_rx_packets = 0;
288379f0 1302 __napi_schedule(&adapter->napi);
4662e82b
BA		 1303 }
1304 return IRQ_HANDLED;
1305}
1306
1307/**
1308 * e1000_configure_msix - Configure MSI-X hardware
1309 *
1310 * e1000_configure_msix sets up the hardware to properly
1311 * generate MSI-X interrupts.
1312 **/
1313static void e1000_configure_msix(struct e1000_adapter *adapter)
1314{
1315 struct e1000_hw *hw = &adapter->hw;
1316 struct e1000_ring *rx_ring = adapter->rx_ring;
1317 struct e1000_ring *tx_ring = adapter->tx_ring;
1318 int vector = 0;
1319 u32 ctrl_ext, ivar = 0;
1320
1321 adapter->eiac_mask = 0;
1322
1323 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1324 if (hw->mac.type == e1000_82574) {
1325 u32 rfctl = er32(RFCTL);
1326 rfctl |= E1000_RFCTL_ACK_DIS;
1327 ew32(RFCTL, rfctl);
1328 }
1329
1330#define E1000_IVAR_INT_ALLOC_VALID 0x8
1331 /* Configure Rx vector */
1332 rx_ring->ims_val = E1000_IMS_RXQ0;
1333 adapter->eiac_mask |= rx_ring->ims_val;
1334 if (rx_ring->itr_val)
1335 writel(1000000000 / (rx_ring->itr_val * 256),
1336 hw->hw_addr + rx_ring->itr_register);
1337 else
1338 writel(1, hw->hw_addr + rx_ring->itr_register);
1339 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1340
1341 /* Configure Tx vector */
1342 tx_ring->ims_val = E1000_IMS_TXQ0;
1343 vector++;
1344 if (tx_ring->itr_val)
1345 writel(1000000000 / (tx_ring->itr_val * 256),
1346 hw->hw_addr + tx_ring->itr_register);
1347 else
1348 writel(1, hw->hw_addr + tx_ring->itr_register);
1349 adapter->eiac_mask |= tx_ring->ims_val;
1350 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1351
1352 /* set vector for Other Causes, e.g. link changes */
1353 vector++;
1354 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1355 if (rx_ring->itr_val)
1356 writel(1000000000 / (rx_ring->itr_val * 256),
1357 hw->hw_addr + E1000_EITR_82574(vector));
1358 else
1359 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1360
1361 /* Cause Tx interrupts on every write back */
1362 ivar |= (1 << 31);
1363
1364 ew32(IVAR, ivar);
1365
1366 /* enable MSI-X PBA support */
1367 ctrl_ext = er32(CTRL_EXT);
1368 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1369
1370 /* Auto-Mask Other interrupts upon ICR read */
1371#define E1000_EIAC_MASK_82574 0x01F00000
1372 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1373 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1374 ew32(CTRL_EXT, ctrl_ext);
1375 e1e_flush();
1376}
1377
1378void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1379{
1380 if (adapter->msix_entries) {
1381 pci_disable_msix(adapter->pdev);
1382 kfree(adapter->msix_entries);
1383 adapter->msix_entries = NULL;
1384 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1385 pci_disable_msi(adapter->pdev);
1386 adapter->flags &= ~FLAG_MSI_ENABLED;
1387 }
1388
1389 return;
1390}
1391
1392/**
1393 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1394 *
1395 * Attempt to configure interrupts using the best available
1396 * capabilities of the hardware and kernel.
1397 **/
1398void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1399{
1400 int err;
1401 int numvecs, i;
1402
1403
1404 switch (adapter->int_mode) {
1405 case E1000E_INT_MODE_MSIX:
1406 if (adapter->flags & FLAG_HAS_MSIX) {
1407 numvecs = 3; /* RxQ0, TxQ0 and other */
1408 adapter->msix_entries = kcalloc(numvecs,
1409 sizeof(struct msix_entry),
1410 GFP_KERNEL);
1411 if (adapter->msix_entries) {
1412 for (i = 0; i < numvecs; i++)
1413 adapter->msix_entries[i].entry = i;
1414
1415 err = pci_enable_msix(adapter->pdev,
1416 adapter->msix_entries,
1417 numvecs);
1418 if (err == 0)
1419 return;
1420 }
1421 /* MSI-X failed, so fall through and try MSI */
1422 e_err("Failed to initialize MSI-X interrupts. "
1423 "Falling back to MSI interrupts.\n");
1424 e1000e_reset_interrupt_capability(adapter);
1425 }
1426 adapter->int_mode = E1000E_INT_MODE_MSI;
1427 /* Fall through */
1428 case E1000E_INT_MODE_MSI:
1429 if (!pci_enable_msi(adapter->pdev)) {
1430 adapter->flags |= FLAG_MSI_ENABLED;
1431 } else {
1432 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1433 e_err("Failed to initialize MSI interrupts. Falling "
1434 "back to legacy interrupts.\n");
1435 }
1436 /* Fall through */
1437 case E1000E_INT_MODE_LEGACY:
1438 /* Don't do anything; this is the system default */
1439 break;
1440 }
1441
1442 return;
1443}
1444
1445/**
1446 * e1000_request_msix - Initialize MSI-X interrupts
1447 *
1448 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1449 * kernel.
1450 **/
1451static int e1000_request_msix(struct e1000_adapter *adapter)
1452{
1453 struct net_device *netdev = adapter->netdev;
1454 int err = 0, vector = 0;
1455
1456 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1457 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1458 else
1459 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1460 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1461 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1462 netdev);
1463 if (err)
1464 goto out;
1465 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1466 adapter->rx_ring->itr_val = adapter->itr;
1467 vector++;
1468
1469 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1470 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1471 else
1472 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1473 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1474 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1475 netdev);
1476 if (err)
1477 goto out;
1478 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1479 adapter->tx_ring->itr_val = adapter->itr;
1480 vector++;
1481
1482 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1483 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1484 if (err)
1485 goto out;
1486
1487 e1000_configure_msix(adapter);
1488 return 0;
1489out:
1490 return err;
1491}
1492
f8d59f78
BA		 1493/**
1494 * e1000_request_irq - initialize interrupts
1495 *
1496 * Attempts to configure interrupts using the best available
1497 * capabilities of the hardware and kernel.
1498 **/
bc7f75fa
AK		 1499static int e1000_request_irq(struct e1000_adapter *adapter)
1500{
1501 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1502 int err;
1503
4662e82b
BA		 1504 if (adapter->msix_entries) {
1505 err = e1000_request_msix(adapter);
1506 if (!err)
1507 return err;
1508 /* fall back to MSI */
1509 e1000e_reset_interrupt_capability(adapter);
1510 adapter->int_mode = E1000E_INT_MODE_MSI;
1511 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1512 }
4662e82b 1513 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1514 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1515 netdev->name, netdev);
1516 if (!err)
1517 return err;
bc7f75fa 1518
4662e82b
BA		 1519 /* fall back to legacy interrupt */
1520 e1000e_reset_interrupt_capability(adapter);
1521 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1522 }
1523
a0607fd3 1524 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1525 netdev->name, netdev);
1526 if (err)
1527 e_err("Unable to allocate interrupt, Error: %d\n", err);
1528
bc7f75fa
AK		 1529 return err;
1530}
1531
1532static void e1000_free_irq(struct e1000_adapter *adapter)
1533{
1534 struct net_device *netdev = adapter->netdev;
1535
4662e82b
BA		 1536 if (adapter->msix_entries) {
1537 int vector = 0;
1538
1539 free_irq(adapter->msix_entries[vector].vector, netdev);
1540 vector++;
1541
1542 free_irq(adapter->msix_entries[vector].vector, netdev);
1543 vector++;
1544
1545 /* Other Causes interrupt vector */
1546 free_irq(adapter->msix_entries[vector].vector, netdev);
1547 return;
bc7f75fa 1548 }
4662e82b
BA		 1549
1550 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1551}
1552
1553/**
1554 * e1000_irq_disable - Mask off interrupt generation on the NIC
1555 **/
1556static void e1000_irq_disable(struct e1000_adapter *adapter)
1557{
1558 struct e1000_hw *hw = &adapter->hw;
1559
bc7f75fa 1560 ew32(IMC, ~0);
4662e82b
BA		 1561 if (adapter->msix_entries)
1562 ew32(EIAC_82574, 0);
bc7f75fa
AK		 1563 e1e_flush();
1564 synchronize_irq(adapter->pdev->irq);
1565}
1566
1567/**
1568 * e1000_irq_enable - Enable default interrupt generation settings
1569 **/
1570static void e1000_irq_enable(struct e1000_adapter *adapter)
1571{
1572 struct e1000_hw *hw = &adapter->hw;
1573
4662e82b
BA		 1574 if (adapter->msix_entries) {
1575 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1576 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1577 } else {
1578 ew32(IMS, IMS_ENABLE_MASK);
1579 }
74ef9c39 1580 e1e_flush();
bc7f75fa
AK		 1581}
1582
1583/**
1584 * e1000_get_hw_control - get control of the h/w from f/w
1585 * @adapter: address of board private structure
1586 *
489815ce 1587 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1588 * For ASF and Pass Through versions of f/w this means that
1589 * the driver is loaded. For AMT version (only with 82573)
1590 * of the f/w this means that the network i/f is open.
1591 **/
1592static void e1000_get_hw_control(struct e1000_adapter *adapter)
1593{
1594 struct e1000_hw *hw = &adapter->hw;
1595 u32 ctrl_ext;
1596 u32 swsm;
1597
1598 /* Let firmware know the driver has taken over */
1599 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1600 swsm = er32(SWSM);
1601 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1602 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1603 ctrl_ext = er32(CTRL_EXT);
ad68076e 1604 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1605 }
1606}
1607
1608/**
1609 * e1000_release_hw_control - release control of the h/w to f/w
1610 * @adapter: address of board private structure
1611 *
489815ce 1612 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1613 * For ASF and Pass Through versions of f/w this means that the
1614 * driver is no longer loaded. For AMT version (only with 82573) i
1615 * of the f/w this means that the network i/f is closed.
1616 *
1617 **/
1618static void e1000_release_hw_control(struct e1000_adapter *adapter)
1619{
1620 struct e1000_hw *hw = &adapter->hw;
1621 u32 ctrl_ext;
1622 u32 swsm;
1623
1624 /* Let firmware taken over control of h/w */
1625 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1626 swsm = er32(SWSM);
1627 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1628 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1629 ctrl_ext = er32(CTRL_EXT);
ad68076e 1630 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1631 }
1632}
1633
bc7f75fa
AK		 1634/**
1635 * @e1000_alloc_ring - allocate memory for a ring structure
1636 **/
1637static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1638 struct e1000_ring *ring)
1639{
1640 struct pci_dev *pdev = adapter->pdev;
1641
1642 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1643 GFP_KERNEL);
1644 if (!ring->desc)
1645 return -ENOMEM;
1646
1647 return 0;
1648}
1649
1650/**
1651 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1652 * @adapter: board private structure
1653 *
1654 * Return 0 on success, negative on failure
1655 **/
1656int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1657{
1658 struct e1000_ring *tx_ring = adapter->tx_ring;
1659 int err = -ENOMEM, size;
1660
1661 size = sizeof(struct e1000_buffer) * tx_ring->count;
1662 tx_ring->buffer_info = vmalloc(size);
1663 if (!tx_ring->buffer_info)
1664 goto err;
1665 memset(tx_ring->buffer_info, 0, size);
1666
1667 /* round up to nearest 4K */
1668 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1669 tx_ring->size = ALIGN(tx_ring->size, 4096);
1670
1671 err = e1000_alloc_ring_dma(adapter, tx_ring);
1672 if (err)
1673 goto err;
1674
1675 tx_ring->next_to_use = 0;
1676 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 1677
1678 return 0;
1679err:
1680 vfree(tx_ring->buffer_info);
44defeb3 1681 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1682 return err;
1683}
1684
1685/**
1686 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1687 * @adapter: board private structure
1688 *
1689 * Returns 0 on success, negative on failure
1690 **/
1691int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1692{
1693 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 1694 struct e1000_buffer *buffer_info;
1695 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 1696
1697 size = sizeof(struct e1000_buffer) * rx_ring->count;
1698 rx_ring->buffer_info = vmalloc(size);
1699 if (!rx_ring->buffer_info)
1700 goto err;
1701 memset(rx_ring->buffer_info, 0, size);
1702
47f44e40
AK		 1703 for (i = 0; i < rx_ring->count; i++) {
1704 buffer_info = &rx_ring->buffer_info[i];
1705 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1706 sizeof(struct e1000_ps_page),
1707 GFP_KERNEL);
1708 if (!buffer_info->ps_pages)
1709 goto err_pages;
1710 }
bc7f75fa
AK		 1711
1712 desc_len = sizeof(union e1000_rx_desc_packet_split);
1713
1714 /* Round up to nearest 4K */
1715 rx_ring->size = rx_ring->count * desc_len;
1716 rx_ring->size = ALIGN(rx_ring->size, 4096);
1717
1718 err = e1000_alloc_ring_dma(adapter, rx_ring);
1719 if (err)
47f44e40 1720 goto err_pages;
bc7f75fa
AK		 1721
1722 rx_ring->next_to_clean = 0;
1723 rx_ring->next_to_use = 0;
1724 rx_ring->rx_skb_top = NULL;
1725
1726 return 0;
47f44e40
AK		 1727
1728err_pages:
1729 for (i = 0; i < rx_ring->count; i++) {
1730 buffer_info = &rx_ring->buffer_info[i];
1731 kfree(buffer_info->ps_pages);
1732 }
bc7f75fa
AK		 1733err:
1734 vfree(rx_ring->buffer_info);
44defeb3 1735 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1736 return err;
1737}
1738
1739/**
1740 * e1000_clean_tx_ring - Free Tx Buffers
1741 * @adapter: board private structure
1742 **/
1743static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1744{
1745 struct e1000_ring *tx_ring = adapter->tx_ring;
1746 struct e1000_buffer *buffer_info;
1747 unsigned long size;
1748 unsigned int i;
1749
1750 for (i = 0; i < tx_ring->count; i++) {
1751 buffer_info = &tx_ring->buffer_info[i];
1752 e1000_put_txbuf(adapter, buffer_info);
1753 }
1754
1755 size = sizeof(struct e1000_buffer) * tx_ring->count;
1756 memset(tx_ring->buffer_info, 0, size);
1757
1758 memset(tx_ring->desc, 0, tx_ring->size);
1759
1760 tx_ring->next_to_use = 0;
1761 tx_ring->next_to_clean = 0;
1762
1763 writel(0, adapter->hw.hw_addr + tx_ring->head);
1764 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1765}
1766
1767/**
1768 * e1000e_free_tx_resources - Free Tx Resources per Queue
1769 * @adapter: board private structure
1770 *
1771 * Free all transmit software resources
1772 **/
1773void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1774{
1775 struct pci_dev *pdev = adapter->pdev;
1776 struct e1000_ring *tx_ring = adapter->tx_ring;
1777
1778 e1000_clean_tx_ring(adapter);
1779
1780 vfree(tx_ring->buffer_info);
1781 tx_ring->buffer_info = NULL;
1782
1783 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1784 tx_ring->dma);
1785 tx_ring->desc = NULL;
1786}
1787
1788/**
1789 * e1000e_free_rx_resources - Free Rx Resources
1790 * @adapter: board private structure
1791 *
1792 * Free all receive software resources
1793 **/
1794
1795void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1796{
1797 struct pci_dev *pdev = adapter->pdev;
1798 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1799 int i;
bc7f75fa
AK		 1800
1801 e1000_clean_rx_ring(adapter);
1802
47f44e40
AK		 1803 for (i = 0; i < rx_ring->count; i++) {
1804 kfree(rx_ring->buffer_info[i].ps_pages);
1805 }
1806
bc7f75fa
AK		 1807 vfree(rx_ring->buffer_info);
1808 rx_ring->buffer_info = NULL;
1809
bc7f75fa
AK		 1810 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1811 rx_ring->dma);
1812 rx_ring->desc = NULL;
1813}
1814
1815/**
1816 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 1817 * @adapter: pointer to adapter
1818 * @itr_setting: current adapter->itr
1819 * @packets: the number of packets during this measurement interval
1820 * @bytes: the number of bytes during this measurement interval
1821 *
bc7f75fa
AK		 1822 * Stores a new ITR value based on packets and byte
1823 * counts during the last interrupt. The advantage of per interrupt
1824 * computation is faster updates and more accurate ITR for the current
1825 * traffic pattern. Constants in this function were computed
1826 * based on theoretical maximum wire speed and thresholds were set based
1827 * on testing data as well as attempting to minimize response time
4662e82b
BA		 1828 * while increasing bulk throughput. This functionality is controlled
1829 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 1830 **/
1831static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1832 u16 itr_setting, int packets,
1833 int bytes)
1834{
1835 unsigned int retval = itr_setting;
1836
1837 if (packets == 0)
1838 goto update_itr_done;
1839
1840 switch (itr_setting) {
1841 case lowest_latency:
1842 /* handle TSO and jumbo frames */
1843 if (bytes/packets > 8000)
1844 retval = bulk_latency;
1845 else if ((packets < 5) && (bytes > 512)) {
1846 retval = low_latency;
1847 }
1848 break;
1849 case low_latency: /* 50 usec aka 20000 ints/s */
1850 if (bytes > 10000) {
1851 /* this if handles the TSO accounting */
1852 if (bytes/packets > 8000) {
1853 retval = bulk_latency;
1854 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1855 retval = bulk_latency;
1856 } else if ((packets > 35)) {
1857 retval = lowest_latency;
1858 }
1859 } else if (bytes/packets > 2000) {
1860 retval = bulk_latency;
1861 } else if (packets <= 2 && bytes < 512) {
1862 retval = lowest_latency;
1863 }
1864 break;
1865 case bulk_latency: /* 250 usec aka 4000 ints/s */
1866 if (bytes > 25000) {
1867 if (packets > 35) {
1868 retval = low_latency;
1869 }
1870 } else if (bytes < 6000) {
1871 retval = low_latency;
1872 }
1873 break;
1874 }
1875
1876update_itr_done:
1877 return retval;
1878}
1879
1880static void e1000_set_itr(struct e1000_adapter *adapter)
1881{
1882 struct e1000_hw *hw = &adapter->hw;
1883 u16 current_itr;
1884 u32 new_itr = adapter->itr;
1885
1886 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1887 if (adapter->link_speed != SPEED_1000) {
1888 current_itr = 0;
1889 new_itr = 4000;
1890 goto set_itr_now;
1891 }
1892
1893 adapter->tx_itr = e1000_update_itr(adapter,
1894 adapter->tx_itr,
1895 adapter->total_tx_packets,
1896 adapter->total_tx_bytes);
1897 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1898 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1899 adapter->tx_itr = low_latency;
1900
1901 adapter->rx_itr = e1000_update_itr(adapter,
1902 adapter->rx_itr,
1903 adapter->total_rx_packets,
1904 adapter->total_rx_bytes);
1905 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1906 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1907 adapter->rx_itr = low_latency;
1908
1909 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1910
1911 switch (current_itr) {
1912 /* counts and packets in update_itr are dependent on these numbers */
1913 case lowest_latency:
1914 new_itr = 70000;
1915 break;
1916 case low_latency:
1917 new_itr = 20000; /* aka hwitr = ~200 */
1918 break;
1919 case bulk_latency:
1920 new_itr = 4000;
1921 break;
1922 default:
1923 break;
1924 }
1925
1926set_itr_now:
1927 if (new_itr != adapter->itr) {
ad68076e
BA		 1928 /*
1929 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1930 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 1931 * increasing
1932 */
bc7f75fa
AK		 1933 new_itr = new_itr > adapter->itr ?
1934 min(adapter->itr + (new_itr >> 2), new_itr) :
1935 new_itr;
1936 adapter->itr = new_itr;
4662e82b
BA		 1937 adapter->rx_ring->itr_val = new_itr;
1938 if (adapter->msix_entries)
1939 adapter->rx_ring->set_itr = 1;
1940 else
1941 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 1942 }
1943}
1944
4662e82b
BA		 1945/**
1946 * e1000_alloc_queues - Allocate memory for all rings
1947 * @adapter: board private structure to initialize
1948 **/
1949static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1950{
1951 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1952 if (!adapter->tx_ring)
1953 goto err;
1954
1955 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1956 if (!adapter->rx_ring)
1957 goto err;
1958
1959 return 0;
1960err:
1961 e_err("Unable to allocate memory for queues\n");
1962 kfree(adapter->rx_ring);
1963 kfree(adapter->tx_ring);
1964 return -ENOMEM;
1965}
1966
bc7f75fa
AK		 1967/**
1968 * e1000_clean - NAPI Rx polling callback
ad68076e 1969 * @napi: struct associated with this polling callback
489815ce 1970 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 1971 **/
1972static int e1000_clean(struct napi_struct *napi, int budget)
1973{
1974 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 1975 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1976 struct net_device *poll_dev = adapter->netdev;
679e8a0f 1977 int tx_cleaned = 1, work_done = 0;
bc7f75fa 1978
4cf1653a 1979 adapter = netdev_priv(poll_dev);
bc7f75fa 1980
4662e82b
BA		 1981 if (adapter->msix_entries &&
1982 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
1983 goto clean_rx;
1984
92af3e95 1985 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 1986
4662e82b 1987clean_rx:
bc7f75fa 1988 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 1989
12d04a3c 1990 if (!tx_cleaned)
d2c7ddd6 1991 work_done = budget;
bc7f75fa 1992
53e52c72
DM		 1993 /* If budget not fully consumed, exit the polling mode */
1994 if (work_done < budget) {
bc7f75fa
AK		 1995 if (adapter->itr_setting & 3)
1996 e1000_set_itr(adapter);
288379f0 1997 napi_complete(napi);
a3c69fef
JB		 1998 if (!test_bit(__E1000_DOWN, &adapter->state)) {
1999 if (adapter->msix_entries)
2000 ew32(IMS, adapter->rx_ring->ims_val);
2001 else
2002 e1000_irq_enable(adapter);
2003 }
bc7f75fa
AK		 2004 }
2005
2006 return work_done;
2007}
2008
2009static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2010{
2011 struct e1000_adapter *adapter = netdev_priv(netdev);
2012 struct e1000_hw *hw = &adapter->hw;
2013 u32 vfta, index;
2014
2015 /* don't update vlan cookie if already programmed */
2016 if ((adapter->hw.mng_cookie.status &
2017 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2018 (vid == adapter->mng_vlan_id))
2019 return;
2020 /* add VID to filter table */
2021 index = (vid >> 5) & 0x7F;
2022 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2023 vfta |= (1 << (vid & 0x1F));
2024 e1000e_write_vfta(hw, index, vfta);
2025}
2026
2027static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2028{
2029 struct e1000_adapter *adapter = netdev_priv(netdev);
2030 struct e1000_hw *hw = &adapter->hw;
2031 u32 vfta, index;
2032
74ef9c39
JB		 2033 if (!test_bit(__E1000_DOWN, &adapter->state))
2034 e1000_irq_disable(adapter);
bc7f75fa 2035 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2036
2037 if (!test_bit(__E1000_DOWN, &adapter->state))
2038 e1000_irq_enable(adapter);
bc7f75fa
AK		 2039
2040 if ((adapter->hw.mng_cookie.status &
2041 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2042 (vid == adapter->mng_vlan_id)) {
2043 /* release control to f/w */
2044 e1000_release_hw_control(adapter);
2045 return;
2046 }
2047
2048 /* remove VID from filter table */
2049 index = (vid >> 5) & 0x7F;
2050 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2051 vfta &= ~(1 << (vid & 0x1F));
2052 e1000e_write_vfta(hw, index, vfta);
2053}
2054
2055static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2056{
2057 struct net_device *netdev = adapter->netdev;
2058 u16 vid = adapter->hw.mng_cookie.vlan_id;
2059 u16 old_vid = adapter->mng_vlan_id;
2060
2061 if (!adapter->vlgrp)
2062 return;
2063
2064 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2065 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2066 if (adapter->hw.mng_cookie.status &
2067 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2068 e1000_vlan_rx_add_vid(netdev, vid);
2069 adapter->mng_vlan_id = vid;
2070 }
2071
2072 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2073 (vid != old_vid) &&
2074 !vlan_group_get_device(adapter->vlgrp, old_vid))
2075 e1000_vlan_rx_kill_vid(netdev, old_vid);
2076 } else {
2077 adapter->mng_vlan_id = vid;
2078 }
2079}
2080
2081
2082static void e1000_vlan_rx_register(struct net_device *netdev,
2083 struct vlan_group *grp)
2084{
2085 struct e1000_adapter *adapter = netdev_priv(netdev);
2086 struct e1000_hw *hw = &adapter->hw;
2087 u32 ctrl, rctl;
2088
74ef9c39
JB		 2089 if (!test_bit(__E1000_DOWN, &adapter->state))
2090 e1000_irq_disable(adapter);
bc7f75fa
AK		 2091 adapter->vlgrp = grp;
2092
2093 if (grp) {
2094 /* enable VLAN tag insert/strip */
2095 ctrl = er32(CTRL);
2096 ctrl |= E1000_CTRL_VME;
2097 ew32(CTRL, ctrl);
2098
2099 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2100 /* enable VLAN receive filtering */
2101 rctl = er32(RCTL);
bc7f75fa
AK		 2102 rctl &= ~E1000_RCTL_CFIEN;
2103 ew32(RCTL, rctl);
2104 e1000_update_mng_vlan(adapter);
2105 }
2106 } else {
2107 /* disable VLAN tag insert/strip */
2108 ctrl = er32(CTRL);
2109 ctrl &= ~E1000_CTRL_VME;
2110 ew32(CTRL, ctrl);
2111
2112 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2113 if (adapter->mng_vlan_id !=
2114 (u16)E1000_MNG_VLAN_NONE) {
2115 e1000_vlan_rx_kill_vid(netdev,
2116 adapter->mng_vlan_id);
2117 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2118 }
2119 }
2120 }
2121
74ef9c39
JB		 2122 if (!test_bit(__E1000_DOWN, &adapter->state))
2123 e1000_irq_enable(adapter);
bc7f75fa
AK		 2124}
2125
2126static void e1000_restore_vlan(struct e1000_adapter *adapter)
2127{
2128 u16 vid;
2129
2130 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2131
2132 if (!adapter->vlgrp)
2133 return;
2134
2135 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2136 if (!vlan_group_get_device(adapter->vlgrp, vid))
2137 continue;
2138 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2139 }
2140}
2141
2142static void e1000_init_manageability(struct e1000_adapter *adapter)
2143{
2144 struct e1000_hw *hw = &adapter->hw;
2145 u32 manc, manc2h;
2146
2147 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2148 return;
2149
2150 manc = er32(MANC);
2151
ad68076e
BA		 2152 /*
2153 * enable receiving management packets to the host. this will probably
bc7f75fa 2154 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2155 * the packets will be handled on SMBUS
2156 */
bc7f75fa
AK		 2157 manc |= E1000_MANC_EN_MNG2HOST;
2158 manc2h = er32(MANC2H);
2159#define E1000_MNG2HOST_PORT_623 (1 << 5)
2160#define E1000_MNG2HOST_PORT_664 (1 << 6)
2161 manc2h |= E1000_MNG2HOST_PORT_623;
2162 manc2h |= E1000_MNG2HOST_PORT_664;
2163 ew32(MANC2H, manc2h);
2164 ew32(MANC, manc);
2165}
2166
2167/**
2168 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2169 * @adapter: board private structure
2170 *
2171 * Configure the Tx unit of the MAC after a reset.
2172 **/
2173static void e1000_configure_tx(struct e1000_adapter *adapter)
2174{
2175 struct e1000_hw *hw = &adapter->hw;
2176 struct e1000_ring *tx_ring = adapter->tx_ring;
2177 u64 tdba;
2178 u32 tdlen, tctl, tipg, tarc;
2179 u32 ipgr1, ipgr2;
2180
2181 /* Setup the HW Tx Head and Tail descriptor pointers */
2182 tdba = tx_ring->dma;
2183 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2184 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2185 ew32(TDBAH, (tdba >> 32));
2186 ew32(TDLEN, tdlen);
2187 ew32(TDH, 0);
2188 ew32(TDT, 0);
2189 tx_ring->head = E1000_TDH;
2190 tx_ring->tail = E1000_TDT;
2191
2192 /* Set the default values for the Tx Inter Packet Gap timer */
2193 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2194 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2195 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2196
2197 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2198 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2199
2200 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2201 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2202 ew32(TIPG, tipg);
2203
2204 /* Set the Tx Interrupt Delay register */
2205 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2206 /* Tx irq moderation */
bc7f75fa
AK		 2207 ew32(TADV, adapter->tx_abs_int_delay);
2208
2209 /* Program the Transmit Control Register */
2210 tctl = er32(TCTL);
2211 tctl &= ~E1000_TCTL_CT;
2212 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2213 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2214
2215 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2216 tarc = er32(TARC(0));
ad68076e
BA		 2217 /*
2218 * set the speed mode bit, we'll clear it if we're not at
2219 * gigabit link later
2220 */
bc7f75fa
AK		 2221#define SPEED_MODE_BIT (1 << 21)
2222 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2223 ew32(TARC(0), tarc);
bc7f75fa
AK		 2224 }
2225
2226 /* errata: program both queues to unweighted RR */
2227 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2228 tarc = er32(TARC(0));
bc7f75fa 2229 tarc |= 1;
e9ec2c0f
JK		 2230 ew32(TARC(0), tarc);
2231 tarc = er32(TARC(1));
bc7f75fa 2232 tarc |= 1;
e9ec2c0f 2233 ew32(TARC(1), tarc);
bc7f75fa
AK		 2234 }
2235
bc7f75fa
AK		 2236 /* Setup Transmit Descriptor Settings for eop descriptor */
2237 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2238
2239 /* only set IDE if we are delaying interrupts using the timers */
2240 if (adapter->tx_int_delay)
2241 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2242
2243 /* enable Report Status bit */
2244 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2245
2246 ew32(TCTL, tctl);
2247
edfea6e6
SH		 2248 e1000e_config_collision_dist(hw);
2249
bc7f75fa
AK		 2250 adapter->tx_queue_len = adapter->netdev->tx_queue_len;
2251}
2252
2253/**
2254 * e1000_setup_rctl - configure the receive control registers
2255 * @adapter: Board private structure
2256 **/
2257#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2258 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2259static void e1000_setup_rctl(struct e1000_adapter *adapter)
2260{
2261 struct e1000_hw *hw = &adapter->hw;
2262 u32 rctl, rfctl;
2263 u32 psrctl = 0;
2264 u32 pages = 0;
2265
2266 /* Program MC offset vector base */
2267 rctl = er32(RCTL);
2268 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2269 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2270 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2271 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2272
2273 /* Do not Store bad packets */
2274 rctl &= ~E1000_RCTL_SBP;
2275
2276 /* Enable Long Packet receive */
2277 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2278 rctl &= ~E1000_RCTL_LPE;
2279 else
2280 rctl |= E1000_RCTL_LPE;
2281
eb7c3adb
JK		 2282 /* Some systems expect that the CRC is included in SMBUS traffic. The
2283 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2284 * host memory when this is enabled
2285 */
2286 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2287 rctl |= E1000_RCTL_SECRC;
5918bd88 2288
a4f58f54
BA		 2289 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2290 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2291 u16 phy_data;
2292
2293 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2294 phy_data &= 0xfff8;
2295 phy_data |= (1 << 2);
2296 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2297
2298 e1e_rphy(hw, 22, &phy_data);
2299 phy_data &= 0x0fff;
2300 phy_data |= (1 << 14);
2301 e1e_wphy(hw, 0x10, 0x2823);
2302 e1e_wphy(hw, 0x11, 0x0003);
2303 e1e_wphy(hw, 22, phy_data);
2304 }
2305
bc7f75fa
AK		 2306 /* Setup buffer sizes */
2307 rctl &= ~E1000_RCTL_SZ_4096;
2308 rctl |= E1000_RCTL_BSEX;
2309 switch (adapter->rx_buffer_len) {
2310 case 256:
2311 rctl |= E1000_RCTL_SZ_256;
2312 rctl &= ~E1000_RCTL_BSEX;
2313 break;
2314 case 512:
2315 rctl |= E1000_RCTL_SZ_512;
2316 rctl &= ~E1000_RCTL_BSEX;
2317 break;
2318 case 1024:
2319 rctl |= E1000_RCTL_SZ_1024;
2320 rctl &= ~E1000_RCTL_BSEX;
2321 break;
2322 case 2048:
2323 default:
2324 rctl |= E1000_RCTL_SZ_2048;
2325 rctl &= ~E1000_RCTL_BSEX;
2326 break;
2327 case 4096:
2328 rctl |= E1000_RCTL_SZ_4096;
2329 break;
2330 case 8192:
2331 rctl |= E1000_RCTL_SZ_8192;
2332 break;
2333 case 16384:
2334 rctl |= E1000_RCTL_SZ_16384;
2335 break;
2336 }
2337
2338 /*
2339 * 82571 and greater support packet-split where the protocol
2340 * header is placed in skb->data and the packet data is
2341 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2342 * In the case of a non-split, skb->data is linearly filled,
2343 * followed by the page buffers. Therefore, skb->data is
2344 * sized to hold the largest protocol header.
2345 *
2346 * allocations using alloc_page take too long for regular MTU
2347 * so only enable packet split for jumbo frames
2348 *
2349 * Using pages when the page size is greater than 16k wastes
2350 * a lot of memory, since we allocate 3 pages at all times
2351 * per packet.
2352 */
bc7f75fa 2353 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA		 2354 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2355 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2356 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2357 else
2358 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2359
2360 if (adapter->rx_ps_pages) {
2361 /* Configure extra packet-split registers */
2362 rfctl = er32(RFCTL);
2363 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2364 /*
2365 * disable packet split support for IPv6 extension headers,
2366 * because some malformed IPv6 headers can hang the Rx
2367 */
bc7f75fa
AK		 2368 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2369 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2370
2371 ew32(RFCTL, rfctl);
2372
140a7480
AK		 2373 /* Enable Packet split descriptors */
2374 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2375
2376 psrctl |= adapter->rx_ps_bsize0 >>
2377 E1000_PSRCTL_BSIZE0_SHIFT;
2378
2379 switch (adapter->rx_ps_pages) {
2380 case 3:
2381 psrctl |= PAGE_SIZE <<
2382 E1000_PSRCTL_BSIZE3_SHIFT;
2383 case 2:
2384 psrctl |= PAGE_SIZE <<
2385 E1000_PSRCTL_BSIZE2_SHIFT;
2386 case 1:
2387 psrctl |= PAGE_SIZE >>
2388 E1000_PSRCTL_BSIZE1_SHIFT;
2389 break;
2390 }
2391
2392 ew32(PSRCTL, psrctl);
2393 }
2394
2395 ew32(RCTL, rctl);
318a94d6
JK		 2396 /* just started the receive unit, no need to restart */
2397 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2398}
2399
2400/**
2401 * e1000_configure_rx - Configure Receive Unit after Reset
2402 * @adapter: board private structure
2403 *
2404 * Configure the Rx unit of the MAC after a reset.
2405 **/
2406static void e1000_configure_rx(struct e1000_adapter *adapter)
2407{
2408 struct e1000_hw *hw = &adapter->hw;
2409 struct e1000_ring *rx_ring = adapter->rx_ring;
2410 u64 rdba;
2411 u32 rdlen, rctl, rxcsum, ctrl_ext;
2412
2413 if (adapter->rx_ps_pages) {
2414 /* this is a 32 byte descriptor */
2415 rdlen = rx_ring->count *
2416 sizeof(union e1000_rx_desc_packet_split);
2417 adapter->clean_rx = e1000_clean_rx_irq_ps;
2418 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2419 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2420 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2421 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2422 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2423 } else {
97ac8cae 2424 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2425 adapter->clean_rx = e1000_clean_rx_irq;
2426 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2427 }
2428
2429 /* disable receives while setting up the descriptors */
2430 rctl = er32(RCTL);
2431 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2432 e1e_flush();
2433 msleep(10);
2434
2435 /* set the Receive Delay Timer Register */
2436 ew32(RDTR, adapter->rx_int_delay);
2437
2438 /* irq moderation */
2439 ew32(RADV, adapter->rx_abs_int_delay);
2440 if (adapter->itr_setting != 0)
ad68076e 2441 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2442
2443 ctrl_ext = er32(CTRL_EXT);
2444 /* Reset delay timers after every interrupt */
2445 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
2446 /* Auto-Mask interrupts upon ICR access */
2447 ctrl_ext |= E1000_CTRL_EXT_IAME;
2448 ew32(IAM, 0xffffffff);
2449 ew32(CTRL_EXT, ctrl_ext);
2450 e1e_flush();
2451
ad68076e
BA		 2452 /*
2453 * Setup the HW Rx Head and Tail Descriptor Pointers and
2454 * the Base and Length of the Rx Descriptor Ring
2455 */
bc7f75fa 2456 rdba = rx_ring->dma;
284901a9 2457 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2458 ew32(RDBAH, (rdba >> 32));
2459 ew32(RDLEN, rdlen);
2460 ew32(RDH, 0);
2461 ew32(RDT, 0);
2462 rx_ring->head = E1000_RDH;
2463 rx_ring->tail = E1000_RDT;
2464
2465 /* Enable Receive Checksum Offload for TCP and UDP */
2466 rxcsum = er32(RXCSUM);
2467 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2468 rxcsum |= E1000_RXCSUM_TUOFL;
2469
ad68076e
BA		 2470 /*
2471 * IPv4 payload checksum for UDP fragments must be
2472 * used in conjunction with packet-split.
2473 */
bc7f75fa
AK		 2474 if (adapter->rx_ps_pages)
2475 rxcsum |= E1000_RXCSUM_IPPCSE;
2476 } else {
2477 rxcsum &= ~E1000_RXCSUM_TUOFL;
2478 /* no need to clear IPPCSE as it defaults to 0 */
2479 }
2480 ew32(RXCSUM, rxcsum);
2481
ad68076e
BA		 2482 /*
2483 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2484 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2485 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2486 */
bc7f75fa 2487 if ((adapter->flags & FLAG_HAS_ERT) &&
97ac8cae
BA		 2488 (adapter->netdev->mtu > ETH_DATA_LEN)) {
2489 u32 rxdctl = er32(RXDCTL(0));
2490 ew32(RXDCTL(0), rxdctl | 0x3);
2491 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2492 /*
2493 * With jumbo frames and early-receive enabled, excessive
2494 * C4->C2 latencies result in dropped transactions.
2495 */
2496 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2497 e1000e_driver_name, 55);
2498 } else {
2499 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2500 e1000e_driver_name,
2501 PM_QOS_DEFAULT_VALUE);
2502 }
bc7f75fa
AK		 2503
2504 /* Enable Receives */
2505 ew32(RCTL, rctl);
2506}
2507
2508/**
e2de3eb6 2509 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2510 * @hw: pointer to the HW structure
2511 * @mc_addr_list: array of multicast addresses to program
2512 * @mc_addr_count: number of multicast addresses to program
2513 * @rar_used_count: the first RAR register free to program
2514 * @rar_count: total number of supported Receive Address Registers
2515 *
2516 * Updates the Receive Address Registers and Multicast Table Array.
2517 * The caller must have a packed mc_addr_list of multicast addresses.
2518 * The parameter rar_count will usually be hw->mac.rar_entry_count
2519 * unless there are workarounds that change this. Currently no func pointer
2520 * exists and all implementations are handled in the generic version of this
2521 * function.
2522 **/
e2de3eb6
JK		 2523static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
2524 u32 mc_addr_count, u32 rar_used_count,
2525 u32 rar_count)
bc7f75fa 2526{
e2de3eb6 2527 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count,
bc7f75fa
AK		 2528 rar_used_count, rar_count);
2529}
2530
2531/**
2532 * e1000_set_multi - Multicast and Promiscuous mode set
2533 * @netdev: network interface device structure
2534 *
2535 * The set_multi entry point is called whenever the multicast address
2536 * list or the network interface flags are updated. This routine is
2537 * responsible for configuring the hardware for proper multicast,
2538 * promiscuous mode, and all-multi behavior.
2539 **/
2540static void e1000_set_multi(struct net_device *netdev)
2541{
2542 struct e1000_adapter *adapter = netdev_priv(netdev);
2543 struct e1000_hw *hw = &adapter->hw;
2544 struct e1000_mac_info *mac = &hw->mac;
2545 struct dev_mc_list *mc_ptr;
2546 u8 *mta_list;
2547 u32 rctl;
2548 int i;
2549
2550 /* Check for Promiscuous and All Multicast modes */
2551
2552 rctl = er32(RCTL);
2553
2554 if (netdev->flags & IFF_PROMISC) {
2555 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2556 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2557 } else {
746b9f02
PM		 2558 if (netdev->flags & IFF_ALLMULTI) {
2559 rctl |= E1000_RCTL_MPE;
2560 rctl &= ~E1000_RCTL_UPE;
2561 } else {
2562 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2563 }
78ed11a5 2564 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2565 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2566 }
2567
2568 ew32(RCTL, rctl);
2569
2570 if (netdev->mc_count) {
2571 mta_list = kmalloc(netdev->mc_count * 6, GFP_ATOMIC);
2572 if (!mta_list)
2573 return;
2574
2575 /* prepare a packed array of only addresses. */
2576 mc_ptr = netdev->mc_list;
2577
2578 for (i = 0; i < netdev->mc_count; i++) {
2579 if (!mc_ptr)
2580 break;
2581 memcpy(mta_list + (i*ETH_ALEN), mc_ptr->dmi_addr,
2582 ETH_ALEN);
2583 mc_ptr = mc_ptr->next;
2584 }
2585
e2de3eb6 2586 e1000_update_mc_addr_list(hw, mta_list, i, 1,
bc7f75fa
AK		 2587 mac->rar_entry_count);
2588 kfree(mta_list);
2589 } else {
2590 /*
2591 * if we're called from probe, we might not have
2592 * anything to do here, so clear out the list
2593 */
e2de3eb6 2594 e1000_update_mc_addr_list(hw, NULL, 0, 1, mac->rar_entry_count);
bc7f75fa
AK		 2595 }
2596}
2597
2598/**
ad68076e 2599 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 2600 * @adapter: private board structure
2601 **/
2602static void e1000_configure(struct e1000_adapter *adapter)
2603{
2604 e1000_set_multi(adapter->netdev);
2605
2606 e1000_restore_vlan(adapter);
2607 e1000_init_manageability(adapter);
2608
2609 e1000_configure_tx(adapter);
2610 e1000_setup_rctl(adapter);
2611 e1000_configure_rx(adapter);
ad68076e 2612 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 2613}
2614
2615/**
2616 * e1000e_power_up_phy - restore link in case the phy was powered down
2617 * @adapter: address of board private structure
2618 *
2619 * The phy may be powered down to save power and turn off link when the
2620 * driver is unloaded and wake on lan is not enabled (among others)
2621 * *** this routine MUST be followed by a call to e1000e_reset ***
2622 **/
2623void e1000e_power_up_phy(struct e1000_adapter *adapter)
2624{
2625 u16 mii_reg = 0;
2626
2627 /* Just clear the power down bit to wake the phy back up */
318a94d6 2628 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
ad68076e
BA		 2629 /*
2630 * According to the manual, the phy will retain its
2631 * settings across a power-down/up cycle
2632 */
bc7f75fa
AK		 2633 e1e_rphy(&adapter->hw, PHY_CONTROL, &mii_reg);
2634 mii_reg &= ~MII_CR_POWER_DOWN;
2635 e1e_wphy(&adapter->hw, PHY_CONTROL, mii_reg);
2636 }
2637
2638 adapter->hw.mac.ops.setup_link(&adapter->hw);
2639}
2640
2641/**
2642 * e1000_power_down_phy - Power down the PHY
2643 *
2644 * Power down the PHY so no link is implied when interface is down
2645 * The PHY cannot be powered down is management or WoL is active
2646 */
2647static void e1000_power_down_phy(struct e1000_adapter *adapter)
2648{
2649 struct e1000_hw *hw = &adapter->hw;
2650 u16 mii_reg;
2651
2652 /* WoL is enabled */
23b66e2b 2653 if (adapter->wol)
bc7f75fa
AK		 2654 return;
2655
2656 /* non-copper PHY? */
318a94d6 2657 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 2658 return;
2659
2660 /* reset is blocked because of a SoL/IDER session */
ad68076e 2661 if (e1000e_check_mng_mode(hw) || e1000_check_reset_block(hw))
bc7f75fa
AK		 2662 return;
2663
489815ce 2664 /* manageability (AMT) is enabled */
bc7f75fa
AK		 2665 if (er32(MANC) & E1000_MANC_SMBUS_EN)
2666 return;
2667
2668 /* power down the PHY */
2669 e1e_rphy(hw, PHY_CONTROL, &mii_reg);
2670 mii_reg |= MII_CR_POWER_DOWN;
2671 e1e_wphy(hw, PHY_CONTROL, mii_reg);
2672 mdelay(1);
2673}
2674
2675/**
2676 * e1000e_reset - bring the hardware into a known good state
2677 *
2678 * This function boots the hardware and enables some settings that
2679 * require a configuration cycle of the hardware - those cannot be
2680 * set/changed during runtime. After reset the device needs to be
ad68076e 2681 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 2682 */
2683void e1000e_reset(struct e1000_adapter *adapter)
2684{
2685 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2686 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 2687 struct e1000_hw *hw = &adapter->hw;
2688 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2689 u32 pba = adapter->pba;
bc7f75fa
AK		 2690 u16 hwm;
2691
ad68076e 2692 /* reset Packet Buffer Allocation to default */
318a94d6 2693 ew32(PBA, pba);
df762464 2694
318a94d6 2695 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 2696 /*
2697 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 2698 * large enough to accommodate two full transmit packets,
2699 * rounded up to the next 1KB and expressed in KB. Likewise,
2700 * the Rx FIFO should be large enough to accommodate at least
2701 * one full receive packet and is similarly rounded up and
ad68076e
BA		 2702 * expressed in KB.
2703 */
df762464 2704 pba = er32(PBA);
bc7f75fa 2705 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2706 tx_space = pba >> 16;
bc7f75fa 2707 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2708 pba &= 0xffff;
ad68076e
BA		 2709 /*
2710 * the Tx fifo also stores 16 bytes of information about the tx
2711 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 2712 */
2713 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 2714 sizeof(struct e1000_tx_desc) -
2715 ETH_FCS_LEN) * 2;
2716 min_tx_space = ALIGN(min_tx_space, 1024);
2717 min_tx_space >>= 10;
2718 /* software strips receive CRC, so leave room for it */
318a94d6 2719 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 2720 min_rx_space = ALIGN(min_rx_space, 1024);
2721 min_rx_space >>= 10;
2722
ad68076e
BA		 2723 /*
2724 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2725 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 2726 * allocation, take space away from current Rx allocation
2727 */
df762464
AK		 2728 if ((tx_space < min_tx_space) &&
2729 ((min_tx_space - tx_space) < pba)) {
2730 pba -= min_tx_space - tx_space;
bc7f75fa 2731
ad68076e
BA		 2732 /*
2733 * if short on Rx space, Rx wins and must trump tx
2734 * adjustment or use Early Receive if available
2735 */
df762464 2736 if ((pba < min_rx_space) &&
bc7f75fa
AK		 2737 (!(adapter->flags & FLAG_HAS_ERT)))
2738 /* ERT enabled in e1000_configure_rx */
df762464 2739 pba = min_rx_space;
bc7f75fa 2740 }
df762464
AK		 2741
2742 ew32(PBA, pba);
bc7f75fa
AK		 2743 }
2744
bc7f75fa 2745
ad68076e
BA		 2746 /*
2747 * flow control settings
2748 *
3ec2a2b8 2749 * The high water mark must be low enough to fit two full frame
bc7f75fa
AK		 2750 * (or the size used for early receive) above it in the Rx FIFO.
2751 * Set it to the lower of:
2752 * - 90% of the Rx FIFO size, and
2753 * - the full Rx FIFO size minus the early receive size (for parts
2754 * with ERT support assuming ERT set to E1000_ERT_2048), or
3ec2a2b8 2755 * - the full Rx FIFO size minus two full frames
ad68076e 2756 */
3ec2a2b8
BA		 2757 if ((adapter->flags & FLAG_HAS_ERT) &&
2758 (adapter->netdev->mtu > ETH_DATA_LEN))
318a94d6
JK		 2759 hwm = min(((pba << 10) * 9 / 10),
2760 ((pba << 10) - (E1000_ERT_2048 << 3)));
bc7f75fa 2761 else
318a94d6 2762 hwm = min(((pba << 10) * 9 / 10),
3ec2a2b8 2763 ((pba << 10) - (2 * adapter->max_frame_size)));
bc7f75fa 2764
3ec2a2b8
BA		 2765 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
2766 fc->low_water = (fc->high_water - (2 * adapter->max_frame_size));
2767 fc->low_water &= E1000_FCRTL_RTL; /* 8-byte granularity */
bc7f75fa
AK		 2768
2769 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2770 fc->pause_time = 0xFFFF;
bc7f75fa 2771 else
318a94d6
JK		 2772 fc->pause_time = E1000_FC_PAUSE_TIME;
2773 fc->send_xon = 1;
5c48ef3e 2774 fc->current_mode = fc->requested_mode;
bc7f75fa
AK		 2775
2776 /* Allow time for pending master requests to run */
2777 mac->ops.reset_hw(hw);
97ac8cae
BA		 2778
2779 /*
2780 * For parts with AMT enabled, let the firmware know
2781 * that the network interface is in control
2782 */
c43bc57e 2783 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 2784 e1000_get_hw_control(adapter);
2785
bc7f75fa 2786 ew32(WUC, 0);
a4f58f54
BA		 2787 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
2788 e1e_wphy(&adapter->hw, BM_WUC, 0);
bc7f75fa
AK		 2789
2790 if (mac->ops.init_hw(hw))
44defeb3 2791 e_err("Hardware Error\n");
bc7f75fa
AK		 2792
2793 e1000_update_mng_vlan(adapter);
2794
2795 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2796 ew32(VET, ETH_P_8021Q);
2797
2798 e1000e_reset_adaptive(hw);
2799 e1000_get_phy_info(hw);
2800
918d7197
BA		 2801 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
2802 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 2803 u16 phy_data = 0;
ad68076e
BA		 2804 /*
2805 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2806 * the return value of this function because there is nothing
ad68076e
BA		 2807 * different we would do if it failed
2808 */
bc7f75fa
AK		 2809 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2810 phy_data &= ~IGP02E1000_PM_SPD;
2811 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2812 }
bc7f75fa
AK		 2813}
2814
2815int e1000e_up(struct e1000_adapter *adapter)
2816{
2817 struct e1000_hw *hw = &adapter->hw;
2818
2819 /* hardware has been reset, we need to reload some things */
2820 e1000_configure(adapter);
2821
2822 clear_bit(__E1000_DOWN, &adapter->state);
2823
2824 napi_enable(&adapter->napi);
4662e82b
BA		 2825 if (adapter->msix_entries)
2826 e1000_configure_msix(adapter);
bc7f75fa
AK		 2827 e1000_irq_enable(adapter);
2828
4cb9be7a
JB		 2829 netif_wake_queue(adapter->netdev);
2830
bc7f75fa
AK		 2831 /* fire a link change interrupt to start the watchdog */
2832 ew32(ICS, E1000_ICS_LSC);
2833 return 0;
2834}
2835
2836void e1000e_down(struct e1000_adapter *adapter)
2837{
2838 struct net_device *netdev = adapter->netdev;
2839 struct e1000_hw *hw = &adapter->hw;
2840 u32 tctl, rctl;
2841
ad68076e
BA		 2842 /*
2843 * signal that we're down so the interrupt handler does not
2844 * reschedule our watchdog timer
2845 */
bc7f75fa
AK		 2846 set_bit(__E1000_DOWN, &adapter->state);
2847
2848 /* disable receives in the hardware */
2849 rctl = er32(RCTL);
2850 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2851 /* flush and sleep below */
2852
4cb9be7a 2853 netif_stop_queue(netdev);
bc7f75fa
AK		 2854
2855 /* disable transmits in the hardware */
2856 tctl = er32(TCTL);
2857 tctl &= ~E1000_TCTL_EN;
2858 ew32(TCTL, tctl);
2859 /* flush both disables and wait for them to finish */
2860 e1e_flush();
2861 msleep(10);
2862
2863 napi_disable(&adapter->napi);
2864 e1000_irq_disable(adapter);
2865
2866 del_timer_sync(&adapter->watchdog_timer);
2867 del_timer_sync(&adapter->phy_info_timer);
2868
2869 netdev->tx_queue_len = adapter->tx_queue_len;
2870 netif_carrier_off(netdev);
2871 adapter->link_speed = 0;
2872 adapter->link_duplex = 0;
2873
52cc3086
JK		 2874 if (!pci_channel_offline(adapter->pdev))
2875 e1000e_reset(adapter);
bc7f75fa
AK		 2876 e1000_clean_tx_ring(adapter);
2877 e1000_clean_rx_ring(adapter);
2878
2879 /*
2880 * TODO: for power management, we could drop the link and
2881 * pci_disable_device here.
2882 */
2883}
2884
2885void e1000e_reinit_locked(struct e1000_adapter *adapter)
2886{
2887 might_sleep();
2888 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2889 msleep(1);
2890 e1000e_down(adapter);
2891 e1000e_up(adapter);
2892 clear_bit(__E1000_RESETTING, &adapter->state);
2893}
2894
2895/**
2896 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2897 * @adapter: board private structure to initialize
2898 *
2899 * e1000_sw_init initializes the Adapter private data structure.
2900 * Fields are initialized based on PCI device information and
2901 * OS network device settings (MTU size).
2902 **/
2903static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2904{
bc7f75fa
AK		 2905 struct net_device *netdev = adapter->netdev;
2906
2907 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2908 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 2909 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2910 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 2911
4662e82b 2912 e1000e_set_interrupt_capability(adapter);
bc7f75fa 2913
4662e82b
BA		 2914 if (e1000_alloc_queues(adapter))
2915 return -ENOMEM;
bc7f75fa 2916
bc7f75fa 2917 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 2918 e1000_irq_disable(adapter);
2919
bc7f75fa
AK		 2920 set_bit(__E1000_DOWN, &adapter->state);
2921 return 0;
bc7f75fa
AK		 2922}
2923
f8d59f78
BA		 2924/**
2925 * e1000_intr_msi_test - Interrupt Handler
2926 * @irq: interrupt number
2927 * @data: pointer to a network interface device structure
2928 **/
2929static irqreturn_t e1000_intr_msi_test(int irq, void *data)
2930{
2931 struct net_device *netdev = data;
2932 struct e1000_adapter *adapter = netdev_priv(netdev);
2933 struct e1000_hw *hw = &adapter->hw;
2934 u32 icr = er32(ICR);
2935
2936 e_dbg("%s: icr is %08X\n", netdev->name, icr);
2937 if (icr & E1000_ICR_RXSEQ) {
2938 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
2939 wmb();
2940 }
2941
2942 return IRQ_HANDLED;
2943}
2944
2945/**
2946 * e1000_test_msi_interrupt - Returns 0 for successful test
2947 * @adapter: board private struct
2948 *
2949 * code flow taken from tg3.c
2950 **/
2951static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2952{
2953 struct net_device *netdev = adapter->netdev;
2954 struct e1000_hw *hw = &adapter->hw;
2955 int err;
2956
2957 /* poll_enable hasn't been called yet, so don't need disable */
2958 /* clear any pending events */
2959 er32(ICR);
2960
2961 /* free the real vector and request a test handler */
2962 e1000_free_irq(adapter);
4662e82b 2963 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 2964
2965 /* Assume that the test fails, if it succeeds then the test
2966 * MSI irq handler will unset this flag */
2967 adapter->flags |= FLAG_MSI_TEST_FAILED;
2968
2969 err = pci_enable_msi(adapter->pdev);
2970 if (err)
2971 goto msi_test_failed;
2972
a0607fd3 2973 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 2974 netdev->name, netdev);
2975 if (err) {
2976 pci_disable_msi(adapter->pdev);
2977 goto msi_test_failed;
2978 }
2979
2980 wmb();
2981
2982 e1000_irq_enable(adapter);
2983
2984 /* fire an unusual interrupt on the test handler */
2985 ew32(ICS, E1000_ICS_RXSEQ);
2986 e1e_flush();
2987 msleep(50);
2988
2989 e1000_irq_disable(adapter);
2990
2991 rmb();
2992
2993 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 2994 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 2995 err = -EIO;
2996 e_info("MSI interrupt test failed!\n");
2997 }
2998
2999 free_irq(adapter->pdev->irq, netdev);
3000 pci_disable_msi(adapter->pdev);
3001
3002 if (err == -EIO)
3003 goto msi_test_failed;
3004
3005 /* okay so the test worked, restore settings */
3006 e_dbg("%s: MSI interrupt test succeeded!\n", netdev->name);
3007msi_test_failed:
4662e82b 3008 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3009 e1000_request_irq(adapter);
3010 return err;
3011}
3012
3013/**
3014 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3015 * @adapter: board private struct
3016 *
3017 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3018 **/
3019static int e1000_test_msi(struct e1000_adapter *adapter)
3020{
3021 int err;
3022 u16 pci_cmd;
3023
3024 if (!(adapter->flags & FLAG_MSI_ENABLED))
3025 return 0;
3026
3027 /* disable SERR in case the MSI write causes a master abort */
3028 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3029 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3030 pci_cmd & ~PCI_COMMAND_SERR);
3031
3032 err = e1000_test_msi_interrupt(adapter);
3033
3034 /* restore previous setting of command word */
3035 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3036
3037 /* success ! */
3038 if (!err)
3039 return 0;
3040
3041 /* EIO means MSI test failed */
3042 if (err != -EIO)
3043 return err;
3044
3045 /* back to INTx mode */
3046 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3047
3048 e1000_free_irq(adapter);
3049
3050 err = e1000_request_irq(adapter);
3051
3052 return err;
3053}
3054
bc7f75fa
AK		 3055/**
3056 * e1000_open - Called when a network interface is made active
3057 * @netdev: network interface device structure
3058 *
3059 * Returns 0 on success, negative value on failure
3060 *
3061 * The open entry point is called when a network interface is made
3062 * active by the system (IFF_UP). At this point all resources needed
3063 * for transmit and receive operations are allocated, the interrupt
3064 * handler is registered with the OS, the watchdog timer is started,
3065 * and the stack is notified that the interface is ready.
3066 **/
3067static int e1000_open(struct net_device *netdev)
3068{
3069 struct e1000_adapter *adapter = netdev_priv(netdev);
3070 struct e1000_hw *hw = &adapter->hw;
3071 int err;
3072
3073 /* disallow open during test */
3074 if (test_bit(__E1000_TESTING, &adapter->state))
3075 return -EBUSY;
3076
9c563d20
JB		 3077 netif_carrier_off(netdev);
3078
bc7f75fa
AK		 3079 /* allocate transmit descriptors */
3080 err = e1000e_setup_tx_resources(adapter);
3081 if (err)
3082 goto err_setup_tx;
3083
3084 /* allocate receive descriptors */
3085 err = e1000e_setup_rx_resources(adapter);
3086 if (err)
3087 goto err_setup_rx;
3088
3089 e1000e_power_up_phy(adapter);
3090
3091 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3092 if ((adapter->hw.mng_cookie.status &
3093 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3094 e1000_update_mng_vlan(adapter);
3095
ad68076e
BA		 3096 /*
3097 * If AMT is enabled, let the firmware know that the network
3098 * interface is now open
3099 */
c43bc57e 3100 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3101 e1000_get_hw_control(adapter);
3102
ad68076e
BA		 3103 /*
3104 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3105 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3106 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3107 * clean_rx handler before we do so.
3108 */
bc7f75fa
AK		 3109 e1000_configure(adapter);
3110
3111 err = e1000_request_irq(adapter);
3112 if (err)
3113 goto err_req_irq;
3114
f8d59f78
BA		 3115 /*
3116 * Work around PCIe errata with MSI interrupts causing some chipsets to
3117 * ignore e1000e MSI messages, which means we need to test our MSI
3118 * interrupt now
3119 */
4662e82b 3120 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3121 err = e1000_test_msi(adapter);
3122 if (err) {
3123 e_err("Interrupt allocation failed\n");
3124 goto err_req_irq;
3125 }
3126 }
3127
bc7f75fa
AK		 3128 /* From here on the code is the same as e1000e_up() */
3129 clear_bit(__E1000_DOWN, &adapter->state);
3130
3131 napi_enable(&adapter->napi);
3132
3133 e1000_irq_enable(adapter);
3134
4cb9be7a 3135 netif_start_queue(netdev);
d55b53ff 3136
bc7f75fa
AK		 3137 /* fire a link status change interrupt to start the watchdog */
3138 ew32(ICS, E1000_ICS_LSC);
3139
3140 return 0;
3141
3142err_req_irq:
3143 e1000_release_hw_control(adapter);
3144 e1000_power_down_phy(adapter);
3145 e1000e_free_rx_resources(adapter);
3146err_setup_rx:
3147 e1000e_free_tx_resources(adapter);
3148err_setup_tx:
3149 e1000e_reset(adapter);
3150
3151 return err;
3152}
3153
3154/**
3155 * e1000_close - Disables a network interface
3156 * @netdev: network interface device structure
3157 *
3158 * Returns 0, this is not allowed to fail
3159 *
3160 * The close entry point is called when an interface is de-activated
3161 * by the OS. The hardware is still under the drivers control, but
3162 * needs to be disabled. A global MAC reset is issued to stop the
3163 * hardware, and all transmit and receive resources are freed.
3164 **/
3165static int e1000_close(struct net_device *netdev)
3166{
3167 struct e1000_adapter *adapter = netdev_priv(netdev);
3168
3169 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
3170 e1000e_down(adapter);
3171 e1000_power_down_phy(adapter);
3172 e1000_free_irq(adapter);
3173
3174 e1000e_free_tx_resources(adapter);
3175 e1000e_free_rx_resources(adapter);
3176
ad68076e
BA		 3177 /*
3178 * kill manageability vlan ID if supported, but not if a vlan with
3179 * the same ID is registered on the host OS (let 8021q kill it)
3180 */
bc7f75fa
AK		 3181 if ((adapter->hw.mng_cookie.status &
3182 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3183 !(adapter->vlgrp &&
3184 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3185 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3186
ad68076e
BA		 3187 /*
3188 * If AMT is enabled, let the firmware know that the network
3189 * interface is now closed
3190 */
c43bc57e 3191 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3192 e1000_release_hw_control(adapter);
3193
3194 return 0;
3195}
3196/**
3197 * e1000_set_mac - Change the Ethernet Address of the NIC
3198 * @netdev: network interface device structure
3199 * @p: pointer to an address structure
3200 *
3201 * Returns 0 on success, negative on failure
3202 **/
3203static int e1000_set_mac(struct net_device *netdev, void *p)
3204{
3205 struct e1000_adapter *adapter = netdev_priv(netdev);
3206 struct sockaddr *addr = p;
3207
3208 if (!is_valid_ether_addr(addr->sa_data))
3209 return -EADDRNOTAVAIL;
3210
3211 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3212 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3213
3214 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3215
3216 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3217 /* activate the work around */
3218 e1000e_set_laa_state_82571(&adapter->hw, 1);
3219
ad68076e
BA		 3220 /*
3221 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3222 * between the time RAR[0] gets clobbered and the time it
3223 * gets fixed (in e1000_watchdog), the actual LAA is in one
3224 * of the RARs and no incoming packets directed to this port
3225 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3226 * RAR[14]
3227 */
bc7f75fa
AK		 3228 e1000e_rar_set(&adapter->hw,
3229 adapter->hw.mac.addr,
3230 adapter->hw.mac.rar_entry_count - 1);
3231 }
3232
3233 return 0;
3234}
3235
a8f88ff5
JB		 3236/**
3237 * e1000e_update_phy_task - work thread to update phy
3238 * @work: pointer to our work struct
3239 *
3240 * this worker thread exists because we must acquire a
3241 * semaphore to read the phy, which we could msleep while
3242 * waiting for it, and we can't msleep in a timer.
3243 **/
3244static void e1000e_update_phy_task(struct work_struct *work)
3245{
3246 struct e1000_adapter *adapter = container_of(work,
3247 struct e1000_adapter, update_phy_task);
3248 e1000_get_phy_info(&adapter->hw);
3249}
3250
ad68076e
BA		 3251/*
3252 * Need to wait a few seconds after link up to get diagnostic information from
3253 * the phy
3254 */
bc7f75fa
AK		 3255static void e1000_update_phy_info(unsigned long data)
3256{
3257 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3258 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3259}
3260
3261/**
3262 * e1000e_update_stats - Update the board statistics counters
3263 * @adapter: board private structure
3264 **/
3265void e1000e_update_stats(struct e1000_adapter *adapter)
3266{
7274c20f 3267 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3268 struct e1000_hw *hw = &adapter->hw;
3269 struct pci_dev *pdev = adapter->pdev;
a4f58f54 3270 u16 phy_data;
bc7f75fa
AK		 3271
3272 /*
3273 * Prevent stats update while adapter is being reset, or if the pci
3274 * connection is down.
3275 */
3276 if (adapter->link_speed == 0)
3277 return;
3278 if (pci_channel_offline(pdev))
3279 return;
3280
bc7f75fa
AK		 3281 adapter->stats.crcerrs += er32(CRCERRS);
3282 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3283 adapter->stats.gorc += er32(GORCL);
3284 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3285 adapter->stats.bprc += er32(BPRC);
3286 adapter->stats.mprc += er32(MPRC);
3287 adapter->stats.roc += er32(ROC);
3288
bc7f75fa 3289 adapter->stats.mpc += er32(MPC);
a4f58f54
BA		 3290 if ((hw->phy.type == e1000_phy_82578) ||
3291 (hw->phy.type == e1000_phy_82577)) {
3292 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
3293 e1e_rphy(hw, HV_SCC_LOWER, &phy_data);
3294 adapter->stats.scc += phy_data;
3295
3296 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
3297 e1e_rphy(hw, HV_ECOL_LOWER, &phy_data);
3298 adapter->stats.ecol += phy_data;
3299
3300 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
3301 e1e_rphy(hw, HV_MCC_LOWER, &phy_data);
3302 adapter->stats.mcc += phy_data;
3303
3304 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
3305 e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data);
3306 adapter->stats.latecol += phy_data;
3307
3308 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
3309 e1e_rphy(hw, HV_DC_LOWER, &phy_data);
3310 adapter->stats.dc += phy_data;
3311 } else {
3312 adapter->stats.scc += er32(SCC);
3313 adapter->stats.ecol += er32(ECOL);
3314 adapter->stats.mcc += er32(MCC);
3315 adapter->stats.latecol += er32(LATECOL);
3316 adapter->stats.dc += er32(DC);
3317 }
bc7f75fa
AK		 3318 adapter->stats.xonrxc += er32(XONRXC);
3319 adapter->stats.xontxc += er32(XONTXC);
3320 adapter->stats.xoffrxc += er32(XOFFRXC);
3321 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3322 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3323 adapter->stats.gotc += er32(GOTCL);
3324 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3325 adapter->stats.rnbc += er32(RNBC);
3326 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3327
3328 adapter->stats.mptc += er32(MPTC);
3329 adapter->stats.bptc += er32(BPTC);
3330
3331 /* used for adaptive IFS */
3332
3333 hw->mac.tx_packet_delta = er32(TPT);
3334 adapter->stats.tpt += hw->mac.tx_packet_delta;
a4f58f54
BA		 3335 if ((hw->phy.type == e1000_phy_82578) ||
3336 (hw->phy.type == e1000_phy_82577)) {
3337 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
3338 e1e_rphy(hw, HV_COLC_LOWER, &phy_data);
3339 hw->mac.collision_delta = phy_data;
3340 } else {
3341 hw->mac.collision_delta = er32(COLC);
3342 }
bc7f75fa
AK		 3343 adapter->stats.colc += hw->mac.collision_delta;
3344
3345 adapter->stats.algnerrc += er32(ALGNERRC);
3346 adapter->stats.rxerrc += er32(RXERRC);
a4f58f54
BA		 3347 if ((hw->phy.type == e1000_phy_82578) ||
3348 (hw->phy.type == e1000_phy_82577)) {
3349 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
3350 e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data);
3351 adapter->stats.tncrs += phy_data;
3352 } else {
3353 if ((hw->mac.type != e1000_82574) &&
3354 (hw->mac.type != e1000_82583))
3355 adapter->stats.tncrs += er32(TNCRS);
3356 }
bc7f75fa
AK		 3357 adapter->stats.cexterr += er32(CEXTERR);
3358 adapter->stats.tsctc += er32(TSCTC);
3359 adapter->stats.tsctfc += er32(TSCTFC);
3360
bc7f75fa 3361 /* Fill out the OS statistics structure */
7274c20f
AK		 3362 netdev->stats.multicast = adapter->stats.mprc;
3363 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3364
3365 /* Rx Errors */
3366
ad68076e
BA		 3367 /*
3368 * RLEC on some newer hardware can be incorrect so build
3369 * our own version based on RUC and ROC
3370 */
7274c20f 3371 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3372 adapter->stats.crcerrs + adapter->stats.algnerrc +
3373 adapter->stats.ruc + adapter->stats.roc +
3374 adapter->stats.cexterr;
7274c20f 3375 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3376 adapter->stats.roc;
7274c20f
AK		 3377 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3378 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3379 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3380
3381 /* Tx Errors */
7274c20f 3382 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3383 adapter->stats.latecol;
7274c20f
AK		 3384 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3385 netdev->stats.tx_window_errors = adapter->stats.latecol;
3386 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3387
3388 /* Tx Dropped needs to be maintained elsewhere */
3389
bc7f75fa
AK		 3390 /* Management Stats */
3391 adapter->stats.mgptc += er32(MGTPTC);
3392 adapter->stats.mgprc += er32(MGTPRC);
3393 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3394}
3395
7c25769f
BA		 3396/**
3397 * e1000_phy_read_status - Update the PHY register status snapshot
3398 * @adapter: board private structure
3399 **/
3400static void e1000_phy_read_status(struct e1000_adapter *adapter)
3401{
3402 struct e1000_hw *hw = &adapter->hw;
3403 struct e1000_phy_regs *phy = &adapter->phy_regs;
3404 int ret_val;
7c25769f
BA		 3405
3406 if ((er32(STATUS) & E1000_STATUS_LU) &&
3407 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3408 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3409 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3410 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3411 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3412 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3413 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3414 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3415 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3416 if (ret_val)
44defeb3 3417 e_warn("Error reading PHY register\n");
7c25769f
BA		 3418 } else {
3419 /*
3420 * Do not read PHY registers if link is not up
3421 * Set values to typical power-on defaults
3422 */
3423 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3424 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3425 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3426 BMSR_ERCAP);
3427 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3428 ADVERTISE_ALL | ADVERTISE_CSMA);
3429 phy->lpa = 0;
3430 phy->expansion = EXPANSION_ENABLENPAGE;
3431 phy->ctrl1000 = ADVERTISE_1000FULL;
3432 phy->stat1000 = 0;
3433 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3434 }
7c25769f
BA		 3435}
3436
bc7f75fa
AK		 3437static void e1000_print_link_info(struct e1000_adapter *adapter)
3438{
bc7f75fa
AK		 3439 struct e1000_hw *hw = &adapter->hw;
3440 u32 ctrl = er32(CTRL);
3441
8f12fe86
BA		 3442 /* Link status message must follow this format for user tools */
3443 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3444 "Flow Control: %s\n",
3445 adapter->netdev->name,
44defeb3
JK		 3446 adapter->link_speed,
3447 (adapter->link_duplex == FULL_DUPLEX) ?
3448 "Full Duplex" : "Half Duplex",
3449 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3450 "RX/TX" :
3451 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3452 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3453}
3454
a20e4cf9 3455bool e1000_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3456{
3457 struct e1000_hw *hw = &adapter->hw;
3458 bool link_active = 0;
3459 s32 ret_val = 0;
3460
3461 /*
3462 * get_link_status is set on LSC (link status) interrupt or
3463 * Rx sequence error interrupt. get_link_status will stay
3464 * false until the check_for_link establishes link
3465 * for copper adapters ONLY
3466 */
3467 switch (hw->phy.media_type) {
3468 case e1000_media_type_copper:
3469 if (hw->mac.get_link_status) {
3470 ret_val = hw->mac.ops.check_for_link(hw);
3471 link_active = !hw->mac.get_link_status;
3472 } else {
3473 link_active = 1;
3474 }
3475 break;
3476 case e1000_media_type_fiber:
3477 ret_val = hw->mac.ops.check_for_link(hw);
3478 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3479 break;
3480 case e1000_media_type_internal_serdes:
3481 ret_val = hw->mac.ops.check_for_link(hw);
3482 link_active = adapter->hw.mac.serdes_has_link;
3483 break;
3484 default:
3485 case e1000_media_type_unknown:
3486 break;
3487 }
3488
3489 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3490 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3491 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3492 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 3493 }
3494
3495 return link_active;
3496}
3497
3498static void e1000e_enable_receives(struct e1000_adapter *adapter)
3499{
3500 /* make sure the receive unit is started */
3501 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3502 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3503 struct e1000_hw *hw = &adapter->hw;
3504 u32 rctl = er32(RCTL);
3505 ew32(RCTL, rctl | E1000_RCTL_EN);
3506 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3507 }
3508}
3509
bc7f75fa
AK		 3510/**
3511 * e1000_watchdog - Timer Call-back
3512 * @data: pointer to adapter cast into an unsigned long
3513 **/
3514static void e1000_watchdog(unsigned long data)
3515{
3516 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3517
3518 /* Do the rest outside of interrupt context */
3519 schedule_work(&adapter->watchdog_task);
3520
3521 /* TODO: make this use queue_delayed_work() */
3522}
3523
3524static void e1000_watchdog_task(struct work_struct *work)
3525{
3526 struct e1000_adapter *adapter = container_of(work,
3527 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 3528 struct net_device *netdev = adapter->netdev;
3529 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3530 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 3531 struct e1000_ring *tx_ring = adapter->tx_ring;
3532 struct e1000_hw *hw = &adapter->hw;
3533 u32 link, tctl;
bc7f75fa
AK		 3534 int tx_pending = 0;
3535
318a94d6
JK		 3536 link = e1000_has_link(adapter);
3537 if ((netif_carrier_ok(netdev)) && link) {
3538 e1000e_enable_receives(adapter);
bc7f75fa 3539 goto link_up;
bc7f75fa
AK		 3540 }
3541
3542 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3543 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3544 e1000_update_mng_vlan(adapter);
3545
bc7f75fa
AK		 3546 if (link) {
3547 if (!netif_carrier_ok(netdev)) {
3548 bool txb2b = 1;
318a94d6 3549 /* update snapshot of PHY registers on LSC */
7c25769f 3550 e1000_phy_read_status(adapter);
bc7f75fa
AK		 3551 mac->ops.get_link_up_info(&adapter->hw,
3552 &adapter->link_speed,
3553 &adapter->link_duplex);
3554 e1000_print_link_info(adapter);
f4187b56
BA		 3555 /*
3556 * On supported PHYs, check for duplex mismatch only
3557 * if link has autonegotiated at 10/100 half
3558 */
3559 if ((hw->phy.type == e1000_phy_igp_3 ||
3560 hw->phy.type == e1000_phy_bm) &&
3561 (hw->mac.autoneg == true) &&
3562 (adapter->link_speed == SPEED_10 ||
3563 adapter->link_speed == SPEED_100) &&
3564 (adapter->link_duplex == HALF_DUPLEX)) {
3565 u16 autoneg_exp;
3566
3567 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3568
3569 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3570 e_info("Autonegotiated half duplex but"
3571 " link partner cannot autoneg. "
3572 " Try forcing full duplex if "
3573 "link gets many collisions.\n");
3574 }
3575
ad68076e
BA		 3576 /*
3577 * tweak tx_queue_len according to speed/duplex
3578 * and adjust the timeout factor
3579 */
bc7f75fa
AK		 3580 netdev->tx_queue_len = adapter->tx_queue_len;
3581 adapter->tx_timeout_factor = 1;
3582 switch (adapter->link_speed) {
3583 case SPEED_10:
3584 txb2b = 0;
3585 netdev->tx_queue_len = 10;
10f1b492 3586 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 3587 break;
3588 case SPEED_100:
3589 txb2b = 0;
3590 netdev->tx_queue_len = 100;
3591 /* maybe add some timeout factor ? */
3592 break;
3593 }
3594
ad68076e
BA		 3595 /*
3596 * workaround: re-program speed mode bit after
3597 * link-up event
3598 */
bc7f75fa
AK		 3599 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3600 !txb2b) {
3601 u32 tarc0;
e9ec2c0f 3602 tarc0 = er32(TARC(0));
bc7f75fa 3603 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3604 ew32(TARC(0), tarc0);
bc7f75fa
AK		 3605 }
3606
ad68076e
BA		 3607 /*
3608 * disable TSO for pcie and 10/100 speeds, to avoid
3609 * some hardware issues
3610 */
bc7f75fa
AK		 3611 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3612 switch (adapter->link_speed) {
3613 case SPEED_10:
3614 case SPEED_100:
44defeb3 3615 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 3616 netdev->features &= ~NETIF_F_TSO;
3617 netdev->features &= ~NETIF_F_TSO6;
3618 break;
3619 case SPEED_1000:
3620 netdev->features |= NETIF_F_TSO;
3621 netdev->features |= NETIF_F_TSO6;
3622 break;
3623 default:
3624 /* oops */
3625 break;
3626 }
3627 }
3628
ad68076e
BA		 3629 /*
3630 * enable transmits in the hardware, need to do this
3631 * after setting TARC(0)
3632 */
bc7f75fa
AK		 3633 tctl = er32(TCTL);
3634 tctl |= E1000_TCTL_EN;
3635 ew32(TCTL, tctl);
3636
75eb0fad
BA		 3637 /*
3638 * Perform any post-link-up configuration before
3639 * reporting link up.
3640 */
3641 if (phy->ops.cfg_on_link_up)
3642 phy->ops.cfg_on_link_up(hw);
3643
bc7f75fa 3644 netif_carrier_on(netdev);
bc7f75fa
AK		 3645
3646 if (!test_bit(__E1000_DOWN, &adapter->state))
3647 mod_timer(&adapter->phy_info_timer,
3648 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 3649 }
3650 } else {
3651 if (netif_carrier_ok(netdev)) {
3652 adapter->link_speed = 0;
3653 adapter->link_duplex = 0;
8f12fe86
BA		 3654 /* Link status message must follow this format */
3655 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
3656 adapter->netdev->name);
bc7f75fa 3657 netif_carrier_off(netdev);
bc7f75fa
AK		 3658 if (!test_bit(__E1000_DOWN, &adapter->state))
3659 mod_timer(&adapter->phy_info_timer,
3660 round_jiffies(jiffies + 2 * HZ));
3661
3662 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3663 schedule_work(&adapter->reset_task);
3664 }
3665 }
3666
3667link_up:
3668 e1000e_update_stats(adapter);
3669
3670 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3671 adapter->tpt_old = adapter->stats.tpt;
3672 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3673 adapter->colc_old = adapter->stats.colc;
3674
7c25769f
BA		 3675 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3676 adapter->gorc_old = adapter->stats.gorc;
3677 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3678 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 3679
3680 e1000e_update_adaptive(&adapter->hw);
3681
3682 if (!netif_carrier_ok(netdev)) {
3683 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3684 tx_ring->count);
3685 if (tx_pending) {
ad68076e
BA		 3686 /*
3687 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 3688 * but we've got queued Tx work that's never going
3689 * to get done, so reset controller to flush Tx.
ad68076e
BA		 3690 * (Do the reset outside of interrupt context).
3691 */
bc7f75fa
AK		 3692 adapter->tx_timeout_count++;
3693 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 3694 /* return immediately since reset is imminent */
3695 return;
bc7f75fa
AK		 3696 }
3697 }
3698
ad68076e 3699 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 3700 if (adapter->msix_entries)
3701 ew32(ICS, adapter->rx_ring->ims_val);
3702 else
3703 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 3704
3705 /* Force detection of hung controller every watchdog period */
3706 adapter->detect_tx_hung = 1;
3707
ad68076e
BA		 3708 /*
3709 * With 82571 controllers, LAA may be overwritten due to controller
3710 * reset from the other port. Set the appropriate LAA in RAR[0]
3711 */
bc7f75fa
AK		 3712 if (e1000e_get_laa_state_82571(hw))
3713 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3714
3715 /* Reset the timer */
3716 if (!test_bit(__E1000_DOWN, &adapter->state))
3717 mod_timer(&adapter->watchdog_timer,
3718 round_jiffies(jiffies + 2 * HZ));
3719}
3720
3721#define E1000_TX_FLAGS_CSUM 0x00000001
3722#define E1000_TX_FLAGS_VLAN 0x00000002
3723#define E1000_TX_FLAGS_TSO 0x00000004
3724#define E1000_TX_FLAGS_IPV4 0x00000008
3725#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3726#define E1000_TX_FLAGS_VLAN_SHIFT 16
3727
3728static int e1000_tso(struct e1000_adapter *adapter,
3729 struct sk_buff *skb)
3730{
3731 struct e1000_ring *tx_ring = adapter->tx_ring;
3732 struct e1000_context_desc *context_desc;
3733 struct e1000_buffer *buffer_info;
3734 unsigned int i;
3735 u32 cmd_length = 0;
3736 u16 ipcse = 0, tucse, mss;
3737 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3738 int err;
3739
3740 if (skb_is_gso(skb)) {
3741 if (skb_header_cloned(skb)) {
3742 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3743 if (err)
3744 return err;
3745 }
3746
3747 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3748 mss = skb_shinfo(skb)->gso_size;
3749 if (skb->protocol == htons(ETH_P_IP)) {
3750 struct iphdr *iph = ip_hdr(skb);
3751 iph->tot_len = 0;
3752 iph->check = 0;
3753 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
3754 iph->daddr, 0,
3755 IPPROTO_TCP,
3756 0);
3757 cmd_length = E1000_TXD_CMD_IP;
3758 ipcse = skb_transport_offset(skb) - 1;
3759 } else if (skb_shinfo(skb)->gso_type == SKB_GSO_TCPV6) {
3760 ipv6_hdr(skb)->payload_len = 0;
3761 tcp_hdr(skb)->check =
3762 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3763 &ipv6_hdr(skb)->daddr,
3764 0, IPPROTO_TCP, 0);
3765 ipcse = 0;
3766 }
3767 ipcss = skb_network_offset(skb);
3768 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3769 tucss = skb_transport_offset(skb);
3770 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3771 tucse = 0;
3772
3773 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3774 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3775
3776 i = tx_ring->next_to_use;
3777 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3778 buffer_info = &tx_ring->buffer_info[i];
3779
3780 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3781 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3782 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3783 context_desc->upper_setup.tcp_fields.tucss = tucss;
3784 context_desc->upper_setup.tcp_fields.tucso = tucso;
3785 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3786 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3787 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3788 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3789
3790 buffer_info->time_stamp = jiffies;
3791 buffer_info->next_to_watch = i;
3792
3793 i++;
3794 if (i == tx_ring->count)
3795 i = 0;
3796 tx_ring->next_to_use = i;
3797
3798 return 1;
3799 }
3800
3801 return 0;
3802}
3803
3804static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3805{
3806 struct e1000_ring *tx_ring = adapter->tx_ring;
3807 struct e1000_context_desc *context_desc;
3808 struct e1000_buffer *buffer_info;
3809 unsigned int i;
3810 u8 css;
af807c82 3811 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 3812 __be16 protocol;
bc7f75fa 3813
af807c82
DG		 3814 if (skb->ip_summed != CHECKSUM_PARTIAL)
3815 return 0;
bc7f75fa 3816
5f66f208
AJ		 3817 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
3818 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
3819 else
3820 protocol = skb->protocol;
3821
3f518390 3822 switch (protocol) {
09640e63 3823 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 3824 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3825 cmd_len |= E1000_TXD_CMD_TCP;
3826 break;
09640e63 3827 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 3828 /* XXX not handling all IPV6 headers */
3829 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3830 cmd_len |= E1000_TXD_CMD_TCP;
3831 break;
3832 default:
3833 if (unlikely(net_ratelimit()))
5f66f208
AJ		 3834 e_warn("checksum_partial proto=%x!\n",
3835 be16_to_cpu(protocol));
af807c82 3836 break;
bc7f75fa
AK		 3837 }
3838
af807c82
DG		 3839 css = skb_transport_offset(skb);
3840
3841 i = tx_ring->next_to_use;
3842 buffer_info = &tx_ring->buffer_info[i];
3843 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3844
3845 context_desc->lower_setup.ip_config = 0;
3846 context_desc->upper_setup.tcp_fields.tucss = css;
3847 context_desc->upper_setup.tcp_fields.tucso =
3848 css + skb->csum_offset;
3849 context_desc->upper_setup.tcp_fields.tucse = 0;
3850 context_desc->tcp_seg_setup.data = 0;
3851 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
3852
3853 buffer_info->time_stamp = jiffies;
3854 buffer_info->next_to_watch = i;
3855
3856 i++;
3857 if (i == tx_ring->count)
3858 i = 0;
3859 tx_ring->next_to_use = i;
3860
3861 return 1;
bc7f75fa
AK		 3862}
3863
3864#define E1000_MAX_PER_TXD 8192
3865#define E1000_MAX_TXD_PWR 12
3866
3867static int e1000_tx_map(struct e1000_adapter *adapter,
3868 struct sk_buff *skb, unsigned int first,
3869 unsigned int max_per_txd, unsigned int nr_frags,
3870 unsigned int mss)
3871{
3872 struct e1000_ring *tx_ring = adapter->tx_ring;
1b7719c4 3873 struct e1000_buffer *buffer_info;
8ddc951c
JB		 3874 unsigned int len = skb_headlen(skb);
3875 unsigned int offset, size, count = 0, i;
bc7f75fa 3876 unsigned int f;
1b7719c4 3877 dma_addr_t *map;
bc7f75fa
AK		 3878
3879 i = tx_ring->next_to_use;
3880
8ddc951c
JB		 3881 if (skb_dma_map(&adapter->pdev->dev, skb, DMA_TO_DEVICE)) {
3882 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
3883 adapter->tx_dma_failed++;
1b7719c4 3884 return 0;
8ddc951c
JB		 3885 }
3886
1b7719c4 3887 map = skb_shinfo(skb)->dma_maps;
8ddc951c
JB		 3888 offset = 0;
3889
bc7f75fa 3890 while (len) {
1b7719c4 3891 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 3892 size = min(len, max_per_txd);
3893
bc7f75fa 3894 buffer_info->length = size;
bc7f75fa 3895 buffer_info->time_stamp = jiffies;
bc7f75fa 3896 buffer_info->next_to_watch = i;
042a53a9 3897 buffer_info->dma = skb_shinfo(skb)->dma_head + offset;
1b7719c4 3898 count++;
bc7f75fa
AK		 3899
3900 len -= size;
3901 offset += size;
1b7719c4
AD		 3902
3903 if (len) {
3904 i++;
3905 if (i == tx_ring->count)
3906 i = 0;
3907 }
bc7f75fa
AK		 3908 }
3909
3910 for (f = 0; f < nr_frags; f++) {
3911 struct skb_frag_struct *frag;
3912
3913 frag = &skb_shinfo(skb)->frags[f];
3914 len = frag->size;
8ddc951c 3915 offset = 0;
bc7f75fa
AK		 3916
3917 while (len) {
1b7719c4
AD		 3918 i++;
3919 if (i == tx_ring->count)
3920 i = 0;
3921
bc7f75fa
AK		 3922 buffer_info = &tx_ring->buffer_info[i];
3923 size = min(len, max_per_txd);
bc7f75fa
AK		 3924
3925 buffer_info->length = size;
3926 buffer_info->time_stamp = jiffies;
bc7f75fa 3927 buffer_info->next_to_watch = i;
042a53a9 3928 buffer_info->dma = map[f] + offset;
bc7f75fa
AK		 3929
3930 len -= size;
3931 offset += size;
3932 count++;
bc7f75fa
AK		 3933 }
3934 }
3935
bc7f75fa
AK		 3936 tx_ring->buffer_info[i].skb = skb;
3937 tx_ring->buffer_info[first].next_to_watch = i;
3938
3939 return count;
3940}
3941
3942static void e1000_tx_queue(struct e1000_adapter *adapter,
3943 int tx_flags, int count)
3944{
3945 struct e1000_ring *tx_ring = adapter->tx_ring;
3946 struct e1000_tx_desc *tx_desc = NULL;
3947 struct e1000_buffer *buffer_info;
3948 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3949 unsigned int i;
3950
3951 if (tx_flags & E1000_TX_FLAGS_TSO) {
3952 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3953 E1000_TXD_CMD_TSE;
3954 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3955
3956 if (tx_flags & E1000_TX_FLAGS_IPV4)
3957 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
3958 }
3959
3960 if (tx_flags & E1000_TX_FLAGS_CSUM) {
3961 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3962 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3963 }
3964
3965 if (tx_flags & E1000_TX_FLAGS_VLAN) {
3966 txd_lower |= E1000_TXD_CMD_VLE;
3967 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3968 }
3969
3970 i = tx_ring->next_to_use;
3971
3972 while (count--) {
3973 buffer_info = &tx_ring->buffer_info[i];
3974 tx_desc = E1000_TX_DESC(*tx_ring, i);
3975 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3976 tx_desc->lower.data =
3977 cpu_to_le32(txd_lower | buffer_info->length);
3978 tx_desc->upper.data = cpu_to_le32(txd_upper);
3979
3980 i++;
3981 if (i == tx_ring->count)
3982 i = 0;
3983 }
3984
3985 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3986
ad68076e
BA		 3987 /*
3988 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 3989 * know there are new descriptors to fetch. (Only
3990 * applicable for weak-ordered memory model archs,
ad68076e
BA		 3991 * such as IA-64).
3992 */
bc7f75fa
AK		 3993 wmb();
3994
3995 tx_ring->next_to_use = i;
3996 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 3997 /*
3998 * we need this if more than one processor can write to our tail
3999 * at a time, it synchronizes IO on IA64/Altix systems
4000 */
bc7f75fa
AK		 4001 mmiowb();
4002}
4003
4004#define MINIMUM_DHCP_PACKET_SIZE 282
4005static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4006 struct sk_buff *skb)
4007{
4008 struct e1000_hw *hw = &adapter->hw;
4009 u16 length, offset;
4010
4011 if (vlan_tx_tag_present(skb)) {
4012 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id)
4013 && (adapter->hw.mng_cookie.status &
4014 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4015 return 0;
4016 }
4017
4018 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4019 return 0;
4020
4021 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4022 return 0;
4023
4024 {
4025 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4026 struct udphdr *udp;
4027
4028 if (ip->protocol != IPPROTO_UDP)
4029 return 0;
4030
4031 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4032 if (ntohs(udp->dest) != 67)
4033 return 0;
4034
4035 offset = (u8 *)udp + 8 - skb->data;
4036 length = skb->len - offset;
4037 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4038 }
4039
4040 return 0;
4041}
4042
4043static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4044{
4045 struct e1000_adapter *adapter = netdev_priv(netdev);
4046
4047 netif_stop_queue(netdev);
ad68076e
BA		 4048 /*
4049 * Herbert's original patch had:
bc7f75fa 4050 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4051 * but since that doesn't exist yet, just open code it.
4052 */
bc7f75fa
AK		 4053 smp_mb();
4054
ad68076e
BA		 4055 /*
4056 * We need to check again in a case another CPU has just
4057 * made room available.
4058 */
bc7f75fa
AK		 4059 if (e1000_desc_unused(adapter->tx_ring) < size)
4060 return -EBUSY;
4061
4062 /* A reprieve! */
4063 netif_start_queue(netdev);
4064 ++adapter->restart_queue;
4065 return 0;
4066}
4067
4068static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4069{
4070 struct e1000_adapter *adapter = netdev_priv(netdev);
4071
4072 if (e1000_desc_unused(adapter->tx_ring) >= size)
4073 return 0;
4074 return __e1000_maybe_stop_tx(netdev, size);
4075}
4076
4077#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4078static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4079 struct net_device *netdev)
bc7f75fa
AK		 4080{
4081 struct e1000_adapter *adapter = netdev_priv(netdev);
4082 struct e1000_ring *tx_ring = adapter->tx_ring;
4083 unsigned int first;
4084 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4085 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4086 unsigned int tx_flags = 0;
4e6c709c 4087 unsigned int len = skb->len - skb->data_len;
4e6c709c
AK		 4088 unsigned int nr_frags;
4089 unsigned int mss;
bc7f75fa
AK		 4090 int count = 0;
4091 int tso;
4092 unsigned int f;
bc7f75fa
AK		 4093
4094 if (test_bit(__E1000_DOWN, &adapter->state)) {
4095 dev_kfree_skb_any(skb);
4096 return NETDEV_TX_OK;
4097 }
4098
4099 if (skb->len <= 0) {
4100 dev_kfree_skb_any(skb);
4101 return NETDEV_TX_OK;
4102 }
4103
4104 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4105 /*
4106 * The controller does a simple calculation to
bc7f75fa
AK		 4107 * make sure there is enough room in the FIFO before
4108 * initiating the DMA for each buffer. The calc is:
4109 * 4 = ceil(buffer len/mss). To make sure we don't
4110 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4111 * drops.
4112 */
bc7f75fa
AK		 4113 if (mss) {
4114 u8 hdr_len;
4115 max_per_txd = min(mss << 2, max_per_txd);
4116 max_txd_pwr = fls(max_per_txd) - 1;
4117
ad68076e
BA		 4118 /*
4119 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4120 * points to just header, pull a few bytes of payload from
4121 * frags into skb->data
4122 */
bc7f75fa 4123 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4124 /*
4125 * we do this workaround for ES2LAN, but it is un-necessary,
4126 * avoiding it could save a lot of cycles
4127 */
4e6c709c 4128 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4129 unsigned int pull_size;
4130
4131 pull_size = min((unsigned int)4, skb->data_len);
4132 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4133 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4134 dev_kfree_skb_any(skb);
4135 return NETDEV_TX_OK;
4136 }
4137 len = skb->len - skb->data_len;
4138 }
4139 }
4140
4141 /* reserve a descriptor for the offload context */
4142 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4143 count++;
4144 count++;
4145
4146 count += TXD_USE_COUNT(len, max_txd_pwr);
4147
4148 nr_frags = skb_shinfo(skb)->nr_frags;
4149 for (f = 0; f < nr_frags; f++)
4150 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4151 max_txd_pwr);
4152
4153 if (adapter->hw.mac.tx_pkt_filtering)
4154 e1000_transfer_dhcp_info(adapter, skb);
4155
ad68076e
BA		 4156 /*
4157 * need: count + 2 desc gap to keep tail from touching
4158 * head, otherwise try next time
4159 */
92af3e95 4160 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4161 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4162
4163 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4164 tx_flags |= E1000_TX_FLAGS_VLAN;
4165 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4166 }
4167
4168 first = tx_ring->next_to_use;
4169
4170 tso = e1000_tso(adapter, skb);
4171 if (tso < 0) {
4172 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4173 return NETDEV_TX_OK;
4174 }
4175
4176 if (tso)
4177 tx_flags |= E1000_TX_FLAGS_TSO;
4178 else if (e1000_tx_csum(adapter, skb))
4179 tx_flags |= E1000_TX_FLAGS_CSUM;
4180
ad68076e
BA		 4181 /*
4182 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4183 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4184 * no longer assume, we must.
4185 */
bc7f75fa
AK		 4186 if (skb->protocol == htons(ETH_P_IP))
4187 tx_flags |= E1000_TX_FLAGS_IPV4;
4188
1b7719c4 4189 /* if count is 0 then mapping error has occured */
bc7f75fa 4190 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4191 if (count) {
4192 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4193 /* Make sure there is space in the ring for the next send. */
4194 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4195
4196 } else {
bc7f75fa 4197 dev_kfree_skb_any(skb);
1b7719c4
AD		 4198 tx_ring->buffer_info[first].time_stamp = 0;
4199 tx_ring->next_to_use = first;
bc7f75fa
AK		 4200 }
4201
bc7f75fa
AK		 4202 return NETDEV_TX_OK;
4203}
4204
4205/**
4206 * e1000_tx_timeout - Respond to a Tx Hang
4207 * @netdev: network interface device structure
4208 **/
4209static void e1000_tx_timeout(struct net_device *netdev)
4210{
4211 struct e1000_adapter *adapter = netdev_priv(netdev);
4212
4213 /* Do the reset outside of interrupt context */
4214 adapter->tx_timeout_count++;
4215 schedule_work(&adapter->reset_task);
4216}
4217
4218static void e1000_reset_task(struct work_struct *work)
4219{
4220 struct e1000_adapter *adapter;
4221 adapter = container_of(work, struct e1000_adapter, reset_task);
4222
4223 e1000e_reinit_locked(adapter);
4224}
4225
4226/**
4227 * e1000_get_stats - Get System Network Statistics
4228 * @netdev: network interface device structure
4229 *
4230 * Returns the address of the device statistics structure.
4231 * The statistics are actually updated from the timer callback.
4232 **/
4233static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4234{
bc7f75fa 4235 /* only return the current stats */
7274c20f 4236 return &netdev->stats;
bc7f75fa
AK		 4237}
4238
4239/**
4240 * e1000_change_mtu - Change the Maximum Transfer Unit
4241 * @netdev: network interface device structure
4242 * @new_mtu: new value for maximum frame size
4243 *
4244 * Returns 0 on success, negative on failure
4245 **/
4246static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4247{
4248 struct e1000_adapter *adapter = netdev_priv(netdev);
4249 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4250
2adc55c9
BA		 4251 /* Jumbo frame support */
4252 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4253 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4254 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4255 return -EINVAL;
4256 }
4257
2adc55c9
BA		 4258 /* Supported frame sizes */
4259 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4260 (max_frame > adapter->max_hw_frame_size)) {
4261 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4262 return -EINVAL;
4263 }
4264
4265 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4266 msleep(1);
4267 /* e1000e_down has a dependency on max_frame_size */
318a94d6 4268 adapter->max_frame_size = max_frame;
bc7f75fa
AK		 4269 if (netif_running(netdev))
4270 e1000e_down(adapter);
4271
ad68076e
BA		 4272 /*
4273 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4274 * means we reserve 2 more, this pushes us to allocate from the next
4275 * larger slab size.
ad68076e 4276 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4277 * However with the new *_jumbo_rx* routines, jumbo receives will use
4278 * fragmented skbs
ad68076e 4279 */
bc7f75fa
AK		 4280
4281 if (max_frame <= 256)
4282 adapter->rx_buffer_len = 256;
4283 else if (max_frame <= 512)
4284 adapter->rx_buffer_len = 512;
4285 else if (max_frame <= 1024)
4286 adapter->rx_buffer_len = 1024;
4287 else if (max_frame <= 2048)
4288 adapter->rx_buffer_len = 2048;
4289 else
4290 adapter->rx_buffer_len = 4096;
4291
4292 /* adjust allocation if LPE protects us, and we aren't using SBP */
4293 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4294 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4295 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4296 + ETH_FCS_LEN;
bc7f75fa 4297
44defeb3 4298 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
bc7f75fa
AK		 4299 netdev->mtu = new_mtu;
4300
4301 if (netif_running(netdev))
4302 e1000e_up(adapter);
4303 else
4304 e1000e_reset(adapter);
4305
4306 clear_bit(__E1000_RESETTING, &adapter->state);
4307
4308 return 0;
4309}
4310
4311static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4312 int cmd)
4313{
4314 struct e1000_adapter *adapter = netdev_priv(netdev);
4315 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4316
318a94d6 4317 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4318 return -EOPNOTSUPP;
4319
4320 switch (cmd) {
4321 case SIOCGMIIPHY:
4322 data->phy_id = adapter->hw.phy.addr;
4323 break;
4324 case SIOCGMIIREG:
7c25769f
BA		 4325 switch (data->reg_num & 0x1F) {
4326 case MII_BMCR:
4327 data->val_out = adapter->phy_regs.bmcr;
4328 break;
4329 case MII_BMSR:
4330 data->val_out = adapter->phy_regs.bmsr;
4331 break;
4332 case MII_PHYSID1:
4333 data->val_out = (adapter->hw.phy.id >> 16);
4334 break;
4335 case MII_PHYSID2:
4336 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4337 break;
4338 case MII_ADVERTISE:
4339 data->val_out = adapter->phy_regs.advertise;
4340 break;
4341 case MII_LPA:
4342 data->val_out = adapter->phy_regs.lpa;
4343 break;
4344 case MII_EXPANSION:
4345 data->val_out = adapter->phy_regs.expansion;
4346 break;
4347 case MII_CTRL1000:
4348 data->val_out = adapter->phy_regs.ctrl1000;
4349 break;
4350 case MII_STAT1000:
4351 data->val_out = adapter->phy_regs.stat1000;
4352 break;
4353 case MII_ESTATUS:
4354 data->val_out = adapter->phy_regs.estatus;
4355 break;
4356 default:
bc7f75fa
AK		 4357 return -EIO;
4358 }
bc7f75fa
AK		 4359 break;
4360 case SIOCSMIIREG:
4361 default:
4362 return -EOPNOTSUPP;
4363 }
4364 return 0;
4365}
4366
4367static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4368{
4369 switch (cmd) {
4370 case SIOCGMIIPHY:
4371 case SIOCGMIIREG:
4372 case SIOCSMIIREG:
4373 return e1000_mii_ioctl(netdev, ifr, cmd);
4374 default:
4375 return -EOPNOTSUPP;
4376 }
4377}
4378
a4f58f54
BA		 4379static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4380{
4381 struct e1000_hw *hw = &adapter->hw;
4382 u32 i, mac_reg;
4383 u16 phy_reg;
4384 int retval = 0;
4385
4386 /* copy MAC RARs to PHY RARs */
4387 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4388 mac_reg = er32(RAL(i));
4389 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF));
4390 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF));
4391 mac_reg = er32(RAH(i));
4392 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF));
4393 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF));
4394 }
4395
4396 /* copy MAC MTA to PHY MTA */
4397 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4398 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4399 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4400 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4401 }
4402
4403 /* configure PHY Rx Control register */
4404 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4405 mac_reg = er32(RCTL);
4406 if (mac_reg & E1000_RCTL_UPE)
4407 phy_reg |= BM_RCTL_UPE;
4408 if (mac_reg & E1000_RCTL_MPE)
4409 phy_reg |= BM_RCTL_MPE;
4410 phy_reg &= ~(BM_RCTL_MO_MASK);
4411 if (mac_reg & E1000_RCTL_MO_3)
4412 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4413 << BM_RCTL_MO_SHIFT);
4414 if (mac_reg & E1000_RCTL_BAM)
4415 phy_reg |= BM_RCTL_BAM;
4416 if (mac_reg & E1000_RCTL_PMCF)
4417 phy_reg |= BM_RCTL_PMCF;
4418 mac_reg = er32(CTRL);
4419 if (mac_reg & E1000_CTRL_RFCE)
4420 phy_reg |= BM_RCTL_RFCE;
4421 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4422
4423 /* enable PHY wakeup in MAC register */
4424 ew32(WUFC, wufc);
4425 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4426
4427 /* configure and enable PHY wakeup in PHY registers */
4428 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4429 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4430
4431 /* activate PHY wakeup */
4432 retval = hw->phy.ops.acquire_phy(hw);
4433 if (retval) {
4434 e_err("Could not acquire PHY\n");
4435 return retval;
4436 }
4437 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4438 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4439 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4440 if (retval) {
4441 e_err("Could not read PHY page 769\n");
4442 goto out;
4443 }
4444 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4445 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4446 if (retval)
4447 e_err("Could not set PHY Host Wakeup bit\n");
4448out:
4449 hw->phy.ops.release_phy(hw);
4450
4451 return retval;
4452}
4453
4f9de721 4454static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
bc7f75fa
AK		 4455{
4456 struct net_device *netdev = pci_get_drvdata(pdev);
4457 struct e1000_adapter *adapter = netdev_priv(netdev);
4458 struct e1000_hw *hw = &adapter->hw;
4459 u32 ctrl, ctrl_ext, rctl, status;
4460 u32 wufc = adapter->wol;
4461 int retval = 0;
4462
4463 netif_device_detach(netdev);
4464
4465 if (netif_running(netdev)) {
4466 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4467 e1000e_down(adapter);
4468 e1000_free_irq(adapter);
4469 }
4662e82b 4470 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 4471
4472 retval = pci_save_state(pdev);
4473 if (retval)
4474 return retval;
4475
4476 status = er32(STATUS);
4477 if (status & E1000_STATUS_LU)
4478 wufc &= ~E1000_WUFC_LNKC;
4479
4480 if (wufc) {
4481 e1000_setup_rctl(adapter);
4482 e1000_set_multi(netdev);
4483
4484 /* turn on all-multi mode if wake on multicast is enabled */
4485 if (wufc & E1000_WUFC_MC) {
4486 rctl = er32(RCTL);
4487 rctl |= E1000_RCTL_MPE;
4488 ew32(RCTL, rctl);
4489 }
4490
4491 ctrl = er32(CTRL);
4492 /* advertise wake from D3Cold */
4493 #define E1000_CTRL_ADVD3WUC 0x00100000
4494 /* phy power management enable */
4495 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 4496 ctrl |= E1000_CTRL_ADVD3WUC;
4497 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
4498 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 4499 ew32(CTRL, ctrl);
4500
318a94d6
JK		 4501 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4502 adapter->hw.phy.media_type ==
4503 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 4504 /* keep the laser running in D3 */
4505 ctrl_ext = er32(CTRL_EXT);
4506 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4507 ew32(CTRL_EXT, ctrl_ext);
4508 }
4509
97ac8cae
BA		 4510 if (adapter->flags & FLAG_IS_ICH)
4511 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4512
bc7f75fa
AK		 4513 /* Allow time for pending master requests to run */
4514 e1000e_disable_pcie_master(&adapter->hw);
4515
82776a4b 4516 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 4517 /* enable wakeup by the PHY */
4518 retval = e1000_init_phy_wakeup(adapter, wufc);
4519 if (retval)
4520 return retval;
4521 } else {
4522 /* enable wakeup by the MAC */
4523 ew32(WUFC, wufc);
4524 ew32(WUC, E1000_WUC_PME_EN);
4525 }
bc7f75fa
AK		 4526 } else {
4527 ew32(WUC, 0);
4528 ew32(WUFC, 0);
bc7f75fa
AK		 4529 }
4530
4f9de721
RW		 4531 *enable_wake = !!wufc;
4532
bc7f75fa 4533 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 4534 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
4535 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 4536 *enable_wake = true;
bc7f75fa
AK		 4537
4538 if (adapter->hw.phy.type == e1000_phy_igp_3)
4539 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4540
ad68076e
BA		 4541 /*
4542 * Release control of h/w to f/w. If f/w is AMT enabled, this
4543 * would have already happened in close and is redundant.
4544 */
bc7f75fa
AK		 4545 e1000_release_hw_control(adapter);
4546
4547 pci_disable_device(pdev);
4548
4f9de721
RW		 4549 return 0;
4550}
4551
4552static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
4553{
4554 if (sleep && wake) {
4555 pci_prepare_to_sleep(pdev);
4556 return;
4557 }
4558
4559 pci_wake_from_d3(pdev, wake);
4560 pci_set_power_state(pdev, PCI_D3hot);
4561}
4562
4563static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
4564 bool wake)
4565{
4566 struct net_device *netdev = pci_get_drvdata(pdev);
4567 struct e1000_adapter *adapter = netdev_priv(netdev);
4568
005cbdfc
AD		 4569 /*
4570 * The pci-e switch on some quad port adapters will report a
4571 * correctable error when the MAC transitions from D0 to D3. To
4572 * prevent this we need to mask off the correctable errors on the
4573 * downstream port of the pci-e switch.
4574 */
4575 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4576 struct pci_dev *us_dev = pdev->bus->self;
4577 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4578 u16 devctl;
4579
4580 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4581 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4582 (devctl & ~PCI_EXP_DEVCTL_CERE));
4583
4f9de721 4584 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 4585
4586 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4587 } else {
4f9de721 4588 e1000_power_off(pdev, sleep, wake);
005cbdfc 4589 }
bc7f75fa
AK		 4590}
4591
1eae4eb2
AK		 4592static void e1000e_disable_l1aspm(struct pci_dev *pdev)
4593{
4594 int pos;
1eae4eb2
AK		 4595 u16 val;
4596
4597 /*
4598 * 82573 workaround - disable L1 ASPM on mobile chipsets
4599 *
4600 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
4601 * resulting in lost data or garbage information on the pci-e link
4602 * level. This could result in (false) bad EEPROM checksum errors,
4603 * long ping times (up to 2s) or even a system freeze/hang.
4604 *
4605 * Unfortunately this feature saves about 1W power consumption when
4606 * active.
4607 */
4608 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1eae4eb2
AK		 4609 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
4610 if (val & 0x2) {
4611 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
4612 val &= ~0x2;
4613 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
4614 }
4615}
4616
bc7f75fa 4617#ifdef CONFIG_PM
4f9de721
RW		 4618static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4619{
4620 int retval;
4621 bool wake;
4622
4623 retval = __e1000_shutdown(pdev, &wake);
4624 if (!retval)
4625 e1000_complete_shutdown(pdev, true, wake);
4626
4627 return retval;
4628}
4629
bc7f75fa
AK		 4630static int e1000_resume(struct pci_dev *pdev)
4631{
4632 struct net_device *netdev = pci_get_drvdata(pdev);
4633 struct e1000_adapter *adapter = netdev_priv(netdev);
4634 struct e1000_hw *hw = &adapter->hw;
4635 u32 err;
4636
4637 pci_set_power_state(pdev, PCI_D0);
4638 pci_restore_state(pdev);
1eae4eb2 4639 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4640
f0f422e5 4641 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4642 if (err) {
4643 dev_err(&pdev->dev,
4644 "Cannot enable PCI device from suspend\n");
4645 return err;
4646 }
4647
4648 pci_set_master(pdev);
4649
4650 pci_enable_wake(pdev, PCI_D3hot, 0);
4651 pci_enable_wake(pdev, PCI_D3cold, 0);
4652
4662e82b 4653 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 4654 if (netif_running(netdev)) {
4655 err = e1000_request_irq(adapter);
4656 if (err)
4657 return err;
4658 }
4659
4660 e1000e_power_up_phy(adapter);
a4f58f54
BA		 4661
4662 /* report the system wakeup cause from S3/S4 */
4663 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
4664 u16 phy_data;
4665
4666 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
4667 if (phy_data) {
4668 e_info("PHY Wakeup cause - %s\n",
4669 phy_data & E1000_WUS_EX ? "Unicast Packet" :
4670 phy_data & E1000_WUS_MC ? "Multicast Packet" :
4671 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
4672 phy_data & E1000_WUS_MAG ? "Magic Packet" :
4673 phy_data & E1000_WUS_LNKC ? "Link Status "
4674 " Change" : "other");
4675 }
4676 e1e_wphy(&adapter->hw, BM_WUS, ~0);
4677 } else {
4678 u32 wus = er32(WUS);
4679 if (wus) {
4680 e_info("MAC Wakeup cause - %s\n",
4681 wus & E1000_WUS_EX ? "Unicast Packet" :
4682 wus & E1000_WUS_MC ? "Multicast Packet" :
4683 wus & E1000_WUS_BC ? "Broadcast Packet" :
4684 wus & E1000_WUS_MAG ? "Magic Packet" :
4685 wus & E1000_WUS_LNKC ? "Link Status Change" :
4686 "other");
4687 }
4688 ew32(WUS, ~0);
4689 }
4690
bc7f75fa 4691 e1000e_reset(adapter);
bc7f75fa
AK		 4692
4693 e1000_init_manageability(adapter);
4694
4695 if (netif_running(netdev))
4696 e1000e_up(adapter);
4697
4698 netif_device_attach(netdev);
4699
ad68076e
BA		 4700 /*
4701 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4702 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4703 * under the control of the driver.
4704 */
c43bc57e 4705 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4706 e1000_get_hw_control(adapter);
4707
4708 return 0;
4709}
4710#endif
4711
4712static void e1000_shutdown(struct pci_dev *pdev)
4713{
4f9de721
RW		 4714 bool wake = false;
4715
4716 __e1000_shutdown(pdev, &wake);
4717
4718 if (system_state == SYSTEM_POWER_OFF)
4719 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 4720}
4721
4722#ifdef CONFIG_NET_POLL_CONTROLLER
4723/*
4724 * Polling 'interrupt' - used by things like netconsole to send skbs
4725 * without having to re-enable interrupts. It's not called while
4726 * the interrupt routine is executing.
4727 */
4728static void e1000_netpoll(struct net_device *netdev)
4729{
4730 struct e1000_adapter *adapter = netdev_priv(netdev);
4731
4732 disable_irq(adapter->pdev->irq);
4733 e1000_intr(adapter->pdev->irq, netdev);
4734
bc7f75fa
AK		 4735 enable_irq(adapter->pdev->irq);
4736}
4737#endif
4738
4739/**
4740 * e1000_io_error_detected - called when PCI error is detected
4741 * @pdev: Pointer to PCI device
4742 * @state: The current pci connection state
4743 *
4744 * This function is called after a PCI bus error affecting
4745 * this device has been detected.
4746 */
4747static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4748 pci_channel_state_t state)
4749{
4750 struct net_device *netdev = pci_get_drvdata(pdev);
4751 struct e1000_adapter *adapter = netdev_priv(netdev);
4752
4753 netif_device_detach(netdev);
4754
c93b5a76
MM		 4755 if (state == pci_channel_io_perm_failure)
4756 return PCI_ERS_RESULT_DISCONNECT;
4757
bc7f75fa
AK		 4758 if (netif_running(netdev))
4759 e1000e_down(adapter);
4760 pci_disable_device(pdev);
4761
4762 /* Request a slot slot reset. */
4763 return PCI_ERS_RESULT_NEED_RESET;
4764}
4765
4766/**
4767 * e1000_io_slot_reset - called after the pci bus has been reset.
4768 * @pdev: Pointer to PCI device
4769 *
4770 * Restart the card from scratch, as if from a cold-boot. Implementation
4771 * resembles the first-half of the e1000_resume routine.
4772 */
4773static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4774{
4775 struct net_device *netdev = pci_get_drvdata(pdev);
4776 struct e1000_adapter *adapter = netdev_priv(netdev);
4777 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4778 int err;
111b9dc5 4779 pci_ers_result_t result;
bc7f75fa 4780
1eae4eb2 4781 e1000e_disable_l1aspm(pdev);
f0f422e5 4782 err = pci_enable_device_mem(pdev);
6e4f6f6b 4783 if (err) {
bc7f75fa
AK		 4784 dev_err(&pdev->dev,
4785 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 4786 result = PCI_ERS_RESULT_DISCONNECT;
4787 } else {
4788 pci_set_master(pdev);
4789 pci_restore_state(pdev);
bc7f75fa 4790
111b9dc5
JB		 4791 pci_enable_wake(pdev, PCI_D3hot, 0);
4792 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 4793
111b9dc5
JB		 4794 e1000e_reset(adapter);
4795 ew32(WUS, ~0);
4796 result = PCI_ERS_RESULT_RECOVERED;
4797 }
bc7f75fa 4798
111b9dc5
JB		 4799 pci_cleanup_aer_uncorrect_error_status(pdev);
4800
4801 return result;
bc7f75fa
AK		 4802}
4803
4804/**
4805 * e1000_io_resume - called when traffic can start flowing again.
4806 * @pdev: Pointer to PCI device
4807 *
4808 * This callback is called when the error recovery driver tells us that
4809 * its OK to resume normal operation. Implementation resembles the
4810 * second-half of the e1000_resume routine.
4811 */
4812static void e1000_io_resume(struct pci_dev *pdev)
4813{
4814 struct net_device *netdev = pci_get_drvdata(pdev);
4815 struct e1000_adapter *adapter = netdev_priv(netdev);
4816
4817 e1000_init_manageability(adapter);
4818
4819 if (netif_running(netdev)) {
4820 if (e1000e_up(adapter)) {
4821 dev_err(&pdev->dev,
4822 "can't bring device back up after reset\n");
4823 return;
4824 }
4825 }
4826
4827 netif_device_attach(netdev);
4828
ad68076e
BA		 4829 /*
4830 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4831 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4832 * under the control of the driver.
4833 */
c43bc57e 4834 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4835 e1000_get_hw_control(adapter);
4836
4837}
4838
4839static void e1000_print_device_info(struct e1000_adapter *adapter)
4840{
4841 struct e1000_hw *hw = &adapter->hw;
4842 struct net_device *netdev = adapter->netdev;
69e3fd8c 4843 u32 pba_num;
bc7f75fa
AK		 4844
4845 /* print bus type/speed/width info */
7c510e4b 4846 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 4847 /* bus width */
4848 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4849 "Width x1"),
4850 /* MAC address */
7c510e4b 4851 netdev->dev_addr);
44defeb3
JK		 4852 e_info("Intel(R) PRO/%s Network Connection\n",
4853 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4854 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 4855 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4856 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 4857}
4858
10aa4c04
AK		 4859static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4860{
4861 struct e1000_hw *hw = &adapter->hw;
4862 int ret_val;
4863 u16 buf = 0;
4864
4865 if (hw->mac.type != e1000_82573)
4866 return;
4867
4868 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 4869 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 4870 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 4871 dev_warn(&adapter->pdev->dev,
4872 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04
AK		 4873 }
4874
4875 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
e243455d 4876 if (!ret_val && (le16_to_cpu(buf) & (3 << 2))) {
10aa4c04 4877 /* ASPM enable */
6c2a9efa
FP		 4878 dev_warn(&adapter->pdev->dev,
4879 "Warning: detected ASPM enabled in EEPROM\n");
10aa4c04
AK		 4880 }
4881}
4882
651c2466
SH		 4883static const struct net_device_ops e1000e_netdev_ops = {
4884 .ndo_open = e1000_open,
4885 .ndo_stop = e1000_close,
00829823 4886 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 4887 .ndo_get_stats = e1000_get_stats,
4888 .ndo_set_multicast_list = e1000_set_multi,
4889 .ndo_set_mac_address = e1000_set_mac,
4890 .ndo_change_mtu = e1000_change_mtu,
4891 .ndo_do_ioctl = e1000_ioctl,
4892 .ndo_tx_timeout = e1000_tx_timeout,
4893 .ndo_validate_addr = eth_validate_addr,
4894
4895 .ndo_vlan_rx_register = e1000_vlan_rx_register,
4896 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
4897 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
4898#ifdef CONFIG_NET_POLL_CONTROLLER
4899 .ndo_poll_controller = e1000_netpoll,
4900#endif
4901};
4902
bc7f75fa
AK		 4903/**
4904 * e1000_probe - Device Initialization Routine
4905 * @pdev: PCI device information struct
4906 * @ent: entry in e1000_pci_tbl
4907 *
4908 * Returns 0 on success, negative on failure
4909 *
4910 * e1000_probe initializes an adapter identified by a pci_dev structure.
4911 * The OS initialization, configuring of the adapter private structure,
4912 * and a hardware reset occur.
4913 **/
4914static int __devinit e1000_probe(struct pci_dev *pdev,
4915 const struct pci_device_id *ent)
4916{
4917 struct net_device *netdev;
4918 struct e1000_adapter *adapter;
4919 struct e1000_hw *hw;
4920 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 4921 resource_size_t mmio_start, mmio_len;
4922 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 4923
4924 static int cards_found;
4925 int i, err, pci_using_dac;
4926 u16 eeprom_data = 0;
4927 u16 eeprom_apme_mask = E1000_EEPROM_APME;
4928
1eae4eb2 4929 e1000e_disable_l1aspm(pdev);
6e4f6f6b 4930
f0f422e5 4931 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 4932 if (err)
4933 return err;
4934
4935 pci_using_dac = 0;
6a35528a 4936 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa 4937 if (!err) {
6a35528a 4938 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa
AK		 4939 if (!err)
4940 pci_using_dac = 1;
4941 } else {
284901a9 4942 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
bc7f75fa
AK		 4943 if (err) {
4944 err = pci_set_consistent_dma_mask(pdev,
284901a9 4945 DMA_BIT_MASK(32));
bc7f75fa
AK		 4946 if (err) {
4947 dev_err(&pdev->dev, "No usable DMA "
4948 "configuration, aborting\n");
4949 goto err_dma;
4950 }
4951 }
4952 }
4953
e8de1481 4954 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 4955 pci_select_bars(pdev, IORESOURCE_MEM),
4956 e1000e_driver_name);
bc7f75fa
AK		 4957 if (err)
4958 goto err_pci_reg;
4959
68eac460 4960 /* AER (Advanced Error Reporting) hooks */
19d5afd4 4961 pci_enable_pcie_error_reporting(pdev);
68eac460 4962
bc7f75fa 4963 pci_set_master(pdev);
438b365a
BA		 4964 /* PCI config space info */
4965 err = pci_save_state(pdev);
4966 if (err)
4967 goto err_alloc_etherdev;
bc7f75fa
AK		 4968
4969 err = -ENOMEM;
4970 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
4971 if (!netdev)
4972 goto err_alloc_etherdev;
4973
bc7f75fa
AK		 4974 SET_NETDEV_DEV(netdev, &pdev->dev);
4975
4976 pci_set_drvdata(pdev, netdev);
4977 adapter = netdev_priv(netdev);
4978 hw = &adapter->hw;
4979 adapter->netdev = netdev;
4980 adapter->pdev = pdev;
4981 adapter->ei = ei;
4982 adapter->pba = ei->pba;
4983 adapter->flags = ei->flags;
eb7c3adb 4984 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 4985 adapter->hw.adapter = adapter;
4986 adapter->hw.mac.type = ei->mac;
2adc55c9 4987 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 4988 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
4989
4990 mmio_start = pci_resource_start(pdev, 0);
4991 mmio_len = pci_resource_len(pdev, 0);
4992
4993 err = -EIO;
4994 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
4995 if (!adapter->hw.hw_addr)
4996 goto err_ioremap;
4997
4998 if ((adapter->flags & FLAG_HAS_FLASH) &&
4999 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5000 flash_start = pci_resource_start(pdev, 1);
5001 flash_len = pci_resource_len(pdev, 1);
5002 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5003 if (!adapter->hw.flash_address)
5004 goto err_flashmap;
5005 }
5006
5007 /* construct the net_device struct */
651c2466 5008 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5009 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5010 netdev->watchdog_timeo = 5 * HZ;
5011 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5012 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5013
5014 netdev->mem_start = mmio_start;
5015 netdev->mem_end = mmio_start + mmio_len;
5016
5017 adapter->bd_number = cards_found++;
5018
4662e82b
BA		 5019 e1000e_check_options(adapter);
5020
bc7f75fa
AK		 5021 /* setup adapter struct */
5022 err = e1000_sw_init(adapter);
5023 if (err)
5024 goto err_sw_init;
5025
5026 err = -EIO;
5027
5028 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5029 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5030 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5031
69e3fd8c 5032 err = ei->get_variants(adapter);
bc7f75fa
AK		 5033 if (err)
5034 goto err_hw_init;
5035
4a770358
BA		 5036 if ((adapter->flags & FLAG_IS_ICH) &&
5037 (adapter->flags & FLAG_READ_ONLY_NVM))
5038 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5039
bc7f75fa
AK		 5040 hw->mac.ops.get_bus_info(&adapter->hw);
5041
318a94d6 5042 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5043
5044 /* Copper options */
318a94d6 5045 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5046 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5047 adapter->hw.phy.disable_polarity_correction = 0;
5048 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5049 }
5050
5051 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5052 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5053
5054 netdev->features = NETIF_F_SG |
5055 NETIF_F_HW_CSUM |
5056 NETIF_F_HW_VLAN_TX |
5057 NETIF_F_HW_VLAN_RX;
5058
5059 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5060 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5061
5062 netdev->features |= NETIF_F_TSO;
5063 netdev->features |= NETIF_F_TSO6;
5064
a5136e23
JK		 5065 netdev->vlan_features |= NETIF_F_TSO;
5066 netdev->vlan_features |= NETIF_F_TSO6;
5067 netdev->vlan_features |= NETIF_F_HW_CSUM;
5068 netdev->vlan_features |= NETIF_F_SG;
5069
bc7f75fa
AK		 5070 if (pci_using_dac)
5071 netdev->features |= NETIF_F_HIGHDMA;
5072
bc7f75fa
AK		 5073 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5074 adapter->flags |= FLAG_MNG_PT_ENABLED;
5075
ad68076e
BA		 5076 /*
5077 * before reading the NVM, reset the controller to
5078 * put the device in a known good starting state
5079 */
bc7f75fa
AK		 5080 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5081
5082 /*
5083 * systems with ASPM and others may see the checksum fail on the first
5084 * attempt. Let's give it a few tries
5085 */
5086 for (i = 0;; i++) {
5087 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5088 break;
5089 if (i == 2) {
44defeb3 5090 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5091 err = -EIO;
5092 goto err_eeprom;
5093 }
5094 }
5095
10aa4c04
AK		 5096 e1000_eeprom_checks(adapter);
5097
bc7f75fa
AK		 5098 /* copy the MAC address out of the NVM */
5099 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5100 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5101
5102 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5103 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5104
5105 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5106 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5107 err = -EIO;
5108 goto err_eeprom;
5109 }
5110
5111 init_timer(&adapter->watchdog_timer);
5112 adapter->watchdog_timer.function = &e1000_watchdog;
5113 adapter->watchdog_timer.data = (unsigned long) adapter;
5114
5115 init_timer(&adapter->phy_info_timer);
5116 adapter->phy_info_timer.function = &e1000_update_phy_info;
5117 adapter->phy_info_timer.data = (unsigned long) adapter;
5118
5119 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5120 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5121 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5122 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
bc7f75fa 5123
bc7f75fa
AK		 5124 /* Initialize link parameters. User can change them with ethtool */
5125 adapter->hw.mac.autoneg = 1;
309af40b 5126 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5127 adapter->hw.fc.requested_mode = e1000_fc_default;
5128 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5129 adapter->hw.phy.autoneg_advertised = 0x2f;
5130
5131 /* ring size defaults */
5132 adapter->rx_ring->count = 256;
5133 adapter->tx_ring->count = 256;
5134
5135 /*
5136 * Initial Wake on LAN setting - If APM wake is enabled in
5137 * the EEPROM, enable the ACPI Magic Packet filter
5138 */
5139 if (adapter->flags & FLAG_APME_IN_WUC) {
5140 /* APME bit in EEPROM is mapped to WUC.APME */
5141 eeprom_data = er32(WUC);
5142 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5143 if (eeprom_data & E1000_WUC_PHY_WAKE)
5144 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5145 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5146 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5147 (adapter->hw.bus.func == 1))
5148 e1000_read_nvm(&adapter->hw,
5149 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5150 else
5151 e1000_read_nvm(&adapter->hw,
5152 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5153 }
5154
5155 /* fetch WoL from EEPROM */
5156 if (eeprom_data & eeprom_apme_mask)
5157 adapter->eeprom_wol |= E1000_WUFC_MAG;
5158
5159 /*
5160 * now that we have the eeprom settings, apply the special cases
5161 * where the eeprom may be wrong or the board simply won't support
5162 * wake on lan on a particular port
5163 */
5164 if (!(adapter->flags & FLAG_HAS_WOL))
5165 adapter->eeprom_wol = 0;
5166
5167 /* initialize the wol settings based on the eeprom settings */
5168 adapter->wol = adapter->eeprom_wol;
6ff68026 5169 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5170
84527590
BA		 5171 /* save off EEPROM version number */
5172 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5173
bc7f75fa
AK		 5174 /* reset the hardware with the new settings */
5175 e1000e_reset(adapter);
5176
ad68076e
BA		 5177 /*
5178 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5179 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5180 * under the control of the driver.
5181 */
c43bc57e 5182 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5183 e1000_get_hw_control(adapter);
5184
bc7f75fa
AK		 5185 strcpy(netdev->name, "eth%d");
5186 err = register_netdev(netdev);
5187 if (err)
5188 goto err_register;
5189
9c563d20
JB		 5190 /* carrier off reporting is important to ethtool even BEFORE open */
5191 netif_carrier_off(netdev);
5192
bc7f75fa
AK		 5193 e1000_print_device_info(adapter);
5194
5195 return 0;
5196
5197err_register:
c43bc57e
JB		 5198 if (!(adapter->flags & FLAG_HAS_AMT))
5199 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5200err_eeprom:
5201 if (!e1000_check_reset_block(&adapter->hw))
5202 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5203err_hw_init:
bc7f75fa 5204
bc7f75fa
AK		 5205 kfree(adapter->tx_ring);
5206 kfree(adapter->rx_ring);
5207err_sw_init:
c43bc57e
JB		 5208 if (adapter->hw.flash_address)
5209 iounmap(adapter->hw.flash_address);
e82f54ba 5210 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5211err_flashmap:
bc7f75fa
AK		 5212 iounmap(adapter->hw.hw_addr);
5213err_ioremap:
5214 free_netdev(netdev);
5215err_alloc_etherdev:
f0f422e5
BA		 5216 pci_release_selected_regions(pdev,
5217 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5218err_pci_reg:
5219err_dma:
5220 pci_disable_device(pdev);
5221 return err;
5222}
5223
5224/**
5225 * e1000_remove - Device Removal Routine
5226 * @pdev: PCI device information struct
5227 *
5228 * e1000_remove is called by the PCI subsystem to alert the driver
5229 * that it should release a PCI device. The could be caused by a
5230 * Hot-Plug event, or because the driver is going to be removed from
5231 * memory.
5232 **/
5233static void __devexit e1000_remove(struct pci_dev *pdev)
5234{
5235 struct net_device *netdev = pci_get_drvdata(pdev);
5236 struct e1000_adapter *adapter = netdev_priv(netdev);
5237
ad68076e
BA		 5238 /*
5239 * flush_scheduled work may reschedule our watchdog task, so
5240 * explicitly disable watchdog tasks from being rescheduled
5241 */
bc7f75fa
AK		 5242 set_bit(__E1000_DOWN, &adapter->state);
5243 del_timer_sync(&adapter->watchdog_timer);
5244 del_timer_sync(&adapter->phy_info_timer);
5245
5246 flush_scheduled_work();
5247
ad68076e
BA		 5248 /*
5249 * Release control of h/w to f/w. If f/w is AMT enabled, this
5250 * would have already happened in close and is redundant.
5251 */
bc7f75fa
AK		 5252 e1000_release_hw_control(adapter);
5253
5254 unregister_netdev(netdev);
5255
5256 if (!e1000_check_reset_block(&adapter->hw))
5257 e1000_phy_hw_reset(&adapter->hw);
5258
4662e82b 5259 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5260 kfree(adapter->tx_ring);
5261 kfree(adapter->rx_ring);
5262
5263 iounmap(adapter->hw.hw_addr);
5264 if (adapter->hw.flash_address)
5265 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5266 pci_release_selected_regions(pdev,
5267 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5268
5269 free_netdev(netdev);
5270
111b9dc5 5271 /* AER disable */
19d5afd4 5272 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5273
bc7f75fa
AK		 5274 pci_disable_device(pdev);
5275}
5276
5277/* PCI Error Recovery (ERS) */
5278static struct pci_error_handlers e1000_err_handler = {
5279 .error_detected = e1000_io_error_detected,
5280 .slot_reset = e1000_io_slot_reset,
5281 .resume = e1000_io_resume,
5282};
5283
5284static struct pci_device_id e1000_pci_tbl[] = {
bc7f75fa
AK		 5285 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5286 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5287 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5288 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5289 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5290 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5291 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5292 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5293 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5294
bc7f75fa
AK		 5295 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5296 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5297 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5298 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5299
bc7f75fa
AK		 5300 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5301 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5302 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5303
4662e82b 5304 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5305 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5306 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5307
bc7f75fa
AK		 5308 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5309 board_80003es2lan },
5310 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5311 board_80003es2lan },
5312 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5313 board_80003es2lan },
5314 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5315 board_80003es2lan },
ad68076e 5316
bc7f75fa
AK		 5317 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5318 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5319 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5320 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5321 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5322 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5323 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
ad68076e 5324
bc7f75fa
AK		 5325 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5326 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5327 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5328 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5329 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5330 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5331 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5332 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5333 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5334
5335 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5336 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5337 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5338
f4187b56
BA		 5339 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5340 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5341
a4f58f54
BA		 5342 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5343 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5344 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5345 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5346
bc7f75fa
AK		 5347 { } /* terminate list */
5348};
5349MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5350
5351/* PCI Device API Driver */
5352static struct pci_driver e1000_driver = {
5353 .name = e1000e_driver_name,
5354 .id_table = e1000_pci_tbl,
5355 .probe = e1000_probe,
5356 .remove = __devexit_p(e1000_remove),
5357#ifdef CONFIG_PM
ad68076e 5358 /* Power Management Hooks */
bc7f75fa
AK		 5359 .suspend = e1000_suspend,
5360 .resume = e1000_resume,
5361#endif
5362 .shutdown = e1000_shutdown,
5363 .err_handler = &e1000_err_handler
5364};
5365
5366/**
5367 * e1000_init_module - Driver Registration Routine
5368 *
5369 * e1000_init_module is the first routine called when the driver is
5370 * loaded. All it does is register with the PCI subsystem.
5371 **/
5372static int __init e1000_init_module(void)
5373{
5374 int ret;
5375 printk(KERN_INFO "%s: Intel(R) PRO/1000 Network Driver - %s\n",
5376 e1000e_driver_name, e1000e_driver_version);
ad68076e 5377 printk(KERN_INFO "%s: Copyright (c) 1999-2008 Intel Corporation.\n",
bc7f75fa
AK		 5378 e1000e_driver_name);
5379 ret = pci_register_driver(&e1000_driver);
97ac8cae
BA		 5380 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name,
5381 PM_QOS_DEFAULT_VALUE);
5382
bc7f75fa
AK		 5383 return ret;
5384}
5385module_init(e1000_init_module);
5386
5387/**
5388 * e1000_exit_module - Driver Exit Cleanup Routine
5389 *
5390 * e1000_exit_module is called just before the driver is removed
5391 * from memory.
5392 **/
5393static void __exit e1000_exit_module(void)
5394{
5395 pci_unregister_driver(&e1000_driver);
97ac8cae 5396 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY, e1000e_driver_name);
bc7f75fa
AK		 5397}
5398module_exit(e1000_exit_module);
5399
5400
5401MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5402MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5403MODULE_LICENSE("GPL");
5404MODULE_VERSION(DRV_VERSION);
5405
5406/* e1000_main.c */
Clone of davem's net-next-2.6 tree