]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/net/e1000e/netdev.c
e1000e: save skb counts in TX to avoid cache misses
[net-next-2.6.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK
1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
c7e54b1b 4 Copyright(c) 1999 - 2009 Intel Corporation.
bc7f75fa
AK
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA
29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK
31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
5a0e3ad6 41#include <linux/slab.h>
bc7f75fa
AK
42#include <net/checksum.h>
43#include <net/ip6_checksum.h>
44#include <linux/mii.h>
45#include <linux/ethtool.h>
46#include <linux/if_vlan.h>
47#include <linux/cpu.h>
48#include <linux/smp.h>
97ac8cae 49#include <linux/pm_qos_params.h>
23606cf5 50#include <linux/pm_runtime.h>
111b9dc5 51#include <linux/aer.h>
bc7f75fa
AK
52
53#include "e1000.h"
54
3be8c940 55#define DRV_VERSION "1.0.2-k2"
bc7f75fa
AK
56char e1000e_driver_name[] = "e1000e";
57const char e1000e_driver_version[] = DRV_VERSION;
58
59static const struct e1000_info *e1000_info_tbl[] = {
60 [board_82571] = &e1000_82571_info,
61 [board_82572] = &e1000_82572_info,
62 [board_82573] = &e1000_82573_info,
4662e82b 63 [board_82574] = &e1000_82574_info,
8c81c9c3 64 [board_82583] = &e1000_82583_info,
bc7f75fa
AK
65 [board_80003es2lan] = &e1000_es2_info,
66 [board_ich8lan] = &e1000_ich8_info,
67 [board_ich9lan] = &e1000_ich9_info,
f4187b56 68 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 69 [board_pchlan] = &e1000_pch_info,
bc7f75fa
AK
70};
71
84f4ee90
TI
72struct e1000_reg_info {
73 u32 ofs;
74 char *name;
75};
76
77#define E1000_RDFH 0x02410 /* Rx Data FIFO Head - RW */
78#define E1000_RDFT 0x02418 /* Rx Data FIFO Tail - RW */
79#define E1000_RDFHS 0x02420 /* Rx Data FIFO Head Saved - RW */
80#define E1000_RDFTS 0x02428 /* Rx Data FIFO Tail Saved - RW */
81#define E1000_RDFPC 0x02430 /* Rx Data FIFO Packet Count - RW */
82
83#define E1000_TDFH 0x03410 /* Tx Data FIFO Head - RW */
84#define E1000_TDFT 0x03418 /* Tx Data FIFO Tail - RW */
85#define E1000_TDFHS 0x03420 /* Tx Data FIFO Head Saved - RW */
86#define E1000_TDFTS 0x03428 /* Tx Data FIFO Tail Saved - RW */
87#define E1000_TDFPC 0x03430 /* Tx Data FIFO Packet Count - RW */
88
89static const struct e1000_reg_info e1000_reg_info_tbl[] = {
90
91 /* General Registers */
92 {E1000_CTRL, "CTRL"},
93 {E1000_STATUS, "STATUS"},
94 {E1000_CTRL_EXT, "CTRL_EXT"},
95
96 /* Interrupt Registers */
97 {E1000_ICR, "ICR"},
98
99 /* RX Registers */
100 {E1000_RCTL, "RCTL"},
101 {E1000_RDLEN, "RDLEN"},
102 {E1000_RDH, "RDH"},
103 {E1000_RDT, "RDT"},
104 {E1000_RDTR, "RDTR"},
105 {E1000_RXDCTL(0), "RXDCTL"},
106 {E1000_ERT, "ERT"},
107 {E1000_RDBAL, "RDBAL"},
108 {E1000_RDBAH, "RDBAH"},
109 {E1000_RDFH, "RDFH"},
110 {E1000_RDFT, "RDFT"},
111 {E1000_RDFHS, "RDFHS"},
112 {E1000_RDFTS, "RDFTS"},
113 {E1000_RDFPC, "RDFPC"},
114
115 /* TX Registers */
116 {E1000_TCTL, "TCTL"},
117 {E1000_TDBAL, "TDBAL"},
118 {E1000_TDBAH, "TDBAH"},
119 {E1000_TDLEN, "TDLEN"},
120 {E1000_TDH, "TDH"},
121 {E1000_TDT, "TDT"},
122 {E1000_TIDV, "TIDV"},
123 {E1000_TXDCTL(0), "TXDCTL"},
124 {E1000_TADV, "TADV"},
125 {E1000_TARC(0), "TARC"},
126 {E1000_TDFH, "TDFH"},
127 {E1000_TDFT, "TDFT"},
128 {E1000_TDFHS, "TDFHS"},
129 {E1000_TDFTS, "TDFTS"},
130 {E1000_TDFPC, "TDFPC"},
131
132 /* List Terminator */
133 {}
134};
135
136/*
137 * e1000_regdump - register printout routine
138 */
139static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
140{
141 int n = 0;
142 char rname[16];
143 u32 regs[8];
144
145 switch (reginfo->ofs) {
146 case E1000_RXDCTL(0):
147 for (n = 0; n < 2; n++)
148 regs[n] = __er32(hw, E1000_RXDCTL(n));
149 break;
150 case E1000_TXDCTL(0):
151 for (n = 0; n < 2; n++)
152 regs[n] = __er32(hw, E1000_TXDCTL(n));
153 break;
154 case E1000_TARC(0):
155 for (n = 0; n < 2; n++)
156 regs[n] = __er32(hw, E1000_TARC(n));
157 break;
158 default:
159 printk(KERN_INFO "%-15s %08x\n",
160 reginfo->name, __er32(hw, reginfo->ofs));
161 return;
162 }
163
164 snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
165 printk(KERN_INFO "%-15s ", rname);
166 for (n = 0; n < 2; n++)
167 printk(KERN_CONT "%08x ", regs[n]);
168 printk(KERN_CONT "\n");
169}
170
171
172/*
173 * e1000e_dump - Print registers, tx-ring and rx-ring
174 */
175static void e1000e_dump(struct e1000_adapter *adapter)
176{
177 struct net_device *netdev = adapter->netdev;
178 struct e1000_hw *hw = &adapter->hw;
179 struct e1000_reg_info *reginfo;
180 struct e1000_ring *tx_ring = adapter->tx_ring;
181 struct e1000_tx_desc *tx_desc;
182 struct my_u0 { u64 a; u64 b; } *u0;
183 struct e1000_buffer *buffer_info;
184 struct e1000_ring *rx_ring = adapter->rx_ring;
185 union e1000_rx_desc_packet_split *rx_desc_ps;
186 struct e1000_rx_desc *rx_desc;
187 struct my_u1 { u64 a; u64 b; u64 c; u64 d; } *u1;
188 u32 staterr;
189 int i = 0;
190
191 if (!netif_msg_hw(adapter))
192 return;
193
194 /* Print netdevice Info */
195 if (netdev) {
196 dev_info(&adapter->pdev->dev, "Net device Info\n");
197 printk(KERN_INFO "Device Name state "
198 "trans_start last_rx\n");
199 printk(KERN_INFO "%-15s %016lX %016lX %016lX\n",
200 netdev->name,
201 netdev->state,
202 netdev->trans_start,
203 netdev->last_rx);
204 }
205
206 /* Print Registers */
207 dev_info(&adapter->pdev->dev, "Register Dump\n");
208 printk(KERN_INFO " Register Name Value\n");
209 for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
210 reginfo->name; reginfo++) {
211 e1000_regdump(hw, reginfo);
212 }
213
214 /* Print TX Ring Summary */
215 if (!netdev || !netif_running(netdev))
216 goto exit;
217
218 dev_info(&adapter->pdev->dev, "TX Rings Summary\n");
219 printk(KERN_INFO "Queue [NTU] [NTC] [bi(ntc)->dma ]"
220 " leng ntw timestamp\n");
221 buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
222 printk(KERN_INFO " %5d %5X %5X %016llX %04X %3X %016llX\n",
223 0, tx_ring->next_to_use, tx_ring->next_to_clean,
224 (u64)buffer_info->dma,
225 buffer_info->length,
226 buffer_info->next_to_watch,
227 (u64)buffer_info->time_stamp);
228
229 /* Print TX Rings */
230 if (!netif_msg_tx_done(adapter))
231 goto rx_ring_summary;
232
233 dev_info(&adapter->pdev->dev, "TX Rings Dump\n");
234
235 /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
236 *
237 * Legacy Transmit Descriptor
238 * +--------------------------------------------------------------+
239 * 0 | Buffer Address [63:0] (Reserved on Write Back) |
240 * +--------------------------------------------------------------+
241 * 8 | Special | CSS | Status | CMD | CSO | Length |
242 * +--------------------------------------------------------------+
243 * 63 48 47 36 35 32 31 24 23 16 15 0
244 *
245 * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
246 * 63 48 47 40 39 32 31 16 15 8 7 0
247 * +----------------------------------------------------------------+
248 * 0 | TUCSE | TUCS0 | TUCSS | IPCSE | IPCS0 | IPCSS |
249 * +----------------------------------------------------------------+
250 * 8 | MSS | HDRLEN | RSV | STA | TUCMD | DTYP | PAYLEN |
251 * +----------------------------------------------------------------+
252 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
253 *
254 * Extended Data Descriptor (DTYP=0x1)
255 * +----------------------------------------------------------------+
256 * 0 | Buffer Address [63:0] |
257 * +----------------------------------------------------------------+
258 * 8 | VLAN tag | POPTS | Rsvd | Status | Command | DTYP | DTALEN |
259 * +----------------------------------------------------------------+
260 * 63 48 47 40 39 36 35 32 31 24 23 20 19 0
261 */
262 printk(KERN_INFO "Tl[desc] [address 63:0 ] [SpeCssSCmCsLen]"
263 " [bi->dma ] leng ntw timestamp bi->skb "
264 "<-- Legacy format\n");
265 printk(KERN_INFO "Tc[desc] [Ce CoCsIpceCoS] [MssHlRSCm0Plen]"
266 " [bi->dma ] leng ntw timestamp bi->skb "
267 "<-- Ext Context format\n");
268 printk(KERN_INFO "Td[desc] [address 63:0 ] [VlaPoRSCm1Dlen]"
269 " [bi->dma ] leng ntw timestamp bi->skb "
270 "<-- Ext Data format\n");
271 for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
272 tx_desc = E1000_TX_DESC(*tx_ring, i);
273 buffer_info = &tx_ring->buffer_info[i];
274 u0 = (struct my_u0 *)tx_desc;
275 printk(KERN_INFO "T%c[0x%03X] %016llX %016llX %016llX "
276 "%04X %3X %016llX %p",
277 (!(le64_to_cpu(u0->b) & (1<<29)) ? 'l' :
278 ((le64_to_cpu(u0->b) & (1<<20)) ? 'd' : 'c')), i,
279 le64_to_cpu(u0->a), le64_to_cpu(u0->b),
280 (u64)buffer_info->dma, buffer_info->length,
281 buffer_info->next_to_watch, (u64)buffer_info->time_stamp,
282 buffer_info->skb);
283 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
284 printk(KERN_CONT " NTC/U\n");
285 else if (i == tx_ring->next_to_use)
286 printk(KERN_CONT " NTU\n");
287 else if (i == tx_ring->next_to_clean)
288 printk(KERN_CONT " NTC\n");
289 else
290 printk(KERN_CONT "\n");
291
292 if (netif_msg_pktdata(adapter) && buffer_info->dma != 0)
293 print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
294 16, 1, phys_to_virt(buffer_info->dma),
295 buffer_info->length, true);
296 }
297
298 /* Print RX Rings Summary */
299rx_ring_summary:
300 dev_info(&adapter->pdev->dev, "RX Rings Summary\n");
301 printk(KERN_INFO "Queue [NTU] [NTC]\n");
302 printk(KERN_INFO " %5d %5X %5X\n", 0,
303 rx_ring->next_to_use, rx_ring->next_to_clean);
304
305 /* Print RX Rings */
306 if (!netif_msg_rx_status(adapter))
307 goto exit;
308
309 dev_info(&adapter->pdev->dev, "RX Rings Dump\n");
310 switch (adapter->rx_ps_pages) {
311 case 1:
312 case 2:
313 case 3:
314 /* [Extended] Packet Split Receive Descriptor Format
315 *
316 * +-----------------------------------------------------+
317 * 0 | Buffer Address 0 [63:0] |
318 * +-----------------------------------------------------+
319 * 8 | Buffer Address 1 [63:0] |
320 * +-----------------------------------------------------+
321 * 16 | Buffer Address 2 [63:0] |
322 * +-----------------------------------------------------+
323 * 24 | Buffer Address 3 [63:0] |
324 * +-----------------------------------------------------+
325 */
326 printk(KERN_INFO "R [desc] [buffer 0 63:0 ] "
327 "[buffer 1 63:0 ] "
328 "[buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma ] "
329 "[bi->skb] <-- Ext Pkt Split format\n");
330 /* [Extended] Receive Descriptor (Write-Back) Format
331 *
332 * 63 48 47 32 31 13 12 8 7 4 3 0
333 * +------------------------------------------------------+
334 * 0 | Packet | IP | Rsvd | MRQ | Rsvd | MRQ RSS |
335 * | Checksum | Ident | | Queue | | Type |
336 * +------------------------------------------------------+
337 * 8 | VLAN Tag | Length | Extended Error | Extended Status |
338 * +------------------------------------------------------+
339 * 63 48 47 32 31 20 19 0
340 */
341 printk(KERN_INFO "RWB[desc] [ck ipid mrqhsh] "
342 "[vl l0 ee es] "
343 "[ l3 l2 l1 hs] [reserved ] ---------------- "
344 "[bi->skb] <-- Ext Rx Write-Back format\n");
345 for (i = 0; i < rx_ring->count; i++) {
346 buffer_info = &rx_ring->buffer_info[i];
347 rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
348 u1 = (struct my_u1 *)rx_desc_ps;
349 staterr =
350 le32_to_cpu(rx_desc_ps->wb.middle.status_error);
351 if (staterr & E1000_RXD_STAT_DD) {
352 /* Descriptor Done */
353 printk(KERN_INFO "RWB[0x%03X] %016llX "
354 "%016llX %016llX %016llX "
355 "---------------- %p", i,
356 le64_to_cpu(u1->a),
357 le64_to_cpu(u1->b),
358 le64_to_cpu(u1->c),
359 le64_to_cpu(u1->d),
360 buffer_info->skb);
361 } else {
362 printk(KERN_INFO "R [0x%03X] %016llX "
363 "%016llX %016llX %016llX %016llX %p", i,
364 le64_to_cpu(u1->a),
365 le64_to_cpu(u1->b),
366 le64_to_cpu(u1->c),
367 le64_to_cpu(u1->d),
368 (u64)buffer_info->dma,
369 buffer_info->skb);
370
371 if (netif_msg_pktdata(adapter))
372 print_hex_dump(KERN_INFO, "",
373 DUMP_PREFIX_ADDRESS, 16, 1,
374 phys_to_virt(buffer_info->dma),
375 adapter->rx_ps_bsize0, true);
376 }
377
378 if (i == rx_ring->next_to_use)
379 printk(KERN_CONT " NTU\n");
380 else if (i == rx_ring->next_to_clean)
381 printk(KERN_CONT " NTC\n");
382 else
383 printk(KERN_CONT "\n");
384 }
385 break;
386 default:
387 case 0:
388 /* Legacy Receive Descriptor Format
389 *
390 * +-----------------------------------------------------+
391 * | Buffer Address [63:0] |
392 * +-----------------------------------------------------+
393 * | VLAN Tag | Errors | Status 0 | Packet csum | Length |
394 * +-----------------------------------------------------+
395 * 63 48 47 40 39 32 31 16 15 0
396 */
397 printk(KERN_INFO "Rl[desc] [address 63:0 ] "
398 "[vl er S cks ln] [bi->dma ] [bi->skb] "
399 "<-- Legacy format\n");
400 for (i = 0; rx_ring->desc && (i < rx_ring->count); i++) {
401 rx_desc = E1000_RX_DESC(*rx_ring, i);
402 buffer_info = &rx_ring->buffer_info[i];
403 u0 = (struct my_u0 *)rx_desc;
404 printk(KERN_INFO "Rl[0x%03X] %016llX %016llX "
405 "%016llX %p",
406 i, le64_to_cpu(u0->a), le64_to_cpu(u0->b),
407 (u64)buffer_info->dma, buffer_info->skb);
408 if (i == rx_ring->next_to_use)
409 printk(KERN_CONT " NTU\n");
410 else if (i == rx_ring->next_to_clean)
411 printk(KERN_CONT " NTC\n");
412 else
413 printk(KERN_CONT "\n");
414
415 if (netif_msg_pktdata(adapter))
416 print_hex_dump(KERN_INFO, "",
417 DUMP_PREFIX_ADDRESS,
418 16, 1, phys_to_virt(buffer_info->dma),
419 adapter->rx_buffer_len, true);
420 }
421 }
422
423exit:
424 return;
425}
426
bc7f75fa
AK
427/**
428 * e1000_desc_unused - calculate if we have unused descriptors
429 **/
430static int e1000_desc_unused(struct e1000_ring *ring)
431{
432 if (ring->next_to_clean > ring->next_to_use)
433 return ring->next_to_clean - ring->next_to_use - 1;
434
435 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
436}
437
438/**
ad68076e 439 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK
440 * @adapter: board private structure
441 * @status: descriptor status field as written by hardware
442 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
443 * @skb: pointer to sk_buff to be indicated to stack
444 **/
445static void e1000_receive_skb(struct e1000_adapter *adapter,
446 struct net_device *netdev,
447 struct sk_buff *skb,
a39fe742 448 u8 status, __le16 vlan)
bc7f75fa
AK
449{
450 skb->protocol = eth_type_trans(skb, netdev);
451
452 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX
453 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
454 le16_to_cpu(vlan), skb);
bc7f75fa 455 else
89c88b16 456 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK
457}
458
459/**
460 * e1000_rx_checksum - Receive Checksum Offload for 82543
461 * @adapter: board private structure
462 * @status_err: receive descriptor status and error fields
463 * @csum: receive descriptor csum field
464 * @sk_buff: socket buffer with received data
465 **/
466static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
467 u32 csum, struct sk_buff *skb)
468{
469 u16 status = (u16)status_err;
470 u8 errors = (u8)(status_err >> 24);
471 skb->ip_summed = CHECKSUM_NONE;
472
473 /* Ignore Checksum bit is set */
474 if (status & E1000_RXD_STAT_IXSM)
475 return;
476 /* TCP/UDP checksum error bit is set */
477 if (errors & E1000_RXD_ERR_TCPE) {
478 /* let the stack verify checksum errors */
479 adapter->hw_csum_err++;
480 return;
481 }
482
483 /* TCP/UDP Checksum has not been calculated */
484 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
485 return;
486
487 /* It must be a TCP or UDP packet with a valid checksum */
488 if (status & E1000_RXD_STAT_TCPCS) {
489 /* TCP checksum is good */
490 skb->ip_summed = CHECKSUM_UNNECESSARY;
491 } else {
ad68076e
BA
492 /*
493 * IP fragment with UDP payload
494 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK
495 * and then put the value in host order for further stack use.
496 */
a39fe742
AV
497 __sum16 sum = (__force __sum16)htons(csum);
498 skb->csum = csum_unfold(~sum);
bc7f75fa
AK
499 skb->ip_summed = CHECKSUM_COMPLETE;
500 }
501 adapter->hw_csum_good++;
502}
503
504/**
505 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
506 * @adapter: address of board private structure
507 **/
508static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
509 int cleaned_count)
510{
511 struct net_device *netdev = adapter->netdev;
512 struct pci_dev *pdev = adapter->pdev;
513 struct e1000_ring *rx_ring = adapter->rx_ring;
514 struct e1000_rx_desc *rx_desc;
515 struct e1000_buffer *buffer_info;
516 struct sk_buff *skb;
517 unsigned int i;
89d71a66 518 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK
519
520 i = rx_ring->next_to_use;
521 buffer_info = &rx_ring->buffer_info[i];
522
523 while (cleaned_count--) {
524 skb = buffer_info->skb;
525 if (skb) {
526 skb_trim(skb, 0);
527 goto map_skb;
528 }
529
89d71a66 530 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK
531 if (!skb) {
532 /* Better luck next round */
533 adapter->alloc_rx_buff_failed++;
534 break;
535 }
536
bc7f75fa
AK
537 buffer_info->skb = skb;
538map_skb:
0be3f55f 539 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 540 adapter->rx_buffer_len,
0be3f55f
NN
541 DMA_FROM_DEVICE);
542 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK
543 dev_err(&pdev->dev, "RX DMA map failed\n");
544 adapter->rx_dma_failed++;
545 break;
546 }
547
548 rx_desc = E1000_RX_DESC(*rx_ring, i);
549 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
550
551 i++;
552 if (i == rx_ring->count)
553 i = 0;
554 buffer_info = &rx_ring->buffer_info[i];
555 }
556
557 if (rx_ring->next_to_use != i) {
558 rx_ring->next_to_use = i;
559 if (i-- == 0)
560 i = (rx_ring->count - 1);
561
ad68076e
BA
562 /*
563 * Force memory writes to complete before letting h/w
bc7f75fa
AK
564 * know there are new descriptors to fetch. (Only
565 * applicable for weak-ordered memory model archs,
ad68076e
BA
566 * such as IA-64).
567 */
bc7f75fa
AK
568 wmb();
569 writel(i, adapter->hw.hw_addr + rx_ring->tail);
570 }
571}
572
573/**
574 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
575 * @adapter: address of board private structure
576 **/
577static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
578 int cleaned_count)
579{
580 struct net_device *netdev = adapter->netdev;
581 struct pci_dev *pdev = adapter->pdev;
582 union e1000_rx_desc_packet_split *rx_desc;
583 struct e1000_ring *rx_ring = adapter->rx_ring;
584 struct e1000_buffer *buffer_info;
585 struct e1000_ps_page *ps_page;
586 struct sk_buff *skb;
587 unsigned int i, j;
588
589 i = rx_ring->next_to_use;
590 buffer_info = &rx_ring->buffer_info[i];
591
592 while (cleaned_count--) {
593 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
594
595 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK
596 ps_page = &buffer_info->ps_pages[j];
597 if (j >= adapter->rx_ps_pages) {
598 /* all unused desc entries get hw null ptr */
a39fe742 599 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK
600 continue;
601 }
602 if (!ps_page->page) {
603 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 604 if (!ps_page->page) {
47f44e40
AK
605 adapter->alloc_rx_buff_failed++;
606 goto no_buffers;
607 }
0be3f55f
NN
608 ps_page->dma = dma_map_page(&pdev->dev,
609 ps_page->page,
610 0, PAGE_SIZE,
611 DMA_FROM_DEVICE);
612 if (dma_mapping_error(&pdev->dev,
613 ps_page->dma)) {
47f44e40
AK
614 dev_err(&adapter->pdev->dev,
615 "RX DMA page map failed\n");
616 adapter->rx_dma_failed++;
617 goto no_buffers;
bc7f75fa 618 }
bc7f75fa 619 }
47f44e40
AK
620 /*
621 * Refresh the desc even if buffer_addrs
622 * didn't change because each write-back
623 * erases this info.
624 */
625 rx_desc->read.buffer_addr[j+1] =
626 cpu_to_le64(ps_page->dma);
bc7f75fa
AK
627 }
628
89d71a66
ED
629 skb = netdev_alloc_skb_ip_align(netdev,
630 adapter->rx_ps_bsize0);
bc7f75fa
AK
631
632 if (!skb) {
633 adapter->alloc_rx_buff_failed++;
634 break;
635 }
636
bc7f75fa 637 buffer_info->skb = skb;
0be3f55f 638 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
bc7f75fa 639 adapter->rx_ps_bsize0,
0be3f55f
NN
640 DMA_FROM_DEVICE);
641 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
bc7f75fa
AK
642 dev_err(&pdev->dev, "RX DMA map failed\n");
643 adapter->rx_dma_failed++;
644 /* cleanup skb */
645 dev_kfree_skb_any(skb);
646 buffer_info->skb = NULL;
647 break;
648 }
649
650 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
651
652 i++;
653 if (i == rx_ring->count)
654 i = 0;
655 buffer_info = &rx_ring->buffer_info[i];
656 }
657
658no_buffers:
659 if (rx_ring->next_to_use != i) {
660 rx_ring->next_to_use = i;
661
662 if (!(i--))
663 i = (rx_ring->count - 1);
664
ad68076e
BA
665 /*
666 * Force memory writes to complete before letting h/w
bc7f75fa
AK
667 * know there are new descriptors to fetch. (Only
668 * applicable for weak-ordered memory model archs,
ad68076e
BA
669 * such as IA-64).
670 */
bc7f75fa 671 wmb();
ad68076e
BA
672 /*
673 * Hardware increments by 16 bytes, but packet split
bc7f75fa
AK
674 * descriptors are 32 bytes...so we increment tail
675 * twice as much.
676 */
677 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
678 }
679}
680
97ac8cae
BA
681/**
682 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
683 * @adapter: address of board private structure
97ac8cae
BA
684 * @cleaned_count: number of buffers to allocate this pass
685 **/
686
687static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
688 int cleaned_count)
689{
690 struct net_device *netdev = adapter->netdev;
691 struct pci_dev *pdev = adapter->pdev;
692 struct e1000_rx_desc *rx_desc;
693 struct e1000_ring *rx_ring = adapter->rx_ring;
694 struct e1000_buffer *buffer_info;
695 struct sk_buff *skb;
696 unsigned int i;
89d71a66 697 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA
698
699 i = rx_ring->next_to_use;
700 buffer_info = &rx_ring->buffer_info[i];
701
702 while (cleaned_count--) {
703 skb = buffer_info->skb;
704 if (skb) {
705 skb_trim(skb, 0);
706 goto check_page;
707 }
708
89d71a66 709 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA
710 if (unlikely(!skb)) {
711 /* Better luck next round */
712 adapter->alloc_rx_buff_failed++;
713 break;
714 }
715
97ac8cae
BA
716 buffer_info->skb = skb;
717check_page:
718 /* allocate a new page if necessary */
719 if (!buffer_info->page) {
720 buffer_info->page = alloc_page(GFP_ATOMIC);
721 if (unlikely(!buffer_info->page)) {
722 adapter->alloc_rx_buff_failed++;
723 break;
724 }
725 }
726
727 if (!buffer_info->dma)
0be3f55f 728 buffer_info->dma = dma_map_page(&pdev->dev,
97ac8cae
BA
729 buffer_info->page, 0,
730 PAGE_SIZE,
0be3f55f 731 DMA_FROM_DEVICE);
97ac8cae
BA
732
733 rx_desc = E1000_RX_DESC(*rx_ring, i);
734 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
735
736 if (unlikely(++i == rx_ring->count))
737 i = 0;
738 buffer_info = &rx_ring->buffer_info[i];
739 }
740
741 if (likely(rx_ring->next_to_use != i)) {
742 rx_ring->next_to_use = i;
743 if (unlikely(i-- == 0))
744 i = (rx_ring->count - 1);
745
746 /* Force memory writes to complete before letting h/w
747 * know there are new descriptors to fetch. (Only
748 * applicable for weak-ordered memory model archs,
749 * such as IA-64). */
750 wmb();
751 writel(i, adapter->hw.hw_addr + rx_ring->tail);
752 }
753}
754
bc7f75fa
AK
755/**
756 * e1000_clean_rx_irq - Send received data up the network stack; legacy
757 * @adapter: board private structure
758 *
759 * the return value indicates whether actual cleaning was done, there
760 * is no guarantee that everything was cleaned
761 **/
762static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
763 int *work_done, int work_to_do)
764{
765 struct net_device *netdev = adapter->netdev;
766 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 767 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK
768 struct e1000_ring *rx_ring = adapter->rx_ring;
769 struct e1000_rx_desc *rx_desc, *next_rxd;
770 struct e1000_buffer *buffer_info, *next_buffer;
771 u32 length;
772 unsigned int i;
773 int cleaned_count = 0;
774 bool cleaned = 0;
775 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
776
777 i = rx_ring->next_to_clean;
778 rx_desc = E1000_RX_DESC(*rx_ring, i);
779 buffer_info = &rx_ring->buffer_info[i];
780
781 while (rx_desc->status & E1000_RXD_STAT_DD) {
782 struct sk_buff *skb;
783 u8 status;
784
785 if (*work_done >= work_to_do)
786 break;
787 (*work_done)++;
788
789 status = rx_desc->status;
790 skb = buffer_info->skb;
791 buffer_info->skb = NULL;
792
793 prefetch(skb->data - NET_IP_ALIGN);
794
795 i++;
796 if (i == rx_ring->count)
797 i = 0;
798 next_rxd = E1000_RX_DESC(*rx_ring, i);
799 prefetch(next_rxd);
800
801 next_buffer = &rx_ring->buffer_info[i];
802
803 cleaned = 1;
804 cleaned_count++;
0be3f55f 805 dma_unmap_single(&pdev->dev,
bc7f75fa
AK
806 buffer_info->dma,
807 adapter->rx_buffer_len,
0be3f55f 808 DMA_FROM_DEVICE);
bc7f75fa
AK
809 buffer_info->dma = 0;
810
811 length = le16_to_cpu(rx_desc->length);
812
b94b5028
JB
813 /*
814 * !EOP means multiple descriptors were used to store a single
815 * packet, if that's the case we need to toss it. In fact, we
816 * need to toss every packet with the EOP bit clear and the
817 * next frame that _does_ have the EOP bit set, as it is by
818 * definition only a frame fragment
819 */
820 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
821 adapter->flags2 |= FLAG2_IS_DISCARDING;
822
823 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 824 /* All receives must fit into a single buffer */
3bb99fe2 825 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK
826 /* recycle */
827 buffer_info->skb = skb;
b94b5028
JB
828 if (status & E1000_RXD_STAT_EOP)
829 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK
830 goto next_desc;
831 }
832
833 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
834 /* recycle */
835 buffer_info->skb = skb;
836 goto next_desc;
837 }
838
eb7c3adb
JK
839 /* adjust length to remove Ethernet CRC */
840 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
841 length -= 4;
842
bc7f75fa
AK
843 total_rx_bytes += length;
844 total_rx_packets++;
845
ad68076e
BA
846 /*
847 * code added for copybreak, this should improve
bc7f75fa 848 * performance for small packets with large amounts
ad68076e
BA
849 * of reassembly being done in the stack
850 */
bc7f75fa
AK
851 if (length < copybreak) {
852 struct sk_buff *new_skb =
89d71a66 853 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 854 if (new_skb) {
808ff676
BA
855 skb_copy_to_linear_data_offset(new_skb,
856 -NET_IP_ALIGN,
857 (skb->data -
858 NET_IP_ALIGN),
859 (length +
860 NET_IP_ALIGN));
bc7f75fa
AK
861 /* save the skb in buffer_info as good */
862 buffer_info->skb = skb;
863 skb = new_skb;
864 }
865 /* else just continue with the old one */
866 }
867 /* end copybreak code */
868 skb_put(skb, length);
869
870 /* Receive Checksum Offload */
871 e1000_rx_checksum(adapter,
872 (u32)(status) |
873 ((u32)(rx_desc->errors) << 24),
874 le16_to_cpu(rx_desc->csum), skb);
875
876 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
877
878next_desc:
879 rx_desc->status = 0;
880
881 /* return some buffers to hardware, one at a time is too slow */
882 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
883 adapter->alloc_rx_buf(adapter, cleaned_count);
884 cleaned_count = 0;
885 }
886
887 /* use prefetched values */
888 rx_desc = next_rxd;
889 buffer_info = next_buffer;
890 }
891 rx_ring->next_to_clean = i;
892
893 cleaned_count = e1000_desc_unused(rx_ring);
894 if (cleaned_count)
895 adapter->alloc_rx_buf(adapter, cleaned_count);
896
bc7f75fa 897 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 898 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK
899 netdev->stats.rx_bytes += total_rx_bytes;
900 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK
901 return cleaned;
902}
903
bc7f75fa
AK
904static void e1000_put_txbuf(struct e1000_adapter *adapter,
905 struct e1000_buffer *buffer_info)
906{
03b1320d
AD
907 if (buffer_info->dma) {
908 if (buffer_info->mapped_as_page)
0be3f55f
NN
909 dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
910 buffer_info->length, DMA_TO_DEVICE);
03b1320d 911 else
0be3f55f
NN
912 dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
913 buffer_info->length, DMA_TO_DEVICE);
03b1320d
AD
914 buffer_info->dma = 0;
915 }
bc7f75fa
AK
916 if (buffer_info->skb) {
917 dev_kfree_skb_any(buffer_info->skb);
918 buffer_info->skb = NULL;
919 }
1b7719c4 920 buffer_info->time_stamp = 0;
bc7f75fa
AK
921}
922
41cec6f1 923static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 924{
41cec6f1
BA
925 struct e1000_adapter *adapter = container_of(work,
926 struct e1000_adapter,
927 print_hang_task);
bc7f75fa
AK
928 struct e1000_ring *tx_ring = adapter->tx_ring;
929 unsigned int i = tx_ring->next_to_clean;
930 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
931 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA
932 struct e1000_hw *hw = &adapter->hw;
933 u16 phy_status, phy_1000t_status, phy_ext_status;
934 u16 pci_status;
935
936 e1e_rphy(hw, PHY_STATUS, &phy_status);
937 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
938 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 939
41cec6f1
BA
940 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
941
942 /* detected Hardware unit hang */
943 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK
944 " TDH <%x>\n"
945 " TDT <%x>\n"
946 " next_to_use <%x>\n"
947 " next_to_clean <%x>\n"
948 "buffer_info[next_to_clean]:\n"
949 " time_stamp <%lx>\n"
950 " next_to_watch <%x>\n"
951 " jiffies <%lx>\n"
41cec6f1
BA
952 " next_to_watch.status <%x>\n"
953 "MAC Status <%x>\n"
954 "PHY Status <%x>\n"
955 "PHY 1000BASE-T Status <%x>\n"
956 "PHY Extended Status <%x>\n"
957 "PCI Status <%x>\n",
44defeb3
JK
958 readl(adapter->hw.hw_addr + tx_ring->head),
959 readl(adapter->hw.hw_addr + tx_ring->tail),
960 tx_ring->next_to_use,
961 tx_ring->next_to_clean,
962 tx_ring->buffer_info[eop].time_stamp,
963 eop,
964 jiffies,
41cec6f1
BA
965 eop_desc->upper.fields.status,
966 er32(STATUS),
967 phy_status,
968 phy_1000t_status,
969 phy_ext_status,
970 pci_status);
bc7f75fa
AK
971}
972
973/**
974 * e1000_clean_tx_irq - Reclaim resources after transmit completes
975 * @adapter: board private structure
976 *
977 * the return value indicates whether actual cleaning was done, there
978 * is no guarantee that everything was cleaned
979 **/
980static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
981{
982 struct net_device *netdev = adapter->netdev;
983 struct e1000_hw *hw = &adapter->hw;
984 struct e1000_ring *tx_ring = adapter->tx_ring;
985 struct e1000_tx_desc *tx_desc, *eop_desc;
986 struct e1000_buffer *buffer_info;
987 unsigned int i, eop;
988 unsigned int count = 0;
bc7f75fa
AK
989 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
990
991 i = tx_ring->next_to_clean;
992 eop = tx_ring->buffer_info[i].next_to_watch;
993 eop_desc = E1000_TX_DESC(*tx_ring, eop);
994
12d04a3c
AD
995 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
996 (count < tx_ring->count)) {
a86043c2
JB
997 bool cleaned = false;
998 for (; !cleaned; count++) {
bc7f75fa
AK
999 tx_desc = E1000_TX_DESC(*tx_ring, i);
1000 buffer_info = &tx_ring->buffer_info[i];
1001 cleaned = (i == eop);
1002
1003 if (cleaned) {
9ed318d5
TH
1004 total_tx_packets += buffer_info->segs;
1005 total_tx_bytes += buffer_info->bytecount;
bc7f75fa
AK
1006 }
1007
1008 e1000_put_txbuf(adapter, buffer_info);
1009 tx_desc->upper.data = 0;
1010
1011 i++;
1012 if (i == tx_ring->count)
1013 i = 0;
1014 }
1015
dac87619
TL
1016 if (i == tx_ring->next_to_use)
1017 break;
bc7f75fa
AK
1018 eop = tx_ring->buffer_info[i].next_to_watch;
1019 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK
1020 }
1021
1022 tx_ring->next_to_clean = i;
1023
1024#define TX_WAKE_THRESHOLD 32
a86043c2
JB
1025 if (count && netif_carrier_ok(netdev) &&
1026 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK
1027 /* Make sure that anybody stopping the queue after this
1028 * sees the new next_to_clean.
1029 */
1030 smp_mb();
1031
1032 if (netif_queue_stopped(netdev) &&
1033 !(test_bit(__E1000_DOWN, &adapter->state))) {
1034 netif_wake_queue(netdev);
1035 ++adapter->restart_queue;
1036 }
1037 }
1038
1039 if (adapter->detect_tx_hung) {
41cec6f1
BA
1040 /*
1041 * Detect a transmit hang in hardware, this serializes the
1042 * check with the clearing of time_stamp and movement of i
1043 */
bc7f75fa 1044 adapter->detect_tx_hung = 0;
12d04a3c
AD
1045 if (tx_ring->buffer_info[i].time_stamp &&
1046 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP
1047 + (adapter->tx_timeout_factor * HZ)) &&
1048 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 1049 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK
1050 netif_stop_queue(netdev);
1051 }
1052 }
1053 adapter->total_tx_bytes += total_tx_bytes;
1054 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK
1055 netdev->stats.tx_bytes += total_tx_bytes;
1056 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 1057 return (count < tx_ring->count);
bc7f75fa
AK
1058}
1059
bc7f75fa
AK
1060/**
1061 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1062 * @adapter: board private structure
1063 *
1064 * the return value indicates whether actual cleaning was done, there
1065 * is no guarantee that everything was cleaned
1066 **/
1067static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
1068 int *work_done, int work_to_do)
1069{
3bb99fe2 1070 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK
1071 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1072 struct net_device *netdev = adapter->netdev;
1073 struct pci_dev *pdev = adapter->pdev;
1074 struct e1000_ring *rx_ring = adapter->rx_ring;
1075 struct e1000_buffer *buffer_info, *next_buffer;
1076 struct e1000_ps_page *ps_page;
1077 struct sk_buff *skb;
1078 unsigned int i, j;
1079 u32 length, staterr;
1080 int cleaned_count = 0;
1081 bool cleaned = 0;
1082 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1083
1084 i = rx_ring->next_to_clean;
1085 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1086 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1087 buffer_info = &rx_ring->buffer_info[i];
1088
1089 while (staterr & E1000_RXD_STAT_DD) {
1090 if (*work_done >= work_to_do)
1091 break;
1092 (*work_done)++;
1093 skb = buffer_info->skb;
1094
1095 /* in the packet split case this is header only */
1096 prefetch(skb->data - NET_IP_ALIGN);
1097
1098 i++;
1099 if (i == rx_ring->count)
1100 i = 0;
1101 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1102 prefetch(next_rxd);
1103
1104 next_buffer = &rx_ring->buffer_info[i];
1105
1106 cleaned = 1;
1107 cleaned_count++;
0be3f55f 1108 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1109 adapter->rx_ps_bsize0,
0be3f55f 1110 DMA_FROM_DEVICE);
bc7f75fa
AK
1111 buffer_info->dma = 0;
1112
b94b5028
JB
1113 /* see !EOP comment in other rx routine */
1114 if (!(staterr & E1000_RXD_STAT_EOP))
1115 adapter->flags2 |= FLAG2_IS_DISCARDING;
1116
1117 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA
1118 e_dbg("Packet Split buffers didn't pick up the full "
1119 "packet\n");
bc7f75fa 1120 dev_kfree_skb_irq(skb);
b94b5028
JB
1121 if (staterr & E1000_RXD_STAT_EOP)
1122 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK
1123 goto next_desc;
1124 }
1125
1126 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
1127 dev_kfree_skb_irq(skb);
1128 goto next_desc;
1129 }
1130
1131 length = le16_to_cpu(rx_desc->wb.middle.length0);
1132
1133 if (!length) {
3bb99fe2
BA
1134 e_dbg("Last part of the packet spanning multiple "
1135 "descriptors\n");
bc7f75fa
AK
1136 dev_kfree_skb_irq(skb);
1137 goto next_desc;
1138 }
1139
1140 /* Good Receive */
1141 skb_put(skb, length);
1142
1143 {
ad68076e
BA
1144 /*
1145 * this looks ugly, but it seems compiler issues make it
1146 * more efficient than reusing j
1147 */
bc7f75fa
AK
1148 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1149
ad68076e
BA
1150 /*
1151 * page alloc/put takes too long and effects small packet
1152 * throughput, so unsplit small packets and save the alloc/put
1153 * only valid in softirq (napi) context to call kmap_*
1154 */
bc7f75fa
AK
1155 if (l1 && (l1 <= copybreak) &&
1156 ((length + l1) <= adapter->rx_ps_bsize0)) {
1157 u8 *vaddr;
1158
47f44e40 1159 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 1160
ad68076e
BA
1161 /*
1162 * there is no documentation about how to call
bc7f75fa 1163 * kmap_atomic, so we can't hold the mapping
ad68076e
BA
1164 * very long
1165 */
0be3f55f
NN
1166 dma_sync_single_for_cpu(&pdev->dev, ps_page->dma,
1167 PAGE_SIZE, DMA_FROM_DEVICE);
bc7f75fa
AK
1168 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
1169 memcpy(skb_tail_pointer(skb), vaddr, l1);
1170 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
0be3f55f
NN
1171 dma_sync_single_for_device(&pdev->dev, ps_page->dma,
1172 PAGE_SIZE, DMA_FROM_DEVICE);
140a7480 1173
eb7c3adb
JK
1174 /* remove the CRC */
1175 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1176 l1 -= 4;
1177
bc7f75fa
AK
1178 skb_put(skb, l1);
1179 goto copydone;
1180 } /* if */
1181 }
1182
1183 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1184 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1185 if (!length)
1186 break;
1187
47f44e40 1188 ps_page = &buffer_info->ps_pages[j];
0be3f55f
NN
1189 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1190 DMA_FROM_DEVICE);
bc7f75fa
AK
1191 ps_page->dma = 0;
1192 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1193 ps_page->page = NULL;
1194 skb->len += length;
1195 skb->data_len += length;
1196 skb->truesize += length;
1197 }
1198
eb7c3adb
JK
1199 /* strip the ethernet crc, problem is we're using pages now so
1200 * this whole operation can get a little cpu intensive
1201 */
1202 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
1203 pskb_trim(skb, skb->len - 4);
1204
bc7f75fa
AK
1205copydone:
1206 total_rx_bytes += skb->len;
1207 total_rx_packets++;
1208
1209 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
1210 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
1211
1212 if (rx_desc->wb.upper.header_status &
1213 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1214 adapter->rx_hdr_split++;
1215
1216 e1000_receive_skb(adapter, netdev, skb,
1217 staterr, rx_desc->wb.middle.vlan);
1218
1219next_desc:
1220 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1221 buffer_info->skb = NULL;
1222
1223 /* return some buffers to hardware, one at a time is too slow */
1224 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1225 adapter->alloc_rx_buf(adapter, cleaned_count);
1226 cleaned_count = 0;
1227 }
1228
1229 /* use prefetched values */
1230 rx_desc = next_rxd;
1231 buffer_info = next_buffer;
1232
1233 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1234 }
1235 rx_ring->next_to_clean = i;
1236
1237 cleaned_count = e1000_desc_unused(rx_ring);
1238 if (cleaned_count)
1239 adapter->alloc_rx_buf(adapter, cleaned_count);
1240
bc7f75fa 1241 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 1242 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK
1243 netdev->stats.rx_bytes += total_rx_bytes;
1244 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK
1245 return cleaned;
1246}
1247
97ac8cae
BA
1248/**
1249 * e1000_consume_page - helper function
1250 **/
1251static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1252 u16 length)
1253{
1254 bi->page = NULL;
1255 skb->len += length;
1256 skb->data_len += length;
1257 skb->truesize += length;
1258}
1259
1260/**
1261 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1262 * @adapter: board private structure
1263 *
1264 * the return value indicates whether actual cleaning was done, there
1265 * is no guarantee that everything was cleaned
1266 **/
1267
1268static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
1269 int *work_done, int work_to_do)
1270{
1271 struct net_device *netdev = adapter->netdev;
1272 struct pci_dev *pdev = adapter->pdev;
1273 struct e1000_ring *rx_ring = adapter->rx_ring;
1274 struct e1000_rx_desc *rx_desc, *next_rxd;
1275 struct e1000_buffer *buffer_info, *next_buffer;
1276 u32 length;
1277 unsigned int i;
1278 int cleaned_count = 0;
1279 bool cleaned = false;
1280 unsigned int total_rx_bytes=0, total_rx_packets=0;
1281
1282 i = rx_ring->next_to_clean;
1283 rx_desc = E1000_RX_DESC(*rx_ring, i);
1284 buffer_info = &rx_ring->buffer_info[i];
1285
1286 while (rx_desc->status & E1000_RXD_STAT_DD) {
1287 struct sk_buff *skb;
1288 u8 status;
1289
1290 if (*work_done >= work_to_do)
1291 break;
1292 (*work_done)++;
1293
1294 status = rx_desc->status;
1295 skb = buffer_info->skb;
1296 buffer_info->skb = NULL;
1297
1298 ++i;
1299 if (i == rx_ring->count)
1300 i = 0;
1301 next_rxd = E1000_RX_DESC(*rx_ring, i);
1302 prefetch(next_rxd);
1303
1304 next_buffer = &rx_ring->buffer_info[i];
1305
1306 cleaned = true;
1307 cleaned_count++;
0be3f55f
NN
1308 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1309 DMA_FROM_DEVICE);
97ac8cae
BA
1310 buffer_info->dma = 0;
1311
1312 length = le16_to_cpu(rx_desc->length);
1313
1314 /* errors is only valid for DD + EOP descriptors */
1315 if (unlikely((status & E1000_RXD_STAT_EOP) &&
1316 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
1317 /* recycle both page and skb */
1318 buffer_info->skb = skb;
1319 /* an error means any chain goes out the window
1320 * too */
1321 if (rx_ring->rx_skb_top)
1322 dev_kfree_skb(rx_ring->rx_skb_top);
1323 rx_ring->rx_skb_top = NULL;
1324 goto next_desc;
1325 }
1326
1327#define rxtop rx_ring->rx_skb_top
1328 if (!(status & E1000_RXD_STAT_EOP)) {
1329 /* this descriptor is only the beginning (or middle) */
1330 if (!rxtop) {
1331 /* this is the beginning of a chain */
1332 rxtop = skb;
1333 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1334 0, length);
1335 } else {
1336 /* this is the middle of a chain */
1337 skb_fill_page_desc(rxtop,
1338 skb_shinfo(rxtop)->nr_frags,
1339 buffer_info->page, 0, length);
1340 /* re-use the skb, only consumed the page */
1341 buffer_info->skb = skb;
1342 }
1343 e1000_consume_page(buffer_info, rxtop, length);
1344 goto next_desc;
1345 } else {
1346 if (rxtop) {
1347 /* end of the chain */
1348 skb_fill_page_desc(rxtop,
1349 skb_shinfo(rxtop)->nr_frags,
1350 buffer_info->page, 0, length);
1351 /* re-use the current skb, we only consumed the
1352 * page */
1353 buffer_info->skb = skb;
1354 skb = rxtop;
1355 rxtop = NULL;
1356 e1000_consume_page(buffer_info, skb, length);
1357 } else {
1358 /* no chain, got EOP, this buf is the packet
1359 * copybreak to save the put_page/alloc_page */
1360 if (length <= copybreak &&
1361 skb_tailroom(skb) >= length) {
1362 u8 *vaddr;
1363 vaddr = kmap_atomic(buffer_info->page,
1364 KM_SKB_DATA_SOFTIRQ);
1365 memcpy(skb_tail_pointer(skb), vaddr,
1366 length);
1367 kunmap_atomic(vaddr,
1368 KM_SKB_DATA_SOFTIRQ);
1369 /* re-use the page, so don't erase
1370 * buffer_info->page */
1371 skb_put(skb, length);
1372 } else {
1373 skb_fill_page_desc(skb, 0,
1374 buffer_info->page, 0,
1375 length);
1376 e1000_consume_page(buffer_info, skb,
1377 length);
1378 }
1379 }
1380 }
1381
1382 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1383 e1000_rx_checksum(adapter,
1384 (u32)(status) |
1385 ((u32)(rx_desc->errors) << 24),
1386 le16_to_cpu(rx_desc->csum), skb);
1387
1388 /* probably a little skewed due to removing CRC */
1389 total_rx_bytes += skb->len;
1390 total_rx_packets++;
1391
1392 /* eth type trans needs skb->data to point to something */
1393 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1394 e_err("pskb_may_pull failed.\n");
97ac8cae
BA
1395 dev_kfree_skb(skb);
1396 goto next_desc;
1397 }
1398
1399 e1000_receive_skb(adapter, netdev, skb, status,
1400 rx_desc->special);
1401
1402next_desc:
1403 rx_desc->status = 0;
1404
1405 /* return some buffers to hardware, one at a time is too slow */
1406 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1407 adapter->alloc_rx_buf(adapter, cleaned_count);
1408 cleaned_count = 0;
1409 }
1410
1411 /* use prefetched values */
1412 rx_desc = next_rxd;
1413 buffer_info = next_buffer;
1414 }
1415 rx_ring->next_to_clean = i;
1416
1417 cleaned_count = e1000_desc_unused(rx_ring);
1418 if (cleaned_count)
1419 adapter->alloc_rx_buf(adapter, cleaned_count);
1420
1421 adapter->total_rx_bytes += total_rx_bytes;
1422 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK
1423 netdev->stats.rx_bytes += total_rx_bytes;
1424 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA
1425 return cleaned;
1426}
1427
bc7f75fa
AK
1428/**
1429 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1430 * @adapter: board private structure
1431 **/
1432static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1433{
1434 struct e1000_ring *rx_ring = adapter->rx_ring;
1435 struct e1000_buffer *buffer_info;
1436 struct e1000_ps_page *ps_page;
1437 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK
1438 unsigned int i, j;
1439
1440 /* Free all the Rx ring sk_buffs */
1441 for (i = 0; i < rx_ring->count; i++) {
1442 buffer_info = &rx_ring->buffer_info[i];
1443 if (buffer_info->dma) {
1444 if (adapter->clean_rx == e1000_clean_rx_irq)
0be3f55f 1445 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1446 adapter->rx_buffer_len,
0be3f55f 1447 DMA_FROM_DEVICE);
97ac8cae 1448 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
0be3f55f 1449 dma_unmap_page(&pdev->dev, buffer_info->dma,
97ac8cae 1450 PAGE_SIZE,
0be3f55f 1451 DMA_FROM_DEVICE);
bc7f75fa 1452 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
0be3f55f 1453 dma_unmap_single(&pdev->dev, buffer_info->dma,
bc7f75fa 1454 adapter->rx_ps_bsize0,
0be3f55f 1455 DMA_FROM_DEVICE);
bc7f75fa
AK
1456 buffer_info->dma = 0;
1457 }
1458
97ac8cae
BA
1459 if (buffer_info->page) {
1460 put_page(buffer_info->page);
1461 buffer_info->page = NULL;
1462 }
1463
bc7f75fa
AK
1464 if (buffer_info->skb) {
1465 dev_kfree_skb(buffer_info->skb);
1466 buffer_info->skb = NULL;
1467 }
1468
1469 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1470 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK
1471 if (!ps_page->page)
1472 break;
0be3f55f
NN
1473 dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1474 DMA_FROM_DEVICE);
bc7f75fa
AK
1475 ps_page->dma = 0;
1476 put_page(ps_page->page);
1477 ps_page->page = NULL;
1478 }
1479 }
1480
1481 /* there also may be some cached data from a chained receive */
1482 if (rx_ring->rx_skb_top) {
1483 dev_kfree_skb(rx_ring->rx_skb_top);
1484 rx_ring->rx_skb_top = NULL;
1485 }
1486
bc7f75fa
AK
1487 /* Zero out the descriptor ring */
1488 memset(rx_ring->desc, 0, rx_ring->size);
1489
1490 rx_ring->next_to_clean = 0;
1491 rx_ring->next_to_use = 0;
b94b5028 1492 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK
1493
1494 writel(0, adapter->hw.hw_addr + rx_ring->head);
1495 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1496}
1497
a8f88ff5
JB
1498static void e1000e_downshift_workaround(struct work_struct *work)
1499{
1500 struct e1000_adapter *adapter = container_of(work,
1501 struct e1000_adapter, downshift_task);
1502
1503 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1504}
1505
bc7f75fa
AK
1506/**
1507 * e1000_intr_msi - Interrupt Handler
1508 * @irq: interrupt number
1509 * @data: pointer to a network interface device structure
1510 **/
1511static irqreturn_t e1000_intr_msi(int irq, void *data)
1512{
1513 struct net_device *netdev = data;
1514 struct e1000_adapter *adapter = netdev_priv(netdev);
1515 struct e1000_hw *hw = &adapter->hw;
1516 u32 icr = er32(ICR);
1517
ad68076e
BA
1518 /*
1519 * read ICR disables interrupts using IAM
1520 */
bc7f75fa 1521
573cca8c 1522 if (icr & E1000_ICR_LSC) {
bc7f75fa 1523 hw->mac.get_link_status = 1;
ad68076e
BA
1524 /*
1525 * ICH8 workaround-- Call gig speed drop workaround on cable
1526 * disconnect (LSC) before accessing any PHY registers
1527 */
bc7f75fa
AK
1528 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1529 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1530 schedule_work(&adapter->downshift_task);
bc7f75fa 1531
ad68076e
BA
1532 /*
1533 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1534 * link down event; disable receives here in the ISR and reset
ad68076e
BA
1535 * adapter in watchdog
1536 */
bc7f75fa
AK
1537 if (netif_carrier_ok(netdev) &&
1538 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1539 /* disable receives */
1540 u32 rctl = er32(RCTL);
1541 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1542 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK
1543 }
1544 /* guard against interrupt when we're going down */
1545 if (!test_bit(__E1000_DOWN, &adapter->state))
1546 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1547 }
1548
288379f0 1549 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK
1550 adapter->total_tx_bytes = 0;
1551 adapter->total_tx_packets = 0;
1552 adapter->total_rx_bytes = 0;
1553 adapter->total_rx_packets = 0;
288379f0 1554 __napi_schedule(&adapter->napi);
bc7f75fa
AK
1555 }
1556
1557 return IRQ_HANDLED;
1558}
1559
1560/**
1561 * e1000_intr - Interrupt Handler
1562 * @irq: interrupt number
1563 * @data: pointer to a network interface device structure
1564 **/
1565static irqreturn_t e1000_intr(int irq, void *data)
1566{
1567 struct net_device *netdev = data;
1568 struct e1000_adapter *adapter = netdev_priv(netdev);
1569 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1570 u32 rctl, icr = er32(ICR);
4662e82b 1571
a68ea775 1572 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK
1573 return IRQ_NONE; /* Not our interrupt */
1574
ad68076e
BA
1575 /*
1576 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1577 * not set, then the adapter didn't send an interrupt
1578 */
bc7f75fa
AK
1579 if (!(icr & E1000_ICR_INT_ASSERTED))
1580 return IRQ_NONE;
1581
ad68076e
BA
1582 /*
1583 * Interrupt Auto-Mask...upon reading ICR,
1584 * interrupts are masked. No need for the
1585 * IMC write
1586 */
bc7f75fa 1587
573cca8c 1588 if (icr & E1000_ICR_LSC) {
bc7f75fa 1589 hw->mac.get_link_status = 1;
ad68076e
BA
1590 /*
1591 * ICH8 workaround-- Call gig speed drop workaround on cable
1592 * disconnect (LSC) before accessing any PHY registers
1593 */
bc7f75fa
AK
1594 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1595 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1596 schedule_work(&adapter->downshift_task);
bc7f75fa 1597
ad68076e
BA
1598 /*
1599 * 80003ES2LAN workaround--
bc7f75fa
AK
1600 * For packet buffer work-around on link down event;
1601 * disable receives here in the ISR and
1602 * reset adapter in watchdog
1603 */
1604 if (netif_carrier_ok(netdev) &&
1605 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1606 /* disable receives */
1607 rctl = er32(RCTL);
1608 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1609 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK
1610 }
1611 /* guard against interrupt when we're going down */
1612 if (!test_bit(__E1000_DOWN, &adapter->state))
1613 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1614 }
1615
288379f0 1616 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK
1617 adapter->total_tx_bytes = 0;
1618 adapter->total_tx_packets = 0;
1619 adapter->total_rx_bytes = 0;
1620 adapter->total_rx_packets = 0;
288379f0 1621 __napi_schedule(&adapter->napi);
bc7f75fa
AK
1622 }
1623
1624 return IRQ_HANDLED;
1625}
1626
4662e82b
BA
1627static irqreturn_t e1000_msix_other(int irq, void *data)
1628{
1629 struct net_device *netdev = data;
1630 struct e1000_adapter *adapter = netdev_priv(netdev);
1631 struct e1000_hw *hw = &adapter->hw;
1632 u32 icr = er32(ICR);
1633
1634 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB
1635 if (!test_bit(__E1000_DOWN, &adapter->state))
1636 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA
1637 return IRQ_NONE;
1638 }
1639
1640 if (icr & adapter->eiac_mask)
1641 ew32(ICS, (icr & adapter->eiac_mask));
1642
1643 if (icr & E1000_ICR_OTHER) {
1644 if (!(icr & E1000_ICR_LSC))
1645 goto no_link_interrupt;
1646 hw->mac.get_link_status = 1;
1647 /* guard against interrupt when we're going down */
1648 if (!test_bit(__E1000_DOWN, &adapter->state))
1649 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1650 }
1651
1652no_link_interrupt:
a3c69fef
JB
1653 if (!test_bit(__E1000_DOWN, &adapter->state))
1654 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA
1655
1656 return IRQ_HANDLED;
1657}
1658
1659
1660static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1661{
1662 struct net_device *netdev = data;
1663 struct e1000_adapter *adapter = netdev_priv(netdev);
1664 struct e1000_hw *hw = &adapter->hw;
1665 struct e1000_ring *tx_ring = adapter->tx_ring;
1666
1667
1668 adapter->total_tx_bytes = 0;
1669 adapter->total_tx_packets = 0;
1670
1671 if (!e1000_clean_tx_irq(adapter))
1672 /* Ring was not completely cleaned, so fire another interrupt */
1673 ew32(ICS, tx_ring->ims_val);
1674
1675 return IRQ_HANDLED;
1676}
1677
1678static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1679{
1680 struct net_device *netdev = data;
1681 struct e1000_adapter *adapter = netdev_priv(netdev);
1682
1683 /* Write the ITR value calculated at the end of the
1684 * previous interrupt.
1685 */
1686 if (adapter->rx_ring->set_itr) {
1687 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1688 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1689 adapter->rx_ring->set_itr = 0;
1690 }
1691
288379f0 1692 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA
1693 adapter->total_rx_bytes = 0;
1694 adapter->total_rx_packets = 0;
288379f0 1695 __napi_schedule(&adapter->napi);
4662e82b
BA
1696 }
1697 return IRQ_HANDLED;
1698}
1699
1700/**
1701 * e1000_configure_msix - Configure MSI-X hardware
1702 *
1703 * e1000_configure_msix sets up the hardware to properly
1704 * generate MSI-X interrupts.
1705 **/
1706static void e1000_configure_msix(struct e1000_adapter *adapter)
1707{
1708 struct e1000_hw *hw = &adapter->hw;
1709 struct e1000_ring *rx_ring = adapter->rx_ring;
1710 struct e1000_ring *tx_ring = adapter->tx_ring;
1711 int vector = 0;
1712 u32 ctrl_ext, ivar = 0;
1713
1714 adapter->eiac_mask = 0;
1715
1716 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1717 if (hw->mac.type == e1000_82574) {
1718 u32 rfctl = er32(RFCTL);
1719 rfctl |= E1000_RFCTL_ACK_DIS;
1720 ew32(RFCTL, rfctl);
1721 }
1722
1723#define E1000_IVAR_INT_ALLOC_VALID 0x8
1724 /* Configure Rx vector */
1725 rx_ring->ims_val = E1000_IMS_RXQ0;
1726 adapter->eiac_mask |= rx_ring->ims_val;
1727 if (rx_ring->itr_val)
1728 writel(1000000000 / (rx_ring->itr_val * 256),
1729 hw->hw_addr + rx_ring->itr_register);
1730 else
1731 writel(1, hw->hw_addr + rx_ring->itr_register);
1732 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1733
1734 /* Configure Tx vector */
1735 tx_ring->ims_val = E1000_IMS_TXQ0;
1736 vector++;
1737 if (tx_ring->itr_val)
1738 writel(1000000000 / (tx_ring->itr_val * 256),
1739 hw->hw_addr + tx_ring->itr_register);
1740 else
1741 writel(1, hw->hw_addr + tx_ring->itr_register);
1742 adapter->eiac_mask |= tx_ring->ims_val;
1743 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1744
1745 /* set vector for Other Causes, e.g. link changes */
1746 vector++;
1747 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1748 if (rx_ring->itr_val)
1749 writel(1000000000 / (rx_ring->itr_val * 256),
1750 hw->hw_addr + E1000_EITR_82574(vector));
1751 else
1752 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1753
1754 /* Cause Tx interrupts on every write back */
1755 ivar |= (1 << 31);
1756
1757 ew32(IVAR, ivar);
1758
1759 /* enable MSI-X PBA support */
1760 ctrl_ext = er32(CTRL_EXT);
1761 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1762
1763 /* Auto-Mask Other interrupts upon ICR read */
1764#define E1000_EIAC_MASK_82574 0x01F00000
1765 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1766 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1767 ew32(CTRL_EXT, ctrl_ext);
1768 e1e_flush();
1769}
1770
1771void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1772{
1773 if (adapter->msix_entries) {
1774 pci_disable_msix(adapter->pdev);
1775 kfree(adapter->msix_entries);
1776 adapter->msix_entries = NULL;
1777 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1778 pci_disable_msi(adapter->pdev);
1779 adapter->flags &= ~FLAG_MSI_ENABLED;
1780 }
1781
1782 return;
1783}
1784
1785/**
1786 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1787 *
1788 * Attempt to configure interrupts using the best available
1789 * capabilities of the hardware and kernel.
1790 **/
1791void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1792{
1793 int err;
1794 int numvecs, i;
1795
1796
1797 switch (adapter->int_mode) {
1798 case E1000E_INT_MODE_MSIX:
1799 if (adapter->flags & FLAG_HAS_MSIX) {
1800 numvecs = 3; /* RxQ0, TxQ0 and other */
1801 adapter->msix_entries = kcalloc(numvecs,
1802 sizeof(struct msix_entry),
1803 GFP_KERNEL);
1804 if (adapter->msix_entries) {
1805 for (i = 0; i < numvecs; i++)
1806 adapter->msix_entries[i].entry = i;
1807
1808 err = pci_enable_msix(adapter->pdev,
1809 adapter->msix_entries,
1810 numvecs);
1811 if (err == 0)
1812 return;
1813 }
1814 /* MSI-X failed, so fall through and try MSI */
1815 e_err("Failed to initialize MSI-X interrupts. "
1816 "Falling back to MSI interrupts.\n");
1817 e1000e_reset_interrupt_capability(adapter);
1818 }
1819 adapter->int_mode = E1000E_INT_MODE_MSI;
1820 /* Fall through */
1821 case E1000E_INT_MODE_MSI:
1822 if (!pci_enable_msi(adapter->pdev)) {
1823 adapter->flags |= FLAG_MSI_ENABLED;
1824 } else {
1825 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1826 e_err("Failed to initialize MSI interrupts. Falling "
1827 "back to legacy interrupts.\n");
1828 }
1829 /* Fall through */
1830 case E1000E_INT_MODE_LEGACY:
1831 /* Don't do anything; this is the system default */
1832 break;
1833 }
1834
1835 return;
1836}
1837
1838/**
1839 * e1000_request_msix - Initialize MSI-X interrupts
1840 *
1841 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1842 * kernel.
1843 **/
1844static int e1000_request_msix(struct e1000_adapter *adapter)
1845{
1846 struct net_device *netdev = adapter->netdev;
1847 int err = 0, vector = 0;
1848
1849 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1850 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA
1851 else
1852 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1853 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1854 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA
1855 netdev);
1856 if (err)
1857 goto out;
1858 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1859 adapter->rx_ring->itr_val = adapter->itr;
1860 vector++;
1861
1862 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1863 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA
1864 else
1865 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1866 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1867 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA
1868 netdev);
1869 if (err)
1870 goto out;
1871 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1872 adapter->tx_ring->itr_val = adapter->itr;
1873 vector++;
1874
1875 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1876 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA
1877 if (err)
1878 goto out;
1879
1880 e1000_configure_msix(adapter);
1881 return 0;
1882out:
1883 return err;
1884}
1885
f8d59f78
BA
1886/**
1887 * e1000_request_irq - initialize interrupts
1888 *
1889 * Attempts to configure interrupts using the best available
1890 * capabilities of the hardware and kernel.
1891 **/
bc7f75fa
AK
1892static int e1000_request_irq(struct e1000_adapter *adapter)
1893{
1894 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK
1895 int err;
1896
4662e82b
BA
1897 if (adapter->msix_entries) {
1898 err = e1000_request_msix(adapter);
1899 if (!err)
1900 return err;
1901 /* fall back to MSI */
1902 e1000e_reset_interrupt_capability(adapter);
1903 adapter->int_mode = E1000E_INT_MODE_MSI;
1904 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1905 }
4662e82b 1906 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1907 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA
1908 netdev->name, netdev);
1909 if (!err)
1910 return err;
bc7f75fa 1911
4662e82b
BA
1912 /* fall back to legacy interrupt */
1913 e1000e_reset_interrupt_capability(adapter);
1914 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK
1915 }
1916
a0607fd3 1917 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA
1918 netdev->name, netdev);
1919 if (err)
1920 e_err("Unable to allocate interrupt, Error: %d\n", err);
1921
bc7f75fa
AK
1922 return err;
1923}
1924
1925static void e1000_free_irq(struct e1000_adapter *adapter)
1926{
1927 struct net_device *netdev = adapter->netdev;
1928
4662e82b
BA
1929 if (adapter->msix_entries) {
1930 int vector = 0;
1931
1932 free_irq(adapter->msix_entries[vector].vector, netdev);
1933 vector++;
1934
1935 free_irq(adapter->msix_entries[vector].vector, netdev);
1936 vector++;
1937
1938 /* Other Causes interrupt vector */
1939 free_irq(adapter->msix_entries[vector].vector, netdev);
1940 return;
bc7f75fa 1941 }
4662e82b
BA
1942
1943 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK
1944}
1945
1946/**
1947 * e1000_irq_disable - Mask off interrupt generation on the NIC
1948 **/
1949static void e1000_irq_disable(struct e1000_adapter *adapter)
1950{
1951 struct e1000_hw *hw = &adapter->hw;
1952
bc7f75fa 1953 ew32(IMC, ~0);
4662e82b
BA
1954 if (adapter->msix_entries)
1955 ew32(EIAC_82574, 0);
bc7f75fa
AK
1956 e1e_flush();
1957 synchronize_irq(adapter->pdev->irq);
1958}
1959
1960/**
1961 * e1000_irq_enable - Enable default interrupt generation settings
1962 **/
1963static void e1000_irq_enable(struct e1000_adapter *adapter)
1964{
1965 struct e1000_hw *hw = &adapter->hw;
1966
4662e82b
BA
1967 if (adapter->msix_entries) {
1968 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1969 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1970 } else {
1971 ew32(IMS, IMS_ENABLE_MASK);
1972 }
74ef9c39 1973 e1e_flush();
bc7f75fa
AK
1974}
1975
1976/**
1977 * e1000_get_hw_control - get control of the h/w from f/w
1978 * @adapter: address of board private structure
1979 *
489815ce 1980 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK
1981 * For ASF and Pass Through versions of f/w this means that
1982 * the driver is loaded. For AMT version (only with 82573)
1983 * of the f/w this means that the network i/f is open.
1984 **/
1985static void e1000_get_hw_control(struct e1000_adapter *adapter)
1986{
1987 struct e1000_hw *hw = &adapter->hw;
1988 u32 ctrl_ext;
1989 u32 swsm;
1990
1991 /* Let firmware know the driver has taken over */
1992 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1993 swsm = er32(SWSM);
1994 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1995 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1996 ctrl_ext = er32(CTRL_EXT);
ad68076e 1997 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK
1998 }
1999}
2000
2001/**
2002 * e1000_release_hw_control - release control of the h/w to f/w
2003 * @adapter: address of board private structure
2004 *
489815ce 2005 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK
2006 * For ASF and Pass Through versions of f/w this means that the
2007 * driver is no longer loaded. For AMT version (only with 82573) i
2008 * of the f/w this means that the network i/f is closed.
2009 *
2010 **/
2011static void e1000_release_hw_control(struct e1000_adapter *adapter)
2012{
2013 struct e1000_hw *hw = &adapter->hw;
2014 u32 ctrl_ext;
2015 u32 swsm;
2016
2017 /* Let firmware taken over control of h/w */
2018 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2019 swsm = er32(SWSM);
2020 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2021 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2022 ctrl_ext = er32(CTRL_EXT);
ad68076e 2023 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK
2024 }
2025}
2026
bc7f75fa
AK
2027/**
2028 * @e1000_alloc_ring - allocate memory for a ring structure
2029 **/
2030static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2031 struct e1000_ring *ring)
2032{
2033 struct pci_dev *pdev = adapter->pdev;
2034
2035 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2036 GFP_KERNEL);
2037 if (!ring->desc)
2038 return -ENOMEM;
2039
2040 return 0;
2041}
2042
2043/**
2044 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2045 * @adapter: board private structure
2046 *
2047 * Return 0 on success, negative on failure
2048 **/
2049int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
2050{
2051 struct e1000_ring *tx_ring = adapter->tx_ring;
2052 int err = -ENOMEM, size;
2053
2054 size = sizeof(struct e1000_buffer) * tx_ring->count;
2055 tx_ring->buffer_info = vmalloc(size);
2056 if (!tx_ring->buffer_info)
2057 goto err;
2058 memset(tx_ring->buffer_info, 0, size);
2059
2060 /* round up to nearest 4K */
2061 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2062 tx_ring->size = ALIGN(tx_ring->size, 4096);
2063
2064 err = e1000_alloc_ring_dma(adapter, tx_ring);
2065 if (err)
2066 goto err;
2067
2068 tx_ring->next_to_use = 0;
2069 tx_ring->next_to_clean = 0;
bc7f75fa
AK
2070
2071 return 0;
2072err:
2073 vfree(tx_ring->buffer_info);
44defeb3 2074 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK
2075 return err;
2076}
2077
2078/**
2079 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2080 * @adapter: board private structure
2081 *
2082 * Returns 0 on success, negative on failure
2083 **/
2084int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
2085{
2086 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK
2087 struct e1000_buffer *buffer_info;
2088 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK
2089
2090 size = sizeof(struct e1000_buffer) * rx_ring->count;
2091 rx_ring->buffer_info = vmalloc(size);
2092 if (!rx_ring->buffer_info)
2093 goto err;
2094 memset(rx_ring->buffer_info, 0, size);
2095
47f44e40
AK
2096 for (i = 0; i < rx_ring->count; i++) {
2097 buffer_info = &rx_ring->buffer_info[i];
2098 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2099 sizeof(struct e1000_ps_page),
2100 GFP_KERNEL);
2101 if (!buffer_info->ps_pages)
2102 goto err_pages;
2103 }
bc7f75fa
AK
2104
2105 desc_len = sizeof(union e1000_rx_desc_packet_split);
2106
2107 /* Round up to nearest 4K */
2108 rx_ring->size = rx_ring->count * desc_len;
2109 rx_ring->size = ALIGN(rx_ring->size, 4096);
2110
2111 err = e1000_alloc_ring_dma(adapter, rx_ring);
2112 if (err)
47f44e40 2113 goto err_pages;
bc7f75fa
AK
2114
2115 rx_ring->next_to_clean = 0;
2116 rx_ring->next_to_use = 0;
2117 rx_ring->rx_skb_top = NULL;
2118
2119 return 0;
47f44e40
AK
2120
2121err_pages:
2122 for (i = 0; i < rx_ring->count; i++) {
2123 buffer_info = &rx_ring->buffer_info[i];
2124 kfree(buffer_info->ps_pages);
2125 }
bc7f75fa
AK
2126err:
2127 vfree(rx_ring->buffer_info);
44defeb3 2128 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK
2129 return err;
2130}
2131
2132/**
2133 * e1000_clean_tx_ring - Free Tx Buffers
2134 * @adapter: board private structure
2135 **/
2136static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
2137{
2138 struct e1000_ring *tx_ring = adapter->tx_ring;
2139 struct e1000_buffer *buffer_info;
2140 unsigned long size;
2141 unsigned int i;
2142
2143 for (i = 0; i < tx_ring->count; i++) {
2144 buffer_info = &tx_ring->buffer_info[i];
2145 e1000_put_txbuf(adapter, buffer_info);
2146 }
2147
2148 size = sizeof(struct e1000_buffer) * tx_ring->count;
2149 memset(tx_ring->buffer_info, 0, size);
2150
2151 memset(tx_ring->desc, 0, tx_ring->size);
2152
2153 tx_ring->next_to_use = 0;
2154 tx_ring->next_to_clean = 0;
2155
2156 writel(0, adapter->hw.hw_addr + tx_ring->head);
2157 writel(0, adapter->hw.hw_addr + tx_ring->tail);
2158}
2159
2160/**
2161 * e1000e_free_tx_resources - Free Tx Resources per Queue
2162 * @adapter: board private structure
2163 *
2164 * Free all transmit software resources
2165 **/
2166void e1000e_free_tx_resources(struct e1000_adapter *adapter)
2167{
2168 struct pci_dev *pdev = adapter->pdev;
2169 struct e1000_ring *tx_ring = adapter->tx_ring;
2170
2171 e1000_clean_tx_ring(adapter);
2172
2173 vfree(tx_ring->buffer_info);
2174 tx_ring->buffer_info = NULL;
2175
2176 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2177 tx_ring->dma);
2178 tx_ring->desc = NULL;
2179}
2180
2181/**
2182 * e1000e_free_rx_resources - Free Rx Resources
2183 * @adapter: board private structure
2184 *
2185 * Free all receive software resources
2186 **/
2187
2188void e1000e_free_rx_resources(struct e1000_adapter *adapter)
2189{
2190 struct pci_dev *pdev = adapter->pdev;
2191 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 2192 int i;
bc7f75fa
AK
2193
2194 e1000_clean_rx_ring(adapter);
2195
47f44e40
AK
2196 for (i = 0; i < rx_ring->count; i++) {
2197 kfree(rx_ring->buffer_info[i].ps_pages);
2198 }
2199
bc7f75fa
AK
2200 vfree(rx_ring->buffer_info);
2201 rx_ring->buffer_info = NULL;
2202
bc7f75fa
AK
2203 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2204 rx_ring->dma);
2205 rx_ring->desc = NULL;
2206}
2207
2208/**
2209 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK
2210 * @adapter: pointer to adapter
2211 * @itr_setting: current adapter->itr
2212 * @packets: the number of packets during this measurement interval
2213 * @bytes: the number of bytes during this measurement interval
2214 *
bc7f75fa
AK
2215 * Stores a new ITR value based on packets and byte
2216 * counts during the last interrupt. The advantage of per interrupt
2217 * computation is faster updates and more accurate ITR for the current
2218 * traffic pattern. Constants in this function were computed
2219 * based on theoretical maximum wire speed and thresholds were set based
2220 * on testing data as well as attempting to minimize response time
4662e82b
BA
2221 * while increasing bulk throughput. This functionality is controlled
2222 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK
2223 **/
2224static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2225 u16 itr_setting, int packets,
2226 int bytes)
2227{
2228 unsigned int retval = itr_setting;
2229
2230 if (packets == 0)
2231 goto update_itr_done;
2232
2233 switch (itr_setting) {
2234 case lowest_latency:
2235 /* handle TSO and jumbo frames */
2236 if (bytes/packets > 8000)
2237 retval = bulk_latency;
2238 else if ((packets < 5) && (bytes > 512)) {
2239 retval = low_latency;
2240 }
2241 break;
2242 case low_latency: /* 50 usec aka 20000 ints/s */
2243 if (bytes > 10000) {
2244 /* this if handles the TSO accounting */
2245 if (bytes/packets > 8000) {
2246 retval = bulk_latency;
2247 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
2248 retval = bulk_latency;
2249 } else if ((packets > 35)) {
2250 retval = lowest_latency;
2251 }
2252 } else if (bytes/packets > 2000) {
2253 retval = bulk_latency;
2254 } else if (packets <= 2 && bytes < 512) {
2255 retval = lowest_latency;
2256 }
2257 break;
2258 case bulk_latency: /* 250 usec aka 4000 ints/s */
2259 if (bytes > 25000) {
2260 if (packets > 35) {
2261 retval = low_latency;
2262 }
2263 } else if (bytes < 6000) {
2264 retval = low_latency;
2265 }
2266 break;
2267 }
2268
2269update_itr_done:
2270 return retval;
2271}
2272
2273static void e1000_set_itr(struct e1000_adapter *adapter)
2274{
2275 struct e1000_hw *hw = &adapter->hw;
2276 u16 current_itr;
2277 u32 new_itr = adapter->itr;
2278
2279 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2280 if (adapter->link_speed != SPEED_1000) {
2281 current_itr = 0;
2282 new_itr = 4000;
2283 goto set_itr_now;
2284 }
2285
2286 adapter->tx_itr = e1000_update_itr(adapter,
2287 adapter->tx_itr,
2288 adapter->total_tx_packets,
2289 adapter->total_tx_bytes);
2290 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2291 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2292 adapter->tx_itr = low_latency;
2293
2294 adapter->rx_itr = e1000_update_itr(adapter,
2295 adapter->rx_itr,
2296 adapter->total_rx_packets,
2297 adapter->total_rx_bytes);
2298 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2299 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2300 adapter->rx_itr = low_latency;
2301
2302 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2303
2304 switch (current_itr) {
2305 /* counts and packets in update_itr are dependent on these numbers */
2306 case lowest_latency:
2307 new_itr = 70000;
2308 break;
2309 case low_latency:
2310 new_itr = 20000; /* aka hwitr = ~200 */
2311 break;
2312 case bulk_latency:
2313 new_itr = 4000;
2314 break;
2315 default:
2316 break;
2317 }
2318
2319set_itr_now:
2320 if (new_itr != adapter->itr) {
ad68076e
BA
2321 /*
2322 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 2323 * by adding intermediate steps when interrupt rate is
ad68076e
BA
2324 * increasing
2325 */
bc7f75fa
AK
2326 new_itr = new_itr > adapter->itr ?
2327 min(adapter->itr + (new_itr >> 2), new_itr) :
2328 new_itr;
2329 adapter->itr = new_itr;
4662e82b
BA
2330 adapter->rx_ring->itr_val = new_itr;
2331 if (adapter->msix_entries)
2332 adapter->rx_ring->set_itr = 1;
2333 else
2334 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK
2335 }
2336}
2337
4662e82b
BA
2338/**
2339 * e1000_alloc_queues - Allocate memory for all rings
2340 * @adapter: board private structure to initialize
2341 **/
2342static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
2343{
2344 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2345 if (!adapter->tx_ring)
2346 goto err;
2347
2348 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
2349 if (!adapter->rx_ring)
2350 goto err;
2351
2352 return 0;
2353err:
2354 e_err("Unable to allocate memory for queues\n");
2355 kfree(adapter->rx_ring);
2356 kfree(adapter->tx_ring);
2357 return -ENOMEM;
2358}
2359
bc7f75fa
AK
2360/**
2361 * e1000_clean - NAPI Rx polling callback
ad68076e 2362 * @napi: struct associated with this polling callback
489815ce 2363 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK
2364 **/
2365static int e1000_clean(struct napi_struct *napi, int budget)
2366{
2367 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2368 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2369 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2370 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2371
4cf1653a 2372 adapter = netdev_priv(poll_dev);
bc7f75fa 2373
4662e82b
BA
2374 if (adapter->msix_entries &&
2375 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2376 goto clean_rx;
2377
92af3e95 2378 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2379
4662e82b 2380clean_rx:
bc7f75fa 2381 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2382
12d04a3c 2383 if (!tx_cleaned)
d2c7ddd6 2384 work_done = budget;
bc7f75fa 2385
53e52c72
DM
2386 /* If budget not fully consumed, exit the polling mode */
2387 if (work_done < budget) {
bc7f75fa
AK
2388 if (adapter->itr_setting & 3)
2389 e1000_set_itr(adapter);
288379f0 2390 napi_complete(napi);
a3c69fef
JB
2391 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2392 if (adapter->msix_entries)
2393 ew32(IMS, adapter->rx_ring->ims_val);
2394 else
2395 e1000_irq_enable(adapter);
2396 }
bc7f75fa
AK
2397 }
2398
2399 return work_done;
2400}
2401
2402static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2403{
2404 struct e1000_adapter *adapter = netdev_priv(netdev);
2405 struct e1000_hw *hw = &adapter->hw;
2406 u32 vfta, index;
2407
2408 /* don't update vlan cookie if already programmed */
2409 if ((adapter->hw.mng_cookie.status &
2410 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2411 (vid == adapter->mng_vlan_id))
2412 return;
caaddaf8 2413
bc7f75fa 2414 /* add VID to filter table */
caaddaf8
BA
2415 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2416 index = (vid >> 5) & 0x7F;
2417 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2418 vfta |= (1 << (vid & 0x1F));
2419 hw->mac.ops.write_vfta(hw, index, vfta);
2420 }
bc7f75fa
AK
2421}
2422
2423static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2424{
2425 struct e1000_adapter *adapter = netdev_priv(netdev);
2426 struct e1000_hw *hw = &adapter->hw;
2427 u32 vfta, index;
2428
74ef9c39
JB
2429 if (!test_bit(__E1000_DOWN, &adapter->state))
2430 e1000_irq_disable(adapter);
bc7f75fa 2431 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB
2432
2433 if (!test_bit(__E1000_DOWN, &adapter->state))
2434 e1000_irq_enable(adapter);
bc7f75fa
AK
2435
2436 if ((adapter->hw.mng_cookie.status &
2437 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2438 (vid == adapter->mng_vlan_id)) {
2439 /* release control to f/w */
2440 e1000_release_hw_control(adapter);
2441 return;
2442 }
2443
2444 /* remove VID from filter table */
caaddaf8
BA
2445 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2446 index = (vid >> 5) & 0x7F;
2447 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2448 vfta &= ~(1 << (vid & 0x1F));
2449 hw->mac.ops.write_vfta(hw, index, vfta);
2450 }
bc7f75fa
AK
2451}
2452
2453static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2454{
2455 struct net_device *netdev = adapter->netdev;
2456 u16 vid = adapter->hw.mng_cookie.vlan_id;
2457 u16 old_vid = adapter->mng_vlan_id;
2458
2459 if (!adapter->vlgrp)
2460 return;
2461
2462 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2463 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2464 if (adapter->hw.mng_cookie.status &
2465 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2466 e1000_vlan_rx_add_vid(netdev, vid);
2467 adapter->mng_vlan_id = vid;
2468 }
2469
2470 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2471 (vid != old_vid) &&
2472 !vlan_group_get_device(adapter->vlgrp, old_vid))
2473 e1000_vlan_rx_kill_vid(netdev, old_vid);
2474 } else {
2475 adapter->mng_vlan_id = vid;
2476 }
2477}
2478
2479
2480static void e1000_vlan_rx_register(struct net_device *netdev,
2481 struct vlan_group *grp)
2482{
2483 struct e1000_adapter *adapter = netdev_priv(netdev);
2484 struct e1000_hw *hw = &adapter->hw;
2485 u32 ctrl, rctl;
2486
74ef9c39
JB
2487 if (!test_bit(__E1000_DOWN, &adapter->state))
2488 e1000_irq_disable(adapter);
bc7f75fa
AK
2489 adapter->vlgrp = grp;
2490
2491 if (grp) {
2492 /* enable VLAN tag insert/strip */
2493 ctrl = er32(CTRL);
2494 ctrl |= E1000_CTRL_VME;
2495 ew32(CTRL, ctrl);
2496
2497 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2498 /* enable VLAN receive filtering */
2499 rctl = er32(RCTL);
bc7f75fa
AK
2500 rctl &= ~E1000_RCTL_CFIEN;
2501 ew32(RCTL, rctl);
2502 e1000_update_mng_vlan(adapter);
2503 }
2504 } else {
2505 /* disable VLAN tag insert/strip */
2506 ctrl = er32(CTRL);
2507 ctrl &= ~E1000_CTRL_VME;
2508 ew32(CTRL, ctrl);
2509
2510 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK
2511 if (adapter->mng_vlan_id !=
2512 (u16)E1000_MNG_VLAN_NONE) {
2513 e1000_vlan_rx_kill_vid(netdev,
2514 adapter->mng_vlan_id);
2515 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2516 }
2517 }
2518 }
2519
74ef9c39
JB
2520 if (!test_bit(__E1000_DOWN, &adapter->state))
2521 e1000_irq_enable(adapter);
bc7f75fa
AK
2522}
2523
2524static void e1000_restore_vlan(struct e1000_adapter *adapter)
2525{
2526 u16 vid;
2527
2528 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2529
2530 if (!adapter->vlgrp)
2531 return;
2532
2533 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2534 if (!vlan_group_get_device(adapter->vlgrp, vid))
2535 continue;
2536 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2537 }
2538}
2539
2540static void e1000_init_manageability(struct e1000_adapter *adapter)
2541{
2542 struct e1000_hw *hw = &adapter->hw;
2543 u32 manc, manc2h;
2544
2545 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2546 return;
2547
2548 manc = er32(MANC);
2549
ad68076e
BA
2550 /*
2551 * enable receiving management packets to the host. this will probably
bc7f75fa 2552 * generate destination unreachable messages from the host OS, but
ad68076e
BA
2553 * the packets will be handled on SMBUS
2554 */
bc7f75fa
AK
2555 manc |= E1000_MANC_EN_MNG2HOST;
2556 manc2h = er32(MANC2H);
2557#define E1000_MNG2HOST_PORT_623 (1 << 5)
2558#define E1000_MNG2HOST_PORT_664 (1 << 6)
2559 manc2h |= E1000_MNG2HOST_PORT_623;
2560 manc2h |= E1000_MNG2HOST_PORT_664;
2561 ew32(MANC2H, manc2h);
2562 ew32(MANC, manc);
2563}
2564
2565/**
2566 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2567 * @adapter: board private structure
2568 *
2569 * Configure the Tx unit of the MAC after a reset.
2570 **/
2571static void e1000_configure_tx(struct e1000_adapter *adapter)
2572{
2573 struct e1000_hw *hw = &adapter->hw;
2574 struct e1000_ring *tx_ring = adapter->tx_ring;
2575 u64 tdba;
2576 u32 tdlen, tctl, tipg, tarc;
2577 u32 ipgr1, ipgr2;
2578
2579 /* Setup the HW Tx Head and Tail descriptor pointers */
2580 tdba = tx_ring->dma;
2581 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2582 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK
2583 ew32(TDBAH, (tdba >> 32));
2584 ew32(TDLEN, tdlen);
2585 ew32(TDH, 0);
2586 ew32(TDT, 0);
2587 tx_ring->head = E1000_TDH;
2588 tx_ring->tail = E1000_TDT;
2589
2590 /* Set the default values for the Tx Inter Packet Gap timer */
2591 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2592 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2593 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2594
2595 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2596 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2597
2598 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2599 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2600 ew32(TIPG, tipg);
2601
2602 /* Set the Tx Interrupt Delay register */
2603 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2604 /* Tx irq moderation */
bc7f75fa
AK
2605 ew32(TADV, adapter->tx_abs_int_delay);
2606
2607 /* Program the Transmit Control Register */
2608 tctl = er32(TCTL);
2609 tctl &= ~E1000_TCTL_CT;
2610 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2611 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2612
2613 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2614 tarc = er32(TARC(0));
ad68076e
BA
2615 /*
2616 * set the speed mode bit, we'll clear it if we're not at
2617 * gigabit link later
2618 */
bc7f75fa
AK
2619#define SPEED_MODE_BIT (1 << 21)
2620 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2621 ew32(TARC(0), tarc);
bc7f75fa
AK
2622 }
2623
2624 /* errata: program both queues to unweighted RR */
2625 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2626 tarc = er32(TARC(0));
bc7f75fa 2627 tarc |= 1;
e9ec2c0f
JK
2628 ew32(TARC(0), tarc);
2629 tarc = er32(TARC(1));
bc7f75fa 2630 tarc |= 1;
e9ec2c0f 2631 ew32(TARC(1), tarc);
bc7f75fa
AK
2632 }
2633
bc7f75fa
AK
2634 /* Setup Transmit Descriptor Settings for eop descriptor */
2635 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2636
2637 /* only set IDE if we are delaying interrupts using the timers */
2638 if (adapter->tx_int_delay)
2639 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2640
2641 /* enable Report Status bit */
2642 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2643
2644 ew32(TCTL, tctl);
2645
edfea6e6 2646 e1000e_config_collision_dist(hw);
bc7f75fa
AK
2647}
2648
2649/**
2650 * e1000_setup_rctl - configure the receive control registers
2651 * @adapter: Board private structure
2652 **/
2653#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2654 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2655static void e1000_setup_rctl(struct e1000_adapter *adapter)
2656{
2657 struct e1000_hw *hw = &adapter->hw;
2658 u32 rctl, rfctl;
2659 u32 psrctl = 0;
2660 u32 pages = 0;
2661
2662 /* Program MC offset vector base */
2663 rctl = er32(RCTL);
2664 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2665 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2666 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2667 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2668
2669 /* Do not Store bad packets */
2670 rctl &= ~E1000_RCTL_SBP;
2671
2672 /* Enable Long Packet receive */
2673 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2674 rctl &= ~E1000_RCTL_LPE;
2675 else
2676 rctl |= E1000_RCTL_LPE;
2677
eb7c3adb
JK
2678 /* Some systems expect that the CRC is included in SMBUS traffic. The
2679 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2680 * host memory when this is enabled
2681 */
2682 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2683 rctl |= E1000_RCTL_SECRC;
5918bd88 2684
a4f58f54
BA
2685 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2686 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2687 u16 phy_data;
2688
2689 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2690 phy_data &= 0xfff8;
2691 phy_data |= (1 << 2);
2692 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2693
2694 e1e_rphy(hw, 22, &phy_data);
2695 phy_data &= 0x0fff;
2696 phy_data |= (1 << 14);
2697 e1e_wphy(hw, 0x10, 0x2823);
2698 e1e_wphy(hw, 0x11, 0x0003);
2699 e1e_wphy(hw, 22, phy_data);
2700 }
2701
bc7f75fa
AK
2702 /* Setup buffer sizes */
2703 rctl &= ~E1000_RCTL_SZ_4096;
2704 rctl |= E1000_RCTL_BSEX;
2705 switch (adapter->rx_buffer_len) {
bc7f75fa
AK
2706 case 2048:
2707 default:
2708 rctl |= E1000_RCTL_SZ_2048;
2709 rctl &= ~E1000_RCTL_BSEX;
2710 break;
2711 case 4096:
2712 rctl |= E1000_RCTL_SZ_4096;
2713 break;
2714 case 8192:
2715 rctl |= E1000_RCTL_SZ_8192;
2716 break;
2717 case 16384:
2718 rctl |= E1000_RCTL_SZ_16384;
2719 break;
2720 }
2721
2722 /*
2723 * 82571 and greater support packet-split where the protocol
2724 * header is placed in skb->data and the packet data is
2725 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2726 * In the case of a non-split, skb->data is linearly filled,
2727 * followed by the page buffers. Therefore, skb->data is
2728 * sized to hold the largest protocol header.
2729 *
2730 * allocations using alloc_page take too long for regular MTU
2731 * so only enable packet split for jumbo frames
2732 *
2733 * Using pages when the page size is greater than 16k wastes
2734 * a lot of memory, since we allocate 3 pages at all times
2735 * per packet.
2736 */
bc7f75fa 2737 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA
2738 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2739 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2740 adapter->rx_ps_pages = pages;
97ac8cae
BA
2741 else
2742 adapter->rx_ps_pages = 0;
bc7f75fa
AK
2743
2744 if (adapter->rx_ps_pages) {
2745 /* Configure extra packet-split registers */
2746 rfctl = er32(RFCTL);
2747 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA
2748 /*
2749 * disable packet split support for IPv6 extension headers,
2750 * because some malformed IPv6 headers can hang the Rx
2751 */
bc7f75fa
AK
2752 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2753 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2754
2755 ew32(RFCTL, rfctl);
2756
140a7480
AK
2757 /* Enable Packet split descriptors */
2758 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK
2759
2760 psrctl |= adapter->rx_ps_bsize0 >>
2761 E1000_PSRCTL_BSIZE0_SHIFT;
2762
2763 switch (adapter->rx_ps_pages) {
2764 case 3:
2765 psrctl |= PAGE_SIZE <<
2766 E1000_PSRCTL_BSIZE3_SHIFT;
2767 case 2:
2768 psrctl |= PAGE_SIZE <<
2769 E1000_PSRCTL_BSIZE2_SHIFT;
2770 case 1:
2771 psrctl |= PAGE_SIZE >>
2772 E1000_PSRCTL_BSIZE1_SHIFT;
2773 break;
2774 }
2775
2776 ew32(PSRCTL, psrctl);
2777 }
2778
2779 ew32(RCTL, rctl);
318a94d6
JK
2780 /* just started the receive unit, no need to restart */
2781 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK
2782}
2783
2784/**
2785 * e1000_configure_rx - Configure Receive Unit after Reset
2786 * @adapter: board private structure
2787 *
2788 * Configure the Rx unit of the MAC after a reset.
2789 **/
2790static void e1000_configure_rx(struct e1000_adapter *adapter)
2791{
2792 struct e1000_hw *hw = &adapter->hw;
2793 struct e1000_ring *rx_ring = adapter->rx_ring;
2794 u64 rdba;
2795 u32 rdlen, rctl, rxcsum, ctrl_ext;
2796
2797 if (adapter->rx_ps_pages) {
2798 /* this is a 32 byte descriptor */
2799 rdlen = rx_ring->count *
2800 sizeof(union e1000_rx_desc_packet_split);
2801 adapter->clean_rx = e1000_clean_rx_irq_ps;
2802 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA
2803 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2804 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2805 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2806 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2807 } else {
97ac8cae 2808 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK
2809 adapter->clean_rx = e1000_clean_rx_irq;
2810 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2811 }
2812
2813 /* disable receives while setting up the descriptors */
2814 rctl = er32(RCTL);
2815 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2816 e1e_flush();
2817 msleep(10);
2818
2819 /* set the Receive Delay Timer Register */
2820 ew32(RDTR, adapter->rx_int_delay);
2821
2822 /* irq moderation */
2823 ew32(RADV, adapter->rx_abs_int_delay);
2824 if (adapter->itr_setting != 0)
ad68076e 2825 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK
2826
2827 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK
2828 /* Auto-Mask interrupts upon ICR access */
2829 ctrl_ext |= E1000_CTRL_EXT_IAME;
2830 ew32(IAM, 0xffffffff);
2831 ew32(CTRL_EXT, ctrl_ext);
2832 e1e_flush();
2833
ad68076e
BA
2834 /*
2835 * Setup the HW Rx Head and Tail Descriptor Pointers and
2836 * the Base and Length of the Rx Descriptor Ring
2837 */
bc7f75fa 2838 rdba = rx_ring->dma;
284901a9 2839 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK
2840 ew32(RDBAH, (rdba >> 32));
2841 ew32(RDLEN, rdlen);
2842 ew32(RDH, 0);
2843 ew32(RDT, 0);
2844 rx_ring->head = E1000_RDH;
2845 rx_ring->tail = E1000_RDT;
2846
2847 /* Enable Receive Checksum Offload for TCP and UDP */
2848 rxcsum = er32(RXCSUM);
2849 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2850 rxcsum |= E1000_RXCSUM_TUOFL;
2851
ad68076e
BA
2852 /*
2853 * IPv4 payload checksum for UDP fragments must be
2854 * used in conjunction with packet-split.
2855 */
bc7f75fa
AK
2856 if (adapter->rx_ps_pages)
2857 rxcsum |= E1000_RXCSUM_IPPCSE;
2858 } else {
2859 rxcsum &= ~E1000_RXCSUM_TUOFL;
2860 /* no need to clear IPPCSE as it defaults to 0 */
2861 }
2862 ew32(RXCSUM, rxcsum);
2863
ad68076e
BA
2864 /*
2865 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2866 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA
2867 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2868 */
53ec5498
BA
2869 if (adapter->flags & FLAG_HAS_ERT) {
2870 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2871 u32 rxdctl = er32(RXDCTL(0));
2872 ew32(RXDCTL(0), rxdctl | 0x3);
2873 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2874 /*
2875 * With jumbo frames and early-receive enabled,
2876 * excessive C-state transition latencies result in
2877 * dropped transactions.
2878 */
2879 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2880 adapter->netdev->name, 55);
2881 } else {
2882 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2883 adapter->netdev->name,
2884 PM_QOS_DEFAULT_VALUE);
2885 }
97ac8cae 2886 }
bc7f75fa
AK
2887
2888 /* Enable Receives */
2889 ew32(RCTL, rctl);
2890}
2891
2892/**
e2de3eb6 2893 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK
2894 * @hw: pointer to the HW structure
2895 * @mc_addr_list: array of multicast addresses to program
2896 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2897 *
ab8932f3 2898 * Updates the Multicast Table Array.
bc7f75fa 2899 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 2900 **/
e2de3eb6 2901static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 2902 u32 mc_addr_count)
bc7f75fa 2903{
ab8932f3 2904 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK
2905}
2906
2907/**
2908 * e1000_set_multi - Multicast and Promiscuous mode set
2909 * @netdev: network interface device structure
2910 *
2911 * The set_multi entry point is called whenever the multicast address
2912 * list or the network interface flags are updated. This routine is
2913 * responsible for configuring the hardware for proper multicast,
2914 * promiscuous mode, and all-multi behavior.
2915 **/
2916static void e1000_set_multi(struct net_device *netdev)
2917{
2918 struct e1000_adapter *adapter = netdev_priv(netdev);
2919 struct e1000_hw *hw = &adapter->hw;
22bedad3 2920 struct netdev_hw_addr *ha;
bc7f75fa
AK
2921 u8 *mta_list;
2922 u32 rctl;
2923 int i;
2924
2925 /* Check for Promiscuous and All Multicast modes */
2926
2927 rctl = er32(RCTL);
2928
2929 if (netdev->flags & IFF_PROMISC) {
2930 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2931 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2932 } else {
746b9f02
PM
2933 if (netdev->flags & IFF_ALLMULTI) {
2934 rctl |= E1000_RCTL_MPE;
2935 rctl &= ~E1000_RCTL_UPE;
2936 } else {
2937 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2938 }
78ed11a5 2939 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2940 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK
2941 }
2942
2943 ew32(RCTL, rctl);
2944
7aeef972
JP
2945 if (!netdev_mc_empty(netdev)) {
2946 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK
2947 if (!mta_list)
2948 return;
2949
2950 /* prepare a packed array of only addresses. */
7aeef972 2951 i = 0;
22bedad3
JP
2952 netdev_for_each_mc_addr(ha, netdev)
2953 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 2954
ab8932f3 2955 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK
2956 kfree(mta_list);
2957 } else {
2958 /*
2959 * if we're called from probe, we might not have
2960 * anything to do here, so clear out the list
2961 */
ab8932f3 2962 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK
2963 }
2964}
2965
2966/**
ad68076e 2967 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK
2968 * @adapter: private board structure
2969 **/
2970static void e1000_configure(struct e1000_adapter *adapter)
2971{
2972 e1000_set_multi(adapter->netdev);
2973
2974 e1000_restore_vlan(adapter);
2975 e1000_init_manageability(adapter);
2976
2977 e1000_configure_tx(adapter);
2978 e1000_setup_rctl(adapter);
2979 e1000_configure_rx(adapter);
ad68076e 2980 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK
2981}
2982
2983/**
2984 * e1000e_power_up_phy - restore link in case the phy was powered down
2985 * @adapter: address of board private structure
2986 *
2987 * The phy may be powered down to save power and turn off link when the
2988 * driver is unloaded and wake on lan is not enabled (among others)
2989 * *** this routine MUST be followed by a call to e1000e_reset ***
2990 **/
2991void e1000e_power_up_phy(struct e1000_adapter *adapter)
2992{
17f208de
BA
2993 if (adapter->hw.phy.ops.power_up)
2994 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK
2995
2996 adapter->hw.mac.ops.setup_link(&adapter->hw);
2997}
2998
2999/**
3000 * e1000_power_down_phy - Power down the PHY
3001 *
17f208de
BA
3002 * Power down the PHY so no link is implied when interface is down.
3003 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK
3004 */
3005static void e1000_power_down_phy(struct e1000_adapter *adapter)
3006{
bc7f75fa 3007 /* WoL is enabled */
23b66e2b 3008 if (adapter->wol)
bc7f75fa
AK
3009 return;
3010
17f208de
BA
3011 if (adapter->hw.phy.ops.power_down)
3012 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK
3013}
3014
3015/**
3016 * e1000e_reset - bring the hardware into a known good state
3017 *
3018 * This function boots the hardware and enables some settings that
3019 * require a configuration cycle of the hardware - those cannot be
3020 * set/changed during runtime. After reset the device needs to be
ad68076e 3021 * properly configured for Rx, Tx etc.
bc7f75fa
AK
3022 */
3023void e1000e_reset(struct e1000_adapter *adapter)
3024{
3025 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 3026 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK
3027 struct e1000_hw *hw = &adapter->hw;
3028 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 3029 u32 pba = adapter->pba;
bc7f75fa
AK
3030 u16 hwm;
3031
ad68076e 3032 /* reset Packet Buffer Allocation to default */
318a94d6 3033 ew32(PBA, pba);
df762464 3034
318a94d6 3035 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA
3036 /*
3037 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK
3038 * large enough to accommodate two full transmit packets,
3039 * rounded up to the next 1KB and expressed in KB. Likewise,
3040 * the Rx FIFO should be large enough to accommodate at least
3041 * one full receive packet and is similarly rounded up and
ad68076e
BA
3042 * expressed in KB.
3043 */
df762464 3044 pba = er32(PBA);
bc7f75fa 3045 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 3046 tx_space = pba >> 16;
bc7f75fa 3047 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 3048 pba &= 0xffff;
ad68076e
BA
3049 /*
3050 * the Tx fifo also stores 16 bytes of information about the tx
3051 * but don't include ethernet FCS because hardware appends it
318a94d6
JK
3052 */
3053 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK
3054 sizeof(struct e1000_tx_desc) -
3055 ETH_FCS_LEN) * 2;
3056 min_tx_space = ALIGN(min_tx_space, 1024);
3057 min_tx_space >>= 10;
3058 /* software strips receive CRC, so leave room for it */
318a94d6 3059 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK
3060 min_rx_space = ALIGN(min_rx_space, 1024);
3061 min_rx_space >>= 10;
3062
ad68076e
BA
3063 /*
3064 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 3065 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA
3066 * allocation, take space away from current Rx allocation
3067 */
df762464
AK
3068 if ((tx_space < min_tx_space) &&
3069 ((min_tx_space - tx_space) < pba)) {
3070 pba -= min_tx_space - tx_space;
bc7f75fa 3071
ad68076e
BA
3072 /*
3073 * if short on Rx space, Rx wins and must trump tx
3074 * adjustment or use Early Receive if available
3075 */
df762464 3076 if ((pba < min_rx_space) &&
bc7f75fa
AK
3077 (!(adapter->flags & FLAG_HAS_ERT)))
3078 /* ERT enabled in e1000_configure_rx */
df762464 3079 pba = min_rx_space;
bc7f75fa 3080 }
df762464
AK
3081
3082 ew32(PBA, pba);
bc7f75fa
AK
3083 }
3084
bc7f75fa 3085
ad68076e
BA
3086 /*
3087 * flow control settings
3088 *
38eb394e 3089 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK
3090 * (or the size used for early receive) above it in the Rx FIFO.
3091 * Set it to the lower of:
3092 * - 90% of the Rx FIFO size, and
3093 * - the full Rx FIFO size minus the early receive size (for parts
3094 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 3095 * - the full Rx FIFO size minus one full frame
ad68076e 3096 */
38eb394e
BA
3097 if (hw->mac.type == e1000_pchlan) {
3098 /*
3099 * Workaround PCH LOM adapter hangs with certain network
3100 * loads. If hangs persist, try disabling Tx flow control.
3101 */
3102 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3103 fc->high_water = 0x3500;
3104 fc->low_water = 0x1500;
3105 } else {
3106 fc->high_water = 0x5000;
3107 fc->low_water = 0x3000;
3108 }
3109 } else {
3110 if ((adapter->flags & FLAG_HAS_ERT) &&
3111 (adapter->netdev->mtu > ETH_DATA_LEN))
3112 hwm = min(((pba << 10) * 9 / 10),
3113 ((pba << 10) - (E1000_ERT_2048 << 3)));
3114 else
3115 hwm = min(((pba << 10) * 9 / 10),
3116 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 3117
38eb394e
BA
3118 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3119 fc->low_water = fc->high_water - 8;
3120 }
bc7f75fa
AK
3121
3122 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 3123 fc->pause_time = 0xFFFF;
bc7f75fa 3124 else
318a94d6
JK
3125 fc->pause_time = E1000_FC_PAUSE_TIME;
3126 fc->send_xon = 1;
5c48ef3e 3127 fc->current_mode = fc->requested_mode;
bc7f75fa
AK
3128
3129 /* Allow time for pending master requests to run */
3130 mac->ops.reset_hw(hw);
97ac8cae
BA
3131
3132 /*
3133 * For parts with AMT enabled, let the firmware know
3134 * that the network interface is in control
3135 */
c43bc57e 3136 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA
3137 e1000_get_hw_control(adapter);
3138
bc7f75fa 3139 ew32(WUC, 0);
a4f58f54
BA
3140 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
3141 e1e_wphy(&adapter->hw, BM_WUC, 0);
bc7f75fa
AK
3142
3143 if (mac->ops.init_hw(hw))
44defeb3 3144 e_err("Hardware Error\n");
bc7f75fa 3145
38eb394e
BA
3146 /* additional part of the flow-control workaround above */
3147 if (hw->mac.type == e1000_pchlan)
3148 ew32(FCRTV_PCH, 0x1000);
3149
bc7f75fa
AK
3150 e1000_update_mng_vlan(adapter);
3151
3152 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
3153 ew32(VET, ETH_P_8021Q);
3154
3155 e1000e_reset_adaptive(hw);
3156 e1000_get_phy_info(hw);
3157
918d7197
BA
3158 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
3159 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 3160 u16 phy_data = 0;
ad68076e
BA
3161 /*
3162 * speed up time to link by disabling smart power down, ignore
bc7f75fa 3163 * the return value of this function because there is nothing
ad68076e
BA
3164 * different we would do if it failed
3165 */
bc7f75fa
AK
3166 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
3167 phy_data &= ~IGP02E1000_PM_SPD;
3168 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
3169 }
bc7f75fa
AK
3170}
3171
3172int e1000e_up(struct e1000_adapter *adapter)
3173{
3174 struct e1000_hw *hw = &adapter->hw;
3175
53ec5498
BA
3176 /* DMA latency requirement to workaround early-receive/jumbo issue */
3177 if (adapter->flags & FLAG_HAS_ERT)
3178 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY,
3179 adapter->netdev->name,
3180 PM_QOS_DEFAULT_VALUE);
3181
bc7f75fa
AK
3182 /* hardware has been reset, we need to reload some things */
3183 e1000_configure(adapter);
3184
3185 clear_bit(__E1000_DOWN, &adapter->state);
3186
3187 napi_enable(&adapter->napi);
4662e82b
BA
3188 if (adapter->msix_entries)
3189 e1000_configure_msix(adapter);
bc7f75fa
AK
3190 e1000_irq_enable(adapter);
3191
4cb9be7a
JB
3192 netif_wake_queue(adapter->netdev);
3193
bc7f75fa
AK
3194 /* fire a link change interrupt to start the watchdog */
3195 ew32(ICS, E1000_ICS_LSC);
3196 return 0;
3197}
3198
3199void e1000e_down(struct e1000_adapter *adapter)
3200{
3201 struct net_device *netdev = adapter->netdev;
3202 struct e1000_hw *hw = &adapter->hw;
3203 u32 tctl, rctl;
3204
ad68076e
BA
3205 /*
3206 * signal that we're down so the interrupt handler does not
3207 * reschedule our watchdog timer
3208 */
bc7f75fa
AK
3209 set_bit(__E1000_DOWN, &adapter->state);
3210
3211 /* disable receives in the hardware */
3212 rctl = er32(RCTL);
3213 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3214 /* flush and sleep below */
3215
4cb9be7a 3216 netif_stop_queue(netdev);
bc7f75fa
AK
3217
3218 /* disable transmits in the hardware */
3219 tctl = er32(TCTL);
3220 tctl &= ~E1000_TCTL_EN;
3221 ew32(TCTL, tctl);
3222 /* flush both disables and wait for them to finish */
3223 e1e_flush();
3224 msleep(10);
3225
3226 napi_disable(&adapter->napi);
3227 e1000_irq_disable(adapter);
3228
3229 del_timer_sync(&adapter->watchdog_timer);
3230 del_timer_sync(&adapter->phy_info_timer);
3231
bc7f75fa
AK
3232 netif_carrier_off(netdev);
3233 adapter->link_speed = 0;
3234 adapter->link_duplex = 0;
3235
52cc3086
JK
3236 if (!pci_channel_offline(adapter->pdev))
3237 e1000e_reset(adapter);
bc7f75fa
AK
3238 e1000_clean_tx_ring(adapter);
3239 e1000_clean_rx_ring(adapter);
3240
53ec5498
BA
3241 if (adapter->flags & FLAG_HAS_ERT)
3242 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY,
3243 adapter->netdev->name);
3244
bc7f75fa
AK
3245 /*
3246 * TODO: for power management, we could drop the link and
3247 * pci_disable_device here.
3248 */
3249}
3250
3251void e1000e_reinit_locked(struct e1000_adapter *adapter)
3252{
3253 might_sleep();
3254 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
3255 msleep(1);
3256 e1000e_down(adapter);
3257 e1000e_up(adapter);
3258 clear_bit(__E1000_RESETTING, &adapter->state);
3259}
3260
3261/**
3262 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
3263 * @adapter: board private structure to initialize
3264 *
3265 * e1000_sw_init initializes the Adapter private data structure.
3266 * Fields are initialized based on PCI device information and
3267 * OS network device settings (MTU size).
3268 **/
3269static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
3270{
bc7f75fa
AK
3271 struct net_device *netdev = adapter->netdev;
3272
3273 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
3274 adapter->rx_ps_bsize0 = 128;
318a94d6
JK
3275 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
3276 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 3277
4662e82b 3278 e1000e_set_interrupt_capability(adapter);
bc7f75fa 3279
4662e82b
BA
3280 if (e1000_alloc_queues(adapter))
3281 return -ENOMEM;
bc7f75fa 3282
bc7f75fa 3283 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK
3284 e1000_irq_disable(adapter);
3285
bc7f75fa
AK
3286 set_bit(__E1000_DOWN, &adapter->state);
3287 return 0;
bc7f75fa
AK
3288}
3289
f8d59f78
BA
3290/**
3291 * e1000_intr_msi_test - Interrupt Handler
3292 * @irq: interrupt number
3293 * @data: pointer to a network interface device structure
3294 **/
3295static irqreturn_t e1000_intr_msi_test(int irq, void *data)
3296{
3297 struct net_device *netdev = data;
3298 struct e1000_adapter *adapter = netdev_priv(netdev);
3299 struct e1000_hw *hw = &adapter->hw;
3300 u32 icr = er32(ICR);
3301
3bb99fe2 3302 e_dbg("icr is %08X\n", icr);
f8d59f78
BA
3303 if (icr & E1000_ICR_RXSEQ) {
3304 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
3305 wmb();
3306 }
3307
3308 return IRQ_HANDLED;
3309}
3310
3311/**
3312 * e1000_test_msi_interrupt - Returns 0 for successful test
3313 * @adapter: board private struct
3314 *
3315 * code flow taken from tg3.c
3316 **/
3317static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
3318{
3319 struct net_device *netdev = adapter->netdev;
3320 struct e1000_hw *hw = &adapter->hw;
3321 int err;
3322
3323 /* poll_enable hasn't been called yet, so don't need disable */
3324 /* clear any pending events */
3325 er32(ICR);
3326
3327 /* free the real vector and request a test handler */
3328 e1000_free_irq(adapter);
4662e82b 3329 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA
3330
3331 /* Assume that the test fails, if it succeeds then the test
3332 * MSI irq handler will unset this flag */
3333 adapter->flags |= FLAG_MSI_TEST_FAILED;
3334
3335 err = pci_enable_msi(adapter->pdev);
3336 if (err)
3337 goto msi_test_failed;
3338
a0607fd3 3339 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA
3340 netdev->name, netdev);
3341 if (err) {
3342 pci_disable_msi(adapter->pdev);
3343 goto msi_test_failed;
3344 }
3345
3346 wmb();
3347
3348 e1000_irq_enable(adapter);
3349
3350 /* fire an unusual interrupt on the test handler */
3351 ew32(ICS, E1000_ICS_RXSEQ);
3352 e1e_flush();
3353 msleep(50);
3354
3355 e1000_irq_disable(adapter);
3356
3357 rmb();
3358
3359 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3360 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA
3361 err = -EIO;
3362 e_info("MSI interrupt test failed!\n");
3363 }
3364
3365 free_irq(adapter->pdev->irq, netdev);
3366 pci_disable_msi(adapter->pdev);
3367
3368 if (err == -EIO)
3369 goto msi_test_failed;
3370
3371 /* okay so the test worked, restore settings */
3bb99fe2 3372 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3373msi_test_failed:
4662e82b 3374 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA
3375 e1000_request_irq(adapter);
3376 return err;
3377}
3378
3379/**
3380 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3381 * @adapter: board private struct
3382 *
3383 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3384 **/
3385static int e1000_test_msi(struct e1000_adapter *adapter)
3386{
3387 int err;
3388 u16 pci_cmd;
3389
3390 if (!(adapter->flags & FLAG_MSI_ENABLED))
3391 return 0;
3392
3393 /* disable SERR in case the MSI write causes a master abort */
3394 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3395 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3396 pci_cmd & ~PCI_COMMAND_SERR);
3397
3398 err = e1000_test_msi_interrupt(adapter);
3399
3400 /* restore previous setting of command word */
3401 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3402
3403 /* success ! */
3404 if (!err)
3405 return 0;
3406
3407 /* EIO means MSI test failed */
3408 if (err != -EIO)
3409 return err;
3410
3411 /* back to INTx mode */
3412 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3413
3414 e1000_free_irq(adapter);
3415
3416 err = e1000_request_irq(adapter);
3417
3418 return err;
3419}
3420
bc7f75fa
AK
3421/**
3422 * e1000_open - Called when a network interface is made active
3423 * @netdev: network interface device structure
3424 *
3425 * Returns 0 on success, negative value on failure
3426 *
3427 * The open entry point is called when a network interface is made
3428 * active by the system (IFF_UP). At this point all resources needed
3429 * for transmit and receive operations are allocated, the interrupt
3430 * handler is registered with the OS, the watchdog timer is started,
3431 * and the stack is notified that the interface is ready.
3432 **/
3433static int e1000_open(struct net_device *netdev)
3434{
3435 struct e1000_adapter *adapter = netdev_priv(netdev);
3436 struct e1000_hw *hw = &adapter->hw;
23606cf5 3437 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK
3438 int err;
3439
3440 /* disallow open during test */
3441 if (test_bit(__E1000_TESTING, &adapter->state))
3442 return -EBUSY;
3443
23606cf5
RW
3444 pm_runtime_get_sync(&pdev->dev);
3445
9c563d20
JB
3446 netif_carrier_off(netdev);
3447
bc7f75fa
AK
3448 /* allocate transmit descriptors */
3449 err = e1000e_setup_tx_resources(adapter);
3450 if (err)
3451 goto err_setup_tx;
3452
3453 /* allocate receive descriptors */
3454 err = e1000e_setup_rx_resources(adapter);
3455 if (err)
3456 goto err_setup_rx;
3457
3458 e1000e_power_up_phy(adapter);
3459
3460 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3461 if ((adapter->hw.mng_cookie.status &
3462 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3463 e1000_update_mng_vlan(adapter);
3464
ad68076e
BA
3465 /*
3466 * If AMT is enabled, let the firmware know that the network
3467 * interface is now open
3468 */
c43bc57e 3469 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK
3470 e1000_get_hw_control(adapter);
3471
ad68076e
BA
3472 /*
3473 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK
3474 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3475 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA
3476 * clean_rx handler before we do so.
3477 */
bc7f75fa
AK
3478 e1000_configure(adapter);
3479
3480 err = e1000_request_irq(adapter);
3481 if (err)
3482 goto err_req_irq;
3483
f8d59f78
BA
3484 /*
3485 * Work around PCIe errata with MSI interrupts causing some chipsets to
3486 * ignore e1000e MSI messages, which means we need to test our MSI
3487 * interrupt now
3488 */
4662e82b 3489 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA
3490 err = e1000_test_msi(adapter);
3491 if (err) {
3492 e_err("Interrupt allocation failed\n");
3493 goto err_req_irq;
3494 }
3495 }
3496
bc7f75fa
AK
3497 /* From here on the code is the same as e1000e_up() */
3498 clear_bit(__E1000_DOWN, &adapter->state);
3499
3500 napi_enable(&adapter->napi);
3501
3502 e1000_irq_enable(adapter);
3503
4cb9be7a 3504 netif_start_queue(netdev);
d55b53ff 3505
23606cf5
RW
3506 adapter->idle_check = true;
3507 pm_runtime_put(&pdev->dev);
3508
bc7f75fa
AK
3509 /* fire a link status change interrupt to start the watchdog */
3510 ew32(ICS, E1000_ICS_LSC);
3511
3512 return 0;
3513
3514err_req_irq:
3515 e1000_release_hw_control(adapter);
3516 e1000_power_down_phy(adapter);
3517 e1000e_free_rx_resources(adapter);
3518err_setup_rx:
3519 e1000e_free_tx_resources(adapter);
3520err_setup_tx:
3521 e1000e_reset(adapter);
23606cf5 3522 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK
3523
3524 return err;
3525}
3526
3527/**
3528 * e1000_close - Disables a network interface
3529 * @netdev: network interface device structure
3530 *
3531 * Returns 0, this is not allowed to fail
3532 *
3533 * The close entry point is called when an interface is de-activated
3534 * by the OS. The hardware is still under the drivers control, but
3535 * needs to be disabled. A global MAC reset is issued to stop the
3536 * hardware, and all transmit and receive resources are freed.
3537 **/
3538static int e1000_close(struct net_device *netdev)
3539{
3540 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3541 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK
3542
3543 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW
3544
3545 pm_runtime_get_sync(&pdev->dev);
3546
3547 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3548 e1000e_down(adapter);
3549 e1000_free_irq(adapter);
3550 }
bc7f75fa 3551 e1000_power_down_phy(adapter);
bc7f75fa
AK
3552
3553 e1000e_free_tx_resources(adapter);
3554 e1000e_free_rx_resources(adapter);
3555
ad68076e
BA
3556 /*
3557 * kill manageability vlan ID if supported, but not if a vlan with
3558 * the same ID is registered on the host OS (let 8021q kill it)
3559 */
bc7f75fa
AK
3560 if ((adapter->hw.mng_cookie.status &
3561 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3562 !(adapter->vlgrp &&
3563 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3564 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3565
ad68076e
BA
3566 /*
3567 * If AMT is enabled, let the firmware know that the network
3568 * interface is now closed
3569 */
c43bc57e 3570 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK
3571 e1000_release_hw_control(adapter);
3572
23606cf5
RW
3573 pm_runtime_put_sync(&pdev->dev);
3574
bc7f75fa
AK
3575 return 0;
3576}
3577/**
3578 * e1000_set_mac - Change the Ethernet Address of the NIC
3579 * @netdev: network interface device structure
3580 * @p: pointer to an address structure
3581 *
3582 * Returns 0 on success, negative on failure
3583 **/
3584static int e1000_set_mac(struct net_device *netdev, void *p)
3585{
3586 struct e1000_adapter *adapter = netdev_priv(netdev);
3587 struct sockaddr *addr = p;
3588
3589 if (!is_valid_ether_addr(addr->sa_data))
3590 return -EADDRNOTAVAIL;
3591
3592 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3593 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3594
3595 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3596
3597 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3598 /* activate the work around */
3599 e1000e_set_laa_state_82571(&adapter->hw, 1);
3600
ad68076e
BA
3601 /*
3602 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK
3603 * between the time RAR[0] gets clobbered and the time it
3604 * gets fixed (in e1000_watchdog), the actual LAA is in one
3605 * of the RARs and no incoming packets directed to this port
3606 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA
3607 * RAR[14]
3608 */
bc7f75fa
AK
3609 e1000e_rar_set(&adapter->hw,
3610 adapter->hw.mac.addr,
3611 adapter->hw.mac.rar_entry_count - 1);
3612 }
3613
3614 return 0;
3615}
3616
a8f88ff5
JB
3617/**
3618 * e1000e_update_phy_task - work thread to update phy
3619 * @work: pointer to our work struct
3620 *
3621 * this worker thread exists because we must acquire a
3622 * semaphore to read the phy, which we could msleep while
3623 * waiting for it, and we can't msleep in a timer.
3624 **/
3625static void e1000e_update_phy_task(struct work_struct *work)
3626{
3627 struct e1000_adapter *adapter = container_of(work,
3628 struct e1000_adapter, update_phy_task);
3629 e1000_get_phy_info(&adapter->hw);
3630}
3631
ad68076e
BA
3632/*
3633 * Need to wait a few seconds after link up to get diagnostic information from
3634 * the phy
3635 */
bc7f75fa
AK
3636static void e1000_update_phy_info(unsigned long data)
3637{
3638 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3639 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK
3640}
3641
3642/**
3643 * e1000e_update_stats - Update the board statistics counters
3644 * @adapter: board private structure
3645 **/
3646void e1000e_update_stats(struct e1000_adapter *adapter)
3647{
7274c20f 3648 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK
3649 struct e1000_hw *hw = &adapter->hw;
3650 struct pci_dev *pdev = adapter->pdev;
a4f58f54 3651 u16 phy_data;
bc7f75fa
AK
3652
3653 /*
3654 * Prevent stats update while adapter is being reset, or if the pci
3655 * connection is down.
3656 */
3657 if (adapter->link_speed == 0)
3658 return;
3659 if (pci_channel_offline(pdev))
3660 return;
3661
bc7f75fa
AK
3662 adapter->stats.crcerrs += er32(CRCERRS);
3663 adapter->stats.gprc += er32(GPRC);
7c25769f
BA
3664 adapter->stats.gorc += er32(GORCL);
3665 er32(GORCH); /* Clear gorc */
bc7f75fa
AK
3666 adapter->stats.bprc += er32(BPRC);
3667 adapter->stats.mprc += er32(MPRC);
3668 adapter->stats.roc += er32(ROC);
3669
bc7f75fa 3670 adapter->stats.mpc += er32(MPC);
a4f58f54
BA
3671 if ((hw->phy.type == e1000_phy_82578) ||
3672 (hw->phy.type == e1000_phy_82577)) {
3673 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
29477e24
BA
3674 if (!e1e_rphy(hw, HV_SCC_LOWER, &phy_data))
3675 adapter->stats.scc += phy_data;
a4f58f54
BA
3676
3677 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
29477e24
BA
3678 if (!e1e_rphy(hw, HV_ECOL_LOWER, &phy_data))
3679 adapter->stats.ecol += phy_data;
a4f58f54
BA
3680
3681 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
29477e24
BA
3682 if (!e1e_rphy(hw, HV_MCC_LOWER, &phy_data))
3683 adapter->stats.mcc += phy_data;
a4f58f54
BA
3684
3685 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
29477e24
BA
3686 if (!e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data))
3687 adapter->stats.latecol += phy_data;
a4f58f54
BA
3688
3689 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
29477e24
BA
3690 if (!e1e_rphy(hw, HV_DC_LOWER, &phy_data))
3691 adapter->stats.dc += phy_data;
a4f58f54
BA
3692 } else {
3693 adapter->stats.scc += er32(SCC);
3694 adapter->stats.ecol += er32(ECOL);
3695 adapter->stats.mcc += er32(MCC);
3696 adapter->stats.latecol += er32(LATECOL);
3697 adapter->stats.dc += er32(DC);
3698 }
bc7f75fa
AK
3699 adapter->stats.xonrxc += er32(XONRXC);
3700 adapter->stats.xontxc += er32(XONTXC);
3701 adapter->stats.xoffrxc += er32(XOFFRXC);
3702 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3703 adapter->stats.gptc += er32(GPTC);
7c25769f
BA
3704 adapter->stats.gotc += er32(GOTCL);
3705 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK
3706 adapter->stats.rnbc += er32(RNBC);
3707 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK
3708
3709 adapter->stats.mptc += er32(MPTC);
3710 adapter->stats.bptc += er32(BPTC);
3711
3712 /* used for adaptive IFS */
3713
3714 hw->mac.tx_packet_delta = er32(TPT);
3715 adapter->stats.tpt += hw->mac.tx_packet_delta;
a4f58f54
BA
3716 if ((hw->phy.type == e1000_phy_82578) ||
3717 (hw->phy.type == e1000_phy_82577)) {
3718 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
29477e24
BA
3719 if (!e1e_rphy(hw, HV_COLC_LOWER, &phy_data))
3720 hw->mac.collision_delta = phy_data;
a4f58f54
BA
3721 } else {
3722 hw->mac.collision_delta = er32(COLC);
3723 }
bc7f75fa
AK
3724 adapter->stats.colc += hw->mac.collision_delta;
3725
3726 adapter->stats.algnerrc += er32(ALGNERRC);
3727 adapter->stats.rxerrc += er32(RXERRC);
a4f58f54
BA
3728 if ((hw->phy.type == e1000_phy_82578) ||
3729 (hw->phy.type == e1000_phy_82577)) {
3730 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
29477e24
BA
3731 if (!e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data))
3732 adapter->stats.tncrs += phy_data;
a4f58f54
BA
3733 } else {
3734 if ((hw->mac.type != e1000_82574) &&
3735 (hw->mac.type != e1000_82583))
3736 adapter->stats.tncrs += er32(TNCRS);
3737 }
bc7f75fa
AK
3738 adapter->stats.cexterr += er32(CEXTERR);
3739 adapter->stats.tsctc += er32(TSCTC);
3740 adapter->stats.tsctfc += er32(TSCTFC);
3741
bc7f75fa 3742 /* Fill out the OS statistics structure */
7274c20f
AK
3743 netdev->stats.multicast = adapter->stats.mprc;
3744 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK
3745
3746 /* Rx Errors */
3747
ad68076e
BA
3748 /*
3749 * RLEC on some newer hardware can be incorrect so build
3750 * our own version based on RUC and ROC
3751 */
7274c20f 3752 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK
3753 adapter->stats.crcerrs + adapter->stats.algnerrc +
3754 adapter->stats.ruc + adapter->stats.roc +
3755 adapter->stats.cexterr;
7274c20f 3756 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3757 adapter->stats.roc;
7274c20f
AK
3758 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3759 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3760 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK
3761
3762 /* Tx Errors */
7274c20f 3763 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3764 adapter->stats.latecol;
7274c20f
AK
3765 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3766 netdev->stats.tx_window_errors = adapter->stats.latecol;
3767 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK
3768
3769 /* Tx Dropped needs to be maintained elsewhere */
3770
bc7f75fa
AK
3771 /* Management Stats */
3772 adapter->stats.mgptc += er32(MGTPTC);
3773 adapter->stats.mgprc += er32(MGTPRC);
3774 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK
3775}
3776
7c25769f
BA
3777/**
3778 * e1000_phy_read_status - Update the PHY register status snapshot
3779 * @adapter: board private structure
3780 **/
3781static void e1000_phy_read_status(struct e1000_adapter *adapter)
3782{
3783 struct e1000_hw *hw = &adapter->hw;
3784 struct e1000_phy_regs *phy = &adapter->phy_regs;
3785 int ret_val;
7c25769f
BA
3786
3787 if ((er32(STATUS) & E1000_STATUS_LU) &&
3788 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3789 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3790 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3791 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3792 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3793 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3794 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3795 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3796 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3797 if (ret_val)
44defeb3 3798 e_warn("Error reading PHY register\n");
7c25769f
BA
3799 } else {
3800 /*
3801 * Do not read PHY registers if link is not up
3802 * Set values to typical power-on defaults
3803 */
3804 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3805 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3806 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3807 BMSR_ERCAP);
3808 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3809 ADVERTISE_ALL | ADVERTISE_CSMA);
3810 phy->lpa = 0;
3811 phy->expansion = EXPANSION_ENABLENPAGE;
3812 phy->ctrl1000 = ADVERTISE_1000FULL;
3813 phy->stat1000 = 0;
3814 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3815 }
7c25769f
BA
3816}
3817
bc7f75fa
AK
3818static void e1000_print_link_info(struct e1000_adapter *adapter)
3819{
bc7f75fa
AK
3820 struct e1000_hw *hw = &adapter->hw;
3821 u32 ctrl = er32(CTRL);
3822
8f12fe86
BA
3823 /* Link status message must follow this format for user tools */
3824 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3825 "Flow Control: %s\n",
3826 adapter->netdev->name,
44defeb3
JK
3827 adapter->link_speed,
3828 (adapter->link_duplex == FULL_DUPLEX) ?
3829 "Full Duplex" : "Half Duplex",
3830 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3831 "RX/TX" :
3832 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3833 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK
3834}
3835
b405e8df 3836bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK
3837{
3838 struct e1000_hw *hw = &adapter->hw;
3839 bool link_active = 0;
3840 s32 ret_val = 0;
3841
3842 /*
3843 * get_link_status is set on LSC (link status) interrupt or
3844 * Rx sequence error interrupt. get_link_status will stay
3845 * false until the check_for_link establishes link
3846 * for copper adapters ONLY
3847 */
3848 switch (hw->phy.media_type) {
3849 case e1000_media_type_copper:
3850 if (hw->mac.get_link_status) {
3851 ret_val = hw->mac.ops.check_for_link(hw);
3852 link_active = !hw->mac.get_link_status;
3853 } else {
3854 link_active = 1;
3855 }
3856 break;
3857 case e1000_media_type_fiber:
3858 ret_val = hw->mac.ops.check_for_link(hw);
3859 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3860 break;
3861 case e1000_media_type_internal_serdes:
3862 ret_val = hw->mac.ops.check_for_link(hw);
3863 link_active = adapter->hw.mac.serdes_has_link;
3864 break;
3865 default:
3866 case e1000_media_type_unknown:
3867 break;
3868 }
3869
3870 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3871 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3872 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3873 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK
3874 }
3875
3876 return link_active;
3877}
3878
3879static void e1000e_enable_receives(struct e1000_adapter *adapter)
3880{
3881 /* make sure the receive unit is started */
3882 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3883 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3884 struct e1000_hw *hw = &adapter->hw;
3885 u32 rctl = er32(RCTL);
3886 ew32(RCTL, rctl | E1000_RCTL_EN);
3887 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3888 }
3889}
3890
bc7f75fa
AK
3891/**
3892 * e1000_watchdog - Timer Call-back
3893 * @data: pointer to adapter cast into an unsigned long
3894 **/
3895static void e1000_watchdog(unsigned long data)
3896{
3897 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3898
3899 /* Do the rest outside of interrupt context */
3900 schedule_work(&adapter->watchdog_task);
3901
3902 /* TODO: make this use queue_delayed_work() */
3903}
3904
3905static void e1000_watchdog_task(struct work_struct *work)
3906{
3907 struct e1000_adapter *adapter = container_of(work,
3908 struct e1000_adapter, watchdog_task);
bc7f75fa
AK
3909 struct net_device *netdev = adapter->netdev;
3910 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3911 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK
3912 struct e1000_ring *tx_ring = adapter->tx_ring;
3913 struct e1000_hw *hw = &adapter->hw;
3914 u32 link, tctl;
bc7f75fa
AK
3915 int tx_pending = 0;
3916
b405e8df 3917 link = e1000e_has_link(adapter);
318a94d6 3918 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW
3919 /* Cancel scheduled suspend requests. */
3920 pm_runtime_resume(netdev->dev.parent);
3921
318a94d6 3922 e1000e_enable_receives(adapter);
bc7f75fa 3923 goto link_up;
bc7f75fa
AK
3924 }
3925
3926 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3927 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3928 e1000_update_mng_vlan(adapter);
3929
bc7f75fa
AK
3930 if (link) {
3931 if (!netif_carrier_ok(netdev)) {
3932 bool txb2b = 1;
23606cf5
RW
3933
3934 /* Cancel scheduled suspend requests. */
3935 pm_runtime_resume(netdev->dev.parent);
3936
318a94d6 3937 /* update snapshot of PHY registers on LSC */
7c25769f 3938 e1000_phy_read_status(adapter);
bc7f75fa
AK
3939 mac->ops.get_link_up_info(&adapter->hw,
3940 &adapter->link_speed,
3941 &adapter->link_duplex);
3942 e1000_print_link_info(adapter);
f4187b56
BA
3943 /*
3944 * On supported PHYs, check for duplex mismatch only
3945 * if link has autonegotiated at 10/100 half
3946 */
3947 if ((hw->phy.type == e1000_phy_igp_3 ||
3948 hw->phy.type == e1000_phy_bm) &&
3949 (hw->mac.autoneg == true) &&
3950 (adapter->link_speed == SPEED_10 ||
3951 adapter->link_speed == SPEED_100) &&
3952 (adapter->link_duplex == HALF_DUPLEX)) {
3953 u16 autoneg_exp;
3954
3955 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3956
3957 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3958 e_info("Autonegotiated half duplex but"
3959 " link partner cannot autoneg. "
3960 " Try forcing full duplex if "
3961 "link gets many collisions.\n");
3962 }
3963
f49c57e1 3964 /* adjust timeout factor according to speed/duplex */
bc7f75fa
AK
3965 adapter->tx_timeout_factor = 1;
3966 switch (adapter->link_speed) {
3967 case SPEED_10:
3968 txb2b = 0;
10f1b492 3969 adapter->tx_timeout_factor = 16;
bc7f75fa
AK
3970 break;
3971 case SPEED_100:
3972 txb2b = 0;
4c86e0b9 3973 adapter->tx_timeout_factor = 10;
bc7f75fa
AK
3974 break;
3975 }
3976
ad68076e
BA
3977 /*
3978 * workaround: re-program speed mode bit after
3979 * link-up event
3980 */
bc7f75fa
AK
3981 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3982 !txb2b) {
3983 u32 tarc0;
e9ec2c0f 3984 tarc0 = er32(TARC(0));
bc7f75fa 3985 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3986 ew32(TARC(0), tarc0);
bc7f75fa
AK
3987 }
3988
ad68076e
BA
3989 /*
3990 * disable TSO for pcie and 10/100 speeds, to avoid
3991 * some hardware issues
3992 */
bc7f75fa
AK
3993 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3994 switch (adapter->link_speed) {
3995 case SPEED_10:
3996 case SPEED_100:
44defeb3 3997 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK
3998 netdev->features &= ~NETIF_F_TSO;
3999 netdev->features &= ~NETIF_F_TSO6;
4000 break;
4001 case SPEED_1000:
4002 netdev->features |= NETIF_F_TSO;
4003 netdev->features |= NETIF_F_TSO6;
4004 break;
4005 default:
4006 /* oops */
4007 break;
4008 }
4009 }
4010
ad68076e
BA
4011 /*
4012 * enable transmits in the hardware, need to do this
4013 * after setting TARC(0)
4014 */
bc7f75fa
AK
4015 tctl = er32(TCTL);
4016 tctl |= E1000_TCTL_EN;
4017 ew32(TCTL, tctl);
4018
75eb0fad
BA
4019 /*
4020 * Perform any post-link-up configuration before
4021 * reporting link up.
4022 */
4023 if (phy->ops.cfg_on_link_up)
4024 phy->ops.cfg_on_link_up(hw);
4025
bc7f75fa 4026 netif_carrier_on(netdev);
bc7f75fa
AK
4027
4028 if (!test_bit(__E1000_DOWN, &adapter->state))
4029 mod_timer(&adapter->phy_info_timer,
4030 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK
4031 }
4032 } else {
4033 if (netif_carrier_ok(netdev)) {
4034 adapter->link_speed = 0;
4035 adapter->link_duplex = 0;
8f12fe86
BA
4036 /* Link status message must follow this format */
4037 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
4038 adapter->netdev->name);
bc7f75fa 4039 netif_carrier_off(netdev);
bc7f75fa
AK
4040 if (!test_bit(__E1000_DOWN, &adapter->state))
4041 mod_timer(&adapter->phy_info_timer,
4042 round_jiffies(jiffies + 2 * HZ));
4043
4044 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
4045 schedule_work(&adapter->reset_task);
23606cf5
RW
4046 else
4047 pm_schedule_suspend(netdev->dev.parent,
4048 LINK_TIMEOUT);
bc7f75fa
AK
4049 }
4050 }
4051
4052link_up:
4053 e1000e_update_stats(adapter);
4054
4055 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
4056 adapter->tpt_old = adapter->stats.tpt;
4057 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
4058 adapter->colc_old = adapter->stats.colc;
4059
7c25769f
BA
4060 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
4061 adapter->gorc_old = adapter->stats.gorc;
4062 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
4063 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK
4064
4065 e1000e_update_adaptive(&adapter->hw);
4066
4067 if (!netif_carrier_ok(netdev)) {
4068 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
4069 tx_ring->count);
4070 if (tx_pending) {
ad68076e
BA
4071 /*
4072 * We've lost link, so the controller stops DMA,
bc7f75fa
AK
4073 * but we've got queued Tx work that's never going
4074 * to get done, so reset controller to flush Tx.
ad68076e
BA
4075 * (Do the reset outside of interrupt context).
4076 */
bc7f75fa
AK
4077 adapter->tx_timeout_count++;
4078 schedule_work(&adapter->reset_task);
c2d5ab49
JB
4079 /* return immediately since reset is imminent */
4080 return;
bc7f75fa
AK
4081 }
4082 }
4083
ad68076e 4084 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA
4085 if (adapter->msix_entries)
4086 ew32(ICS, adapter->rx_ring->ims_val);
4087 else
4088 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK
4089
4090 /* Force detection of hung controller every watchdog period */
4091 adapter->detect_tx_hung = 1;
4092
ad68076e
BA
4093 /*
4094 * With 82571 controllers, LAA may be overwritten due to controller
4095 * reset from the other port. Set the appropriate LAA in RAR[0]
4096 */
bc7f75fa
AK
4097 if (e1000e_get_laa_state_82571(hw))
4098 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
4099
4100 /* Reset the timer */
4101 if (!test_bit(__E1000_DOWN, &adapter->state))
4102 mod_timer(&adapter->watchdog_timer,
4103 round_jiffies(jiffies + 2 * HZ));
4104}
4105
4106#define E1000_TX_FLAGS_CSUM 0x00000001
4107#define E1000_TX_FLAGS_VLAN 0x00000002
4108#define E1000_TX_FLAGS_TSO 0x00000004
4109#define E1000_TX_FLAGS_IPV4 0x00000008
4110#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
4111#define E1000_TX_FLAGS_VLAN_SHIFT 16
4112
4113static int e1000_tso(struct e1000_adapter *adapter,
4114 struct sk_buff *skb)
4115{
4116 struct e1000_ring *tx_ring = adapter->tx_ring;
4117 struct e1000_context_desc *context_desc;
4118 struct e1000_buffer *buffer_info;
4119 unsigned int i;
4120 u32 cmd_length = 0;
4121 u16 ipcse = 0, tucse, mss;
4122 u8 ipcss, ipcso, tucss, tucso, hdr_len;
4123 int err;
4124
3d5e33c9
BA
4125 if (!skb_is_gso(skb))
4126 return 0;
bc7f75fa 4127
3d5e33c9
BA
4128 if (skb_header_cloned(skb)) {
4129 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
4130 if (err)
4131 return err;
bc7f75fa
AK
4132 }
4133
3d5e33c9
BA
4134 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
4135 mss = skb_shinfo(skb)->gso_size;
4136 if (skb->protocol == htons(ETH_P_IP)) {
4137 struct iphdr *iph = ip_hdr(skb);
4138 iph->tot_len = 0;
4139 iph->check = 0;
4140 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
4141 0, IPPROTO_TCP, 0);
4142 cmd_length = E1000_TXD_CMD_IP;
4143 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 4144 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA
4145 ipv6_hdr(skb)->payload_len = 0;
4146 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
4147 &ipv6_hdr(skb)->daddr,
4148 0, IPPROTO_TCP, 0);
4149 ipcse = 0;
4150 }
4151 ipcss = skb_network_offset(skb);
4152 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
4153 tucss = skb_transport_offset(skb);
4154 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
4155 tucse = 0;
4156
4157 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
4158 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
4159
4160 i = tx_ring->next_to_use;
4161 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4162 buffer_info = &tx_ring->buffer_info[i];
4163
4164 context_desc->lower_setup.ip_fields.ipcss = ipcss;
4165 context_desc->lower_setup.ip_fields.ipcso = ipcso;
4166 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
4167 context_desc->upper_setup.tcp_fields.tucss = tucss;
4168 context_desc->upper_setup.tcp_fields.tucso = tucso;
4169 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
4170 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
4171 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
4172 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
4173
4174 buffer_info->time_stamp = jiffies;
4175 buffer_info->next_to_watch = i;
4176
4177 i++;
4178 if (i == tx_ring->count)
4179 i = 0;
4180 tx_ring->next_to_use = i;
4181
4182 return 1;
bc7f75fa
AK
4183}
4184
4185static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
4186{
4187 struct e1000_ring *tx_ring = adapter->tx_ring;
4188 struct e1000_context_desc *context_desc;
4189 struct e1000_buffer *buffer_info;
4190 unsigned int i;
4191 u8 css;
af807c82 4192 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 4193 __be16 protocol;
bc7f75fa 4194
af807c82
DG
4195 if (skb->ip_summed != CHECKSUM_PARTIAL)
4196 return 0;
bc7f75fa 4197
5f66f208
AJ
4198 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
4199 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
4200 else
4201 protocol = skb->protocol;
4202
3f518390 4203 switch (protocol) {
09640e63 4204 case cpu_to_be16(ETH_P_IP):
af807c82
DG
4205 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
4206 cmd_len |= E1000_TXD_CMD_TCP;
4207 break;
09640e63 4208 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG
4209 /* XXX not handling all IPV6 headers */
4210 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
4211 cmd_len |= E1000_TXD_CMD_TCP;
4212 break;
4213 default:
4214 if (unlikely(net_ratelimit()))
5f66f208
AJ
4215 e_warn("checksum_partial proto=%x!\n",
4216 be16_to_cpu(protocol));
af807c82 4217 break;
bc7f75fa
AK
4218 }
4219
af807c82
DG
4220 css = skb_transport_offset(skb);
4221
4222 i = tx_ring->next_to_use;
4223 buffer_info = &tx_ring->buffer_info[i];
4224 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
4225
4226 context_desc->lower_setup.ip_config = 0;
4227 context_desc->upper_setup.tcp_fields.tucss = css;
4228 context_desc->upper_setup.tcp_fields.tucso =
4229 css + skb->csum_offset;
4230 context_desc->upper_setup.tcp_fields.tucse = 0;
4231 context_desc->tcp_seg_setup.data = 0;
4232 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
4233
4234 buffer_info->time_stamp = jiffies;
4235 buffer_info->next_to_watch = i;
4236
4237 i++;
4238 if (i == tx_ring->count)
4239 i = 0;
4240 tx_ring->next_to_use = i;
4241
4242 return 1;
bc7f75fa
AK
4243}
4244
4245#define E1000_MAX_PER_TXD 8192
4246#define E1000_MAX_TXD_PWR 12
4247
4248static int e1000_tx_map(struct e1000_adapter *adapter,
4249 struct sk_buff *skb, unsigned int first,
4250 unsigned int max_per_txd, unsigned int nr_frags,
4251 unsigned int mss)
4252{
4253 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 4254 struct pci_dev *pdev = adapter->pdev;
1b7719c4 4255 struct e1000_buffer *buffer_info;
8ddc951c 4256 unsigned int len = skb_headlen(skb);
03b1320d 4257 unsigned int offset = 0, size, count = 0, i;
9ed318d5 4258 unsigned int f, bytecount, segs;
bc7f75fa
AK
4259
4260 i = tx_ring->next_to_use;
4261
4262 while (len) {
1b7719c4 4263 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK
4264 size = min(len, max_per_txd);
4265
bc7f75fa 4266 buffer_info->length = size;
bc7f75fa 4267 buffer_info->time_stamp = jiffies;
bc7f75fa 4268 buffer_info->next_to_watch = i;
0be3f55f
NN
4269 buffer_info->dma = dma_map_single(&pdev->dev,
4270 skb->data + offset,
4271 size, DMA_TO_DEVICE);
03b1320d 4272 buffer_info->mapped_as_page = false;
0be3f55f 4273 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4274 goto dma_error;
bc7f75fa
AK
4275
4276 len -= size;
4277 offset += size;
03b1320d 4278 count++;
1b7719c4
AD
4279
4280 if (len) {
4281 i++;
4282 if (i == tx_ring->count)
4283 i = 0;
4284 }
bc7f75fa
AK
4285 }
4286
4287 for (f = 0; f < nr_frags; f++) {
4288 struct skb_frag_struct *frag;
4289
4290 frag = &skb_shinfo(skb)->frags[f];
4291 len = frag->size;
03b1320d 4292 offset = frag->page_offset;
bc7f75fa
AK
4293
4294 while (len) {
1b7719c4
AD
4295 i++;
4296 if (i == tx_ring->count)
4297 i = 0;
4298
bc7f75fa
AK
4299 buffer_info = &tx_ring->buffer_info[i];
4300 size = min(len, max_per_txd);
bc7f75fa
AK
4301
4302 buffer_info->length = size;
4303 buffer_info->time_stamp = jiffies;
bc7f75fa 4304 buffer_info->next_to_watch = i;
0be3f55f 4305 buffer_info->dma = dma_map_page(&pdev->dev, frag->page,
03b1320d 4306 offset, size,
0be3f55f 4307 DMA_TO_DEVICE);
03b1320d 4308 buffer_info->mapped_as_page = true;
0be3f55f 4309 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
03b1320d 4310 goto dma_error;
bc7f75fa
AK
4311
4312 len -= size;
4313 offset += size;
4314 count++;
bc7f75fa
AK
4315 }
4316 }
4317
9ed318d5
TH
4318 segs = skb_shinfo(skb)->gso_segs ?: 1;
4319 /* multiply data chunks by size of headers */
4320 bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
4321
bc7f75fa 4322 tx_ring->buffer_info[i].skb = skb;
9ed318d5
TH
4323 tx_ring->buffer_info[i].segs = segs;
4324 tx_ring->buffer_info[i].bytecount = bytecount;
bc7f75fa
AK
4325 tx_ring->buffer_info[first].next_to_watch = i;
4326
4327 return count;
03b1320d
AD
4328
4329dma_error:
4330 dev_err(&pdev->dev, "TX DMA map failed\n");
4331 buffer_info->dma = 0;
c1fa347f 4332 if (count)
03b1320d 4333 count--;
c1fa347f
RK
4334
4335 while (count--) {
4336 if (i==0)
03b1320d 4337 i += tx_ring->count;
c1fa347f 4338 i--;
03b1320d
AD
4339 buffer_info = &tx_ring->buffer_info[i];
4340 e1000_put_txbuf(adapter, buffer_info);;
4341 }
4342
4343 return 0;
bc7f75fa
AK
4344}
4345
4346static void e1000_tx_queue(struct e1000_adapter *adapter,
4347 int tx_flags, int count)
4348{
4349 struct e1000_ring *tx_ring = adapter->tx_ring;
4350 struct e1000_tx_desc *tx_desc = NULL;
4351 struct e1000_buffer *buffer_info;
4352 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4353 unsigned int i;
4354
4355 if (tx_flags & E1000_TX_FLAGS_TSO) {
4356 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4357 E1000_TXD_CMD_TSE;
4358 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4359
4360 if (tx_flags & E1000_TX_FLAGS_IPV4)
4361 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4362 }
4363
4364 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4365 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4366 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4367 }
4368
4369 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4370 txd_lower |= E1000_TXD_CMD_VLE;
4371 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4372 }
4373
4374 i = tx_ring->next_to_use;
4375
4376 while (count--) {
4377 buffer_info = &tx_ring->buffer_info[i];
4378 tx_desc = E1000_TX_DESC(*tx_ring, i);
4379 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4380 tx_desc->lower.data =
4381 cpu_to_le32(txd_lower | buffer_info->length);
4382 tx_desc->upper.data = cpu_to_le32(txd_upper);
4383
4384 i++;
4385 if (i == tx_ring->count)
4386 i = 0;
4387 }
4388
4389 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4390
ad68076e
BA
4391 /*
4392 * Force memory writes to complete before letting h/w
bc7f75fa
AK
4393 * know there are new descriptors to fetch. (Only
4394 * applicable for weak-ordered memory model archs,
ad68076e
BA
4395 * such as IA-64).
4396 */
bc7f75fa
AK
4397 wmb();
4398
4399 tx_ring->next_to_use = i;
4400 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA
4401 /*
4402 * we need this if more than one processor can write to our tail
4403 * at a time, it synchronizes IO on IA64/Altix systems
4404 */
bc7f75fa
AK
4405 mmiowb();
4406}
4407
4408#define MINIMUM_DHCP_PACKET_SIZE 282
4409static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4410 struct sk_buff *skb)
4411{
4412 struct e1000_hw *hw = &adapter->hw;
4413 u16 length, offset;
4414
4415 if (vlan_tx_tag_present(skb)) {
8e95a202
JP
4416 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4417 (adapter->hw.mng_cookie.status &
bc7f75fa
AK
4418 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4419 return 0;
4420 }
4421
4422 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4423 return 0;
4424
4425 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4426 return 0;
4427
4428 {
4429 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4430 struct udphdr *udp;
4431
4432 if (ip->protocol != IPPROTO_UDP)
4433 return 0;
4434
4435 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4436 if (ntohs(udp->dest) != 67)
4437 return 0;
4438
4439 offset = (u8 *)udp + 8 - skb->data;
4440 length = skb->len - offset;
4441 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4442 }
4443
4444 return 0;
4445}
4446
4447static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4448{
4449 struct e1000_adapter *adapter = netdev_priv(netdev);
4450
4451 netif_stop_queue(netdev);
ad68076e
BA
4452 /*
4453 * Herbert's original patch had:
bc7f75fa 4454 * smp_mb__after_netif_stop_queue();
ad68076e
BA
4455 * but since that doesn't exist yet, just open code it.
4456 */
bc7f75fa
AK
4457 smp_mb();
4458
ad68076e
BA
4459 /*
4460 * We need to check again in a case another CPU has just
4461 * made room available.
4462 */
bc7f75fa
AK
4463 if (e1000_desc_unused(adapter->tx_ring) < size)
4464 return -EBUSY;
4465
4466 /* A reprieve! */
4467 netif_start_queue(netdev);
4468 ++adapter->restart_queue;
4469 return 0;
4470}
4471
4472static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4473{
4474 struct e1000_adapter *adapter = netdev_priv(netdev);
4475
4476 if (e1000_desc_unused(adapter->tx_ring) >= size)
4477 return 0;
4478 return __e1000_maybe_stop_tx(netdev, size);
4479}
4480
4481#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH
4482static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4483 struct net_device *netdev)
bc7f75fa
AK
4484{
4485 struct e1000_adapter *adapter = netdev_priv(netdev);
4486 struct e1000_ring *tx_ring = adapter->tx_ring;
4487 unsigned int first;
4488 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4489 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4490 unsigned int tx_flags = 0;
e743d313 4491 unsigned int len = skb_headlen(skb);
4e6c709c
AK
4492 unsigned int nr_frags;
4493 unsigned int mss;
bc7f75fa
AK
4494 int count = 0;
4495 int tso;
4496 unsigned int f;
bc7f75fa
AK
4497
4498 if (test_bit(__E1000_DOWN, &adapter->state)) {
4499 dev_kfree_skb_any(skb);
4500 return NETDEV_TX_OK;
4501 }
4502
4503 if (skb->len <= 0) {
4504 dev_kfree_skb_any(skb);
4505 return NETDEV_TX_OK;
4506 }
4507
4508 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA
4509 /*
4510 * The controller does a simple calculation to
bc7f75fa
AK
4511 * make sure there is enough room in the FIFO before
4512 * initiating the DMA for each buffer. The calc is:
4513 * 4 = ceil(buffer len/mss). To make sure we don't
4514 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA
4515 * drops.
4516 */
bc7f75fa
AK
4517 if (mss) {
4518 u8 hdr_len;
4519 max_per_txd = min(mss << 2, max_per_txd);
4520 max_txd_pwr = fls(max_per_txd) - 1;
4521
ad68076e
BA
4522 /*
4523 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4524 * points to just header, pull a few bytes of payload from
4525 * frags into skb->data
4526 */
bc7f75fa 4527 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA
4528 /*
4529 * we do this workaround for ES2LAN, but it is un-necessary,
4530 * avoiding it could save a lot of cycles
4531 */
4e6c709c 4532 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK
4533 unsigned int pull_size;
4534
4535 pull_size = min((unsigned int)4, skb->data_len);
4536 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4537 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK
4538 dev_kfree_skb_any(skb);
4539 return NETDEV_TX_OK;
4540 }
e743d313 4541 len = skb_headlen(skb);
bc7f75fa
AK
4542 }
4543 }
4544
4545 /* reserve a descriptor for the offload context */
4546 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4547 count++;
4548 count++;
4549
4550 count += TXD_USE_COUNT(len, max_txd_pwr);
4551
4552 nr_frags = skb_shinfo(skb)->nr_frags;
4553 for (f = 0; f < nr_frags; f++)
4554 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4555 max_txd_pwr);
4556
4557 if (adapter->hw.mac.tx_pkt_filtering)
4558 e1000_transfer_dhcp_info(adapter, skb);
4559
ad68076e
BA
4560 /*
4561 * need: count + 2 desc gap to keep tail from touching
4562 * head, otherwise try next time
4563 */
92af3e95 4564 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4565 return NETDEV_TX_BUSY;
bc7f75fa
AK
4566
4567 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4568 tx_flags |= E1000_TX_FLAGS_VLAN;
4569 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4570 }
4571
4572 first = tx_ring->next_to_use;
4573
4574 tso = e1000_tso(adapter, skb);
4575 if (tso < 0) {
4576 dev_kfree_skb_any(skb);
bc7f75fa
AK
4577 return NETDEV_TX_OK;
4578 }
4579
4580 if (tso)
4581 tx_flags |= E1000_TX_FLAGS_TSO;
4582 else if (e1000_tx_csum(adapter, skb))
4583 tx_flags |= E1000_TX_FLAGS_CSUM;
4584
ad68076e
BA
4585 /*
4586 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4587 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA
4588 * no longer assume, we must.
4589 */
bc7f75fa
AK
4590 if (skb->protocol == htons(ETH_P_IP))
4591 tx_flags |= E1000_TX_FLAGS_IPV4;
4592
1b7719c4 4593 /* if count is 0 then mapping error has occured */
bc7f75fa 4594 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD
4595 if (count) {
4596 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD
4597 /* Make sure there is space in the ring for the next send. */
4598 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4599
4600 } else {
bc7f75fa 4601 dev_kfree_skb_any(skb);
1b7719c4
AD
4602 tx_ring->buffer_info[first].time_stamp = 0;
4603 tx_ring->next_to_use = first;
bc7f75fa
AK
4604 }
4605
bc7f75fa
AK
4606 return NETDEV_TX_OK;
4607}
4608
4609/**
4610 * e1000_tx_timeout - Respond to a Tx Hang
4611 * @netdev: network interface device structure
4612 **/
4613static void e1000_tx_timeout(struct net_device *netdev)
4614{
4615 struct e1000_adapter *adapter = netdev_priv(netdev);
4616
4617 /* Do the reset outside of interrupt context */
4618 adapter->tx_timeout_count++;
4619 schedule_work(&adapter->reset_task);
4620}
4621
4622static void e1000_reset_task(struct work_struct *work)
4623{
4624 struct e1000_adapter *adapter;
4625 adapter = container_of(work, struct e1000_adapter, reset_task);
4626
84f4ee90
TI
4627 e1000e_dump(adapter);
4628 e_err("Reset adapter\n");
bc7f75fa
AK
4629 e1000e_reinit_locked(adapter);
4630}
4631
4632/**
4633 * e1000_get_stats - Get System Network Statistics
4634 * @netdev: network interface device structure
4635 *
4636 * Returns the address of the device statistics structure.
4637 * The statistics are actually updated from the timer callback.
4638 **/
4639static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4640{
bc7f75fa 4641 /* only return the current stats */
7274c20f 4642 return &netdev->stats;
bc7f75fa
AK
4643}
4644
4645/**
4646 * e1000_change_mtu - Change the Maximum Transfer Unit
4647 * @netdev: network interface device structure
4648 * @new_mtu: new value for maximum frame size
4649 *
4650 * Returns 0 on success, negative on failure
4651 **/
4652static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4653{
4654 struct e1000_adapter *adapter = netdev_priv(netdev);
4655 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4656
2adc55c9
BA
4657 /* Jumbo frame support */
4658 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4659 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4660 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK
4661 return -EINVAL;
4662 }
4663
2adc55c9
BA
4664 /* Supported frame sizes */
4665 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4666 (max_frame > adapter->max_hw_frame_size)) {
4667 e_err("Unsupported MTU setting\n");
bc7f75fa
AK
4668 return -EINVAL;
4669 }
4670
6f461f6c
BA
4671 /* 82573 Errata 17 */
4672 if (((adapter->hw.mac.type == e1000_82573) ||
4673 (adapter->hw.mac.type == e1000_82574)) &&
4674 (max_frame > ETH_FRAME_LEN + ETH_FCS_LEN)) {
4675 adapter->flags2 |= FLAG2_DISABLE_ASPM_L1;
4676 e1000e_disable_aspm(adapter->pdev, PCIE_LINK_STATE_L1);
4677 }
4678
bc7f75fa
AK
4679 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4680 msleep(1);
610c9928 4681 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4682 adapter->max_frame_size = max_frame;
610c9928
BA
4683 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4684 netdev->mtu = new_mtu;
bc7f75fa
AK
4685 if (netif_running(netdev))
4686 e1000e_down(adapter);
4687
ad68076e
BA
4688 /*
4689 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK
4690 * means we reserve 2 more, this pushes us to allocate from the next
4691 * larger slab size.
ad68076e 4692 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA
4693 * However with the new *_jumbo_rx* routines, jumbo receives will use
4694 * fragmented skbs
ad68076e 4695 */
bc7f75fa 4696
9926146b 4697 if (max_frame <= 2048)
bc7f75fa
AK
4698 adapter->rx_buffer_len = 2048;
4699 else
4700 adapter->rx_buffer_len = 4096;
4701
4702 /* adjust allocation if LPE protects us, and we aren't using SBP */
4703 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4704 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4705 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4706 + ETH_FCS_LEN;
bc7f75fa 4707
bc7f75fa
AK
4708 if (netif_running(netdev))
4709 e1000e_up(adapter);
4710 else
4711 e1000e_reset(adapter);
4712
4713 clear_bit(__E1000_RESETTING, &adapter->state);
4714
4715 return 0;
4716}
4717
4718static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4719 int cmd)
4720{
4721 struct e1000_adapter *adapter = netdev_priv(netdev);
4722 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4723
318a94d6 4724 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK
4725 return -EOPNOTSUPP;
4726
4727 switch (cmd) {
4728 case SIOCGMIIPHY:
4729 data->phy_id = adapter->hw.phy.addr;
4730 break;
4731 case SIOCGMIIREG:
b16a002e
BA
4732 e1000_phy_read_status(adapter);
4733
7c25769f
BA
4734 switch (data->reg_num & 0x1F) {
4735 case MII_BMCR:
4736 data->val_out = adapter->phy_regs.bmcr;
4737 break;
4738 case MII_BMSR:
4739 data->val_out = adapter->phy_regs.bmsr;
4740 break;
4741 case MII_PHYSID1:
4742 data->val_out = (adapter->hw.phy.id >> 16);
4743 break;
4744 case MII_PHYSID2:
4745 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4746 break;
4747 case MII_ADVERTISE:
4748 data->val_out = adapter->phy_regs.advertise;
4749 break;
4750 case MII_LPA:
4751 data->val_out = adapter->phy_regs.lpa;
4752 break;
4753 case MII_EXPANSION:
4754 data->val_out = adapter->phy_regs.expansion;
4755 break;
4756 case MII_CTRL1000:
4757 data->val_out = adapter->phy_regs.ctrl1000;
4758 break;
4759 case MII_STAT1000:
4760 data->val_out = adapter->phy_regs.stat1000;
4761 break;
4762 case MII_ESTATUS:
4763 data->val_out = adapter->phy_regs.estatus;
4764 break;
4765 default:
bc7f75fa
AK
4766 return -EIO;
4767 }
bc7f75fa
AK
4768 break;
4769 case SIOCSMIIREG:
4770 default:
4771 return -EOPNOTSUPP;
4772 }
4773 return 0;
4774}
4775
4776static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4777{
4778 switch (cmd) {
4779 case SIOCGMIIPHY:
4780 case SIOCGMIIREG:
4781 case SIOCSMIIREG:
4782 return e1000_mii_ioctl(netdev, ifr, cmd);
4783 default:
4784 return -EOPNOTSUPP;
4785 }
4786}
4787
a4f58f54
BA
4788static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4789{
4790 struct e1000_hw *hw = &adapter->hw;
4791 u32 i, mac_reg;
4792 u16 phy_reg;
4793 int retval = 0;
4794
4795 /* copy MAC RARs to PHY RARs */
4796 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4797 mac_reg = er32(RAL(i));
4798 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF));
4799 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF));
4800 mac_reg = er32(RAH(i));
4801 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF));
4802 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF));
4803 }
4804
4805 /* copy MAC MTA to PHY MTA */
4806 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4807 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4808 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4809 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4810 }
4811
4812 /* configure PHY Rx Control register */
4813 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4814 mac_reg = er32(RCTL);
4815 if (mac_reg & E1000_RCTL_UPE)
4816 phy_reg |= BM_RCTL_UPE;
4817 if (mac_reg & E1000_RCTL_MPE)
4818 phy_reg |= BM_RCTL_MPE;
4819 phy_reg &= ~(BM_RCTL_MO_MASK);
4820 if (mac_reg & E1000_RCTL_MO_3)
4821 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4822 << BM_RCTL_MO_SHIFT);
4823 if (mac_reg & E1000_RCTL_BAM)
4824 phy_reg |= BM_RCTL_BAM;
4825 if (mac_reg & E1000_RCTL_PMCF)
4826 phy_reg |= BM_RCTL_PMCF;
4827 mac_reg = er32(CTRL);
4828 if (mac_reg & E1000_CTRL_RFCE)
4829 phy_reg |= BM_RCTL_RFCE;
4830 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4831
4832 /* enable PHY wakeup in MAC register */
4833 ew32(WUFC, wufc);
4834 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4835
4836 /* configure and enable PHY wakeup in PHY registers */
4837 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4838 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4839
4840 /* activate PHY wakeup */
94d8186a 4841 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA
4842 if (retval) {
4843 e_err("Could not acquire PHY\n");
4844 return retval;
4845 }
4846 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4847 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4848 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4849 if (retval) {
4850 e_err("Could not read PHY page 769\n");
4851 goto out;
4852 }
4853 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4854 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4855 if (retval)
4856 e_err("Could not set PHY Host Wakeup bit\n");
4857out:
94d8186a 4858 hw->phy.ops.release(hw);
a4f58f54
BA
4859
4860 return retval;
4861}
4862
23606cf5
RW
4863static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
4864 bool runtime)
bc7f75fa
AK
4865{
4866 struct net_device *netdev = pci_get_drvdata(pdev);
4867 struct e1000_adapter *adapter = netdev_priv(netdev);
4868 struct e1000_hw *hw = &adapter->hw;
4869 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW
4870 /* Runtime suspend should only enable wakeup for link changes */
4871 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK
4872 int retval = 0;
4873
4874 netif_device_detach(netdev);
4875
4876 if (netif_running(netdev)) {
4877 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4878 e1000e_down(adapter);
4879 e1000_free_irq(adapter);
4880 }
4662e82b 4881 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK
4882
4883 retval = pci_save_state(pdev);
4884 if (retval)
4885 return retval;
4886
4887 status = er32(STATUS);
4888 if (status & E1000_STATUS_LU)
4889 wufc &= ~E1000_WUFC_LNKC;
4890
4891 if (wufc) {
4892 e1000_setup_rctl(adapter);
4893 e1000_set_multi(netdev);
4894
4895 /* turn on all-multi mode if wake on multicast is enabled */
4896 if (wufc & E1000_WUFC_MC) {
4897 rctl = er32(RCTL);
4898 rctl |= E1000_RCTL_MPE;
4899 ew32(RCTL, rctl);
4900 }
4901
4902 ctrl = er32(CTRL);
4903 /* advertise wake from D3Cold */
4904 #define E1000_CTRL_ADVD3WUC 0x00100000
4905 /* phy power management enable */
4906 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA
4907 ctrl |= E1000_CTRL_ADVD3WUC;
4908 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
4909 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK
4910 ew32(CTRL, ctrl);
4911
318a94d6
JK
4912 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4913 adapter->hw.phy.media_type ==
4914 e1000_media_type_internal_serdes) {
bc7f75fa
AK
4915 /* keep the laser running in D3 */
4916 ctrl_ext = er32(CTRL_EXT);
93a23f48 4917 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK
4918 ew32(CTRL_EXT, ctrl_ext);
4919 }
4920
97ac8cae
BA
4921 if (adapter->flags & FLAG_IS_ICH)
4922 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4923
bc7f75fa
AK
4924 /* Allow time for pending master requests to run */
4925 e1000e_disable_pcie_master(&adapter->hw);
4926
82776a4b 4927 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA
4928 /* enable wakeup by the PHY */
4929 retval = e1000_init_phy_wakeup(adapter, wufc);
4930 if (retval)
4931 return retval;
4932 } else {
4933 /* enable wakeup by the MAC */
4934 ew32(WUFC, wufc);
4935 ew32(WUC, E1000_WUC_PME_EN);
4936 }
bc7f75fa
AK
4937 } else {
4938 ew32(WUC, 0);
4939 ew32(WUFC, 0);
bc7f75fa
AK
4940 }
4941
4f9de721
RW
4942 *enable_wake = !!wufc;
4943
bc7f75fa 4944 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA
4945 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
4946 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 4947 *enable_wake = true;
bc7f75fa
AK
4948
4949 if (adapter->hw.phy.type == e1000_phy_igp_3)
4950 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4951
ad68076e
BA
4952 /*
4953 * Release control of h/w to f/w. If f/w is AMT enabled, this
4954 * would have already happened in close and is redundant.
4955 */
bc7f75fa
AK
4956 e1000_release_hw_control(adapter);
4957
4958 pci_disable_device(pdev);
4959
4f9de721
RW
4960 return 0;
4961}
4962
4963static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
4964{
4965 if (sleep && wake) {
4966 pci_prepare_to_sleep(pdev);
4967 return;
4968 }
4969
4970 pci_wake_from_d3(pdev, wake);
4971 pci_set_power_state(pdev, PCI_D3hot);
4972}
4973
4974static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
4975 bool wake)
4976{
4977 struct net_device *netdev = pci_get_drvdata(pdev);
4978 struct e1000_adapter *adapter = netdev_priv(netdev);
4979
005cbdfc
AD
4980 /*
4981 * The pci-e switch on some quad port adapters will report a
4982 * correctable error when the MAC transitions from D0 to D3. To
4983 * prevent this we need to mask off the correctable errors on the
4984 * downstream port of the pci-e switch.
4985 */
4986 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4987 struct pci_dev *us_dev = pdev->bus->self;
4988 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4989 u16 devctl;
4990
4991 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4992 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4993 (devctl & ~PCI_EXP_DEVCTL_CERE));
4994
4f9de721 4995 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD
4996
4997 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4998 } else {
4f9de721 4999 e1000_power_off(pdev, sleep, wake);
005cbdfc 5000 }
bc7f75fa
AK
5001}
5002
6f461f6c
BA
5003#ifdef CONFIG_PCIEASPM
5004static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5005{
5006 pci_disable_link_state(pdev, state);
5007}
5008#else
5009static void __e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
1eae4eb2
AK
5010{
5011 int pos;
6f461f6c 5012 u16 reg16;
1eae4eb2
AK
5013
5014 /*
6f461f6c
BA
5015 * Both device and parent should have the same ASPM setting.
5016 * Disable ASPM in downstream component first and then upstream.
1eae4eb2 5017 */
6f461f6c
BA
5018 pos = pci_pcie_cap(pdev);
5019 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &reg16);
5020 reg16 &= ~state;
5021 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, reg16);
5022
0c75ba22
AB
5023 if (!pdev->bus->self)
5024 return;
5025
6f461f6c
BA
5026 pos = pci_pcie_cap(pdev->bus->self);
5027 pci_read_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, &reg16);
5028 reg16 &= ~state;
5029 pci_write_config_word(pdev->bus->self, pos + PCI_EXP_LNKCTL, reg16);
5030}
5031#endif
5032void e1000e_disable_aspm(struct pci_dev *pdev, u16 state)
5033{
5034 dev_info(&pdev->dev, "Disabling ASPM %s %s\n",
5035 (state & PCIE_LINK_STATE_L0S) ? "L0s" : "",
5036 (state & PCIE_LINK_STATE_L1) ? "L1" : "");
5037
5038 __e1000e_disable_aspm(pdev, state);
1eae4eb2
AK
5039}
5040
a0340162 5041#ifdef CONFIG_PM_OPS
23606cf5
RW
5042static bool e1000e_pm_ready(struct e1000_adapter *adapter)
5043{
5044 return !!adapter->tx_ring->buffer_info;
5045}
5046
23606cf5
RW
5047static int __e1000_resume(struct pci_dev *pdev)
5048{
5049 struct net_device *netdev = pci_get_drvdata(pdev);
5050 struct e1000_adapter *adapter = netdev_priv(netdev);
5051 struct e1000_hw *hw = &adapter->hw;
5052 u32 err;
5053
bc7f75fa
AK
5054 pci_set_power_state(pdev, PCI_D0);
5055 pci_restore_state(pdev);
28b8f04a 5056 pci_save_state(pdev);
6f461f6c
BA
5057 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5058 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
bc7f75fa 5059
4662e82b 5060 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK
5061 if (netif_running(netdev)) {
5062 err = e1000_request_irq(adapter);
5063 if (err)
5064 return err;
5065 }
5066
5067 e1000e_power_up_phy(adapter);
a4f58f54
BA
5068
5069 /* report the system wakeup cause from S3/S4 */
5070 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
5071 u16 phy_data;
5072
5073 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
5074 if (phy_data) {
5075 e_info("PHY Wakeup cause - %s\n",
5076 phy_data & E1000_WUS_EX ? "Unicast Packet" :
5077 phy_data & E1000_WUS_MC ? "Multicast Packet" :
5078 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
5079 phy_data & E1000_WUS_MAG ? "Magic Packet" :
5080 phy_data & E1000_WUS_LNKC ? "Link Status "
5081 " Change" : "other");
5082 }
5083 e1e_wphy(&adapter->hw, BM_WUS, ~0);
5084 } else {
5085 u32 wus = er32(WUS);
5086 if (wus) {
5087 e_info("MAC Wakeup cause - %s\n",
5088 wus & E1000_WUS_EX ? "Unicast Packet" :
5089 wus & E1000_WUS_MC ? "Multicast Packet" :
5090 wus & E1000_WUS_BC ? "Broadcast Packet" :
5091 wus & E1000_WUS_MAG ? "Magic Packet" :
5092 wus & E1000_WUS_LNKC ? "Link Status Change" :
5093 "other");
5094 }
5095 ew32(WUS, ~0);
5096 }
5097
bc7f75fa 5098 e1000e_reset(adapter);
bc7f75fa
AK
5099
5100 e1000_init_manageability(adapter);
5101
5102 if (netif_running(netdev))
5103 e1000e_up(adapter);
5104
5105 netif_device_attach(netdev);
5106
ad68076e
BA
5107 /*
5108 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5109 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
5110 * under the control of the driver.
5111 */
c43bc57e 5112 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
5113 e1000_get_hw_control(adapter);
5114
5115 return 0;
5116}
23606cf5 5117
a0340162
RW
5118#ifdef CONFIG_PM_SLEEP
5119static int e1000_suspend(struct device *dev)
5120{
5121 struct pci_dev *pdev = to_pci_dev(dev);
5122 int retval;
5123 bool wake;
5124
5125 retval = __e1000_shutdown(pdev, &wake, false);
5126 if (!retval)
5127 e1000_complete_shutdown(pdev, true, wake);
5128
5129 return retval;
5130}
5131
23606cf5
RW
5132static int e1000_resume(struct device *dev)
5133{
5134 struct pci_dev *pdev = to_pci_dev(dev);
5135 struct net_device *netdev = pci_get_drvdata(pdev);
5136 struct e1000_adapter *adapter = netdev_priv(netdev);
5137
5138 if (e1000e_pm_ready(adapter))
5139 adapter->idle_check = true;
5140
5141 return __e1000_resume(pdev);
5142}
a0340162
RW
5143#endif /* CONFIG_PM_SLEEP */
5144
5145#ifdef CONFIG_PM_RUNTIME
5146static int e1000_runtime_suspend(struct device *dev)
5147{
5148 struct pci_dev *pdev = to_pci_dev(dev);
5149 struct net_device *netdev = pci_get_drvdata(pdev);
5150 struct e1000_adapter *adapter = netdev_priv(netdev);
5151
5152 if (e1000e_pm_ready(adapter)) {
5153 bool wake;
5154
5155 __e1000_shutdown(pdev, &wake, true);
5156 }
5157
5158 return 0;
5159}
5160
5161static int e1000_idle(struct device *dev)
5162{
5163 struct pci_dev *pdev = to_pci_dev(dev);
5164 struct net_device *netdev = pci_get_drvdata(pdev);
5165 struct e1000_adapter *adapter = netdev_priv(netdev);
5166
5167 if (!e1000e_pm_ready(adapter))
5168 return 0;
5169
5170 if (adapter->idle_check) {
5171 adapter->idle_check = false;
5172 if (!e1000e_has_link(adapter))
5173 pm_schedule_suspend(dev, MSEC_PER_SEC);
5174 }
5175
5176 return -EBUSY;
5177}
23606cf5
RW
5178
5179static int e1000_runtime_resume(struct device *dev)
5180{
5181 struct pci_dev *pdev = to_pci_dev(dev);
5182 struct net_device *netdev = pci_get_drvdata(pdev);
5183 struct e1000_adapter *adapter = netdev_priv(netdev);
5184
5185 if (!e1000e_pm_ready(adapter))
5186 return 0;
5187
5188 adapter->idle_check = !dev->power.runtime_auto;
5189 return __e1000_resume(pdev);
5190}
a0340162
RW
5191#endif /* CONFIG_PM_RUNTIME */
5192#endif /* CONFIG_PM_OPS */
bc7f75fa
AK
5193
5194static void e1000_shutdown(struct pci_dev *pdev)
5195{
4f9de721
RW
5196 bool wake = false;
5197
23606cf5 5198 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW
5199
5200 if (system_state == SYSTEM_POWER_OFF)
5201 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK
5202}
5203
5204#ifdef CONFIG_NET_POLL_CONTROLLER
5205/*
5206 * Polling 'interrupt' - used by things like netconsole to send skbs
5207 * without having to re-enable interrupts. It's not called while
5208 * the interrupt routine is executing.
5209 */
5210static void e1000_netpoll(struct net_device *netdev)
5211{
5212 struct e1000_adapter *adapter = netdev_priv(netdev);
5213
5214 disable_irq(adapter->pdev->irq);
5215 e1000_intr(adapter->pdev->irq, netdev);
5216
bc7f75fa
AK
5217 enable_irq(adapter->pdev->irq);
5218}
5219#endif
5220
5221/**
5222 * e1000_io_error_detected - called when PCI error is detected
5223 * @pdev: Pointer to PCI device
5224 * @state: The current pci connection state
5225 *
5226 * This function is called after a PCI bus error affecting
5227 * this device has been detected.
5228 */
5229static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
5230 pci_channel_state_t state)
5231{
5232 struct net_device *netdev = pci_get_drvdata(pdev);
5233 struct e1000_adapter *adapter = netdev_priv(netdev);
5234
5235 netif_device_detach(netdev);
5236
c93b5a76
MM
5237 if (state == pci_channel_io_perm_failure)
5238 return PCI_ERS_RESULT_DISCONNECT;
5239
bc7f75fa
AK
5240 if (netif_running(netdev))
5241 e1000e_down(adapter);
5242 pci_disable_device(pdev);
5243
5244 /* Request a slot slot reset. */
5245 return PCI_ERS_RESULT_NEED_RESET;
5246}
5247
5248/**
5249 * e1000_io_slot_reset - called after the pci bus has been reset.
5250 * @pdev: Pointer to PCI device
5251 *
5252 * Restart the card from scratch, as if from a cold-boot. Implementation
5253 * resembles the first-half of the e1000_resume routine.
5254 */
5255static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5256{
5257 struct net_device *netdev = pci_get_drvdata(pdev);
5258 struct e1000_adapter *adapter = netdev_priv(netdev);
5259 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 5260 int err;
111b9dc5 5261 pci_ers_result_t result;
bc7f75fa 5262
6f461f6c
BA
5263 if (adapter->flags2 & FLAG2_DISABLE_ASPM_L1)
5264 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
f0f422e5 5265 err = pci_enable_device_mem(pdev);
6e4f6f6b 5266 if (err) {
bc7f75fa
AK
5267 dev_err(&pdev->dev,
5268 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB
5269 result = PCI_ERS_RESULT_DISCONNECT;
5270 } else {
5271 pci_set_master(pdev);
23606cf5 5272 pdev->state_saved = true;
111b9dc5 5273 pci_restore_state(pdev);
bc7f75fa 5274
111b9dc5
JB
5275 pci_enable_wake(pdev, PCI_D3hot, 0);
5276 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 5277
111b9dc5
JB
5278 e1000e_reset(adapter);
5279 ew32(WUS, ~0);
5280 result = PCI_ERS_RESULT_RECOVERED;
5281 }
bc7f75fa 5282
111b9dc5
JB
5283 pci_cleanup_aer_uncorrect_error_status(pdev);
5284
5285 return result;
bc7f75fa
AK
5286}
5287
5288/**
5289 * e1000_io_resume - called when traffic can start flowing again.
5290 * @pdev: Pointer to PCI device
5291 *
5292 * This callback is called when the error recovery driver tells us that
5293 * its OK to resume normal operation. Implementation resembles the
5294 * second-half of the e1000_resume routine.
5295 */
5296static void e1000_io_resume(struct pci_dev *pdev)
5297{
5298 struct net_device *netdev = pci_get_drvdata(pdev);
5299 struct e1000_adapter *adapter = netdev_priv(netdev);
5300
5301 e1000_init_manageability(adapter);
5302
5303 if (netif_running(netdev)) {
5304 if (e1000e_up(adapter)) {
5305 dev_err(&pdev->dev,
5306 "can't bring device back up after reset\n");
5307 return;
5308 }
5309 }
5310
5311 netif_device_attach(netdev);
5312
ad68076e
BA
5313 /*
5314 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5315 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
5316 * under the control of the driver.
5317 */
c43bc57e 5318 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
5319 e1000_get_hw_control(adapter);
5320
5321}
5322
5323static void e1000_print_device_info(struct e1000_adapter *adapter)
5324{
5325 struct e1000_hw *hw = &adapter->hw;
5326 struct net_device *netdev = adapter->netdev;
69e3fd8c 5327 u32 pba_num;
bc7f75fa
AK
5328
5329 /* print bus type/speed/width info */
7c510e4b 5330 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK
5331 /* bus width */
5332 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
5333 "Width x1"),
5334 /* MAC address */
7c510e4b 5335 netdev->dev_addr);
44defeb3
JK
5336 e_info("Intel(R) PRO/%s Network Connection\n",
5337 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 5338 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK
5339 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
5340 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK
5341}
5342
10aa4c04
AK
5343static void e1000_eeprom_checks(struct e1000_adapter *adapter)
5344{
5345 struct e1000_hw *hw = &adapter->hw;
5346 int ret_val;
5347 u16 buf = 0;
5348
5349 if (hw->mac.type != e1000_82573)
5350 return;
5351
5352 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 5353 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 5354 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP
5355 dev_warn(&adapter->pdev->dev,
5356 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04 5357 }
10aa4c04
AK
5358}
5359
651c2466
SH
5360static const struct net_device_ops e1000e_netdev_ops = {
5361 .ndo_open = e1000_open,
5362 .ndo_stop = e1000_close,
00829823 5363 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH
5364 .ndo_get_stats = e1000_get_stats,
5365 .ndo_set_multicast_list = e1000_set_multi,
5366 .ndo_set_mac_address = e1000_set_mac,
5367 .ndo_change_mtu = e1000_change_mtu,
5368 .ndo_do_ioctl = e1000_ioctl,
5369 .ndo_tx_timeout = e1000_tx_timeout,
5370 .ndo_validate_addr = eth_validate_addr,
5371
5372 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5373 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5374 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5375#ifdef CONFIG_NET_POLL_CONTROLLER
5376 .ndo_poll_controller = e1000_netpoll,
5377#endif
5378};
5379
bc7f75fa
AK
5380/**
5381 * e1000_probe - Device Initialization Routine
5382 * @pdev: PCI device information struct
5383 * @ent: entry in e1000_pci_tbl
5384 *
5385 * Returns 0 on success, negative on failure
5386 *
5387 * e1000_probe initializes an adapter identified by a pci_dev structure.
5388 * The OS initialization, configuring of the adapter private structure,
5389 * and a hardware reset occur.
5390 **/
5391static int __devinit e1000_probe(struct pci_dev *pdev,
5392 const struct pci_device_id *ent)
5393{
5394 struct net_device *netdev;
5395 struct e1000_adapter *adapter;
5396 struct e1000_hw *hw;
5397 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB
5398 resource_size_t mmio_start, mmio_len;
5399 resource_size_t flash_start, flash_len;
bc7f75fa
AK
5400
5401 static int cards_found;
5402 int i, err, pci_using_dac;
5403 u16 eeprom_data = 0;
5404 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5405
6f461f6c
BA
5406 if (ei->flags2 & FLAG2_DISABLE_ASPM_L1)
5407 e1000e_disable_aspm(pdev, PCIE_LINK_STATE_L1);
6e4f6f6b 5408
f0f422e5 5409 err = pci_enable_device_mem(pdev);
bc7f75fa
AK
5410 if (err)
5411 return err;
5412
5413 pci_using_dac = 0;
0be3f55f 5414 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa 5415 if (!err) {
0be3f55f 5416 err = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64));
bc7f75fa
AK
5417 if (!err)
5418 pci_using_dac = 1;
5419 } else {
0be3f55f 5420 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
bc7f75fa 5421 if (err) {
0be3f55f
NN
5422 err = dma_set_coherent_mask(&pdev->dev,
5423 DMA_BIT_MASK(32));
bc7f75fa
AK
5424 if (err) {
5425 dev_err(&pdev->dev, "No usable DMA "
5426 "configuration, aborting\n");
5427 goto err_dma;
5428 }
5429 }
5430 }
5431
e8de1481 5432 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA
5433 pci_select_bars(pdev, IORESOURCE_MEM),
5434 e1000e_driver_name);
bc7f75fa
AK
5435 if (err)
5436 goto err_pci_reg;
5437
68eac460 5438 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5439 pci_enable_pcie_error_reporting(pdev);
68eac460 5440
bc7f75fa 5441 pci_set_master(pdev);
438b365a
BA
5442 /* PCI config space info */
5443 err = pci_save_state(pdev);
5444 if (err)
5445 goto err_alloc_etherdev;
bc7f75fa
AK
5446
5447 err = -ENOMEM;
5448 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5449 if (!netdev)
5450 goto err_alloc_etherdev;
5451
bc7f75fa
AK
5452 SET_NETDEV_DEV(netdev, &pdev->dev);
5453
5454 pci_set_drvdata(pdev, netdev);
5455 adapter = netdev_priv(netdev);
5456 hw = &adapter->hw;
5457 adapter->netdev = netdev;
5458 adapter->pdev = pdev;
5459 adapter->ei = ei;
5460 adapter->pba = ei->pba;
5461 adapter->flags = ei->flags;
eb7c3adb 5462 adapter->flags2 = ei->flags2;
bc7f75fa
AK
5463 adapter->hw.adapter = adapter;
5464 adapter->hw.mac.type = ei->mac;
2adc55c9 5465 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK
5466 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5467
5468 mmio_start = pci_resource_start(pdev, 0);
5469 mmio_len = pci_resource_len(pdev, 0);
5470
5471 err = -EIO;
5472 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5473 if (!adapter->hw.hw_addr)
5474 goto err_ioremap;
5475
5476 if ((adapter->flags & FLAG_HAS_FLASH) &&
5477 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5478 flash_start = pci_resource_start(pdev, 1);
5479 flash_len = pci_resource_len(pdev, 1);
5480 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5481 if (!adapter->hw.flash_address)
5482 goto err_flashmap;
5483 }
5484
5485 /* construct the net_device struct */
651c2466 5486 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5487 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK
5488 netdev->watchdog_timeo = 5 * HZ;
5489 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK
5490 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5491
5492 netdev->mem_start = mmio_start;
5493 netdev->mem_end = mmio_start + mmio_len;
5494
5495 adapter->bd_number = cards_found++;
5496
4662e82b
BA
5497 e1000e_check_options(adapter);
5498
bc7f75fa
AK
5499 /* setup adapter struct */
5500 err = e1000_sw_init(adapter);
5501 if (err)
5502 goto err_sw_init;
5503
5504 err = -EIO;
5505
5506 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5507 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5508 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5509
69e3fd8c 5510 err = ei->get_variants(adapter);
bc7f75fa
AK
5511 if (err)
5512 goto err_hw_init;
5513
4a770358
BA
5514 if ((adapter->flags & FLAG_IS_ICH) &&
5515 (adapter->flags & FLAG_READ_ONLY_NVM))
5516 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5517
bc7f75fa
AK
5518 hw->mac.ops.get_bus_info(&adapter->hw);
5519
318a94d6 5520 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK
5521
5522 /* Copper options */
318a94d6 5523 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK
5524 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5525 adapter->hw.phy.disable_polarity_correction = 0;
5526 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5527 }
5528
5529 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5530 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK
5531
5532 netdev->features = NETIF_F_SG |
5533 NETIF_F_HW_CSUM |
5534 NETIF_F_HW_VLAN_TX |
5535 NETIF_F_HW_VLAN_RX;
5536
5537 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5538 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5539
5540 netdev->features |= NETIF_F_TSO;
5541 netdev->features |= NETIF_F_TSO6;
5542
a5136e23
JK
5543 netdev->vlan_features |= NETIF_F_TSO;
5544 netdev->vlan_features |= NETIF_F_TSO6;
5545 netdev->vlan_features |= NETIF_F_HW_CSUM;
5546 netdev->vlan_features |= NETIF_F_SG;
5547
bc7f75fa
AK
5548 if (pci_using_dac)
5549 netdev->features |= NETIF_F_HIGHDMA;
5550
bc7f75fa
AK
5551 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5552 adapter->flags |= FLAG_MNG_PT_ENABLED;
5553
ad68076e
BA
5554 /*
5555 * before reading the NVM, reset the controller to
5556 * put the device in a known good starting state
5557 */
bc7f75fa
AK
5558 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5559
5560 /*
5561 * systems with ASPM and others may see the checksum fail on the first
5562 * attempt. Let's give it a few tries
5563 */
5564 for (i = 0;; i++) {
5565 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5566 break;
5567 if (i == 2) {
44defeb3 5568 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK
5569 err = -EIO;
5570 goto err_eeprom;
5571 }
5572 }
5573
10aa4c04
AK
5574 e1000_eeprom_checks(adapter);
5575
608f8a0d 5576 /* copy the MAC address */
bc7f75fa 5577 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5578 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK
5579
5580 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5581 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5582
5583 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5584 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK
5585 err = -EIO;
5586 goto err_eeprom;
5587 }
5588
5589 init_timer(&adapter->watchdog_timer);
5590 adapter->watchdog_timer.function = &e1000_watchdog;
5591 adapter->watchdog_timer.data = (unsigned long) adapter;
5592
5593 init_timer(&adapter->phy_info_timer);
5594 adapter->phy_info_timer.function = &e1000_update_phy_info;
5595 adapter->phy_info_timer.data = (unsigned long) adapter;
5596
5597 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5598 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB
5599 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5600 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5601 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5602
bc7f75fa
AK
5603 /* Initialize link parameters. User can change them with ethtool */
5604 adapter->hw.mac.autoneg = 1;
309af40b 5605 adapter->fc_autoneg = 1;
5c48ef3e
BA
5606 adapter->hw.fc.requested_mode = e1000_fc_default;
5607 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK
5608 adapter->hw.phy.autoneg_advertised = 0x2f;
5609
5610 /* ring size defaults */
5611 adapter->rx_ring->count = 256;
5612 adapter->tx_ring->count = 256;
5613
5614 /*
5615 * Initial Wake on LAN setting - If APM wake is enabled in
5616 * the EEPROM, enable the ACPI Magic Packet filter
5617 */
5618 if (adapter->flags & FLAG_APME_IN_WUC) {
5619 /* APME bit in EEPROM is mapped to WUC.APME */
5620 eeprom_data = er32(WUC);
5621 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA
5622 if (eeprom_data & E1000_WUC_PHY_WAKE)
5623 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK
5624 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5625 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5626 (adapter->hw.bus.func == 1))
5627 e1000_read_nvm(&adapter->hw,
5628 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5629 else
5630 e1000_read_nvm(&adapter->hw,
5631 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5632 }
5633
5634 /* fetch WoL from EEPROM */
5635 if (eeprom_data & eeprom_apme_mask)
5636 adapter->eeprom_wol |= E1000_WUFC_MAG;
5637
5638 /*
5639 * now that we have the eeprom settings, apply the special cases
5640 * where the eeprom may be wrong or the board simply won't support
5641 * wake on lan on a particular port
5642 */
5643 if (!(adapter->flags & FLAG_HAS_WOL))
5644 adapter->eeprom_wol = 0;
5645
5646 /* initialize the wol settings based on the eeprom settings */
5647 adapter->wol = adapter->eeprom_wol;
6ff68026 5648 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5649
84527590
BA
5650 /* save off EEPROM version number */
5651 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5652
bc7f75fa
AK
5653 /* reset the hardware with the new settings */
5654 e1000e_reset(adapter);
5655
ad68076e
BA
5656 /*
5657 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5658 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA
5659 * under the control of the driver.
5660 */
c43bc57e 5661 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK
5662 e1000_get_hw_control(adapter);
5663
bc7f75fa
AK
5664 strcpy(netdev->name, "eth%d");
5665 err = register_netdev(netdev);
5666 if (err)
5667 goto err_register;
5668
9c563d20
JB
5669 /* carrier off reporting is important to ethtool even BEFORE open */
5670 netif_carrier_off(netdev);
5671
bc7f75fa
AK
5672 e1000_print_device_info(adapter);
5673
23606cf5
RW
5674 if (pci_dev_run_wake(pdev)) {
5675 pm_runtime_set_active(&pdev->dev);
5676 pm_runtime_enable(&pdev->dev);
5677 }
5678 pm_schedule_suspend(&pdev->dev, MSEC_PER_SEC);
5679
bc7f75fa
AK
5680 return 0;
5681
5682err_register:
c43bc57e
JB
5683 if (!(adapter->flags & FLAG_HAS_AMT))
5684 e1000_release_hw_control(adapter);
bc7f75fa
AK
5685err_eeprom:
5686 if (!e1000_check_reset_block(&adapter->hw))
5687 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5688err_hw_init:
bc7f75fa 5689
bc7f75fa
AK
5690 kfree(adapter->tx_ring);
5691 kfree(adapter->rx_ring);
5692err_sw_init:
c43bc57e
JB
5693 if (adapter->hw.flash_address)
5694 iounmap(adapter->hw.flash_address);
e82f54ba 5695 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5696err_flashmap:
bc7f75fa
AK
5697 iounmap(adapter->hw.hw_addr);
5698err_ioremap:
5699 free_netdev(netdev);
5700err_alloc_etherdev:
f0f422e5
BA
5701 pci_release_selected_regions(pdev,
5702 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK
5703err_pci_reg:
5704err_dma:
5705 pci_disable_device(pdev);
5706 return err;
5707}
5708
5709/**
5710 * e1000_remove - Device Removal Routine
5711 * @pdev: PCI device information struct
5712 *
5713 * e1000_remove is called by the PCI subsystem to alert the driver
5714 * that it should release a PCI device. The could be caused by a
5715 * Hot-Plug event, or because the driver is going to be removed from
5716 * memory.
5717 **/
5718static void __devexit e1000_remove(struct pci_dev *pdev)
5719{
5720 struct net_device *netdev = pci_get_drvdata(pdev);
5721 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW
5722 bool down = test_bit(__E1000_DOWN, &adapter->state);
5723
5724 pm_runtime_get_sync(&pdev->dev);
bc7f75fa 5725
ad68076e
BA
5726 /*
5727 * flush_scheduled work may reschedule our watchdog task, so
5728 * explicitly disable watchdog tasks from being rescheduled
5729 */
23606cf5
RW
5730 if (!down)
5731 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK
5732 del_timer_sync(&adapter->watchdog_timer);
5733 del_timer_sync(&adapter->phy_info_timer);
5734
41cec6f1
BA
5735 cancel_work_sync(&adapter->reset_task);
5736 cancel_work_sync(&adapter->watchdog_task);
5737 cancel_work_sync(&adapter->downshift_task);
5738 cancel_work_sync(&adapter->update_phy_task);
5739 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK
5740 flush_scheduled_work();
5741
17f208de
BA
5742 if (!(netdev->flags & IFF_UP))
5743 e1000_power_down_phy(adapter);
5744
23606cf5
RW
5745 /* Don't lie to e1000_close() down the road. */
5746 if (!down)
5747 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA
5748 unregister_netdev(netdev);
5749
23606cf5
RW
5750 if (pci_dev_run_wake(pdev)) {
5751 pm_runtime_disable(&pdev->dev);
5752 pm_runtime_set_suspended(&pdev->dev);
5753 }
5754 pm_runtime_put_noidle(&pdev->dev);
5755
ad68076e
BA
5756 /*
5757 * Release control of h/w to f/w. If f/w is AMT enabled, this
5758 * would have already happened in close and is redundant.
5759 */
bc7f75fa
AK
5760 e1000_release_hw_control(adapter);
5761
4662e82b 5762 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK
5763 kfree(adapter->tx_ring);
5764 kfree(adapter->rx_ring);
5765
5766 iounmap(adapter->hw.hw_addr);
5767 if (adapter->hw.flash_address)
5768 iounmap(adapter->hw.flash_address);
f0f422e5
BA
5769 pci_release_selected_regions(pdev,
5770 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK
5771
5772 free_netdev(netdev);
5773
111b9dc5 5774 /* AER disable */
19d5afd4 5775 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5776
bc7f75fa
AK
5777 pci_disable_device(pdev);
5778}
5779
5780/* PCI Error Recovery (ERS) */
5781static struct pci_error_handlers e1000_err_handler = {
5782 .error_detected = e1000_io_error_detected,
5783 .slot_reset = e1000_io_slot_reset,
5784 .resume = e1000_io_resume,
5785};
5786
a3aa1884 5787static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK
5788 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5789 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5790 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5791 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5792 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5793 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK
5794 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5795 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5796 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5797
bc7f75fa
AK
5798 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5799 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5800 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5801 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5802
bc7f75fa
AK
5803 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5804 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5805 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5806
4662e82b 5807 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5808 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5809 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5810
bc7f75fa
AK
5811 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5812 board_80003es2lan },
5813 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5814 board_80003es2lan },
5815 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5816 board_80003es2lan },
5817 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5818 board_80003es2lan },
ad68076e 5819
bc7f75fa
AK
5820 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5821 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5822 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5823 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5824 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5825 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5826 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 5827 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 5828
bc7f75fa
AK
5829 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5830 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5831 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5832 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5833 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5834 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA
5835 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5836 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5837 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5838
5839 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5840 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5841 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5842
f4187b56
BA
5843 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5844 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5845
a4f58f54
BA
5846 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5847 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5848 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5849 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5850
bc7f75fa
AK
5851 { } /* terminate list */
5852};
5853MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5854
a0340162 5855#ifdef CONFIG_PM_OPS
23606cf5 5856static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW
5857 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
5858 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
5859 e1000_runtime_resume, e1000_idle)
23606cf5 5860};
e50208a0 5861#endif
23606cf5 5862
bc7f75fa
AK
5863/* PCI Device API Driver */
5864static struct pci_driver e1000_driver = {
5865 .name = e1000e_driver_name,
5866 .id_table = e1000_pci_tbl,
5867 .probe = e1000_probe,
5868 .remove = __devexit_p(e1000_remove),
a0340162 5869#ifdef CONFIG_PM_OPS
23606cf5 5870 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK
5871#endif
5872 .shutdown = e1000_shutdown,
5873 .err_handler = &e1000_err_handler
5874};
5875
5876/**
5877 * e1000_init_module - Driver Registration Routine
5878 *
5879 * e1000_init_module is the first routine called when the driver is
5880 * loaded. All it does is register with the PCI subsystem.
5881 **/
5882static int __init e1000_init_module(void)
5883{
5884 int ret;
8544b9f7
BA
5885 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
5886 e1000e_driver_version);
5887 pr_info("Copyright (c) 1999 - 2009 Intel Corporation.\n");
bc7f75fa 5888 ret = pci_register_driver(&e1000_driver);
53ec5498 5889
bc7f75fa
AK
5890 return ret;
5891}
5892module_init(e1000_init_module);
5893
5894/**
5895 * e1000_exit_module - Driver Exit Cleanup Routine
5896 *
5897 * e1000_exit_module is called just before the driver is removed
5898 * from memory.
5899 **/
5900static void __exit e1000_exit_module(void)
5901{
5902 pci_unregister_driver(&e1000_driver);
5903}
5904module_exit(e1000_exit_module);
5905
5906
5907MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5908MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5909MODULE_LICENSE("GPL");
5910MODULE_VERSION(DRV_VERSION);
5911
5912/* e1000_main.c */