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[net-next-2.6.git] / drivers / net / e1000e / netdev.c
CommitLineData
bc7f75fa
AK		 1/*******************************************************************************
2
3 Intel PRO/1000 Linux driver
c7e54b1b 4 Copyright(c) 1999 - 2009 Intel Corporation.
bc7f75fa
AK		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 more details.
14
15 You should have received a copy of the GNU General Public License along with
16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
8544b9f7
BA		 29#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
30
bc7f75fa
AK		 31#include <linux/module.h>
32#include <linux/types.h>
33#include <linux/init.h>
34#include <linux/pci.h>
35#include <linux/vmalloc.h>
36#include <linux/pagemap.h>
37#include <linux/delay.h>
38#include <linux/netdevice.h>
39#include <linux/tcp.h>
40#include <linux/ipv6.h>
41#include <net/checksum.h>
42#include <net/ip6_checksum.h>
43#include <linux/mii.h>
44#include <linux/ethtool.h>
45#include <linux/if_vlan.h>
46#include <linux/cpu.h>
47#include <linux/smp.h>
97ac8cae 48#include <linux/pm_qos_params.h>
23606cf5 49#include <linux/pm_runtime.h>
111b9dc5 50#include <linux/aer.h>
bc7f75fa
AK		 51
52#include "e1000.h"
53
3be8c940 54#define DRV_VERSION "1.0.2-k2"
bc7f75fa
AK		 55char e1000e_driver_name[] = "e1000e";
56const char e1000e_driver_version[] = DRV_VERSION;
57
58static const struct e1000_info *e1000_info_tbl[] = {
59 [board_82571] = &e1000_82571_info,
60 [board_82572] = &e1000_82572_info,
61 [board_82573] = &e1000_82573_info,
4662e82b 62 [board_82574] = &e1000_82574_info,
8c81c9c3 63 [board_82583] = &e1000_82583_info,
bc7f75fa
AK		 64 [board_80003es2lan] = &e1000_es2_info,
65 [board_ich8lan] = &e1000_ich8_info,
66 [board_ich9lan] = &e1000_ich9_info,
f4187b56 67 [board_ich10lan] = &e1000_ich10_info,
a4f58f54 68 [board_pchlan] = &e1000_pch_info,
bc7f75fa
AK		 69};
70
bc7f75fa
AK		 71/**
72 * e1000_desc_unused - calculate if we have unused descriptors
73 **/
74static int e1000_desc_unused(struct e1000_ring *ring)
75{
76 if (ring->next_to_clean > ring->next_to_use)
77 return ring->next_to_clean - ring->next_to_use - 1;
78
79 return ring->count + ring->next_to_clean - ring->next_to_use - 1;
80}
81
82/**
ad68076e 83 * e1000_receive_skb - helper function to handle Rx indications
bc7f75fa
AK		 84 * @adapter: board private structure
85 * @status: descriptor status field as written by hardware
86 * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
87 * @skb: pointer to sk_buff to be indicated to stack
88 **/
89static void e1000_receive_skb(struct e1000_adapter *adapter,
90 struct net_device *netdev,
91 struct sk_buff *skb,
a39fe742 92 u8 status, __le16 vlan)
bc7f75fa
AK		 93{
94 skb->protocol = eth_type_trans(skb, netdev);
95
96 if (adapter->vlgrp && (status & E1000_RXD_STAT_VP))
c405b828
HX		 97 vlan_gro_receive(&adapter->napi, adapter->vlgrp,
98 le16_to_cpu(vlan), skb);
bc7f75fa 99 else
89c88b16 100 napi_gro_receive(&adapter->napi, skb);
bc7f75fa
AK		 101}
102
103/**
104 * e1000_rx_checksum - Receive Checksum Offload for 82543
105 * @adapter: board private structure
106 * @status_err: receive descriptor status and error fields
107 * @csum: receive descriptor csum field
108 * @sk_buff: socket buffer with received data
109 **/
110static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
111 u32 csum, struct sk_buff *skb)
112{
113 u16 status = (u16)status_err;
114 u8 errors = (u8)(status_err >> 24);
115 skb->ip_summed = CHECKSUM_NONE;
116
117 /* Ignore Checksum bit is set */
118 if (status & E1000_RXD_STAT_IXSM)
119 return;
120 /* TCP/UDP checksum error bit is set */
121 if (errors & E1000_RXD_ERR_TCPE) {
122 /* let the stack verify checksum errors */
123 adapter->hw_csum_err++;
124 return;
125 }
126
127 /* TCP/UDP Checksum has not been calculated */
128 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
129 return;
130
131 /* It must be a TCP or UDP packet with a valid checksum */
132 if (status & E1000_RXD_STAT_TCPCS) {
133 /* TCP checksum is good */
134 skb->ip_summed = CHECKSUM_UNNECESSARY;
135 } else {
ad68076e
BA		 136 /*
137 * IP fragment with UDP payload
138 * Hardware complements the payload checksum, so we undo it
bc7f75fa
AK		 139 * and then put the value in host order for further stack use.
140 */
a39fe742
AV		 141 __sum16 sum = (__force __sum16)htons(csum);
142 skb->csum = csum_unfold(~sum);
bc7f75fa
AK		 143 skb->ip_summed = CHECKSUM_COMPLETE;
144 }
145 adapter->hw_csum_good++;
146}
147
148/**
149 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
150 * @adapter: address of board private structure
151 **/
152static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
153 int cleaned_count)
154{
155 struct net_device *netdev = adapter->netdev;
156 struct pci_dev *pdev = adapter->pdev;
157 struct e1000_ring *rx_ring = adapter->rx_ring;
158 struct e1000_rx_desc *rx_desc;
159 struct e1000_buffer *buffer_info;
160 struct sk_buff *skb;
161 unsigned int i;
89d71a66 162 unsigned int bufsz = adapter->rx_buffer_len;
bc7f75fa
AK		 163
164 i = rx_ring->next_to_use;
165 buffer_info = &rx_ring->buffer_info[i];
166
167 while (cleaned_count--) {
168 skb = buffer_info->skb;
169 if (skb) {
170 skb_trim(skb, 0);
171 goto map_skb;
172 }
173
89d71a66 174 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
bc7f75fa
AK		 175 if (!skb) {
176 /* Better luck next round */
177 adapter->alloc_rx_buff_failed++;
178 break;
179 }
180
bc7f75fa
AK		 181 buffer_info->skb = skb;
182map_skb:
183 buffer_info->dma = pci_map_single(pdev, skb->data,
184 adapter->rx_buffer_len,
185 PCI_DMA_FROMDEVICE);
8d8bb39b 186 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 187 dev_err(&pdev->dev, "RX DMA map failed\n");
188 adapter->rx_dma_failed++;
189 break;
190 }
191
192 rx_desc = E1000_RX_DESC(*rx_ring, i);
193 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
194
195 i++;
196 if (i == rx_ring->count)
197 i = 0;
198 buffer_info = &rx_ring->buffer_info[i];
199 }
200
201 if (rx_ring->next_to_use != i) {
202 rx_ring->next_to_use = i;
203 if (i-- == 0)
204 i = (rx_ring->count - 1);
205
ad68076e
BA		 206 /*
207 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 208 * know there are new descriptors to fetch. (Only
209 * applicable for weak-ordered memory model archs,
ad68076e
BA		 210 * such as IA-64).
211 */
bc7f75fa
AK		 212 wmb();
213 writel(i, adapter->hw.hw_addr + rx_ring->tail);
214 }
215}
216
217/**
218 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
219 * @adapter: address of board private structure
220 **/
221static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
222 int cleaned_count)
223{
224 struct net_device *netdev = adapter->netdev;
225 struct pci_dev *pdev = adapter->pdev;
226 union e1000_rx_desc_packet_split *rx_desc;
227 struct e1000_ring *rx_ring = adapter->rx_ring;
228 struct e1000_buffer *buffer_info;
229 struct e1000_ps_page *ps_page;
230 struct sk_buff *skb;
231 unsigned int i, j;
232
233 i = rx_ring->next_to_use;
234 buffer_info = &rx_ring->buffer_info[i];
235
236 while (cleaned_count--) {
237 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
238
239 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40
AK		 240 ps_page = &buffer_info->ps_pages[j];
241 if (j >= adapter->rx_ps_pages) {
242 /* all unused desc entries get hw null ptr */
a39fe742 243 rx_desc->read.buffer_addr[j+1] = ~cpu_to_le64(0);
47f44e40
AK		 244 continue;
245 }
246 if (!ps_page->page) {
247 ps_page->page = alloc_page(GFP_ATOMIC);
bc7f75fa 248 if (!ps_page->page) {
47f44e40
AK		 249 adapter->alloc_rx_buff_failed++;
250 goto no_buffers;
251 }
252 ps_page->dma = pci_map_page(pdev,
253 ps_page->page,
254 0, PAGE_SIZE,
255 PCI_DMA_FROMDEVICE);
8d8bb39b 256 if (pci_dma_mapping_error(pdev, ps_page->dma)) {
47f44e40
AK		 257 dev_err(&adapter->pdev->dev,
258 "RX DMA page map failed\n");
259 adapter->rx_dma_failed++;
260 goto no_buffers;
bc7f75fa 261 }
bc7f75fa 262 }
47f44e40
AK		 263 /*
264 * Refresh the desc even if buffer_addrs
265 * didn't change because each write-back
266 * erases this info.
267 */
268 rx_desc->read.buffer_addr[j+1] =
269 cpu_to_le64(ps_page->dma);
bc7f75fa
AK		 270 }
271
89d71a66
ED		 272 skb = netdev_alloc_skb_ip_align(netdev,
273 adapter->rx_ps_bsize0);
bc7f75fa
AK		 274
275 if (!skb) {
276 adapter->alloc_rx_buff_failed++;
277 break;
278 }
279
bc7f75fa
AK		 280 buffer_info->skb = skb;
281 buffer_info->dma = pci_map_single(pdev, skb->data,
282 adapter->rx_ps_bsize0,
283 PCI_DMA_FROMDEVICE);
8d8bb39b 284 if (pci_dma_mapping_error(pdev, buffer_info->dma)) {
bc7f75fa
AK		 285 dev_err(&pdev->dev, "RX DMA map failed\n");
286 adapter->rx_dma_failed++;
287 /* cleanup skb */
288 dev_kfree_skb_any(skb);
289 buffer_info->skb = NULL;
290 break;
291 }
292
293 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
294
295 i++;
296 if (i == rx_ring->count)
297 i = 0;
298 buffer_info = &rx_ring->buffer_info[i];
299 }
300
301no_buffers:
302 if (rx_ring->next_to_use != i) {
303 rx_ring->next_to_use = i;
304
305 if (!(i--))
306 i = (rx_ring->count - 1);
307
ad68076e
BA		 308 /*
309 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 310 * know there are new descriptors to fetch. (Only
311 * applicable for weak-ordered memory model archs,
ad68076e
BA		 312 * such as IA-64).
313 */
bc7f75fa 314 wmb();
ad68076e
BA		 315 /*
316 * Hardware increments by 16 bytes, but packet split
bc7f75fa
AK		 317 * descriptors are 32 bytes...so we increment tail
318 * twice as much.
319 */
320 writel(i<<1, adapter->hw.hw_addr + rx_ring->tail);
321 }
322}
323
97ac8cae
BA		 324/**
325 * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
326 * @adapter: address of board private structure
97ac8cae
BA		 327 * @cleaned_count: number of buffers to allocate this pass
328 **/
329
330static void e1000_alloc_jumbo_rx_buffers(struct e1000_adapter *adapter,
331 int cleaned_count)
332{
333 struct net_device *netdev = adapter->netdev;
334 struct pci_dev *pdev = adapter->pdev;
335 struct e1000_rx_desc *rx_desc;
336 struct e1000_ring *rx_ring = adapter->rx_ring;
337 struct e1000_buffer *buffer_info;
338 struct sk_buff *skb;
339 unsigned int i;
89d71a66 340 unsigned int bufsz = 256 - 16 /* for skb_reserve */;
97ac8cae
BA		 341
342 i = rx_ring->next_to_use;
343 buffer_info = &rx_ring->buffer_info[i];
344
345 while (cleaned_count--) {
346 skb = buffer_info->skb;
347 if (skb) {
348 skb_trim(skb, 0);
349 goto check_page;
350 }
351
89d71a66 352 skb = netdev_alloc_skb_ip_align(netdev, bufsz);
97ac8cae
BA		 353 if (unlikely(!skb)) {
354 /* Better luck next round */
355 adapter->alloc_rx_buff_failed++;
356 break;
357 }
358
97ac8cae
BA		 359 buffer_info->skb = skb;
360check_page:
361 /* allocate a new page if necessary */
362 if (!buffer_info->page) {
363 buffer_info->page = alloc_page(GFP_ATOMIC);
364 if (unlikely(!buffer_info->page)) {
365 adapter->alloc_rx_buff_failed++;
366 break;
367 }
368 }
369
370 if (!buffer_info->dma)
371 buffer_info->dma = pci_map_page(pdev,
372 buffer_info->page, 0,
373 PAGE_SIZE,
374 PCI_DMA_FROMDEVICE);
375
376 rx_desc = E1000_RX_DESC(*rx_ring, i);
377 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
378
379 if (unlikely(++i == rx_ring->count))
380 i = 0;
381 buffer_info = &rx_ring->buffer_info[i];
382 }
383
384 if (likely(rx_ring->next_to_use != i)) {
385 rx_ring->next_to_use = i;
386 if (unlikely(i-- == 0))
387 i = (rx_ring->count - 1);
388
389 /* Force memory writes to complete before letting h/w
390 * know there are new descriptors to fetch. (Only
391 * applicable for weak-ordered memory model archs,
392 * such as IA-64). */
393 wmb();
394 writel(i, adapter->hw.hw_addr + rx_ring->tail);
395 }
396}
397
bc7f75fa
AK		 398/**
399 * e1000_clean_rx_irq - Send received data up the network stack; legacy
400 * @adapter: board private structure
401 *
402 * the return value indicates whether actual cleaning was done, there
403 * is no guarantee that everything was cleaned
404 **/
405static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
406 int *work_done, int work_to_do)
407{
408 struct net_device *netdev = adapter->netdev;
409 struct pci_dev *pdev = adapter->pdev;
3bb99fe2 410 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 411 struct e1000_ring *rx_ring = adapter->rx_ring;
412 struct e1000_rx_desc *rx_desc, *next_rxd;
413 struct e1000_buffer *buffer_info, *next_buffer;
414 u32 length;
415 unsigned int i;
416 int cleaned_count = 0;
417 bool cleaned = 0;
418 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
419
420 i = rx_ring->next_to_clean;
421 rx_desc = E1000_RX_DESC(*rx_ring, i);
422 buffer_info = &rx_ring->buffer_info[i];
423
424 while (rx_desc->status & E1000_RXD_STAT_DD) {
425 struct sk_buff *skb;
426 u8 status;
427
428 if (*work_done >= work_to_do)
429 break;
430 (*work_done)++;
431
432 status = rx_desc->status;
433 skb = buffer_info->skb;
434 buffer_info->skb = NULL;
435
436 prefetch(skb->data - NET_IP_ALIGN);
437
438 i++;
439 if (i == rx_ring->count)
440 i = 0;
441 next_rxd = E1000_RX_DESC(*rx_ring, i);
442 prefetch(next_rxd);
443
444 next_buffer = &rx_ring->buffer_info[i];
445
446 cleaned = 1;
447 cleaned_count++;
448 pci_unmap_single(pdev,
449 buffer_info->dma,
450 adapter->rx_buffer_len,
451 PCI_DMA_FROMDEVICE);
452 buffer_info->dma = 0;
453
454 length = le16_to_cpu(rx_desc->length);
455
b94b5028
JB		 456 /*
457 * !EOP means multiple descriptors were used to store a single
458 * packet, if that's the case we need to toss it. In fact, we
459 * need to toss every packet with the EOP bit clear and the
460 * next frame that _does_ have the EOP bit set, as it is by
461 * definition only a frame fragment
462 */
463 if (unlikely(!(status & E1000_RXD_STAT_EOP)))
464 adapter->flags2 |= FLAG2_IS_DISCARDING;
465
466 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
bc7f75fa 467 /* All receives must fit into a single buffer */
3bb99fe2 468 e_dbg("Receive packet consumed multiple buffers\n");
bc7f75fa
AK		 469 /* recycle */
470 buffer_info->skb = skb;
b94b5028
JB		 471 if (status & E1000_RXD_STAT_EOP)
472 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 473 goto next_desc;
474 }
475
476 if (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK) {
477 /* recycle */
478 buffer_info->skb = skb;
479 goto next_desc;
480 }
481
eb7c3adb
JK		 482 /* adjust length to remove Ethernet CRC */
483 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
484 length -= 4;
485
bc7f75fa
AK		 486 total_rx_bytes += length;
487 total_rx_packets++;
488
ad68076e
BA		 489 /*
490 * code added for copybreak, this should improve
bc7f75fa 491 * performance for small packets with large amounts
ad68076e
BA		 492 * of reassembly being done in the stack
493 */
bc7f75fa
AK		 494 if (length < copybreak) {
495 struct sk_buff *new_skb =
89d71a66 496 netdev_alloc_skb_ip_align(netdev, length);
bc7f75fa 497 if (new_skb) {
808ff676
BA		 498 skb_copy_to_linear_data_offset(new_skb,
499 -NET_IP_ALIGN,
500 (skb->data -
501 NET_IP_ALIGN),
502 (length +
503 NET_IP_ALIGN));
bc7f75fa
AK		 504 /* save the skb in buffer_info as good */
505 buffer_info->skb = skb;
506 skb = new_skb;
507 }
508 /* else just continue with the old one */
509 }
510 /* end copybreak code */
511 skb_put(skb, length);
512
513 /* Receive Checksum Offload */
514 e1000_rx_checksum(adapter,
515 (u32)(status) |
516 ((u32)(rx_desc->errors) << 24),
517 le16_to_cpu(rx_desc->csum), skb);
518
519 e1000_receive_skb(adapter, netdev, skb,status,rx_desc->special);
520
521next_desc:
522 rx_desc->status = 0;
523
524 /* return some buffers to hardware, one at a time is too slow */
525 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
526 adapter->alloc_rx_buf(adapter, cleaned_count);
527 cleaned_count = 0;
528 }
529
530 /* use prefetched values */
531 rx_desc = next_rxd;
532 buffer_info = next_buffer;
533 }
534 rx_ring->next_to_clean = i;
535
536 cleaned_count = e1000_desc_unused(rx_ring);
537 if (cleaned_count)
538 adapter->alloc_rx_buf(adapter, cleaned_count);
539
bc7f75fa 540 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 541 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 542 netdev->stats.rx_bytes += total_rx_bytes;
543 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 544 return cleaned;
545}
546
bc7f75fa
AK		 547static void e1000_put_txbuf(struct e1000_adapter *adapter,
548 struct e1000_buffer *buffer_info)
549{
03b1320d
AD		 550 if (buffer_info->dma) {
551 if (buffer_info->mapped_as_page)
552 pci_unmap_page(adapter->pdev, buffer_info->dma,
553 buffer_info->length, PCI_DMA_TODEVICE);
554 else
555 pci_unmap_single(adapter->pdev, buffer_info->dma,
556 buffer_info->length,
557 PCI_DMA_TODEVICE);
558 buffer_info->dma = 0;
559 }
bc7f75fa
AK		 560 if (buffer_info->skb) {
561 dev_kfree_skb_any(buffer_info->skb);
562 buffer_info->skb = NULL;
563 }
1b7719c4 564 buffer_info->time_stamp = 0;
bc7f75fa
AK		 565}
566
41cec6f1 567static void e1000_print_hw_hang(struct work_struct *work)
bc7f75fa 568{
41cec6f1
BA		 569 struct e1000_adapter *adapter = container_of(work,
570 struct e1000_adapter,
571 print_hang_task);
bc7f75fa
AK		 572 struct e1000_ring *tx_ring = adapter->tx_ring;
573 unsigned int i = tx_ring->next_to_clean;
574 unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
575 struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
41cec6f1
BA		 576 struct e1000_hw *hw = &adapter->hw;
577 u16 phy_status, phy_1000t_status, phy_ext_status;
578 u16 pci_status;
579
580 e1e_rphy(hw, PHY_STATUS, &phy_status);
581 e1e_rphy(hw, PHY_1000T_STATUS, &phy_1000t_status);
582 e1e_rphy(hw, PHY_EXT_STATUS, &phy_ext_status);
bc7f75fa 583
41cec6f1
BA		 584 pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
585
586 /* detected Hardware unit hang */
587 e_err("Detected Hardware Unit Hang:\n"
44defeb3
JK		 588 " TDH <%x>\n"
589 " TDT <%x>\n"
590 " next_to_use <%x>\n"
591 " next_to_clean <%x>\n"
592 "buffer_info[next_to_clean]:\n"
593 " time_stamp <%lx>\n"
594 " next_to_watch <%x>\n"
595 " jiffies <%lx>\n"
41cec6f1
BA		 596 " next_to_watch.status <%x>\n"
597 "MAC Status <%x>\n"
598 "PHY Status <%x>\n"
599 "PHY 1000BASE-T Status <%x>\n"
600 "PHY Extended Status <%x>\n"
601 "PCI Status <%x>\n",
44defeb3
JK		 602 readl(adapter->hw.hw_addr + tx_ring->head),
603 readl(adapter->hw.hw_addr + tx_ring->tail),
604 tx_ring->next_to_use,
605 tx_ring->next_to_clean,
606 tx_ring->buffer_info[eop].time_stamp,
607 eop,
608 jiffies,
41cec6f1
BA		 609 eop_desc->upper.fields.status,
610 er32(STATUS),
611 phy_status,
612 phy_1000t_status,
613 phy_ext_status,
614 pci_status);
bc7f75fa
AK		 615}
616
617/**
618 * e1000_clean_tx_irq - Reclaim resources after transmit completes
619 * @adapter: board private structure
620 *
621 * the return value indicates whether actual cleaning was done, there
622 * is no guarantee that everything was cleaned
623 **/
624static bool e1000_clean_tx_irq(struct e1000_adapter *adapter)
625{
626 struct net_device *netdev = adapter->netdev;
627 struct e1000_hw *hw = &adapter->hw;
628 struct e1000_ring *tx_ring = adapter->tx_ring;
629 struct e1000_tx_desc *tx_desc, *eop_desc;
630 struct e1000_buffer *buffer_info;
631 unsigned int i, eop;
632 unsigned int count = 0;
bc7f75fa
AK		 633 unsigned int total_tx_bytes = 0, total_tx_packets = 0;
634
635 i = tx_ring->next_to_clean;
636 eop = tx_ring->buffer_info[i].next_to_watch;
637 eop_desc = E1000_TX_DESC(*tx_ring, eop);
638
12d04a3c
AD		 639 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
640 (count < tx_ring->count)) {
a86043c2
JB		 641 bool cleaned = false;
642 for (; !cleaned; count++) {
bc7f75fa
AK		 643 tx_desc = E1000_TX_DESC(*tx_ring, i);
644 buffer_info = &tx_ring->buffer_info[i];
645 cleaned = (i == eop);
646
647 if (cleaned) {
648 struct sk_buff *skb = buffer_info->skb;
649 unsigned int segs, bytecount;
650 segs = skb_shinfo(skb)->gso_segs ?: 1;
651 /* multiply data chunks by size of headers */
652 bytecount = ((segs - 1) * skb_headlen(skb)) +
653 skb->len;
654 total_tx_packets += segs;
655 total_tx_bytes += bytecount;
656 }
657
658 e1000_put_txbuf(adapter, buffer_info);
659 tx_desc->upper.data = 0;
660
661 i++;
662 if (i == tx_ring->count)
663 i = 0;
664 }
665
666 eop = tx_ring->buffer_info[i].next_to_watch;
667 eop_desc = E1000_TX_DESC(*tx_ring, eop);
bc7f75fa
AK		 668 }
669
670 tx_ring->next_to_clean = i;
671
672#define TX_WAKE_THRESHOLD 32
a86043c2
JB		 673 if (count && netif_carrier_ok(netdev) &&
674 e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
bc7f75fa
AK		 675 /* Make sure that anybody stopping the queue after this
676 * sees the new next_to_clean.
677 */
678 smp_mb();
679
680 if (netif_queue_stopped(netdev) &&
681 !(test_bit(__E1000_DOWN, &adapter->state))) {
682 netif_wake_queue(netdev);
683 ++adapter->restart_queue;
684 }
685 }
686
687 if (adapter->detect_tx_hung) {
41cec6f1
BA		 688 /*
689 * Detect a transmit hang in hardware, this serializes the
690 * check with the clearing of time_stamp and movement of i
691 */
bc7f75fa 692 adapter->detect_tx_hung = 0;
12d04a3c
AD		 693 if (tx_ring->buffer_info[i].time_stamp &&
694 time_after(jiffies, tx_ring->buffer_info[i].time_stamp
8e95a202
JP		 695 + (adapter->tx_timeout_factor * HZ)) &&
696 !(er32(STATUS) & E1000_STATUS_TXOFF)) {
41cec6f1 697 schedule_work(&adapter->print_hang_task);
bc7f75fa
AK		 698 netif_stop_queue(netdev);
699 }
700 }
701 adapter->total_tx_bytes += total_tx_bytes;
702 adapter->total_tx_packets += total_tx_packets;
7274c20f
AK		 703 netdev->stats.tx_bytes += total_tx_bytes;
704 netdev->stats.tx_packets += total_tx_packets;
12d04a3c 705 return (count < tx_ring->count);
bc7f75fa
AK		 706}
707
bc7f75fa
AK		 708/**
709 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
710 * @adapter: board private structure
711 *
712 * the return value indicates whether actual cleaning was done, there
713 * is no guarantee that everything was cleaned
714 **/
715static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
716 int *work_done, int work_to_do)
717{
3bb99fe2 718 struct e1000_hw *hw = &adapter->hw;
bc7f75fa
AK		 719 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
720 struct net_device *netdev = adapter->netdev;
721 struct pci_dev *pdev = adapter->pdev;
722 struct e1000_ring *rx_ring = adapter->rx_ring;
723 struct e1000_buffer *buffer_info, *next_buffer;
724 struct e1000_ps_page *ps_page;
725 struct sk_buff *skb;
726 unsigned int i, j;
727 u32 length, staterr;
728 int cleaned_count = 0;
729 bool cleaned = 0;
730 unsigned int total_rx_bytes = 0, total_rx_packets = 0;
731
732 i = rx_ring->next_to_clean;
733 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
734 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
735 buffer_info = &rx_ring->buffer_info[i];
736
737 while (staterr & E1000_RXD_STAT_DD) {
738 if (*work_done >= work_to_do)
739 break;
740 (*work_done)++;
741 skb = buffer_info->skb;
742
743 /* in the packet split case this is header only */
744 prefetch(skb->data - NET_IP_ALIGN);
745
746 i++;
747 if (i == rx_ring->count)
748 i = 0;
749 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
750 prefetch(next_rxd);
751
752 next_buffer = &rx_ring->buffer_info[i];
753
754 cleaned = 1;
755 cleaned_count++;
756 pci_unmap_single(pdev, buffer_info->dma,
757 adapter->rx_ps_bsize0,
758 PCI_DMA_FROMDEVICE);
759 buffer_info->dma = 0;
760
b94b5028
JB		 761 /* see !EOP comment in other rx routine */
762 if (!(staterr & E1000_RXD_STAT_EOP))
763 adapter->flags2 |= FLAG2_IS_DISCARDING;
764
765 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
3bb99fe2
BA		 766 e_dbg("Packet Split buffers didn't pick up the full "
767 "packet\n");
bc7f75fa 768 dev_kfree_skb_irq(skb);
b94b5028
JB		 769 if (staterr & E1000_RXD_STAT_EOP)
770 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 771 goto next_desc;
772 }
773
774 if (staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) {
775 dev_kfree_skb_irq(skb);
776 goto next_desc;
777 }
778
779 length = le16_to_cpu(rx_desc->wb.middle.length0);
780
781 if (!length) {
3bb99fe2
BA		 782 e_dbg("Last part of the packet spanning multiple "
783 "descriptors\n");
bc7f75fa
AK		 784 dev_kfree_skb_irq(skb);
785 goto next_desc;
786 }
787
788 /* Good Receive */
789 skb_put(skb, length);
790
791 {
ad68076e
BA		 792 /*
793 * this looks ugly, but it seems compiler issues make it
794 * more efficient than reusing j
795 */
bc7f75fa
AK		 796 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
797
ad68076e
BA		 798 /*
799 * page alloc/put takes too long and effects small packet
800 * throughput, so unsplit small packets and save the alloc/put
801 * only valid in softirq (napi) context to call kmap_*
802 */
bc7f75fa
AK		 803 if (l1 && (l1 <= copybreak) &&
804 ((length + l1) <= adapter->rx_ps_bsize0)) {
805 u8 *vaddr;
806
47f44e40 807 ps_page = &buffer_info->ps_pages[0];
bc7f75fa 808
ad68076e
BA		 809 /*
810 * there is no documentation about how to call
bc7f75fa 811 * kmap_atomic, so we can't hold the mapping
ad68076e
BA		 812 * very long
813 */
bc7f75fa
AK		 814 pci_dma_sync_single_for_cpu(pdev, ps_page->dma,
815 PAGE_SIZE, PCI_DMA_FROMDEVICE);
816 vaddr = kmap_atomic(ps_page->page, KM_SKB_DATA_SOFTIRQ);
817 memcpy(skb_tail_pointer(skb), vaddr, l1);
818 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
819 pci_dma_sync_single_for_device(pdev, ps_page->dma,
820 PAGE_SIZE, PCI_DMA_FROMDEVICE);
140a7480 821
eb7c3adb
JK		 822 /* remove the CRC */
823 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
824 l1 -= 4;
825
bc7f75fa
AK		 826 skb_put(skb, l1);
827 goto copydone;
828 } /* if */
829 }
830
831 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
832 length = le16_to_cpu(rx_desc->wb.upper.length[j]);
833 if (!length)
834 break;
835
47f44e40 836 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 837 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
838 PCI_DMA_FROMDEVICE);
839 ps_page->dma = 0;
840 skb_fill_page_desc(skb, j, ps_page->page, 0, length);
841 ps_page->page = NULL;
842 skb->len += length;
843 skb->data_len += length;
844 skb->truesize += length;
845 }
846
eb7c3adb
JK		 847 /* strip the ethernet crc, problem is we're using pages now so
848 * this whole operation can get a little cpu intensive
849 */
850 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING))
851 pskb_trim(skb, skb->len - 4);
852
bc7f75fa
AK		 853copydone:
854 total_rx_bytes += skb->len;
855 total_rx_packets++;
856
857 e1000_rx_checksum(adapter, staterr, le16_to_cpu(
858 rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
859
860 if (rx_desc->wb.upper.header_status &
861 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
862 adapter->rx_hdr_split++;
863
864 e1000_receive_skb(adapter, netdev, skb,
865 staterr, rx_desc->wb.middle.vlan);
866
867next_desc:
868 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
869 buffer_info->skb = NULL;
870
871 /* return some buffers to hardware, one at a time is too slow */
872 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
873 adapter->alloc_rx_buf(adapter, cleaned_count);
874 cleaned_count = 0;
875 }
876
877 /* use prefetched values */
878 rx_desc = next_rxd;
879 buffer_info = next_buffer;
880
881 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
882 }
883 rx_ring->next_to_clean = i;
884
885 cleaned_count = e1000_desc_unused(rx_ring);
886 if (cleaned_count)
887 adapter->alloc_rx_buf(adapter, cleaned_count);
888
bc7f75fa 889 adapter->total_rx_bytes += total_rx_bytes;
7c25769f 890 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 891 netdev->stats.rx_bytes += total_rx_bytes;
892 netdev->stats.rx_packets += total_rx_packets;
bc7f75fa
AK		 893 return cleaned;
894}
895
97ac8cae
BA		 896/**
897 * e1000_consume_page - helper function
898 **/
899static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
900 u16 length)
901{
902 bi->page = NULL;
903 skb->len += length;
904 skb->data_len += length;
905 skb->truesize += length;
906}
907
908/**
909 * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
910 * @adapter: board private structure
911 *
912 * the return value indicates whether actual cleaning was done, there
913 * is no guarantee that everything was cleaned
914 **/
915
916static bool e1000_clean_jumbo_rx_irq(struct e1000_adapter *adapter,
917 int *work_done, int work_to_do)
918{
919 struct net_device *netdev = adapter->netdev;
920 struct pci_dev *pdev = adapter->pdev;
921 struct e1000_ring *rx_ring = adapter->rx_ring;
922 struct e1000_rx_desc *rx_desc, *next_rxd;
923 struct e1000_buffer *buffer_info, *next_buffer;
924 u32 length;
925 unsigned int i;
926 int cleaned_count = 0;
927 bool cleaned = false;
928 unsigned int total_rx_bytes=0, total_rx_packets=0;
929
930 i = rx_ring->next_to_clean;
931 rx_desc = E1000_RX_DESC(*rx_ring, i);
932 buffer_info = &rx_ring->buffer_info[i];
933
934 while (rx_desc->status & E1000_RXD_STAT_DD) {
935 struct sk_buff *skb;
936 u8 status;
937
938 if (*work_done >= work_to_do)
939 break;
940 (*work_done)++;
941
942 status = rx_desc->status;
943 skb = buffer_info->skb;
944 buffer_info->skb = NULL;
945
946 ++i;
947 if (i == rx_ring->count)
948 i = 0;
949 next_rxd = E1000_RX_DESC(*rx_ring, i);
950 prefetch(next_rxd);
951
952 next_buffer = &rx_ring->buffer_info[i];
953
954 cleaned = true;
955 cleaned_count++;
956 pci_unmap_page(pdev, buffer_info->dma, PAGE_SIZE,
957 PCI_DMA_FROMDEVICE);
958 buffer_info->dma = 0;
959
960 length = le16_to_cpu(rx_desc->length);
961
962 /* errors is only valid for DD + EOP descriptors */
963 if (unlikely((status & E1000_RXD_STAT_EOP) &&
964 (rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK))) {
965 /* recycle both page and skb */
966 buffer_info->skb = skb;
967 /* an error means any chain goes out the window
968 * too */
969 if (rx_ring->rx_skb_top)
970 dev_kfree_skb(rx_ring->rx_skb_top);
971 rx_ring->rx_skb_top = NULL;
972 goto next_desc;
973 }
974
975#define rxtop rx_ring->rx_skb_top
976 if (!(status & E1000_RXD_STAT_EOP)) {
977 /* this descriptor is only the beginning (or middle) */
978 if (!rxtop) {
979 /* this is the beginning of a chain */
980 rxtop = skb;
981 skb_fill_page_desc(rxtop, 0, buffer_info->page,
982 0, length);
983 } else {
984 /* this is the middle of a chain */
985 skb_fill_page_desc(rxtop,
986 skb_shinfo(rxtop)->nr_frags,
987 buffer_info->page, 0, length);
988 /* re-use the skb, only consumed the page */
989 buffer_info->skb = skb;
990 }
991 e1000_consume_page(buffer_info, rxtop, length);
992 goto next_desc;
993 } else {
994 if (rxtop) {
995 /* end of the chain */
996 skb_fill_page_desc(rxtop,
997 skb_shinfo(rxtop)->nr_frags,
998 buffer_info->page, 0, length);
999 /* re-use the current skb, we only consumed the
1000 * page */
1001 buffer_info->skb = skb;
1002 skb = rxtop;
1003 rxtop = NULL;
1004 e1000_consume_page(buffer_info, skb, length);
1005 } else {
1006 /* no chain, got EOP, this buf is the packet
1007 * copybreak to save the put_page/alloc_page */
1008 if (length <= copybreak &&
1009 skb_tailroom(skb) >= length) {
1010 u8 *vaddr;
1011 vaddr = kmap_atomic(buffer_info->page,
1012 KM_SKB_DATA_SOFTIRQ);
1013 memcpy(skb_tail_pointer(skb), vaddr,
1014 length);
1015 kunmap_atomic(vaddr,
1016 KM_SKB_DATA_SOFTIRQ);
1017 /* re-use the page, so don't erase
1018 * buffer_info->page */
1019 skb_put(skb, length);
1020 } else {
1021 skb_fill_page_desc(skb, 0,
1022 buffer_info->page, 0,
1023 length);
1024 e1000_consume_page(buffer_info, skb,
1025 length);
1026 }
1027 }
1028 }
1029
1030 /* Receive Checksum Offload XXX recompute due to CRC strip? */
1031 e1000_rx_checksum(adapter,
1032 (u32)(status) |
1033 ((u32)(rx_desc->errors) << 24),
1034 le16_to_cpu(rx_desc->csum), skb);
1035
1036 /* probably a little skewed due to removing CRC */
1037 total_rx_bytes += skb->len;
1038 total_rx_packets++;
1039
1040 /* eth type trans needs skb->data to point to something */
1041 if (!pskb_may_pull(skb, ETH_HLEN)) {
44defeb3 1042 e_err("pskb_may_pull failed.\n");
97ac8cae
BA		 1043 dev_kfree_skb(skb);
1044 goto next_desc;
1045 }
1046
1047 e1000_receive_skb(adapter, netdev, skb, status,
1048 rx_desc->special);
1049
1050next_desc:
1051 rx_desc->status = 0;
1052
1053 /* return some buffers to hardware, one at a time is too slow */
1054 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1055 adapter->alloc_rx_buf(adapter, cleaned_count);
1056 cleaned_count = 0;
1057 }
1058
1059 /* use prefetched values */
1060 rx_desc = next_rxd;
1061 buffer_info = next_buffer;
1062 }
1063 rx_ring->next_to_clean = i;
1064
1065 cleaned_count = e1000_desc_unused(rx_ring);
1066 if (cleaned_count)
1067 adapter->alloc_rx_buf(adapter, cleaned_count);
1068
1069 adapter->total_rx_bytes += total_rx_bytes;
1070 adapter->total_rx_packets += total_rx_packets;
7274c20f
AK		 1071 netdev->stats.rx_bytes += total_rx_bytes;
1072 netdev->stats.rx_packets += total_rx_packets;
97ac8cae
BA		 1073 return cleaned;
1074}
1075
bc7f75fa
AK		 1076/**
1077 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1078 * @adapter: board private structure
1079 **/
1080static void e1000_clean_rx_ring(struct e1000_adapter *adapter)
1081{
1082 struct e1000_ring *rx_ring = adapter->rx_ring;
1083 struct e1000_buffer *buffer_info;
1084 struct e1000_ps_page *ps_page;
1085 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 1086 unsigned int i, j;
1087
1088 /* Free all the Rx ring sk_buffs */
1089 for (i = 0; i < rx_ring->count; i++) {
1090 buffer_info = &rx_ring->buffer_info[i];
1091 if (buffer_info->dma) {
1092 if (adapter->clean_rx == e1000_clean_rx_irq)
1093 pci_unmap_single(pdev, buffer_info->dma,
1094 adapter->rx_buffer_len,
1095 PCI_DMA_FROMDEVICE);
97ac8cae
BA		 1096 else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1097 pci_unmap_page(pdev, buffer_info->dma,
1098 PAGE_SIZE,
1099 PCI_DMA_FROMDEVICE);
bc7f75fa
AK		 1100 else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1101 pci_unmap_single(pdev, buffer_info->dma,
1102 adapter->rx_ps_bsize0,
1103 PCI_DMA_FROMDEVICE);
1104 buffer_info->dma = 0;
1105 }
1106
97ac8cae
BA		 1107 if (buffer_info->page) {
1108 put_page(buffer_info->page);
1109 buffer_info->page = NULL;
1110 }
1111
bc7f75fa
AK		 1112 if (buffer_info->skb) {
1113 dev_kfree_skb(buffer_info->skb);
1114 buffer_info->skb = NULL;
1115 }
1116
1117 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
47f44e40 1118 ps_page = &buffer_info->ps_pages[j];
bc7f75fa
AK		 1119 if (!ps_page->page)
1120 break;
1121 pci_unmap_page(pdev, ps_page->dma, PAGE_SIZE,
1122 PCI_DMA_FROMDEVICE);
1123 ps_page->dma = 0;
1124 put_page(ps_page->page);
1125 ps_page->page = NULL;
1126 }
1127 }
1128
1129 /* there also may be some cached data from a chained receive */
1130 if (rx_ring->rx_skb_top) {
1131 dev_kfree_skb(rx_ring->rx_skb_top);
1132 rx_ring->rx_skb_top = NULL;
1133 }
1134
bc7f75fa
AK		 1135 /* Zero out the descriptor ring */
1136 memset(rx_ring->desc, 0, rx_ring->size);
1137
1138 rx_ring->next_to_clean = 0;
1139 rx_ring->next_to_use = 0;
b94b5028 1140 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
bc7f75fa
AK		 1141
1142 writel(0, adapter->hw.hw_addr + rx_ring->head);
1143 writel(0, adapter->hw.hw_addr + rx_ring->tail);
1144}
1145
a8f88ff5
JB		 1146static void e1000e_downshift_workaround(struct work_struct *work)
1147{
1148 struct e1000_adapter *adapter = container_of(work,
1149 struct e1000_adapter, downshift_task);
1150
1151 e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1152}
1153
bc7f75fa
AK		 1154/**
1155 * e1000_intr_msi - Interrupt Handler
1156 * @irq: interrupt number
1157 * @data: pointer to a network interface device structure
1158 **/
1159static irqreturn_t e1000_intr_msi(int irq, void *data)
1160{
1161 struct net_device *netdev = data;
1162 struct e1000_adapter *adapter = netdev_priv(netdev);
1163 struct e1000_hw *hw = &adapter->hw;
1164 u32 icr = er32(ICR);
1165
ad68076e
BA		 1166 /*
1167 * read ICR disables interrupts using IAM
1168 */
bc7f75fa 1169
573cca8c 1170 if (icr & E1000_ICR_LSC) {
bc7f75fa 1171 hw->mac.get_link_status = 1;
ad68076e
BA		 1172 /*
1173 * ICH8 workaround-- Call gig speed drop workaround on cable
1174 * disconnect (LSC) before accessing any PHY registers
1175 */
bc7f75fa
AK		 1176 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1177 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1178 schedule_work(&adapter->downshift_task);
bc7f75fa 1179
ad68076e
BA		 1180 /*
1181 * 80003ES2LAN workaround-- For packet buffer work-around on
bc7f75fa 1182 * link down event; disable receives here in the ISR and reset
ad68076e
BA		 1183 * adapter in watchdog
1184 */
bc7f75fa
AK		 1185 if (netif_carrier_ok(netdev) &&
1186 adapter->flags & FLAG_RX_NEEDS_RESTART) {
1187 /* disable receives */
1188 u32 rctl = er32(RCTL);
1189 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1190 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1191 }
1192 /* guard against interrupt when we're going down */
1193 if (!test_bit(__E1000_DOWN, &adapter->state))
1194 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1195 }
1196
288379f0 1197 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1198 adapter->total_tx_bytes = 0;
1199 adapter->total_tx_packets = 0;
1200 adapter->total_rx_bytes = 0;
1201 adapter->total_rx_packets = 0;
288379f0 1202 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1203 }
1204
1205 return IRQ_HANDLED;
1206}
1207
1208/**
1209 * e1000_intr - Interrupt Handler
1210 * @irq: interrupt number
1211 * @data: pointer to a network interface device structure
1212 **/
1213static irqreturn_t e1000_intr(int irq, void *data)
1214{
1215 struct net_device *netdev = data;
1216 struct e1000_adapter *adapter = netdev_priv(netdev);
1217 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 1218 u32 rctl, icr = er32(ICR);
4662e82b 1219
a68ea775 1220 if (!icr || test_bit(__E1000_DOWN, &adapter->state))
bc7f75fa
AK		 1221 return IRQ_NONE; /* Not our interrupt */
1222
ad68076e
BA		 1223 /*
1224 * IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1225 * not set, then the adapter didn't send an interrupt
1226 */
bc7f75fa
AK		 1227 if (!(icr & E1000_ICR_INT_ASSERTED))
1228 return IRQ_NONE;
1229
ad68076e
BA		 1230 /*
1231 * Interrupt Auto-Mask...upon reading ICR,
1232 * interrupts are masked. No need for the
1233 * IMC write
1234 */
bc7f75fa 1235
573cca8c 1236 if (icr & E1000_ICR_LSC) {
bc7f75fa 1237 hw->mac.get_link_status = 1;
ad68076e
BA		 1238 /*
1239 * ICH8 workaround-- Call gig speed drop workaround on cable
1240 * disconnect (LSC) before accessing any PHY registers
1241 */
bc7f75fa
AK		 1242 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1243 (!(er32(STATUS) & E1000_STATUS_LU)))
a8f88ff5 1244 schedule_work(&adapter->downshift_task);
bc7f75fa 1245
ad68076e
BA		 1246 /*
1247 * 80003ES2LAN workaround--
bc7f75fa
AK		 1248 * For packet buffer work-around on link down event;
1249 * disable receives here in the ISR and
1250 * reset adapter in watchdog
1251 */
1252 if (netif_carrier_ok(netdev) &&
1253 (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1254 /* disable receives */
1255 rctl = er32(RCTL);
1256 ew32(RCTL, rctl & ~E1000_RCTL_EN);
318a94d6 1257 adapter->flags |= FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 1258 }
1259 /* guard against interrupt when we're going down */
1260 if (!test_bit(__E1000_DOWN, &adapter->state))
1261 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1262 }
1263
288379f0 1264 if (napi_schedule_prep(&adapter->napi)) {
bc7f75fa
AK		 1265 adapter->total_tx_bytes = 0;
1266 adapter->total_tx_packets = 0;
1267 adapter->total_rx_bytes = 0;
1268 adapter->total_rx_packets = 0;
288379f0 1269 __napi_schedule(&adapter->napi);
bc7f75fa
AK		 1270 }
1271
1272 return IRQ_HANDLED;
1273}
1274
4662e82b
BA		 1275static irqreturn_t e1000_msix_other(int irq, void *data)
1276{
1277 struct net_device *netdev = data;
1278 struct e1000_adapter *adapter = netdev_priv(netdev);
1279 struct e1000_hw *hw = &adapter->hw;
1280 u32 icr = er32(ICR);
1281
1282 if (!(icr & E1000_ICR_INT_ASSERTED)) {
a3c69fef
JB		 1283 if (!test_bit(__E1000_DOWN, &adapter->state))
1284 ew32(IMS, E1000_IMS_OTHER);
4662e82b
BA		 1285 return IRQ_NONE;
1286 }
1287
1288 if (icr & adapter->eiac_mask)
1289 ew32(ICS, (icr & adapter->eiac_mask));
1290
1291 if (icr & E1000_ICR_OTHER) {
1292 if (!(icr & E1000_ICR_LSC))
1293 goto no_link_interrupt;
1294 hw->mac.get_link_status = 1;
1295 /* guard against interrupt when we're going down */
1296 if (!test_bit(__E1000_DOWN, &adapter->state))
1297 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1298 }
1299
1300no_link_interrupt:
a3c69fef
JB		 1301 if (!test_bit(__E1000_DOWN, &adapter->state))
1302 ew32(IMS, E1000_IMS_LSC | E1000_IMS_OTHER);
4662e82b
BA		 1303
1304 return IRQ_HANDLED;
1305}
1306
1307
1308static irqreturn_t e1000_intr_msix_tx(int irq, void *data)
1309{
1310 struct net_device *netdev = data;
1311 struct e1000_adapter *adapter = netdev_priv(netdev);
1312 struct e1000_hw *hw = &adapter->hw;
1313 struct e1000_ring *tx_ring = adapter->tx_ring;
1314
1315
1316 adapter->total_tx_bytes = 0;
1317 adapter->total_tx_packets = 0;
1318
1319 if (!e1000_clean_tx_irq(adapter))
1320 /* Ring was not completely cleaned, so fire another interrupt */
1321 ew32(ICS, tx_ring->ims_val);
1322
1323 return IRQ_HANDLED;
1324}
1325
1326static irqreturn_t e1000_intr_msix_rx(int irq, void *data)
1327{
1328 struct net_device *netdev = data;
1329 struct e1000_adapter *adapter = netdev_priv(netdev);
1330
1331 /* Write the ITR value calculated at the end of the
1332 * previous interrupt.
1333 */
1334 if (adapter->rx_ring->set_itr) {
1335 writel(1000000000 / (adapter->rx_ring->itr_val * 256),
1336 adapter->hw.hw_addr + adapter->rx_ring->itr_register);
1337 adapter->rx_ring->set_itr = 0;
1338 }
1339
288379f0 1340 if (napi_schedule_prep(&adapter->napi)) {
4662e82b
BA		 1341 adapter->total_rx_bytes = 0;
1342 adapter->total_rx_packets = 0;
288379f0 1343 __napi_schedule(&adapter->napi);
4662e82b
BA		 1344 }
1345 return IRQ_HANDLED;
1346}
1347
1348/**
1349 * e1000_configure_msix - Configure MSI-X hardware
1350 *
1351 * e1000_configure_msix sets up the hardware to properly
1352 * generate MSI-X interrupts.
1353 **/
1354static void e1000_configure_msix(struct e1000_adapter *adapter)
1355{
1356 struct e1000_hw *hw = &adapter->hw;
1357 struct e1000_ring *rx_ring = adapter->rx_ring;
1358 struct e1000_ring *tx_ring = adapter->tx_ring;
1359 int vector = 0;
1360 u32 ctrl_ext, ivar = 0;
1361
1362 adapter->eiac_mask = 0;
1363
1364 /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1365 if (hw->mac.type == e1000_82574) {
1366 u32 rfctl = er32(RFCTL);
1367 rfctl |= E1000_RFCTL_ACK_DIS;
1368 ew32(RFCTL, rfctl);
1369 }
1370
1371#define E1000_IVAR_INT_ALLOC_VALID 0x8
1372 /* Configure Rx vector */
1373 rx_ring->ims_val = E1000_IMS_RXQ0;
1374 adapter->eiac_mask |= rx_ring->ims_val;
1375 if (rx_ring->itr_val)
1376 writel(1000000000 / (rx_ring->itr_val * 256),
1377 hw->hw_addr + rx_ring->itr_register);
1378 else
1379 writel(1, hw->hw_addr + rx_ring->itr_register);
1380 ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1381
1382 /* Configure Tx vector */
1383 tx_ring->ims_val = E1000_IMS_TXQ0;
1384 vector++;
1385 if (tx_ring->itr_val)
1386 writel(1000000000 / (tx_ring->itr_val * 256),
1387 hw->hw_addr + tx_ring->itr_register);
1388 else
1389 writel(1, hw->hw_addr + tx_ring->itr_register);
1390 adapter->eiac_mask |= tx_ring->ims_val;
1391 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
1392
1393 /* set vector for Other Causes, e.g. link changes */
1394 vector++;
1395 ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
1396 if (rx_ring->itr_val)
1397 writel(1000000000 / (rx_ring->itr_val * 256),
1398 hw->hw_addr + E1000_EITR_82574(vector));
1399 else
1400 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
1401
1402 /* Cause Tx interrupts on every write back */
1403 ivar |= (1 << 31);
1404
1405 ew32(IVAR, ivar);
1406
1407 /* enable MSI-X PBA support */
1408 ctrl_ext = er32(CTRL_EXT);
1409 ctrl_ext |= E1000_CTRL_EXT_PBA_CLR;
1410
1411 /* Auto-Mask Other interrupts upon ICR read */
1412#define E1000_EIAC_MASK_82574 0x01F00000
1413 ew32(IAM, ~E1000_EIAC_MASK_82574 | E1000_IMS_OTHER);
1414 ctrl_ext |= E1000_CTRL_EXT_EIAME;
1415 ew32(CTRL_EXT, ctrl_ext);
1416 e1e_flush();
1417}
1418
1419void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
1420{
1421 if (adapter->msix_entries) {
1422 pci_disable_msix(adapter->pdev);
1423 kfree(adapter->msix_entries);
1424 adapter->msix_entries = NULL;
1425 } else if (adapter->flags & FLAG_MSI_ENABLED) {
1426 pci_disable_msi(adapter->pdev);
1427 adapter->flags &= ~FLAG_MSI_ENABLED;
1428 }
1429
1430 return;
1431}
1432
1433/**
1434 * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
1435 *
1436 * Attempt to configure interrupts using the best available
1437 * capabilities of the hardware and kernel.
1438 **/
1439void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
1440{
1441 int err;
1442 int numvecs, i;
1443
1444
1445 switch (adapter->int_mode) {
1446 case E1000E_INT_MODE_MSIX:
1447 if (adapter->flags & FLAG_HAS_MSIX) {
1448 numvecs = 3; /* RxQ0, TxQ0 and other */
1449 adapter->msix_entries = kcalloc(numvecs,
1450 sizeof(struct msix_entry),
1451 GFP_KERNEL);
1452 if (adapter->msix_entries) {
1453 for (i = 0; i < numvecs; i++)
1454 adapter->msix_entries[i].entry = i;
1455
1456 err = pci_enable_msix(adapter->pdev,
1457 adapter->msix_entries,
1458 numvecs);
1459 if (err == 0)
1460 return;
1461 }
1462 /* MSI-X failed, so fall through and try MSI */
1463 e_err("Failed to initialize MSI-X interrupts. "
1464 "Falling back to MSI interrupts.\n");
1465 e1000e_reset_interrupt_capability(adapter);
1466 }
1467 adapter->int_mode = E1000E_INT_MODE_MSI;
1468 /* Fall through */
1469 case E1000E_INT_MODE_MSI:
1470 if (!pci_enable_msi(adapter->pdev)) {
1471 adapter->flags |= FLAG_MSI_ENABLED;
1472 } else {
1473 adapter->int_mode = E1000E_INT_MODE_LEGACY;
1474 e_err("Failed to initialize MSI interrupts. Falling "
1475 "back to legacy interrupts.\n");
1476 }
1477 /* Fall through */
1478 case E1000E_INT_MODE_LEGACY:
1479 /* Don't do anything; this is the system default */
1480 break;
1481 }
1482
1483 return;
1484}
1485
1486/**
1487 * e1000_request_msix - Initialize MSI-X interrupts
1488 *
1489 * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
1490 * kernel.
1491 **/
1492static int e1000_request_msix(struct e1000_adapter *adapter)
1493{
1494 struct net_device *netdev = adapter->netdev;
1495 int err = 0, vector = 0;
1496
1497 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1498 sprintf(adapter->rx_ring->name, "%s-rx-0", netdev->name);
4662e82b
BA		 1499 else
1500 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
1501 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1502 e1000_intr_msix_rx, 0, adapter->rx_ring->name,
4662e82b
BA		 1503 netdev);
1504 if (err)
1505 goto out;
1506 adapter->rx_ring->itr_register = E1000_EITR_82574(vector);
1507 adapter->rx_ring->itr_val = adapter->itr;
1508 vector++;
1509
1510 if (strlen(netdev->name) < (IFNAMSIZ - 5))
cb7b48f6 1511 sprintf(adapter->tx_ring->name, "%s-tx-0", netdev->name);
4662e82b
BA		 1512 else
1513 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
1514 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1515 e1000_intr_msix_tx, 0, adapter->tx_ring->name,
4662e82b
BA		 1516 netdev);
1517 if (err)
1518 goto out;
1519 adapter->tx_ring->itr_register = E1000_EITR_82574(vector);
1520 adapter->tx_ring->itr_val = adapter->itr;
1521 vector++;
1522
1523 err = request_irq(adapter->msix_entries[vector].vector,
a0607fd3 1524 e1000_msix_other, 0, netdev->name, netdev);
4662e82b
BA		 1525 if (err)
1526 goto out;
1527
1528 e1000_configure_msix(adapter);
1529 return 0;
1530out:
1531 return err;
1532}
1533
f8d59f78
BA		 1534/**
1535 * e1000_request_irq - initialize interrupts
1536 *
1537 * Attempts to configure interrupts using the best available
1538 * capabilities of the hardware and kernel.
1539 **/
bc7f75fa
AK		 1540static int e1000_request_irq(struct e1000_adapter *adapter)
1541{
1542 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 1543 int err;
1544
4662e82b
BA		 1545 if (adapter->msix_entries) {
1546 err = e1000_request_msix(adapter);
1547 if (!err)
1548 return err;
1549 /* fall back to MSI */
1550 e1000e_reset_interrupt_capability(adapter);
1551 adapter->int_mode = E1000E_INT_MODE_MSI;
1552 e1000e_set_interrupt_capability(adapter);
bc7f75fa 1553 }
4662e82b 1554 if (adapter->flags & FLAG_MSI_ENABLED) {
a0607fd3 1555 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
4662e82b
BA		 1556 netdev->name, netdev);
1557 if (!err)
1558 return err;
bc7f75fa 1559
4662e82b
BA		 1560 /* fall back to legacy interrupt */
1561 e1000e_reset_interrupt_capability(adapter);
1562 adapter->int_mode = E1000E_INT_MODE_LEGACY;
bc7f75fa
AK		 1563 }
1564
a0607fd3 1565 err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
4662e82b
BA		 1566 netdev->name, netdev);
1567 if (err)
1568 e_err("Unable to allocate interrupt, Error: %d\n", err);
1569
bc7f75fa
AK		 1570 return err;
1571}
1572
1573static void e1000_free_irq(struct e1000_adapter *adapter)
1574{
1575 struct net_device *netdev = adapter->netdev;
1576
4662e82b
BA		 1577 if (adapter->msix_entries) {
1578 int vector = 0;
1579
1580 free_irq(adapter->msix_entries[vector].vector, netdev);
1581 vector++;
1582
1583 free_irq(adapter->msix_entries[vector].vector, netdev);
1584 vector++;
1585
1586 /* Other Causes interrupt vector */
1587 free_irq(adapter->msix_entries[vector].vector, netdev);
1588 return;
bc7f75fa 1589 }
4662e82b
BA		 1590
1591 free_irq(adapter->pdev->irq, netdev);
bc7f75fa
AK		 1592}
1593
1594/**
1595 * e1000_irq_disable - Mask off interrupt generation on the NIC
1596 **/
1597static void e1000_irq_disable(struct e1000_adapter *adapter)
1598{
1599 struct e1000_hw *hw = &adapter->hw;
1600
bc7f75fa 1601 ew32(IMC, ~0);
4662e82b
BA		 1602 if (adapter->msix_entries)
1603 ew32(EIAC_82574, 0);
bc7f75fa
AK		 1604 e1e_flush();
1605 synchronize_irq(adapter->pdev->irq);
1606}
1607
1608/**
1609 * e1000_irq_enable - Enable default interrupt generation settings
1610 **/
1611static void e1000_irq_enable(struct e1000_adapter *adapter)
1612{
1613 struct e1000_hw *hw = &adapter->hw;
1614
4662e82b
BA		 1615 if (adapter->msix_entries) {
1616 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
1617 ew32(IMS, adapter->eiac_mask | E1000_IMS_OTHER | E1000_IMS_LSC);
1618 } else {
1619 ew32(IMS, IMS_ENABLE_MASK);
1620 }
74ef9c39 1621 e1e_flush();
bc7f75fa
AK		 1622}
1623
1624/**
1625 * e1000_get_hw_control - get control of the h/w from f/w
1626 * @adapter: address of board private structure
1627 *
489815ce 1628 * e1000_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1629 * For ASF and Pass Through versions of f/w this means that
1630 * the driver is loaded. For AMT version (only with 82573)
1631 * of the f/w this means that the network i/f is open.
1632 **/
1633static void e1000_get_hw_control(struct e1000_adapter *adapter)
1634{
1635 struct e1000_hw *hw = &adapter->hw;
1636 u32 ctrl_ext;
1637 u32 swsm;
1638
1639 /* Let firmware know the driver has taken over */
1640 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1641 swsm = er32(SWSM);
1642 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
1643 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1644 ctrl_ext = er32(CTRL_EXT);
ad68076e 1645 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1646 }
1647}
1648
1649/**
1650 * e1000_release_hw_control - release control of the h/w to f/w
1651 * @adapter: address of board private structure
1652 *
489815ce 1653 * e1000_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
bc7f75fa
AK		 1654 * For ASF and Pass Through versions of f/w this means that the
1655 * driver is no longer loaded. For AMT version (only with 82573) i
1656 * of the f/w this means that the network i/f is closed.
1657 *
1658 **/
1659static void e1000_release_hw_control(struct e1000_adapter *adapter)
1660{
1661 struct e1000_hw *hw = &adapter->hw;
1662 u32 ctrl_ext;
1663 u32 swsm;
1664
1665 /* Let firmware taken over control of h/w */
1666 if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
1667 swsm = er32(SWSM);
1668 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
1669 } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
1670 ctrl_ext = er32(CTRL_EXT);
ad68076e 1671 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
bc7f75fa
AK		 1672 }
1673}
1674
bc7f75fa
AK		 1675/**
1676 * @e1000_alloc_ring - allocate memory for a ring structure
1677 **/
1678static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
1679 struct e1000_ring *ring)
1680{
1681 struct pci_dev *pdev = adapter->pdev;
1682
1683 ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
1684 GFP_KERNEL);
1685 if (!ring->desc)
1686 return -ENOMEM;
1687
1688 return 0;
1689}
1690
1691/**
1692 * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
1693 * @adapter: board private structure
1694 *
1695 * Return 0 on success, negative on failure
1696 **/
1697int e1000e_setup_tx_resources(struct e1000_adapter *adapter)
1698{
1699 struct e1000_ring *tx_ring = adapter->tx_ring;
1700 int err = -ENOMEM, size;
1701
1702 size = sizeof(struct e1000_buffer) * tx_ring->count;
1703 tx_ring->buffer_info = vmalloc(size);
1704 if (!tx_ring->buffer_info)
1705 goto err;
1706 memset(tx_ring->buffer_info, 0, size);
1707
1708 /* round up to nearest 4K */
1709 tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
1710 tx_ring->size = ALIGN(tx_ring->size, 4096);
1711
1712 err = e1000_alloc_ring_dma(adapter, tx_ring);
1713 if (err)
1714 goto err;
1715
1716 tx_ring->next_to_use = 0;
1717 tx_ring->next_to_clean = 0;
bc7f75fa
AK		 1718
1719 return 0;
1720err:
1721 vfree(tx_ring->buffer_info);
44defeb3 1722 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1723 return err;
1724}
1725
1726/**
1727 * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
1728 * @adapter: board private structure
1729 *
1730 * Returns 0 on success, negative on failure
1731 **/
1732int e1000e_setup_rx_resources(struct e1000_adapter *adapter)
1733{
1734 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40
AK		 1735 struct e1000_buffer *buffer_info;
1736 int i, size, desc_len, err = -ENOMEM;
bc7f75fa
AK		 1737
1738 size = sizeof(struct e1000_buffer) * rx_ring->count;
1739 rx_ring->buffer_info = vmalloc(size);
1740 if (!rx_ring->buffer_info)
1741 goto err;
1742 memset(rx_ring->buffer_info, 0, size);
1743
47f44e40
AK		 1744 for (i = 0; i < rx_ring->count; i++) {
1745 buffer_info = &rx_ring->buffer_info[i];
1746 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
1747 sizeof(struct e1000_ps_page),
1748 GFP_KERNEL);
1749 if (!buffer_info->ps_pages)
1750 goto err_pages;
1751 }
bc7f75fa
AK		 1752
1753 desc_len = sizeof(union e1000_rx_desc_packet_split);
1754
1755 /* Round up to nearest 4K */
1756 rx_ring->size = rx_ring->count * desc_len;
1757 rx_ring->size = ALIGN(rx_ring->size, 4096);
1758
1759 err = e1000_alloc_ring_dma(adapter, rx_ring);
1760 if (err)
47f44e40 1761 goto err_pages;
bc7f75fa
AK		 1762
1763 rx_ring->next_to_clean = 0;
1764 rx_ring->next_to_use = 0;
1765 rx_ring->rx_skb_top = NULL;
1766
1767 return 0;
47f44e40
AK		 1768
1769err_pages:
1770 for (i = 0; i < rx_ring->count; i++) {
1771 buffer_info = &rx_ring->buffer_info[i];
1772 kfree(buffer_info->ps_pages);
1773 }
bc7f75fa
AK		 1774err:
1775 vfree(rx_ring->buffer_info);
44defeb3 1776 e_err("Unable to allocate memory for the transmit descriptor ring\n");
bc7f75fa
AK		 1777 return err;
1778}
1779
1780/**
1781 * e1000_clean_tx_ring - Free Tx Buffers
1782 * @adapter: board private structure
1783 **/
1784static void e1000_clean_tx_ring(struct e1000_adapter *adapter)
1785{
1786 struct e1000_ring *tx_ring = adapter->tx_ring;
1787 struct e1000_buffer *buffer_info;
1788 unsigned long size;
1789 unsigned int i;
1790
1791 for (i = 0; i < tx_ring->count; i++) {
1792 buffer_info = &tx_ring->buffer_info[i];
1793 e1000_put_txbuf(adapter, buffer_info);
1794 }
1795
1796 size = sizeof(struct e1000_buffer) * tx_ring->count;
1797 memset(tx_ring->buffer_info, 0, size);
1798
1799 memset(tx_ring->desc, 0, tx_ring->size);
1800
1801 tx_ring->next_to_use = 0;
1802 tx_ring->next_to_clean = 0;
1803
1804 writel(0, adapter->hw.hw_addr + tx_ring->head);
1805 writel(0, adapter->hw.hw_addr + tx_ring->tail);
1806}
1807
1808/**
1809 * e1000e_free_tx_resources - Free Tx Resources per Queue
1810 * @adapter: board private structure
1811 *
1812 * Free all transmit software resources
1813 **/
1814void e1000e_free_tx_resources(struct e1000_adapter *adapter)
1815{
1816 struct pci_dev *pdev = adapter->pdev;
1817 struct e1000_ring *tx_ring = adapter->tx_ring;
1818
1819 e1000_clean_tx_ring(adapter);
1820
1821 vfree(tx_ring->buffer_info);
1822 tx_ring->buffer_info = NULL;
1823
1824 dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
1825 tx_ring->dma);
1826 tx_ring->desc = NULL;
1827}
1828
1829/**
1830 * e1000e_free_rx_resources - Free Rx Resources
1831 * @adapter: board private structure
1832 *
1833 * Free all receive software resources
1834 **/
1835
1836void e1000e_free_rx_resources(struct e1000_adapter *adapter)
1837{
1838 struct pci_dev *pdev = adapter->pdev;
1839 struct e1000_ring *rx_ring = adapter->rx_ring;
47f44e40 1840 int i;
bc7f75fa
AK		 1841
1842 e1000_clean_rx_ring(adapter);
1843
47f44e40
AK		 1844 for (i = 0; i < rx_ring->count; i++) {
1845 kfree(rx_ring->buffer_info[i].ps_pages);
1846 }
1847
bc7f75fa
AK		 1848 vfree(rx_ring->buffer_info);
1849 rx_ring->buffer_info = NULL;
1850
bc7f75fa
AK		 1851 dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
1852 rx_ring->dma);
1853 rx_ring->desc = NULL;
1854}
1855
1856/**
1857 * e1000_update_itr - update the dynamic ITR value based on statistics
489815ce
AK		 1858 * @adapter: pointer to adapter
1859 * @itr_setting: current adapter->itr
1860 * @packets: the number of packets during this measurement interval
1861 * @bytes: the number of bytes during this measurement interval
1862 *
bc7f75fa
AK		 1863 * Stores a new ITR value based on packets and byte
1864 * counts during the last interrupt. The advantage of per interrupt
1865 * computation is faster updates and more accurate ITR for the current
1866 * traffic pattern. Constants in this function were computed
1867 * based on theoretical maximum wire speed and thresholds were set based
1868 * on testing data as well as attempting to minimize response time
4662e82b
BA		 1869 * while increasing bulk throughput. This functionality is controlled
1870 * by the InterruptThrottleRate module parameter.
bc7f75fa
AK		 1871 **/
1872static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
1873 u16 itr_setting, int packets,
1874 int bytes)
1875{
1876 unsigned int retval = itr_setting;
1877
1878 if (packets == 0)
1879 goto update_itr_done;
1880
1881 switch (itr_setting) {
1882 case lowest_latency:
1883 /* handle TSO and jumbo frames */
1884 if (bytes/packets > 8000)
1885 retval = bulk_latency;
1886 else if ((packets < 5) && (bytes > 512)) {
1887 retval = low_latency;
1888 }
1889 break;
1890 case low_latency: /* 50 usec aka 20000 ints/s */
1891 if (bytes > 10000) {
1892 /* this if handles the TSO accounting */
1893 if (bytes/packets > 8000) {
1894 retval = bulk_latency;
1895 } else if ((packets < 10) || ((bytes/packets) > 1200)) {
1896 retval = bulk_latency;
1897 } else if ((packets > 35)) {
1898 retval = lowest_latency;
1899 }
1900 } else if (bytes/packets > 2000) {
1901 retval = bulk_latency;
1902 } else if (packets <= 2 && bytes < 512) {
1903 retval = lowest_latency;
1904 }
1905 break;
1906 case bulk_latency: /* 250 usec aka 4000 ints/s */
1907 if (bytes > 25000) {
1908 if (packets > 35) {
1909 retval = low_latency;
1910 }
1911 } else if (bytes < 6000) {
1912 retval = low_latency;
1913 }
1914 break;
1915 }
1916
1917update_itr_done:
1918 return retval;
1919}
1920
1921static void e1000_set_itr(struct e1000_adapter *adapter)
1922{
1923 struct e1000_hw *hw = &adapter->hw;
1924 u16 current_itr;
1925 u32 new_itr = adapter->itr;
1926
1927 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
1928 if (adapter->link_speed != SPEED_1000) {
1929 current_itr = 0;
1930 new_itr = 4000;
1931 goto set_itr_now;
1932 }
1933
1934 adapter->tx_itr = e1000_update_itr(adapter,
1935 adapter->tx_itr,
1936 adapter->total_tx_packets,
1937 adapter->total_tx_bytes);
1938 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1939 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
1940 adapter->tx_itr = low_latency;
1941
1942 adapter->rx_itr = e1000_update_itr(adapter,
1943 adapter->rx_itr,
1944 adapter->total_rx_packets,
1945 adapter->total_rx_bytes);
1946 /* conservative mode (itr 3) eliminates the lowest_latency setting */
1947 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
1948 adapter->rx_itr = low_latency;
1949
1950 current_itr = max(adapter->rx_itr, adapter->tx_itr);
1951
1952 switch (current_itr) {
1953 /* counts and packets in update_itr are dependent on these numbers */
1954 case lowest_latency:
1955 new_itr = 70000;
1956 break;
1957 case low_latency:
1958 new_itr = 20000; /* aka hwitr = ~200 */
1959 break;
1960 case bulk_latency:
1961 new_itr = 4000;
1962 break;
1963 default:
1964 break;
1965 }
1966
1967set_itr_now:
1968 if (new_itr != adapter->itr) {
ad68076e
BA		 1969 /*
1970 * this attempts to bias the interrupt rate towards Bulk
bc7f75fa 1971 * by adding intermediate steps when interrupt rate is
ad68076e
BA		 1972 * increasing
1973 */
bc7f75fa
AK		 1974 new_itr = new_itr > adapter->itr ?
1975 min(adapter->itr + (new_itr >> 2), new_itr) :
1976 new_itr;
1977 adapter->itr = new_itr;
4662e82b
BA		 1978 adapter->rx_ring->itr_val = new_itr;
1979 if (adapter->msix_entries)
1980 adapter->rx_ring->set_itr = 1;
1981 else
1982 ew32(ITR, 1000000000 / (new_itr * 256));
bc7f75fa
AK		 1983 }
1984}
1985
4662e82b
BA		 1986/**
1987 * e1000_alloc_queues - Allocate memory for all rings
1988 * @adapter: board private structure to initialize
1989 **/
1990static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
1991{
1992 adapter->tx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1993 if (!adapter->tx_ring)
1994 goto err;
1995
1996 adapter->rx_ring = kzalloc(sizeof(struct e1000_ring), GFP_KERNEL);
1997 if (!adapter->rx_ring)
1998 goto err;
1999
2000 return 0;
2001err:
2002 e_err("Unable to allocate memory for queues\n");
2003 kfree(adapter->rx_ring);
2004 kfree(adapter->tx_ring);
2005 return -ENOMEM;
2006}
2007
bc7f75fa
AK		 2008/**
2009 * e1000_clean - NAPI Rx polling callback
ad68076e 2010 * @napi: struct associated with this polling callback
489815ce 2011 * @budget: amount of packets driver is allowed to process this poll
bc7f75fa
AK		 2012 **/
2013static int e1000_clean(struct napi_struct *napi, int budget)
2014{
2015 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
4662e82b 2016 struct e1000_hw *hw = &adapter->hw;
bc7f75fa 2017 struct net_device *poll_dev = adapter->netdev;
679e8a0f 2018 int tx_cleaned = 1, work_done = 0;
bc7f75fa 2019
4cf1653a 2020 adapter = netdev_priv(poll_dev);
bc7f75fa 2021
4662e82b
BA		 2022 if (adapter->msix_entries &&
2023 !(adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2024 goto clean_rx;
2025
92af3e95 2026 tx_cleaned = e1000_clean_tx_irq(adapter);
bc7f75fa 2027
4662e82b 2028clean_rx:
bc7f75fa 2029 adapter->clean_rx(adapter, &work_done, budget);
d2c7ddd6 2030
12d04a3c 2031 if (!tx_cleaned)
d2c7ddd6 2032 work_done = budget;
bc7f75fa 2033
53e52c72
DM		 2034 /* If budget not fully consumed, exit the polling mode */
2035 if (work_done < budget) {
bc7f75fa
AK		 2036 if (adapter->itr_setting & 3)
2037 e1000_set_itr(adapter);
288379f0 2038 napi_complete(napi);
a3c69fef
JB		 2039 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2040 if (adapter->msix_entries)
2041 ew32(IMS, adapter->rx_ring->ims_val);
2042 else
2043 e1000_irq_enable(adapter);
2044 }
bc7f75fa
AK		 2045 }
2046
2047 return work_done;
2048}
2049
2050static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
2051{
2052 struct e1000_adapter *adapter = netdev_priv(netdev);
2053 struct e1000_hw *hw = &adapter->hw;
2054 u32 vfta, index;
2055
2056 /* don't update vlan cookie if already programmed */
2057 if ((adapter->hw.mng_cookie.status &
2058 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2059 (vid == adapter->mng_vlan_id))
2060 return;
caaddaf8 2061
bc7f75fa 2062 /* add VID to filter table */
caaddaf8
BA		 2063 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2064 index = (vid >> 5) & 0x7F;
2065 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2066 vfta |= (1 << (vid & 0x1F));
2067 hw->mac.ops.write_vfta(hw, index, vfta);
2068 }
bc7f75fa
AK		 2069}
2070
2071static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
2072{
2073 struct e1000_adapter *adapter = netdev_priv(netdev);
2074 struct e1000_hw *hw = &adapter->hw;
2075 u32 vfta, index;
2076
74ef9c39
JB		 2077 if (!test_bit(__E1000_DOWN, &adapter->state))
2078 e1000_irq_disable(adapter);
bc7f75fa 2079 vlan_group_set_device(adapter->vlgrp, vid, NULL);
74ef9c39
JB		 2080
2081 if (!test_bit(__E1000_DOWN, &adapter->state))
2082 e1000_irq_enable(adapter);
bc7f75fa
AK		 2083
2084 if ((adapter->hw.mng_cookie.status &
2085 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2086 (vid == adapter->mng_vlan_id)) {
2087 /* release control to f/w */
2088 e1000_release_hw_control(adapter);
2089 return;
2090 }
2091
2092 /* remove VID from filter table */
caaddaf8
BA		 2093 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2094 index = (vid >> 5) & 0x7F;
2095 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2096 vfta &= ~(1 << (vid & 0x1F));
2097 hw->mac.ops.write_vfta(hw, index, vfta);
2098 }
bc7f75fa
AK		 2099}
2100
2101static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2102{
2103 struct net_device *netdev = adapter->netdev;
2104 u16 vid = adapter->hw.mng_cookie.vlan_id;
2105 u16 old_vid = adapter->mng_vlan_id;
2106
2107 if (!adapter->vlgrp)
2108 return;
2109
2110 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
2111 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2112 if (adapter->hw.mng_cookie.status &
2113 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2114 e1000_vlan_rx_add_vid(netdev, vid);
2115 adapter->mng_vlan_id = vid;
2116 }
2117
2118 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
2119 (vid != old_vid) &&
2120 !vlan_group_get_device(adapter->vlgrp, old_vid))
2121 e1000_vlan_rx_kill_vid(netdev, old_vid);
2122 } else {
2123 adapter->mng_vlan_id = vid;
2124 }
2125}
2126
2127
2128static void e1000_vlan_rx_register(struct net_device *netdev,
2129 struct vlan_group *grp)
2130{
2131 struct e1000_adapter *adapter = netdev_priv(netdev);
2132 struct e1000_hw *hw = &adapter->hw;
2133 u32 ctrl, rctl;
2134
74ef9c39
JB		 2135 if (!test_bit(__E1000_DOWN, &adapter->state))
2136 e1000_irq_disable(adapter);
bc7f75fa
AK		 2137 adapter->vlgrp = grp;
2138
2139 if (grp) {
2140 /* enable VLAN tag insert/strip */
2141 ctrl = er32(CTRL);
2142 ctrl |= E1000_CTRL_VME;
2143 ew32(CTRL, ctrl);
2144
2145 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2146 /* enable VLAN receive filtering */
2147 rctl = er32(RCTL);
bc7f75fa
AK		 2148 rctl &= ~E1000_RCTL_CFIEN;
2149 ew32(RCTL, rctl);
2150 e1000_update_mng_vlan(adapter);
2151 }
2152 } else {
2153 /* disable VLAN tag insert/strip */
2154 ctrl = er32(CTRL);
2155 ctrl &= ~E1000_CTRL_VME;
2156 ew32(CTRL, ctrl);
2157
2158 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
bc7f75fa
AK		 2159 if (adapter->mng_vlan_id !=
2160 (u16)E1000_MNG_VLAN_NONE) {
2161 e1000_vlan_rx_kill_vid(netdev,
2162 adapter->mng_vlan_id);
2163 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2164 }
2165 }
2166 }
2167
74ef9c39
JB		 2168 if (!test_bit(__E1000_DOWN, &adapter->state))
2169 e1000_irq_enable(adapter);
bc7f75fa
AK		 2170}
2171
2172static void e1000_restore_vlan(struct e1000_adapter *adapter)
2173{
2174 u16 vid;
2175
2176 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
2177
2178 if (!adapter->vlgrp)
2179 return;
2180
2181 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
2182 if (!vlan_group_get_device(adapter->vlgrp, vid))
2183 continue;
2184 e1000_vlan_rx_add_vid(adapter->netdev, vid);
2185 }
2186}
2187
2188static void e1000_init_manageability(struct e1000_adapter *adapter)
2189{
2190 struct e1000_hw *hw = &adapter->hw;
2191 u32 manc, manc2h;
2192
2193 if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2194 return;
2195
2196 manc = er32(MANC);
2197
ad68076e
BA		 2198 /*
2199 * enable receiving management packets to the host. this will probably
bc7f75fa 2200 * generate destination unreachable messages from the host OS, but
ad68076e
BA		 2201 * the packets will be handled on SMBUS
2202 */
bc7f75fa
AK		 2203 manc |= E1000_MANC_EN_MNG2HOST;
2204 manc2h = er32(MANC2H);
2205#define E1000_MNG2HOST_PORT_623 (1 << 5)
2206#define E1000_MNG2HOST_PORT_664 (1 << 6)
2207 manc2h |= E1000_MNG2HOST_PORT_623;
2208 manc2h |= E1000_MNG2HOST_PORT_664;
2209 ew32(MANC2H, manc2h);
2210 ew32(MANC, manc);
2211}
2212
2213/**
2214 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
2215 * @adapter: board private structure
2216 *
2217 * Configure the Tx unit of the MAC after a reset.
2218 **/
2219static void e1000_configure_tx(struct e1000_adapter *adapter)
2220{
2221 struct e1000_hw *hw = &adapter->hw;
2222 struct e1000_ring *tx_ring = adapter->tx_ring;
2223 u64 tdba;
2224 u32 tdlen, tctl, tipg, tarc;
2225 u32 ipgr1, ipgr2;
2226
2227 /* Setup the HW Tx Head and Tail descriptor pointers */
2228 tdba = tx_ring->dma;
2229 tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
284901a9 2230 ew32(TDBAL, (tdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2231 ew32(TDBAH, (tdba >> 32));
2232 ew32(TDLEN, tdlen);
2233 ew32(TDH, 0);
2234 ew32(TDT, 0);
2235 tx_ring->head = E1000_TDH;
2236 tx_ring->tail = E1000_TDT;
2237
2238 /* Set the default values for the Tx Inter Packet Gap timer */
2239 tipg = DEFAULT_82543_TIPG_IPGT_COPPER; /* 8 */
2240 ipgr1 = DEFAULT_82543_TIPG_IPGR1; /* 8 */
2241 ipgr2 = DEFAULT_82543_TIPG_IPGR2; /* 6 */
2242
2243 if (adapter->flags & FLAG_TIPG_MEDIUM_FOR_80003ESLAN)
2244 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2; /* 7 */
2245
2246 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
2247 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
2248 ew32(TIPG, tipg);
2249
2250 /* Set the Tx Interrupt Delay register */
2251 ew32(TIDV, adapter->tx_int_delay);
ad68076e 2252 /* Tx irq moderation */
bc7f75fa
AK		 2253 ew32(TADV, adapter->tx_abs_int_delay);
2254
2255 /* Program the Transmit Control Register */
2256 tctl = er32(TCTL);
2257 tctl &= ~E1000_TCTL_CT;
2258 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2259 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2260
2261 if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
e9ec2c0f 2262 tarc = er32(TARC(0));
ad68076e
BA		 2263 /*
2264 * set the speed mode bit, we'll clear it if we're not at
2265 * gigabit link later
2266 */
bc7f75fa
AK		 2267#define SPEED_MODE_BIT (1 << 21)
2268 tarc |= SPEED_MODE_BIT;
e9ec2c0f 2269 ew32(TARC(0), tarc);
bc7f75fa
AK		 2270 }
2271
2272 /* errata: program both queues to unweighted RR */
2273 if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
e9ec2c0f 2274 tarc = er32(TARC(0));
bc7f75fa 2275 tarc |= 1;
e9ec2c0f
JK		 2276 ew32(TARC(0), tarc);
2277 tarc = er32(TARC(1));
bc7f75fa 2278 tarc |= 1;
e9ec2c0f 2279 ew32(TARC(1), tarc);
bc7f75fa
AK		 2280 }
2281
bc7f75fa
AK		 2282 /* Setup Transmit Descriptor Settings for eop descriptor */
2283 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2284
2285 /* only set IDE if we are delaying interrupts using the timers */
2286 if (adapter->tx_int_delay)
2287 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2288
2289 /* enable Report Status bit */
2290 adapter->txd_cmd |= E1000_TXD_CMD_RS;
2291
2292 ew32(TCTL, tctl);
2293
edfea6e6
SH		 2294 e1000e_config_collision_dist(hw);
2295
bc7f75fa
AK		 2296 adapter->tx_queue_len = adapter->netdev->tx_queue_len;
2297}
2298
2299/**
2300 * e1000_setup_rctl - configure the receive control registers
2301 * @adapter: Board private structure
2302 **/
2303#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
2304 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
2305static void e1000_setup_rctl(struct e1000_adapter *adapter)
2306{
2307 struct e1000_hw *hw = &adapter->hw;
2308 u32 rctl, rfctl;
2309 u32 psrctl = 0;
2310 u32 pages = 0;
2311
2312 /* Program MC offset vector base */
2313 rctl = er32(RCTL);
2314 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
2315 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
2316 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
2317 (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
2318
2319 /* Do not Store bad packets */
2320 rctl &= ~E1000_RCTL_SBP;
2321
2322 /* Enable Long Packet receive */
2323 if (adapter->netdev->mtu <= ETH_DATA_LEN)
2324 rctl &= ~E1000_RCTL_LPE;
2325 else
2326 rctl |= E1000_RCTL_LPE;
2327
eb7c3adb
JK		 2328 /* Some systems expect that the CRC is included in SMBUS traffic. The
2329 * hardware strips the CRC before sending to both SMBUS (BMC) and to
2330 * host memory when this is enabled
2331 */
2332 if (adapter->flags2 & FLAG2_CRC_STRIPPING)
2333 rctl |= E1000_RCTL_SECRC;
5918bd88 2334
a4f58f54
BA		 2335 /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
2336 if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
2337 u16 phy_data;
2338
2339 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
2340 phy_data &= 0xfff8;
2341 phy_data |= (1 << 2);
2342 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
2343
2344 e1e_rphy(hw, 22, &phy_data);
2345 phy_data &= 0x0fff;
2346 phy_data |= (1 << 14);
2347 e1e_wphy(hw, 0x10, 0x2823);
2348 e1e_wphy(hw, 0x11, 0x0003);
2349 e1e_wphy(hw, 22, phy_data);
2350 }
2351
bc7f75fa
AK		 2352 /* Setup buffer sizes */
2353 rctl &= ~E1000_RCTL_SZ_4096;
2354 rctl |= E1000_RCTL_BSEX;
2355 switch (adapter->rx_buffer_len) {
bc7f75fa
AK		 2356 case 2048:
2357 default:
2358 rctl |= E1000_RCTL_SZ_2048;
2359 rctl &= ~E1000_RCTL_BSEX;
2360 break;
2361 case 4096:
2362 rctl |= E1000_RCTL_SZ_4096;
2363 break;
2364 case 8192:
2365 rctl |= E1000_RCTL_SZ_8192;
2366 break;
2367 case 16384:
2368 rctl |= E1000_RCTL_SZ_16384;
2369 break;
2370 }
2371
2372 /*
2373 * 82571 and greater support packet-split where the protocol
2374 * header is placed in skb->data and the packet data is
2375 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
2376 * In the case of a non-split, skb->data is linearly filled,
2377 * followed by the page buffers. Therefore, skb->data is
2378 * sized to hold the largest protocol header.
2379 *
2380 * allocations using alloc_page take too long for regular MTU
2381 * so only enable packet split for jumbo frames
2382 *
2383 * Using pages when the page size is greater than 16k wastes
2384 * a lot of memory, since we allocate 3 pages at all times
2385 * per packet.
2386 */
bc7f75fa 2387 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
97ac8cae
BA		 2388 if (!(adapter->flags & FLAG_IS_ICH) && (pages <= 3) &&
2389 (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
bc7f75fa 2390 adapter->rx_ps_pages = pages;
97ac8cae
BA		 2391 else
2392 adapter->rx_ps_pages = 0;
bc7f75fa
AK		 2393
2394 if (adapter->rx_ps_pages) {
2395 /* Configure extra packet-split registers */
2396 rfctl = er32(RFCTL);
2397 rfctl |= E1000_RFCTL_EXTEN;
ad68076e
BA		 2398 /*
2399 * disable packet split support for IPv6 extension headers,
2400 * because some malformed IPv6 headers can hang the Rx
2401 */
bc7f75fa
AK		 2402 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
2403 E1000_RFCTL_NEW_IPV6_EXT_DIS);
2404
2405 ew32(RFCTL, rfctl);
2406
140a7480
AK		 2407 /* Enable Packet split descriptors */
2408 rctl |= E1000_RCTL_DTYP_PS;
bc7f75fa
AK		 2409
2410 psrctl |= adapter->rx_ps_bsize0 >>
2411 E1000_PSRCTL_BSIZE0_SHIFT;
2412
2413 switch (adapter->rx_ps_pages) {
2414 case 3:
2415 psrctl |= PAGE_SIZE <<
2416 E1000_PSRCTL_BSIZE3_SHIFT;
2417 case 2:
2418 psrctl |= PAGE_SIZE <<
2419 E1000_PSRCTL_BSIZE2_SHIFT;
2420 case 1:
2421 psrctl |= PAGE_SIZE >>
2422 E1000_PSRCTL_BSIZE1_SHIFT;
2423 break;
2424 }
2425
2426 ew32(PSRCTL, psrctl);
2427 }
2428
2429 ew32(RCTL, rctl);
318a94d6
JK		 2430 /* just started the receive unit, no need to restart */
2431 adapter->flags &= ~FLAG_RX_RESTART_NOW;
bc7f75fa
AK		 2432}
2433
2434/**
2435 * e1000_configure_rx - Configure Receive Unit after Reset
2436 * @adapter: board private structure
2437 *
2438 * Configure the Rx unit of the MAC after a reset.
2439 **/
2440static void e1000_configure_rx(struct e1000_adapter *adapter)
2441{
2442 struct e1000_hw *hw = &adapter->hw;
2443 struct e1000_ring *rx_ring = adapter->rx_ring;
2444 u64 rdba;
2445 u32 rdlen, rctl, rxcsum, ctrl_ext;
2446
2447 if (adapter->rx_ps_pages) {
2448 /* this is a 32 byte descriptor */
2449 rdlen = rx_ring->count *
2450 sizeof(union e1000_rx_desc_packet_split);
2451 adapter->clean_rx = e1000_clean_rx_irq_ps;
2452 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
97ac8cae
BA		 2453 } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
2454 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
2455 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
2456 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
bc7f75fa 2457 } else {
97ac8cae 2458 rdlen = rx_ring->count * sizeof(struct e1000_rx_desc);
bc7f75fa
AK		 2459 adapter->clean_rx = e1000_clean_rx_irq;
2460 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2461 }
2462
2463 /* disable receives while setting up the descriptors */
2464 rctl = er32(RCTL);
2465 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2466 e1e_flush();
2467 msleep(10);
2468
2469 /* set the Receive Delay Timer Register */
2470 ew32(RDTR, adapter->rx_int_delay);
2471
2472 /* irq moderation */
2473 ew32(RADV, adapter->rx_abs_int_delay);
2474 if (adapter->itr_setting != 0)
ad68076e 2475 ew32(ITR, 1000000000 / (adapter->itr * 256));
bc7f75fa
AK		 2476
2477 ctrl_ext = er32(CTRL_EXT);
bc7f75fa
AK		 2478 /* Auto-Mask interrupts upon ICR access */
2479 ctrl_ext |= E1000_CTRL_EXT_IAME;
2480 ew32(IAM, 0xffffffff);
2481 ew32(CTRL_EXT, ctrl_ext);
2482 e1e_flush();
2483
ad68076e
BA		 2484 /*
2485 * Setup the HW Rx Head and Tail Descriptor Pointers and
2486 * the Base and Length of the Rx Descriptor Ring
2487 */
bc7f75fa 2488 rdba = rx_ring->dma;
284901a9 2489 ew32(RDBAL, (rdba & DMA_BIT_MASK(32)));
bc7f75fa
AK		 2490 ew32(RDBAH, (rdba >> 32));
2491 ew32(RDLEN, rdlen);
2492 ew32(RDH, 0);
2493 ew32(RDT, 0);
2494 rx_ring->head = E1000_RDH;
2495 rx_ring->tail = E1000_RDT;
2496
2497 /* Enable Receive Checksum Offload for TCP and UDP */
2498 rxcsum = er32(RXCSUM);
2499 if (adapter->flags & FLAG_RX_CSUM_ENABLED) {
2500 rxcsum |= E1000_RXCSUM_TUOFL;
2501
ad68076e
BA		 2502 /*
2503 * IPv4 payload checksum for UDP fragments must be
2504 * used in conjunction with packet-split.
2505 */
bc7f75fa
AK		 2506 if (adapter->rx_ps_pages)
2507 rxcsum |= E1000_RXCSUM_IPPCSE;
2508 } else {
2509 rxcsum &= ~E1000_RXCSUM_TUOFL;
2510 /* no need to clear IPPCSE as it defaults to 0 */
2511 }
2512 ew32(RXCSUM, rxcsum);
2513
ad68076e
BA		 2514 /*
2515 * Enable early receives on supported devices, only takes effect when
bc7f75fa 2516 * packet size is equal or larger than the specified value (in 8 byte
ad68076e
BA		 2517 * units), e.g. using jumbo frames when setting to E1000_ERT_2048
2518 */
53ec5498
BA		 2519 if (adapter->flags & FLAG_HAS_ERT) {
2520 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2521 u32 rxdctl = er32(RXDCTL(0));
2522 ew32(RXDCTL(0), rxdctl | 0x3);
2523 ew32(ERT, E1000_ERT_2048 | (1 << 13));
2524 /*
2525 * With jumbo frames and early-receive enabled,
2526 * excessive C-state transition latencies result in
2527 * dropped transactions.
2528 */
2529 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2530 adapter->netdev->name, 55);
2531 } else {
2532 pm_qos_update_requirement(PM_QOS_CPU_DMA_LATENCY,
2533 adapter->netdev->name,
2534 PM_QOS_DEFAULT_VALUE);
2535 }
97ac8cae 2536 }
bc7f75fa
AK		 2537
2538 /* Enable Receives */
2539 ew32(RCTL, rctl);
2540}
2541
2542/**
e2de3eb6 2543 * e1000_update_mc_addr_list - Update Multicast addresses
bc7f75fa
AK		 2544 * @hw: pointer to the HW structure
2545 * @mc_addr_list: array of multicast addresses to program
2546 * @mc_addr_count: number of multicast addresses to program
bc7f75fa 2547 *
ab8932f3 2548 * Updates the Multicast Table Array.
bc7f75fa 2549 * The caller must have a packed mc_addr_list of multicast addresses.
bc7f75fa 2550 **/
e2de3eb6 2551static void e1000_update_mc_addr_list(struct e1000_hw *hw, u8 *mc_addr_list,
ab8932f3 2552 u32 mc_addr_count)
bc7f75fa 2553{
ab8932f3 2554 hw->mac.ops.update_mc_addr_list(hw, mc_addr_list, mc_addr_count);
bc7f75fa
AK		 2555}
2556
2557/**
2558 * e1000_set_multi - Multicast and Promiscuous mode set
2559 * @netdev: network interface device structure
2560 *
2561 * The set_multi entry point is called whenever the multicast address
2562 * list or the network interface flags are updated. This routine is
2563 * responsible for configuring the hardware for proper multicast,
2564 * promiscuous mode, and all-multi behavior.
2565 **/
2566static void e1000_set_multi(struct net_device *netdev)
2567{
2568 struct e1000_adapter *adapter = netdev_priv(netdev);
2569 struct e1000_hw *hw = &adapter->hw;
22bedad3 2570 struct netdev_hw_addr *ha;
bc7f75fa
AK		 2571 u8 *mta_list;
2572 u32 rctl;
2573 int i;
2574
2575 /* Check for Promiscuous and All Multicast modes */
2576
2577 rctl = er32(RCTL);
2578
2579 if (netdev->flags & IFF_PROMISC) {
2580 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2581 rctl &= ~E1000_RCTL_VFE;
bc7f75fa 2582 } else {
746b9f02
PM		 2583 if (netdev->flags & IFF_ALLMULTI) {
2584 rctl |= E1000_RCTL_MPE;
2585 rctl &= ~E1000_RCTL_UPE;
2586 } else {
2587 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2588 }
78ed11a5 2589 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
746b9f02 2590 rctl |= E1000_RCTL_VFE;
bc7f75fa
AK		 2591 }
2592
2593 ew32(RCTL, rctl);
2594
7aeef972
JP		 2595 if (!netdev_mc_empty(netdev)) {
2596 mta_list = kmalloc(netdev_mc_count(netdev) * 6, GFP_ATOMIC);
bc7f75fa
AK		 2597 if (!mta_list)
2598 return;
2599
2600 /* prepare a packed array of only addresses. */
7aeef972 2601 i = 0;
22bedad3
JP		 2602 netdev_for_each_mc_addr(ha, netdev)
2603 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
bc7f75fa 2604
ab8932f3 2605 e1000_update_mc_addr_list(hw, mta_list, i);
bc7f75fa
AK		 2606 kfree(mta_list);
2607 } else {
2608 /*
2609 * if we're called from probe, we might not have
2610 * anything to do here, so clear out the list
2611 */
ab8932f3 2612 e1000_update_mc_addr_list(hw, NULL, 0);
bc7f75fa
AK		 2613 }
2614}
2615
2616/**
ad68076e 2617 * e1000_configure - configure the hardware for Rx and Tx
bc7f75fa
AK		 2618 * @adapter: private board structure
2619 **/
2620static void e1000_configure(struct e1000_adapter *adapter)
2621{
2622 e1000_set_multi(adapter->netdev);
2623
2624 e1000_restore_vlan(adapter);
2625 e1000_init_manageability(adapter);
2626
2627 e1000_configure_tx(adapter);
2628 e1000_setup_rctl(adapter);
2629 e1000_configure_rx(adapter);
ad68076e 2630 adapter->alloc_rx_buf(adapter, e1000_desc_unused(adapter->rx_ring));
bc7f75fa
AK		 2631}
2632
2633/**
2634 * e1000e_power_up_phy - restore link in case the phy was powered down
2635 * @adapter: address of board private structure
2636 *
2637 * The phy may be powered down to save power and turn off link when the
2638 * driver is unloaded and wake on lan is not enabled (among others)
2639 * *** this routine MUST be followed by a call to e1000e_reset ***
2640 **/
2641void e1000e_power_up_phy(struct e1000_adapter *adapter)
2642{
17f208de
BA		 2643 if (adapter->hw.phy.ops.power_up)
2644 adapter->hw.phy.ops.power_up(&adapter->hw);
bc7f75fa
AK		 2645
2646 adapter->hw.mac.ops.setup_link(&adapter->hw);
2647}
2648
2649/**
2650 * e1000_power_down_phy - Power down the PHY
2651 *
17f208de
BA		 2652 * Power down the PHY so no link is implied when interface is down.
2653 * The PHY cannot be powered down if management or WoL is active.
bc7f75fa
AK		 2654 */
2655static void e1000_power_down_phy(struct e1000_adapter *adapter)
2656{
bc7f75fa 2657 /* WoL is enabled */
23b66e2b 2658 if (adapter->wol)
bc7f75fa
AK		 2659 return;
2660
17f208de
BA		 2661 if (adapter->hw.phy.ops.power_down)
2662 adapter->hw.phy.ops.power_down(&adapter->hw);
bc7f75fa
AK		 2663}
2664
2665/**
2666 * e1000e_reset - bring the hardware into a known good state
2667 *
2668 * This function boots the hardware and enables some settings that
2669 * require a configuration cycle of the hardware - those cannot be
2670 * set/changed during runtime. After reset the device needs to be
ad68076e 2671 * properly configured for Rx, Tx etc.
bc7f75fa
AK		 2672 */
2673void e1000e_reset(struct e1000_adapter *adapter)
2674{
2675 struct e1000_mac_info *mac = &adapter->hw.mac;
318a94d6 2676 struct e1000_fc_info *fc = &adapter->hw.fc;
bc7f75fa
AK		 2677 struct e1000_hw *hw = &adapter->hw;
2678 u32 tx_space, min_tx_space, min_rx_space;
318a94d6 2679 u32 pba = adapter->pba;
bc7f75fa
AK		 2680 u16 hwm;
2681
ad68076e 2682 /* reset Packet Buffer Allocation to default */
318a94d6 2683 ew32(PBA, pba);
df762464 2684
318a94d6 2685 if (adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) {
ad68076e
BA		 2686 /*
2687 * To maintain wire speed transmits, the Tx FIFO should be
bc7f75fa
AK		 2688 * large enough to accommodate two full transmit packets,
2689 * rounded up to the next 1KB and expressed in KB. Likewise,
2690 * the Rx FIFO should be large enough to accommodate at least
2691 * one full receive packet and is similarly rounded up and
ad68076e
BA		 2692 * expressed in KB.
2693 */
df762464 2694 pba = er32(PBA);
bc7f75fa 2695 /* upper 16 bits has Tx packet buffer allocation size in KB */
df762464 2696 tx_space = pba >> 16;
bc7f75fa 2697 /* lower 16 bits has Rx packet buffer allocation size in KB */
df762464 2698 pba &= 0xffff;
ad68076e
BA		 2699 /*
2700 * the Tx fifo also stores 16 bytes of information about the tx
2701 * but don't include ethernet FCS because hardware appends it
318a94d6
JK		 2702 */
2703 min_tx_space = (adapter->max_frame_size +
bc7f75fa
AK		 2704 sizeof(struct e1000_tx_desc) -
2705 ETH_FCS_LEN) * 2;
2706 min_tx_space = ALIGN(min_tx_space, 1024);
2707 min_tx_space >>= 10;
2708 /* software strips receive CRC, so leave room for it */
318a94d6 2709 min_rx_space = adapter->max_frame_size;
bc7f75fa
AK		 2710 min_rx_space = ALIGN(min_rx_space, 1024);
2711 min_rx_space >>= 10;
2712
ad68076e
BA		 2713 /*
2714 * If current Tx allocation is less than the min Tx FIFO size,
bc7f75fa 2715 * and the min Tx FIFO size is less than the current Rx FIFO
ad68076e
BA		 2716 * allocation, take space away from current Rx allocation
2717 */
df762464
AK		 2718 if ((tx_space < min_tx_space) &&
2719 ((min_tx_space - tx_space) < pba)) {
2720 pba -= min_tx_space - tx_space;
bc7f75fa 2721
ad68076e
BA		 2722 /*
2723 * if short on Rx space, Rx wins and must trump tx
2724 * adjustment or use Early Receive if available
2725 */
df762464 2726 if ((pba < min_rx_space) &&
bc7f75fa
AK		 2727 (!(adapter->flags & FLAG_HAS_ERT)))
2728 /* ERT enabled in e1000_configure_rx */
df762464 2729 pba = min_rx_space;
bc7f75fa 2730 }
df762464
AK		 2731
2732 ew32(PBA, pba);
bc7f75fa
AK		 2733 }
2734
bc7f75fa 2735
ad68076e
BA		 2736 /*
2737 * flow control settings
2738 *
38eb394e 2739 * The high water mark must be low enough to fit one full frame
bc7f75fa
AK		 2740 * (or the size used for early receive) above it in the Rx FIFO.
2741 * Set it to the lower of:
2742 * - 90% of the Rx FIFO size, and
2743 * - the full Rx FIFO size minus the early receive size (for parts
2744 * with ERT support assuming ERT set to E1000_ERT_2048), or
38eb394e 2745 * - the full Rx FIFO size minus one full frame
ad68076e 2746 */
38eb394e
BA		 2747 if (hw->mac.type == e1000_pchlan) {
2748 /*
2749 * Workaround PCH LOM adapter hangs with certain network
2750 * loads. If hangs persist, try disabling Tx flow control.
2751 */
2752 if (adapter->netdev->mtu > ETH_DATA_LEN) {
2753 fc->high_water = 0x3500;
2754 fc->low_water = 0x1500;
2755 } else {
2756 fc->high_water = 0x5000;
2757 fc->low_water = 0x3000;
2758 }
2759 } else {
2760 if ((adapter->flags & FLAG_HAS_ERT) &&
2761 (adapter->netdev->mtu > ETH_DATA_LEN))
2762 hwm = min(((pba << 10) * 9 / 10),
2763 ((pba << 10) - (E1000_ERT_2048 << 3)));
2764 else
2765 hwm = min(((pba << 10) * 9 / 10),
2766 ((pba << 10) - adapter->max_frame_size));
bc7f75fa 2767
38eb394e
BA		 2768 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
2769 fc->low_water = fc->high_water - 8;
2770 }
bc7f75fa
AK		 2771
2772 if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
318a94d6 2773 fc->pause_time = 0xFFFF;
bc7f75fa 2774 else
318a94d6
JK		 2775 fc->pause_time = E1000_FC_PAUSE_TIME;
2776 fc->send_xon = 1;
5c48ef3e 2777 fc->current_mode = fc->requested_mode;
bc7f75fa
AK		 2778
2779 /* Allow time for pending master requests to run */
2780 mac->ops.reset_hw(hw);
97ac8cae
BA		 2781
2782 /*
2783 * For parts with AMT enabled, let the firmware know
2784 * that the network interface is in control
2785 */
c43bc57e 2786 if (adapter->flags & FLAG_HAS_AMT)
97ac8cae
BA		 2787 e1000_get_hw_control(adapter);
2788
bc7f75fa 2789 ew32(WUC, 0);
a4f58f54
BA		 2790 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP)
2791 e1e_wphy(&adapter->hw, BM_WUC, 0);
bc7f75fa
AK		 2792
2793 if (mac->ops.init_hw(hw))
44defeb3 2794 e_err("Hardware Error\n");
bc7f75fa 2795
38eb394e
BA		 2796 /* additional part of the flow-control workaround above */
2797 if (hw->mac.type == e1000_pchlan)
2798 ew32(FCRTV_PCH, 0x1000);
2799
bc7f75fa
AK		 2800 e1000_update_mng_vlan(adapter);
2801
2802 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2803 ew32(VET, ETH_P_8021Q);
2804
2805 e1000e_reset_adaptive(hw);
2806 e1000_get_phy_info(hw);
2807
918d7197
BA		 2808 if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
2809 !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
bc7f75fa 2810 u16 phy_data = 0;
ad68076e
BA		 2811 /*
2812 * speed up time to link by disabling smart power down, ignore
bc7f75fa 2813 * the return value of this function because there is nothing
ad68076e
BA		 2814 * different we would do if it failed
2815 */
bc7f75fa
AK		 2816 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
2817 phy_data &= ~IGP02E1000_PM_SPD;
2818 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
2819 }
bc7f75fa
AK		 2820}
2821
2822int e1000e_up(struct e1000_adapter *adapter)
2823{
2824 struct e1000_hw *hw = &adapter->hw;
2825
53ec5498
BA		 2826 /* DMA latency requirement to workaround early-receive/jumbo issue */
2827 if (adapter->flags & FLAG_HAS_ERT)
2828 pm_qos_add_requirement(PM_QOS_CPU_DMA_LATENCY,
2829 adapter->netdev->name,
2830 PM_QOS_DEFAULT_VALUE);
2831
bc7f75fa
AK		 2832 /* hardware has been reset, we need to reload some things */
2833 e1000_configure(adapter);
2834
2835 clear_bit(__E1000_DOWN, &adapter->state);
2836
2837 napi_enable(&adapter->napi);
4662e82b
BA		 2838 if (adapter->msix_entries)
2839 e1000_configure_msix(adapter);
bc7f75fa
AK		 2840 e1000_irq_enable(adapter);
2841
4cb9be7a
JB		 2842 netif_wake_queue(adapter->netdev);
2843
bc7f75fa
AK		 2844 /* fire a link change interrupt to start the watchdog */
2845 ew32(ICS, E1000_ICS_LSC);
2846 return 0;
2847}
2848
2849void e1000e_down(struct e1000_adapter *adapter)
2850{
2851 struct net_device *netdev = adapter->netdev;
2852 struct e1000_hw *hw = &adapter->hw;
2853 u32 tctl, rctl;
2854
ad68076e
BA		 2855 /*
2856 * signal that we're down so the interrupt handler does not
2857 * reschedule our watchdog timer
2858 */
bc7f75fa
AK		 2859 set_bit(__E1000_DOWN, &adapter->state);
2860
2861 /* disable receives in the hardware */
2862 rctl = er32(RCTL);
2863 ew32(RCTL, rctl & ~E1000_RCTL_EN);
2864 /* flush and sleep below */
2865
4cb9be7a 2866 netif_stop_queue(netdev);
bc7f75fa
AK		 2867
2868 /* disable transmits in the hardware */
2869 tctl = er32(TCTL);
2870 tctl &= ~E1000_TCTL_EN;
2871 ew32(TCTL, tctl);
2872 /* flush both disables and wait for them to finish */
2873 e1e_flush();
2874 msleep(10);
2875
2876 napi_disable(&adapter->napi);
2877 e1000_irq_disable(adapter);
2878
2879 del_timer_sync(&adapter->watchdog_timer);
2880 del_timer_sync(&adapter->phy_info_timer);
2881
2882 netdev->tx_queue_len = adapter->tx_queue_len;
2883 netif_carrier_off(netdev);
2884 adapter->link_speed = 0;
2885 adapter->link_duplex = 0;
2886
52cc3086
JK		 2887 if (!pci_channel_offline(adapter->pdev))
2888 e1000e_reset(adapter);
bc7f75fa
AK		 2889 e1000_clean_tx_ring(adapter);
2890 e1000_clean_rx_ring(adapter);
2891
53ec5498
BA		 2892 if (adapter->flags & FLAG_HAS_ERT)
2893 pm_qos_remove_requirement(PM_QOS_CPU_DMA_LATENCY,
2894 adapter->netdev->name);
2895
bc7f75fa
AK		 2896 /*
2897 * TODO: for power management, we could drop the link and
2898 * pci_disable_device here.
2899 */
2900}
2901
2902void e1000e_reinit_locked(struct e1000_adapter *adapter)
2903{
2904 might_sleep();
2905 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
2906 msleep(1);
2907 e1000e_down(adapter);
2908 e1000e_up(adapter);
2909 clear_bit(__E1000_RESETTING, &adapter->state);
2910}
2911
2912/**
2913 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
2914 * @adapter: board private structure to initialize
2915 *
2916 * e1000_sw_init initializes the Adapter private data structure.
2917 * Fields are initialized based on PCI device information and
2918 * OS network device settings (MTU size).
2919 **/
2920static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
2921{
bc7f75fa
AK		 2922 struct net_device *netdev = adapter->netdev;
2923
2924 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN;
2925 adapter->rx_ps_bsize0 = 128;
318a94d6
JK		 2926 adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
2927 adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
bc7f75fa 2928
4662e82b 2929 e1000e_set_interrupt_capability(adapter);
bc7f75fa 2930
4662e82b
BA		 2931 if (e1000_alloc_queues(adapter))
2932 return -ENOMEM;
bc7f75fa 2933
bc7f75fa 2934 /* Explicitly disable IRQ since the NIC can be in any state. */
bc7f75fa
AK		 2935 e1000_irq_disable(adapter);
2936
bc7f75fa
AK		 2937 set_bit(__E1000_DOWN, &adapter->state);
2938 return 0;
bc7f75fa
AK		 2939}
2940
f8d59f78
BA		 2941/**
2942 * e1000_intr_msi_test - Interrupt Handler
2943 * @irq: interrupt number
2944 * @data: pointer to a network interface device structure
2945 **/
2946static irqreturn_t e1000_intr_msi_test(int irq, void *data)
2947{
2948 struct net_device *netdev = data;
2949 struct e1000_adapter *adapter = netdev_priv(netdev);
2950 struct e1000_hw *hw = &adapter->hw;
2951 u32 icr = er32(ICR);
2952
3bb99fe2 2953 e_dbg("icr is %08X\n", icr);
f8d59f78
BA		 2954 if (icr & E1000_ICR_RXSEQ) {
2955 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
2956 wmb();
2957 }
2958
2959 return IRQ_HANDLED;
2960}
2961
2962/**
2963 * e1000_test_msi_interrupt - Returns 0 for successful test
2964 * @adapter: board private struct
2965 *
2966 * code flow taken from tg3.c
2967 **/
2968static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
2969{
2970 struct net_device *netdev = adapter->netdev;
2971 struct e1000_hw *hw = &adapter->hw;
2972 int err;
2973
2974 /* poll_enable hasn't been called yet, so don't need disable */
2975 /* clear any pending events */
2976 er32(ICR);
2977
2978 /* free the real vector and request a test handler */
2979 e1000_free_irq(adapter);
4662e82b 2980 e1000e_reset_interrupt_capability(adapter);
f8d59f78
BA		 2981
2982 /* Assume that the test fails, if it succeeds then the test
2983 * MSI irq handler will unset this flag */
2984 adapter->flags |= FLAG_MSI_TEST_FAILED;
2985
2986 err = pci_enable_msi(adapter->pdev);
2987 if (err)
2988 goto msi_test_failed;
2989
a0607fd3 2990 err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
f8d59f78
BA		 2991 netdev->name, netdev);
2992 if (err) {
2993 pci_disable_msi(adapter->pdev);
2994 goto msi_test_failed;
2995 }
2996
2997 wmb();
2998
2999 e1000_irq_enable(adapter);
3000
3001 /* fire an unusual interrupt on the test handler */
3002 ew32(ICS, E1000_ICS_RXSEQ);
3003 e1e_flush();
3004 msleep(50);
3005
3006 e1000_irq_disable(adapter);
3007
3008 rmb();
3009
3010 if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4662e82b 3011 adapter->int_mode = E1000E_INT_MODE_LEGACY;
f8d59f78
BA		 3012 err = -EIO;
3013 e_info("MSI interrupt test failed!\n");
3014 }
3015
3016 free_irq(adapter->pdev->irq, netdev);
3017 pci_disable_msi(adapter->pdev);
3018
3019 if (err == -EIO)
3020 goto msi_test_failed;
3021
3022 /* okay so the test worked, restore settings */
3bb99fe2 3023 e_dbg("MSI interrupt test succeeded!\n");
f8d59f78 3024msi_test_failed:
4662e82b 3025 e1000e_set_interrupt_capability(adapter);
f8d59f78
BA		 3026 e1000_request_irq(adapter);
3027 return err;
3028}
3029
3030/**
3031 * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
3032 * @adapter: board private struct
3033 *
3034 * code flow taken from tg3.c, called with e1000 interrupts disabled.
3035 **/
3036static int e1000_test_msi(struct e1000_adapter *adapter)
3037{
3038 int err;
3039 u16 pci_cmd;
3040
3041 if (!(adapter->flags & FLAG_MSI_ENABLED))
3042 return 0;
3043
3044 /* disable SERR in case the MSI write causes a master abort */
3045 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
3046 pci_write_config_word(adapter->pdev, PCI_COMMAND,
3047 pci_cmd & ~PCI_COMMAND_SERR);
3048
3049 err = e1000_test_msi_interrupt(adapter);
3050
3051 /* restore previous setting of command word */
3052 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
3053
3054 /* success ! */
3055 if (!err)
3056 return 0;
3057
3058 /* EIO means MSI test failed */
3059 if (err != -EIO)
3060 return err;
3061
3062 /* back to INTx mode */
3063 e_warn("MSI interrupt test failed, using legacy interrupt.\n");
3064
3065 e1000_free_irq(adapter);
3066
3067 err = e1000_request_irq(adapter);
3068
3069 return err;
3070}
3071
bc7f75fa
AK		 3072/**
3073 * e1000_open - Called when a network interface is made active
3074 * @netdev: network interface device structure
3075 *
3076 * Returns 0 on success, negative value on failure
3077 *
3078 * The open entry point is called when a network interface is made
3079 * active by the system (IFF_UP). At this point all resources needed
3080 * for transmit and receive operations are allocated, the interrupt
3081 * handler is registered with the OS, the watchdog timer is started,
3082 * and the stack is notified that the interface is ready.
3083 **/
3084static int e1000_open(struct net_device *netdev)
3085{
3086 struct e1000_adapter *adapter = netdev_priv(netdev);
3087 struct e1000_hw *hw = &adapter->hw;
23606cf5 3088 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3089 int err;
3090
3091 /* disallow open during test */
3092 if (test_bit(__E1000_TESTING, &adapter->state))
3093 return -EBUSY;
3094
23606cf5
RW		 3095 pm_runtime_get_sync(&pdev->dev);
3096
9c563d20
JB		 3097 netif_carrier_off(netdev);
3098
bc7f75fa
AK		 3099 /* allocate transmit descriptors */
3100 err = e1000e_setup_tx_resources(adapter);
3101 if (err)
3102 goto err_setup_tx;
3103
3104 /* allocate receive descriptors */
3105 err = e1000e_setup_rx_resources(adapter);
3106 if (err)
3107 goto err_setup_rx;
3108
3109 e1000e_power_up_phy(adapter);
3110
3111 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
3112 if ((adapter->hw.mng_cookie.status &
3113 E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
3114 e1000_update_mng_vlan(adapter);
3115
ad68076e
BA		 3116 /*
3117 * If AMT is enabled, let the firmware know that the network
3118 * interface is now open
3119 */
c43bc57e 3120 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3121 e1000_get_hw_control(adapter);
3122
ad68076e
BA		 3123 /*
3124 * before we allocate an interrupt, we must be ready to handle it.
bc7f75fa
AK		 3125 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3126 * as soon as we call pci_request_irq, so we have to setup our
ad68076e
BA		 3127 * clean_rx handler before we do so.
3128 */
bc7f75fa
AK		 3129 e1000_configure(adapter);
3130
3131 err = e1000_request_irq(adapter);
3132 if (err)
3133 goto err_req_irq;
3134
f8d59f78
BA		 3135 /*
3136 * Work around PCIe errata with MSI interrupts causing some chipsets to
3137 * ignore e1000e MSI messages, which means we need to test our MSI
3138 * interrupt now
3139 */
4662e82b 3140 if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
f8d59f78
BA		 3141 err = e1000_test_msi(adapter);
3142 if (err) {
3143 e_err("Interrupt allocation failed\n");
3144 goto err_req_irq;
3145 }
3146 }
3147
bc7f75fa
AK		 3148 /* From here on the code is the same as e1000e_up() */
3149 clear_bit(__E1000_DOWN, &adapter->state);
3150
3151 napi_enable(&adapter->napi);
3152
3153 e1000_irq_enable(adapter);
3154
4cb9be7a 3155 netif_start_queue(netdev);
d55b53ff 3156
23606cf5
RW		 3157 adapter->idle_check = true;
3158 pm_runtime_put(&pdev->dev);
3159
bc7f75fa
AK		 3160 /* fire a link status change interrupt to start the watchdog */
3161 ew32(ICS, E1000_ICS_LSC);
3162
3163 return 0;
3164
3165err_req_irq:
3166 e1000_release_hw_control(adapter);
3167 e1000_power_down_phy(adapter);
3168 e1000e_free_rx_resources(adapter);
3169err_setup_rx:
3170 e1000e_free_tx_resources(adapter);
3171err_setup_tx:
3172 e1000e_reset(adapter);
23606cf5 3173 pm_runtime_put_sync(&pdev->dev);
bc7f75fa
AK		 3174
3175 return err;
3176}
3177
3178/**
3179 * e1000_close - Disables a network interface
3180 * @netdev: network interface device structure
3181 *
3182 * Returns 0, this is not allowed to fail
3183 *
3184 * The close entry point is called when an interface is de-activated
3185 * by the OS. The hardware is still under the drivers control, but
3186 * needs to be disabled. A global MAC reset is issued to stop the
3187 * hardware, and all transmit and receive resources are freed.
3188 **/
3189static int e1000_close(struct net_device *netdev)
3190{
3191 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5 3192 struct pci_dev *pdev = adapter->pdev;
bc7f75fa
AK		 3193
3194 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
23606cf5
RW		 3195
3196 pm_runtime_get_sync(&pdev->dev);
3197
3198 if (!test_bit(__E1000_DOWN, &adapter->state)) {
3199 e1000e_down(adapter);
3200 e1000_free_irq(adapter);
3201 }
bc7f75fa 3202 e1000_power_down_phy(adapter);
bc7f75fa
AK		 3203
3204 e1000e_free_tx_resources(adapter);
3205 e1000e_free_rx_resources(adapter);
3206
ad68076e
BA		 3207 /*
3208 * kill manageability vlan ID if supported, but not if a vlan with
3209 * the same ID is registered on the host OS (let 8021q kill it)
3210 */
bc7f75fa
AK		 3211 if ((adapter->hw.mng_cookie.status &
3212 E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
3213 !(adapter->vlgrp &&
3214 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id)))
3215 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
3216
ad68076e
BA		 3217 /*
3218 * If AMT is enabled, let the firmware know that the network
3219 * interface is now closed
3220 */
c43bc57e 3221 if (adapter->flags & FLAG_HAS_AMT)
bc7f75fa
AK		 3222 e1000_release_hw_control(adapter);
3223
23606cf5
RW		 3224 pm_runtime_put_sync(&pdev->dev);
3225
bc7f75fa
AK		 3226 return 0;
3227}
3228/**
3229 * e1000_set_mac - Change the Ethernet Address of the NIC
3230 * @netdev: network interface device structure
3231 * @p: pointer to an address structure
3232 *
3233 * Returns 0 on success, negative on failure
3234 **/
3235static int e1000_set_mac(struct net_device *netdev, void *p)
3236{
3237 struct e1000_adapter *adapter = netdev_priv(netdev);
3238 struct sockaddr *addr = p;
3239
3240 if (!is_valid_ether_addr(addr->sa_data))
3241 return -EADDRNOTAVAIL;
3242
3243 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
3244 memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
3245
3246 e1000e_rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
3247
3248 if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
3249 /* activate the work around */
3250 e1000e_set_laa_state_82571(&adapter->hw, 1);
3251
ad68076e
BA		 3252 /*
3253 * Hold a copy of the LAA in RAR[14] This is done so that
bc7f75fa
AK		 3254 * between the time RAR[0] gets clobbered and the time it
3255 * gets fixed (in e1000_watchdog), the actual LAA is in one
3256 * of the RARs and no incoming packets directed to this port
3257 * are dropped. Eventually the LAA will be in RAR[0] and
ad68076e
BA		 3258 * RAR[14]
3259 */
bc7f75fa
AK		 3260 e1000e_rar_set(&adapter->hw,
3261 adapter->hw.mac.addr,
3262 adapter->hw.mac.rar_entry_count - 1);
3263 }
3264
3265 return 0;
3266}
3267
a8f88ff5
JB		 3268/**
3269 * e1000e_update_phy_task - work thread to update phy
3270 * @work: pointer to our work struct
3271 *
3272 * this worker thread exists because we must acquire a
3273 * semaphore to read the phy, which we could msleep while
3274 * waiting for it, and we can't msleep in a timer.
3275 **/
3276static void e1000e_update_phy_task(struct work_struct *work)
3277{
3278 struct e1000_adapter *adapter = container_of(work,
3279 struct e1000_adapter, update_phy_task);
3280 e1000_get_phy_info(&adapter->hw);
3281}
3282
ad68076e
BA		 3283/*
3284 * Need to wait a few seconds after link up to get diagnostic information from
3285 * the phy
3286 */
bc7f75fa
AK		 3287static void e1000_update_phy_info(unsigned long data)
3288{
3289 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
a8f88ff5 3290 schedule_work(&adapter->update_phy_task);
bc7f75fa
AK		 3291}
3292
3293/**
3294 * e1000e_update_stats - Update the board statistics counters
3295 * @adapter: board private structure
3296 **/
3297void e1000e_update_stats(struct e1000_adapter *adapter)
3298{
7274c20f 3299 struct net_device *netdev = adapter->netdev;
bc7f75fa
AK		 3300 struct e1000_hw *hw = &adapter->hw;
3301 struct pci_dev *pdev = adapter->pdev;
a4f58f54 3302 u16 phy_data;
bc7f75fa
AK		 3303
3304 /*
3305 * Prevent stats update while adapter is being reset, or if the pci
3306 * connection is down.
3307 */
3308 if (adapter->link_speed == 0)
3309 return;
3310 if (pci_channel_offline(pdev))
3311 return;
3312
bc7f75fa
AK		 3313 adapter->stats.crcerrs += er32(CRCERRS);
3314 adapter->stats.gprc += er32(GPRC);
7c25769f
BA		 3315 adapter->stats.gorc += er32(GORCL);
3316 er32(GORCH); /* Clear gorc */
bc7f75fa
AK		 3317 adapter->stats.bprc += er32(BPRC);
3318 adapter->stats.mprc += er32(MPRC);
3319 adapter->stats.roc += er32(ROC);
3320
bc7f75fa 3321 adapter->stats.mpc += er32(MPC);
a4f58f54
BA		 3322 if ((hw->phy.type == e1000_phy_82578) ||
3323 (hw->phy.type == e1000_phy_82577)) {
3324 e1e_rphy(hw, HV_SCC_UPPER, &phy_data);
29477e24
BA		 3325 if (!e1e_rphy(hw, HV_SCC_LOWER, &phy_data))
3326 adapter->stats.scc += phy_data;
a4f58f54
BA		 3327
3328 e1e_rphy(hw, HV_ECOL_UPPER, &phy_data);
29477e24
BA		 3329 if (!e1e_rphy(hw, HV_ECOL_LOWER, &phy_data))
3330 adapter->stats.ecol += phy_data;
a4f58f54
BA		 3331
3332 e1e_rphy(hw, HV_MCC_UPPER, &phy_data);
29477e24
BA		 3333 if (!e1e_rphy(hw, HV_MCC_LOWER, &phy_data))
3334 adapter->stats.mcc += phy_data;
a4f58f54
BA		 3335
3336 e1e_rphy(hw, HV_LATECOL_UPPER, &phy_data);
29477e24
BA		 3337 if (!e1e_rphy(hw, HV_LATECOL_LOWER, &phy_data))
3338 adapter->stats.latecol += phy_data;
a4f58f54
BA		 3339
3340 e1e_rphy(hw, HV_DC_UPPER, &phy_data);
29477e24
BA		 3341 if (!e1e_rphy(hw, HV_DC_LOWER, &phy_data))
3342 adapter->stats.dc += phy_data;
a4f58f54
BA		 3343 } else {
3344 adapter->stats.scc += er32(SCC);
3345 adapter->stats.ecol += er32(ECOL);
3346 adapter->stats.mcc += er32(MCC);
3347 adapter->stats.latecol += er32(LATECOL);
3348 adapter->stats.dc += er32(DC);
3349 }
bc7f75fa
AK		 3350 adapter->stats.xonrxc += er32(XONRXC);
3351 adapter->stats.xontxc += er32(XONTXC);
3352 adapter->stats.xoffrxc += er32(XOFFRXC);
3353 adapter->stats.xofftxc += er32(XOFFTXC);
bc7f75fa 3354 adapter->stats.gptc += er32(GPTC);
7c25769f
BA		 3355 adapter->stats.gotc += er32(GOTCL);
3356 er32(GOTCH); /* Clear gotc */
bc7f75fa
AK		 3357 adapter->stats.rnbc += er32(RNBC);
3358 adapter->stats.ruc += er32(RUC);
bc7f75fa
AK		 3359
3360 adapter->stats.mptc += er32(MPTC);
3361 adapter->stats.bptc += er32(BPTC);
3362
3363 /* used for adaptive IFS */
3364
3365 hw->mac.tx_packet_delta = er32(TPT);
3366 adapter->stats.tpt += hw->mac.tx_packet_delta;
a4f58f54
BA		 3367 if ((hw->phy.type == e1000_phy_82578) ||
3368 (hw->phy.type == e1000_phy_82577)) {
3369 e1e_rphy(hw, HV_COLC_UPPER, &phy_data);
29477e24
BA		 3370 if (!e1e_rphy(hw, HV_COLC_LOWER, &phy_data))
3371 hw->mac.collision_delta = phy_data;
a4f58f54
BA		 3372 } else {
3373 hw->mac.collision_delta = er32(COLC);
3374 }
bc7f75fa
AK		 3375 adapter->stats.colc += hw->mac.collision_delta;
3376
3377 adapter->stats.algnerrc += er32(ALGNERRC);
3378 adapter->stats.rxerrc += er32(RXERRC);
a4f58f54
BA		 3379 if ((hw->phy.type == e1000_phy_82578) ||
3380 (hw->phy.type == e1000_phy_82577)) {
3381 e1e_rphy(hw, HV_TNCRS_UPPER, &phy_data);
29477e24
BA		 3382 if (!e1e_rphy(hw, HV_TNCRS_LOWER, &phy_data))
3383 adapter->stats.tncrs += phy_data;
a4f58f54
BA		 3384 } else {
3385 if ((hw->mac.type != e1000_82574) &&
3386 (hw->mac.type != e1000_82583))
3387 adapter->stats.tncrs += er32(TNCRS);
3388 }
bc7f75fa
AK		 3389 adapter->stats.cexterr += er32(CEXTERR);
3390 adapter->stats.tsctc += er32(TSCTC);
3391 adapter->stats.tsctfc += er32(TSCTFC);
3392
bc7f75fa 3393 /* Fill out the OS statistics structure */
7274c20f
AK		 3394 netdev->stats.multicast = adapter->stats.mprc;
3395 netdev->stats.collisions = adapter->stats.colc;
bc7f75fa
AK		 3396
3397 /* Rx Errors */
3398
ad68076e
BA		 3399 /*
3400 * RLEC on some newer hardware can be incorrect so build
3401 * our own version based on RUC and ROC
3402 */
7274c20f 3403 netdev->stats.rx_errors = adapter->stats.rxerrc +
bc7f75fa
AK		 3404 adapter->stats.crcerrs + adapter->stats.algnerrc +
3405 adapter->stats.ruc + adapter->stats.roc +
3406 adapter->stats.cexterr;
7274c20f 3407 netdev->stats.rx_length_errors = adapter->stats.ruc +
bc7f75fa 3408 adapter->stats.roc;
7274c20f
AK		 3409 netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
3410 netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
3411 netdev->stats.rx_missed_errors = adapter->stats.mpc;
bc7f75fa
AK		 3412
3413 /* Tx Errors */
7274c20f 3414 netdev->stats.tx_errors = adapter->stats.ecol +
bc7f75fa 3415 adapter->stats.latecol;
7274c20f
AK		 3416 netdev->stats.tx_aborted_errors = adapter->stats.ecol;
3417 netdev->stats.tx_window_errors = adapter->stats.latecol;
3418 netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
bc7f75fa
AK		 3419
3420 /* Tx Dropped needs to be maintained elsewhere */
3421
bc7f75fa
AK		 3422 /* Management Stats */
3423 adapter->stats.mgptc += er32(MGTPTC);
3424 adapter->stats.mgprc += er32(MGTPRC);
3425 adapter->stats.mgpdc += er32(MGTPDC);
bc7f75fa
AK		 3426}
3427
7c25769f
BA		 3428/**
3429 * e1000_phy_read_status - Update the PHY register status snapshot
3430 * @adapter: board private structure
3431 **/
3432static void e1000_phy_read_status(struct e1000_adapter *adapter)
3433{
3434 struct e1000_hw *hw = &adapter->hw;
3435 struct e1000_phy_regs *phy = &adapter->phy_regs;
3436 int ret_val;
7c25769f
BA		 3437
3438 if ((er32(STATUS) & E1000_STATUS_LU) &&
3439 (adapter->hw.phy.media_type == e1000_media_type_copper)) {
3440 ret_val = e1e_rphy(hw, PHY_CONTROL, &phy->bmcr);
3441 ret_val |= e1e_rphy(hw, PHY_STATUS, &phy->bmsr);
3442 ret_val |= e1e_rphy(hw, PHY_AUTONEG_ADV, &phy->advertise);
3443 ret_val |= e1e_rphy(hw, PHY_LP_ABILITY, &phy->lpa);
3444 ret_val |= e1e_rphy(hw, PHY_AUTONEG_EXP, &phy->expansion);
3445 ret_val |= e1e_rphy(hw, PHY_1000T_CTRL, &phy->ctrl1000);
3446 ret_val |= e1e_rphy(hw, PHY_1000T_STATUS, &phy->stat1000);
3447 ret_val |= e1e_rphy(hw, PHY_EXT_STATUS, &phy->estatus);
3448 if (ret_val)
44defeb3 3449 e_warn("Error reading PHY register\n");
7c25769f
BA		 3450 } else {
3451 /*
3452 * Do not read PHY registers if link is not up
3453 * Set values to typical power-on defaults
3454 */
3455 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
3456 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
3457 BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
3458 BMSR_ERCAP);
3459 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
3460 ADVERTISE_ALL | ADVERTISE_CSMA);
3461 phy->lpa = 0;
3462 phy->expansion = EXPANSION_ENABLENPAGE;
3463 phy->ctrl1000 = ADVERTISE_1000FULL;
3464 phy->stat1000 = 0;
3465 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
3466 }
7c25769f
BA		 3467}
3468
bc7f75fa
AK		 3469static void e1000_print_link_info(struct e1000_adapter *adapter)
3470{
bc7f75fa
AK		 3471 struct e1000_hw *hw = &adapter->hw;
3472 u32 ctrl = er32(CTRL);
3473
8f12fe86
BA		 3474 /* Link status message must follow this format for user tools */
3475 printk(KERN_INFO "e1000e: %s NIC Link is Up %d Mbps %s, "
3476 "Flow Control: %s\n",
3477 adapter->netdev->name,
44defeb3
JK		 3478 adapter->link_speed,
3479 (adapter->link_duplex == FULL_DUPLEX) ?
3480 "Full Duplex" : "Half Duplex",
3481 ((ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE)) ?
3482 "RX/TX" :
3483 ((ctrl & E1000_CTRL_RFCE) ? "RX" :
3484 ((ctrl & E1000_CTRL_TFCE) ? "TX" : "None" )));
bc7f75fa
AK		 3485}
3486
b405e8df 3487bool e1000e_has_link(struct e1000_adapter *adapter)
318a94d6
JK		 3488{
3489 struct e1000_hw *hw = &adapter->hw;
3490 bool link_active = 0;
3491 s32 ret_val = 0;
3492
3493 /*
3494 * get_link_status is set on LSC (link status) interrupt or
3495 * Rx sequence error interrupt. get_link_status will stay
3496 * false until the check_for_link establishes link
3497 * for copper adapters ONLY
3498 */
3499 switch (hw->phy.media_type) {
3500 case e1000_media_type_copper:
3501 if (hw->mac.get_link_status) {
3502 ret_val = hw->mac.ops.check_for_link(hw);
3503 link_active = !hw->mac.get_link_status;
3504 } else {
3505 link_active = 1;
3506 }
3507 break;
3508 case e1000_media_type_fiber:
3509 ret_val = hw->mac.ops.check_for_link(hw);
3510 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
3511 break;
3512 case e1000_media_type_internal_serdes:
3513 ret_val = hw->mac.ops.check_for_link(hw);
3514 link_active = adapter->hw.mac.serdes_has_link;
3515 break;
3516 default:
3517 case e1000_media_type_unknown:
3518 break;
3519 }
3520
3521 if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
3522 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
3523 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
44defeb3 3524 e_info("Gigabit has been disabled, downgrading speed\n");
318a94d6
JK		 3525 }
3526
3527 return link_active;
3528}
3529
3530static void e1000e_enable_receives(struct e1000_adapter *adapter)
3531{
3532 /* make sure the receive unit is started */
3533 if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
3534 (adapter->flags & FLAG_RX_RESTART_NOW)) {
3535 struct e1000_hw *hw = &adapter->hw;
3536 u32 rctl = er32(RCTL);
3537 ew32(RCTL, rctl | E1000_RCTL_EN);
3538 adapter->flags &= ~FLAG_RX_RESTART_NOW;
3539 }
3540}
3541
bc7f75fa
AK		 3542/**
3543 * e1000_watchdog - Timer Call-back
3544 * @data: pointer to adapter cast into an unsigned long
3545 **/
3546static void e1000_watchdog(unsigned long data)
3547{
3548 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
3549
3550 /* Do the rest outside of interrupt context */
3551 schedule_work(&adapter->watchdog_task);
3552
3553 /* TODO: make this use queue_delayed_work() */
3554}
3555
3556static void e1000_watchdog_task(struct work_struct *work)
3557{
3558 struct e1000_adapter *adapter = container_of(work,
3559 struct e1000_adapter, watchdog_task);
bc7f75fa
AK		 3560 struct net_device *netdev = adapter->netdev;
3561 struct e1000_mac_info *mac = &adapter->hw.mac;
75eb0fad 3562 struct e1000_phy_info *phy = &adapter->hw.phy;
bc7f75fa
AK		 3563 struct e1000_ring *tx_ring = adapter->tx_ring;
3564 struct e1000_hw *hw = &adapter->hw;
3565 u32 link, tctl;
bc7f75fa
AK		 3566 int tx_pending = 0;
3567
b405e8df 3568 link = e1000e_has_link(adapter);
318a94d6 3569 if ((netif_carrier_ok(netdev)) && link) {
23606cf5
RW		 3570 /* Cancel scheduled suspend requests. */
3571 pm_runtime_resume(netdev->dev.parent);
3572
318a94d6 3573 e1000e_enable_receives(adapter);
bc7f75fa 3574 goto link_up;
bc7f75fa
AK		 3575 }
3576
3577 if ((e1000e_enable_tx_pkt_filtering(hw)) &&
3578 (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
3579 e1000_update_mng_vlan(adapter);
3580
bc7f75fa
AK		 3581 if (link) {
3582 if (!netif_carrier_ok(netdev)) {
3583 bool txb2b = 1;
23606cf5
RW		 3584
3585 /* Cancel scheduled suspend requests. */
3586 pm_runtime_resume(netdev->dev.parent);
3587
318a94d6 3588 /* update snapshot of PHY registers on LSC */
7c25769f 3589 e1000_phy_read_status(adapter);
bc7f75fa
AK		 3590 mac->ops.get_link_up_info(&adapter->hw,
3591 &adapter->link_speed,
3592 &adapter->link_duplex);
3593 e1000_print_link_info(adapter);
f4187b56
BA		 3594 /*
3595 * On supported PHYs, check for duplex mismatch only
3596 * if link has autonegotiated at 10/100 half
3597 */
3598 if ((hw->phy.type == e1000_phy_igp_3 ||
3599 hw->phy.type == e1000_phy_bm) &&
3600 (hw->mac.autoneg == true) &&
3601 (adapter->link_speed == SPEED_10 ||
3602 adapter->link_speed == SPEED_100) &&
3603 (adapter->link_duplex == HALF_DUPLEX)) {
3604 u16 autoneg_exp;
3605
3606 e1e_rphy(hw, PHY_AUTONEG_EXP, &autoneg_exp);
3607
3608 if (!(autoneg_exp & NWAY_ER_LP_NWAY_CAPS))
3609 e_info("Autonegotiated half duplex but"
3610 " link partner cannot autoneg. "
3611 " Try forcing full duplex if "
3612 "link gets many collisions.\n");
3613 }
3614
ad68076e
BA		 3615 /*
3616 * tweak tx_queue_len according to speed/duplex
3617 * and adjust the timeout factor
3618 */
bc7f75fa
AK		 3619 netdev->tx_queue_len = adapter->tx_queue_len;
3620 adapter->tx_timeout_factor = 1;
3621 switch (adapter->link_speed) {
3622 case SPEED_10:
3623 txb2b = 0;
3624 netdev->tx_queue_len = 10;
10f1b492 3625 adapter->tx_timeout_factor = 16;
bc7f75fa
AK		 3626 break;
3627 case SPEED_100:
3628 txb2b = 0;
3629 netdev->tx_queue_len = 100;
4c86e0b9 3630 adapter->tx_timeout_factor = 10;
bc7f75fa
AK		 3631 break;
3632 }
3633
ad68076e
BA		 3634 /*
3635 * workaround: re-program speed mode bit after
3636 * link-up event
3637 */
bc7f75fa
AK		 3638 if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
3639 !txb2b) {
3640 u32 tarc0;
e9ec2c0f 3641 tarc0 = er32(TARC(0));
bc7f75fa 3642 tarc0 &= ~SPEED_MODE_BIT;
e9ec2c0f 3643 ew32(TARC(0), tarc0);
bc7f75fa
AK		 3644 }
3645
ad68076e
BA		 3646 /*
3647 * disable TSO for pcie and 10/100 speeds, to avoid
3648 * some hardware issues
3649 */
bc7f75fa
AK		 3650 if (!(adapter->flags & FLAG_TSO_FORCE)) {
3651 switch (adapter->link_speed) {
3652 case SPEED_10:
3653 case SPEED_100:
44defeb3 3654 e_info("10/100 speed: disabling TSO\n");
bc7f75fa
AK		 3655 netdev->features &= ~NETIF_F_TSO;
3656 netdev->features &= ~NETIF_F_TSO6;
3657 break;
3658 case SPEED_1000:
3659 netdev->features |= NETIF_F_TSO;
3660 netdev->features |= NETIF_F_TSO6;
3661 break;
3662 default:
3663 /* oops */
3664 break;
3665 }
3666 }
3667
ad68076e
BA		 3668 /*
3669 * enable transmits in the hardware, need to do this
3670 * after setting TARC(0)
3671 */
bc7f75fa
AK		 3672 tctl = er32(TCTL);
3673 tctl |= E1000_TCTL_EN;
3674 ew32(TCTL, tctl);
3675
75eb0fad
BA		 3676 /*
3677 * Perform any post-link-up configuration before
3678 * reporting link up.
3679 */
3680 if (phy->ops.cfg_on_link_up)
3681 phy->ops.cfg_on_link_up(hw);
3682
bc7f75fa 3683 netif_carrier_on(netdev);
bc7f75fa
AK		 3684
3685 if (!test_bit(__E1000_DOWN, &adapter->state))
3686 mod_timer(&adapter->phy_info_timer,
3687 round_jiffies(jiffies + 2 * HZ));
bc7f75fa
AK		 3688 }
3689 } else {
3690 if (netif_carrier_ok(netdev)) {
3691 adapter->link_speed = 0;
3692 adapter->link_duplex = 0;
8f12fe86
BA		 3693 /* Link status message must follow this format */
3694 printk(KERN_INFO "e1000e: %s NIC Link is Down\n",
3695 adapter->netdev->name);
bc7f75fa 3696 netif_carrier_off(netdev);
bc7f75fa
AK		 3697 if (!test_bit(__E1000_DOWN, &adapter->state))
3698 mod_timer(&adapter->phy_info_timer,
3699 round_jiffies(jiffies + 2 * HZ));
3700
3701 if (adapter->flags & FLAG_RX_NEEDS_RESTART)
3702 schedule_work(&adapter->reset_task);
23606cf5
RW		 3703 else
3704 pm_schedule_suspend(netdev->dev.parent,
3705 LINK_TIMEOUT);
bc7f75fa
AK		 3706 }
3707 }
3708
3709link_up:
3710 e1000e_update_stats(adapter);
3711
3712 mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
3713 adapter->tpt_old = adapter->stats.tpt;
3714 mac->collision_delta = adapter->stats.colc - adapter->colc_old;
3715 adapter->colc_old = adapter->stats.colc;
3716
7c25769f
BA		 3717 adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
3718 adapter->gorc_old = adapter->stats.gorc;
3719 adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
3720 adapter->gotc_old = adapter->stats.gotc;
bc7f75fa
AK		 3721
3722 e1000e_update_adaptive(&adapter->hw);
3723
3724 if (!netif_carrier_ok(netdev)) {
3725 tx_pending = (e1000_desc_unused(tx_ring) + 1 <
3726 tx_ring->count);
3727 if (tx_pending) {
ad68076e
BA		 3728 /*
3729 * We've lost link, so the controller stops DMA,
bc7f75fa
AK		 3730 * but we've got queued Tx work that's never going
3731 * to get done, so reset controller to flush Tx.
ad68076e
BA		 3732 * (Do the reset outside of interrupt context).
3733 */
bc7f75fa
AK		 3734 adapter->tx_timeout_count++;
3735 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 3736 /* return immediately since reset is imminent */
3737 return;
bc7f75fa
AK		 3738 }
3739 }
3740
ad68076e 3741 /* Cause software interrupt to ensure Rx ring is cleaned */
4662e82b
BA		 3742 if (adapter->msix_entries)
3743 ew32(ICS, adapter->rx_ring->ims_val);
3744 else
3745 ew32(ICS, E1000_ICS_RXDMT0);
bc7f75fa
AK		 3746
3747 /* Force detection of hung controller every watchdog period */
3748 adapter->detect_tx_hung = 1;
3749
ad68076e
BA		 3750 /*
3751 * With 82571 controllers, LAA may be overwritten due to controller
3752 * reset from the other port. Set the appropriate LAA in RAR[0]
3753 */
bc7f75fa
AK		 3754 if (e1000e_get_laa_state_82571(hw))
3755 e1000e_rar_set(hw, adapter->hw.mac.addr, 0);
3756
3757 /* Reset the timer */
3758 if (!test_bit(__E1000_DOWN, &adapter->state))
3759 mod_timer(&adapter->watchdog_timer,
3760 round_jiffies(jiffies + 2 * HZ));
3761}
3762
3763#define E1000_TX_FLAGS_CSUM 0x00000001
3764#define E1000_TX_FLAGS_VLAN 0x00000002
3765#define E1000_TX_FLAGS_TSO 0x00000004
3766#define E1000_TX_FLAGS_IPV4 0x00000008
3767#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
3768#define E1000_TX_FLAGS_VLAN_SHIFT 16
3769
3770static int e1000_tso(struct e1000_adapter *adapter,
3771 struct sk_buff *skb)
3772{
3773 struct e1000_ring *tx_ring = adapter->tx_ring;
3774 struct e1000_context_desc *context_desc;
3775 struct e1000_buffer *buffer_info;
3776 unsigned int i;
3777 u32 cmd_length = 0;
3778 u16 ipcse = 0, tucse, mss;
3779 u8 ipcss, ipcso, tucss, tucso, hdr_len;
3780 int err;
3781
3d5e33c9
BA		 3782 if (!skb_is_gso(skb))
3783 return 0;
bc7f75fa 3784
3d5e33c9
BA		 3785 if (skb_header_cloned(skb)) {
3786 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
3787 if (err)
3788 return err;
bc7f75fa
AK		 3789 }
3790
3d5e33c9
BA		 3791 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
3792 mss = skb_shinfo(skb)->gso_size;
3793 if (skb->protocol == htons(ETH_P_IP)) {
3794 struct iphdr *iph = ip_hdr(skb);
3795 iph->tot_len = 0;
3796 iph->check = 0;
3797 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
3798 0, IPPROTO_TCP, 0);
3799 cmd_length = E1000_TXD_CMD_IP;
3800 ipcse = skb_transport_offset(skb) - 1;
8e1e8a47 3801 } else if (skb_is_gso_v6(skb)) {
3d5e33c9
BA		 3802 ipv6_hdr(skb)->payload_len = 0;
3803 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
3804 &ipv6_hdr(skb)->daddr,
3805 0, IPPROTO_TCP, 0);
3806 ipcse = 0;
3807 }
3808 ipcss = skb_network_offset(skb);
3809 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
3810 tucss = skb_transport_offset(skb);
3811 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
3812 tucse = 0;
3813
3814 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
3815 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
3816
3817 i = tx_ring->next_to_use;
3818 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3819 buffer_info = &tx_ring->buffer_info[i];
3820
3821 context_desc->lower_setup.ip_fields.ipcss = ipcss;
3822 context_desc->lower_setup.ip_fields.ipcso = ipcso;
3823 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
3824 context_desc->upper_setup.tcp_fields.tucss = tucss;
3825 context_desc->upper_setup.tcp_fields.tucso = tucso;
3826 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
3827 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
3828 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
3829 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
3830
3831 buffer_info->time_stamp = jiffies;
3832 buffer_info->next_to_watch = i;
3833
3834 i++;
3835 if (i == tx_ring->count)
3836 i = 0;
3837 tx_ring->next_to_use = i;
3838
3839 return 1;
bc7f75fa
AK		 3840}
3841
3842static bool e1000_tx_csum(struct e1000_adapter *adapter, struct sk_buff *skb)
3843{
3844 struct e1000_ring *tx_ring = adapter->tx_ring;
3845 struct e1000_context_desc *context_desc;
3846 struct e1000_buffer *buffer_info;
3847 unsigned int i;
3848 u8 css;
af807c82 3849 u32 cmd_len = E1000_TXD_CMD_DEXT;
5f66f208 3850 __be16 protocol;
bc7f75fa 3851
af807c82
DG		 3852 if (skb->ip_summed != CHECKSUM_PARTIAL)
3853 return 0;
bc7f75fa 3854
5f66f208
AJ		 3855 if (skb->protocol == cpu_to_be16(ETH_P_8021Q))
3856 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
3857 else
3858 protocol = skb->protocol;
3859
3f518390 3860 switch (protocol) {
09640e63 3861 case cpu_to_be16(ETH_P_IP):
af807c82
DG		 3862 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
3863 cmd_len |= E1000_TXD_CMD_TCP;
3864 break;
09640e63 3865 case cpu_to_be16(ETH_P_IPV6):
af807c82
DG		 3866 /* XXX not handling all IPV6 headers */
3867 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
3868 cmd_len |= E1000_TXD_CMD_TCP;
3869 break;
3870 default:
3871 if (unlikely(net_ratelimit()))
5f66f208
AJ		 3872 e_warn("checksum_partial proto=%x!\n",
3873 be16_to_cpu(protocol));
af807c82 3874 break;
bc7f75fa
AK		 3875 }
3876
af807c82
DG		 3877 css = skb_transport_offset(skb);
3878
3879 i = tx_ring->next_to_use;
3880 buffer_info = &tx_ring->buffer_info[i];
3881 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
3882
3883 context_desc->lower_setup.ip_config = 0;
3884 context_desc->upper_setup.tcp_fields.tucss = css;
3885 context_desc->upper_setup.tcp_fields.tucso =
3886 css + skb->csum_offset;
3887 context_desc->upper_setup.tcp_fields.tucse = 0;
3888 context_desc->tcp_seg_setup.data = 0;
3889 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
3890
3891 buffer_info->time_stamp = jiffies;
3892 buffer_info->next_to_watch = i;
3893
3894 i++;
3895 if (i == tx_ring->count)
3896 i = 0;
3897 tx_ring->next_to_use = i;
3898
3899 return 1;
bc7f75fa
AK		 3900}
3901
3902#define E1000_MAX_PER_TXD 8192
3903#define E1000_MAX_TXD_PWR 12
3904
3905static int e1000_tx_map(struct e1000_adapter *adapter,
3906 struct sk_buff *skb, unsigned int first,
3907 unsigned int max_per_txd, unsigned int nr_frags,
3908 unsigned int mss)
3909{
3910 struct e1000_ring *tx_ring = adapter->tx_ring;
03b1320d 3911 struct pci_dev *pdev = adapter->pdev;
1b7719c4 3912 struct e1000_buffer *buffer_info;
8ddc951c 3913 unsigned int len = skb_headlen(skb);
03b1320d 3914 unsigned int offset = 0, size, count = 0, i;
bc7f75fa
AK		 3915 unsigned int f;
3916
3917 i = tx_ring->next_to_use;
3918
3919 while (len) {
1b7719c4 3920 buffer_info = &tx_ring->buffer_info[i];
bc7f75fa
AK		 3921 size = min(len, max_per_txd);
3922
bc7f75fa 3923 buffer_info->length = size;
bc7f75fa 3924 buffer_info->time_stamp = jiffies;
bc7f75fa 3925 buffer_info->next_to_watch = i;
03b1320d
AD		 3926 buffer_info->dma = pci_map_single(pdev, skb->data + offset,
3927 size, PCI_DMA_TODEVICE);
3928 buffer_info->mapped_as_page = false;
3929 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3930 goto dma_error;
bc7f75fa
AK		 3931
3932 len -= size;
3933 offset += size;
03b1320d 3934 count++;
1b7719c4
AD		 3935
3936 if (len) {
3937 i++;
3938 if (i == tx_ring->count)
3939 i = 0;
3940 }
bc7f75fa
AK		 3941 }
3942
3943 for (f = 0; f < nr_frags; f++) {
3944 struct skb_frag_struct *frag;
3945
3946 frag = &skb_shinfo(skb)->frags[f];
3947 len = frag->size;
03b1320d 3948 offset = frag->page_offset;
bc7f75fa
AK		 3949
3950 while (len) {
1b7719c4
AD		 3951 i++;
3952 if (i == tx_ring->count)
3953 i = 0;
3954
bc7f75fa
AK		 3955 buffer_info = &tx_ring->buffer_info[i];
3956 size = min(len, max_per_txd);
bc7f75fa
AK		 3957
3958 buffer_info->length = size;
3959 buffer_info->time_stamp = jiffies;
bc7f75fa 3960 buffer_info->next_to_watch = i;
03b1320d
AD		 3961 buffer_info->dma = pci_map_page(pdev, frag->page,
3962 offset, size,
3963 PCI_DMA_TODEVICE);
3964 buffer_info->mapped_as_page = true;
3965 if (pci_dma_mapping_error(pdev, buffer_info->dma))
3966 goto dma_error;
bc7f75fa
AK		 3967
3968 len -= size;
3969 offset += size;
3970 count++;
bc7f75fa
AK		 3971 }
3972 }
3973
bc7f75fa
AK		 3974 tx_ring->buffer_info[i].skb = skb;
3975 tx_ring->buffer_info[first].next_to_watch = i;
3976
3977 return count;
03b1320d
AD		 3978
3979dma_error:
3980 dev_err(&pdev->dev, "TX DMA map failed\n");
3981 buffer_info->dma = 0;
c1fa347f 3982 if (count)
03b1320d 3983 count--;
c1fa347f
RK		 3984
3985 while (count--) {
3986 if (i==0)
03b1320d 3987 i += tx_ring->count;
c1fa347f 3988 i--;
03b1320d
AD		 3989 buffer_info = &tx_ring->buffer_info[i];
3990 e1000_put_txbuf(adapter, buffer_info);;
3991 }
3992
3993 return 0;
bc7f75fa
AK		 3994}
3995
3996static void e1000_tx_queue(struct e1000_adapter *adapter,
3997 int tx_flags, int count)
3998{
3999 struct e1000_ring *tx_ring = adapter->tx_ring;
4000 struct e1000_tx_desc *tx_desc = NULL;
4001 struct e1000_buffer *buffer_info;
4002 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
4003 unsigned int i;
4004
4005 if (tx_flags & E1000_TX_FLAGS_TSO) {
4006 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
4007 E1000_TXD_CMD_TSE;
4008 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4009
4010 if (tx_flags & E1000_TX_FLAGS_IPV4)
4011 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
4012 }
4013
4014 if (tx_flags & E1000_TX_FLAGS_CSUM) {
4015 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
4016 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
4017 }
4018
4019 if (tx_flags & E1000_TX_FLAGS_VLAN) {
4020 txd_lower |= E1000_TXD_CMD_VLE;
4021 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
4022 }
4023
4024 i = tx_ring->next_to_use;
4025
4026 while (count--) {
4027 buffer_info = &tx_ring->buffer_info[i];
4028 tx_desc = E1000_TX_DESC(*tx_ring, i);
4029 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4030 tx_desc->lower.data =
4031 cpu_to_le32(txd_lower | buffer_info->length);
4032 tx_desc->upper.data = cpu_to_le32(txd_upper);
4033
4034 i++;
4035 if (i == tx_ring->count)
4036 i = 0;
4037 }
4038
4039 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
4040
ad68076e
BA		 4041 /*
4042 * Force memory writes to complete before letting h/w
bc7f75fa
AK		 4043 * know there are new descriptors to fetch. (Only
4044 * applicable for weak-ordered memory model archs,
ad68076e
BA		 4045 * such as IA-64).
4046 */
bc7f75fa
AK		 4047 wmb();
4048
4049 tx_ring->next_to_use = i;
4050 writel(i, adapter->hw.hw_addr + tx_ring->tail);
ad68076e
BA		 4051 /*
4052 * we need this if more than one processor can write to our tail
4053 * at a time, it synchronizes IO on IA64/Altix systems
4054 */
bc7f75fa
AK		 4055 mmiowb();
4056}
4057
4058#define MINIMUM_DHCP_PACKET_SIZE 282
4059static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
4060 struct sk_buff *skb)
4061{
4062 struct e1000_hw *hw = &adapter->hw;
4063 u16 length, offset;
4064
4065 if (vlan_tx_tag_present(skb)) {
8e95a202
JP		 4066 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
4067 (adapter->hw.mng_cookie.status &
bc7f75fa
AK		 4068 E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
4069 return 0;
4070 }
4071
4072 if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
4073 return 0;
4074
4075 if (((struct ethhdr *) skb->data)->h_proto != htons(ETH_P_IP))
4076 return 0;
4077
4078 {
4079 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data+14);
4080 struct udphdr *udp;
4081
4082 if (ip->protocol != IPPROTO_UDP)
4083 return 0;
4084
4085 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
4086 if (ntohs(udp->dest) != 67)
4087 return 0;
4088
4089 offset = (u8 *)udp + 8 - skb->data;
4090 length = skb->len - offset;
4091 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
4092 }
4093
4094 return 0;
4095}
4096
4097static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
4098{
4099 struct e1000_adapter *adapter = netdev_priv(netdev);
4100
4101 netif_stop_queue(netdev);
ad68076e
BA		 4102 /*
4103 * Herbert's original patch had:
bc7f75fa 4104 * smp_mb__after_netif_stop_queue();
ad68076e
BA		 4105 * but since that doesn't exist yet, just open code it.
4106 */
bc7f75fa
AK		 4107 smp_mb();
4108
ad68076e
BA		 4109 /*
4110 * We need to check again in a case another CPU has just
4111 * made room available.
4112 */
bc7f75fa
AK		 4113 if (e1000_desc_unused(adapter->tx_ring) < size)
4114 return -EBUSY;
4115
4116 /* A reprieve! */
4117 netif_start_queue(netdev);
4118 ++adapter->restart_queue;
4119 return 0;
4120}
4121
4122static int e1000_maybe_stop_tx(struct net_device *netdev, int size)
4123{
4124 struct e1000_adapter *adapter = netdev_priv(netdev);
4125
4126 if (e1000_desc_unused(adapter->tx_ring) >= size)
4127 return 0;
4128 return __e1000_maybe_stop_tx(netdev, size);
4129}
4130
4131#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3b29a56d
SH		 4132static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
4133 struct net_device *netdev)
bc7f75fa
AK		 4134{
4135 struct e1000_adapter *adapter = netdev_priv(netdev);
4136 struct e1000_ring *tx_ring = adapter->tx_ring;
4137 unsigned int first;
4138 unsigned int max_per_txd = E1000_MAX_PER_TXD;
4139 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
4140 unsigned int tx_flags = 0;
4e6c709c 4141 unsigned int len = skb->len - skb->data_len;
4e6c709c
AK		 4142 unsigned int nr_frags;
4143 unsigned int mss;
bc7f75fa
AK		 4144 int count = 0;
4145 int tso;
4146 unsigned int f;
bc7f75fa
AK		 4147
4148 if (test_bit(__E1000_DOWN, &adapter->state)) {
4149 dev_kfree_skb_any(skb);
4150 return NETDEV_TX_OK;
4151 }
4152
4153 if (skb->len <= 0) {
4154 dev_kfree_skb_any(skb);
4155 return NETDEV_TX_OK;
4156 }
4157
4158 mss = skb_shinfo(skb)->gso_size;
ad68076e
BA		 4159 /*
4160 * The controller does a simple calculation to
bc7f75fa
AK		 4161 * make sure there is enough room in the FIFO before
4162 * initiating the DMA for each buffer. The calc is:
4163 * 4 = ceil(buffer len/mss). To make sure we don't
4164 * overrun the FIFO, adjust the max buffer len if mss
ad68076e
BA		 4165 * drops.
4166 */
bc7f75fa
AK		 4167 if (mss) {
4168 u8 hdr_len;
4169 max_per_txd = min(mss << 2, max_per_txd);
4170 max_txd_pwr = fls(max_per_txd) - 1;
4171
ad68076e
BA		 4172 /*
4173 * TSO Workaround for 82571/2/3 Controllers -- if skb->data
4174 * points to just header, pull a few bytes of payload from
4175 * frags into skb->data
4176 */
bc7f75fa 4177 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
ad68076e
BA		 4178 /*
4179 * we do this workaround for ES2LAN, but it is un-necessary,
4180 * avoiding it could save a lot of cycles
4181 */
4e6c709c 4182 if (skb->data_len && (hdr_len == len)) {
bc7f75fa
AK		 4183 unsigned int pull_size;
4184
4185 pull_size = min((unsigned int)4, skb->data_len);
4186 if (!__pskb_pull_tail(skb, pull_size)) {
44defeb3 4187 e_err("__pskb_pull_tail failed.\n");
bc7f75fa
AK		 4188 dev_kfree_skb_any(skb);
4189 return NETDEV_TX_OK;
4190 }
4191 len = skb->len - skb->data_len;
4192 }
4193 }
4194
4195 /* reserve a descriptor for the offload context */
4196 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
4197 count++;
4198 count++;
4199
4200 count += TXD_USE_COUNT(len, max_txd_pwr);
4201
4202 nr_frags = skb_shinfo(skb)->nr_frags;
4203 for (f = 0; f < nr_frags; f++)
4204 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
4205 max_txd_pwr);
4206
4207 if (adapter->hw.mac.tx_pkt_filtering)
4208 e1000_transfer_dhcp_info(adapter, skb);
4209
ad68076e
BA		 4210 /*
4211 * need: count + 2 desc gap to keep tail from touching
4212 * head, otherwise try next time
4213 */
92af3e95 4214 if (e1000_maybe_stop_tx(netdev, count + 2))
bc7f75fa 4215 return NETDEV_TX_BUSY;
bc7f75fa
AK		 4216
4217 if (adapter->vlgrp && vlan_tx_tag_present(skb)) {
4218 tx_flags |= E1000_TX_FLAGS_VLAN;
4219 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
4220 }
4221
4222 first = tx_ring->next_to_use;
4223
4224 tso = e1000_tso(adapter, skb);
4225 if (tso < 0) {
4226 dev_kfree_skb_any(skb);
bc7f75fa
AK		 4227 return NETDEV_TX_OK;
4228 }
4229
4230 if (tso)
4231 tx_flags |= E1000_TX_FLAGS_TSO;
4232 else if (e1000_tx_csum(adapter, skb))
4233 tx_flags |= E1000_TX_FLAGS_CSUM;
4234
ad68076e
BA		 4235 /*
4236 * Old method was to assume IPv4 packet by default if TSO was enabled.
bc7f75fa 4237 * 82571 hardware supports TSO capabilities for IPv6 as well...
ad68076e
BA		 4238 * no longer assume, we must.
4239 */
bc7f75fa
AK		 4240 if (skb->protocol == htons(ETH_P_IP))
4241 tx_flags |= E1000_TX_FLAGS_IPV4;
4242
1b7719c4 4243 /* if count is 0 then mapping error has occured */
bc7f75fa 4244 count = e1000_tx_map(adapter, skb, first, max_per_txd, nr_frags, mss);
1b7719c4
AD		 4245 if (count) {
4246 e1000_tx_queue(adapter, tx_flags, count);
1b7719c4
AD		 4247 /* Make sure there is space in the ring for the next send. */
4248 e1000_maybe_stop_tx(netdev, MAX_SKB_FRAGS + 2);
4249
4250 } else {
bc7f75fa 4251 dev_kfree_skb_any(skb);
1b7719c4
AD		 4252 tx_ring->buffer_info[first].time_stamp = 0;
4253 tx_ring->next_to_use = first;
bc7f75fa
AK		 4254 }
4255
bc7f75fa
AK		 4256 return NETDEV_TX_OK;
4257}
4258
4259/**
4260 * e1000_tx_timeout - Respond to a Tx Hang
4261 * @netdev: network interface device structure
4262 **/
4263static void e1000_tx_timeout(struct net_device *netdev)
4264{
4265 struct e1000_adapter *adapter = netdev_priv(netdev);
4266
4267 /* Do the reset outside of interrupt context */
4268 adapter->tx_timeout_count++;
4269 schedule_work(&adapter->reset_task);
4270}
4271
4272static void e1000_reset_task(struct work_struct *work)
4273{
4274 struct e1000_adapter *adapter;
4275 adapter = container_of(work, struct e1000_adapter, reset_task);
4276
4277 e1000e_reinit_locked(adapter);
4278}
4279
4280/**
4281 * e1000_get_stats - Get System Network Statistics
4282 * @netdev: network interface device structure
4283 *
4284 * Returns the address of the device statistics structure.
4285 * The statistics are actually updated from the timer callback.
4286 **/
4287static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
4288{
bc7f75fa 4289 /* only return the current stats */
7274c20f 4290 return &netdev->stats;
bc7f75fa
AK		 4291}
4292
4293/**
4294 * e1000_change_mtu - Change the Maximum Transfer Unit
4295 * @netdev: network interface device structure
4296 * @new_mtu: new value for maximum frame size
4297 *
4298 * Returns 0 on success, negative on failure
4299 **/
4300static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
4301{
4302 struct e1000_adapter *adapter = netdev_priv(netdev);
4303 int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
4304
2adc55c9
BA		 4305 /* Jumbo frame support */
4306 if ((max_frame > ETH_FRAME_LEN + ETH_FCS_LEN) &&
4307 !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
4308 e_err("Jumbo Frames not supported.\n");
bc7f75fa
AK		 4309 return -EINVAL;
4310 }
4311
2adc55c9
BA		 4312 /* Supported frame sizes */
4313 if ((new_mtu < ETH_ZLEN + ETH_FCS_LEN + VLAN_HLEN) ||
4314 (max_frame > adapter->max_hw_frame_size)) {
4315 e_err("Unsupported MTU setting\n");
bc7f75fa
AK		 4316 return -EINVAL;
4317 }
4318
4319 while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4320 msleep(1);
610c9928 4321 /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
318a94d6 4322 adapter->max_frame_size = max_frame;
610c9928
BA		 4323 e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
4324 netdev->mtu = new_mtu;
bc7f75fa
AK		 4325 if (netif_running(netdev))
4326 e1000e_down(adapter);
4327
ad68076e
BA		 4328 /*
4329 * NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
bc7f75fa
AK		 4330 * means we reserve 2 more, this pushes us to allocate from the next
4331 * larger slab size.
ad68076e 4332 * i.e. RXBUFFER_2048 --> size-4096 slab
97ac8cae
BA		 4333 * However with the new *_jumbo_rx* routines, jumbo receives will use
4334 * fragmented skbs
ad68076e 4335 */
bc7f75fa 4336
9926146b 4337 if (max_frame <= 2048)
bc7f75fa
AK		 4338 adapter->rx_buffer_len = 2048;
4339 else
4340 adapter->rx_buffer_len = 4096;
4341
4342 /* adjust allocation if LPE protects us, and we aren't using SBP */
4343 if ((max_frame == ETH_FRAME_LEN + ETH_FCS_LEN) ||
4344 (max_frame == ETH_FRAME_LEN + VLAN_HLEN + ETH_FCS_LEN))
4345 adapter->rx_buffer_len = ETH_FRAME_LEN + VLAN_HLEN
ad68076e 4346 + ETH_FCS_LEN;
bc7f75fa 4347
bc7f75fa
AK		 4348 if (netif_running(netdev))
4349 e1000e_up(adapter);
4350 else
4351 e1000e_reset(adapter);
4352
4353 clear_bit(__E1000_RESETTING, &adapter->state);
4354
4355 return 0;
4356}
4357
4358static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4359 int cmd)
4360{
4361 struct e1000_adapter *adapter = netdev_priv(netdev);
4362 struct mii_ioctl_data *data = if_mii(ifr);
bc7f75fa 4363
318a94d6 4364 if (adapter->hw.phy.media_type != e1000_media_type_copper)
bc7f75fa
AK		 4365 return -EOPNOTSUPP;
4366
4367 switch (cmd) {
4368 case SIOCGMIIPHY:
4369 data->phy_id = adapter->hw.phy.addr;
4370 break;
4371 case SIOCGMIIREG:
b16a002e
BA		 4372 e1000_phy_read_status(adapter);
4373
7c25769f
BA		 4374 switch (data->reg_num & 0x1F) {
4375 case MII_BMCR:
4376 data->val_out = adapter->phy_regs.bmcr;
4377 break;
4378 case MII_BMSR:
4379 data->val_out = adapter->phy_regs.bmsr;
4380 break;
4381 case MII_PHYSID1:
4382 data->val_out = (adapter->hw.phy.id >> 16);
4383 break;
4384 case MII_PHYSID2:
4385 data->val_out = (adapter->hw.phy.id & 0xFFFF);
4386 break;
4387 case MII_ADVERTISE:
4388 data->val_out = adapter->phy_regs.advertise;
4389 break;
4390 case MII_LPA:
4391 data->val_out = adapter->phy_regs.lpa;
4392 break;
4393 case MII_EXPANSION:
4394 data->val_out = adapter->phy_regs.expansion;
4395 break;
4396 case MII_CTRL1000:
4397 data->val_out = adapter->phy_regs.ctrl1000;
4398 break;
4399 case MII_STAT1000:
4400 data->val_out = adapter->phy_regs.stat1000;
4401 break;
4402 case MII_ESTATUS:
4403 data->val_out = adapter->phy_regs.estatus;
4404 break;
4405 default:
bc7f75fa
AK		 4406 return -EIO;
4407 }
bc7f75fa
AK		 4408 break;
4409 case SIOCSMIIREG:
4410 default:
4411 return -EOPNOTSUPP;
4412 }
4413 return 0;
4414}
4415
4416static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4417{
4418 switch (cmd) {
4419 case SIOCGMIIPHY:
4420 case SIOCGMIIREG:
4421 case SIOCSMIIREG:
4422 return e1000_mii_ioctl(netdev, ifr, cmd);
4423 default:
4424 return -EOPNOTSUPP;
4425 }
4426}
4427
a4f58f54
BA		 4428static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
4429{
4430 struct e1000_hw *hw = &adapter->hw;
4431 u32 i, mac_reg;
4432 u16 phy_reg;
4433 int retval = 0;
4434
4435 /* copy MAC RARs to PHY RARs */
4436 for (i = 0; i < adapter->hw.mac.rar_entry_count; i++) {
4437 mac_reg = er32(RAL(i));
4438 e1e_wphy(hw, BM_RAR_L(i), (u16)(mac_reg & 0xFFFF));
4439 e1e_wphy(hw, BM_RAR_M(i), (u16)((mac_reg >> 16) & 0xFFFF));
4440 mac_reg = er32(RAH(i));
4441 e1e_wphy(hw, BM_RAR_H(i), (u16)(mac_reg & 0xFFFF));
4442 e1e_wphy(hw, BM_RAR_CTRL(i), (u16)((mac_reg >> 16) & 0xFFFF));
4443 }
4444
4445 /* copy MAC MTA to PHY MTA */
4446 for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
4447 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
4448 e1e_wphy(hw, BM_MTA(i), (u16)(mac_reg & 0xFFFF));
4449 e1e_wphy(hw, BM_MTA(i) + 1, (u16)((mac_reg >> 16) & 0xFFFF));
4450 }
4451
4452 /* configure PHY Rx Control register */
4453 e1e_rphy(&adapter->hw, BM_RCTL, &phy_reg);
4454 mac_reg = er32(RCTL);
4455 if (mac_reg & E1000_RCTL_UPE)
4456 phy_reg |= BM_RCTL_UPE;
4457 if (mac_reg & E1000_RCTL_MPE)
4458 phy_reg |= BM_RCTL_MPE;
4459 phy_reg &= ~(BM_RCTL_MO_MASK);
4460 if (mac_reg & E1000_RCTL_MO_3)
4461 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
4462 << BM_RCTL_MO_SHIFT);
4463 if (mac_reg & E1000_RCTL_BAM)
4464 phy_reg |= BM_RCTL_BAM;
4465 if (mac_reg & E1000_RCTL_PMCF)
4466 phy_reg |= BM_RCTL_PMCF;
4467 mac_reg = er32(CTRL);
4468 if (mac_reg & E1000_CTRL_RFCE)
4469 phy_reg |= BM_RCTL_RFCE;
4470 e1e_wphy(&adapter->hw, BM_RCTL, phy_reg);
4471
4472 /* enable PHY wakeup in MAC register */
4473 ew32(WUFC, wufc);
4474 ew32(WUC, E1000_WUC_PHY_WAKE | E1000_WUC_PME_EN);
4475
4476 /* configure and enable PHY wakeup in PHY registers */
4477 e1e_wphy(&adapter->hw, BM_WUFC, wufc);
4478 e1e_wphy(&adapter->hw, BM_WUC, E1000_WUC_PME_EN);
4479
4480 /* activate PHY wakeup */
94d8186a 4481 retval = hw->phy.ops.acquire(hw);
a4f58f54
BA		 4482 if (retval) {
4483 e_err("Could not acquire PHY\n");
4484 return retval;
4485 }
4486 e1000e_write_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4487 (BM_WUC_ENABLE_PAGE << IGP_PAGE_SHIFT));
4488 retval = e1000e_read_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, &phy_reg);
4489 if (retval) {
4490 e_err("Could not read PHY page 769\n");
4491 goto out;
4492 }
4493 phy_reg |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
4494 retval = e1000e_write_phy_reg_mdic(hw, BM_WUC_ENABLE_REG, phy_reg);
4495 if (retval)
4496 e_err("Could not set PHY Host Wakeup bit\n");
4497out:
94d8186a 4498 hw->phy.ops.release(hw);
a4f58f54
BA		 4499
4500 return retval;
4501}
4502
23606cf5
RW		 4503static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake,
4504 bool runtime)
bc7f75fa
AK		 4505{
4506 struct net_device *netdev = pci_get_drvdata(pdev);
4507 struct e1000_adapter *adapter = netdev_priv(netdev);
4508 struct e1000_hw *hw = &adapter->hw;
4509 u32 ctrl, ctrl_ext, rctl, status;
23606cf5
RW		 4510 /* Runtime suspend should only enable wakeup for link changes */
4511 u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
bc7f75fa
AK		 4512 int retval = 0;
4513
4514 netif_device_detach(netdev);
4515
4516 if (netif_running(netdev)) {
4517 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4518 e1000e_down(adapter);
4519 e1000_free_irq(adapter);
4520 }
4662e82b 4521 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 4522
4523 retval = pci_save_state(pdev);
4524 if (retval)
4525 return retval;
4526
4527 status = er32(STATUS);
4528 if (status & E1000_STATUS_LU)
4529 wufc &= ~E1000_WUFC_LNKC;
4530
4531 if (wufc) {
4532 e1000_setup_rctl(adapter);
4533 e1000_set_multi(netdev);
4534
4535 /* turn on all-multi mode if wake on multicast is enabled */
4536 if (wufc & E1000_WUFC_MC) {
4537 rctl = er32(RCTL);
4538 rctl |= E1000_RCTL_MPE;
4539 ew32(RCTL, rctl);
4540 }
4541
4542 ctrl = er32(CTRL);
4543 /* advertise wake from D3Cold */
4544 #define E1000_CTRL_ADVD3WUC 0x00100000
4545 /* phy power management enable */
4546 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
a4f58f54
BA		 4547 ctrl |= E1000_CTRL_ADVD3WUC;
4548 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
4549 ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
bc7f75fa
AK		 4550 ew32(CTRL, ctrl);
4551
318a94d6
JK		 4552 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
4553 adapter->hw.phy.media_type ==
4554 e1000_media_type_internal_serdes) {
bc7f75fa
AK		 4555 /* keep the laser running in D3 */
4556 ctrl_ext = er32(CTRL_EXT);
93a23f48 4557 ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
bc7f75fa
AK		 4558 ew32(CTRL_EXT, ctrl_ext);
4559 }
4560
97ac8cae
BA		 4561 if (adapter->flags & FLAG_IS_ICH)
4562 e1000e_disable_gig_wol_ich8lan(&adapter->hw);
4563
bc7f75fa
AK		 4564 /* Allow time for pending master requests to run */
4565 e1000e_disable_pcie_master(&adapter->hw);
4566
82776a4b 4567 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
a4f58f54
BA		 4568 /* enable wakeup by the PHY */
4569 retval = e1000_init_phy_wakeup(adapter, wufc);
4570 if (retval)
4571 return retval;
4572 } else {
4573 /* enable wakeup by the MAC */
4574 ew32(WUFC, wufc);
4575 ew32(WUC, E1000_WUC_PME_EN);
4576 }
bc7f75fa
AK		 4577 } else {
4578 ew32(WUC, 0);
4579 ew32(WUFC, 0);
bc7f75fa
AK		 4580 }
4581
4f9de721
RW		 4582 *enable_wake = !!wufc;
4583
bc7f75fa 4584 /* make sure adapter isn't asleep if manageability is enabled */
82776a4b
BA		 4585 if ((adapter->flags & FLAG_MNG_PT_ENABLED) ||
4586 (hw->mac.ops.check_mng_mode(hw)))
4f9de721 4587 *enable_wake = true;
bc7f75fa
AK		 4588
4589 if (adapter->hw.phy.type == e1000_phy_igp_3)
4590 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
4591
ad68076e
BA		 4592 /*
4593 * Release control of h/w to f/w. If f/w is AMT enabled, this
4594 * would have already happened in close and is redundant.
4595 */
bc7f75fa
AK		 4596 e1000_release_hw_control(adapter);
4597
4598 pci_disable_device(pdev);
4599
4f9de721
RW		 4600 return 0;
4601}
4602
4603static void e1000_power_off(struct pci_dev *pdev, bool sleep, bool wake)
4604{
4605 if (sleep && wake) {
4606 pci_prepare_to_sleep(pdev);
4607 return;
4608 }
4609
4610 pci_wake_from_d3(pdev, wake);
4611 pci_set_power_state(pdev, PCI_D3hot);
4612}
4613
4614static void e1000_complete_shutdown(struct pci_dev *pdev, bool sleep,
4615 bool wake)
4616{
4617 struct net_device *netdev = pci_get_drvdata(pdev);
4618 struct e1000_adapter *adapter = netdev_priv(netdev);
4619
005cbdfc
AD		 4620 /*
4621 * The pci-e switch on some quad port adapters will report a
4622 * correctable error when the MAC transitions from D0 to D3. To
4623 * prevent this we need to mask off the correctable errors on the
4624 * downstream port of the pci-e switch.
4625 */
4626 if (adapter->flags & FLAG_IS_QUAD_PORT) {
4627 struct pci_dev *us_dev = pdev->bus->self;
4628 int pos = pci_find_capability(us_dev, PCI_CAP_ID_EXP);
4629 u16 devctl;
4630
4631 pci_read_config_word(us_dev, pos + PCI_EXP_DEVCTL, &devctl);
4632 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL,
4633 (devctl & ~PCI_EXP_DEVCTL_CERE));
4634
4f9de721 4635 e1000_power_off(pdev, sleep, wake);
005cbdfc
AD		 4636
4637 pci_write_config_word(us_dev, pos + PCI_EXP_DEVCTL, devctl);
4638 } else {
4f9de721 4639 e1000_power_off(pdev, sleep, wake);
005cbdfc 4640 }
bc7f75fa
AK		 4641}
4642
1eae4eb2
AK		 4643static void e1000e_disable_l1aspm(struct pci_dev *pdev)
4644{
4645 int pos;
1eae4eb2
AK		 4646 u16 val;
4647
4648 /*
4649 * 82573 workaround - disable L1 ASPM on mobile chipsets
4650 *
4651 * L1 ASPM on various mobile (ich7) chipsets do not behave properly
4652 * resulting in lost data or garbage information on the pci-e link
4653 * level. This could result in (false) bad EEPROM checksum errors,
4654 * long ping times (up to 2s) or even a system freeze/hang.
4655 *
4656 * Unfortunately this feature saves about 1W power consumption when
4657 * active.
4658 */
4659 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
1eae4eb2
AK		 4660 pci_read_config_word(pdev, pos + PCI_EXP_LNKCTL, &val);
4661 if (val & 0x2) {
4662 dev_warn(&pdev->dev, "Disabling L1 ASPM\n");
4663 val &= ~0x2;
4664 pci_write_config_word(pdev, pos + PCI_EXP_LNKCTL, val);
4665 }
4666}
4667
a0340162 4668#ifdef CONFIG_PM_OPS
23606cf5
RW		 4669static bool e1000e_pm_ready(struct e1000_adapter *adapter)
4670{
4671 return !!adapter->tx_ring->buffer_info;
4672}
4673
23606cf5
RW		 4674static int __e1000_resume(struct pci_dev *pdev)
4675{
4676 struct net_device *netdev = pci_get_drvdata(pdev);
4677 struct e1000_adapter *adapter = netdev_priv(netdev);
4678 struct e1000_hw *hw = &adapter->hw;
4679 u32 err;
4680
4681 e1000e_disable_l1aspm(pdev);
bc7f75fa 4682
4662e82b 4683 e1000e_set_interrupt_capability(adapter);
bc7f75fa
AK		 4684 if (netif_running(netdev)) {
4685 err = e1000_request_irq(adapter);
4686 if (err)
4687 return err;
4688 }
4689
4690 e1000e_power_up_phy(adapter);
a4f58f54
BA		 4691
4692 /* report the system wakeup cause from S3/S4 */
4693 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
4694 u16 phy_data;
4695
4696 e1e_rphy(&adapter->hw, BM_WUS, &phy_data);
4697 if (phy_data) {
4698 e_info("PHY Wakeup cause - %s\n",
4699 phy_data & E1000_WUS_EX ? "Unicast Packet" :
4700 phy_data & E1000_WUS_MC ? "Multicast Packet" :
4701 phy_data & E1000_WUS_BC ? "Broadcast Packet" :
4702 phy_data & E1000_WUS_MAG ? "Magic Packet" :
4703 phy_data & E1000_WUS_LNKC ? "Link Status "
4704 " Change" : "other");
4705 }
4706 e1e_wphy(&adapter->hw, BM_WUS, ~0);
4707 } else {
4708 u32 wus = er32(WUS);
4709 if (wus) {
4710 e_info("MAC Wakeup cause - %s\n",
4711 wus & E1000_WUS_EX ? "Unicast Packet" :
4712 wus & E1000_WUS_MC ? "Multicast Packet" :
4713 wus & E1000_WUS_BC ? "Broadcast Packet" :
4714 wus & E1000_WUS_MAG ? "Magic Packet" :
4715 wus & E1000_WUS_LNKC ? "Link Status Change" :
4716 "other");
4717 }
4718 ew32(WUS, ~0);
4719 }
4720
bc7f75fa 4721 e1000e_reset(adapter);
bc7f75fa
AK		 4722
4723 e1000_init_manageability(adapter);
4724
4725 if (netif_running(netdev))
4726 e1000e_up(adapter);
4727
4728 netif_device_attach(netdev);
4729
ad68076e
BA		 4730 /*
4731 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4732 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4733 * under the control of the driver.
4734 */
c43bc57e 4735 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4736 e1000_get_hw_control(adapter);
4737
4738 return 0;
4739}
23606cf5 4740
a0340162
RW		 4741#ifdef CONFIG_PM_SLEEP
4742static int e1000_suspend(struct device *dev)
4743{
4744 struct pci_dev *pdev = to_pci_dev(dev);
4745 int retval;
4746 bool wake;
4747
4748 retval = __e1000_shutdown(pdev, &wake, false);
4749 if (!retval)
4750 e1000_complete_shutdown(pdev, true, wake);
4751
4752 return retval;
4753}
4754
23606cf5
RW		 4755static int e1000_resume(struct device *dev)
4756{
4757 struct pci_dev *pdev = to_pci_dev(dev);
4758 struct net_device *netdev = pci_get_drvdata(pdev);
4759 struct e1000_adapter *adapter = netdev_priv(netdev);
4760
4761 if (e1000e_pm_ready(adapter))
4762 adapter->idle_check = true;
4763
4764 return __e1000_resume(pdev);
4765}
a0340162
RW		 4766#endif /* CONFIG_PM_SLEEP */
4767
4768#ifdef CONFIG_PM_RUNTIME
4769static int e1000_runtime_suspend(struct device *dev)
4770{
4771 struct pci_dev *pdev = to_pci_dev(dev);
4772 struct net_device *netdev = pci_get_drvdata(pdev);
4773 struct e1000_adapter *adapter = netdev_priv(netdev);
4774
4775 if (e1000e_pm_ready(adapter)) {
4776 bool wake;
4777
4778 __e1000_shutdown(pdev, &wake, true);
4779 }
4780
4781 return 0;
4782}
4783
4784static int e1000_idle(struct device *dev)
4785{
4786 struct pci_dev *pdev = to_pci_dev(dev);
4787 struct net_device *netdev = pci_get_drvdata(pdev);
4788 struct e1000_adapter *adapter = netdev_priv(netdev);
4789
4790 if (!e1000e_pm_ready(adapter))
4791 return 0;
4792
4793 if (adapter->idle_check) {
4794 adapter->idle_check = false;
4795 if (!e1000e_has_link(adapter))
4796 pm_schedule_suspend(dev, MSEC_PER_SEC);
4797 }
4798
4799 return -EBUSY;
4800}
23606cf5
RW		 4801
4802static int e1000_runtime_resume(struct device *dev)
4803{
4804 struct pci_dev *pdev = to_pci_dev(dev);
4805 struct net_device *netdev = pci_get_drvdata(pdev);
4806 struct e1000_adapter *adapter = netdev_priv(netdev);
4807
4808 if (!e1000e_pm_ready(adapter))
4809 return 0;
4810
4811 adapter->idle_check = !dev->power.runtime_auto;
4812 return __e1000_resume(pdev);
4813}
a0340162
RW		 4814#endif /* CONFIG_PM_RUNTIME */
4815#endif /* CONFIG_PM_OPS */
bc7f75fa
AK		 4816
4817static void e1000_shutdown(struct pci_dev *pdev)
4818{
4f9de721
RW		 4819 bool wake = false;
4820
23606cf5 4821 __e1000_shutdown(pdev, &wake, false);
4f9de721
RW		 4822
4823 if (system_state == SYSTEM_POWER_OFF)
4824 e1000_complete_shutdown(pdev, false, wake);
bc7f75fa
AK		 4825}
4826
4827#ifdef CONFIG_NET_POLL_CONTROLLER
4828/*
4829 * Polling 'interrupt' - used by things like netconsole to send skbs
4830 * without having to re-enable interrupts. It's not called while
4831 * the interrupt routine is executing.
4832 */
4833static void e1000_netpoll(struct net_device *netdev)
4834{
4835 struct e1000_adapter *adapter = netdev_priv(netdev);
4836
4837 disable_irq(adapter->pdev->irq);
4838 e1000_intr(adapter->pdev->irq, netdev);
4839
bc7f75fa
AK		 4840 enable_irq(adapter->pdev->irq);
4841}
4842#endif
4843
4844/**
4845 * e1000_io_error_detected - called when PCI error is detected
4846 * @pdev: Pointer to PCI device
4847 * @state: The current pci connection state
4848 *
4849 * This function is called after a PCI bus error affecting
4850 * this device has been detected.
4851 */
4852static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4853 pci_channel_state_t state)
4854{
4855 struct net_device *netdev = pci_get_drvdata(pdev);
4856 struct e1000_adapter *adapter = netdev_priv(netdev);
4857
4858 netif_device_detach(netdev);
4859
c93b5a76
MM		 4860 if (state == pci_channel_io_perm_failure)
4861 return PCI_ERS_RESULT_DISCONNECT;
4862
bc7f75fa
AK		 4863 if (netif_running(netdev))
4864 e1000e_down(adapter);
4865 pci_disable_device(pdev);
4866
4867 /* Request a slot slot reset. */
4868 return PCI_ERS_RESULT_NEED_RESET;
4869}
4870
4871/**
4872 * e1000_io_slot_reset - called after the pci bus has been reset.
4873 * @pdev: Pointer to PCI device
4874 *
4875 * Restart the card from scratch, as if from a cold-boot. Implementation
4876 * resembles the first-half of the e1000_resume routine.
4877 */
4878static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4879{
4880 struct net_device *netdev = pci_get_drvdata(pdev);
4881 struct e1000_adapter *adapter = netdev_priv(netdev);
4882 struct e1000_hw *hw = &adapter->hw;
6e4f6f6b 4883 int err;
111b9dc5 4884 pci_ers_result_t result;
bc7f75fa 4885
1eae4eb2 4886 e1000e_disable_l1aspm(pdev);
f0f422e5 4887 err = pci_enable_device_mem(pdev);
6e4f6f6b 4888 if (err) {
bc7f75fa
AK		 4889 dev_err(&pdev->dev,
4890 "Cannot re-enable PCI device after reset.\n");
111b9dc5
JB		 4891 result = PCI_ERS_RESULT_DISCONNECT;
4892 } else {
4893 pci_set_master(pdev);
23606cf5 4894 pdev->state_saved = true;
111b9dc5 4895 pci_restore_state(pdev);
bc7f75fa 4896
111b9dc5
JB		 4897 pci_enable_wake(pdev, PCI_D3hot, 0);
4898 pci_enable_wake(pdev, PCI_D3cold, 0);
bc7f75fa 4899
111b9dc5
JB		 4900 e1000e_reset(adapter);
4901 ew32(WUS, ~0);
4902 result = PCI_ERS_RESULT_RECOVERED;
4903 }
bc7f75fa 4904
111b9dc5
JB		 4905 pci_cleanup_aer_uncorrect_error_status(pdev);
4906
4907 return result;
bc7f75fa
AK		 4908}
4909
4910/**
4911 * e1000_io_resume - called when traffic can start flowing again.
4912 * @pdev: Pointer to PCI device
4913 *
4914 * This callback is called when the error recovery driver tells us that
4915 * its OK to resume normal operation. Implementation resembles the
4916 * second-half of the e1000_resume routine.
4917 */
4918static void e1000_io_resume(struct pci_dev *pdev)
4919{
4920 struct net_device *netdev = pci_get_drvdata(pdev);
4921 struct e1000_adapter *adapter = netdev_priv(netdev);
4922
4923 e1000_init_manageability(adapter);
4924
4925 if (netif_running(netdev)) {
4926 if (e1000e_up(adapter)) {
4927 dev_err(&pdev->dev,
4928 "can't bring device back up after reset\n");
4929 return;
4930 }
4931 }
4932
4933 netif_device_attach(netdev);
4934
ad68076e
BA		 4935 /*
4936 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 4937 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 4938 * under the control of the driver.
4939 */
c43bc57e 4940 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 4941 e1000_get_hw_control(adapter);
4942
4943}
4944
4945static void e1000_print_device_info(struct e1000_adapter *adapter)
4946{
4947 struct e1000_hw *hw = &adapter->hw;
4948 struct net_device *netdev = adapter->netdev;
69e3fd8c 4949 u32 pba_num;
bc7f75fa
AK		 4950
4951 /* print bus type/speed/width info */
7c510e4b 4952 e_info("(PCI Express:2.5GB/s:%s) %pM\n",
44defeb3
JK		 4953 /* bus width */
4954 ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
4955 "Width x1"),
4956 /* MAC address */
7c510e4b 4957 netdev->dev_addr);
44defeb3
JK		 4958 e_info("Intel(R) PRO/%s Network Connection\n",
4959 (hw->phy.type == e1000_phy_ife) ? "10/100" : "1000");
69e3fd8c 4960 e1000e_read_pba_num(hw, &pba_num);
44defeb3
JK		 4961 e_info("MAC: %d, PHY: %d, PBA No: %06x-%03x\n",
4962 hw->mac.type, hw->phy.type, (pba_num >> 8), (pba_num & 0xff));
bc7f75fa
AK		 4963}
4964
10aa4c04
AK		 4965static void e1000_eeprom_checks(struct e1000_adapter *adapter)
4966{
4967 struct e1000_hw *hw = &adapter->hw;
4968 int ret_val;
4969 u16 buf = 0;
4970
4971 if (hw->mac.type != e1000_82573)
4972 return;
4973
4974 ret_val = e1000_read_nvm(hw, NVM_INIT_CONTROL2_REG, 1, &buf);
e243455d 4975 if (!ret_val && (!(le16_to_cpu(buf) & (1 << 0)))) {
10aa4c04 4976 /* Deep Smart Power Down (DSPD) */
6c2a9efa
FP		 4977 dev_warn(&adapter->pdev->dev,
4978 "Warning: detected DSPD enabled in EEPROM\n");
10aa4c04
AK		 4979 }
4980
4981 ret_val = e1000_read_nvm(hw, NVM_INIT_3GIO_3, 1, &buf);
e243455d 4982 if (!ret_val && (le16_to_cpu(buf) & (3 << 2))) {
10aa4c04 4983 /* ASPM enable */
6c2a9efa
FP		 4984 dev_warn(&adapter->pdev->dev,
4985 "Warning: detected ASPM enabled in EEPROM\n");
10aa4c04
AK		 4986 }
4987}
4988
651c2466
SH		 4989static const struct net_device_ops e1000e_netdev_ops = {
4990 .ndo_open = e1000_open,
4991 .ndo_stop = e1000_close,
00829823 4992 .ndo_start_xmit = e1000_xmit_frame,
651c2466
SH		 4993 .ndo_get_stats = e1000_get_stats,
4994 .ndo_set_multicast_list = e1000_set_multi,
4995 .ndo_set_mac_address = e1000_set_mac,
4996 .ndo_change_mtu = e1000_change_mtu,
4997 .ndo_do_ioctl = e1000_ioctl,
4998 .ndo_tx_timeout = e1000_tx_timeout,
4999 .ndo_validate_addr = eth_validate_addr,
5000
5001 .ndo_vlan_rx_register = e1000_vlan_rx_register,
5002 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
5003 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
5004#ifdef CONFIG_NET_POLL_CONTROLLER
5005 .ndo_poll_controller = e1000_netpoll,
5006#endif
5007};
5008
bc7f75fa
AK		 5009/**
5010 * e1000_probe - Device Initialization Routine
5011 * @pdev: PCI device information struct
5012 * @ent: entry in e1000_pci_tbl
5013 *
5014 * Returns 0 on success, negative on failure
5015 *
5016 * e1000_probe initializes an adapter identified by a pci_dev structure.
5017 * The OS initialization, configuring of the adapter private structure,
5018 * and a hardware reset occur.
5019 **/
5020static int __devinit e1000_probe(struct pci_dev *pdev,
5021 const struct pci_device_id *ent)
5022{
5023 struct net_device *netdev;
5024 struct e1000_adapter *adapter;
5025 struct e1000_hw *hw;
5026 const struct e1000_info *ei = e1000_info_tbl[ent->driver_data];
f47e81fc
BB		 5027 resource_size_t mmio_start, mmio_len;
5028 resource_size_t flash_start, flash_len;
bc7f75fa
AK		 5029
5030 static int cards_found;
5031 int i, err, pci_using_dac;
5032 u16 eeprom_data = 0;
5033 u16 eeprom_apme_mask = E1000_EEPROM_APME;
5034
1eae4eb2 5035 e1000e_disable_l1aspm(pdev);
6e4f6f6b 5036
f0f422e5 5037 err = pci_enable_device_mem(pdev);
bc7f75fa
AK		 5038 if (err)
5039 return err;
5040
5041 pci_using_dac = 0;
6a35528a 5042 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa 5043 if (!err) {
6a35528a 5044 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
bc7f75fa
AK		 5045 if (!err)
5046 pci_using_dac = 1;
5047 } else {
284901a9 5048 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
bc7f75fa
AK		 5049 if (err) {
5050 err = pci_set_consistent_dma_mask(pdev,
284901a9 5051 DMA_BIT_MASK(32));
bc7f75fa
AK		 5052 if (err) {
5053 dev_err(&pdev->dev, "No usable DMA "
5054 "configuration, aborting\n");
5055 goto err_dma;
5056 }
5057 }
5058 }
5059
e8de1481 5060 err = pci_request_selected_regions_exclusive(pdev,
f0f422e5
BA		 5061 pci_select_bars(pdev, IORESOURCE_MEM),
5062 e1000e_driver_name);
bc7f75fa
AK		 5063 if (err)
5064 goto err_pci_reg;
5065
68eac460 5066 /* AER (Advanced Error Reporting) hooks */
19d5afd4 5067 pci_enable_pcie_error_reporting(pdev);
68eac460 5068
bc7f75fa 5069 pci_set_master(pdev);
438b365a
BA		 5070 /* PCI config space info */
5071 err = pci_save_state(pdev);
5072 if (err)
5073 goto err_alloc_etherdev;
bc7f75fa
AK		 5074
5075 err = -ENOMEM;
5076 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
5077 if (!netdev)
5078 goto err_alloc_etherdev;
5079
bc7f75fa
AK		 5080 SET_NETDEV_DEV(netdev, &pdev->dev);
5081
5082 pci_set_drvdata(pdev, netdev);
5083 adapter = netdev_priv(netdev);
5084 hw = &adapter->hw;
5085 adapter->netdev = netdev;
5086 adapter->pdev = pdev;
5087 adapter->ei = ei;
5088 adapter->pba = ei->pba;
5089 adapter->flags = ei->flags;
eb7c3adb 5090 adapter->flags2 = ei->flags2;
bc7f75fa
AK		 5091 adapter->hw.adapter = adapter;
5092 adapter->hw.mac.type = ei->mac;
2adc55c9 5093 adapter->max_hw_frame_size = ei->max_hw_frame_size;
bc7f75fa
AK		 5094 adapter->msg_enable = (1 << NETIF_MSG_DRV | NETIF_MSG_PROBE) - 1;
5095
5096 mmio_start = pci_resource_start(pdev, 0);
5097 mmio_len = pci_resource_len(pdev, 0);
5098
5099 err = -EIO;
5100 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
5101 if (!adapter->hw.hw_addr)
5102 goto err_ioremap;
5103
5104 if ((adapter->flags & FLAG_HAS_FLASH) &&
5105 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
5106 flash_start = pci_resource_start(pdev, 1);
5107 flash_len = pci_resource_len(pdev, 1);
5108 adapter->hw.flash_address = ioremap(flash_start, flash_len);
5109 if (!adapter->hw.flash_address)
5110 goto err_flashmap;
5111 }
5112
5113 /* construct the net_device struct */
651c2466 5114 netdev->netdev_ops = &e1000e_netdev_ops;
bc7f75fa 5115 e1000e_set_ethtool_ops(netdev);
bc7f75fa
AK		 5116 netdev->watchdog_timeo = 5 * HZ;
5117 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
bc7f75fa
AK		 5118 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
5119
5120 netdev->mem_start = mmio_start;
5121 netdev->mem_end = mmio_start + mmio_len;
5122
5123 adapter->bd_number = cards_found++;
5124
4662e82b
BA		 5125 e1000e_check_options(adapter);
5126
bc7f75fa
AK		 5127 /* setup adapter struct */
5128 err = e1000_sw_init(adapter);
5129 if (err)
5130 goto err_sw_init;
5131
5132 err = -EIO;
5133
5134 memcpy(&hw->mac.ops, ei->mac_ops, sizeof(hw->mac.ops));
5135 memcpy(&hw->nvm.ops, ei->nvm_ops, sizeof(hw->nvm.ops));
5136 memcpy(&hw->phy.ops, ei->phy_ops, sizeof(hw->phy.ops));
5137
69e3fd8c 5138 err = ei->get_variants(adapter);
bc7f75fa
AK		 5139 if (err)
5140 goto err_hw_init;
5141
4a770358
BA		 5142 if ((adapter->flags & FLAG_IS_ICH) &&
5143 (adapter->flags & FLAG_READ_ONLY_NVM))
5144 e1000e_write_protect_nvm_ich8lan(&adapter->hw);
5145
bc7f75fa
AK		 5146 hw->mac.ops.get_bus_info(&adapter->hw);
5147
318a94d6 5148 adapter->hw.phy.autoneg_wait_to_complete = 0;
bc7f75fa
AK		 5149
5150 /* Copper options */
318a94d6 5151 if (adapter->hw.phy.media_type == e1000_media_type_copper) {
bc7f75fa
AK		 5152 adapter->hw.phy.mdix = AUTO_ALL_MODES;
5153 adapter->hw.phy.disable_polarity_correction = 0;
5154 adapter->hw.phy.ms_type = e1000_ms_hw_default;
5155 }
5156
5157 if (e1000_check_reset_block(&adapter->hw))
44defeb3 5158 e_info("PHY reset is blocked due to SOL/IDER session.\n");
bc7f75fa
AK		 5159
5160 netdev->features = NETIF_F_SG |
5161 NETIF_F_HW_CSUM |
5162 NETIF_F_HW_VLAN_TX |
5163 NETIF_F_HW_VLAN_RX;
5164
5165 if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER)
5166 netdev->features |= NETIF_F_HW_VLAN_FILTER;
5167
5168 netdev->features |= NETIF_F_TSO;
5169 netdev->features |= NETIF_F_TSO6;
5170
a5136e23
JK		 5171 netdev->vlan_features |= NETIF_F_TSO;
5172 netdev->vlan_features |= NETIF_F_TSO6;
5173 netdev->vlan_features |= NETIF_F_HW_CSUM;
5174 netdev->vlan_features |= NETIF_F_SG;
5175
bc7f75fa
AK		 5176 if (pci_using_dac)
5177 netdev->features |= NETIF_F_HIGHDMA;
5178
bc7f75fa
AK		 5179 if (e1000e_enable_mng_pass_thru(&adapter->hw))
5180 adapter->flags |= FLAG_MNG_PT_ENABLED;
5181
ad68076e
BA		 5182 /*
5183 * before reading the NVM, reset the controller to
5184 * put the device in a known good starting state
5185 */
bc7f75fa
AK		 5186 adapter->hw.mac.ops.reset_hw(&adapter->hw);
5187
5188 /*
5189 * systems with ASPM and others may see the checksum fail on the first
5190 * attempt. Let's give it a few tries
5191 */
5192 for (i = 0;; i++) {
5193 if (e1000_validate_nvm_checksum(&adapter->hw) >= 0)
5194 break;
5195 if (i == 2) {
44defeb3 5196 e_err("The NVM Checksum Is Not Valid\n");
bc7f75fa
AK		 5197 err = -EIO;
5198 goto err_eeprom;
5199 }
5200 }
5201
10aa4c04
AK		 5202 e1000_eeprom_checks(adapter);
5203
608f8a0d 5204 /* copy the MAC address */
bc7f75fa 5205 if (e1000e_read_mac_addr(&adapter->hw))
44defeb3 5206 e_err("NVM Read Error while reading MAC address\n");
bc7f75fa
AK		 5207
5208 memcpy(netdev->dev_addr, adapter->hw.mac.addr, netdev->addr_len);
5209 memcpy(netdev->perm_addr, adapter->hw.mac.addr, netdev->addr_len);
5210
5211 if (!is_valid_ether_addr(netdev->perm_addr)) {
7c510e4b 5212 e_err("Invalid MAC Address: %pM\n", netdev->perm_addr);
bc7f75fa
AK		 5213 err = -EIO;
5214 goto err_eeprom;
5215 }
5216
5217 init_timer(&adapter->watchdog_timer);
5218 adapter->watchdog_timer.function = &e1000_watchdog;
5219 adapter->watchdog_timer.data = (unsigned long) adapter;
5220
5221 init_timer(&adapter->phy_info_timer);
5222 adapter->phy_info_timer.function = &e1000_update_phy_info;
5223 adapter->phy_info_timer.data = (unsigned long) adapter;
5224
5225 INIT_WORK(&adapter->reset_task, e1000_reset_task);
5226 INIT_WORK(&adapter->watchdog_task, e1000_watchdog_task);
a8f88ff5
JB		 5227 INIT_WORK(&adapter->downshift_task, e1000e_downshift_workaround);
5228 INIT_WORK(&adapter->update_phy_task, e1000e_update_phy_task);
41cec6f1 5229 INIT_WORK(&adapter->print_hang_task, e1000_print_hw_hang);
bc7f75fa 5230
bc7f75fa
AK		 5231 /* Initialize link parameters. User can change them with ethtool */
5232 adapter->hw.mac.autoneg = 1;
309af40b 5233 adapter->fc_autoneg = 1;
5c48ef3e
BA		 5234 adapter->hw.fc.requested_mode = e1000_fc_default;
5235 adapter->hw.fc.current_mode = e1000_fc_default;
bc7f75fa
AK		 5236 adapter->hw.phy.autoneg_advertised = 0x2f;
5237
5238 /* ring size defaults */
5239 adapter->rx_ring->count = 256;
5240 adapter->tx_ring->count = 256;
5241
5242 /*
5243 * Initial Wake on LAN setting - If APM wake is enabled in
5244 * the EEPROM, enable the ACPI Magic Packet filter
5245 */
5246 if (adapter->flags & FLAG_APME_IN_WUC) {
5247 /* APME bit in EEPROM is mapped to WUC.APME */
5248 eeprom_data = er32(WUC);
5249 eeprom_apme_mask = E1000_WUC_APME;
a4f58f54
BA		 5250 if (eeprom_data & E1000_WUC_PHY_WAKE)
5251 adapter->flags2 |= FLAG2_HAS_PHY_WAKEUP;
bc7f75fa
AK		 5252 } else if (adapter->flags & FLAG_APME_IN_CTRL3) {
5253 if (adapter->flags & FLAG_APME_CHECK_PORT_B &&
5254 (adapter->hw.bus.func == 1))
5255 e1000_read_nvm(&adapter->hw,
5256 NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
5257 else
5258 e1000_read_nvm(&adapter->hw,
5259 NVM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
5260 }
5261
5262 /* fetch WoL from EEPROM */
5263 if (eeprom_data & eeprom_apme_mask)
5264 adapter->eeprom_wol |= E1000_WUFC_MAG;
5265
5266 /*
5267 * now that we have the eeprom settings, apply the special cases
5268 * where the eeprom may be wrong or the board simply won't support
5269 * wake on lan on a particular port
5270 */
5271 if (!(adapter->flags & FLAG_HAS_WOL))
5272 adapter->eeprom_wol = 0;
5273
5274 /* initialize the wol settings based on the eeprom settings */
5275 adapter->wol = adapter->eeprom_wol;
6ff68026 5276 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
bc7f75fa 5277
84527590
BA		 5278 /* save off EEPROM version number */
5279 e1000_read_nvm(&adapter->hw, 5, 1, &adapter->eeprom_vers);
5280
bc7f75fa
AK		 5281 /* reset the hardware with the new settings */
5282 e1000e_reset(adapter);
5283
ad68076e
BA		 5284 /*
5285 * If the controller has AMT, do not set DRV_LOAD until the interface
bc7f75fa 5286 * is up. For all other cases, let the f/w know that the h/w is now
ad68076e
BA		 5287 * under the control of the driver.
5288 */
c43bc57e 5289 if (!(adapter->flags & FLAG_HAS_AMT))
bc7f75fa
AK		 5290 e1000_get_hw_control(adapter);
5291
bc7f75fa
AK		 5292 strcpy(netdev->name, "eth%d");
5293 err = register_netdev(netdev);
5294 if (err)
5295 goto err_register;
5296
9c563d20
JB		 5297 /* carrier off reporting is important to ethtool even BEFORE open */
5298 netif_carrier_off(netdev);
5299
bc7f75fa
AK		 5300 e1000_print_device_info(adapter);
5301
23606cf5
RW		 5302 if (pci_dev_run_wake(pdev)) {
5303 pm_runtime_set_active(&pdev->dev);
5304 pm_runtime_enable(&pdev->dev);
5305 }
5306 pm_schedule_suspend(&pdev->dev, MSEC_PER_SEC);
5307
bc7f75fa
AK		 5308 return 0;
5309
5310err_register:
c43bc57e
JB		 5311 if (!(adapter->flags & FLAG_HAS_AMT))
5312 e1000_release_hw_control(adapter);
bc7f75fa
AK		 5313err_eeprom:
5314 if (!e1000_check_reset_block(&adapter->hw))
5315 e1000_phy_hw_reset(&adapter->hw);
c43bc57e 5316err_hw_init:
bc7f75fa 5317
bc7f75fa
AK		 5318 kfree(adapter->tx_ring);
5319 kfree(adapter->rx_ring);
5320err_sw_init:
c43bc57e
JB		 5321 if (adapter->hw.flash_address)
5322 iounmap(adapter->hw.flash_address);
e82f54ba 5323 e1000e_reset_interrupt_capability(adapter);
c43bc57e 5324err_flashmap:
bc7f75fa
AK		 5325 iounmap(adapter->hw.hw_addr);
5326err_ioremap:
5327 free_netdev(netdev);
5328err_alloc_etherdev:
f0f422e5
BA		 5329 pci_release_selected_regions(pdev,
5330 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5331err_pci_reg:
5332err_dma:
5333 pci_disable_device(pdev);
5334 return err;
5335}
5336
5337/**
5338 * e1000_remove - Device Removal Routine
5339 * @pdev: PCI device information struct
5340 *
5341 * e1000_remove is called by the PCI subsystem to alert the driver
5342 * that it should release a PCI device. The could be caused by a
5343 * Hot-Plug event, or because the driver is going to be removed from
5344 * memory.
5345 **/
5346static void __devexit e1000_remove(struct pci_dev *pdev)
5347{
5348 struct net_device *netdev = pci_get_drvdata(pdev);
5349 struct e1000_adapter *adapter = netdev_priv(netdev);
23606cf5
RW		 5350 bool down = test_bit(__E1000_DOWN, &adapter->state);
5351
5352 pm_runtime_get_sync(&pdev->dev);
bc7f75fa 5353
ad68076e
BA		 5354 /*
5355 * flush_scheduled work may reschedule our watchdog task, so
5356 * explicitly disable watchdog tasks from being rescheduled
5357 */
23606cf5
RW		 5358 if (!down)
5359 set_bit(__E1000_DOWN, &adapter->state);
bc7f75fa
AK		 5360 del_timer_sync(&adapter->watchdog_timer);
5361 del_timer_sync(&adapter->phy_info_timer);
5362
41cec6f1
BA		 5363 cancel_work_sync(&adapter->reset_task);
5364 cancel_work_sync(&adapter->watchdog_task);
5365 cancel_work_sync(&adapter->downshift_task);
5366 cancel_work_sync(&adapter->update_phy_task);
5367 cancel_work_sync(&adapter->print_hang_task);
bc7f75fa
AK		 5368 flush_scheduled_work();
5369
17f208de
BA		 5370 if (!(netdev->flags & IFF_UP))
5371 e1000_power_down_phy(adapter);
5372
23606cf5
RW		 5373 /* Don't lie to e1000_close() down the road. */
5374 if (!down)
5375 clear_bit(__E1000_DOWN, &adapter->state);
17f208de
BA		 5376 unregister_netdev(netdev);
5377
23606cf5
RW		 5378 if (pci_dev_run_wake(pdev)) {
5379 pm_runtime_disable(&pdev->dev);
5380 pm_runtime_set_suspended(&pdev->dev);
5381 }
5382 pm_runtime_put_noidle(&pdev->dev);
5383
ad68076e
BA		 5384 /*
5385 * Release control of h/w to f/w. If f/w is AMT enabled, this
5386 * would have already happened in close and is redundant.
5387 */
bc7f75fa
AK		 5388 e1000_release_hw_control(adapter);
5389
4662e82b 5390 e1000e_reset_interrupt_capability(adapter);
bc7f75fa
AK		 5391 kfree(adapter->tx_ring);
5392 kfree(adapter->rx_ring);
5393
5394 iounmap(adapter->hw.hw_addr);
5395 if (adapter->hw.flash_address)
5396 iounmap(adapter->hw.flash_address);
f0f422e5
BA		 5397 pci_release_selected_regions(pdev,
5398 pci_select_bars(pdev, IORESOURCE_MEM));
bc7f75fa
AK		 5399
5400 free_netdev(netdev);
5401
111b9dc5 5402 /* AER disable */
19d5afd4 5403 pci_disable_pcie_error_reporting(pdev);
111b9dc5 5404
bc7f75fa
AK		 5405 pci_disable_device(pdev);
5406}
5407
5408/* PCI Error Recovery (ERS) */
5409static struct pci_error_handlers e1000_err_handler = {
5410 .error_detected = e1000_io_error_detected,
5411 .slot_reset = e1000_io_slot_reset,
5412 .resume = e1000_io_resume,
5413};
5414
a3aa1884 5415static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
bc7f75fa
AK		 5416 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_COPPER), board_82571 },
5417 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_FIBER), board_82571 },
5418 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER), board_82571 },
5419 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_COPPER_LP), board_82571 },
5420 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_QUAD_FIBER), board_82571 },
5421 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES), board_82571 },
040babf9
AK		 5422 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_DUAL), board_82571 },
5423 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571EB_SERDES_QUAD), board_82571 },
5424 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82571PT_QUAD_COPPER), board_82571 },
ad68076e 5425
bc7f75fa
AK		 5426 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI), board_82572 },
5427 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_COPPER), board_82572 },
5428 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_FIBER), board_82572 },
5429 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82572EI_SERDES), board_82572 },
ad68076e 5430
bc7f75fa
AK		 5431 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E), board_82573 },
5432 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573E_IAMT), board_82573 },
5433 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82573L), board_82573 },
ad68076e 5434
4662e82b 5435 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574L), board_82574 },
bef28b11 5436 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82574LA), board_82574 },
8c81c9c3 5437 { PCI_VDEVICE(INTEL, E1000_DEV_ID_82583V), board_82583 },
4662e82b 5438
bc7f75fa
AK		 5439 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_DPT),
5440 board_80003es2lan },
5441 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_COPPER_SPT),
5442 board_80003es2lan },
5443 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_DPT),
5444 board_80003es2lan },
5445 { PCI_VDEVICE(INTEL, E1000_DEV_ID_80003ES2LAN_SERDES_SPT),
5446 board_80003es2lan },
ad68076e 5447
bc7f75fa
AK		 5448 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE), board_ich8lan },
5449 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_G), board_ich8lan },
5450 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IFE_GT), board_ich8lan },
5451 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_AMT), board_ich8lan },
5452 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_C), board_ich8lan },
5453 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M), board_ich8lan },
5454 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_IGP_M_AMT), board_ich8lan },
9e135a2e 5455 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH8_82567V_3), board_ich8lan },
ad68076e 5456
bc7f75fa
AK		 5457 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE), board_ich9lan },
5458 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_G), board_ich9lan },
5459 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IFE_GT), board_ich9lan },
5460 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_AMT), board_ich9lan },
5461 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_C), board_ich9lan },
2f15f9d6 5462 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_BM), board_ich9lan },
97ac8cae
BA		 5463 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M), board_ich9lan },
5464 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_AMT), board_ich9lan },
5465 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH9_IGP_M_V), board_ich9lan },
5466
5467 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LM), board_ich9lan },
5468 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_LF), board_ich9lan },
5469 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_R_BM_V), board_ich9lan },
bc7f75fa 5470
f4187b56
BA		 5471 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LM), board_ich10lan },
5472 { PCI_VDEVICE(INTEL, E1000_DEV_ID_ICH10_D_BM_LF), board_ich10lan },
5473
a4f58f54
BA		 5474 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LM), board_pchlan },
5475 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_M_HV_LC), board_pchlan },
5476 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DM), board_pchlan },
5477 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_D_HV_DC), board_pchlan },
5478
bc7f75fa
AK		 5479 { } /* terminate list */
5480};
5481MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
5482
a0340162 5483#ifdef CONFIG_PM_OPS
23606cf5 5484static const struct dev_pm_ops e1000_pm_ops = {
a0340162
RW		 5485 SET_SYSTEM_SLEEP_PM_OPS(e1000_suspend, e1000_resume)
5486 SET_RUNTIME_PM_OPS(e1000_runtime_suspend,
5487 e1000_runtime_resume, e1000_idle)
23606cf5 5488};
e50208a0 5489#endif
23606cf5 5490
bc7f75fa
AK		 5491/* PCI Device API Driver */
5492static struct pci_driver e1000_driver = {
5493 .name = e1000e_driver_name,
5494 .id_table = e1000_pci_tbl,
5495 .probe = e1000_probe,
5496 .remove = __devexit_p(e1000_remove),
a0340162 5497#ifdef CONFIG_PM_OPS
23606cf5 5498 .driver.pm = &e1000_pm_ops,
bc7f75fa
AK		 5499#endif
5500 .shutdown = e1000_shutdown,
5501 .err_handler = &e1000_err_handler
5502};
5503
5504/**
5505 * e1000_init_module - Driver Registration Routine
5506 *
5507 * e1000_init_module is the first routine called when the driver is
5508 * loaded. All it does is register with the PCI subsystem.
5509 **/
5510static int __init e1000_init_module(void)
5511{
5512 int ret;
8544b9f7
BA		 5513 pr_info("Intel(R) PRO/1000 Network Driver - %s\n",
5514 e1000e_driver_version);
5515 pr_info("Copyright (c) 1999 - 2009 Intel Corporation.\n");
bc7f75fa 5516 ret = pci_register_driver(&e1000_driver);
53ec5498 5517
bc7f75fa
AK		 5518 return ret;
5519}
5520module_init(e1000_init_module);
5521
5522/**
5523 * e1000_exit_module - Driver Exit Cleanup Routine
5524 *
5525 * e1000_exit_module is called just before the driver is removed
5526 * from memory.
5527 **/
5528static void __exit e1000_exit_module(void)
5529{
5530 pci_unregister_driver(&e1000_driver);
5531}
5532module_exit(e1000_exit_module);
5533
5534
5535MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
5536MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
5537MODULE_LICENSE("GPL");
5538MODULE_VERSION(DRV_VERSION);
5539
5540/* e1000_main.c */
Clone of davem's net-next-2.6 tree