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[net-next-2.6.git] / drivers / net / e1000 / e1000_main.c
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1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
15b2bee2 34#define DRV_VERSION "7.3.21-k3-NAPI"
abec42a4
SH		 35const char e1000_driver_version[] = DRV_VERSION;
36static const char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 37
38/* e1000_pci_tbl - PCI Device ID Table
39 *
40 * Last entry must be all 0s
41 *
42 * Macro expands to...
43 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
44 */
45static struct pci_device_id e1000_pci_tbl[] = {
46 INTEL_E1000_ETHERNET_DEVICE(0x1000),
47 INTEL_E1000_ETHERNET_DEVICE(0x1001),
48 INTEL_E1000_ETHERNET_DEVICE(0x1004),
49 INTEL_E1000_ETHERNET_DEVICE(0x1008),
50 INTEL_E1000_ETHERNET_DEVICE(0x1009),
51 INTEL_E1000_ETHERNET_DEVICE(0x100C),
52 INTEL_E1000_ETHERNET_DEVICE(0x100D),
53 INTEL_E1000_ETHERNET_DEVICE(0x100E),
54 INTEL_E1000_ETHERNET_DEVICE(0x100F),
55 INTEL_E1000_ETHERNET_DEVICE(0x1010),
56 INTEL_E1000_ETHERNET_DEVICE(0x1011),
57 INTEL_E1000_ETHERNET_DEVICE(0x1012),
58 INTEL_E1000_ETHERNET_DEVICE(0x1013),
59 INTEL_E1000_ETHERNET_DEVICE(0x1014),
60 INTEL_E1000_ETHERNET_DEVICE(0x1015),
61 INTEL_E1000_ETHERNET_DEVICE(0x1016),
62 INTEL_E1000_ETHERNET_DEVICE(0x1017),
63 INTEL_E1000_ETHERNET_DEVICE(0x1018),
64 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 65 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 66 INTEL_E1000_ETHERNET_DEVICE(0x101D),
67 INTEL_E1000_ETHERNET_DEVICE(0x101E),
68 INTEL_E1000_ETHERNET_DEVICE(0x1026),
69 INTEL_E1000_ETHERNET_DEVICE(0x1027),
70 INTEL_E1000_ETHERNET_DEVICE(0x1028),
71 INTEL_E1000_ETHERNET_DEVICE(0x1075),
72 INTEL_E1000_ETHERNET_DEVICE(0x1076),
73 INTEL_E1000_ETHERNET_DEVICE(0x1077),
74 INTEL_E1000_ETHERNET_DEVICE(0x1078),
75 INTEL_E1000_ETHERNET_DEVICE(0x1079),
76 INTEL_E1000_ETHERNET_DEVICE(0x107A),
77 INTEL_E1000_ETHERNET_DEVICE(0x107B),
78 INTEL_E1000_ETHERNET_DEVICE(0x107C),
79 INTEL_E1000_ETHERNET_DEVICE(0x108A),
b7ee49db 80 INTEL_E1000_ETHERNET_DEVICE(0x1099),
b7ee49db 81 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
1da177e4
LT		 82 /* required last entry */
83 {0,}
84};
85
86MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
87
35574764
NN		 88int e1000_up(struct e1000_adapter *adapter);
89void e1000_down(struct e1000_adapter *adapter);
90void e1000_reinit_locked(struct e1000_adapter *adapter);
91void e1000_reset(struct e1000_adapter *adapter);
406874a7 92int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx);
35574764
NN		 93int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
94int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
95void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
96void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 97static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 98 struct e1000_tx_ring *txdr);
3ad2cc67 99static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 100 struct e1000_rx_ring *rxdr);
3ad2cc67 101static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 102 struct e1000_tx_ring *tx_ring);
3ad2cc67 103static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 104 struct e1000_rx_ring *rx_ring);
105void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 106
107static int e1000_init_module(void);
108static void e1000_exit_module(void);
109static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
110static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 111static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 112static int e1000_sw_init(struct e1000_adapter *adapter);
113static int e1000_open(struct net_device *netdev);
114static int e1000_close(struct net_device *netdev);
115static void e1000_configure_tx(struct e1000_adapter *adapter);
116static void e1000_configure_rx(struct e1000_adapter *adapter);
117static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 118static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
119static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
120static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
121 struct e1000_tx_ring *tx_ring);
122static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
123 struct e1000_rx_ring *rx_ring);
db0ce50d 124static void e1000_set_rx_mode(struct net_device *netdev);
1da177e4
LT		 125static void e1000_update_phy_info(unsigned long data);
126static void e1000_watchdog(unsigned long data);
1da177e4
LT		 127static void e1000_82547_tx_fifo_stall(unsigned long data);
128static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
129static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
130static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
131static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 132static irqreturn_t e1000_intr(int irq, void *data);
9ac98284 133static irqreturn_t e1000_intr_msi(int irq, void *data);
c3033b01
JP		 134static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
135 struct e1000_tx_ring *tx_ring);
bea3348e 136static int e1000_clean(struct napi_struct *napi, int budget);
c3033b01
JP		 137static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
138 struct e1000_rx_ring *rx_ring,
139 int *work_done, int work_to_do);
581d708e 140static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 141 struct e1000_rx_ring *rx_ring,
142 int cleaned_count);
1da177e4
LT		 143static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
144static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
145 int cmd);
1da177e4
LT		 146static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
147static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
148static void e1000_tx_timeout(struct net_device *dev);
65f27f38 149static void e1000_reset_task(struct work_struct *work);
1da177e4 150static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 151static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
152 struct sk_buff *skb);
1da177e4
LT		 153
154static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
406874a7
JP		 155static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid);
156static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid);
1da177e4
LT		 157static void e1000_restore_vlan(struct e1000_adapter *adapter);
158
6fdfef16 159#ifdef CONFIG_PM
b43fcd7d 160static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 161static int e1000_resume(struct pci_dev *pdev);
162#endif
c653e635 163static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 164
165#ifdef CONFIG_NET_POLL_CONTROLLER
166/* for netdump / net console */
167static void e1000_netpoll (struct net_device *netdev);
168#endif
169
1f753861
JB		 170#define COPYBREAK_DEFAULT 256
171static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
172module_param(copybreak, uint, 0644);
173MODULE_PARM_DESC(copybreak,
174 "Maximum size of packet that is copied to a new buffer on receive");
175
9026729b
AK		 176static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
177 pci_channel_state_t state);
178static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
179static void e1000_io_resume(struct pci_dev *pdev);
180
181static struct pci_error_handlers e1000_err_handler = {
182 .error_detected = e1000_io_error_detected,
183 .slot_reset = e1000_io_slot_reset,
184 .resume = e1000_io_resume,
185};
24025e4e 186
1da177e4
LT		 187static struct pci_driver e1000_driver = {
188 .name = e1000_driver_name,
189 .id_table = e1000_pci_tbl,
190 .probe = e1000_probe,
191 .remove = __devexit_p(e1000_remove),
c4e24f01 192#ifdef CONFIG_PM
1da177e4 193 /* Power Managment Hooks */
1da177e4 194 .suspend = e1000_suspend,
c653e635 195 .resume = e1000_resume,
1da177e4 196#endif
9026729b
AK		 197 .shutdown = e1000_shutdown,
198 .err_handler = &e1000_err_handler
1da177e4
LT		 199};
200
201MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
202MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
203MODULE_LICENSE("GPL");
204MODULE_VERSION(DRV_VERSION);
205
206static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
207module_param(debug, int, 0);
208MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
209
210/**
211 * e1000_init_module - Driver Registration Routine
212 *
213 * e1000_init_module is the first routine called when the driver is
214 * loaded. All it does is register with the PCI subsystem.
215 **/
216
64798845 217static int __init e1000_init_module(void)
1da177e4
LT		 218{
219 int ret;
220 printk(KERN_INFO "%s - version %s\n",
221 e1000_driver_string, e1000_driver_version);
222
223 printk(KERN_INFO "%s\n", e1000_copyright);
224
29917620 225 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 226 if (copybreak != COPYBREAK_DEFAULT) {
227 if (copybreak == 0)
228 printk(KERN_INFO "e1000: copybreak disabled\n");
229 else
230 printk(KERN_INFO "e1000: copybreak enabled for "
231 "packets <= %u bytes\n", copybreak);
232 }
1da177e4
LT		 233 return ret;
234}
235
236module_init(e1000_init_module);
237
238/**
239 * e1000_exit_module - Driver Exit Cleanup Routine
240 *
241 * e1000_exit_module is called just before the driver is removed
242 * from memory.
243 **/
244
64798845 245static void __exit e1000_exit_module(void)
1da177e4 246{
1da177e4
LT		 247 pci_unregister_driver(&e1000_driver);
248}
249
250module_exit(e1000_exit_module);
251
2db10a08
AK		 252static int e1000_request_irq(struct e1000_adapter *adapter)
253{
1dc32918 254 struct e1000_hw *hw = &adapter->hw;
2db10a08 255 struct net_device *netdev = adapter->netdev;
3e18826c 256 irq_handler_t handler = e1000_intr;
e94bd23f
AK		 257 int irq_flags = IRQF_SHARED;
258 int err;
2db10a08 259
1dc32918 260 if (hw->mac_type >= e1000_82571) {
e94bd23f
AK		 261 adapter->have_msi = !pci_enable_msi(adapter->pdev);
262 if (adapter->have_msi) {
3e18826c 263 handler = e1000_intr_msi;
e94bd23f 264 irq_flags = 0;
2db10a08
AK		 265 }
266 }
e94bd23f
AK		 267
268 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
269 netdev);
270 if (err) {
271 if (adapter->have_msi)
272 pci_disable_msi(adapter->pdev);
2db10a08
AK		 273 DPRINTK(PROBE, ERR,
274 "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 275 }
2db10a08
AK		 276
277 return err;
278}
279
280static void e1000_free_irq(struct e1000_adapter *adapter)
281{
282 struct net_device *netdev = adapter->netdev;
283
284 free_irq(adapter->pdev->irq, netdev);
285
2db10a08
AK		 286 if (adapter->have_msi)
287 pci_disable_msi(adapter->pdev);
2db10a08
AK		 288}
289
1da177e4
LT		 290/**
291 * e1000_irq_disable - Mask off interrupt generation on the NIC
292 * @adapter: board private structure
293 **/
294
64798845 295static void e1000_irq_disable(struct e1000_adapter *adapter)
1da177e4 296{
1dc32918
JP		 297 struct e1000_hw *hw = &adapter->hw;
298
299 ew32(IMC, ~0);
300 E1000_WRITE_FLUSH();
1da177e4
LT		 301 synchronize_irq(adapter->pdev->irq);
302}
303
304/**
305 * e1000_irq_enable - Enable default interrupt generation settings
306 * @adapter: board private structure
307 **/
308
64798845 309static void e1000_irq_enable(struct e1000_adapter *adapter)
1da177e4 310{
1dc32918
JP		 311 struct e1000_hw *hw = &adapter->hw;
312
313 ew32(IMS, IMS_ENABLE_MASK);
314 E1000_WRITE_FLUSH();
1da177e4 315}
3ad2cc67 316
64798845 317static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2d7edb92 318{
1dc32918 319 struct e1000_hw *hw = &adapter->hw;
2d7edb92 320 struct net_device *netdev = adapter->netdev;
1dc32918 321 u16 vid = hw->mng_cookie.vlan_id;
406874a7 322 u16 old_vid = adapter->mng_vlan_id;
96838a40 323 if (adapter->vlgrp) {
5c15bdec 324 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
1dc32918 325 if (hw->mng_cookie.status &
2d7edb92
MC		 326 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
327 e1000_vlan_rx_add_vid(netdev, vid);
328 adapter->mng_vlan_id = vid;
329 } else
330 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 331
406874a7 332 if ((old_vid != (u16)E1000_MNG_VLAN_NONE) &&
96838a40 333 (vid != old_vid) &&
5c15bdec 334 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 335 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 336 } else
337 adapter->mng_vlan_id = vid;
2d7edb92
MC		 338 }
339}
b55ccb35
JK		 340
341/**
342 * e1000_release_hw_control - release control of the h/w to f/w
343 * @adapter: address of board private structure
344 *
345 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
346 * For ASF and Pass Through versions of f/w this means that the
347 * driver is no longer loaded. For AMT version (only with 82573) i
90fb5135 348 * of the f/w this means that the network i/f is closed.
76c224bc 349 *
b55ccb35
JK		 350 **/
351
64798845 352static void e1000_release_hw_control(struct e1000_adapter *adapter)
b55ccb35 353{
406874a7
JP		 354 u32 ctrl_ext;
355 u32 swsm;
1dc32918 356 struct e1000_hw *hw = &adapter->hw;
b55ccb35
JK		 357
358 /* Let firmware taken over control of h/w */
1dc32918 359 switch (hw->mac_type) {
b55ccb35 360 case e1000_82573:
1dc32918
JP		 361 swsm = er32(SWSM);
362 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
31d76442
BA		 363 break;
364 case e1000_82571:
365 case e1000_82572:
366 case e1000_80003es2lan:
cd94dd0b 367 case e1000_ich8lan:
1dc32918
JP		 368 ctrl_ext = er32(CTRL_EXT);
369 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 370 break;
b55ccb35
JK		 371 default:
372 break;
373 }
374}
375
376/**
377 * e1000_get_hw_control - get control of the h/w from f/w
378 * @adapter: address of board private structure
379 *
380 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 381 * For ASF and Pass Through versions of f/w this means that
382 * the driver is loaded. For AMT version (only with 82573)
90fb5135 383 * of the f/w this means that the network i/f is open.
76c224bc 384 *
b55ccb35
JK		 385 **/
386
64798845 387static void e1000_get_hw_control(struct e1000_adapter *adapter)
b55ccb35 388{
406874a7
JP		 389 u32 ctrl_ext;
390 u32 swsm;
1dc32918 391 struct e1000_hw *hw = &adapter->hw;
90fb5135 392
b55ccb35 393 /* Let firmware know the driver has taken over */
1dc32918 394 switch (hw->mac_type) {
b55ccb35 395 case e1000_82573:
1dc32918
JP		 396 swsm = er32(SWSM);
397 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
b55ccb35 398 break;
31d76442
BA		 399 case e1000_82571:
400 case e1000_82572:
401 case e1000_80003es2lan:
cd94dd0b 402 case e1000_ich8lan:
1dc32918
JP		 403 ctrl_ext = er32(CTRL_EXT);
404 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 405 break;
b55ccb35
JK		 406 default:
407 break;
408 }
409}
410
64798845 411static void e1000_init_manageability(struct e1000_adapter *adapter)
0fccd0e9 412{
1dc32918
JP		 413 struct e1000_hw *hw = &adapter->hw;
414
0fccd0e9 415 if (adapter->en_mng_pt) {
1dc32918 416 u32 manc = er32(MANC);
0fccd0e9
JG		 417
418 /* disable hardware interception of ARP */
419 manc &= ~(E1000_MANC_ARP_EN);
420
421 /* enable receiving management packets to the host */
422 /* this will probably generate destination unreachable messages
423 * from the host OS, but the packets will be handled on SMBUS */
1dc32918
JP		 424 if (hw->has_manc2h) {
425 u32 manc2h = er32(MANC2H);
0fccd0e9
JG		 426
427 manc |= E1000_MANC_EN_MNG2HOST;
428#define E1000_MNG2HOST_PORT_623 (1 << 5)
429#define E1000_MNG2HOST_PORT_664 (1 << 6)
430 manc2h |= E1000_MNG2HOST_PORT_623;
431 manc2h |= E1000_MNG2HOST_PORT_664;
1dc32918 432 ew32(MANC2H, manc2h);
0fccd0e9
JG		 433 }
434
1dc32918 435 ew32(MANC, manc);
0fccd0e9
JG		 436 }
437}
438
64798845 439static void e1000_release_manageability(struct e1000_adapter *adapter)
0fccd0e9 440{
1dc32918
JP		 441 struct e1000_hw *hw = &adapter->hw;
442
0fccd0e9 443 if (adapter->en_mng_pt) {
1dc32918 444 u32 manc = er32(MANC);
0fccd0e9
JG		 445
446 /* re-enable hardware interception of ARP */
447 manc |= E1000_MANC_ARP_EN;
448
1dc32918 449 if (hw->has_manc2h)
0fccd0e9
JG		 450 manc &= ~E1000_MANC_EN_MNG2HOST;
451
452 /* don't explicitly have to mess with MANC2H since
453 * MANC has an enable disable that gates MANC2H */
454
1dc32918 455 ew32(MANC, manc);
0fccd0e9
JG		 456 }
457}
458
e0aac5a2
AK		 459/**
460 * e1000_configure - configure the hardware for RX and TX
461 * @adapter = private board structure
462 **/
463static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 464{
465 struct net_device *netdev = adapter->netdev;
2db10a08 466 int i;
1da177e4 467
db0ce50d 468 e1000_set_rx_mode(netdev);
1da177e4
LT		 469
470 e1000_restore_vlan(adapter);
0fccd0e9 471 e1000_init_manageability(adapter);
1da177e4
LT		 472
473 e1000_configure_tx(adapter);
474 e1000_setup_rctl(adapter);
475 e1000_configure_rx(adapter);
72d64a43
JK		 476 /* call E1000_DESC_UNUSED which always leaves
477 * at least 1 descriptor unused to make sure
478 * next_to_use != next_to_clean */
f56799ea 479 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 480 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 481 adapter->alloc_rx_buf(adapter, ring,
482 E1000_DESC_UNUSED(ring));
f56799ea 483 }
1da177e4 484
7bfa4816 485 adapter->tx_queue_len = netdev->tx_queue_len;
e0aac5a2
AK		 486}
487
488int e1000_up(struct e1000_adapter *adapter)
489{
1dc32918
JP		 490 struct e1000_hw *hw = &adapter->hw;
491
e0aac5a2
AK		 492 /* hardware has been reset, we need to reload some things */
493 e1000_configure(adapter);
494
495 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 496
bea3348e 497 napi_enable(&adapter->napi);
c3570acb 498
5de55624
MC		 499 e1000_irq_enable(adapter);
500
4cb9be7a
JB		 501 netif_wake_queue(adapter->netdev);
502
79f3d399 503 /* fire a link change interrupt to start the watchdog */
1dc32918 504 ew32(ICS, E1000_ICS_LSC);
1da177e4
LT		 505 return 0;
506}
507
79f05bf0
AK		 508/**
509 * e1000_power_up_phy - restore link in case the phy was powered down
510 * @adapter: address of board private structure
511 *
512 * The phy may be powered down to save power and turn off link when the
513 * driver is unloaded and wake on lan is not enabled (among others)
514 * *** this routine MUST be followed by a call to e1000_reset ***
515 *
516 **/
517
d658266e 518void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0 519{
1dc32918 520 struct e1000_hw *hw = &adapter->hw;
406874a7 521 u16 mii_reg = 0;
79f05bf0
AK		 522
523 /* Just clear the power down bit to wake the phy back up */
1dc32918 524 if (hw->media_type == e1000_media_type_copper) {
79f05bf0
AK		 525 /* according to the manual, the phy will retain its
526 * settings across a power-down/up cycle */
1dc32918 527 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 528 mii_reg &= ~MII_CR_POWER_DOWN;
1dc32918 529 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 530 }
531}
532
533static void e1000_power_down_phy(struct e1000_adapter *adapter)
534{
1dc32918
JP		 535 struct e1000_hw *hw = &adapter->hw;
536
61c2505f 537 /* Power down the PHY so no link is implied when interface is down *
c3033b01 538 * The PHY cannot be powered down if any of the following is true *
79f05bf0
AK		 539 * (a) WoL is enabled
540 * (b) AMT is active
541 * (c) SoL/IDER session is active */
1dc32918
JP		 542 if (!adapter->wol && hw->mac_type >= e1000_82540 &&
543 hw->media_type == e1000_media_type_copper) {
406874a7 544 u16 mii_reg = 0;
61c2505f 545
1dc32918 546 switch (hw->mac_type) {
61c2505f
BA		 547 case e1000_82540:
548 case e1000_82545:
549 case e1000_82545_rev_3:
550 case e1000_82546:
551 case e1000_82546_rev_3:
552 case e1000_82541:
553 case e1000_82541_rev_2:
554 case e1000_82547:
555 case e1000_82547_rev_2:
1dc32918 556 if (er32(MANC) & E1000_MANC_SMBUS_EN)
61c2505f
BA		 557 goto out;
558 break;
559 case e1000_82571:
560 case e1000_82572:
561 case e1000_82573:
562 case e1000_80003es2lan:
563 case e1000_ich8lan:
1dc32918
JP		 564 if (e1000_check_mng_mode(hw) ||
565 e1000_check_phy_reset_block(hw))
61c2505f
BA		 566 goto out;
567 break;
568 default:
569 goto out;
570 }
1dc32918 571 e1000_read_phy_reg(hw, PHY_CTRL, &mii_reg);
79f05bf0 572 mii_reg |= MII_CR_POWER_DOWN;
1dc32918 573 e1000_write_phy_reg(hw, PHY_CTRL, mii_reg);
79f05bf0
AK		 574 mdelay(1);
575 }
61c2505f
BA		 576out:
577 return;
79f05bf0
AK		 578}
579
64798845 580void e1000_down(struct e1000_adapter *adapter)
1da177e4 581{
a6c42322 582 struct e1000_hw *hw = &adapter->hw;
1da177e4 583 struct net_device *netdev = adapter->netdev;
a6c42322 584 u32 rctl, tctl;
1da177e4 585
1314bbf3
AK		 586 /* signal that we're down so the interrupt handler does not
587 * reschedule our watchdog timer */
588 set_bit(__E1000_DOWN, &adapter->flags);
589
a6c42322
JB		 590 /* disable receives in the hardware */
591 rctl = er32(RCTL);
592 ew32(RCTL, rctl & ~E1000_RCTL_EN);
593 /* flush and sleep below */
594
595 /* can be netif_tx_disable when NETIF_F_LLTX is removed */
596 netif_stop_queue(netdev);
597
598 /* disable transmits in the hardware */
599 tctl = er32(TCTL);
600 tctl &= ~E1000_TCTL_EN;
601 ew32(TCTL, tctl);
602 /* flush both disables and wait for them to finish */
603 E1000_WRITE_FLUSH();
604 msleep(10);
605
bea3348e 606 napi_disable(&adapter->napi);
c3570acb 607
1da177e4 608 e1000_irq_disable(adapter);
c1605eb3 609
1da177e4
LT		 610 del_timer_sync(&adapter->tx_fifo_stall_timer);
611 del_timer_sync(&adapter->watchdog_timer);
612 del_timer_sync(&adapter->phy_info_timer);
613
7bfa4816 614 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 615 adapter->link_speed = 0;
616 adapter->link_duplex = 0;
617 netif_carrier_off(netdev);
1da177e4
LT		 618
619 e1000_reset(adapter);
581d708e
MC		 620 e1000_clean_all_tx_rings(adapter);
621 e1000_clean_all_rx_rings(adapter);
1da177e4 622}
1da177e4 623
64798845 624void e1000_reinit_locked(struct e1000_adapter *adapter)
2db10a08
AK		 625{
626 WARN_ON(in_interrupt());
627 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
628 msleep(1);
629 e1000_down(adapter);
630 e1000_up(adapter);
631 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 632}
633
64798845 634void e1000_reset(struct e1000_adapter *adapter)
1da177e4 635{
1dc32918 636 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 637 u32 pba = 0, tx_space, min_tx_space, min_rx_space;
638 u16 fc_high_water_mark = E1000_FC_HIGH_DIFF;
c3033b01 639 bool legacy_pba_adjust = false;
1da177e4
LT		 640
641 /* Repartition Pba for greater than 9k mtu
642 * To take effect CTRL.RST is required.
643 */
644
1dc32918 645 switch (hw->mac_type) {
018ea44e
BA		 646 case e1000_82542_rev2_0:
647 case e1000_82542_rev2_1:
648 case e1000_82543:
649 case e1000_82544:
650 case e1000_82540:
651 case e1000_82541:
652 case e1000_82541_rev_2:
c3033b01 653 legacy_pba_adjust = true;
018ea44e
BA		 654 pba = E1000_PBA_48K;
655 break;
656 case e1000_82545:
657 case e1000_82545_rev_3:
658 case e1000_82546:
659 case e1000_82546_rev_3:
660 pba = E1000_PBA_48K;
661 break;
2d7edb92 662 case e1000_82547:
0e6ef3e0 663 case e1000_82547_rev_2:
c3033b01 664 legacy_pba_adjust = true;
2d7edb92
MC		 665 pba = E1000_PBA_30K;
666 break;
868d5309
MC		 667 case e1000_82571:
668 case e1000_82572:
6418ecc6 669 case e1000_80003es2lan:
868d5309
MC		 670 pba = E1000_PBA_38K;
671 break;
2d7edb92 672 case e1000_82573:
018ea44e 673 pba = E1000_PBA_20K;
2d7edb92 674 break;
cd94dd0b
AK		 675 case e1000_ich8lan:
676 pba = E1000_PBA_8K;
018ea44e
BA		 677 case e1000_undefined:
678 case e1000_num_macs:
2d7edb92
MC		 679 break;
680 }
681
c3033b01 682 if (legacy_pba_adjust) {
018ea44e
BA		 683 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
684 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 685
1dc32918 686 if (hw->mac_type == e1000_82547) {
018ea44e
BA		 687 adapter->tx_fifo_head = 0;
688 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
689 adapter->tx_fifo_size =
690 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
691 atomic_set(&adapter->tx_fifo_stall, 0);
692 }
1dc32918 693 } else if (hw->max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
018ea44e 694 /* adjust PBA for jumbo frames */
1dc32918 695 ew32(PBA, pba);
018ea44e
BA		 696
697 /* To maintain wire speed transmits, the Tx FIFO should be
698 * large enough to accomodate two full transmit packets,
699 * rounded up to the next 1KB and expressed in KB. Likewise,
700 * the Rx FIFO should be large enough to accomodate at least
701 * one full receive packet and is similarly rounded up and
702 * expressed in KB. */
1dc32918 703 pba = er32(PBA);
018ea44e
BA		 704 /* upper 16 bits has Tx packet buffer allocation size in KB */
705 tx_space = pba >> 16;
706 /* lower 16 bits has Rx packet buffer allocation size in KB */
707 pba &= 0xffff;
708 /* don't include ethernet FCS because hardware appends/strips */
709 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
710 VLAN_TAG_SIZE;
711 min_tx_space = min_rx_space;
712 min_tx_space *= 2;
9099cfb9 713 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 714 min_tx_space >>= 10;
9099cfb9 715 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 716 min_rx_space >>= 10;
717
718 /* If current Tx allocation is less than the min Tx FIFO size,
719 * and the min Tx FIFO size is less than the current Rx FIFO
720 * allocation, take space away from current Rx allocation */
721 if (tx_space < min_tx_space &&
722 ((min_tx_space - tx_space) < pba)) {
723 pba = pba - (min_tx_space - tx_space);
724
725 /* PCI/PCIx hardware has PBA alignment constraints */
1dc32918 726 switch (hw->mac_type) {
018ea44e
BA		 727 case e1000_82545 ... e1000_82546_rev_3:
728 pba &= ~(E1000_PBA_8K - 1);
729 break;
730 default:
731 break;
732 }
733
734 /* if short on rx space, rx wins and must trump tx
735 * adjustment or use Early Receive if available */
736 if (pba < min_rx_space) {
1dc32918 737 switch (hw->mac_type) {
018ea44e
BA		 738 case e1000_82573:
739 /* ERT enabled in e1000_configure_rx */
740 break;
741 default:
742 pba = min_rx_space;
743 break;
744 }
745 }
746 }
1da177e4 747 }
2d7edb92 748
1dc32918 749 ew32(PBA, pba);
1da177e4
LT		 750
751 /* flow control settings */
f11b7f85
JK		 752 /* Set the FC high water mark to 90% of the FIFO size.
753 * Required to clear last 3 LSB */
754 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 755 /* We can't use 90% on small FIFOs because the remainder
756 * would be less than 1 full frame. In this case, we size
757 * it to allow at least a full frame above the high water
758 * mark. */
759 if (pba < E1000_PBA_16K)
760 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85 761
1dc32918
JP		 762 hw->fc_high_water = fc_high_water_mark;
763 hw->fc_low_water = fc_high_water_mark - 8;
764 if (hw->mac_type == e1000_80003es2lan)
765 hw->fc_pause_time = 0xFFFF;
87041639 766 else
1dc32918
JP		 767 hw->fc_pause_time = E1000_FC_PAUSE_TIME;
768 hw->fc_send_xon = 1;
769 hw->fc = hw->original_fc;
1da177e4 770
2d7edb92 771 /* Allow time for pending master requests to run */
1dc32918
JP		 772 e1000_reset_hw(hw);
773 if (hw->mac_type >= e1000_82544)
774 ew32(WUC, 0);
09ae3e88 775
1dc32918 776 if (e1000_init_hw(hw))
1da177e4 777 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 778 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 779
780 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
1dc32918
JP		 781 if (hw->mac_type >= e1000_82544 &&
782 hw->mac_type <= e1000_82547_rev_2 &&
783 hw->autoneg == 1 &&
784 hw->autoneg_advertised == ADVERTISE_1000_FULL) {
785 u32 ctrl = er32(CTRL);
3d5460a0
JB		 786 /* clear phy power management bit if we are in gig only mode,
787 * which if enabled will attempt negotiation to 100Mb, which
788 * can cause a loss of link at power off or driver unload */
789 ctrl &= ~E1000_CTRL_SWDPIN3;
1dc32918 790 ew32(CTRL, ctrl);
3d5460a0
JB		 791 }
792
1da177e4 793 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
1dc32918 794 ew32(VET, ETHERNET_IEEE_VLAN_TYPE);
1da177e4 795
1dc32918
JP		 796 e1000_reset_adaptive(hw);
797 e1000_phy_get_info(hw, &adapter->phy_info);
9a53a202
AK		 798
799 if (!adapter->smart_power_down &&
1dc32918
JP		 800 (hw->mac_type == e1000_82571 ||
801 hw->mac_type == e1000_82572)) {
406874a7 802 u16 phy_data = 0;
9a53a202
AK		 803 /* speed up time to link by disabling smart power down, ignore
804 * the return value of this function because there is nothing
805 * different we would do if it failed */
1dc32918 806 e1000_read_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 807 &phy_data);
808 phy_data &= ~IGP02E1000_PM_SPD;
1dc32918 809 e1000_write_phy_reg(hw, IGP02E1000_PHY_POWER_MGMT,
9a53a202
AK		 810 phy_data);
811 }
812
0fccd0e9 813 e1000_release_manageability(adapter);
1da177e4
LT		 814}
815
67b3c27c
AK		 816/**
817 * Dump the eeprom for users having checksum issues
818 **/
b4ea895d 819static void e1000_dump_eeprom(struct e1000_adapter *adapter)
67b3c27c
AK		 820{
821 struct net_device *netdev = adapter->netdev;
822 struct ethtool_eeprom eeprom;
823 const struct ethtool_ops *ops = netdev->ethtool_ops;
824 u8 *data;
825 int i;
826 u16 csum_old, csum_new = 0;
827
828 eeprom.len = ops->get_eeprom_len(netdev);
829 eeprom.offset = 0;
830
831 data = kmalloc(eeprom.len, GFP_KERNEL);
832 if (!data) {
833 printk(KERN_ERR "Unable to allocate memory to dump EEPROM"
834 " data\n");
835 return;
836 }
837
838 ops->get_eeprom(netdev, &eeprom, data);
839
840 csum_old = (data[EEPROM_CHECKSUM_REG * 2]) +
841 (data[EEPROM_CHECKSUM_REG * 2 + 1] << 8);
842 for (i = 0; i < EEPROM_CHECKSUM_REG * 2; i += 2)
843 csum_new += data[i] + (data[i + 1] << 8);
844 csum_new = EEPROM_SUM - csum_new;
845
846 printk(KERN_ERR "/*********************/\n");
847 printk(KERN_ERR "Current EEPROM Checksum : 0x%04x\n", csum_old);
848 printk(KERN_ERR "Calculated : 0x%04x\n", csum_new);
849
850 printk(KERN_ERR "Offset Values\n");
851 printk(KERN_ERR "======== ======\n");
852 print_hex_dump(KERN_ERR, "", DUMP_PREFIX_OFFSET, 16, 1, data, 128, 0);
853
854 printk(KERN_ERR "Include this output when contacting your support "
855 "provider.\n");
856 printk(KERN_ERR "This is not a software error! Something bad "
857 "happened to your hardware or\n");
858 printk(KERN_ERR "EEPROM image. Ignoring this "
859 "problem could result in further problems,\n");
860 printk(KERN_ERR "possibly loss of data, corruption or system hangs!\n");
861 printk(KERN_ERR "The MAC Address will be reset to 00:00:00:00:00:00, "
862 "which is invalid\n");
863 printk(KERN_ERR "and requires you to set the proper MAC "
864 "address manually before continuing\n");
865 printk(KERN_ERR "to enable this network device.\n");
866 printk(KERN_ERR "Please inspect the EEPROM dump and report the issue "
867 "to your hardware vendor\n");
63cd31f6 868 printk(KERN_ERR "or Intel Customer Support.\n");
67b3c27c
AK		 869 printk(KERN_ERR "/*********************/\n");
870
871 kfree(data);
872}
873
81250297
TI		 874/**
875 * e1000_is_need_ioport - determine if an adapter needs ioport resources or not
876 * @pdev: PCI device information struct
877 *
878 * Return true if an adapter needs ioport resources
879 **/
880static int e1000_is_need_ioport(struct pci_dev *pdev)
881{
882 switch (pdev->device) {
883 case E1000_DEV_ID_82540EM:
884 case E1000_DEV_ID_82540EM_LOM:
885 case E1000_DEV_ID_82540EP:
886 case E1000_DEV_ID_82540EP_LOM:
887 case E1000_DEV_ID_82540EP_LP:
888 case E1000_DEV_ID_82541EI:
889 case E1000_DEV_ID_82541EI_MOBILE:
890 case E1000_DEV_ID_82541ER:
891 case E1000_DEV_ID_82541ER_LOM:
892 case E1000_DEV_ID_82541GI:
893 case E1000_DEV_ID_82541GI_LF:
894 case E1000_DEV_ID_82541GI_MOBILE:
895 case E1000_DEV_ID_82544EI_COPPER:
896 case E1000_DEV_ID_82544EI_FIBER:
897 case E1000_DEV_ID_82544GC_COPPER:
898 case E1000_DEV_ID_82544GC_LOM:
899 case E1000_DEV_ID_82545EM_COPPER:
900 case E1000_DEV_ID_82545EM_FIBER:
901 case E1000_DEV_ID_82546EB_COPPER:
902 case E1000_DEV_ID_82546EB_FIBER:
903 case E1000_DEV_ID_82546EB_QUAD_COPPER:
904 return true;
905 default:
906 return false;
907 }
908}
909
0e7614bc
SH		 910static const struct net_device_ops e1000_netdev_ops = {
911 .ndo_open = e1000_open,
912 .ndo_stop = e1000_close,
00829823 913 .ndo_start_xmit = e1000_xmit_frame,
0e7614bc
SH		 914 .ndo_get_stats = e1000_get_stats,
915 .ndo_set_rx_mode = e1000_set_rx_mode,
916 .ndo_set_mac_address = e1000_set_mac,
917 .ndo_tx_timeout = e1000_tx_timeout,
918 .ndo_change_mtu = e1000_change_mtu,
919 .ndo_do_ioctl = e1000_ioctl,
920 .ndo_validate_addr = eth_validate_addr,
921
922 .ndo_vlan_rx_register = e1000_vlan_rx_register,
923 .ndo_vlan_rx_add_vid = e1000_vlan_rx_add_vid,
924 .ndo_vlan_rx_kill_vid = e1000_vlan_rx_kill_vid,
925#ifdef CONFIG_NET_POLL_CONTROLLER
926 .ndo_poll_controller = e1000_netpoll,
927#endif
928};
929
1da177e4
LT		 930/**
931 * e1000_probe - Device Initialization Routine
932 * @pdev: PCI device information struct
933 * @ent: entry in e1000_pci_tbl
934 *
935 * Returns 0 on success, negative on failure
936 *
937 * e1000_probe initializes an adapter identified by a pci_dev structure.
938 * The OS initialization, configuring of the adapter private structure,
939 * and a hardware reset occur.
940 **/
1dc32918
JP		 941static int __devinit e1000_probe(struct pci_dev *pdev,
942 const struct pci_device_id *ent)
1da177e4
LT		 943{
944 struct net_device *netdev;
945 struct e1000_adapter *adapter;
1dc32918 946 struct e1000_hw *hw;
2d7edb92 947
1da177e4 948 static int cards_found = 0;
120cd576 949 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 950 int i, err, pci_using_dac;
406874a7
JP		 951 u16 eeprom_data = 0;
952 u16 eeprom_apme_mask = E1000_EEPROM_APME;
81250297 953 int bars, need_ioport;
0795af57 954
81250297
TI		 955 /* do not allocate ioport bars when not needed */
956 need_ioport = e1000_is_need_ioport(pdev);
957 if (need_ioport) {
958 bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
959 err = pci_enable_device(pdev);
960 } else {
961 bars = pci_select_bars(pdev, IORESOURCE_MEM);
4d7155b9 962 err = pci_enable_device_mem(pdev);
81250297 963 }
c7be73bc 964 if (err)
1da177e4
LT		 965 return err;
966
6a35528a
YH		 967 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
968 !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
1da177e4
LT		 969 pci_using_dac = 1;
970 } else {
284901a9 971 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
c7be73bc 972 if (err) {
284901a9 973 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
c7be73bc
JP		 974 if (err) {
975 E1000_ERR("No usable DMA configuration, "
976 "aborting\n");
977 goto err_dma;
978 }
1da177e4
LT		 979 }
980 pci_using_dac = 0;
981 }
982
81250297 983 err = pci_request_selected_regions(pdev, bars, e1000_driver_name);
c7be73bc 984 if (err)
6dd62ab0 985 goto err_pci_reg;
1da177e4
LT		 986
987 pci_set_master(pdev);
988
6dd62ab0 989 err = -ENOMEM;
1da177e4 990 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 991 if (!netdev)
1da177e4 992 goto err_alloc_etherdev;
1da177e4 993
1da177e4
LT		 994 SET_NETDEV_DEV(netdev, &pdev->dev);
995
996 pci_set_drvdata(pdev, netdev);
60490fe0 997 adapter = netdev_priv(netdev);
1da177e4
LT		 998 adapter->netdev = netdev;
999 adapter->pdev = pdev;
1da177e4 1000 adapter->msg_enable = (1 << debug) - 1;
81250297
TI		 1001 adapter->bars = bars;
1002 adapter->need_ioport = need_ioport;
1da177e4 1003
1dc32918
JP		 1004 hw = &adapter->hw;
1005 hw->back = adapter;
1006
6dd62ab0 1007 err = -EIO;
275f165f 1008 hw->hw_addr = pci_ioremap_bar(pdev, BAR_0);
1dc32918 1009 if (!hw->hw_addr)
1da177e4 1010 goto err_ioremap;
1da177e4 1011
81250297
TI		 1012 if (adapter->need_ioport) {
1013 for (i = BAR_1; i <= BAR_5; i++) {
1014 if (pci_resource_len(pdev, i) == 0)
1015 continue;
1016 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1017 hw->io_base = pci_resource_start(pdev, i);
1018 break;
1019 }
1da177e4
LT		 1020 }
1021 }
1022
0e7614bc 1023 netdev->netdev_ops = &e1000_netdev_ops;
1da177e4 1024 e1000_set_ethtool_ops(netdev);
1da177e4 1025 netdev->watchdog_timeo = 5 * HZ;
bea3348e 1026 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
0e7614bc 1027
0eb5a34c 1028 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4 1029
1da177e4
LT		 1030 adapter->bd_number = cards_found;
1031
1032 /* setup the private structure */
1033
c7be73bc
JP		 1034 err = e1000_sw_init(adapter);
1035 if (err)
1da177e4
LT		 1036 goto err_sw_init;
1037
6dd62ab0 1038 err = -EIO;
cd94dd0b
AK		 1039 /* Flash BAR mapping must happen after e1000_sw_init
1040 * because it depends on mac_type */
1dc32918 1041 if ((hw->mac_type == e1000_ich8lan) &&
cd94dd0b 1042 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
275f165f 1043 hw->flash_address = pci_ioremap_bar(pdev, 1);
1dc32918 1044 if (!hw->flash_address)
cd94dd0b 1045 goto err_flashmap;
cd94dd0b
AK		 1046 }
1047
1dc32918 1048 if (e1000_check_phy_reset_block(hw))
2d7edb92
MC		 1049 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
1050
1dc32918 1051 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 1052 netdev->features = NETIF_F_SG |
1053 NETIF_F_HW_CSUM |
1054 NETIF_F_HW_VLAN_TX |
1055 NETIF_F_HW_VLAN_RX |
1056 NETIF_F_HW_VLAN_FILTER;
1dc32918 1057 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 1058 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 1059 }
1060
1dc32918
JP		 1061 if ((hw->mac_type >= e1000_82544) &&
1062 (hw->mac_type != e1000_82547))
1da177e4 1063 netdev->features |= NETIF_F_TSO;
2d7edb92 1064
1dc32918 1065 if (hw->mac_type > e1000_82547_rev_2)
87ca4e5b 1066 netdev->features |= NETIF_F_TSO6;
96838a40 1067 if (pci_using_dac)
1da177e4
LT		 1068 netdev->features |= NETIF_F_HIGHDMA;
1069
20501a69
PM		 1070 netdev->vlan_features |= NETIF_F_TSO;
1071 netdev->vlan_features |= NETIF_F_TSO6;
1072 netdev->vlan_features |= NETIF_F_HW_CSUM;
1073 netdev->vlan_features |= NETIF_F_SG;
1074
1dc32918 1075 adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2d7edb92 1076
cd94dd0b 1077 /* initialize eeprom parameters */
1dc32918 1078 if (e1000_init_eeprom_params(hw)) {
cd94dd0b 1079 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 1080 goto err_eeprom;
cd94dd0b
AK		 1081 }
1082
96838a40 1083 /* before reading the EEPROM, reset the controller to
1da177e4 1084 * put the device in a known good starting state */
96838a40 1085
1dc32918 1086 e1000_reset_hw(hw);
1da177e4
LT		 1087
1088 /* make sure the EEPROM is good */
1dc32918 1089 if (e1000_validate_eeprom_checksum(hw) < 0) {
1da177e4 1090 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
67b3c27c
AK		 1091 e1000_dump_eeprom(adapter);
1092 /*
1093 * set MAC address to all zeroes to invalidate and temporary
1094 * disable this device for the user. This blocks regular
1095 * traffic while still permitting ethtool ioctls from reaching
1096 * the hardware as well as allowing the user to run the
1097 * interface after manually setting a hw addr using
1098 * `ip set address`
1099 */
1dc32918 1100 memset(hw->mac_addr, 0, netdev->addr_len);
67b3c27c
AK		 1101 } else {
1102 /* copy the MAC address out of the EEPROM */
1dc32918 1103 if (e1000_read_mac_addr(hw))
67b3c27c 1104 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1da177e4 1105 }
67b3c27c 1106 /* don't block initalization here due to bad MAC address */
1dc32918
JP		 1107 memcpy(netdev->dev_addr, hw->mac_addr, netdev->addr_len);
1108 memcpy(netdev->perm_addr, hw->mac_addr, netdev->addr_len);
1da177e4 1109
67b3c27c 1110 if (!is_valid_ether_addr(netdev->perm_addr))
1da177e4 1111 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4 1112
1dc32918 1113 e1000_get_bus_info(hw);
1da177e4
LT		 1114
1115 init_timer(&adapter->tx_fifo_stall_timer);
1116 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
e982f17c 1117 adapter->tx_fifo_stall_timer.data = (unsigned long)adapter;
1da177e4
LT		 1118
1119 init_timer(&adapter->watchdog_timer);
1120 adapter->watchdog_timer.function = &e1000_watchdog;
1121 adapter->watchdog_timer.data = (unsigned long) adapter;
1122
1da177e4
LT		 1123 init_timer(&adapter->phy_info_timer);
1124 adapter->phy_info_timer.function = &e1000_update_phy_info;
e982f17c 1125 adapter->phy_info_timer.data = (unsigned long)adapter;
1da177e4 1126
65f27f38 1127 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1128
1da177e4
LT		 1129 e1000_check_options(adapter);
1130
1131 /* Initial Wake on LAN setting
1132 * If APM wake is enabled in the EEPROM,
1133 * enable the ACPI Magic Packet filter
1134 */
1135
1dc32918 1136 switch (hw->mac_type) {
1da177e4
LT		 1137 case e1000_82542_rev2_0:
1138 case e1000_82542_rev2_1:
1139 case e1000_82543:
1140 break;
1141 case e1000_82544:
1dc32918 1142 e1000_read_eeprom(hw,
1da177e4
LT		 1143 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1144 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1145 break;
cd94dd0b 1146 case e1000_ich8lan:
1dc32918 1147 e1000_read_eeprom(hw,
cd94dd0b
AK		 1148 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1149 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1150 break;
1da177e4
LT		 1151 case e1000_82546:
1152 case e1000_82546_rev_3:
fd803241 1153 case e1000_82571:
6418ecc6 1154 case e1000_80003es2lan:
1dc32918
JP		 1155 if (er32(STATUS) & E1000_STATUS_FUNC_1){
1156 e1000_read_eeprom(hw,
1da177e4
LT		 1157 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1158 break;
1159 }
1160 /* Fall Through */
1161 default:
1dc32918 1162 e1000_read_eeprom(hw,
1da177e4
LT		 1163 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1164 break;
1165 }
96838a40 1166 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1167 adapter->eeprom_wol |= E1000_WUFC_MAG;
1168
1169 /* now that we have the eeprom settings, apply the special cases
1170 * where the eeprom may be wrong or the board simply won't support
1171 * wake on lan on a particular port */
1172 switch (pdev->device) {
1173 case E1000_DEV_ID_82546GB_PCIE:
1174 adapter->eeprom_wol = 0;
1175 break;
1176 case E1000_DEV_ID_82546EB_FIBER:
1177 case E1000_DEV_ID_82546GB_FIBER:
1178 case E1000_DEV_ID_82571EB_FIBER:
1179 /* Wake events only supported on port A for dual fiber
1180 * regardless of eeprom setting */
1dc32918 1181 if (er32(STATUS) & E1000_STATUS_FUNC_1)
120cd576
JB		 1182 adapter->eeprom_wol = 0;
1183 break;
1184 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 1185 case E1000_DEV_ID_82571EB_QUAD_COPPER:
ce57a02c 1186 case E1000_DEV_ID_82571EB_QUAD_FIBER:
fc2307d0 1187 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
f4ec7f98 1188 case E1000_DEV_ID_82571PT_QUAD_COPPER:
120cd576
JB		 1189 /* if quad port adapter, disable WoL on all but port A */
1190 if (global_quad_port_a != 0)
1191 adapter->eeprom_wol = 0;
1192 else
1193 adapter->quad_port_a = 1;
1194 /* Reset for multiple quad port adapters */
1195 if (++global_quad_port_a == 4)
1196 global_quad_port_a = 0;
1197 break;
1198 }
1199
1200 /* initialize the wol settings based on the eeprom settings */
1201 adapter->wol = adapter->eeprom_wol;
de126489 1202 device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1da177e4 1203
fb3d47d4 1204 /* print bus type/speed/width info */
fb3d47d4
JK		 1205 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1206 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1207 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1208 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1209 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1210 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1211 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1212 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1213 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1214 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1215 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1216 "32-bit"));
fb3d47d4 1217
e174961c 1218 printk("%pM\n", netdev->dev_addr);
fb3d47d4 1219
1dc32918 1220 if (hw->bus_type == e1000_bus_type_pci_express) {
14782ca8
AK		 1221 DPRINTK(PROBE, WARNING, "This device (id %04x:%04x) will no "
1222 "longer be supported by this driver in the future.\n",
1223 pdev->vendor, pdev->device);
1224 DPRINTK(PROBE, WARNING, "please use the \"e1000e\" "
1225 "driver instead.\n");
1226 }
1227
1da177e4
LT		 1228 /* reset the hardware with the new settings */
1229 e1000_reset(adapter);
1230
b55ccb35
JK		 1231 /* If the controller is 82573 and f/w is AMT, do not set
1232 * DRV_LOAD until the interface is up. For all other cases,
1233 * let the f/w know that the h/w is now under the control
1234 * of the driver. */
1dc32918
JP		 1235 if (hw->mac_type != e1000_82573 ||
1236 !e1000_check_mng_mode(hw))
b55ccb35 1237 e1000_get_hw_control(adapter);
2d7edb92 1238
416b5d10 1239 strcpy(netdev->name, "eth%d");
c7be73bc
JP		 1240 err = register_netdev(netdev);
1241 if (err)
416b5d10 1242 goto err_register;
1314bbf3 1243
eb62efd2
JB		 1244 /* carrier off reporting is important to ethtool even BEFORE open */
1245 netif_carrier_off(netdev);
1246
1da177e4
LT		 1247 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1248
1249 cards_found++;
1250 return 0;
1251
1252err_register:
6dd62ab0
VA		 1253 e1000_release_hw_control(adapter);
1254err_eeprom:
1dc32918
JP		 1255 if (!e1000_check_phy_reset_block(hw))
1256 e1000_phy_hw_reset(hw);
6dd62ab0 1257
1dc32918
JP		 1258 if (hw->flash_address)
1259 iounmap(hw->flash_address);
cd94dd0b 1260err_flashmap:
6dd62ab0
VA		 1261 kfree(adapter->tx_ring);
1262 kfree(adapter->rx_ring);
1da177e4 1263err_sw_init:
1dc32918 1264 iounmap(hw->hw_addr);
1da177e4
LT		 1265err_ioremap:
1266 free_netdev(netdev);
1267err_alloc_etherdev:
81250297 1268 pci_release_selected_regions(pdev, bars);
6dd62ab0
VA		 1269err_pci_reg:
1270err_dma:
1271 pci_disable_device(pdev);
1da177e4
LT		 1272 return err;
1273}
1274
1275/**
1276 * e1000_remove - Device Removal Routine
1277 * @pdev: PCI device information struct
1278 *
1279 * e1000_remove is called by the PCI subsystem to alert the driver
1280 * that it should release a PCI device. The could be caused by a
1281 * Hot-Plug event, or because the driver is going to be removed from
1282 * memory.
1283 **/
1284
64798845 1285static void __devexit e1000_remove(struct pci_dev *pdev)
1da177e4
LT		 1286{
1287 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1288 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1289 struct e1000_hw *hw = &adapter->hw;
1da177e4 1290
28e53bdd 1291 cancel_work_sync(&adapter->reset_task);
be2b28ed 1292
0fccd0e9 1293 e1000_release_manageability(adapter);
1da177e4 1294
b55ccb35
JK		 1295 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1296 * would have already happened in close and is redundant. */
1297 e1000_release_hw_control(adapter);
2d7edb92 1298
bea3348e
SH		 1299 unregister_netdev(netdev);
1300
1dc32918
JP		 1301 if (!e1000_check_phy_reset_block(hw))
1302 e1000_phy_hw_reset(hw);
1da177e4 1303
24025e4e
MC		 1304 kfree(adapter->tx_ring);
1305 kfree(adapter->rx_ring);
24025e4e 1306
1dc32918
JP		 1307 iounmap(hw->hw_addr);
1308 if (hw->flash_address)
1309 iounmap(hw->flash_address);
81250297 1310 pci_release_selected_regions(pdev, adapter->bars);
1da177e4
LT		 1311
1312 free_netdev(netdev);
1313
1314 pci_disable_device(pdev);
1315}
1316
1317/**
1318 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1319 * @adapter: board private structure to initialize
1320 *
1321 * e1000_sw_init initializes the Adapter private data structure.
1322 * Fields are initialized based on PCI device information and
1323 * OS network device settings (MTU size).
1324 **/
1325
64798845 1326static int __devinit e1000_sw_init(struct e1000_adapter *adapter)
1da177e4
LT		 1327{
1328 struct e1000_hw *hw = &adapter->hw;
1329 struct net_device *netdev = adapter->netdev;
1330 struct pci_dev *pdev = adapter->pdev;
1331
1332 /* PCI config space info */
1333
1334 hw->vendor_id = pdev->vendor;
1335 hw->device_id = pdev->device;
1336 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1337 hw->subsystem_id = pdev->subsystem_device;
44c10138 1338 hw->revision_id = pdev->revision;
1da177e4
LT		 1339
1340 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1341
eb0f8054 1342 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
1da177e4
LT		 1343 hw->max_frame_size = netdev->mtu +
1344 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1345 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1346
1347 /* identify the MAC */
1348
96838a40 1349 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1350 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1351 return -EIO;
1352 }
1353
96838a40 1354 switch (hw->mac_type) {
1da177e4
LT		 1355 default:
1356 break;
1357 case e1000_82541:
1358 case e1000_82547:
1359 case e1000_82541_rev_2:
1360 case e1000_82547_rev_2:
1361 hw->phy_init_script = 1;
1362 break;
1363 }
1364
1365 e1000_set_media_type(hw);
1366
c3033b01
JP		 1367 hw->wait_autoneg_complete = false;
1368 hw->tbi_compatibility_en = true;
1369 hw->adaptive_ifs = true;
1da177e4
LT		 1370
1371 /* Copper options */
1372
96838a40 1373 if (hw->media_type == e1000_media_type_copper) {
1da177e4 1374 hw->mdix = AUTO_ALL_MODES;
c3033b01 1375 hw->disable_polarity_correction = false;
1da177e4
LT		 1376 hw->master_slave = E1000_MASTER_SLAVE;
1377 }
1378
f56799ea
JK		 1379 adapter->num_tx_queues = 1;
1380 adapter->num_rx_queues = 1;
581d708e
MC		 1381
1382 if (e1000_alloc_queues(adapter)) {
1383 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1384 return -ENOMEM;
1385 }
1386
47313054 1387 /* Explicitly disable IRQ since the NIC can be in any state. */
47313054
HX		 1388 e1000_irq_disable(adapter);
1389
1da177e4 1390 spin_lock_init(&adapter->stats_lock);
1da177e4 1391
1314bbf3
AK		 1392 set_bit(__E1000_DOWN, &adapter->flags);
1393
1da177e4
LT		 1394 return 0;
1395}
1396
581d708e
MC		 1397/**
1398 * e1000_alloc_queues - Allocate memory for all rings
1399 * @adapter: board private structure to initialize
1400 *
1401 * We allocate one ring per queue at run-time since we don't know the
3e1d7cd2 1402 * number of queues at compile-time.
581d708e
MC		 1403 **/
1404
64798845 1405static int __devinit e1000_alloc_queues(struct e1000_adapter *adapter)
581d708e 1406{
1c7e5b12
YB		 1407 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1408 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1409 if (!adapter->tx_ring)
1410 return -ENOMEM;
581d708e 1411
1c7e5b12
YB		 1412 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1413 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1414 if (!adapter->rx_ring) {
1415 kfree(adapter->tx_ring);
1416 return -ENOMEM;
1417 }
581d708e 1418
581d708e
MC		 1419 return E1000_SUCCESS;
1420}
1421
1da177e4
LT		 1422/**
1423 * e1000_open - Called when a network interface is made active
1424 * @netdev: network interface device structure
1425 *
1426 * Returns 0 on success, negative value on failure
1427 *
1428 * The open entry point is called when a network interface is made
1429 * active by the system (IFF_UP). At this point all resources needed
1430 * for transmit and receive operations are allocated, the interrupt
1431 * handler is registered with the OS, the watchdog timer is started,
1432 * and the stack is notified that the interface is ready.
1433 **/
1434
64798845 1435static int e1000_open(struct net_device *netdev)
1da177e4 1436{
60490fe0 1437 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1438 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 1439 int err;
1440
2db10a08 1441 /* disallow open during test */
1314bbf3 1442 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1443 return -EBUSY;
1444
eb62efd2
JB		 1445 netif_carrier_off(netdev);
1446
1da177e4 1447 /* allocate transmit descriptors */
e0aac5a2
AK		 1448 err = e1000_setup_all_tx_resources(adapter);
1449 if (err)
1da177e4
LT		 1450 goto err_setup_tx;
1451
1452 /* allocate receive descriptors */
e0aac5a2 1453 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1454 if (err)
e0aac5a2 1455 goto err_setup_rx;
b5bf28cd 1456
79f05bf0
AK		 1457 e1000_power_up_phy(adapter);
1458
2d7edb92 1459 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
1dc32918 1460 if ((hw->mng_cookie.status &
2d7edb92
MC		 1461 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1462 e1000_update_mng_vlan(adapter);
1463 }
1da177e4 1464
b55ccb35
JK		 1465 /* If AMT is enabled, let the firmware know that the network
1466 * interface is now open */
1dc32918
JP		 1467 if (hw->mac_type == e1000_82573 &&
1468 e1000_check_mng_mode(hw))
b55ccb35
JK		 1469 e1000_get_hw_control(adapter);
1470
e0aac5a2
AK		 1471 /* before we allocate an interrupt, we must be ready to handle it.
1472 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1473 * as soon as we call pci_request_irq, so we have to setup our
1474 * clean_rx handler before we do so. */
1475 e1000_configure(adapter);
1476
1477 err = e1000_request_irq(adapter);
1478 if (err)
1479 goto err_req_irq;
1480
1481 /* From here on the code is the same as e1000_up() */
1482 clear_bit(__E1000_DOWN, &adapter->flags);
1483
bea3348e 1484 napi_enable(&adapter->napi);
47313054 1485
e0aac5a2
AK		 1486 e1000_irq_enable(adapter);
1487
076152d5
BH		 1488 netif_start_queue(netdev);
1489
e0aac5a2 1490 /* fire a link status change interrupt to start the watchdog */
1dc32918 1491 ew32(ICS, E1000_ICS_LSC);
e0aac5a2 1492
1da177e4
LT		 1493 return E1000_SUCCESS;
1494
b5bf28cd 1495err_req_irq:
e0aac5a2
AK		 1496 e1000_release_hw_control(adapter);
1497 e1000_power_down_phy(adapter);
581d708e 1498 e1000_free_all_rx_resources(adapter);
1da177e4 1499err_setup_rx:
581d708e 1500 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1501err_setup_tx:
1502 e1000_reset(adapter);
1503
1504 return err;
1505}
1506
1507/**
1508 * e1000_close - Disables a network interface
1509 * @netdev: network interface device structure
1510 *
1511 * Returns 0, this is not allowed to fail
1512 *
1513 * The close entry point is called when an interface is de-activated
1514 * by the OS. The hardware is still under the drivers control, but
1515 * needs to be disabled. A global MAC reset is issued to stop the
1516 * hardware, and all transmit and receive resources are freed.
1517 **/
1518
64798845 1519static int e1000_close(struct net_device *netdev)
1da177e4 1520{
60490fe0 1521 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 1522 struct e1000_hw *hw = &adapter->hw;
1da177e4 1523
2db10a08 1524 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1525 e1000_down(adapter);
79f05bf0 1526 e1000_power_down_phy(adapter);
2db10a08 1527 e1000_free_irq(adapter);
1da177e4 1528
581d708e
MC		 1529 e1000_free_all_tx_resources(adapter);
1530 e1000_free_all_rx_resources(adapter);
1da177e4 1531
4666560a
BA		 1532 /* kill manageability vlan ID if supported, but not if a vlan with
1533 * the same ID is registered on the host OS (let 8021q kill it) */
1dc32918 1534 if ((hw->mng_cookie.status &
4666560a
BA		 1535 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1536 !(adapter->vlgrp &&
5c15bdec 1537 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1538 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1539 }
b55ccb35
JK		 1540
1541 /* If AMT is enabled, let the firmware know that the network
1542 * interface is now closed */
1dc32918
JP		 1543 if (hw->mac_type == e1000_82573 &&
1544 e1000_check_mng_mode(hw))
b55ccb35
JK		 1545 e1000_release_hw_control(adapter);
1546
1da177e4
LT		 1547 return 0;
1548}
1549
1550/**
1551 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1552 * @adapter: address of board private structure
2d7edb92
MC		 1553 * @start: address of beginning of memory
1554 * @len: length of memory
1da177e4 1555 **/
64798845
JP		 1556static bool e1000_check_64k_bound(struct e1000_adapter *adapter, void *start,
1557 unsigned long len)
1da177e4 1558{
1dc32918 1559 struct e1000_hw *hw = &adapter->hw;
e982f17c 1560 unsigned long begin = (unsigned long)start;
1da177e4
LT		 1561 unsigned long end = begin + len;
1562
2648345f
MC		 1563 /* First rev 82545 and 82546 need to not allow any memory
1564 * write location to cross 64k boundary due to errata 23 */
1dc32918
JP		 1565 if (hw->mac_type == e1000_82545 ||
1566 hw->mac_type == e1000_82546) {
c3033b01 1567 return ((begin ^ (end - 1)) >> 16) != 0 ? false : true;
1da177e4
LT		 1568 }
1569
c3033b01 1570 return true;
1da177e4
LT		 1571}
1572
1573/**
1574 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1575 * @adapter: board private structure
581d708e 1576 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1577 *
1578 * Return 0 on success, negative on failure
1579 **/
1580
64798845
JP		 1581static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
1582 struct e1000_tx_ring *txdr)
1da177e4 1583{
1da177e4
LT		 1584 struct pci_dev *pdev = adapter->pdev;
1585 int size;
1586
1587 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1588 txdr->buffer_info = vmalloc(size);
96838a40 1589 if (!txdr->buffer_info) {
2648345f
MC		 1590 DPRINTK(PROBE, ERR,
1591 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1592 return -ENOMEM;
1593 }
1594 memset(txdr->buffer_info, 0, size);
1595
1596 /* round up to nearest 4K */
1597
1598 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1599 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 1600
1601 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1602 if (!txdr->desc) {
1da177e4 1603setup_tx_desc_die:
1da177e4 1604 vfree(txdr->buffer_info);
2648345f
MC		 1605 DPRINTK(PROBE, ERR,
1606 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1607 return -ENOMEM;
1608 }
1609
2648345f 1610 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1611 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1612 void *olddesc = txdr->desc;
1613 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1614 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1615 "at %p\n", txdr->size, txdr->desc);
1616 /* Try again, without freeing the previous */
1da177e4 1617 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1618 /* Failed allocation, critical failure */
96838a40 1619 if (!txdr->desc) {
1da177e4
LT		 1620 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1621 goto setup_tx_desc_die;
1622 }
1623
1624 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1625 /* give up */
2648345f
MC		 1626 pci_free_consistent(pdev, txdr->size, txdr->desc,
1627 txdr->dma);
1da177e4
LT		 1628 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1629 DPRINTK(PROBE, ERR,
2648345f
MC		 1630 "Unable to allocate aligned memory "
1631 "for the transmit descriptor ring\n");
1da177e4
LT		 1632 vfree(txdr->buffer_info);
1633 return -ENOMEM;
1634 } else {
2648345f 1635 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1636 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1637 }
1638 }
1639 memset(txdr->desc, 0, txdr->size);
1640
1641 txdr->next_to_use = 0;
1642 txdr->next_to_clean = 0;
1643
1644 return 0;
1645}
1646
581d708e
MC		 1647/**
1648 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1649 * (Descriptors) for all queues
1650 * @adapter: board private structure
1651 *
581d708e
MC		 1652 * Return 0 on success, negative on failure
1653 **/
1654
64798845 1655int e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1656{
1657 int i, err = 0;
1658
f56799ea 1659 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1660 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1661 if (err) {
1662 DPRINTK(PROBE, ERR,
1663 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1664 for (i-- ; i >= 0; i--)
1665 e1000_free_tx_resources(adapter,
1666 &adapter->tx_ring[i]);
581d708e
MC		 1667 break;
1668 }
1669 }
1670
1671 return err;
1672}
1673
1da177e4
LT		 1674/**
1675 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1676 * @adapter: board private structure
1677 *
1678 * Configure the Tx unit of the MAC after a reset.
1679 **/
1680
64798845 1681static void e1000_configure_tx(struct e1000_adapter *adapter)
1da177e4 1682{
406874a7 1683 u64 tdba;
581d708e 1684 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 1685 u32 tdlen, tctl, tipg, tarc;
1686 u32 ipgr1, ipgr2;
1da177e4
LT		 1687
1688 /* Setup the HW Tx Head and Tail descriptor pointers */
1689
f56799ea 1690 switch (adapter->num_tx_queues) {
24025e4e
MC		 1691 case 1:
1692 default:
581d708e
MC		 1693 tdba = adapter->tx_ring[0].dma;
1694 tdlen = adapter->tx_ring[0].count *
1695 sizeof(struct e1000_tx_desc);
1dc32918
JP		 1696 ew32(TDLEN, tdlen);
1697 ew32(TDBAH, (tdba >> 32));
1698 ew32(TDBAL, (tdba & 0x00000000ffffffffULL));
1699 ew32(TDT, 0);
1700 ew32(TDH, 0);
6a951698
AK		 1701 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1702 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1703 break;
1704 }
1da177e4
LT		 1705
1706 /* Set the default values for the Tx Inter Packet Gap timer */
1dc32918 1707 if (hw->mac_type <= e1000_82547_rev_2 &&
d89b6c67
JB		 1708 (hw->media_type == e1000_media_type_fiber ||
1709 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1710 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1711 else
1712 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1713
581d708e 1714 switch (hw->mac_type) {
1da177e4
LT		 1715 case e1000_82542_rev2_0:
1716 case e1000_82542_rev2_1:
1717 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1718 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1719 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1720 break;
87041639
JK		 1721 case e1000_80003es2lan:
1722 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1723 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1724 break;
1da177e4 1725 default:
0fadb059
JK		 1726 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1727 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1728 break;
1da177e4 1729 }
0fadb059
JK		 1730 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1731 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
1dc32918 1732 ew32(TIPG, tipg);
1da177e4
LT		 1733
1734 /* Set the Tx Interrupt Delay register */
1735
1dc32918 1736 ew32(TIDV, adapter->tx_int_delay);
581d708e 1737 if (hw->mac_type >= e1000_82540)
1dc32918 1738 ew32(TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1739
1740 /* Program the Transmit Control Register */
1741
1dc32918 1742 tctl = er32(TCTL);
1da177e4 1743 tctl &= ~E1000_TCTL_CT;
7e6c9861 1744 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1745 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1746
2ae76d98 1747 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1dc32918 1748 tarc = er32(TARC0);
90fb5135
AK		 1749 /* set the speed mode bit, we'll clear it if we're not at
1750 * gigabit link later */
09ae3e88 1751 tarc |= (1 << 21);
1dc32918 1752 ew32(TARC0, tarc);
87041639 1753 } else if (hw->mac_type == e1000_80003es2lan) {
1dc32918 1754 tarc = er32(TARC0);
87041639 1755 tarc |= 1;
1dc32918
JP		 1756 ew32(TARC0, tarc);
1757 tarc = er32(TARC1);
87041639 1758 tarc |= 1;
1dc32918 1759 ew32(TARC1, tarc);
2ae76d98
MC		 1760 }
1761
581d708e 1762 e1000_config_collision_dist(hw);
1da177e4
LT		 1763
1764 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1765 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1766
1767 /* only set IDE if we are delaying interrupts using the timers */
1768 if (adapter->tx_int_delay)
1769 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1770
581d708e 1771 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1772 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1773 else
1774 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1775
1776 /* Cache if we're 82544 running in PCI-X because we'll
1777 * need this to apply a workaround later in the send path. */
581d708e
MC		 1778 if (hw->mac_type == e1000_82544 &&
1779 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1780 adapter->pcix_82544 = 1;
7e6c9861 1781
1dc32918 1782 ew32(TCTL, tctl);
7e6c9861 1783
1da177e4
LT		 1784}
1785
1786/**
1787 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1788 * @adapter: board private structure
581d708e 1789 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1790 *
1791 * Returns 0 on success, negative on failure
1792 **/
1793
64798845
JP		 1794static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
1795 struct e1000_rx_ring *rxdr)
1da177e4 1796{
1dc32918 1797 struct e1000_hw *hw = &adapter->hw;
1da177e4 1798 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1799 int size, desc_len;
1da177e4
LT		 1800
1801 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1802 rxdr->buffer_info = vmalloc(size);
581d708e 1803 if (!rxdr->buffer_info) {
2648345f
MC		 1804 DPRINTK(PROBE, ERR,
1805 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1806 return -ENOMEM;
1807 }
1808 memset(rxdr->buffer_info, 0, size);
1809
1dc32918 1810 if (hw->mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1811 desc_len = sizeof(struct e1000_rx_desc);
1812 else
1813 desc_len = sizeof(union e1000_rx_desc_packet_split);
1814
1da177e4
LT		 1815 /* Round up to nearest 4K */
1816
2d7edb92 1817 rxdr->size = rxdr->count * desc_len;
9099cfb9 1818 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 1819
1820 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1821
581d708e
MC		 1822 if (!rxdr->desc) {
1823 DPRINTK(PROBE, ERR,
1824 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1825setup_rx_desc_die:
1da177e4
LT		 1826 vfree(rxdr->buffer_info);
1827 return -ENOMEM;
1828 }
1829
2648345f 1830 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1831 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1832 void *olddesc = rxdr->desc;
1833 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1834 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1835 "at %p\n", rxdr->size, rxdr->desc);
1836 /* Try again, without freeing the previous */
1da177e4 1837 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1838 /* Failed allocation, critical failure */
581d708e 1839 if (!rxdr->desc) {
1da177e4 1840 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1841 DPRINTK(PROBE, ERR,
1842 "Unable to allocate memory "
1843 "for the receive descriptor ring\n");
1da177e4
LT		 1844 goto setup_rx_desc_die;
1845 }
1846
1847 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1848 /* give up */
2648345f
MC		 1849 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1850 rxdr->dma);
1da177e4 1851 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1852 DPRINTK(PROBE, ERR,
1853 "Unable to allocate aligned memory "
1854 "for the receive descriptor ring\n");
581d708e 1855 goto setup_rx_desc_die;
1da177e4 1856 } else {
2648345f 1857 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1858 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1859 }
1860 }
1861 memset(rxdr->desc, 0, rxdr->size);
1862
1863 rxdr->next_to_clean = 0;
1864 rxdr->next_to_use = 0;
1865
1866 return 0;
1867}
1868
581d708e
MC		 1869/**
1870 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1871 * (Descriptors) for all queues
1872 * @adapter: board private structure
1873 *
581d708e
MC		 1874 * Return 0 on success, negative on failure
1875 **/
1876
64798845 1877int e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 1878{
1879 int i, err = 0;
1880
f56799ea 1881 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1882 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1883 if (err) {
1884 DPRINTK(PROBE, ERR,
1885 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1886 for (i-- ; i >= 0; i--)
1887 e1000_free_rx_resources(adapter,
1888 &adapter->rx_ring[i]);
581d708e
MC		 1889 break;
1890 }
1891 }
1892
1893 return err;
1894}
1895
1da177e4 1896/**
2648345f 1897 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1898 * @adapter: Board private structure
1899 **/
64798845 1900static void e1000_setup_rctl(struct e1000_adapter *adapter)
1da177e4 1901{
1dc32918 1902 struct e1000_hw *hw = &adapter->hw;
630b25cd 1903 u32 rctl;
1da177e4 1904
1dc32918 1905 rctl = er32(RCTL);
1da177e4
LT		 1906
1907 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1908
1909 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1910 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1dc32918 1911 (hw->mc_filter_type << E1000_RCTL_MO_SHIFT);
1da177e4 1912
1dc32918 1913 if (hw->tbi_compatibility_on == 1)
1da177e4
LT		 1914 rctl |= E1000_RCTL_SBP;
1915 else
1916 rctl &= ~E1000_RCTL_SBP;
1917
2d7edb92
MC		 1918 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1919 rctl &= ~E1000_RCTL_LPE;
1920 else
1921 rctl |= E1000_RCTL_LPE;
1922
1da177e4 1923 /* Setup buffer sizes */
9e2feace
AK		 1924 rctl &= ~E1000_RCTL_SZ_4096;
1925 rctl |= E1000_RCTL_BSEX;
1926 switch (adapter->rx_buffer_len) {
1927 case E1000_RXBUFFER_256:
1928 rctl |= E1000_RCTL_SZ_256;
1929 rctl &= ~E1000_RCTL_BSEX;
1930 break;
1931 case E1000_RXBUFFER_512:
1932 rctl |= E1000_RCTL_SZ_512;
1933 rctl &= ~E1000_RCTL_BSEX;
1934 break;
1935 case E1000_RXBUFFER_1024:
1936 rctl |= E1000_RCTL_SZ_1024;
1937 rctl &= ~E1000_RCTL_BSEX;
1938 break;
a1415ee6
JK		 1939 case E1000_RXBUFFER_2048:
1940 default:
1941 rctl |= E1000_RCTL_SZ_2048;
1942 rctl &= ~E1000_RCTL_BSEX;
1943 break;
1944 case E1000_RXBUFFER_4096:
1945 rctl |= E1000_RCTL_SZ_4096;
1946 break;
1947 case E1000_RXBUFFER_8192:
1948 rctl |= E1000_RCTL_SZ_8192;
1949 break;
1950 case E1000_RXBUFFER_16384:
1951 rctl |= E1000_RCTL_SZ_16384;
1952 break;
2d7edb92
MC		 1953 }
1954
1dc32918 1955 ew32(RCTL, rctl);
1da177e4
LT		 1956}
1957
1958/**
1959 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1960 * @adapter: board private structure
1961 *
1962 * Configure the Rx unit of the MAC after a reset.
1963 **/
1964
64798845 1965static void e1000_configure_rx(struct e1000_adapter *adapter)
1da177e4 1966{
406874a7 1967 u64 rdba;
581d708e 1968 struct e1000_hw *hw = &adapter->hw;
406874a7 1969 u32 rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1970
630b25cd
BJ		 1971 rdlen = adapter->rx_ring[0].count *
1972 sizeof(struct e1000_rx_desc);
1973 adapter->clean_rx = e1000_clean_rx_irq;
1974 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1da177e4
LT		 1975
1976 /* disable receives while setting up the descriptors */
1dc32918
JP		 1977 rctl = er32(RCTL);
1978 ew32(RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1979
1980 /* set the Receive Delay Timer Register */
1dc32918 1981 ew32(RDTR, adapter->rx_int_delay);
1da177e4 1982
581d708e 1983 if (hw->mac_type >= e1000_82540) {
1dc32918 1984 ew32(RADV, adapter->rx_abs_int_delay);
835bb129 1985 if (adapter->itr_setting != 0)
1dc32918 1986 ew32(ITR, 1000000000 / (adapter->itr * 256));
1da177e4
LT		 1987 }
1988
2ae76d98 1989 if (hw->mac_type >= e1000_82571) {
1dc32918 1990 ctrl_ext = er32(CTRL_EXT);
1e613fd9 1991 /* Reset delay timers after every interrupt */
6fc7a7ec 1992 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
835bb129 1993 /* Auto-Mask interrupts upon ICR access */
1e613fd9 1994 ctrl_ext |= E1000_CTRL_EXT_IAME;
1dc32918 1995 ew32(IAM, 0xffffffff);
1dc32918
JP		 1996 ew32(CTRL_EXT, ctrl_ext);
1997 E1000_WRITE_FLUSH();
2ae76d98
MC		 1998 }
1999
581d708e
MC		 2000 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2001 * the Base and Length of the Rx Descriptor Ring */
f56799ea 2002 switch (adapter->num_rx_queues) {
24025e4e
MC		 2003 case 1:
2004 default:
581d708e 2005 rdba = adapter->rx_ring[0].dma;
1dc32918
JP		 2006 ew32(RDLEN, rdlen);
2007 ew32(RDBAH, (rdba >> 32));
2008 ew32(RDBAL, (rdba & 0x00000000ffffffffULL));
2009 ew32(RDT, 0);
2010 ew32(RDH, 0);
6a951698
AK		 2011 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2012 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 2013 break;
24025e4e
MC		 2014 }
2015
1da177e4 2016 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e 2017 if (hw->mac_type >= e1000_82543) {
1dc32918 2018 rxcsum = er32(RXCSUM);
630b25cd 2019 if (adapter->rx_csum)
2d7edb92 2020 rxcsum |= E1000_RXCSUM_TUOFL;
630b25cd 2021 else
2d7edb92 2022 /* don't need to clear IPPCSE as it defaults to 0 */
630b25cd 2023 rxcsum &= ~E1000_RXCSUM_TUOFL;
1dc32918 2024 ew32(RXCSUM, rxcsum);
1da177e4
LT		 2025 }
2026
2027 /* Enable Receives */
1dc32918 2028 ew32(RCTL, rctl);
1da177e4
LT		 2029}
2030
2031/**
581d708e 2032 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 2033 * @adapter: board private structure
581d708e 2034 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 2035 *
2036 * Free all transmit software resources
2037 **/
2038
64798845
JP		 2039static void e1000_free_tx_resources(struct e1000_adapter *adapter,
2040 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 2041{
2042 struct pci_dev *pdev = adapter->pdev;
2043
581d708e 2044 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 2045
581d708e
MC		 2046 vfree(tx_ring->buffer_info);
2047 tx_ring->buffer_info = NULL;
1da177e4 2048
581d708e 2049 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 2050
581d708e
MC		 2051 tx_ring->desc = NULL;
2052}
2053
2054/**
2055 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2056 * @adapter: board private structure
2057 *
2058 * Free all transmit software resources
2059 **/
2060
64798845 2061void e1000_free_all_tx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2062{
2063 int i;
2064
f56799ea 2065 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2066 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2067}
2068
64798845
JP		 2069static void e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2070 struct e1000_buffer *buffer_info)
1da177e4 2071{
d20b606c 2072 buffer_info->dma = 0;
a9ebadd6 2073 if (buffer_info->skb) {
d20b606c
JB		 2074 skb_dma_unmap(&adapter->pdev->dev, buffer_info->skb,
2075 DMA_TO_DEVICE);
1da177e4 2076 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 2077 buffer_info->skb = NULL;
2078 }
37e73df8 2079 buffer_info->time_stamp = 0;
a9ebadd6 2080 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 2081}
2082
2083/**
2084 * e1000_clean_tx_ring - Free Tx Buffers
2085 * @adapter: board private structure
581d708e 2086 * @tx_ring: ring to be cleaned
1da177e4
LT		 2087 **/
2088
64798845
JP		 2089static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
2090 struct e1000_tx_ring *tx_ring)
1da177e4 2091{
1dc32918 2092 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2093 struct e1000_buffer *buffer_info;
2094 unsigned long size;
2095 unsigned int i;
2096
2097 /* Free all the Tx ring sk_buffs */
2098
96838a40 2099 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2100 buffer_info = &tx_ring->buffer_info[i];
2101 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2102 }
2103
2104 size = sizeof(struct e1000_buffer) * tx_ring->count;
2105 memset(tx_ring->buffer_info, 0, size);
2106
2107 /* Zero out the descriptor ring */
2108
2109 memset(tx_ring->desc, 0, tx_ring->size);
2110
2111 tx_ring->next_to_use = 0;
2112 tx_ring->next_to_clean = 0;
fd803241 2113 tx_ring->last_tx_tso = 0;
1da177e4 2114
1dc32918
JP		 2115 writel(0, hw->hw_addr + tx_ring->tdh);
2116 writel(0, hw->hw_addr + tx_ring->tdt);
581d708e
MC		 2117}
2118
2119/**
2120 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2121 * @adapter: board private structure
2122 **/
2123
64798845 2124static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2125{
2126 int i;
2127
f56799ea 2128 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2129 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2130}
2131
2132/**
2133 * e1000_free_rx_resources - Free Rx Resources
2134 * @adapter: board private structure
581d708e 2135 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2136 *
2137 * Free all receive software resources
2138 **/
2139
64798845
JP		 2140static void e1000_free_rx_resources(struct e1000_adapter *adapter,
2141 struct e1000_rx_ring *rx_ring)
1da177e4 2142{
1da177e4
LT		 2143 struct pci_dev *pdev = adapter->pdev;
2144
581d708e 2145 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2146
2147 vfree(rx_ring->buffer_info);
2148 rx_ring->buffer_info = NULL;
2149
2150 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2151
2152 rx_ring->desc = NULL;
2153}
2154
2155/**
581d708e 2156 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2157 * @adapter: board private structure
581d708e
MC		 2158 *
2159 * Free all receive software resources
2160 **/
2161
64798845 2162void e1000_free_all_rx_resources(struct e1000_adapter *adapter)
581d708e
MC		 2163{
2164 int i;
2165
f56799ea 2166 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2167 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2168}
2169
2170/**
2171 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2172 * @adapter: board private structure
2173 * @rx_ring: ring to free buffers from
1da177e4
LT		 2174 **/
2175
64798845
JP		 2176static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
2177 struct e1000_rx_ring *rx_ring)
1da177e4 2178{
1dc32918 2179 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2180 struct e1000_buffer *buffer_info;
2181 struct pci_dev *pdev = adapter->pdev;
2182 unsigned long size;
630b25cd 2183 unsigned int i;
1da177e4
LT		 2184
2185 /* Free all the Rx ring sk_buffs */
96838a40 2186 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2187 buffer_info = &rx_ring->buffer_info[i];
96838a40 2188 if (buffer_info->skb) {
1da177e4
LT		 2189 pci_unmap_single(pdev,
2190 buffer_info->dma,
2191 buffer_info->length,
2192 PCI_DMA_FROMDEVICE);
2193
2194 dev_kfree_skb(buffer_info->skb);
2195 buffer_info->skb = NULL;
997f5cbd 2196 }
1da177e4
LT		 2197 }
2198
2199 size = sizeof(struct e1000_buffer) * rx_ring->count;
2200 memset(rx_ring->buffer_info, 0, size);
2201
2202 /* Zero out the descriptor ring */
2203
2204 memset(rx_ring->desc, 0, rx_ring->size);
2205
2206 rx_ring->next_to_clean = 0;
2207 rx_ring->next_to_use = 0;
2208
1dc32918
JP		 2209 writel(0, hw->hw_addr + rx_ring->rdh);
2210 writel(0, hw->hw_addr + rx_ring->rdt);
581d708e
MC		 2211}
2212
2213/**
2214 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2215 * @adapter: board private structure
2216 **/
2217
64798845 2218static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
581d708e
MC		 2219{
2220 int i;
2221
f56799ea 2222 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2223 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2224}
2225
2226/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2227 * and memory write and invalidate disabled for certain operations
2228 */
64798845 2229static void e1000_enter_82542_rst(struct e1000_adapter *adapter)
1da177e4 2230{
1dc32918 2231 struct e1000_hw *hw = &adapter->hw;
1da177e4 2232 struct net_device *netdev = adapter->netdev;
406874a7 2233 u32 rctl;
1da177e4 2234
1dc32918 2235 e1000_pci_clear_mwi(hw);
1da177e4 2236
1dc32918 2237 rctl = er32(RCTL);
1da177e4 2238 rctl |= E1000_RCTL_RST;
1dc32918
JP		 2239 ew32(RCTL, rctl);
2240 E1000_WRITE_FLUSH();
1da177e4
LT		 2241 mdelay(5);
2242
96838a40 2243 if (netif_running(netdev))
581d708e 2244 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2245}
2246
64798845 2247static void e1000_leave_82542_rst(struct e1000_adapter *adapter)
1da177e4 2248{
1dc32918 2249 struct e1000_hw *hw = &adapter->hw;
1da177e4 2250 struct net_device *netdev = adapter->netdev;
406874a7 2251 u32 rctl;
1da177e4 2252
1dc32918 2253 rctl = er32(RCTL);
1da177e4 2254 rctl &= ~E1000_RCTL_RST;
1dc32918
JP		 2255 ew32(RCTL, rctl);
2256 E1000_WRITE_FLUSH();
1da177e4
LT		 2257 mdelay(5);
2258
1dc32918
JP		 2259 if (hw->pci_cmd_word & PCI_COMMAND_INVALIDATE)
2260 e1000_pci_set_mwi(hw);
1da177e4 2261
96838a40 2262 if (netif_running(netdev)) {
72d64a43
JK		 2263 /* No need to loop, because 82542 supports only 1 queue */
2264 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2265 e1000_configure_rx(adapter);
72d64a43 2266 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2267 }
2268}
2269
2270/**
2271 * e1000_set_mac - Change the Ethernet Address of the NIC
2272 * @netdev: network interface device structure
2273 * @p: pointer to an address structure
2274 *
2275 * Returns 0 on success, negative on failure
2276 **/
2277
64798845 2278static int e1000_set_mac(struct net_device *netdev, void *p)
1da177e4 2279{
60490fe0 2280 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 2281 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 2282 struct sockaddr *addr = p;
2283
96838a40 2284 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2285 return -EADDRNOTAVAIL;
2286
2287 /* 82542 2.0 needs to be in reset to write receive address registers */
2288
1dc32918 2289 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2290 e1000_enter_82542_rst(adapter);
2291
2292 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1dc32918 2293 memcpy(hw->mac_addr, addr->sa_data, netdev->addr_len);
1da177e4 2294
1dc32918 2295 e1000_rar_set(hw, hw->mac_addr, 0);
1da177e4 2296
868d5309
MC		 2297 /* With 82571 controllers, LAA may be overwritten (with the default)
2298 * due to controller reset from the other port. */
1dc32918 2299 if (hw->mac_type == e1000_82571) {
868d5309 2300 /* activate the work around */
1dc32918 2301 hw->laa_is_present = 1;
868d5309 2302
96838a40
JB		 2303 /* Hold a copy of the LAA in RAR[14] This is done so that
2304 * between the time RAR[0] gets clobbered and the time it
2305 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2306 * of the RARs and no incoming packets directed to this port
96838a40 2307 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2308 * RAR[14] */
1dc32918 2309 e1000_rar_set(hw, hw->mac_addr,
868d5309
MC		 2310 E1000_RAR_ENTRIES - 1);
2311 }
2312
1dc32918 2313 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2314 e1000_leave_82542_rst(adapter);
2315
2316 return 0;
2317}
2318
2319/**
db0ce50d 2320 * e1000_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
1da177e4
LT		 2321 * @netdev: network interface device structure
2322 *
db0ce50d
PM		 2323 * The set_rx_mode entry point is called whenever the unicast or multicast
2324 * address lists or the network interface flags are updated. This routine is
2325 * responsible for configuring the hardware for proper unicast, multicast,
1da177e4
LT		 2326 * promiscuous mode, and all-multi behavior.
2327 **/
2328
64798845 2329static void e1000_set_rx_mode(struct net_device *netdev)
1da177e4 2330{
60490fe0 2331 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2332 struct e1000_hw *hw = &adapter->hw;
db0ce50d
PM		 2333 struct dev_addr_list *uc_ptr;
2334 struct dev_addr_list *mc_ptr;
406874a7
JP		 2335 u32 rctl;
2336 u32 hash_value;
868d5309 2337 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2338 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2339 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2340 E1000_NUM_MTA_REGISTERS;
81c52285
JB		 2341 u32 *mcarray = kcalloc(mta_reg_count, sizeof(u32), GFP_ATOMIC);
2342
2343 if (!mcarray) {
2344 DPRINTK(PROBE, ERR, "memory allocation failed\n");
2345 return;
2346 }
cd94dd0b 2347
1dc32918 2348 if (hw->mac_type == e1000_ich8lan)
cd94dd0b 2349 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2350
868d5309 2351 /* reserve RAR[14] for LAA over-write work-around */
1dc32918 2352 if (hw->mac_type == e1000_82571)
868d5309 2353 rar_entries--;
1da177e4 2354
2648345f
MC		 2355 /* Check for Promiscuous and All Multicast modes */
2356
1dc32918 2357 rctl = er32(RCTL);
1da177e4 2358
96838a40 2359 if (netdev->flags & IFF_PROMISC) {
1da177e4 2360 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
746b9f02 2361 rctl &= ~E1000_RCTL_VFE;
1da177e4 2362 } else {
746b9f02
PM		 2363 if (netdev->flags & IFF_ALLMULTI) {
2364 rctl |= E1000_RCTL_MPE;
2365 } else {
2366 rctl &= ~E1000_RCTL_MPE;
2367 }
78ed11a5 2368 if (adapter->hw.mac_type != e1000_ich8lan)
746b9f02 2369 rctl |= E1000_RCTL_VFE;
db0ce50d
PM		 2370 }
2371
2372 uc_ptr = NULL;
2373 if (netdev->uc_count > rar_entries - 1) {
2374 rctl |= E1000_RCTL_UPE;
2375 } else if (!(netdev->flags & IFF_PROMISC)) {
2376 rctl &= ~E1000_RCTL_UPE;
2377 uc_ptr = netdev->uc_list;
1da177e4
LT		 2378 }
2379
1dc32918 2380 ew32(RCTL, rctl);
1da177e4
LT		 2381
2382 /* 82542 2.0 needs to be in reset to write receive address registers */
2383
96838a40 2384 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2385 e1000_enter_82542_rst(adapter);
2386
db0ce50d
PM		 2387 /* load the first 14 addresses into the exact filters 1-14. Unicast
2388 * addresses take precedence to avoid disabling unicast filtering
2389 * when possible.
2390 *
1da177e4
LT		 2391 * RAR 0 is used for the station MAC adddress
2392 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2393 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2394 */
2395 mc_ptr = netdev->mc_list;
2396
96838a40 2397 for (i = 1; i < rar_entries; i++) {
db0ce50d
PM		 2398 if (uc_ptr) {
2399 e1000_rar_set(hw, uc_ptr->da_addr, i);
2400 uc_ptr = uc_ptr->next;
2401 } else if (mc_ptr) {
2402 e1000_rar_set(hw, mc_ptr->da_addr, i);
1da177e4
LT		 2403 mc_ptr = mc_ptr->next;
2404 } else {
2405 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
1dc32918 2406 E1000_WRITE_FLUSH();
1da177e4 2407 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
1dc32918 2408 E1000_WRITE_FLUSH();
1da177e4
LT		 2409 }
2410 }
db0ce50d 2411 WARN_ON(uc_ptr != NULL);
1da177e4 2412
1da177e4
LT		 2413 /* load any remaining addresses into the hash table */
2414
96838a40 2415 for (; mc_ptr; mc_ptr = mc_ptr->next) {
81c52285 2416 u32 hash_reg, hash_bit, mta;
db0ce50d 2417 hash_value = e1000_hash_mc_addr(hw, mc_ptr->da_addr);
81c52285
JB		 2418 hash_reg = (hash_value >> 5) & 0x7F;
2419 hash_bit = hash_value & 0x1F;
2420 mta = (1 << hash_bit);
2421 mcarray[hash_reg] |= mta;
1da177e4
LT		 2422 }
2423
81c52285
JB		 2424 /* write the hash table completely, write from bottom to avoid
2425 * both stupid write combining chipsets, and flushing each write */
2426 for (i = mta_reg_count - 1; i >= 0 ; i--) {
2427 /*
2428 * If we are on an 82544 has an errata where writing odd
2429 * offsets overwrites the previous even offset, but writing
2430 * backwards over the range solves the issue by always
2431 * writing the odd offset first
2432 */
2433 E1000_WRITE_REG_ARRAY(hw, MTA, i, mcarray[i]);
2434 }
2435 E1000_WRITE_FLUSH();
2436
96838a40 2437 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2438 e1000_leave_82542_rst(adapter);
81c52285
JB		 2439
2440 kfree(mcarray);
1da177e4
LT		 2441}
2442
2443/* Need to wait a few seconds after link up to get diagnostic information from
2444 * the phy */
2445
64798845 2446static void e1000_update_phy_info(unsigned long data)
1da177e4 2447{
e982f17c 2448 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918
JP		 2449 struct e1000_hw *hw = &adapter->hw;
2450 e1000_phy_get_info(hw, &adapter->phy_info);
1da177e4
LT		 2451}
2452
2453/**
2454 * e1000_82547_tx_fifo_stall - Timer Call-back
2455 * @data: pointer to adapter cast into an unsigned long
2456 **/
2457
64798845 2458static void e1000_82547_tx_fifo_stall(unsigned long data)
1da177e4 2459{
e982f17c 2460 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2461 struct e1000_hw *hw = &adapter->hw;
1da177e4 2462 struct net_device *netdev = adapter->netdev;
406874a7 2463 u32 tctl;
1da177e4 2464
96838a40 2465 if (atomic_read(&adapter->tx_fifo_stall)) {
1dc32918
JP		 2466 if ((er32(TDT) == er32(TDH)) &&
2467 (er32(TDFT) == er32(TDFH)) &&
2468 (er32(TDFTS) == er32(TDFHS))) {
2469 tctl = er32(TCTL);
2470 ew32(TCTL, tctl & ~E1000_TCTL_EN);
2471 ew32(TDFT, adapter->tx_head_addr);
2472 ew32(TDFH, adapter->tx_head_addr);
2473 ew32(TDFTS, adapter->tx_head_addr);
2474 ew32(TDFHS, adapter->tx_head_addr);
2475 ew32(TCTL, tctl);
2476 E1000_WRITE_FLUSH();
1da177e4
LT		 2477
2478 adapter->tx_fifo_head = 0;
2479 atomic_set(&adapter->tx_fifo_stall, 0);
2480 netif_wake_queue(netdev);
2481 } else {
2482 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2483 }
2484 }
2485}
2486
2487/**
2488 * e1000_watchdog - Timer Call-back
2489 * @data: pointer to adapter cast into an unsigned long
2490 **/
64798845 2491static void e1000_watchdog(unsigned long data)
1da177e4 2492{
e982f17c 2493 struct e1000_adapter *adapter = (struct e1000_adapter *)data;
1dc32918 2494 struct e1000_hw *hw = &adapter->hw;
1da177e4 2495 struct net_device *netdev = adapter->netdev;
545c67c0 2496 struct e1000_tx_ring *txdr = adapter->tx_ring;
406874a7
JP		 2497 u32 link, tctl;
2498 s32 ret_val;
cd94dd0b 2499
1dc32918 2500 ret_val = e1000_check_for_link(hw);
cd94dd0b 2501 if ((ret_val == E1000_ERR_PHY) &&
1dc32918
JP		 2502 (hw->phy_type == e1000_phy_igp_3) &&
2503 (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
cd94dd0b
AK		 2504 /* See e1000_kumeran_lock_loss_workaround() */
2505 DPRINTK(LINK, INFO,
2506 "Gigabit has been disabled, downgrading speed\n");
2507 }
90fb5135 2508
1dc32918
JP		 2509 if (hw->mac_type == e1000_82573) {
2510 e1000_enable_tx_pkt_filtering(hw);
2511 if (adapter->mng_vlan_id != hw->mng_cookie.vlan_id)
2d7edb92 2512 e1000_update_mng_vlan(adapter);
96838a40 2513 }
1da177e4 2514
1dc32918
JP		 2515 if ((hw->media_type == e1000_media_type_internal_serdes) &&
2516 !(er32(TXCW) & E1000_TXCW_ANE))
2517 link = !hw->serdes_link_down;
1da177e4 2518 else
1dc32918 2519 link = er32(STATUS) & E1000_STATUS_LU;
1da177e4 2520
96838a40
JB		 2521 if (link) {
2522 if (!netif_carrier_ok(netdev)) {
406874a7 2523 u32 ctrl;
c3033b01 2524 bool txb2b = true;
1dc32918 2525 e1000_get_speed_and_duplex(hw,
1da177e4
LT		 2526 &adapter->link_speed,
2527 &adapter->link_duplex);
2528
1dc32918 2529 ctrl = er32(CTRL);
b30c4d8f
JK		 2530 printk(KERN_INFO "e1000: %s NIC Link is Up %d Mbps %s, "
2531 "Flow Control: %s\n",
2532 netdev->name,
2533 adapter->link_speed,
2534 adapter->link_duplex == FULL_DUPLEX ?
9669f53b
AK		 2535 "Full Duplex" : "Half Duplex",
2536 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2537 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2538 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2539 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2540
7e6c9861
JK		 2541 /* tweak tx_queue_len according to speed/duplex
2542 * and adjust the timeout factor */
66a2b0a3
JK		 2543 netdev->tx_queue_len = adapter->tx_queue_len;
2544 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2545 switch (adapter->link_speed) {
2546 case SPEED_10:
c3033b01 2547 txb2b = false;
7e6c9861
JK		 2548 netdev->tx_queue_len = 10;
2549 adapter->tx_timeout_factor = 8;
2550 break;
2551 case SPEED_100:
c3033b01 2552 txb2b = false;
7e6c9861
JK		 2553 netdev->tx_queue_len = 100;
2554 /* maybe add some timeout factor ? */
2555 break;
2556 }
2557
1dc32918
JP		 2558 if ((hw->mac_type == e1000_82571 ||
2559 hw->mac_type == e1000_82572) &&
c3033b01 2560 !txb2b) {
406874a7 2561 u32 tarc0;
1dc32918 2562 tarc0 = er32(TARC0);
90fb5135 2563 tarc0 &= ~(1 << 21);
1dc32918 2564 ew32(TARC0, tarc0);
7e6c9861 2565 }
90fb5135 2566
7e6c9861
JK		 2567 /* disable TSO for pcie and 10/100 speeds, to avoid
2568 * some hardware issues */
2569 if (!adapter->tso_force &&
1dc32918 2570 hw->bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2571 switch (adapter->link_speed) {
2572 case SPEED_10:
66a2b0a3 2573 case SPEED_100:
7e6c9861
JK		 2574 DPRINTK(PROBE,INFO,
2575 "10/100 speed: disabling TSO\n");
2576 netdev->features &= ~NETIF_F_TSO;
87ca4e5b 2577 netdev->features &= ~NETIF_F_TSO6;
7e6c9861
JK		 2578 break;
2579 case SPEED_1000:
2580 netdev->features |= NETIF_F_TSO;
87ca4e5b 2581 netdev->features |= NETIF_F_TSO6;
7e6c9861
JK		 2582 break;
2583 default:
2584 /* oops */
66a2b0a3
JK		 2585 break;
2586 }
2587 }
7e6c9861
JK		 2588
2589 /* enable transmits in the hardware, need to do this
2590 * after setting TARC0 */
1dc32918 2591 tctl = er32(TCTL);
7e6c9861 2592 tctl |= E1000_TCTL_EN;
1dc32918 2593 ew32(TCTL, tctl);
66a2b0a3 2594
1da177e4 2595 netif_carrier_on(netdev);
56e1393f 2596 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4 2597 adapter->smartspeed = 0;
bb8e3311
JG		 2598 } else {
2599 /* make sure the receive unit is started */
1dc32918
JP		 2600 if (hw->rx_needs_kicking) {
2601 u32 rctl = er32(RCTL);
2602 ew32(RCTL, rctl | E1000_RCTL_EN);
bb8e3311 2603 }
1da177e4
LT		 2604 }
2605 } else {
96838a40 2606 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2607 adapter->link_speed = 0;
2608 adapter->link_duplex = 0;
b30c4d8f
JK		 2609 printk(KERN_INFO "e1000: %s NIC Link is Down\n",
2610 netdev->name);
1da177e4 2611 netif_carrier_off(netdev);
56e1393f 2612 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
87041639
JK		 2613
2614 /* 80003ES2LAN workaround--
2615 * For packet buffer work-around on link down event;
2616 * disable receives in the ISR and
2617 * reset device here in the watchdog
2618 */
1dc32918 2619 if (hw->mac_type == e1000_80003es2lan)
87041639
JK		 2620 /* reset device */
2621 schedule_work(&adapter->reset_task);
1da177e4
LT		 2622 }
2623
2624 e1000_smartspeed(adapter);
2625 }
2626
2627 e1000_update_stats(adapter);
2628
1dc32918 2629 hw->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
1da177e4 2630 adapter->tpt_old = adapter->stats.tpt;
1dc32918 2631 hw->collision_delta = adapter->stats.colc - adapter->colc_old;
1da177e4
LT		 2632 adapter->colc_old = adapter->stats.colc;
2633
2634 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2635 adapter->gorcl_old = adapter->stats.gorcl;
2636 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2637 adapter->gotcl_old = adapter->stats.gotcl;
2638
1dc32918 2639 e1000_update_adaptive(hw);
1da177e4 2640
f56799ea 2641 if (!netif_carrier_ok(netdev)) {
581d708e 2642 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2643 /* We've lost link, so the controller stops DMA,
2644 * but we've got queued Tx work that's never going
2645 * to get done, so reset controller to flush Tx.
2646 * (Do the reset outside of interrupt context). */
87041639
JK		 2647 adapter->tx_timeout_count++;
2648 schedule_work(&adapter->reset_task);
c2d5ab49
JB		 2649 /* return immediately since reset is imminent */
2650 return;
1da177e4
LT		 2651 }
2652 }
2653
1da177e4 2654 /* Cause software interrupt to ensure rx ring is cleaned */
1dc32918 2655 ew32(ICS, E1000_ICS_RXDMT0);
1da177e4 2656
2648345f 2657 /* Force detection of hung controller every watchdog period */
c3033b01 2658 adapter->detect_tx_hung = true;
1da177e4 2659
96838a40 2660 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309 2661 * reset from the other port. Set the appropriate LAA in RAR[0] */
1dc32918
JP		 2662 if (hw->mac_type == e1000_82571 && hw->laa_is_present)
2663 e1000_rar_set(hw, hw->mac_addr, 0);
868d5309 2664
1da177e4 2665 /* Reset the timer */
56e1393f 2666 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2667}
2668
835bb129
JB		 2669enum latency_range {
2670 lowest_latency = 0,
2671 low_latency = 1,
2672 bulk_latency = 2,
2673 latency_invalid = 255
2674};
2675
2676/**
2677 * e1000_update_itr - update the dynamic ITR value based on statistics
2678 * Stores a new ITR value based on packets and byte
2679 * counts during the last interrupt. The advantage of per interrupt
2680 * computation is faster updates and more accurate ITR for the current
2681 * traffic pattern. Constants in this function were computed
2682 * based on theoretical maximum wire speed and thresholds were set based
2683 * on testing data as well as attempting to minimize response time
2684 * while increasing bulk throughput.
2685 * this functionality is controlled by the InterruptThrottleRate module
2686 * parameter (see e1000_param.c)
2687 * @adapter: pointer to adapter
2688 * @itr_setting: current adapter->itr
2689 * @packets: the number of packets during this measurement interval
2690 * @bytes: the number of bytes during this measurement interval
2691 **/
2692static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
64798845 2693 u16 itr_setting, int packets, int bytes)
835bb129
JB		 2694{
2695 unsigned int retval = itr_setting;
2696 struct e1000_hw *hw = &adapter->hw;
2697
2698 if (unlikely(hw->mac_type < e1000_82540))
2699 goto update_itr_done;
2700
2701 if (packets == 0)
2702 goto update_itr_done;
2703
835bb129
JB		 2704 switch (itr_setting) {
2705 case lowest_latency:
2b65326e
JB		 2706 /* jumbo frames get bulk treatment*/
2707 if (bytes/packets > 8000)
2708 retval = bulk_latency;
2709 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2710 retval = low_latency;
2711 break;
2712 case low_latency: /* 50 usec aka 20000 ints/s */
2713 if (bytes > 10000) {
2b65326e
JB		 2714 /* jumbo frames need bulk latency setting */
2715 if (bytes/packets > 8000)
2716 retval = bulk_latency;
2717 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2718 retval = bulk_latency;
2719 else if ((packets > 35))
2720 retval = lowest_latency;
2b65326e
JB		 2721 } else if (bytes/packets > 2000)
2722 retval = bulk_latency;
2723 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2724 retval = lowest_latency;
2725 break;
2726 case bulk_latency: /* 250 usec aka 4000 ints/s */
2727 if (bytes > 25000) {
2728 if (packets > 35)
2729 retval = low_latency;
2b65326e
JB		 2730 } else if (bytes < 6000) {
2731 retval = low_latency;
835bb129
JB		 2732 }
2733 break;
2734 }
2735
2736update_itr_done:
2737 return retval;
2738}
2739
2740static void e1000_set_itr(struct e1000_adapter *adapter)
2741{
2742 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 2743 u16 current_itr;
2744 u32 new_itr = adapter->itr;
835bb129
JB		 2745
2746 if (unlikely(hw->mac_type < e1000_82540))
2747 return;
2748
2749 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2750 if (unlikely(adapter->link_speed != SPEED_1000)) {
2751 current_itr = 0;
2752 new_itr = 4000;
2753 goto set_itr_now;
2754 }
2755
2756 adapter->tx_itr = e1000_update_itr(adapter,
2757 adapter->tx_itr,
2758 adapter->total_tx_packets,
2759 adapter->total_tx_bytes);
2b65326e
JB		 2760 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2761 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2762 adapter->tx_itr = low_latency;
2763
835bb129
JB		 2764 adapter->rx_itr = e1000_update_itr(adapter,
2765 adapter->rx_itr,
2766 adapter->total_rx_packets,
2767 adapter->total_rx_bytes);
2b65326e
JB		 2768 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2769 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2770 adapter->rx_itr = low_latency;
835bb129
JB		 2771
2772 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2773
835bb129
JB		 2774 switch (current_itr) {
2775 /* counts and packets in update_itr are dependent on these numbers */
2776 case lowest_latency:
2777 new_itr = 70000;
2778 break;
2779 case low_latency:
2780 new_itr = 20000; /* aka hwitr = ~200 */
2781 break;
2782 case bulk_latency:
2783 new_itr = 4000;
2784 break;
2785 default:
2786 break;
2787 }
2788
2789set_itr_now:
2790 if (new_itr != adapter->itr) {
2791 /* this attempts to bias the interrupt rate towards Bulk
2792 * by adding intermediate steps when interrupt rate is
2793 * increasing */
2794 new_itr = new_itr > adapter->itr ?
2795 min(adapter->itr + (new_itr >> 2), new_itr) :
2796 new_itr;
2797 adapter->itr = new_itr;
1dc32918 2798 ew32(ITR, 1000000000 / (new_itr * 256));
835bb129
JB		 2799 }
2800
2801 return;
2802}
2803
1da177e4
LT		 2804#define E1000_TX_FLAGS_CSUM 0x00000001
2805#define E1000_TX_FLAGS_VLAN 0x00000002
2806#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2807#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2808#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2809#define E1000_TX_FLAGS_VLAN_SHIFT 16
2810
64798845
JP		 2811static int e1000_tso(struct e1000_adapter *adapter,
2812 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4 2813{
1da177e4 2814 struct e1000_context_desc *context_desc;
545c67c0 2815 struct e1000_buffer *buffer_info;
1da177e4 2816 unsigned int i;
406874a7
JP		 2817 u32 cmd_length = 0;
2818 u16 ipcse = 0, tucse, mss;
2819 u8 ipcss, ipcso, tucss, tucso, hdr_len;
1da177e4
LT		 2820 int err;
2821
89114afd 2822 if (skb_is_gso(skb)) {
1da177e4
LT		 2823 if (skb_header_cloned(skb)) {
2824 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2825 if (err)
2826 return err;
2827 }
2828
ab6a5bb6 2829 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2830 mss = skb_shinfo(skb)->gso_size;
60828236 2831 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2832 struct iphdr *iph = ip_hdr(skb);
2833 iph->tot_len = 0;
2834 iph->check = 0;
aa8223c7
ACM		 2835 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2836 iph->daddr, 0,
2837 IPPROTO_TCP,
2838 0);
2d7edb92 2839 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2840 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2841 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2842 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2843 tcp_hdr(skb)->check =
0660e03f
ACM		 2844 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2845 &ipv6_hdr(skb)->daddr,
2846 0, IPPROTO_TCP, 0);
2d7edb92 2847 ipcse = 0;
2d7edb92 2848 }
bbe735e4 2849 ipcss = skb_network_offset(skb);
eddc9ec5 2850 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2851 tucss = skb_transport_offset(skb);
aa8223c7 2852 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2853 tucse = 0;
2854
2855 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2856 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2857
581d708e
MC		 2858 i = tx_ring->next_to_use;
2859 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2860 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2861
2862 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2863 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2864 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2865 context_desc->upper_setup.tcp_fields.tucss = tucss;
2866 context_desc->upper_setup.tcp_fields.tucso = tucso;
2867 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2868 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2869 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2870 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2871
545c67c0 2872 buffer_info->time_stamp = jiffies;
a9ebadd6 2873 buffer_info->next_to_watch = i;
545c67c0 2874
581d708e
MC		 2875 if (++i == tx_ring->count) i = 0;
2876 tx_ring->next_to_use = i;
1da177e4 2877
c3033b01 2878 return true;
1da177e4 2879 }
c3033b01 2880 return false;
1da177e4
LT		 2881}
2882
64798845
JP		 2883static bool e1000_tx_csum(struct e1000_adapter *adapter,
2884 struct e1000_tx_ring *tx_ring, struct sk_buff *skb)
1da177e4
LT		 2885{
2886 struct e1000_context_desc *context_desc;
545c67c0 2887 struct e1000_buffer *buffer_info;
1da177e4 2888 unsigned int i;
406874a7 2889 u8 css;
3ed30676 2890 u32 cmd_len = E1000_TXD_CMD_DEXT;
1da177e4 2891
3ed30676
DG		 2892 if (skb->ip_summed != CHECKSUM_PARTIAL)
2893 return false;
1da177e4 2894
3ed30676 2895 switch (skb->protocol) {
09640e63 2896 case cpu_to_be16(ETH_P_IP):
3ed30676
DG		 2897 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
2898 cmd_len |= E1000_TXD_CMD_TCP;
2899 break;
09640e63 2900 case cpu_to_be16(ETH_P_IPV6):
3ed30676
DG		 2901 /* XXX not handling all IPV6 headers */
2902 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
2903 cmd_len |= E1000_TXD_CMD_TCP;
2904 break;
2905 default:
2906 if (unlikely(net_ratelimit()))
2907 DPRINTK(DRV, WARNING,
2908 "checksum_partial proto=%x!\n", skb->protocol);
2909 break;
2910 }
1da177e4 2911
3ed30676 2912 css = skb_transport_offset(skb);
1da177e4 2913
3ed30676
DG		 2914 i = tx_ring->next_to_use;
2915 buffer_info = &tx_ring->buffer_info[i];
2916 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2917
3ed30676
DG		 2918 context_desc->lower_setup.ip_config = 0;
2919 context_desc->upper_setup.tcp_fields.tucss = css;
2920 context_desc->upper_setup.tcp_fields.tucso =
2921 css + skb->csum_offset;
2922 context_desc->upper_setup.tcp_fields.tucse = 0;
2923 context_desc->tcp_seg_setup.data = 0;
2924 context_desc->cmd_and_length = cpu_to_le32(cmd_len);
1da177e4 2925
3ed30676
DG		 2926 buffer_info->time_stamp = jiffies;
2927 buffer_info->next_to_watch = i;
1da177e4 2928
3ed30676
DG		 2929 if (unlikely(++i == tx_ring->count)) i = 0;
2930 tx_ring->next_to_use = i;
2931
2932 return true;
1da177e4
LT		 2933}
2934
2935#define E1000_MAX_TXD_PWR 12
2936#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2937
64798845
JP		 2938static int e1000_tx_map(struct e1000_adapter *adapter,
2939 struct e1000_tx_ring *tx_ring,
2940 struct sk_buff *skb, unsigned int first,
2941 unsigned int max_per_txd, unsigned int nr_frags,
2942 unsigned int mss)
1da177e4 2943{
1dc32918 2944 struct e1000_hw *hw = &adapter->hw;
37e73df8 2945 struct e1000_buffer *buffer_info;
d20b606c
JB		 2946 unsigned int len = skb_headlen(skb);
2947 unsigned int offset, size, count = 0, i;
1da177e4 2948 unsigned int f;
37e73df8 2949 dma_addr_t *map;
1da177e4
LT		 2950
2951 i = tx_ring->next_to_use;
2952
d20b606c
JB		 2953 if (skb_dma_map(&adapter->pdev->dev, skb, DMA_TO_DEVICE)) {
2954 dev_err(&adapter->pdev->dev, "TX DMA map failed\n");
37e73df8 2955 return 0;
d20b606c
JB		 2956 }
2957
37e73df8 2958 map = skb_shinfo(skb)->dma_maps;
d20b606c
JB		 2959 offset = 0;
2960
96838a40 2961 while (len) {
37e73df8 2962 buffer_info = &tx_ring->buffer_info[i];
1da177e4 2963 size = min(len, max_per_txd);
fd803241
JK		 2964 /* Workaround for Controller erratum --
2965 * descriptor for non-tso packet in a linear SKB that follows a
2966 * tso gets written back prematurely before the data is fully
0f15a8fa 2967 * DMA'd to the controller */
fd803241 2968 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 2969 !skb_is_gso(skb)) {
fd803241
JK		 2970 tx_ring->last_tx_tso = 0;
2971 size -= 4;
2972 }
2973
1da177e4
LT		 2974 /* Workaround for premature desc write-backs
2975 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2976 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 2977 size -= 4;
97338bde
MC		 2978 /* work-around for errata 10 and it applies
2979 * to all controllers in PCI-X mode
2980 * The fix is to make sure that the first descriptor of a
2981 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2982 */
1dc32918 2983 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2984 (size > 2015) && count == 0))
2985 size = 2015;
96838a40 2986
1da177e4
LT		 2987 /* Workaround for potential 82544 hang in PCI-X. Avoid
2988 * terminating buffers within evenly-aligned dwords. */
96838a40 2989 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2990 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2991 size > 4))
2992 size -= 4;
2993
2994 buffer_info->length = size;
37e73df8 2995 buffer_info->dma = map[0] + offset;
1da177e4 2996 buffer_info->time_stamp = jiffies;
a9ebadd6 2997 buffer_info->next_to_watch = i;
1da177e4
LT		 2998
2999 len -= size;
3000 offset += size;
3001 count++;
37e73df8
AD		 3002 if (len) {
3003 i++;
3004 if (unlikely(i == tx_ring->count))
3005 i = 0;
3006 }
1da177e4
LT		 3007 }
3008
96838a40 3009 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 3010 struct skb_frag_struct *frag;
3011
3012 frag = &skb_shinfo(skb)->frags[f];
3013 len = frag->size;
d20b606c 3014 offset = 0;
1da177e4 3015
96838a40 3016 while (len) {
37e73df8
AD		 3017 i++;
3018 if (unlikely(i == tx_ring->count))
3019 i = 0;
3020
1da177e4
LT		 3021 buffer_info = &tx_ring->buffer_info[i];
3022 size = min(len, max_per_txd);
1da177e4
LT		 3023 /* Workaround for premature desc write-backs
3024 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3025 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 3026 size -= 4;
1da177e4
LT		 3027 /* Workaround for potential 82544 hang in PCI-X.
3028 * Avoid terminating buffers within evenly-aligned
3029 * dwords. */
96838a40 3030 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3031 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3032 size > 4))
3033 size -= 4;
3034
3035 buffer_info->length = size;
37e73df8 3036 buffer_info->dma = map[f + 1] + offset;
1da177e4 3037 buffer_info->time_stamp = jiffies;
a9ebadd6 3038 buffer_info->next_to_watch = i;
1da177e4
LT		 3039
3040 len -= size;
3041 offset += size;
3042 count++;
1da177e4
LT		 3043 }
3044 }
3045
1da177e4
LT		 3046 tx_ring->buffer_info[i].skb = skb;
3047 tx_ring->buffer_info[first].next_to_watch = i;
3048
3049 return count;
3050}
3051
64798845
JP		 3052static void e1000_tx_queue(struct e1000_adapter *adapter,
3053 struct e1000_tx_ring *tx_ring, int tx_flags,
3054 int count)
1da177e4 3055{
1dc32918 3056 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3057 struct e1000_tx_desc *tx_desc = NULL;
3058 struct e1000_buffer *buffer_info;
406874a7 3059 u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
1da177e4
LT		 3060 unsigned int i;
3061
96838a40 3062 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 3063 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3064 E1000_TXD_CMD_TSE;
2d7edb92
MC		 3065 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3066
96838a40 3067 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 3068 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 3069 }
3070
96838a40 3071 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 3072 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3073 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3074 }
3075
96838a40 3076 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 3077 txd_lower |= E1000_TXD_CMD_VLE;
3078 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3079 }
3080
3081 i = tx_ring->next_to_use;
3082
96838a40 3083 while (count--) {
1da177e4
LT		 3084 buffer_info = &tx_ring->buffer_info[i];
3085 tx_desc = E1000_TX_DESC(*tx_ring, i);
3086 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3087 tx_desc->lower.data =
3088 cpu_to_le32(txd_lower | buffer_info->length);
3089 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3090 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3091 }
3092
3093 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3094
3095 /* Force memory writes to complete before letting h/w
3096 * know there are new descriptors to fetch. (Only
3097 * applicable for weak-ordered memory model archs,
3098 * such as IA-64). */
3099 wmb();
3100
3101 tx_ring->next_to_use = i;
1dc32918 3102 writel(i, hw->hw_addr + tx_ring->tdt);
2ce9047f
JB		 3103 /* we need this if more than one processor can write to our tail
3104 * at a time, it syncronizes IO on IA64/Altix systems */
3105 mmiowb();
1da177e4
LT		 3106}
3107
3108/**
3109 * 82547 workaround to avoid controller hang in half-duplex environment.
3110 * The workaround is to avoid queuing a large packet that would span
3111 * the internal Tx FIFO ring boundary by notifying the stack to resend
3112 * the packet at a later time. This gives the Tx FIFO an opportunity to
3113 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3114 * to the beginning of the Tx FIFO.
3115 **/
3116
3117#define E1000_FIFO_HDR 0x10
3118#define E1000_82547_PAD_LEN 0x3E0
3119
64798845
JP		 3120static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
3121 struct sk_buff *skb)
1da177e4 3122{
406874a7
JP		 3123 u32 fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3124 u32 skb_fifo_len = skb->len + E1000_FIFO_HDR;
1da177e4 3125
9099cfb9 3126 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3127
96838a40 3128 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3129 goto no_fifo_stall_required;
3130
96838a40 3131 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3132 return 1;
3133
96838a40 3134 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3135 atomic_set(&adapter->tx_fifo_stall, 1);
3136 return 1;
3137 }
3138
3139no_fifo_stall_required:
3140 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3141 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3142 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3143 return 0;
3144}
3145
2d7edb92 3146#define MINIMUM_DHCP_PACKET_SIZE 282
64798845
JP		 3147static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
3148 struct sk_buff *skb)
2d7edb92
MC		 3149{
3150 struct e1000_hw *hw = &adapter->hw;
406874a7 3151 u16 length, offset;
96838a40 3152 if (vlan_tx_tag_present(skb)) {
1dc32918
JP		 3153 if (!((vlan_tx_tag_get(skb) == hw->mng_cookie.vlan_id) &&
3154 ( hw->mng_cookie.status &
2d7edb92
MC		 3155 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3156 return 0;
3157 }
20a44028 3158 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
e982f17c 3159 struct ethhdr *eth = (struct ethhdr *)skb->data;
96838a40
JB		 3160 if ((htons(ETH_P_IP) == eth->h_proto)) {
3161 const struct iphdr *ip =
406874a7 3162 (struct iphdr *)((u8 *)skb->data+14);
96838a40
JB		 3163 if (IPPROTO_UDP == ip->protocol) {
3164 struct udphdr *udp =
406874a7 3165 (struct udphdr *)((u8 *)ip +
2d7edb92 3166 (ip->ihl << 2));
96838a40 3167 if (ntohs(udp->dest) == 67) {
406874a7 3168 offset = (u8 *)udp + 8 - skb->data;
2d7edb92
MC		 3169 length = skb->len - offset;
3170
3171 return e1000_mng_write_dhcp_info(hw,
406874a7 3172 (u8 *)udp + 8,
2d7edb92
MC		 3173 length);
3174 }
3175 }
3176 }
3177 }
3178 return 0;
3179}
3180
65c7973f
JB		 3181static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3182{
3183 struct e1000_adapter *adapter = netdev_priv(netdev);
3184 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3185
3186 netif_stop_queue(netdev);
3187 /* Herbert's original patch had:
3188 * smp_mb__after_netif_stop_queue();
3189 * but since that doesn't exist yet, just open code it. */
3190 smp_mb();
3191
3192 /* We need to check again in a case another CPU has just
3193 * made room available. */
3194 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3195 return -EBUSY;
3196
3197 /* A reprieve! */
3198 netif_start_queue(netdev);
fcfb1224 3199 ++adapter->restart_queue;
65c7973f
JB		 3200 return 0;
3201}
3202
3203static int e1000_maybe_stop_tx(struct net_device *netdev,
3204 struct e1000_tx_ring *tx_ring, int size)
3205{
3206 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3207 return 0;
3208 return __e1000_maybe_stop_tx(netdev, size);
3209}
3210
1da177e4 3211#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
64798845 3212static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1da177e4 3213{
60490fe0 3214 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3215 struct e1000_hw *hw = &adapter->hw;
581d708e 3216 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3217 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3218 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3219 unsigned int tx_flags = 0;
6d1e3aa7 3220 unsigned int len = skb->len - skb->data_len;
6d1e3aa7
KK		 3221 unsigned int nr_frags;
3222 unsigned int mss;
1da177e4 3223 int count = 0;
76c224bc 3224 int tso;
1da177e4 3225 unsigned int f;
1da177e4 3226
65c7973f
JB		 3227 /* This goes back to the question of how to logically map a tx queue
3228 * to a flow. Right now, performance is impacted slightly negatively
3229 * if using multiple tx queues. If the stack breaks away from a
3230 * single qdisc implementation, we can look at this again. */
581d708e 3231 tx_ring = adapter->tx_ring;
24025e4e 3232
581d708e 3233 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3234 dev_kfree_skb_any(skb);
3235 return NETDEV_TX_OK;
3236 }
3237
032fe6e9
JB		 3238 /* 82571 and newer doesn't need the workaround that limited descriptor
3239 * length to 4kB */
1dc32918 3240 if (hw->mac_type >= e1000_82571)
032fe6e9
JB		 3241 max_per_txd = 8192;
3242
7967168c 3243 mss = skb_shinfo(skb)->gso_size;
76c224bc 3244 /* The controller does a simple calculation to
1da177e4
LT		 3245 * make sure there is enough room in the FIFO before
3246 * initiating the DMA for each buffer. The calc is:
3247 * 4 = ceil(buffer len/mss). To make sure we don't
3248 * overrun the FIFO, adjust the max buffer len if mss
3249 * drops. */
96838a40 3250 if (mss) {
406874a7 3251 u8 hdr_len;
1da177e4
LT		 3252 max_per_txd = min(mss << 2, max_per_txd);
3253 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3254
90fb5135
AK		 3255 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3256 * points to just header, pull a few bytes of payload from
3257 * frags into skb->data */
ab6a5bb6 3258 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
6d1e3aa7 3259 if (skb->data_len && hdr_len == len) {
1dc32918 3260 switch (hw->mac_type) {
9f687888 3261 unsigned int pull_size;
683a2aa3
HX		 3262 case e1000_82544:
3263 /* Make sure we have room to chop off 4 bytes,
3264 * and that the end alignment will work out to
3265 * this hardware's requirements
3266 * NOTE: this is a TSO only workaround
3267 * if end byte alignment not correct move us
3268 * into the next dword */
27a884dc 3269 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 3270 break;
3271 /* fall through */
9f687888
JK		 3272 case e1000_82571:
3273 case e1000_82572:
3274 case e1000_82573:
cd94dd0b 3275 case e1000_ich8lan:
9f687888
JK		 3276 pull_size = min((unsigned int)4, skb->data_len);
3277 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3278 DPRINTK(DRV, ERR,
9f687888
JK		 3279 "__pskb_pull_tail failed.\n");
3280 dev_kfree_skb_any(skb);
749dfc70 3281 return NETDEV_TX_OK;
9f687888
JK		 3282 }
3283 len = skb->len - skb->data_len;
3284 break;
3285 default:
3286 /* do nothing */
3287 break;
d74bbd3b 3288 }
9a3056da 3289 }
1da177e4
LT		 3290 }
3291
9a3056da 3292 /* reserve a descriptor for the offload context */
84fa7933 3293 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3294 count++;
2648345f 3295 count++;
fd803241 3296
fd803241 3297 /* Controller Erratum workaround */
89114afd 3298 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3299 count++;
fd803241 3300
1da177e4
LT		 3301 count += TXD_USE_COUNT(len, max_txd_pwr);
3302
96838a40 3303 if (adapter->pcix_82544)
1da177e4
LT		 3304 count++;
3305
96838a40 3306 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3307 * in PCI-X mode, so add one more descriptor to the count
3308 */
1dc32918 3309 if (unlikely((hw->bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3310 (len > 2015)))
3311 count++;
3312
1da177e4 3313 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3314 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3315 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3316 max_txd_pwr);
96838a40 3317 if (adapter->pcix_82544)
1da177e4
LT		 3318 count += nr_frags;
3319
0f15a8fa 3320
1dc32918
JP		 3321 if (hw->tx_pkt_filtering &&
3322 (hw->mac_type == e1000_82573))
2d7edb92
MC		 3323 e1000_transfer_dhcp_info(adapter, skb);
3324
1da177e4
LT		 3325 /* need: count + 2 desc gap to keep tail from touching
3326 * head, otherwise try next time */
8017943e 3327 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2)))
1da177e4 3328 return NETDEV_TX_BUSY;
1da177e4 3329
1dc32918 3330 if (unlikely(hw->mac_type == e1000_82547)) {
96838a40 3331 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3332 netif_stop_queue(netdev);
1314bbf3 3333 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
1da177e4
LT		 3334 return NETDEV_TX_BUSY;
3335 }
3336 }
3337
96838a40 3338 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3339 tx_flags |= E1000_TX_FLAGS_VLAN;
3340 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3341 }
3342
581d708e 3343 first = tx_ring->next_to_use;
96838a40 3344
581d708e 3345 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3346 if (tso < 0) {
3347 dev_kfree_skb_any(skb);
3348 return NETDEV_TX_OK;
3349 }
3350
fd803241
JK		 3351 if (likely(tso)) {
3352 tx_ring->last_tx_tso = 1;
1da177e4 3353 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3354 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3355 tx_flags |= E1000_TX_FLAGS_CSUM;
3356
2d7edb92 3357 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3358 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3359 * no longer assume, we must. */
60828236 3360 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3361 tx_flags |= E1000_TX_FLAGS_IPV4;
3362
37e73df8
AD		 3363 count = e1000_tx_map(adapter, tx_ring, skb, first, max_per_txd,
3364 nr_frags, mss);
1da177e4 3365
37e73df8
AD		 3366 if (count) {
3367 e1000_tx_queue(adapter, tx_ring, tx_flags, count);
37e73df8
AD		 3368 /* Make sure there is space in the ring for the next send. */
3369 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3370
37e73df8
AD		 3371 } else {
3372 dev_kfree_skb_any(skb);
3373 tx_ring->buffer_info[first].time_stamp = 0;
3374 tx_ring->next_to_use = first;
3375 }
1da177e4 3376
1da177e4
LT		 3377 return NETDEV_TX_OK;
3378}
3379
3380/**
3381 * e1000_tx_timeout - Respond to a Tx Hang
3382 * @netdev: network interface device structure
3383 **/
3384
64798845 3385static void e1000_tx_timeout(struct net_device *netdev)
1da177e4 3386{
60490fe0 3387 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3388
3389 /* Do the reset outside of interrupt context */
87041639
JK		 3390 adapter->tx_timeout_count++;
3391 schedule_work(&adapter->reset_task);
1da177e4
LT		 3392}
3393
64798845 3394static void e1000_reset_task(struct work_struct *work)
1da177e4 3395{
65f27f38
DH		 3396 struct e1000_adapter *adapter =
3397 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3398
2db10a08 3399 e1000_reinit_locked(adapter);
1da177e4
LT		 3400}
3401
3402/**
3403 * e1000_get_stats - Get System Network Statistics
3404 * @netdev: network interface device structure
3405 *
3406 * Returns the address of the device statistics structure.
3407 * The statistics are actually updated from the timer callback.
3408 **/
3409
64798845 3410static struct net_device_stats *e1000_get_stats(struct net_device *netdev)
1da177e4 3411{
60490fe0 3412 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3413
6b7660cd 3414 /* only return the current stats */
1da177e4
LT		 3415 return &adapter->net_stats;
3416}
3417
3418/**
3419 * e1000_change_mtu - Change the Maximum Transfer Unit
3420 * @netdev: network interface device structure
3421 * @new_mtu: new value for maximum frame size
3422 *
3423 * Returns 0 on success, negative on failure
3424 **/
3425
64798845 3426static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
1da177e4 3427{
60490fe0 3428 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 3429 struct e1000_hw *hw = &adapter->hw;
1da177e4 3430 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
406874a7 3431 u16 eeprom_data = 0;
1da177e4 3432
96838a40
JB		 3433 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3434 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3435 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3436 return -EINVAL;
2d7edb92 3437 }
1da177e4 3438
997f5cbd 3439 /* Adapter-specific max frame size limits. */
1dc32918 3440 switch (hw->mac_type) {
9e2feace 3441 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3442 case e1000_ich8lan:
997f5cbd
JK		 3443 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3444 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3445 return -EINVAL;
2d7edb92 3446 }
997f5cbd 3447 break;
85b22eb6 3448 case e1000_82573:
249d71d6
BA		 3449 /* Jumbo Frames not supported if:
3450 * - this is not an 82573L device
3451 * - ASPM is enabled in any way (0x1A bits 3:2) */
1dc32918 3452 e1000_read_eeprom(hw, EEPROM_INIT_3GIO_3, 1,
85b22eb6 3453 &eeprom_data);
1dc32918 3454 if ((hw->device_id != E1000_DEV_ID_82573L) ||
249d71d6 3455 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3456 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3457 DPRINTK(PROBE, ERR,
3458 "Jumbo Frames not supported.\n");
3459 return -EINVAL;
3460 }
3461 break;
3462 }
249d71d6
BA		 3463 /* ERT will be enabled later to enable wire speed receives */
3464
85b22eb6 3465 /* fall through to get support */
997f5cbd
JK		 3466 case e1000_82571:
3467 case e1000_82572:
87041639 3468 case e1000_80003es2lan:
997f5cbd
JK		 3469#define MAX_STD_JUMBO_FRAME_SIZE 9234
3470 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3471 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3472 return -EINVAL;
3473 }
3474 break;
3475 default:
3476 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3477 break;
1da177e4
LT		 3478 }
3479
87f5032e 3480 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3481 * means we reserve 2 more, this pushes us to allocate from the next
3482 * larger slab size
3483 * i.e. RXBUFFER_2048 --> size-4096 slab */
3484
3485 if (max_frame <= E1000_RXBUFFER_256)
3486 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3487 else if (max_frame <= E1000_RXBUFFER_512)
3488 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3489 else if (max_frame <= E1000_RXBUFFER_1024)
3490 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3491 else if (max_frame <= E1000_RXBUFFER_2048)
3492 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3493 else if (max_frame <= E1000_RXBUFFER_4096)
3494 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3495 else if (max_frame <= E1000_RXBUFFER_8192)
3496 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3497 else if (max_frame <= E1000_RXBUFFER_16384)
3498 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3499
3500 /* adjust allocation if LPE protects us, and we aren't using SBP */
1dc32918 3501 if (!hw->tbi_compatibility_on &&
9e2feace
AK		 3502 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3503 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3504 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3505
2d7edb92 3506 netdev->mtu = new_mtu;
1dc32918 3507 hw->max_frame_size = max_frame;
2d7edb92 3508
2db10a08
AK		 3509 if (netif_running(netdev))
3510 e1000_reinit_locked(adapter);
1da177e4 3511
1da177e4
LT		 3512 return 0;
3513}
3514
3515/**
3516 * e1000_update_stats - Update the board statistics counters
3517 * @adapter: board private structure
3518 **/
3519
64798845 3520void e1000_update_stats(struct e1000_adapter *adapter)
1da177e4
LT		 3521{
3522 struct e1000_hw *hw = &adapter->hw;
282f33c9 3523 struct pci_dev *pdev = adapter->pdev;
1da177e4 3524 unsigned long flags;
406874a7 3525 u16 phy_tmp;
1da177e4
LT		 3526
3527#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3528
282f33c9
LV		 3529 /*
3530 * Prevent stats update while adapter is being reset, or if the pci
3531 * connection is down.
3532 */
9026729b 3533 if (adapter->link_speed == 0)
282f33c9 3534 return;
81b1955e 3535 if (pci_channel_offline(pdev))
9026729b
AK		 3536 return;
3537
1da177e4
LT		 3538 spin_lock_irqsave(&adapter->stats_lock, flags);
3539
828d055f 3540 /* these counters are modified from e1000_tbi_adjust_stats,
1da177e4
LT		 3541 * called from the interrupt context, so they must only
3542 * be written while holding adapter->stats_lock
3543 */
3544
1dc32918
JP		 3545 adapter->stats.crcerrs += er32(CRCERRS);
3546 adapter->stats.gprc += er32(GPRC);
3547 adapter->stats.gorcl += er32(GORCL);
3548 adapter->stats.gorch += er32(GORCH);
3549 adapter->stats.bprc += er32(BPRC);
3550 adapter->stats.mprc += er32(MPRC);
3551 adapter->stats.roc += er32(ROC);
3552
3553 if (hw->mac_type != e1000_ich8lan) {
3554 adapter->stats.prc64 += er32(PRC64);
3555 adapter->stats.prc127 += er32(PRC127);
3556 adapter->stats.prc255 += er32(PRC255);
3557 adapter->stats.prc511 += er32(PRC511);
3558 adapter->stats.prc1023 += er32(PRC1023);
3559 adapter->stats.prc1522 += er32(PRC1522);
3560 }
3561
3562 adapter->stats.symerrs += er32(SYMERRS);
3563 adapter->stats.mpc += er32(MPC);
3564 adapter->stats.scc += er32(SCC);
3565 adapter->stats.ecol += er32(ECOL);
3566 adapter->stats.mcc += er32(MCC);
3567 adapter->stats.latecol += er32(LATECOL);
3568 adapter->stats.dc += er32(DC);
3569 adapter->stats.sec += er32(SEC);
3570 adapter->stats.rlec += er32(RLEC);
3571 adapter->stats.xonrxc += er32(XONRXC);
3572 adapter->stats.xontxc += er32(XONTXC);
3573 adapter->stats.xoffrxc += er32(XOFFRXC);
3574 adapter->stats.xofftxc += er32(XOFFTXC);
3575 adapter->stats.fcruc += er32(FCRUC);
3576 adapter->stats.gptc += er32(GPTC);
3577 adapter->stats.gotcl += er32(GOTCL);
3578 adapter->stats.gotch += er32(GOTCH);
3579 adapter->stats.rnbc += er32(RNBC);
3580 adapter->stats.ruc += er32(RUC);
3581 adapter->stats.rfc += er32(RFC);
3582 adapter->stats.rjc += er32(RJC);
3583 adapter->stats.torl += er32(TORL);
3584 adapter->stats.torh += er32(TORH);
3585 adapter->stats.totl += er32(TOTL);
3586 adapter->stats.toth += er32(TOTH);
3587 adapter->stats.tpr += er32(TPR);
3588
3589 if (hw->mac_type != e1000_ich8lan) {
3590 adapter->stats.ptc64 += er32(PTC64);
3591 adapter->stats.ptc127 += er32(PTC127);
3592 adapter->stats.ptc255 += er32(PTC255);
3593 adapter->stats.ptc511 += er32(PTC511);
3594 adapter->stats.ptc1023 += er32(PTC1023);
3595 adapter->stats.ptc1522 += er32(PTC1522);
3596 }
3597
3598 adapter->stats.mptc += er32(MPTC);
3599 adapter->stats.bptc += er32(BPTC);
1da177e4
LT		 3600
3601 /* used for adaptive IFS */
3602
1dc32918 3603 hw->tx_packet_delta = er32(TPT);
1da177e4 3604 adapter->stats.tpt += hw->tx_packet_delta;
1dc32918 3605 hw->collision_delta = er32(COLC);
1da177e4
LT		 3606 adapter->stats.colc += hw->collision_delta;
3607
96838a40 3608 if (hw->mac_type >= e1000_82543) {
1dc32918
JP		 3609 adapter->stats.algnerrc += er32(ALGNERRC);
3610 adapter->stats.rxerrc += er32(RXERRC);
3611 adapter->stats.tncrs += er32(TNCRS);
3612 adapter->stats.cexterr += er32(CEXTERR);
3613 adapter->stats.tsctc += er32(TSCTC);
3614 adapter->stats.tsctfc += er32(TSCTFC);
1da177e4 3615 }
96838a40 3616 if (hw->mac_type > e1000_82547_rev_2) {
1dc32918
JP		 3617 adapter->stats.iac += er32(IAC);
3618 adapter->stats.icrxoc += er32(ICRXOC);
3619
3620 if (hw->mac_type != e1000_ich8lan) {
3621 adapter->stats.icrxptc += er32(ICRXPTC);
3622 adapter->stats.icrxatc += er32(ICRXATC);
3623 adapter->stats.ictxptc += er32(ICTXPTC);
3624 adapter->stats.ictxatc += er32(ICTXATC);
3625 adapter->stats.ictxqec += er32(ICTXQEC);
3626 adapter->stats.ictxqmtc += er32(ICTXQMTC);
3627 adapter->stats.icrxdmtc += er32(ICRXDMTC);
cd94dd0b 3628 }
2d7edb92 3629 }
1da177e4
LT		 3630
3631 /* Fill out the OS statistics structure */
1da177e4
LT		 3632 adapter->net_stats.multicast = adapter->stats.mprc;
3633 adapter->net_stats.collisions = adapter->stats.colc;
3634
3635 /* Rx Errors */
3636
87041639
JK		 3637 /* RLEC on some newer hardware can be incorrect so build
3638 * our own version based on RUC and ROC */
1da177e4
LT		 3639 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3640 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3641 adapter->stats.ruc + adapter->stats.roc +
3642 adapter->stats.cexterr;
49559854
MW		 3643 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3644 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3645 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3646 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3647 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3648
3649 /* Tx Errors */
49559854
MW		 3650 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3651 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3652 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3653 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3654 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
1dc32918 3655 if (hw->bad_tx_carr_stats_fd &&
167fb284
JG		 3656 adapter->link_duplex == FULL_DUPLEX) {
3657 adapter->net_stats.tx_carrier_errors = 0;
3658 adapter->stats.tncrs = 0;
3659 }
1da177e4
LT		 3660
3661 /* Tx Dropped needs to be maintained elsewhere */
3662
3663 /* Phy Stats */
96838a40
JB		 3664 if (hw->media_type == e1000_media_type_copper) {
3665 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3666 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3667 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3668 adapter->phy_stats.idle_errors += phy_tmp;
3669 }
3670
96838a40 3671 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3672 (hw->phy_type == e1000_phy_m88) &&
3673 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3674 adapter->phy_stats.receive_errors += phy_tmp;
3675 }
3676
15e376b4 3677 /* Management Stats */
1dc32918
JP		 3678 if (hw->has_smbus) {
3679 adapter->stats.mgptc += er32(MGTPTC);
3680 adapter->stats.mgprc += er32(MGTPRC);
3681 adapter->stats.mgpdc += er32(MGTPDC);
15e376b4
JG		 3682 }
3683
1da177e4
LT		 3684 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3685}
9ac98284
JB		 3686
3687/**
3688 * e1000_intr_msi - Interrupt Handler
3689 * @irq: interrupt number
3690 * @data: pointer to a network interface device structure
3691 **/
3692
64798845 3693static irqreturn_t e1000_intr_msi(int irq, void *data)
9ac98284
JB		 3694{
3695 struct net_device *netdev = data;
3696 struct e1000_adapter *adapter = netdev_priv(netdev);
3697 struct e1000_hw *hw = &adapter->hw;
1dc32918 3698 u32 icr = er32(ICR);
9ac98284 3699
9150b76a
JB		 3700 /* in NAPI mode read ICR disables interrupts using IAM */
3701
b5fc8f0c
JB		 3702 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3703 hw->get_link_status = 1;
3704 /* 80003ES2LAN workaround-- For packet buffer work-around on
3705 * link down event; disable receives here in the ISR and reset
3706 * adapter in watchdog */
3707 if (netif_carrier_ok(netdev) &&
1dc32918 3708 (hw->mac_type == e1000_80003es2lan)) {
b5fc8f0c 3709 /* disable receives */
1dc32918
JP		 3710 u32 rctl = er32(RCTL);
3711 ew32(RCTL, rctl & ~E1000_RCTL_EN);
9ac98284 3712 }
b5fc8f0c
JB		 3713 /* guard against interrupt when we're going down */
3714 if (!test_bit(__E1000_DOWN, &adapter->flags))
3715 mod_timer(&adapter->watchdog_timer, jiffies + 1);
9ac98284
JB		 3716 }
3717
288379f0 3718 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3719 adapter->total_tx_bytes = 0;
3720 adapter->total_tx_packets = 0;
3721 adapter->total_rx_bytes = 0;
3722 adapter->total_rx_packets = 0;
288379f0 3723 __napi_schedule(&adapter->napi);
835bb129 3724 } else
9ac98284 3725 e1000_irq_enable(adapter);
9ac98284
JB		 3726
3727 return IRQ_HANDLED;
3728}
1da177e4
LT		 3729
3730/**
3731 * e1000_intr - Interrupt Handler
3732 * @irq: interrupt number
3733 * @data: pointer to a network interface device structure
1da177e4
LT		 3734 **/
3735
64798845 3736static irqreturn_t e1000_intr(int irq, void *data)
1da177e4
LT		 3737{
3738 struct net_device *netdev = data;
60490fe0 3739 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3740 struct e1000_hw *hw = &adapter->hw;
1dc32918 3741 u32 rctl, icr = er32(ICR);
c3570acb 3742
e151a60a 3743 if (unlikely((!icr) || test_bit(__E1000_DOWN, &adapter->flags)))
835bb129
JB		 3744 return IRQ_NONE; /* Not our interrupt */
3745
835bb129
JB		 3746 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3747 * not set, then the adapter didn't send an interrupt */
3748 if (unlikely(hw->mac_type >= e1000_82571 &&
3749 !(icr & E1000_ICR_INT_ASSERTED)))
3750 return IRQ_NONE;
3751
9150b76a
JB		 3752 /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked. No
3753 * need for the IMC write */
1da177e4 3754
96838a40 3755 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3756 hw->get_link_status = 1;
87041639
JK		 3757 /* 80003ES2LAN workaround--
3758 * For packet buffer work-around on link down event;
3759 * disable receives here in the ISR and
3760 * reset adapter in watchdog
3761 */
3762 if (netif_carrier_ok(netdev) &&
1dc32918 3763 (hw->mac_type == e1000_80003es2lan)) {
87041639 3764 /* disable receives */
1dc32918
JP		 3765 rctl = er32(RCTL);
3766 ew32(RCTL, rctl & ~E1000_RCTL_EN);
87041639 3767 }
1314bbf3
AK		 3768 /* guard against interrupt when we're going down */
3769 if (!test_bit(__E1000_DOWN, &adapter->flags))
3770 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3771 }
3772
1e613fd9 3773 if (unlikely(hw->mac_type < e1000_82571)) {
835bb129 3774 /* disable interrupts, without the synchronize_irq bit */
1dc32918
JP		 3775 ew32(IMC, ~0);
3776 E1000_WRITE_FLUSH();
1e613fd9 3777 }
288379f0 3778 if (likely(napi_schedule_prep(&adapter->napi))) {
835bb129
JB		 3779 adapter->total_tx_bytes = 0;
3780 adapter->total_tx_packets = 0;
3781 adapter->total_rx_bytes = 0;
3782 adapter->total_rx_packets = 0;
288379f0 3783 __napi_schedule(&adapter->napi);
a6c42322 3784 } else {
90fb5135
AK		 3785 /* this really should not happen! if it does it is basically a
3786 * bug, but not a hard error, so enable ints and continue */
a6c42322
JB		 3787 if (!test_bit(__E1000_DOWN, &adapter->flags))
3788 e1000_irq_enable(adapter);
3789 }
1da177e4 3790
1da177e4
LT		 3791 return IRQ_HANDLED;
3792}
3793
1da177e4
LT		 3794/**
3795 * e1000_clean - NAPI Rx polling callback
3796 * @adapter: board private structure
3797 **/
64798845 3798static int e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3799{
bea3348e
SH		 3800 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3801 struct net_device *poll_dev = adapter->netdev;
d2c7ddd6 3802 int tx_cleaned = 0, work_done = 0;
581d708e 3803
4cf1653a 3804 adapter = netdev_priv(poll_dev);
581d708e 3805
8017943e 3806 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[0]);
581d708e 3807
d3d9e484 3808 adapter->clean_rx(adapter, &adapter->rx_ring[0],
bea3348e 3809 &work_done, budget);
96838a40 3810
ccfb342c 3811 if (!tx_cleaned)
d2c7ddd6
DM		 3812 work_done = budget;
3813
53e52c72
DM		 3814 /* If budget not fully consumed, exit the polling mode */
3815 if (work_done < budget) {
835bb129
JB		 3816 if (likely(adapter->itr_setting & 3))
3817 e1000_set_itr(adapter);
288379f0 3818 napi_complete(napi);
a6c42322
JB		 3819 if (!test_bit(__E1000_DOWN, &adapter->flags))
3820 e1000_irq_enable(adapter);
1da177e4
LT		 3821 }
3822
bea3348e 3823 return work_done;
1da177e4
LT		 3824}
3825
1da177e4
LT		 3826/**
3827 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3828 * @adapter: board private structure
3829 **/
64798845
JP		 3830static bool e1000_clean_tx_irq(struct e1000_adapter *adapter,
3831 struct e1000_tx_ring *tx_ring)
1da177e4 3832{
1dc32918 3833 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3834 struct net_device *netdev = adapter->netdev;
3835 struct e1000_tx_desc *tx_desc, *eop_desc;
3836 struct e1000_buffer *buffer_info;
3837 unsigned int i, eop;
2a1af5d7 3838 unsigned int count = 0;
835bb129 3839 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3840
3841 i = tx_ring->next_to_clean;
3842 eop = tx_ring->buffer_info[i].next_to_watch;
3843 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3844
ccfb342c
AD		 3845 while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
3846 (count < tx_ring->count)) {
843f4267
JB		 3847 bool cleaned = false;
3848 for ( ; !cleaned; count++) {
1da177e4
LT		 3849 tx_desc = E1000_TX_DESC(*tx_ring, i);
3850 buffer_info = &tx_ring->buffer_info[i];
3851 cleaned = (i == eop);
3852
835bb129 3853 if (cleaned) {
2b65326e 3854 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3855 unsigned int segs, bytecount;
3856 segs = skb_shinfo(skb)->gso_segs ?: 1;
3857 /* multiply data chunks by size of headers */
3858 bytecount = ((segs - 1) * skb_headlen(skb)) +
3859 skb->len;
2b65326e 3860 total_tx_packets += segs;
7753b171 3861 total_tx_bytes += bytecount;
835bb129 3862 }
fd803241 3863 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 3864 tx_desc->upper.data = 0;
1da177e4 3865
96838a40 3866 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3867 }
581d708e 3868
1da177e4
LT		 3869 eop = tx_ring->buffer_info[i].next_to_watch;
3870 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3871 }
3872
3873 tx_ring->next_to_clean = i;
3874
77b2aad5 3875#define TX_WAKE_THRESHOLD 32
843f4267 3876 if (unlikely(count && netif_carrier_ok(netdev) &&
65c7973f
JB		 3877 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
3878 /* Make sure that anybody stopping the queue after this
3879 * sees the new next_to_clean.
3880 */
3881 smp_mb();
fcfb1224 3882 if (netif_queue_stopped(netdev)) {
77b2aad5 3883 netif_wake_queue(netdev);
fcfb1224
JB		 3884 ++adapter->restart_queue;
3885 }
77b2aad5 3886 }
2648345f 3887
581d708e 3888 if (adapter->detect_tx_hung) {
2648345f 3889 /* Detect a transmit hang in hardware, this serializes the
1da177e4 3890 * check with the clearing of time_stamp and movement of i */
c3033b01 3891 adapter->detect_tx_hung = false;
ccfb342c
AD		 3892 if (tx_ring->buffer_info[i].time_stamp &&
3893 time_after(jiffies, tx_ring->buffer_info[i].time_stamp +
7e6c9861 3894 (adapter->tx_timeout_factor * HZ))
1dc32918 3895 && !(er32(STATUS) & E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3896
3897 /* detected Tx unit hang */
c6963ef5 3898 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3899 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3900 " TDH <%x>\n"
3901 " TDT <%x>\n"
3902 " next_to_use <%x>\n"
3903 " next_to_clean <%x>\n"
3904 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3905 " time_stamp <%lx>\n"
3906 " next_to_watch <%x>\n"
3907 " jiffies <%lx>\n"
3908 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3909 (unsigned long)((tx_ring - adapter->tx_ring) /
3910 sizeof(struct e1000_tx_ring)),
1dc32918
JP		 3911 readl(hw->hw_addr + tx_ring->tdh),
3912 readl(hw->hw_addr + tx_ring->tdt),
70b8f1e1 3913 tx_ring->next_to_use,
392137fa 3914 tx_ring->next_to_clean,
ccfb342c 3915 tx_ring->buffer_info[i].time_stamp,
70b8f1e1
MC		 3916 eop,
3917 jiffies,
3918 eop_desc->upper.fields.status);
1da177e4 3919 netif_stop_queue(netdev);
70b8f1e1 3920 }
1da177e4 3921 }
835bb129
JB		 3922 adapter->total_tx_bytes += total_tx_bytes;
3923 adapter->total_tx_packets += total_tx_packets;
ef90e4ec
AK		 3924 adapter->net_stats.tx_bytes += total_tx_bytes;
3925 adapter->net_stats.tx_packets += total_tx_packets;
ccfb342c 3926 return (count < tx_ring->count);
1da177e4
LT		 3927}
3928
3929/**
3930 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3931 * @adapter: board private structure
3932 * @status_err: receive descriptor status and error fields
3933 * @csum: receive descriptor csum field
3934 * @sk_buff: socket buffer with received data
1da177e4
LT		 3935 **/
3936
64798845
JP		 3937static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
3938 u32 csum, struct sk_buff *skb)
1da177e4 3939{
1dc32918 3940 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 3941 u16 status = (u16)status_err;
3942 u8 errors = (u8)(status_err >> 24);
2d7edb92
MC		 3943 skb->ip_summed = CHECKSUM_NONE;
3944
1da177e4 3945 /* 82543 or newer only */
1dc32918 3946 if (unlikely(hw->mac_type < e1000_82543)) return;
1da177e4 3947 /* Ignore Checksum bit is set */
96838a40 3948 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3949 /* TCP/UDP checksum error bit is set */
96838a40 3950 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3951 /* let the stack verify checksum errors */
1da177e4 3952 adapter->hw_csum_err++;
2d7edb92
MC		 3953 return;
3954 }
3955 /* TCP/UDP Checksum has not been calculated */
1dc32918 3956 if (hw->mac_type <= e1000_82547_rev_2) {
96838a40 3957 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3958 return;
1da177e4 3959 } else {
96838a40 3960 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3961 return;
3962 }
3963 /* It must be a TCP or UDP packet with a valid checksum */
3964 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3965 /* TCP checksum is good */
3966 skb->ip_summed = CHECKSUM_UNNECESSARY;
1dc32918 3967 } else if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3968 /* IP fragment with UDP payload */
3969 /* Hardware complements the payload checksum, so we undo it
3970 * and then put the value in host order for further stack use.
3971 */
3e18826c
AV		 3972 __sum16 sum = (__force __sum16)htons(csum);
3973 skb->csum = csum_unfold(~sum);
84fa7933 3974 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 3975 }
2d7edb92 3976 adapter->hw_csum_good++;
1da177e4
LT		 3977}
3978
3979/**
2d7edb92 3980 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3981 * @adapter: board private structure
3982 **/
64798845
JP		 3983static bool e1000_clean_rx_irq(struct e1000_adapter *adapter,
3984 struct e1000_rx_ring *rx_ring,
3985 int *work_done, int work_to_do)
1da177e4 3986{
1dc32918 3987 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 3988 struct net_device *netdev = adapter->netdev;
3989 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3990 struct e1000_rx_desc *rx_desc, *next_rxd;
3991 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4 3992 unsigned long flags;
406874a7
JP		 3993 u32 length;
3994 u8 last_byte;
1da177e4 3995 unsigned int i;
72d64a43 3996 int cleaned_count = 0;
c3033b01 3997 bool cleaned = false;
835bb129 3998 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 3999
4000 i = rx_ring->next_to_clean;
4001 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4002 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4003
b92ff8ee 4004 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4005 struct sk_buff *skb;
a292ca6e 4006 u8 status;
90fb5135 4007
96838a40 4008 if (*work_done >= work_to_do)
1da177e4
LT		 4009 break;
4010 (*work_done)++;
c3570acb 4011
a292ca6e 4012 status = rx_desc->status;
b92ff8ee 4013 skb = buffer_info->skb;
86c3d59f
JB		 4014 buffer_info->skb = NULL;
4015
30320be8
JK		 4016 prefetch(skb->data - NET_IP_ALIGN);
4017
86c3d59f
JB		 4018 if (++i == rx_ring->count) i = 0;
4019 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4020 prefetch(next_rxd);
4021
86c3d59f 4022 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4023
c3033b01 4024 cleaned = true;
72d64a43 4025 cleaned_count++;
a292ca6e
JK		 4026 pci_unmap_single(pdev,
4027 buffer_info->dma,
4028 buffer_info->length,
1da177e4
LT		 4029 PCI_DMA_FROMDEVICE);
4030
1da177e4
LT		 4031 length = le16_to_cpu(rx_desc->length);
4032
a1415ee6
JK		 4033 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4034 /* All receives must fit into a single buffer */
4035 E1000_DBG("%s: Receive packet consumed multiple"
4036 " buffers\n", netdev->name);
864c4e45 4037 /* recycle */
8fc897b0 4038 buffer_info->skb = skb;
1da177e4
LT		 4039 goto next_desc;
4040 }
4041
96838a40 4042 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 4043 last_byte = *(skb->data + length - 1);
1dc32918
JP		 4044 if (TBI_ACCEPT(hw, status, rx_desc->errors, length,
4045 last_byte)) {
1da177e4 4046 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4047 e1000_tbi_adjust_stats(hw, &adapter->stats,
1da177e4
LT		 4048 length, skb->data);
4049 spin_unlock_irqrestore(&adapter->stats_lock,
4050 flags);
4051 length--;
4052 } else {
9e2feace
AK		 4053 /* recycle */
4054 buffer_info->skb = skb;
1da177e4
LT		 4055 goto next_desc;
4056 }
1cb5821f 4057 }
1da177e4 4058
d2a1e213
JB		 4059 /* adjust length to remove Ethernet CRC, this must be
4060 * done after the TBI_ACCEPT workaround above */
4061 length -= 4;
4062
835bb129
JB		 4063 /* probably a little skewed due to removing CRC */
4064 total_rx_bytes += length;
4065 total_rx_packets++;
4066
a292ca6e
JK		 4067 /* code added for copybreak, this should improve
4068 * performance for small packets with large amounts
4069 * of reassembly being done in the stack */
1f753861 4070 if (length < copybreak) {
a292ca6e 4071 struct sk_buff *new_skb =
87f5032e 4072 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 4073 if (new_skb) {
4074 skb_reserve(new_skb, NET_IP_ALIGN);
27d7ff46
ACM		 4075 skb_copy_to_linear_data_offset(new_skb,
4076 -NET_IP_ALIGN,
4077 (skb->data -
4078 NET_IP_ALIGN),
4079 (length +
4080 NET_IP_ALIGN));
a292ca6e
JK		 4081 /* save the skb in buffer_info as good */
4082 buffer_info->skb = skb;
4083 skb = new_skb;
a292ca6e 4084 }
996695de
AK		 4085 /* else just continue with the old one */
4086 }
a292ca6e 4087 /* end copybreak code */
996695de 4088 skb_put(skb, length);
1da177e4
LT		 4089
4090 /* Receive Checksum Offload */
a292ca6e 4091 e1000_rx_checksum(adapter,
406874a7
JP		 4092 (u32)(status) |
4093 ((u32)(rx_desc->errors) << 24),
c3d7a3a4 4094 le16_to_cpu(rx_desc->csum), skb);
96838a40 4095
1da177e4 4096 skb->protocol = eth_type_trans(skb, netdev);
c3570acb 4097
96838a40 4098 if (unlikely(adapter->vlgrp &&
a292ca6e 4099 (status & E1000_RXD_STAT_VP))) {
1da177e4 4100 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
38b22195 4101 le16_to_cpu(rx_desc->special));
1da177e4
LT		 4102 } else {
4103 netif_receive_skb(skb);
4104 }
c3570acb 4105
1da177e4
LT		 4106next_desc:
4107 rx_desc->status = 0;
1da177e4 4108
72d64a43
JK		 4109 /* return some buffers to hardware, one at a time is too slow */
4110 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4111 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4112 cleaned_count = 0;
4113 }
4114
30320be8 4115 /* use prefetched values */
86c3d59f
JB		 4116 rx_desc = next_rxd;
4117 buffer_info = next_buffer;
1da177e4 4118 }
1da177e4 4119 rx_ring->next_to_clean = i;
72d64a43
JK		 4120
4121 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4122 if (cleaned_count)
4123 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4124
835bb129
JB		 4125 adapter->total_rx_packets += total_rx_packets;
4126 adapter->total_rx_bytes += total_rx_bytes;
ef90e4ec
AK		 4127 adapter->net_stats.rx_bytes += total_rx_bytes;
4128 adapter->net_stats.rx_packets += total_rx_packets;
2d7edb92
MC		 4129 return cleaned;
4130}
4131
1da177e4 4132/**
2d7edb92 4133 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4134 * @adapter: address of board private structure
4135 **/
4136
64798845
JP		 4137static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
4138 struct e1000_rx_ring *rx_ring,
4139 int cleaned_count)
1da177e4 4140{
1dc32918 4141 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4142 struct net_device *netdev = adapter->netdev;
4143 struct pci_dev *pdev = adapter->pdev;
4144 struct e1000_rx_desc *rx_desc;
4145 struct e1000_buffer *buffer_info;
4146 struct sk_buff *skb;
2648345f
MC		 4147 unsigned int i;
4148 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4149
4150 i = rx_ring->next_to_use;
4151 buffer_info = &rx_ring->buffer_info[i];
4152
a292ca6e 4153 while (cleaned_count--) {
ca6f7224
CH		 4154 skb = buffer_info->skb;
4155 if (skb) {
a292ca6e
JK		 4156 skb_trim(skb, 0);
4157 goto map_skb;
4158 }
4159
ca6f7224 4160 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4161 if (unlikely(!skb)) {
1da177e4 4162 /* Better luck next round */
72d64a43 4163 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4164 break;
4165 }
4166
2648345f 4167 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4168 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4169 struct sk_buff *oldskb = skb;
2648345f
MC		 4170 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4171 "at %p\n", bufsz, skb->data);
4172 /* Try again, without freeing the previous */
87f5032e 4173 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4174 /* Failed allocation, critical failure */
1da177e4
LT		 4175 if (!skb) {
4176 dev_kfree_skb(oldskb);
4177 break;
4178 }
2648345f 4179
1da177e4
LT		 4180 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4181 /* give up */
4182 dev_kfree_skb(skb);
4183 dev_kfree_skb(oldskb);
4184 break; /* while !buffer_info->skb */
1da177e4 4185 }
ca6f7224
CH		 4186
4187 /* Use new allocation */
4188 dev_kfree_skb(oldskb);
1da177e4 4189 }
1da177e4
LT		 4190 /* Make buffer alignment 2 beyond a 16 byte boundary
4191 * this will result in a 16 byte aligned IP header after
4192 * the 14 byte MAC header is removed
4193 */
4194 skb_reserve(skb, NET_IP_ALIGN);
4195
1da177e4
LT		 4196 buffer_info->skb = skb;
4197 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4198map_skb:
1da177e4
LT		 4199 buffer_info->dma = pci_map_single(pdev,
4200 skb->data,
4201 adapter->rx_buffer_len,
4202 PCI_DMA_FROMDEVICE);
4203
2648345f
MC		 4204 /* Fix for errata 23, can't cross 64kB boundary */
4205 if (!e1000_check_64k_bound(adapter,
4206 (void *)(unsigned long)buffer_info->dma,
4207 adapter->rx_buffer_len)) {
4208 DPRINTK(RX_ERR, ERR,
4209 "dma align check failed: %u bytes at %p\n",
4210 adapter->rx_buffer_len,
4211 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4212 dev_kfree_skb(skb);
4213 buffer_info->skb = NULL;
4214
2648345f 4215 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4216 adapter->rx_buffer_len,
4217 PCI_DMA_FROMDEVICE);
4218
4219 break; /* while !buffer_info->skb */
4220 }
1da177e4
LT		 4221 rx_desc = E1000_RX_DESC(*rx_ring, i);
4222 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4223
96838a40
JB		 4224 if (unlikely(++i == rx_ring->count))
4225 i = 0;
1da177e4
LT		 4226 buffer_info = &rx_ring->buffer_info[i];
4227 }
4228
b92ff8ee
JB		 4229 if (likely(rx_ring->next_to_use != i)) {
4230 rx_ring->next_to_use = i;
4231 if (unlikely(i-- == 0))
4232 i = (rx_ring->count - 1);
4233
4234 /* Force memory writes to complete before letting h/w
4235 * know there are new descriptors to fetch. (Only
4236 * applicable for weak-ordered memory model archs,
4237 * such as IA-64). */
4238 wmb();
1dc32918 4239 writel(i, hw->hw_addr + rx_ring->rdt);
b92ff8ee 4240 }
1da177e4
LT		 4241}
4242
4243/**
4244 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4245 * @adapter:
4246 **/
4247
64798845 4248static void e1000_smartspeed(struct e1000_adapter *adapter)
1da177e4 4249{
1dc32918 4250 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4251 u16 phy_status;
4252 u16 phy_ctrl;
1da177e4 4253
1dc32918
JP		 4254 if ((hw->phy_type != e1000_phy_igp) || !hw->autoneg ||
4255 !(hw->autoneg_advertised & ADVERTISE_1000_FULL))
1da177e4
LT		 4256 return;
4257
96838a40 4258 if (adapter->smartspeed == 0) {
1da177e4
LT		 4259 /* If Master/Slave config fault is asserted twice,
4260 * we assume back-to-back */
1dc32918 4261 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4262 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4263 e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_status);
96838a40 4264 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1dc32918 4265 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4266 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4 4267 phy_ctrl &= ~CR_1000T_MS_ENABLE;
1dc32918 4268 e1000_write_phy_reg(hw, PHY_1000T_CTRL,
1da177e4
LT		 4269 phy_ctrl);
4270 adapter->smartspeed++;
1dc32918
JP		 4271 if (!e1000_phy_setup_autoneg(hw) &&
4272 !e1000_read_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4273 &phy_ctrl)) {
4274 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4275 MII_CR_RESTART_AUTO_NEG);
1dc32918 4276 e1000_write_phy_reg(hw, PHY_CTRL,
1da177e4
LT		 4277 phy_ctrl);
4278 }
4279 }
4280 return;
96838a40 4281 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4 4282 /* If still no link, perhaps using 2/3 pair cable */
1dc32918 4283 e1000_read_phy_reg(hw, PHY_1000T_CTRL, &phy_ctrl);
1da177e4 4284 phy_ctrl |= CR_1000T_MS_ENABLE;
1dc32918
JP		 4285 e1000_write_phy_reg(hw, PHY_1000T_CTRL, phy_ctrl);
4286 if (!e1000_phy_setup_autoneg(hw) &&
4287 !e1000_read_phy_reg(hw, PHY_CTRL, &phy_ctrl)) {
1da177e4
LT		 4288 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4289 MII_CR_RESTART_AUTO_NEG);
1dc32918 4290 e1000_write_phy_reg(hw, PHY_CTRL, phy_ctrl);
1da177e4
LT		 4291 }
4292 }
4293 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4294 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4295 adapter->smartspeed = 0;
4296}
4297
4298/**
4299 * e1000_ioctl -
4300 * @netdev:
4301 * @ifreq:
4302 * @cmd:
4303 **/
4304
64798845 4305static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
1da177e4
LT		 4306{
4307 switch (cmd) {
4308 case SIOCGMIIPHY:
4309 case SIOCGMIIREG:
4310 case SIOCSMIIREG:
4311 return e1000_mii_ioctl(netdev, ifr, cmd);
4312 default:
4313 return -EOPNOTSUPP;
4314 }
4315}
4316
4317/**
4318 * e1000_mii_ioctl -
4319 * @netdev:
4320 * @ifreq:
4321 * @cmd:
4322 **/
4323
64798845
JP		 4324static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
4325 int cmd)
1da177e4 4326{
60490fe0 4327 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4328 struct e1000_hw *hw = &adapter->hw;
1da177e4
LT		 4329 struct mii_ioctl_data *data = if_mii(ifr);
4330 int retval;
406874a7
JP		 4331 u16 mii_reg;
4332 u16 spddplx;
97876fc6 4333 unsigned long flags;
1da177e4 4334
1dc32918 4335 if (hw->media_type != e1000_media_type_copper)
1da177e4
LT		 4336 return -EOPNOTSUPP;
4337
4338 switch (cmd) {
4339 case SIOCGMIIPHY:
1dc32918 4340 data->phy_id = hw->phy_addr;
1da177e4
LT		 4341 break;
4342 case SIOCGMIIREG:
96838a40 4343 if (!capable(CAP_NET_ADMIN))
1da177e4 4344 return -EPERM;
97876fc6 4345 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4346 if (e1000_read_phy_reg(hw, data->reg_num & 0x1F,
97876fc6
MC		 4347 &data->val_out)) {
4348 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4349 return -EIO;
97876fc6
MC		 4350 }
4351 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4352 break;
4353 case SIOCSMIIREG:
96838a40 4354 if (!capable(CAP_NET_ADMIN))
1da177e4 4355 return -EPERM;
96838a40 4356 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4357 return -EFAULT;
4358 mii_reg = data->val_in;
97876fc6 4359 spin_lock_irqsave(&adapter->stats_lock, flags);
1dc32918 4360 if (e1000_write_phy_reg(hw, data->reg_num,
97876fc6
MC		 4361 mii_reg)) {
4362 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4363 return -EIO;
97876fc6 4364 }
f0163ac4 4365 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1dc32918 4366 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 4367 switch (data->reg_num) {
4368 case PHY_CTRL:
96838a40 4369 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4370 break;
96838a40 4371 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1dc32918
JP		 4372 hw->autoneg = 1;
4373 hw->autoneg_advertised = 0x2F;
1da177e4
LT		 4374 } else {
4375 if (mii_reg & 0x40)
4376 spddplx = SPEED_1000;
4377 else if (mii_reg & 0x2000)
4378 spddplx = SPEED_100;
4379 else
4380 spddplx = SPEED_10;
4381 spddplx += (mii_reg & 0x100)
cb764326
JK		 4382 ? DUPLEX_FULL :
4383 DUPLEX_HALF;
1da177e4
LT		 4384 retval = e1000_set_spd_dplx(adapter,
4385 spddplx);
f0163ac4 4386 if (retval)
1da177e4
LT		 4387 return retval;
4388 }
2db10a08
AK		 4389 if (netif_running(adapter->netdev))
4390 e1000_reinit_locked(adapter);
4391 else
1da177e4
LT		 4392 e1000_reset(adapter);
4393 break;
4394 case M88E1000_PHY_SPEC_CTRL:
4395 case M88E1000_EXT_PHY_SPEC_CTRL:
1dc32918 4396 if (e1000_phy_reset(hw))
1da177e4
LT		 4397 return -EIO;
4398 break;
4399 }
4400 } else {
4401 switch (data->reg_num) {
4402 case PHY_CTRL:
96838a40 4403 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4404 break;
2db10a08
AK		 4405 if (netif_running(adapter->netdev))
4406 e1000_reinit_locked(adapter);
4407 else
1da177e4
LT		 4408 e1000_reset(adapter);
4409 break;
4410 }
4411 }
4412 break;
4413 default:
4414 return -EOPNOTSUPP;
4415 }
4416 return E1000_SUCCESS;
4417}
4418
64798845 4419void e1000_pci_set_mwi(struct e1000_hw *hw)
1da177e4
LT		 4420{
4421 struct e1000_adapter *adapter = hw->back;
2648345f 4422 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4423
96838a40 4424 if (ret_val)
2648345f 4425 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4426}
4427
64798845 4428void e1000_pci_clear_mwi(struct e1000_hw *hw)
1da177e4
LT		 4429{
4430 struct e1000_adapter *adapter = hw->back;
4431
4432 pci_clear_mwi(adapter->pdev);
4433}
4434
64798845 4435int e1000_pcix_get_mmrbc(struct e1000_hw *hw)
007755eb
PO		 4436{
4437 struct e1000_adapter *adapter = hw->back;
4438 return pcix_get_mmrbc(adapter->pdev);
4439}
4440
64798845 4441void e1000_pcix_set_mmrbc(struct e1000_hw *hw, int mmrbc)
007755eb
PO		 4442{
4443 struct e1000_adapter *adapter = hw->back;
4444 pcix_set_mmrbc(adapter->pdev, mmrbc);
4445}
4446
64798845 4447s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
caeccb68
JK		 4448{
4449 struct e1000_adapter *adapter = hw->back;
406874a7 4450 u16 cap_offset;
caeccb68
JK		 4451
4452 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4453 if (!cap_offset)
4454 return -E1000_ERR_CONFIG;
4455
4456 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4457
4458 return E1000_SUCCESS;
4459}
4460
64798845 4461void e1000_io_write(struct e1000_hw *hw, unsigned long port, u32 value)
1da177e4
LT		 4462{
4463 outl(value, port);
4464}
4465
64798845
JP		 4466static void e1000_vlan_rx_register(struct net_device *netdev,
4467 struct vlan_group *grp)
1da177e4 4468{
60490fe0 4469 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4470 struct e1000_hw *hw = &adapter->hw;
406874a7 4471 u32 ctrl, rctl;
1da177e4 4472
9150b76a
JB		 4473 if (!test_bit(__E1000_DOWN, &adapter->flags))
4474 e1000_irq_disable(adapter);
1da177e4
LT		 4475 adapter->vlgrp = grp;
4476
96838a40 4477 if (grp) {
1da177e4 4478 /* enable VLAN tag insert/strip */
1dc32918 4479 ctrl = er32(CTRL);
1da177e4 4480 ctrl |= E1000_CTRL_VME;
1dc32918 4481 ew32(CTRL, ctrl);
1da177e4 4482
cd94dd0b 4483 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4484 /* enable VLAN receive filtering */
1dc32918 4485 rctl = er32(RCTL);
90fb5135 4486 rctl &= ~E1000_RCTL_CFIEN;
1dc32918 4487 ew32(RCTL, rctl);
90fb5135 4488 e1000_update_mng_vlan(adapter);
cd94dd0b 4489 }
1da177e4
LT		 4490 } else {
4491 /* disable VLAN tag insert/strip */
1dc32918 4492 ctrl = er32(CTRL);
1da177e4 4493 ctrl &= ~E1000_CTRL_VME;
1dc32918 4494 ew32(CTRL, ctrl);
1da177e4 4495
cd94dd0b 4496 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135 4497 if (adapter->mng_vlan_id !=
406874a7 4498 (u16)E1000_MNG_VLAN_NONE) {
90fb5135
AK		 4499 e1000_vlan_rx_kill_vid(netdev,
4500 adapter->mng_vlan_id);
4501 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4502 }
cd94dd0b 4503 }
1da177e4
LT		 4504 }
4505
9150b76a
JB		 4506 if (!test_bit(__E1000_DOWN, &adapter->flags))
4507 e1000_irq_enable(adapter);
1da177e4
LT		 4508}
4509
64798845 4510static void e1000_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
1da177e4 4511{
60490fe0 4512 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4513 struct e1000_hw *hw = &adapter->hw;
406874a7 4514 u32 vfta, index;
96838a40 4515
1dc32918 4516 if ((hw->mng_cookie.status &
96838a40
JB		 4517 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4518 (vid == adapter->mng_vlan_id))
2d7edb92 4519 return;
1da177e4
LT		 4520 /* add VID to filter table */
4521 index = (vid >> 5) & 0x7F;
1dc32918 4522 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4523 vfta |= (1 << (vid & 0x1F));
1dc32918 4524 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4525}
4526
64798845 4527static void e1000_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
1da177e4 4528{
60490fe0 4529 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4530 struct e1000_hw *hw = &adapter->hw;
406874a7 4531 u32 vfta, index;
1da177e4 4532
9150b76a
JB		 4533 if (!test_bit(__E1000_DOWN, &adapter->flags))
4534 e1000_irq_disable(adapter);
5c15bdec 4535 vlan_group_set_device(adapter->vlgrp, vid, NULL);
9150b76a
JB		 4536 if (!test_bit(__E1000_DOWN, &adapter->flags))
4537 e1000_irq_enable(adapter);
1da177e4 4538
1dc32918 4539 if ((hw->mng_cookie.status &
96838a40 4540 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4541 (vid == adapter->mng_vlan_id)) {
4542 /* release control to f/w */
4543 e1000_release_hw_control(adapter);
2d7edb92 4544 return;
ff147013
JK		 4545 }
4546
1da177e4
LT		 4547 /* remove VID from filter table */
4548 index = (vid >> 5) & 0x7F;
1dc32918 4549 vfta = E1000_READ_REG_ARRAY(hw, VFTA, index);
1da177e4 4550 vfta &= ~(1 << (vid & 0x1F));
1dc32918 4551 e1000_write_vfta(hw, index, vfta);
1da177e4
LT		 4552}
4553
64798845 4554static void e1000_restore_vlan(struct e1000_adapter *adapter)
1da177e4
LT		 4555{
4556 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4557
96838a40 4558 if (adapter->vlgrp) {
406874a7 4559 u16 vid;
96838a40 4560 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 4561 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 4562 continue;
4563 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4564 }
4565 }
4566}
4567
64798845 4568int e1000_set_spd_dplx(struct e1000_adapter *adapter, u16 spddplx)
1da177e4 4569{
1dc32918
JP		 4570 struct e1000_hw *hw = &adapter->hw;
4571
4572 hw->autoneg = 0;
1da177e4 4573
6921368f 4574 /* Fiber NICs only allow 1000 gbps Full duplex */
1dc32918 4575 if ((hw->media_type == e1000_media_type_fiber) &&
6921368f
MC		 4576 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4577 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4578 return -EINVAL;
4579 }
4580
96838a40 4581 switch (spddplx) {
1da177e4 4582 case SPEED_10 + DUPLEX_HALF:
1dc32918 4583 hw->forced_speed_duplex = e1000_10_half;
1da177e4
LT		 4584 break;
4585 case SPEED_10 + DUPLEX_FULL:
1dc32918 4586 hw->forced_speed_duplex = e1000_10_full;
1da177e4
LT		 4587 break;
4588 case SPEED_100 + DUPLEX_HALF:
1dc32918 4589 hw->forced_speed_duplex = e1000_100_half;
1da177e4
LT		 4590 break;
4591 case SPEED_100 + DUPLEX_FULL:
1dc32918 4592 hw->forced_speed_duplex = e1000_100_full;
1da177e4
LT		 4593 break;
4594 case SPEED_1000 + DUPLEX_FULL:
1dc32918
JP		 4595 hw->autoneg = 1;
4596 hw->autoneg_advertised = ADVERTISE_1000_FULL;
1da177e4
LT		 4597 break;
4598 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4599 default:
2648345f 4600 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4601 return -EINVAL;
4602 }
4603 return 0;
4604}
4605
b43fcd7d 4606static int __e1000_shutdown(struct pci_dev *pdev, bool *enable_wake)
1da177e4
LT		 4607{
4608 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4609 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4610 struct e1000_hw *hw = &adapter->hw;
406874a7
JP		 4611 u32 ctrl, ctrl_ext, rctl, status;
4612 u32 wufc = adapter->wol;
6fdfef16 4613#ifdef CONFIG_PM
240b1710 4614 int retval = 0;
6fdfef16 4615#endif
1da177e4
LT		 4616
4617 netif_device_detach(netdev);
4618
2db10a08
AK		 4619 if (netif_running(netdev)) {
4620 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 4621 e1000_down(adapter);
2db10a08 4622 }
1da177e4 4623
2f82665f 4624#ifdef CONFIG_PM
1d33e9c6 4625 retval = pci_save_state(pdev);
2f82665f
JB		 4626 if (retval)
4627 return retval;
4628#endif
4629
1dc32918 4630 status = er32(STATUS);
96838a40 4631 if (status & E1000_STATUS_LU)
1da177e4
LT		 4632 wufc &= ~E1000_WUFC_LNKC;
4633
96838a40 4634 if (wufc) {
1da177e4 4635 e1000_setup_rctl(adapter);
db0ce50d 4636 e1000_set_rx_mode(netdev);
1da177e4
LT		 4637
4638 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 4639 if (wufc & E1000_WUFC_MC) {
1dc32918 4640 rctl = er32(RCTL);
1da177e4 4641 rctl |= E1000_RCTL_MPE;
1dc32918 4642 ew32(RCTL, rctl);
1da177e4
LT		 4643 }
4644
1dc32918
JP		 4645 if (hw->mac_type >= e1000_82540) {
4646 ctrl = er32(CTRL);
1da177e4
LT		 4647 /* advertise wake from D3Cold */
4648 #define E1000_CTRL_ADVD3WUC 0x00100000
4649 /* phy power management enable */
4650 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4651 ctrl |= E1000_CTRL_ADVD3WUC |
4652 E1000_CTRL_EN_PHY_PWR_MGMT;
1dc32918 4653 ew32(CTRL, ctrl);
1da177e4
LT		 4654 }
4655
1dc32918
JP		 4656 if (hw->media_type == e1000_media_type_fiber ||
4657 hw->media_type == e1000_media_type_internal_serdes) {
1da177e4 4658 /* keep the laser running in D3 */
1dc32918 4659 ctrl_ext = er32(CTRL_EXT);
1da177e4 4660 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
1dc32918 4661 ew32(CTRL_EXT, ctrl_ext);
1da177e4
LT		 4662 }
4663
2d7edb92 4664 /* Allow time for pending master requests to run */
1dc32918 4665 e1000_disable_pciex_master(hw);
2d7edb92 4666
1dc32918
JP		 4667 ew32(WUC, E1000_WUC_PME_EN);
4668 ew32(WUFC, wufc);
1da177e4 4669 } else {
1dc32918
JP		 4670 ew32(WUC, 0);
4671 ew32(WUFC, 0);
1da177e4
LT		 4672 }
4673
0fccd0e9
JG		 4674 e1000_release_manageability(adapter);
4675
b43fcd7d
RW		 4676 *enable_wake = !!wufc;
4677
0fccd0e9 4678 /* make sure adapter isn't asleep if manageability is enabled */
b43fcd7d
RW		 4679 if (adapter->en_mng_pt)
4680 *enable_wake = true;
1da177e4 4681
1dc32918
JP		 4682 if (hw->phy_type == e1000_phy_igp_3)
4683 e1000_phy_powerdown_workaround(hw);
cd94dd0b 4684
edd106fc
AK		 4685 if (netif_running(netdev))
4686 e1000_free_irq(adapter);
4687
b55ccb35
JK		 4688 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4689 * would have already happened in close and is redundant. */
4690 e1000_release_hw_control(adapter);
2d7edb92 4691
1da177e4 4692 pci_disable_device(pdev);
240b1710 4693
1da177e4
LT		 4694 return 0;
4695}
4696
2f82665f 4697#ifdef CONFIG_PM
b43fcd7d
RW		 4698static int e1000_suspend(struct pci_dev *pdev, pm_message_t state)
4699{
4700 int retval;
4701 bool wake;
4702
4703 retval = __e1000_shutdown(pdev, &wake);
4704 if (retval)
4705 return retval;
4706
4707 if (wake) {
4708 pci_prepare_to_sleep(pdev);
4709 } else {
4710 pci_wake_from_d3(pdev, false);
4711 pci_set_power_state(pdev, PCI_D3hot);
4712 }
4713
4714 return 0;
4715}
4716
64798845 4717static int e1000_resume(struct pci_dev *pdev)
1da177e4
LT		 4718{
4719 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4720 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4721 struct e1000_hw *hw = &adapter->hw;
406874a7 4722 u32 err;
1da177e4 4723
d0e027db 4724 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 4725 pci_restore_state(pdev);
81250297
TI		 4726
4727 if (adapter->need_ioport)
4728 err = pci_enable_device(pdev);
4729 else
4730 err = pci_enable_device_mem(pdev);
c7be73bc 4731 if (err) {
3d1dd8cb
AK		 4732 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
4733 return err;
4734 }
a4cb847d 4735 pci_set_master(pdev);
1da177e4 4736
d0e027db
AK		 4737 pci_enable_wake(pdev, PCI_D3hot, 0);
4738 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 4739
c7be73bc
JP		 4740 if (netif_running(netdev)) {
4741 err = e1000_request_irq(adapter);
4742 if (err)
4743 return err;
4744 }
edd106fc
AK		 4745
4746 e1000_power_up_phy(adapter);
1da177e4 4747 e1000_reset(adapter);
1dc32918 4748 ew32(WUS, ~0);
1da177e4 4749
0fccd0e9
JG		 4750 e1000_init_manageability(adapter);
4751
96838a40 4752 if (netif_running(netdev))
1da177e4
LT		 4753 e1000_up(adapter);
4754
4755 netif_device_attach(netdev);
4756
b55ccb35
JK		 4757 /* If the controller is 82573 and f/w is AMT, do not set
4758 * DRV_LOAD until the interface is up. For all other cases,
4759 * let the f/w know that the h/w is now under the control
4760 * of the driver. */
1dc32918
JP		 4761 if (hw->mac_type != e1000_82573 ||
4762 !e1000_check_mng_mode(hw))
b55ccb35 4763 e1000_get_hw_control(adapter);
2d7edb92 4764
1da177e4
LT		 4765 return 0;
4766}
4767#endif
c653e635
AK		 4768
4769static void e1000_shutdown(struct pci_dev *pdev)
4770{
b43fcd7d
RW		 4771 bool wake;
4772
4773 __e1000_shutdown(pdev, &wake);
4774
4775 if (system_state == SYSTEM_POWER_OFF) {
4776 pci_wake_from_d3(pdev, wake);
4777 pci_set_power_state(pdev, PCI_D3hot);
4778 }
c653e635
AK		 4779}
4780
1da177e4
LT		 4781#ifdef CONFIG_NET_POLL_CONTROLLER
4782/*
4783 * Polling 'interrupt' - used by things like netconsole to send skbs
4784 * without having to re-enable interrupts. It's not called while
4785 * the interrupt routine is executing.
4786 */
64798845 4787static void e1000_netpoll(struct net_device *netdev)
1da177e4 4788{
60490fe0 4789 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 4790
1da177e4 4791 disable_irq(adapter->pdev->irq);
7d12e780 4792 e1000_intr(adapter->pdev->irq, netdev);
1da177e4
LT		 4793 enable_irq(adapter->pdev->irq);
4794}
4795#endif
4796
9026729b
AK		 4797/**
4798 * e1000_io_error_detected - called when PCI error is detected
4799 * @pdev: Pointer to PCI device
4800 * @state: The current pci conneection state
4801 *
4802 * This function is called after a PCI bus error affecting
4803 * this device has been detected.
4804 */
64798845
JP		 4805static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
4806 pci_channel_state_t state)
9026729b
AK		 4807{
4808 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4809 struct e1000_adapter *adapter = netdev_priv(netdev);
9026729b
AK		 4810
4811 netif_device_detach(netdev);
4812
4813 if (netif_running(netdev))
4814 e1000_down(adapter);
72e8d6bb 4815 pci_disable_device(pdev);
9026729b
AK		 4816
4817 /* Request a slot slot reset. */
4818 return PCI_ERS_RESULT_NEED_RESET;
4819}
4820
4821/**
4822 * e1000_io_slot_reset - called after the pci bus has been reset.
4823 * @pdev: Pointer to PCI device
4824 *
4825 * Restart the card from scratch, as if from a cold-boot. Implementation
4826 * resembles the first-half of the e1000_resume routine.
4827 */
4828static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
4829{
4830 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4831 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4832 struct e1000_hw *hw = &adapter->hw;
81250297 4833 int err;
9026729b 4834
81250297
TI		 4835 if (adapter->need_ioport)
4836 err = pci_enable_device(pdev);
4837 else
4838 err = pci_enable_device_mem(pdev);
4839 if (err) {
9026729b
AK		 4840 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
4841 return PCI_ERS_RESULT_DISCONNECT;
4842 }
4843 pci_set_master(pdev);
4844
dbf38c94
LV		 4845 pci_enable_wake(pdev, PCI_D3hot, 0);
4846 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 4847
9026729b 4848 e1000_reset(adapter);
1dc32918 4849 ew32(WUS, ~0);
9026729b
AK		 4850
4851 return PCI_ERS_RESULT_RECOVERED;
4852}
4853
4854/**
4855 * e1000_io_resume - called when traffic can start flowing again.
4856 * @pdev: Pointer to PCI device
4857 *
4858 * This callback is called when the error recovery driver tells us that
4859 * its OK to resume normal operation. Implementation resembles the
4860 * second-half of the e1000_resume routine.
4861 */
4862static void e1000_io_resume(struct pci_dev *pdev)
4863{
4864 struct net_device *netdev = pci_get_drvdata(pdev);
4cf1653a 4865 struct e1000_adapter *adapter = netdev_priv(netdev);
1dc32918 4866 struct e1000_hw *hw = &adapter->hw;
0fccd0e9
JG		 4867
4868 e1000_init_manageability(adapter);
9026729b
AK		 4869
4870 if (netif_running(netdev)) {
4871 if (e1000_up(adapter)) {
4872 printk("e1000: can't bring device back up after reset\n");
4873 return;
4874 }
4875 }
4876
4877 netif_device_attach(netdev);
4878
0fccd0e9
JG		 4879 /* If the controller is 82573 and f/w is AMT, do not set
4880 * DRV_LOAD until the interface is up. For all other cases,
4881 * let the f/w know that the h/w is now under the control
4882 * of the driver. */
1dc32918
JP		 4883 if (hw->mac_type != e1000_82573 ||
4884 !e1000_check_mng_mode(hw))
0fccd0e9 4885 e1000_get_hw_control(adapter);
9026729b 4886
9026729b
AK		 4887}
4888
1da177e4 4889/* e1000_main.c */
Clone of davem's net-next-2.6 tree