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[net-next-2.6.git] / drivers / net / e1000 / e1000_main.c
CommitLineData
1da177e4
LT		 1/*******************************************************************************
2
0abb6eb1
AK		 3 Intel PRO/1000 Linux driver
4 Copyright(c) 1999 - 2006 Intel Corporation.
5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms and conditions of the GNU General Public License,
8 version 2, as published by the Free Software Foundation.
9
10 This program is distributed in the hope it will be useful, but WITHOUT
11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
1da177e4 13 more details.
0abb6eb1 14
1da177e4 15 You should have received a copy of the GNU General Public License along with
0abb6eb1
AK		 16 this program; if not, write to the Free Software Foundation, Inc.,
17 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18
19 The full GNU General Public License is included in this distribution in
20 the file called "COPYING".
21
1da177e4
LT		 22 Contact Information:
23 Linux NICS <linux.nics@intel.com>
3d41e30a 24 e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
1da177e4
LT		 25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
d0bb53e1 30#include <net/ip6_checksum.h>
1da177e4 31
1da177e4 32char e1000_driver_name[] = "e1000";
3ad2cc67 33static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 34#ifndef CONFIG_E1000_NAPI
35#define DRIVERNAPI
36#else
37#define DRIVERNAPI "-NAPI"
38#endif
7e721579 39#define DRV_VERSION "7.3.20-k2"DRIVERNAPI
1da177e4 40char e1000_driver_version[] = DRV_VERSION;
3d41e30a 41static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
1da177e4
LT		 42
43/* e1000_pci_tbl - PCI Device ID Table
44 *
45 * Last entry must be all 0s
46 *
47 * Macro expands to...
48 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
49 */
50static struct pci_device_id e1000_pci_tbl[] = {
51 INTEL_E1000_ETHERNET_DEVICE(0x1000),
52 INTEL_E1000_ETHERNET_DEVICE(0x1001),
53 INTEL_E1000_ETHERNET_DEVICE(0x1004),
54 INTEL_E1000_ETHERNET_DEVICE(0x1008),
55 INTEL_E1000_ETHERNET_DEVICE(0x1009),
56 INTEL_E1000_ETHERNET_DEVICE(0x100C),
57 INTEL_E1000_ETHERNET_DEVICE(0x100D),
58 INTEL_E1000_ETHERNET_DEVICE(0x100E),
59 INTEL_E1000_ETHERNET_DEVICE(0x100F),
60 INTEL_E1000_ETHERNET_DEVICE(0x1010),
61 INTEL_E1000_ETHERNET_DEVICE(0x1011),
62 INTEL_E1000_ETHERNET_DEVICE(0x1012),
63 INTEL_E1000_ETHERNET_DEVICE(0x1013),
64 INTEL_E1000_ETHERNET_DEVICE(0x1014),
65 INTEL_E1000_ETHERNET_DEVICE(0x1015),
66 INTEL_E1000_ETHERNET_DEVICE(0x1016),
67 INTEL_E1000_ETHERNET_DEVICE(0x1017),
68 INTEL_E1000_ETHERNET_DEVICE(0x1018),
69 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 70 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 71 INTEL_E1000_ETHERNET_DEVICE(0x101D),
72 INTEL_E1000_ETHERNET_DEVICE(0x101E),
73 INTEL_E1000_ETHERNET_DEVICE(0x1026),
74 INTEL_E1000_ETHERNET_DEVICE(0x1027),
75 INTEL_E1000_ETHERNET_DEVICE(0x1028),
ae2c3860
AK		 76 INTEL_E1000_ETHERNET_DEVICE(0x1049),
77 INTEL_E1000_ETHERNET_DEVICE(0x104A),
78 INTEL_E1000_ETHERNET_DEVICE(0x104B),
79 INTEL_E1000_ETHERNET_DEVICE(0x104C),
80 INTEL_E1000_ETHERNET_DEVICE(0x104D),
07b8fede
MC		 81 INTEL_E1000_ETHERNET_DEVICE(0x105E),
82 INTEL_E1000_ETHERNET_DEVICE(0x105F),
83 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 84 INTEL_E1000_ETHERNET_DEVICE(0x1075),
85 INTEL_E1000_ETHERNET_DEVICE(0x1076),
86 INTEL_E1000_ETHERNET_DEVICE(0x1077),
87 INTEL_E1000_ETHERNET_DEVICE(0x1078),
88 INTEL_E1000_ETHERNET_DEVICE(0x1079),
89 INTEL_E1000_ETHERNET_DEVICE(0x107A),
90 INTEL_E1000_ETHERNET_DEVICE(0x107B),
91 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 92 INTEL_E1000_ETHERNET_DEVICE(0x107D),
93 INTEL_E1000_ETHERNET_DEVICE(0x107E),
94 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 95 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 96 INTEL_E1000_ETHERNET_DEVICE(0x108B),
97 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 98 INTEL_E1000_ETHERNET_DEVICE(0x1096),
99 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 100 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 101 INTEL_E1000_ETHERNET_DEVICE(0x109A),
5881cde8 102 INTEL_E1000_ETHERNET_DEVICE(0x10A4),
ce57a02c 103 INTEL_E1000_ETHERNET_DEVICE(0x10A5),
b7ee49db 104 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 105 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
ae2c3860
AK		 106 INTEL_E1000_ETHERNET_DEVICE(0x10BA),
107 INTEL_E1000_ETHERNET_DEVICE(0x10BB),
fc2307d0
AK		 108 INTEL_E1000_ETHERNET_DEVICE(0x10BC),
109 INTEL_E1000_ETHERNET_DEVICE(0x10C4),
110 INTEL_E1000_ETHERNET_DEVICE(0x10C5),
f4ec7f98 111 INTEL_E1000_ETHERNET_DEVICE(0x10D5),
ce57a02c
AK		 112 INTEL_E1000_ETHERNET_DEVICE(0x10D9),
113 INTEL_E1000_ETHERNET_DEVICE(0x10DA),
1da177e4
LT		 114 /* required last entry */
115 {0,}
116};
117
118MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
119
35574764
NN		 120int e1000_up(struct e1000_adapter *adapter);
121void e1000_down(struct e1000_adapter *adapter);
122void e1000_reinit_locked(struct e1000_adapter *adapter);
123void e1000_reset(struct e1000_adapter *adapter);
124int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
125int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
126int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
127void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
128void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
3ad2cc67 129static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
35574764 130 struct e1000_tx_ring *txdr);
3ad2cc67 131static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
35574764 132 struct e1000_rx_ring *rxdr);
3ad2cc67 133static void e1000_free_tx_resources(struct e1000_adapter *adapter,
35574764 134 struct e1000_tx_ring *tx_ring);
3ad2cc67 135static void e1000_free_rx_resources(struct e1000_adapter *adapter,
35574764
NN		 136 struct e1000_rx_ring *rx_ring);
137void e1000_update_stats(struct e1000_adapter *adapter);
1da177e4
LT		 138
139static int e1000_init_module(void);
140static void e1000_exit_module(void);
141static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
142static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 143static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 144static int e1000_sw_init(struct e1000_adapter *adapter);
145static int e1000_open(struct net_device *netdev);
146static int e1000_close(struct net_device *netdev);
147static void e1000_configure_tx(struct e1000_adapter *adapter);
148static void e1000_configure_rx(struct e1000_adapter *adapter);
149static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 150static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
151static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
152static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
153 struct e1000_tx_ring *tx_ring);
154static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
155 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 156static void e1000_set_multi(struct net_device *netdev);
157static void e1000_update_phy_info(unsigned long data);
158static void e1000_watchdog(unsigned long data);
1da177e4
LT		 159static void e1000_82547_tx_fifo_stall(unsigned long data);
160static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
161static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
162static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
163static int e1000_set_mac(struct net_device *netdev, void *p);
7d12e780 164static irqreturn_t e1000_intr(int irq, void *data);
9ac98284 165static irqreturn_t e1000_intr_msi(int irq, void *data);
581d708e
MC		 166static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
167 struct e1000_tx_ring *tx_ring);
1da177e4 168#ifdef CONFIG_E1000_NAPI
bea3348e 169static int e1000_clean(struct napi_struct *napi, int budget);
1da177e4 170static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 171 struct e1000_rx_ring *rx_ring,
1da177e4 172 int *work_done, int work_to_do);
2d7edb92 173static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 174 struct e1000_rx_ring *rx_ring,
2d7edb92 175 int *work_done, int work_to_do);
1da177e4 176#else
581d708e
MC		 177static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
178 struct e1000_rx_ring *rx_ring);
179static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
180 struct e1000_rx_ring *rx_ring);
1da177e4 181#endif
581d708e 182static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 183 struct e1000_rx_ring *rx_ring,
184 int cleaned_count);
581d708e 185static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 186 struct e1000_rx_ring *rx_ring,
187 int cleaned_count);
1da177e4
LT		 188static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
189static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
190 int cmd);
35574764 191void e1000_set_ethtool_ops(struct net_device *netdev);
1da177e4
LT		 192static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
193static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
194static void e1000_tx_timeout(struct net_device *dev);
65f27f38 195static void e1000_reset_task(struct work_struct *work);
1da177e4 196static void e1000_smartspeed(struct e1000_adapter *adapter);
e619d523
AK		 197static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
198 struct sk_buff *skb);
1da177e4
LT		 199
200static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
201static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
202static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
203static void e1000_restore_vlan(struct e1000_adapter *adapter);
204
977e74b5 205static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
6fdfef16 206#ifdef CONFIG_PM
1da177e4
LT		 207static int e1000_resume(struct pci_dev *pdev);
208#endif
c653e635 209static void e1000_shutdown(struct pci_dev *pdev);
1da177e4
LT		 210
211#ifdef CONFIG_NET_POLL_CONTROLLER
212/* for netdump / net console */
213static void e1000_netpoll (struct net_device *netdev);
214#endif
215
35574764
NN		 216extern void e1000_check_options(struct e1000_adapter *adapter);
217
1f753861
JB		 218#define COPYBREAK_DEFAULT 256
219static unsigned int copybreak __read_mostly = COPYBREAK_DEFAULT;
220module_param(copybreak, uint, 0644);
221MODULE_PARM_DESC(copybreak,
222 "Maximum size of packet that is copied to a new buffer on receive");
223
9026729b
AK		 224static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
225 pci_channel_state_t state);
226static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
227static void e1000_io_resume(struct pci_dev *pdev);
228
229static struct pci_error_handlers e1000_err_handler = {
230 .error_detected = e1000_io_error_detected,
231 .slot_reset = e1000_io_slot_reset,
232 .resume = e1000_io_resume,
233};
24025e4e 234
1da177e4
LT		 235static struct pci_driver e1000_driver = {
236 .name = e1000_driver_name,
237 .id_table = e1000_pci_tbl,
238 .probe = e1000_probe,
239 .remove = __devexit_p(e1000_remove),
c4e24f01 240#ifdef CONFIG_PM
1da177e4 241 /* Power Managment Hooks */
1da177e4 242 .suspend = e1000_suspend,
c653e635 243 .resume = e1000_resume,
1da177e4 244#endif
9026729b
AK		 245 .shutdown = e1000_shutdown,
246 .err_handler = &e1000_err_handler
1da177e4
LT		 247};
248
249MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
250MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
251MODULE_LICENSE("GPL");
252MODULE_VERSION(DRV_VERSION);
253
254static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
255module_param(debug, int, 0);
256MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
257
258/**
259 * e1000_init_module - Driver Registration Routine
260 *
261 * e1000_init_module is the first routine called when the driver is
262 * loaded. All it does is register with the PCI subsystem.
263 **/
264
265static int __init
266e1000_init_module(void)
267{
268 int ret;
269 printk(KERN_INFO "%s - version %s\n",
270 e1000_driver_string, e1000_driver_version);
271
272 printk(KERN_INFO "%s\n", e1000_copyright);
273
29917620 274 ret = pci_register_driver(&e1000_driver);
1f753861
JB		 275 if (copybreak != COPYBREAK_DEFAULT) {
276 if (copybreak == 0)
277 printk(KERN_INFO "e1000: copybreak disabled\n");
278 else
279 printk(KERN_INFO "e1000: copybreak enabled for "
280 "packets <= %u bytes\n", copybreak);
281 }
1da177e4
LT		 282 return ret;
283}
284
285module_init(e1000_init_module);
286
287/**
288 * e1000_exit_module - Driver Exit Cleanup Routine
289 *
290 * e1000_exit_module is called just before the driver is removed
291 * from memory.
292 **/
293
294static void __exit
295e1000_exit_module(void)
296{
1da177e4
LT		 297 pci_unregister_driver(&e1000_driver);
298}
299
300module_exit(e1000_exit_module);
301
2db10a08
AK		 302static int e1000_request_irq(struct e1000_adapter *adapter)
303{
304 struct net_device *netdev = adapter->netdev;
e94bd23f
AK		 305 void (*handler) = &e1000_intr;
306 int irq_flags = IRQF_SHARED;
307 int err;
2db10a08 308
9ac98284 309 if (adapter->hw.mac_type >= e1000_82571) {
e94bd23f
AK		 310 adapter->have_msi = !pci_enable_msi(adapter->pdev);
311 if (adapter->have_msi) {
312 handler = &e1000_intr_msi;
313 irq_flags = 0;
2db10a08
AK		 314 }
315 }
e94bd23f
AK		 316
317 err = request_irq(adapter->pdev->irq, handler, irq_flags, netdev->name,
318 netdev);
319 if (err) {
320 if (adapter->have_msi)
321 pci_disable_msi(adapter->pdev);
2db10a08
AK		 322 DPRINTK(PROBE, ERR,
323 "Unable to allocate interrupt Error: %d\n", err);
e94bd23f 324 }
2db10a08
AK		 325
326 return err;
327}
328
329static void e1000_free_irq(struct e1000_adapter *adapter)
330{
331 struct net_device *netdev = adapter->netdev;
332
333 free_irq(adapter->pdev->irq, netdev);
334
2db10a08
AK		 335 if (adapter->have_msi)
336 pci_disable_msi(adapter->pdev);
2db10a08
AK		 337}
338
1da177e4
LT		 339/**
340 * e1000_irq_disable - Mask off interrupt generation on the NIC
341 * @adapter: board private structure
342 **/
343
e619d523 344static void
1da177e4
LT		 345e1000_irq_disable(struct e1000_adapter *adapter)
346{
347 atomic_inc(&adapter->irq_sem);
348 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
349 E1000_WRITE_FLUSH(&adapter->hw);
350 synchronize_irq(adapter->pdev->irq);
351}
352
353/**
354 * e1000_irq_enable - Enable default interrupt generation settings
355 * @adapter: board private structure
356 **/
357
e619d523 358static void
1da177e4
LT		 359e1000_irq_enable(struct e1000_adapter *adapter)
360{
96838a40 361 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 362 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
363 E1000_WRITE_FLUSH(&adapter->hw);
364 }
365}
3ad2cc67
AB		 366
367static void
2d7edb92
MC		 368e1000_update_mng_vlan(struct e1000_adapter *adapter)
369{
370 struct net_device *netdev = adapter->netdev;
371 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
372 uint16_t old_vid = adapter->mng_vlan_id;
96838a40 373 if (adapter->vlgrp) {
5c15bdec 374 if (!vlan_group_get_device(adapter->vlgrp, vid)) {
96838a40 375 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 376 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
377 e1000_vlan_rx_add_vid(netdev, vid);
378 adapter->mng_vlan_id = vid;
379 } else
380 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 381
382 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
383 (vid != old_vid) &&
5c15bdec 384 !vlan_group_get_device(adapter->vlgrp, old_vid))
2d7edb92 385 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 386 } else
387 adapter->mng_vlan_id = vid;
2d7edb92
MC		 388 }
389}
b55ccb35
JK		 390
391/**
392 * e1000_release_hw_control - release control of the h/w to f/w
393 * @adapter: address of board private structure
394 *
395 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
396 * For ASF and Pass Through versions of f/w this means that the
397 * driver is no longer loaded. For AMT version (only with 82573) i
90fb5135 398 * of the f/w this means that the network i/f is closed.
76c224bc 399 *
b55ccb35
JK		 400 **/
401
e619d523 402static void
b55ccb35
JK		 403e1000_release_hw_control(struct e1000_adapter *adapter)
404{
405 uint32_t ctrl_ext;
406 uint32_t swsm;
407
408 /* Let firmware taken over control of h/w */
409 switch (adapter->hw.mac_type) {
b55ccb35
JK		 410 case e1000_82573:
411 swsm = E1000_READ_REG(&adapter->hw, SWSM);
412 E1000_WRITE_REG(&adapter->hw, SWSM,
413 swsm & ~E1000_SWSM_DRV_LOAD);
31d76442
BA		 414 break;
415 case e1000_82571:
416 case e1000_82572:
417 case e1000_80003es2lan:
cd94dd0b 418 case e1000_ich8lan:
31d76442 419 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
cd94dd0b 420 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
31d76442 421 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 422 break;
b55ccb35
JK		 423 default:
424 break;
425 }
426}
427
428/**
429 * e1000_get_hw_control - get control of the h/w from f/w
430 * @adapter: address of board private structure
431 *
432 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
76c224bc
AK		 433 * For ASF and Pass Through versions of f/w this means that
434 * the driver is loaded. For AMT version (only with 82573)
90fb5135 435 * of the f/w this means that the network i/f is open.
76c224bc 436 *
b55ccb35
JK		 437 **/
438
e619d523 439static void
b55ccb35
JK		 440e1000_get_hw_control(struct e1000_adapter *adapter)
441{
442 uint32_t ctrl_ext;
443 uint32_t swsm;
90fb5135 444
b55ccb35
JK		 445 /* Let firmware know the driver has taken over */
446 switch (adapter->hw.mac_type) {
b55ccb35
JK		 447 case e1000_82573:
448 swsm = E1000_READ_REG(&adapter->hw, SWSM);
449 E1000_WRITE_REG(&adapter->hw, SWSM,
450 swsm | E1000_SWSM_DRV_LOAD);
451 break;
31d76442
BA		 452 case e1000_82571:
453 case e1000_82572:
454 case e1000_80003es2lan:
cd94dd0b 455 case e1000_ich8lan:
31d76442
BA		 456 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
457 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
458 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
cd94dd0b 459 break;
b55ccb35
JK		 460 default:
461 break;
462 }
463}
464
0fccd0e9
JG		 465static void
466e1000_init_manageability(struct e1000_adapter *adapter)
467{
468 if (adapter->en_mng_pt) {
469 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
470
471 /* disable hardware interception of ARP */
472 manc &= ~(E1000_MANC_ARP_EN);
473
474 /* enable receiving management packets to the host */
475 /* this will probably generate destination unreachable messages
476 * from the host OS, but the packets will be handled on SMBUS */
477 if (adapter->hw.has_manc2h) {
478 uint32_t manc2h = E1000_READ_REG(&adapter->hw, MANC2H);
479
480 manc |= E1000_MANC_EN_MNG2HOST;
481#define E1000_MNG2HOST_PORT_623 (1 << 5)
482#define E1000_MNG2HOST_PORT_664 (1 << 6)
483 manc2h |= E1000_MNG2HOST_PORT_623;
484 manc2h |= E1000_MNG2HOST_PORT_664;
485 E1000_WRITE_REG(&adapter->hw, MANC2H, manc2h);
486 }
487
488 E1000_WRITE_REG(&adapter->hw, MANC, manc);
489 }
490}
491
492static void
493e1000_release_manageability(struct e1000_adapter *adapter)
494{
495 if (adapter->en_mng_pt) {
496 uint32_t manc = E1000_READ_REG(&adapter->hw, MANC);
497
498 /* re-enable hardware interception of ARP */
499 manc |= E1000_MANC_ARP_EN;
500
501 if (adapter->hw.has_manc2h)
502 manc &= ~E1000_MANC_EN_MNG2HOST;
503
504 /* don't explicitly have to mess with MANC2H since
505 * MANC has an enable disable that gates MANC2H */
506
507 E1000_WRITE_REG(&adapter->hw, MANC, manc);
508 }
509}
510
e0aac5a2
AK		 511/**
512 * e1000_configure - configure the hardware for RX and TX
513 * @adapter = private board structure
514 **/
515static void e1000_configure(struct e1000_adapter *adapter)
1da177e4
LT		 516{
517 struct net_device *netdev = adapter->netdev;
2db10a08 518 int i;
1da177e4 519
1da177e4
LT		 520 e1000_set_multi(netdev);
521
522 e1000_restore_vlan(adapter);
0fccd0e9 523 e1000_init_manageability(adapter);
1da177e4
LT		 524
525 e1000_configure_tx(adapter);
526 e1000_setup_rctl(adapter);
527 e1000_configure_rx(adapter);
72d64a43
JK		 528 /* call E1000_DESC_UNUSED which always leaves
529 * at least 1 descriptor unused to make sure
530 * next_to_use != next_to_clean */
f56799ea 531 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 532 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 533 adapter->alloc_rx_buf(adapter, ring,
534 E1000_DESC_UNUSED(ring));
f56799ea 535 }
1da177e4 536
7bfa4816 537 adapter->tx_queue_len = netdev->tx_queue_len;
e0aac5a2
AK		 538}
539
540int e1000_up(struct e1000_adapter *adapter)
541{
542 /* hardware has been reset, we need to reload some things */
543 e1000_configure(adapter);
544
545 clear_bit(__E1000_DOWN, &adapter->flags);
7bfa4816 546
1da177e4 547#ifdef CONFIG_E1000_NAPI
bea3348e 548 napi_enable(&adapter->napi);
1da177e4 549#endif
5de55624
MC		 550 e1000_irq_enable(adapter);
551
79f3d399
JB		 552 /* fire a link change interrupt to start the watchdog */
553 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1da177e4
LT		 554 return 0;
555}
556
79f05bf0
AK		 557/**
558 * e1000_power_up_phy - restore link in case the phy was powered down
559 * @adapter: address of board private structure
560 *
561 * The phy may be powered down to save power and turn off link when the
562 * driver is unloaded and wake on lan is not enabled (among others)
563 * *** this routine MUST be followed by a call to e1000_reset ***
564 *
565 **/
566
d658266e 567void e1000_power_up_phy(struct e1000_adapter *adapter)
79f05bf0
AK		 568{
569 uint16_t mii_reg = 0;
570
571 /* Just clear the power down bit to wake the phy back up */
572 if (adapter->hw.media_type == e1000_media_type_copper) {
573 /* according to the manual, the phy will retain its
574 * settings across a power-down/up cycle */
575 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
576 mii_reg &= ~MII_CR_POWER_DOWN;
577 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
578 }
579}
580
581static void e1000_power_down_phy(struct e1000_adapter *adapter)
582{
61c2505f
BA		 583 /* Power down the PHY so no link is implied when interface is down *
584 * The PHY cannot be powered down if any of the following is TRUE *
79f05bf0
AK		 585 * (a) WoL is enabled
586 * (b) AMT is active
587 * (c) SoL/IDER session is active */
588 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
61c2505f 589 adapter->hw.media_type == e1000_media_type_copper) {
79f05bf0 590 uint16_t mii_reg = 0;
61c2505f
BA		 591
592 switch (adapter->hw.mac_type) {
593 case e1000_82540:
594 case e1000_82545:
595 case e1000_82545_rev_3:
596 case e1000_82546:
597 case e1000_82546_rev_3:
598 case e1000_82541:
599 case e1000_82541_rev_2:
600 case e1000_82547:
601 case e1000_82547_rev_2:
602 if (E1000_READ_REG(&adapter->hw, MANC) &
603 E1000_MANC_SMBUS_EN)
604 goto out;
605 break;
606 case e1000_82571:
607 case e1000_82572:
608 case e1000_82573:
609 case e1000_80003es2lan:
610 case e1000_ich8lan:
611 if (e1000_check_mng_mode(&adapter->hw) ||
612 e1000_check_phy_reset_block(&adapter->hw))
613 goto out;
614 break;
615 default:
616 goto out;
617 }
79f05bf0
AK		 618 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
619 mii_reg |= MII_CR_POWER_DOWN;
620 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
621 mdelay(1);
622 }
61c2505f
BA		 623out:
624 return;
79f05bf0
AK		 625}
626
1da177e4
LT		 627void
628e1000_down(struct e1000_adapter *adapter)
629{
630 struct net_device *netdev = adapter->netdev;
631
1314bbf3
AK		 632 /* signal that we're down so the interrupt handler does not
633 * reschedule our watchdog timer */
634 set_bit(__E1000_DOWN, &adapter->flags);
635
e0aac5a2 636#ifdef CONFIG_E1000_NAPI
bea3348e 637 napi_disable(&adapter->napi);
e0aac5a2 638#endif
1da177e4 639 e1000_irq_disable(adapter);
c1605eb3 640
1da177e4
LT		 641 del_timer_sync(&adapter->tx_fifo_stall_timer);
642 del_timer_sync(&adapter->watchdog_timer);
643 del_timer_sync(&adapter->phy_info_timer);
644
7bfa4816 645 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 646 adapter->link_speed = 0;
647 adapter->link_duplex = 0;
648 netif_carrier_off(netdev);
649 netif_stop_queue(netdev);
650
651 e1000_reset(adapter);
581d708e
MC		 652 e1000_clean_all_tx_rings(adapter);
653 e1000_clean_all_rx_rings(adapter);
1da177e4 654}
1da177e4 655
2db10a08
AK		 656void
657e1000_reinit_locked(struct e1000_adapter *adapter)
658{
659 WARN_ON(in_interrupt());
660 while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
661 msleep(1);
662 e1000_down(adapter);
663 e1000_up(adapter);
664 clear_bit(__E1000_RESETTING, &adapter->flags);
1da177e4
LT		 665}
666
667void
668e1000_reset(struct e1000_adapter *adapter)
669{
018ea44e 670 uint32_t pba = 0, tx_space, min_tx_space, min_rx_space;
1125ecbc 671 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
018ea44e 672 boolean_t legacy_pba_adjust = FALSE;
1da177e4
LT		 673
674 /* Repartition Pba for greater than 9k mtu
675 * To take effect CTRL.RST is required.
676 */
677
2d7edb92 678 switch (adapter->hw.mac_type) {
018ea44e
BA		 679 case e1000_82542_rev2_0:
680 case e1000_82542_rev2_1:
681 case e1000_82543:
682 case e1000_82544:
683 case e1000_82540:
684 case e1000_82541:
685 case e1000_82541_rev_2:
686 legacy_pba_adjust = TRUE;
687 pba = E1000_PBA_48K;
688 break;
689 case e1000_82545:
690 case e1000_82545_rev_3:
691 case e1000_82546:
692 case e1000_82546_rev_3:
693 pba = E1000_PBA_48K;
694 break;
2d7edb92 695 case e1000_82547:
0e6ef3e0 696 case e1000_82547_rev_2:
018ea44e 697 legacy_pba_adjust = TRUE;
2d7edb92
MC		 698 pba = E1000_PBA_30K;
699 break;
868d5309
MC		 700 case e1000_82571:
701 case e1000_82572:
6418ecc6 702 case e1000_80003es2lan:
868d5309
MC		 703 pba = E1000_PBA_38K;
704 break;
2d7edb92 705 case e1000_82573:
018ea44e 706 pba = E1000_PBA_20K;
2d7edb92 707 break;
cd94dd0b
AK		 708 case e1000_ich8lan:
709 pba = E1000_PBA_8K;
018ea44e
BA		 710 case e1000_undefined:
711 case e1000_num_macs:
2d7edb92
MC		 712 break;
713 }
714
018ea44e
BA		 715 if (legacy_pba_adjust == TRUE) {
716 if (adapter->netdev->mtu > E1000_RXBUFFER_8192)
717 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92 718
018ea44e
BA		 719 if (adapter->hw.mac_type == e1000_82547) {
720 adapter->tx_fifo_head = 0;
721 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
722 adapter->tx_fifo_size =
723 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
724 atomic_set(&adapter->tx_fifo_stall, 0);
725 }
726 } else if (adapter->hw.max_frame_size > MAXIMUM_ETHERNET_FRAME_SIZE) {
727 /* adjust PBA for jumbo frames */
728 E1000_WRITE_REG(&adapter->hw, PBA, pba);
729
730 /* To maintain wire speed transmits, the Tx FIFO should be
731 * large enough to accomodate two full transmit packets,
732 * rounded up to the next 1KB and expressed in KB. Likewise,
733 * the Rx FIFO should be large enough to accomodate at least
734 * one full receive packet and is similarly rounded up and
735 * expressed in KB. */
736 pba = E1000_READ_REG(&adapter->hw, PBA);
737 /* upper 16 bits has Tx packet buffer allocation size in KB */
738 tx_space = pba >> 16;
739 /* lower 16 bits has Rx packet buffer allocation size in KB */
740 pba &= 0xffff;
741 /* don't include ethernet FCS because hardware appends/strips */
742 min_rx_space = adapter->netdev->mtu + ENET_HEADER_SIZE +
743 VLAN_TAG_SIZE;
744 min_tx_space = min_rx_space;
745 min_tx_space *= 2;
9099cfb9 746 min_tx_space = ALIGN(min_tx_space, 1024);
018ea44e 747 min_tx_space >>= 10;
9099cfb9 748 min_rx_space = ALIGN(min_rx_space, 1024);
018ea44e
BA		 749 min_rx_space >>= 10;
750
751 /* If current Tx allocation is less than the min Tx FIFO size,
752 * and the min Tx FIFO size is less than the current Rx FIFO
753 * allocation, take space away from current Rx allocation */
754 if (tx_space < min_tx_space &&
755 ((min_tx_space - tx_space) < pba)) {
756 pba = pba - (min_tx_space - tx_space);
757
758 /* PCI/PCIx hardware has PBA alignment constraints */
759 switch (adapter->hw.mac_type) {
760 case e1000_82545 ... e1000_82546_rev_3:
761 pba &= ~(E1000_PBA_8K - 1);
762 break;
763 default:
764 break;
765 }
766
767 /* if short on rx space, rx wins and must trump tx
768 * adjustment or use Early Receive if available */
769 if (pba < min_rx_space) {
770 switch (adapter->hw.mac_type) {
771 case e1000_82573:
772 /* ERT enabled in e1000_configure_rx */
773 break;
774 default:
775 pba = min_rx_space;
776 break;
777 }
778 }
779 }
1da177e4 780 }
2d7edb92 781
1da177e4
LT		 782 E1000_WRITE_REG(&adapter->hw, PBA, pba);
783
784 /* flow control settings */
f11b7f85
JK		 785 /* Set the FC high water mark to 90% of the FIFO size.
786 * Required to clear last 3 LSB */
787 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
cd94dd0b
AK		 788 /* We can't use 90% on small FIFOs because the remainder
789 * would be less than 1 full frame. In this case, we size
790 * it to allow at least a full frame above the high water
791 * mark. */
792 if (pba < E1000_PBA_16K)
793 fc_high_water_mark = (pba * 1024) - 1600;
f11b7f85
JK		 794
795 adapter->hw.fc_high_water = fc_high_water_mark;
796 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 797 if (adapter->hw.mac_type == e1000_80003es2lan)
798 adapter->hw.fc_pause_time = 0xFFFF;
799 else
800 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 801 adapter->hw.fc_send_xon = 1;
802 adapter->hw.fc = adapter->hw.original_fc;
803
2d7edb92 804 /* Allow time for pending master requests to run */
1da177e4 805 e1000_reset_hw(&adapter->hw);
96838a40 806 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 807 E1000_WRITE_REG(&adapter->hw, WUC, 0);
09ae3e88 808
96838a40 809 if (e1000_init_hw(&adapter->hw))
1da177e4 810 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 811 e1000_update_mng_vlan(adapter);
3d5460a0
JB		 812
813 /* if (adapter->hwflags & HWFLAGS_PHY_PWR_BIT) { */
814 if (adapter->hw.mac_type >= e1000_82544 &&
815 adapter->hw.mac_type <= e1000_82547_rev_2 &&
816 adapter->hw.autoneg == 1 &&
817 adapter->hw.autoneg_advertised == ADVERTISE_1000_FULL) {
818 uint32_t ctrl = E1000_READ_REG(&adapter->hw, CTRL);
819 /* clear phy power management bit if we are in gig only mode,
820 * which if enabled will attempt negotiation to 100Mb, which
821 * can cause a loss of link at power off or driver unload */
822 ctrl &= ~E1000_CTRL_SWDPIN3;
823 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
824 }
825
1da177e4
LT		 826 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
827 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
828
829 e1000_reset_adaptive(&adapter->hw);
830 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
9a53a202
AK		 831
832 if (!adapter->smart_power_down &&
833 (adapter->hw.mac_type == e1000_82571 ||
834 adapter->hw.mac_type == e1000_82572)) {
835 uint16_t phy_data = 0;
836 /* speed up time to link by disabling smart power down, ignore
837 * the return value of this function because there is nothing
838 * different we would do if it failed */
839 e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
840 &phy_data);
841 phy_data &= ~IGP02E1000_PM_SPD;
842 e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
843 phy_data);
844 }
845
0fccd0e9 846 e1000_release_manageability(adapter);
1da177e4
LT		 847}
848
849/**
850 * e1000_probe - Device Initialization Routine
851 * @pdev: PCI device information struct
852 * @ent: entry in e1000_pci_tbl
853 *
854 * Returns 0 on success, negative on failure
855 *
856 * e1000_probe initializes an adapter identified by a pci_dev structure.
857 * The OS initialization, configuring of the adapter private structure,
858 * and a hardware reset occur.
859 **/
860
861static int __devinit
862e1000_probe(struct pci_dev *pdev,
863 const struct pci_device_id *ent)
864{
865 struct net_device *netdev;
866 struct e1000_adapter *adapter;
2d7edb92 867 unsigned long mmio_start, mmio_len;
cd94dd0b 868 unsigned long flash_start, flash_len;
2d7edb92 869
1da177e4 870 static int cards_found = 0;
120cd576 871 static int global_quad_port_a = 0; /* global ksp3 port a indication */
2d7edb92 872 int i, err, pci_using_dac;
120cd576 873 uint16_t eeprom_data = 0;
1da177e4 874 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 875 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 876 return err;
877
cd94dd0b
AK		 878 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK)) &&
879 !(err = pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 880 pci_using_dac = 1;
881 } else {
cd94dd0b
AK		 882 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK)) &&
883 (err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4 884 E1000_ERR("No usable DMA configuration, aborting\n");
6dd62ab0 885 goto err_dma;
1da177e4
LT		 886 }
887 pci_using_dac = 0;
888 }
889
96838a40 890 if ((err = pci_request_regions(pdev, e1000_driver_name)))
6dd62ab0 891 goto err_pci_reg;
1da177e4
LT		 892
893 pci_set_master(pdev);
894
6dd62ab0 895 err = -ENOMEM;
1da177e4 896 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
6dd62ab0 897 if (!netdev)
1da177e4 898 goto err_alloc_etherdev;
1da177e4
LT		 899
900 SET_MODULE_OWNER(netdev);
901 SET_NETDEV_DEV(netdev, &pdev->dev);
902
903 pci_set_drvdata(pdev, netdev);
60490fe0 904 adapter = netdev_priv(netdev);
1da177e4
LT		 905 adapter->netdev = netdev;
906 adapter->pdev = pdev;
907 adapter->hw.back = adapter;
908 adapter->msg_enable = (1 << debug) - 1;
909
910 mmio_start = pci_resource_start(pdev, BAR_0);
911 mmio_len = pci_resource_len(pdev, BAR_0);
912
6dd62ab0 913 err = -EIO;
1da177e4 914 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
6dd62ab0 915 if (!adapter->hw.hw_addr)
1da177e4 916 goto err_ioremap;
1da177e4 917
96838a40
JB		 918 for (i = BAR_1; i <= BAR_5; i++) {
919 if (pci_resource_len(pdev, i) == 0)
1da177e4 920 continue;
96838a40 921 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 922 adapter->hw.io_base = pci_resource_start(pdev, i);
923 break;
924 }
925 }
926
927 netdev->open = &e1000_open;
928 netdev->stop = &e1000_close;
929 netdev->hard_start_xmit = &e1000_xmit_frame;
930 netdev->get_stats = &e1000_get_stats;
931 netdev->set_multicast_list = &e1000_set_multi;
932 netdev->set_mac_address = &e1000_set_mac;
933 netdev->change_mtu = &e1000_change_mtu;
934 netdev->do_ioctl = &e1000_ioctl;
935 e1000_set_ethtool_ops(netdev);
936 netdev->tx_timeout = &e1000_tx_timeout;
937 netdev->watchdog_timeo = 5 * HZ;
938#ifdef CONFIG_E1000_NAPI
bea3348e 939 netif_napi_add(netdev, &adapter->napi, e1000_clean, 64);
1da177e4
LT		 940#endif
941 netdev->vlan_rx_register = e1000_vlan_rx_register;
942 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
943 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
944#ifdef CONFIG_NET_POLL_CONTROLLER
945 netdev->poll_controller = e1000_netpoll;
946#endif
0eb5a34c 947 strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
1da177e4
LT		 948
949 netdev->mem_start = mmio_start;
950 netdev->mem_end = mmio_start + mmio_len;
951 netdev->base_addr = adapter->hw.io_base;
952
953 adapter->bd_number = cards_found;
954
955 /* setup the private structure */
956
96838a40 957 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 958 goto err_sw_init;
959
6dd62ab0 960 err = -EIO;
cd94dd0b
AK		 961 /* Flash BAR mapping must happen after e1000_sw_init
962 * because it depends on mac_type */
963 if ((adapter->hw.mac_type == e1000_ich8lan) &&
964 (pci_resource_flags(pdev, 1) & IORESOURCE_MEM)) {
965 flash_start = pci_resource_start(pdev, 1);
966 flash_len = pci_resource_len(pdev, 1);
967 adapter->hw.flash_address = ioremap(flash_start, flash_len);
6dd62ab0 968 if (!adapter->hw.flash_address)
cd94dd0b 969 goto err_flashmap;
cd94dd0b
AK		 970 }
971
6dd62ab0 972 if (e1000_check_phy_reset_block(&adapter->hw))
2d7edb92
MC		 973 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
974
96838a40 975 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 976 netdev->features = NETIF_F_SG |
977 NETIF_F_HW_CSUM |
978 NETIF_F_HW_VLAN_TX |
979 NETIF_F_HW_VLAN_RX |
980 NETIF_F_HW_VLAN_FILTER;
cd94dd0b
AK		 981 if (adapter->hw.mac_type == e1000_ich8lan)
982 netdev->features &= ~NETIF_F_HW_VLAN_FILTER;
1da177e4
LT		 983 }
984
96838a40 985 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 986 (adapter->hw.mac_type != e1000_82547))
987 netdev->features |= NETIF_F_TSO;
2d7edb92 988
96838a40 989 if (adapter->hw.mac_type > e1000_82547_rev_2)
87ca4e5b 990 netdev->features |= NETIF_F_TSO6;
96838a40 991 if (pci_using_dac)
1da177e4
LT		 992 netdev->features |= NETIF_F_HIGHDMA;
993
76c224bc
AK		 994 netdev->features |= NETIF_F_LLTX;
995
2d7edb92
MC		 996 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
997
cd94dd0b
AK		 998 /* initialize eeprom parameters */
999
1000 if (e1000_init_eeprom_params(&adapter->hw)) {
1001 E1000_ERR("EEPROM initialization failed\n");
6dd62ab0 1002 goto err_eeprom;
cd94dd0b
AK		 1003 }
1004
96838a40 1005 /* before reading the EEPROM, reset the controller to
1da177e4 1006 * put the device in a known good starting state */
96838a40 1007
1da177e4
LT		 1008 e1000_reset_hw(&adapter->hw);
1009
1010 /* make sure the EEPROM is good */
1011
96838a40 1012 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4 1013 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
1da177e4
LT		 1014 goto err_eeprom;
1015 }
1016
1017 /* copy the MAC address out of the EEPROM */
1018
96838a40 1019 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 1020 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
1021 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 1022 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 1023
96838a40 1024 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4 1025 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
1da177e4
LT		 1026 goto err_eeprom;
1027 }
1028
1da177e4
LT		 1029 e1000_get_bus_info(&adapter->hw);
1030
1031 init_timer(&adapter->tx_fifo_stall_timer);
1032 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
1033 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
1034
1035 init_timer(&adapter->watchdog_timer);
1036 adapter->watchdog_timer.function = &e1000_watchdog;
1037 adapter->watchdog_timer.data = (unsigned long) adapter;
1038
1da177e4
LT		 1039 init_timer(&adapter->phy_info_timer);
1040 adapter->phy_info_timer.function = &e1000_update_phy_info;
1041 adapter->phy_info_timer.data = (unsigned long) adapter;
1042
65f27f38 1043 INIT_WORK(&adapter->reset_task, e1000_reset_task);
1da177e4 1044
1da177e4
LT		 1045 e1000_check_options(adapter);
1046
1047 /* Initial Wake on LAN setting
1048 * If APM wake is enabled in the EEPROM,
1049 * enable the ACPI Magic Packet filter
1050 */
1051
96838a40 1052 switch (adapter->hw.mac_type) {
1da177e4
LT		 1053 case e1000_82542_rev2_0:
1054 case e1000_82542_rev2_1:
1055 case e1000_82543:
1056 break;
1057 case e1000_82544:
1058 e1000_read_eeprom(&adapter->hw,
1059 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
1060 eeprom_apme_mask = E1000_EEPROM_82544_APM;
1061 break;
cd94dd0b
AK		 1062 case e1000_ich8lan:
1063 e1000_read_eeprom(&adapter->hw,
1064 EEPROM_INIT_CONTROL1_REG, 1, &eeprom_data);
1065 eeprom_apme_mask = E1000_EEPROM_ICH8_APME;
1066 break;
1da177e4
LT		 1067 case e1000_82546:
1068 case e1000_82546_rev_3:
fd803241 1069 case e1000_82571:
6418ecc6 1070 case e1000_80003es2lan:
96838a40 1071 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 1072 e1000_read_eeprom(&adapter->hw,
1073 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
1074 break;
1075 }
1076 /* Fall Through */
1077 default:
1078 e1000_read_eeprom(&adapter->hw,
1079 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
1080 break;
1081 }
96838a40 1082 if (eeprom_data & eeprom_apme_mask)
120cd576
JB		 1083 adapter->eeprom_wol |= E1000_WUFC_MAG;
1084
1085 /* now that we have the eeprom settings, apply the special cases
1086 * where the eeprom may be wrong or the board simply won't support
1087 * wake on lan on a particular port */
1088 switch (pdev->device) {
1089 case E1000_DEV_ID_82546GB_PCIE:
1090 adapter->eeprom_wol = 0;
1091 break;
1092 case E1000_DEV_ID_82546EB_FIBER:
1093 case E1000_DEV_ID_82546GB_FIBER:
1094 case E1000_DEV_ID_82571EB_FIBER:
1095 /* Wake events only supported on port A for dual fiber
1096 * regardless of eeprom setting */
1097 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1)
1098 adapter->eeprom_wol = 0;
1099 break;
1100 case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
5881cde8 1101 case E1000_DEV_ID_82571EB_QUAD_COPPER:
ce57a02c 1102 case E1000_DEV_ID_82571EB_QUAD_FIBER:
fc2307d0 1103 case E1000_DEV_ID_82571EB_QUAD_COPPER_LOWPROFILE:
f4ec7f98 1104 case E1000_DEV_ID_82571PT_QUAD_COPPER:
120cd576
JB		 1105 /* if quad port adapter, disable WoL on all but port A */
1106 if (global_quad_port_a != 0)
1107 adapter->eeprom_wol = 0;
1108 else
1109 adapter->quad_port_a = 1;
1110 /* Reset for multiple quad port adapters */
1111 if (++global_quad_port_a == 4)
1112 global_quad_port_a = 0;
1113 break;
1114 }
1115
1116 /* initialize the wol settings based on the eeprom settings */
1117 adapter->wol = adapter->eeprom_wol;
1da177e4 1118
fb3d47d4
JK		 1119 /* print bus type/speed/width info */
1120 {
1121 struct e1000_hw *hw = &adapter->hw;
1122 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
1123 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
1124 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
1125 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
1126 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
1127 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
1128 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
1129 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
1130 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
1131 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
1132 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
1133 "32-bit"));
1134 }
1135
1136 for (i = 0; i < 6; i++)
1137 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
1138
1da177e4
LT		 1139 /* reset the hardware with the new settings */
1140 e1000_reset(adapter);
1141
b55ccb35
JK		 1142 /* If the controller is 82573 and f/w is AMT, do not set
1143 * DRV_LOAD until the interface is up. For all other cases,
1144 * let the f/w know that the h/w is now under the control
1145 * of the driver. */
1146 if (adapter->hw.mac_type != e1000_82573 ||
1147 !e1000_check_mng_mode(&adapter->hw))
1148 e1000_get_hw_control(adapter);
2d7edb92 1149
1314bbf3
AK		 1150 /* tell the stack to leave us alone until e1000_open() is called */
1151 netif_carrier_off(netdev);
1152 netif_stop_queue(netdev);
416b5d10
AK		 1153
1154 strcpy(netdev->name, "eth%d");
1155 if ((err = register_netdev(netdev)))
1156 goto err_register;
1314bbf3 1157
1da177e4
LT		 1158 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
1159
1160 cards_found++;
1161 return 0;
1162
1163err_register:
6dd62ab0
VA		 1164 e1000_release_hw_control(adapter);
1165err_eeprom:
1166 if (!e1000_check_phy_reset_block(&adapter->hw))
1167 e1000_phy_hw_reset(&adapter->hw);
1168
cd94dd0b
AK		 1169 if (adapter->hw.flash_address)
1170 iounmap(adapter->hw.flash_address);
1171err_flashmap:
6dd62ab0
VA		 1172#ifdef CONFIG_E1000_NAPI
1173 for (i = 0; i < adapter->num_rx_queues; i++)
1174 dev_put(&adapter->polling_netdev[i]);
1175#endif
1176
1177 kfree(adapter->tx_ring);
1178 kfree(adapter->rx_ring);
1179#ifdef CONFIG_E1000_NAPI
1180 kfree(adapter->polling_netdev);
1181#endif
1da177e4 1182err_sw_init:
1da177e4
LT		 1183 iounmap(adapter->hw.hw_addr);
1184err_ioremap:
1185 free_netdev(netdev);
1186err_alloc_etherdev:
1187 pci_release_regions(pdev);
6dd62ab0
VA		 1188err_pci_reg:
1189err_dma:
1190 pci_disable_device(pdev);
1da177e4
LT		 1191 return err;
1192}
1193
1194/**
1195 * e1000_remove - Device Removal Routine
1196 * @pdev: PCI device information struct
1197 *
1198 * e1000_remove is called by the PCI subsystem to alert the driver
1199 * that it should release a PCI device. The could be caused by a
1200 * Hot-Plug event, or because the driver is going to be removed from
1201 * memory.
1202 **/
1203
1204static void __devexit
1205e1000_remove(struct pci_dev *pdev)
1206{
1207 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 1208 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e
MC		 1209#ifdef CONFIG_E1000_NAPI
1210 int i;
1211#endif
1da177e4 1212
28e53bdd 1213 cancel_work_sync(&adapter->reset_task);
be2b28ed 1214
0fccd0e9 1215 e1000_release_manageability(adapter);
1da177e4 1216
b55ccb35
JK		 1217 /* Release control of h/w to f/w. If f/w is AMT enabled, this
1218 * would have already happened in close and is redundant. */
1219 e1000_release_hw_control(adapter);
2d7edb92 1220
581d708e 1221#ifdef CONFIG_E1000_NAPI
f56799ea 1222 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 1223 dev_put(&adapter->polling_netdev[i]);
581d708e 1224#endif
1da177e4 1225
bea3348e
SH		 1226 unregister_netdev(netdev);
1227
96838a40 1228 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 1229 e1000_phy_hw_reset(&adapter->hw);
1da177e4 1230
24025e4e
MC		 1231 kfree(adapter->tx_ring);
1232 kfree(adapter->rx_ring);
1233#ifdef CONFIG_E1000_NAPI
1234 kfree(adapter->polling_netdev);
1235#endif
1236
1da177e4 1237 iounmap(adapter->hw.hw_addr);
cd94dd0b
AK		 1238 if (adapter->hw.flash_address)
1239 iounmap(adapter->hw.flash_address);
1da177e4
LT		 1240 pci_release_regions(pdev);
1241
1242 free_netdev(netdev);
1243
1244 pci_disable_device(pdev);
1245}
1246
1247/**
1248 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
1249 * @adapter: board private structure to initialize
1250 *
1251 * e1000_sw_init initializes the Adapter private data structure.
1252 * Fields are initialized based on PCI device information and
1253 * OS network device settings (MTU size).
1254 **/
1255
1256static int __devinit
1257e1000_sw_init(struct e1000_adapter *adapter)
1258{
1259 struct e1000_hw *hw = &adapter->hw;
1260 struct net_device *netdev = adapter->netdev;
1261 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 1262#ifdef CONFIG_E1000_NAPI
1263 int i;
1264#endif
1da177e4
LT		 1265
1266 /* PCI config space info */
1267
1268 hw->vendor_id = pdev->vendor;
1269 hw->device_id = pdev->device;
1270 hw->subsystem_vendor_id = pdev->subsystem_vendor;
1271 hw->subsystem_id = pdev->subsystem_device;
44c10138 1272 hw->revision_id = pdev->revision;
1da177e4
LT		 1273
1274 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
1275
eb0f8054 1276 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
9e2feace 1277 adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
1da177e4
LT		 1278 hw->max_frame_size = netdev->mtu +
1279 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
1280 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
1281
1282 /* identify the MAC */
1283
96838a40 1284 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 1285 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
1286 return -EIO;
1287 }
1288
96838a40 1289 switch (hw->mac_type) {
1da177e4
LT		 1290 default:
1291 break;
1292 case e1000_82541:
1293 case e1000_82547:
1294 case e1000_82541_rev_2:
1295 case e1000_82547_rev_2:
1296 hw->phy_init_script = 1;
1297 break;
1298 }
1299
1300 e1000_set_media_type(hw);
1301
1302 hw->wait_autoneg_complete = FALSE;
1303 hw->tbi_compatibility_en = TRUE;
1304 hw->adaptive_ifs = TRUE;
1305
1306 /* Copper options */
1307
96838a40 1308 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1309 hw->mdix = AUTO_ALL_MODES;
1310 hw->disable_polarity_correction = FALSE;
1311 hw->master_slave = E1000_MASTER_SLAVE;
1312 }
1313
f56799ea
JK		 1314 adapter->num_tx_queues = 1;
1315 adapter->num_rx_queues = 1;
581d708e
MC		 1316
1317 if (e1000_alloc_queues(adapter)) {
1318 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1319 return -ENOMEM;
1320 }
1321
1322#ifdef CONFIG_E1000_NAPI
f56799ea 1323 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e 1324 adapter->polling_netdev[i].priv = adapter;
581d708e
MC		 1325 dev_hold(&adapter->polling_netdev[i]);
1326 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1327 }
7bfa4816 1328 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1329#endif
1330
47313054
HX		 1331 /* Explicitly disable IRQ since the NIC can be in any state. */
1332 atomic_set(&adapter->irq_sem, 0);
1333 e1000_irq_disable(adapter);
1334
1da177e4 1335 spin_lock_init(&adapter->stats_lock);
1da177e4 1336
1314bbf3
AK		 1337 set_bit(__E1000_DOWN, &adapter->flags);
1338
1da177e4
LT		 1339 return 0;
1340}
1341
581d708e
MC		 1342/**
1343 * e1000_alloc_queues - Allocate memory for all rings
1344 * @adapter: board private structure to initialize
1345 *
1346 * We allocate one ring per queue at run-time since we don't know the
1347 * number of queues at compile-time. The polling_netdev array is
1348 * intended for Multiqueue, but should work fine with a single queue.
1349 **/
1350
1351static int __devinit
1352e1000_alloc_queues(struct e1000_adapter *adapter)
1353{
1c7e5b12
YB		 1354 adapter->tx_ring = kcalloc(adapter->num_tx_queues,
1355 sizeof(struct e1000_tx_ring), GFP_KERNEL);
581d708e
MC		 1356 if (!adapter->tx_ring)
1357 return -ENOMEM;
581d708e 1358
1c7e5b12
YB		 1359 adapter->rx_ring = kcalloc(adapter->num_rx_queues,
1360 sizeof(struct e1000_rx_ring), GFP_KERNEL);
581d708e
MC		 1361 if (!adapter->rx_ring) {
1362 kfree(adapter->tx_ring);
1363 return -ENOMEM;
1364 }
581d708e
MC		 1365
1366#ifdef CONFIG_E1000_NAPI
1c7e5b12
YB		 1367 adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
1368 sizeof(struct net_device),
1369 GFP_KERNEL);
581d708e
MC		 1370 if (!adapter->polling_netdev) {
1371 kfree(adapter->tx_ring);
1372 kfree(adapter->rx_ring);
1373 return -ENOMEM;
1374 }
581d708e
MC		 1375#endif
1376
1377 return E1000_SUCCESS;
1378}
1379
1da177e4
LT		 1380/**
1381 * e1000_open - Called when a network interface is made active
1382 * @netdev: network interface device structure
1383 *
1384 * Returns 0 on success, negative value on failure
1385 *
1386 * The open entry point is called when a network interface is made
1387 * active by the system (IFF_UP). At this point all resources needed
1388 * for transmit and receive operations are allocated, the interrupt
1389 * handler is registered with the OS, the watchdog timer is started,
1390 * and the stack is notified that the interface is ready.
1391 **/
1392
1393static int
1394e1000_open(struct net_device *netdev)
1395{
60490fe0 1396 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1397 int err;
1398
2db10a08 1399 /* disallow open during test */
1314bbf3 1400 if (test_bit(__E1000_TESTING, &adapter->flags))
2db10a08
AK		 1401 return -EBUSY;
1402
1da177e4 1403 /* allocate transmit descriptors */
e0aac5a2
AK		 1404 err = e1000_setup_all_tx_resources(adapter);
1405 if (err)
1da177e4
LT		 1406 goto err_setup_tx;
1407
1408 /* allocate receive descriptors */
e0aac5a2 1409 err = e1000_setup_all_rx_resources(adapter);
b5bf28cd 1410 if (err)
e0aac5a2 1411 goto err_setup_rx;
b5bf28cd 1412
79f05bf0
AK		 1413 e1000_power_up_phy(adapter);
1414
2d7edb92 1415 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1416 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1417 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1418 e1000_update_mng_vlan(adapter);
1419 }
1da177e4 1420
b55ccb35
JK		 1421 /* If AMT is enabled, let the firmware know that the network
1422 * interface is now open */
1423 if (adapter->hw.mac_type == e1000_82573 &&
1424 e1000_check_mng_mode(&adapter->hw))
1425 e1000_get_hw_control(adapter);
1426
e0aac5a2
AK		 1427 /* before we allocate an interrupt, we must be ready to handle it.
1428 * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
1429 * as soon as we call pci_request_irq, so we have to setup our
1430 * clean_rx handler before we do so. */
1431 e1000_configure(adapter);
1432
1433 err = e1000_request_irq(adapter);
1434 if (err)
1435 goto err_req_irq;
1436
1437 /* From here on the code is the same as e1000_up() */
1438 clear_bit(__E1000_DOWN, &adapter->flags);
1439
47313054 1440#ifdef CONFIG_E1000_NAPI
bea3348e 1441 napi_enable(&adapter->napi);
47313054
HX		 1442#endif
1443
e0aac5a2
AK		 1444 e1000_irq_enable(adapter);
1445
1446 /* fire a link status change interrupt to start the watchdog */
1447 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_LSC);
1448
1da177e4
LT		 1449 return E1000_SUCCESS;
1450
b5bf28cd 1451err_req_irq:
e0aac5a2
AK		 1452 e1000_release_hw_control(adapter);
1453 e1000_power_down_phy(adapter);
581d708e 1454 e1000_free_all_rx_resources(adapter);
1da177e4 1455err_setup_rx:
581d708e 1456 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1457err_setup_tx:
1458 e1000_reset(adapter);
1459
1460 return err;
1461}
1462
1463/**
1464 * e1000_close - Disables a network interface
1465 * @netdev: network interface device structure
1466 *
1467 * Returns 0, this is not allowed to fail
1468 *
1469 * The close entry point is called when an interface is de-activated
1470 * by the OS. The hardware is still under the drivers control, but
1471 * needs to be disabled. A global MAC reset is issued to stop the
1472 * hardware, and all transmit and receive resources are freed.
1473 **/
1474
1475static int
1476e1000_close(struct net_device *netdev)
1477{
60490fe0 1478 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 1479
2db10a08 1480 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 1481 e1000_down(adapter);
79f05bf0 1482 e1000_power_down_phy(adapter);
2db10a08 1483 e1000_free_irq(adapter);
1da177e4 1484
581d708e
MC		 1485 e1000_free_all_tx_resources(adapter);
1486 e1000_free_all_rx_resources(adapter);
1da177e4 1487
4666560a
BA		 1488 /* kill manageability vlan ID if supported, but not if a vlan with
1489 * the same ID is registered on the host OS (let 8021q kill it) */
96838a40 1490 if ((adapter->hw.mng_cookie.status &
4666560a
BA		 1491 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
1492 !(adapter->vlgrp &&
5c15bdec 1493 vlan_group_get_device(adapter->vlgrp, adapter->mng_vlan_id))) {
2d7edb92
MC		 1494 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1495 }
b55ccb35
JK		 1496
1497 /* If AMT is enabled, let the firmware know that the network
1498 * interface is now closed */
1499 if (adapter->hw.mac_type == e1000_82573 &&
1500 e1000_check_mng_mode(&adapter->hw))
1501 e1000_release_hw_control(adapter);
1502
1da177e4
LT		 1503 return 0;
1504}
1505
1506/**
1507 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1508 * @adapter: address of board private structure
2d7edb92
MC		 1509 * @start: address of beginning of memory
1510 * @len: length of memory
1da177e4 1511 **/
e619d523 1512static boolean_t
1da177e4
LT		 1513e1000_check_64k_bound(struct e1000_adapter *adapter,
1514 void *start, unsigned long len)
1515{
1516 unsigned long begin = (unsigned long) start;
1517 unsigned long end = begin + len;
1518
2648345f
MC		 1519 /* First rev 82545 and 82546 need to not allow any memory
1520 * write location to cross 64k boundary due to errata 23 */
1da177e4 1521 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1522 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1523 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1524 }
1525
1526 return TRUE;
1527}
1528
1529/**
1530 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1531 * @adapter: board private structure
581d708e 1532 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1533 *
1534 * Return 0 on success, negative on failure
1535 **/
1536
3ad2cc67 1537static int
581d708e
MC		 1538e1000_setup_tx_resources(struct e1000_adapter *adapter,
1539 struct e1000_tx_ring *txdr)
1da177e4 1540{
1da177e4
LT		 1541 struct pci_dev *pdev = adapter->pdev;
1542 int size;
1543
1544 size = sizeof(struct e1000_buffer) * txdr->count;
cd94dd0b 1545 txdr->buffer_info = vmalloc(size);
96838a40 1546 if (!txdr->buffer_info) {
2648345f
MC		 1547 DPRINTK(PROBE, ERR,
1548 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1549 return -ENOMEM;
1550 }
1551 memset(txdr->buffer_info, 0, size);
1552
1553 /* round up to nearest 4K */
1554
1555 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
9099cfb9 1556 txdr->size = ALIGN(txdr->size, 4096);
1da177e4
LT		 1557
1558 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1559 if (!txdr->desc) {
1da177e4 1560setup_tx_desc_die:
1da177e4 1561 vfree(txdr->buffer_info);
2648345f
MC		 1562 DPRINTK(PROBE, ERR,
1563 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1564 return -ENOMEM;
1565 }
1566
2648345f 1567 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1568 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1569 void *olddesc = txdr->desc;
1570 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1571 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1572 "at %p\n", txdr->size, txdr->desc);
1573 /* Try again, without freeing the previous */
1da177e4 1574 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1575 /* Failed allocation, critical failure */
96838a40 1576 if (!txdr->desc) {
1da177e4
LT		 1577 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1578 goto setup_tx_desc_die;
1579 }
1580
1581 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1582 /* give up */
2648345f
MC		 1583 pci_free_consistent(pdev, txdr->size, txdr->desc,
1584 txdr->dma);
1da177e4
LT		 1585 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1586 DPRINTK(PROBE, ERR,
2648345f
MC		 1587 "Unable to allocate aligned memory "
1588 "for the transmit descriptor ring\n");
1da177e4
LT		 1589 vfree(txdr->buffer_info);
1590 return -ENOMEM;
1591 } else {
2648345f 1592 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1593 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1594 }
1595 }
1596 memset(txdr->desc, 0, txdr->size);
1597
1598 txdr->next_to_use = 0;
1599 txdr->next_to_clean = 0;
2ae76d98 1600 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1601
1602 return 0;
1603}
1604
581d708e
MC		 1605/**
1606 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1607 * (Descriptors) for all queues
1608 * @adapter: board private structure
1609 *
581d708e
MC		 1610 * Return 0 on success, negative on failure
1611 **/
1612
1613int
1614e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1615{
1616 int i, err = 0;
1617
f56799ea 1618 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1619 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1620 if (err) {
1621 DPRINTK(PROBE, ERR,
1622 "Allocation for Tx Queue %u failed\n", i);
3fbbc72e
VA		 1623 for (i-- ; i >= 0; i--)
1624 e1000_free_tx_resources(adapter,
1625 &adapter->tx_ring[i]);
581d708e
MC		 1626 break;
1627 }
1628 }
1629
1630 return err;
1631}
1632
1da177e4
LT		 1633/**
1634 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1635 * @adapter: board private structure
1636 *
1637 * Configure the Tx unit of the MAC after a reset.
1638 **/
1639
1640static void
1641e1000_configure_tx(struct e1000_adapter *adapter)
1642{
581d708e
MC		 1643 uint64_t tdba;
1644 struct e1000_hw *hw = &adapter->hw;
1645 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1646 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1647
1648 /* Setup the HW Tx Head and Tail descriptor pointers */
1649
f56799ea 1650 switch (adapter->num_tx_queues) {
24025e4e
MC		 1651 case 1:
1652 default:
581d708e
MC		 1653 tdba = adapter->tx_ring[0].dma;
1654 tdlen = adapter->tx_ring[0].count *
1655 sizeof(struct e1000_tx_desc);
581d708e 1656 E1000_WRITE_REG(hw, TDLEN, tdlen);
4ca213a6
AK		 1657 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1658 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
581d708e 1659 E1000_WRITE_REG(hw, TDT, 0);
4ca213a6 1660 E1000_WRITE_REG(hw, TDH, 0);
6a951698
AK		 1661 adapter->tx_ring[0].tdh = ((hw->mac_type >= e1000_82543) ? E1000_TDH : E1000_82542_TDH);
1662 adapter->tx_ring[0].tdt = ((hw->mac_type >= e1000_82543) ? E1000_TDT : E1000_82542_TDT);
24025e4e
MC		 1663 break;
1664 }
1da177e4
LT		 1665
1666 /* Set the default values for the Tx Inter Packet Gap timer */
d89b6c67
JB		 1667 if (adapter->hw.mac_type <= e1000_82547_rev_2 &&
1668 (hw->media_type == e1000_media_type_fiber ||
1669 hw->media_type == e1000_media_type_internal_serdes))
0fadb059
JK		 1670 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1671 else
1672 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1673
581d708e 1674 switch (hw->mac_type) {
1da177e4
LT		 1675 case e1000_82542_rev2_0:
1676 case e1000_82542_rev2_1:
1677 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1678 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1679 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1680 break;
87041639
JK		 1681 case e1000_80003es2lan:
1682 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1683 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1684 break;
1da177e4 1685 default:
0fadb059
JK		 1686 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1687 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1688 break;
1da177e4 1689 }
0fadb059
JK		 1690 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1691 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1692 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1693
1694 /* Set the Tx Interrupt Delay register */
1695
581d708e
MC		 1696 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1697 if (hw->mac_type >= e1000_82540)
1698 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1699
1700 /* Program the Transmit Control Register */
1701
581d708e 1702 tctl = E1000_READ_REG(hw, TCTL);
1da177e4 1703 tctl &= ~E1000_TCTL_CT;
7e6c9861 1704 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1705 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1706
2ae76d98
MC		 1707 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1708 tarc = E1000_READ_REG(hw, TARC0);
90fb5135
AK		 1709 /* set the speed mode bit, we'll clear it if we're not at
1710 * gigabit link later */
09ae3e88 1711 tarc |= (1 << 21);
2ae76d98 1712 E1000_WRITE_REG(hw, TARC0, tarc);
87041639
JK		 1713 } else if (hw->mac_type == e1000_80003es2lan) {
1714 tarc = E1000_READ_REG(hw, TARC0);
1715 tarc |= 1;
87041639
JK		 1716 E1000_WRITE_REG(hw, TARC0, tarc);
1717 tarc = E1000_READ_REG(hw, TARC1);
1718 tarc |= 1;
1719 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1720 }
1721
581d708e 1722 e1000_config_collision_dist(hw);
1da177e4
LT		 1723
1724 /* Setup Transmit Descriptor Settings for eop descriptor */
6a042dab
JB		 1725 adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
1726
1727 /* only set IDE if we are delaying interrupts using the timers */
1728 if (adapter->tx_int_delay)
1729 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
1da177e4 1730
581d708e 1731 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1732 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1733 else
1734 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1735
1736 /* Cache if we're 82544 running in PCI-X because we'll
1737 * need this to apply a workaround later in the send path. */
581d708e
MC		 1738 if (hw->mac_type == e1000_82544 &&
1739 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1740 adapter->pcix_82544 = 1;
7e6c9861
JK		 1741
1742 E1000_WRITE_REG(hw, TCTL, tctl);
1743
1da177e4
LT		 1744}
1745
1746/**
1747 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1748 * @adapter: board private structure
581d708e 1749 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1750 *
1751 * Returns 0 on success, negative on failure
1752 **/
1753
3ad2cc67 1754static int
581d708e
MC		 1755e1000_setup_rx_resources(struct e1000_adapter *adapter,
1756 struct e1000_rx_ring *rxdr)
1da177e4 1757{
1da177e4 1758 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1759 int size, desc_len;
1da177e4
LT		 1760
1761 size = sizeof(struct e1000_buffer) * rxdr->count;
cd94dd0b 1762 rxdr->buffer_info = vmalloc(size);
581d708e 1763 if (!rxdr->buffer_info) {
2648345f
MC		 1764 DPRINTK(PROBE, ERR,
1765 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1766 return -ENOMEM;
1767 }
1768 memset(rxdr->buffer_info, 0, size);
1769
1c7e5b12
YB		 1770 rxdr->ps_page = kcalloc(rxdr->count, sizeof(struct e1000_ps_page),
1771 GFP_KERNEL);
96838a40 1772 if (!rxdr->ps_page) {
2d7edb92
MC		 1773 vfree(rxdr->buffer_info);
1774 DPRINTK(PROBE, ERR,
1775 "Unable to allocate memory for the receive descriptor ring\n");
1776 return -ENOMEM;
1777 }
2d7edb92 1778
1c7e5b12
YB		 1779 rxdr->ps_page_dma = kcalloc(rxdr->count,
1780 sizeof(struct e1000_ps_page_dma),
1781 GFP_KERNEL);
96838a40 1782 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1783 vfree(rxdr->buffer_info);
1784 kfree(rxdr->ps_page);
1785 DPRINTK(PROBE, ERR,
1786 "Unable to allocate memory for the receive descriptor ring\n");
1787 return -ENOMEM;
1788 }
2d7edb92 1789
96838a40 1790 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1791 desc_len = sizeof(struct e1000_rx_desc);
1792 else
1793 desc_len = sizeof(union e1000_rx_desc_packet_split);
1794
1da177e4
LT		 1795 /* Round up to nearest 4K */
1796
2d7edb92 1797 rxdr->size = rxdr->count * desc_len;
9099cfb9 1798 rxdr->size = ALIGN(rxdr->size, 4096);
1da177e4
LT		 1799
1800 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1801
581d708e
MC		 1802 if (!rxdr->desc) {
1803 DPRINTK(PROBE, ERR,
1804 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1805setup_rx_desc_die:
1da177e4 1806 vfree(rxdr->buffer_info);
2d7edb92
MC		 1807 kfree(rxdr->ps_page);
1808 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1809 return -ENOMEM;
1810 }
1811
2648345f 1812 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1813 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1814 void *olddesc = rxdr->desc;
1815 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1816 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1817 "at %p\n", rxdr->size, rxdr->desc);
1818 /* Try again, without freeing the previous */
1da177e4 1819 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1820 /* Failed allocation, critical failure */
581d708e 1821 if (!rxdr->desc) {
1da177e4 1822 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1823 DPRINTK(PROBE, ERR,
1824 "Unable to allocate memory "
1825 "for the receive descriptor ring\n");
1da177e4
LT		 1826 goto setup_rx_desc_die;
1827 }
1828
1829 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1830 /* give up */
2648345f
MC		 1831 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1832 rxdr->dma);
1da177e4 1833 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1834 DPRINTK(PROBE, ERR,
1835 "Unable to allocate aligned memory "
1836 "for the receive descriptor ring\n");
581d708e 1837 goto setup_rx_desc_die;
1da177e4 1838 } else {
2648345f 1839 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1840 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1841 }
1842 }
1843 memset(rxdr->desc, 0, rxdr->size);
1844
1845 rxdr->next_to_clean = 0;
1846 rxdr->next_to_use = 0;
1847
1848 return 0;
1849}
1850
581d708e
MC		 1851/**
1852 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1853 * (Descriptors) for all queues
1854 * @adapter: board private structure
1855 *
581d708e
MC		 1856 * Return 0 on success, negative on failure
1857 **/
1858
1859int
1860e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1861{
1862 int i, err = 0;
1863
f56799ea 1864 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1865 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1866 if (err) {
1867 DPRINTK(PROBE, ERR,
1868 "Allocation for Rx Queue %u failed\n", i);
3fbbc72e
VA		 1869 for (i-- ; i >= 0; i--)
1870 e1000_free_rx_resources(adapter,
1871 &adapter->rx_ring[i]);
581d708e
MC		 1872 break;
1873 }
1874 }
1875
1876 return err;
1877}
1878
1da177e4 1879/**
2648345f 1880 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1881 * @adapter: Board private structure
1882 **/
e4c811c9
MC		 1883#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1884 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1885static void
1886e1000_setup_rctl(struct e1000_adapter *adapter)
1887{
2d7edb92
MC		 1888 uint32_t rctl, rfctl;
1889 uint32_t psrctl = 0;
35ec56bb 1890#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1891 uint32_t pages = 0;
1892#endif
1da177e4
LT		 1893
1894 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1895
1896 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1897
1898 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1899 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1900 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1901
0fadb059 1902 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1903 rctl |= E1000_RCTL_SBP;
1904 else
1905 rctl &= ~E1000_RCTL_SBP;
1906
2d7edb92
MC		 1907 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1908 rctl &= ~E1000_RCTL_LPE;
1909 else
1910 rctl |= E1000_RCTL_LPE;
1911
1da177e4 1912 /* Setup buffer sizes */
9e2feace
AK		 1913 rctl &= ~E1000_RCTL_SZ_4096;
1914 rctl |= E1000_RCTL_BSEX;
1915 switch (adapter->rx_buffer_len) {
1916 case E1000_RXBUFFER_256:
1917 rctl |= E1000_RCTL_SZ_256;
1918 rctl &= ~E1000_RCTL_BSEX;
1919 break;
1920 case E1000_RXBUFFER_512:
1921 rctl |= E1000_RCTL_SZ_512;
1922 rctl &= ~E1000_RCTL_BSEX;
1923 break;
1924 case E1000_RXBUFFER_1024:
1925 rctl |= E1000_RCTL_SZ_1024;
1926 rctl &= ~E1000_RCTL_BSEX;
1927 break;
a1415ee6
JK		 1928 case E1000_RXBUFFER_2048:
1929 default:
1930 rctl |= E1000_RCTL_SZ_2048;
1931 rctl &= ~E1000_RCTL_BSEX;
1932 break;
1933 case E1000_RXBUFFER_4096:
1934 rctl |= E1000_RCTL_SZ_4096;
1935 break;
1936 case E1000_RXBUFFER_8192:
1937 rctl |= E1000_RCTL_SZ_8192;
1938 break;
1939 case E1000_RXBUFFER_16384:
1940 rctl |= E1000_RCTL_SZ_16384;
1941 break;
2d7edb92
MC		 1942 }
1943
35ec56bb 1944#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1945 /* 82571 and greater support packet-split where the protocol
1946 * header is placed in skb->data and the packet data is
1947 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1948 * In the case of a non-split, skb->data is linearly filled,
1949 * followed by the page buffers. Therefore, skb->data is
1950 * sized to hold the largest protocol header.
1951 */
e64d7d02
JB		 1952 /* allocations using alloc_page take too long for regular MTU
1953 * so only enable packet split for jumbo frames */
e4c811c9 1954 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
e64d7d02
JB		 1955 if ((adapter->hw.mac_type >= e1000_82571) && (pages <= 3) &&
1956 PAGE_SIZE <= 16384 && (rctl & E1000_RCTL_LPE))
e4c811c9
MC		 1957 adapter->rx_ps_pages = pages;
1958 else
1959 adapter->rx_ps_pages = 0;
2d7edb92 1960#endif
e4c811c9 1961 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1962 /* Configure extra packet-split registers */
1963 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1964 rfctl |= E1000_RFCTL_EXTEN;
87ca4e5b
AK		 1965 /* disable packet split support for IPv6 extension headers,
1966 * because some malformed IPv6 headers can hang the RX */
1967 rfctl |= (E1000_RFCTL_IPV6_EX_DIS |
1968 E1000_RFCTL_NEW_IPV6_EXT_DIS);
1969
2d7edb92
MC		 1970 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1971
7dfee0cb 1972 rctl |= E1000_RCTL_DTYP_PS;
96838a40 1973
2d7edb92
MC		 1974 psrctl |= adapter->rx_ps_bsize0 >>
1975 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1976
1977 switch (adapter->rx_ps_pages) {
1978 case 3:
1979 psrctl |= PAGE_SIZE <<
1980 E1000_PSRCTL_BSIZE3_SHIFT;
1981 case 2:
1982 psrctl |= PAGE_SIZE <<
1983 E1000_PSRCTL_BSIZE2_SHIFT;
1984 case 1:
1985 psrctl |= PAGE_SIZE >>
1986 E1000_PSRCTL_BSIZE1_SHIFT;
1987 break;
1988 }
2d7edb92
MC		 1989
1990 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1991 }
1992
1993 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1994}
1995
1996/**
1997 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1998 * @adapter: board private structure
1999 *
2000 * Configure the Rx unit of the MAC after a reset.
2001 **/
2002
2003static void
2004e1000_configure_rx(struct e1000_adapter *adapter)
2005{
581d708e
MC		 2006 uint64_t rdba;
2007 struct e1000_hw *hw = &adapter->hw;
2008 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 2009
e4c811c9 2010 if (adapter->rx_ps_pages) {
0f15a8fa 2011 /* this is a 32 byte descriptor */
581d708e 2012 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 2013 sizeof(union e1000_rx_desc_packet_split);
2014 adapter->clean_rx = e1000_clean_rx_irq_ps;
2015 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
2016 } else {
581d708e
MC		 2017 rdlen = adapter->rx_ring[0].count *
2018 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 2019 adapter->clean_rx = e1000_clean_rx_irq;
2020 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
2021 }
1da177e4
LT		 2022
2023 /* disable receives while setting up the descriptors */
581d708e
MC		 2024 rctl = E1000_READ_REG(hw, RCTL);
2025 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 2026
2027 /* set the Receive Delay Timer Register */
581d708e 2028 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 2029
581d708e
MC		 2030 if (hw->mac_type >= e1000_82540) {
2031 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
835bb129 2032 if (adapter->itr_setting != 0)
581d708e 2033 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 2034 1000000000 / (adapter->itr * 256));
2035 }
2036
2ae76d98 2037 if (hw->mac_type >= e1000_82571) {
2ae76d98 2038 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 2039 /* Reset delay timers after every interrupt */
6fc7a7ec 2040 ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
1e613fd9 2041#ifdef CONFIG_E1000_NAPI
835bb129 2042 /* Auto-Mask interrupts upon ICR access */
1e613fd9 2043 ctrl_ext |= E1000_CTRL_EXT_IAME;
835bb129 2044 E1000_WRITE_REG(hw, IAM, 0xffffffff);
1e613fd9 2045#endif
2ae76d98
MC		 2046 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
2047 E1000_WRITE_FLUSH(hw);
2048 }
2049
581d708e
MC		 2050 /* Setup the HW Rx Head and Tail Descriptor Pointers and
2051 * the Base and Length of the Rx Descriptor Ring */
f56799ea 2052 switch (adapter->num_rx_queues) {
24025e4e
MC		 2053 case 1:
2054 default:
581d708e 2055 rdba = adapter->rx_ring[0].dma;
581d708e 2056 E1000_WRITE_REG(hw, RDLEN, rdlen);
4ca213a6
AK		 2057 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
2058 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
581d708e 2059 E1000_WRITE_REG(hw, RDT, 0);
4ca213a6 2060 E1000_WRITE_REG(hw, RDH, 0);
6a951698
AK		 2061 adapter->rx_ring[0].rdh = ((hw->mac_type >= e1000_82543) ? E1000_RDH : E1000_82542_RDH);
2062 adapter->rx_ring[0].rdt = ((hw->mac_type >= e1000_82543) ? E1000_RDT : E1000_82542_RDT);
581d708e 2063 break;
24025e4e
MC		 2064 }
2065
1da177e4 2066 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 2067 if (hw->mac_type >= e1000_82543) {
2068 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 2069 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 2070 rxcsum |= E1000_RXCSUM_TUOFL;
2071
868d5309 2072 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 2073 * Must be used in conjunction with packet-split. */
96838a40
JB		 2074 if ((hw->mac_type >= e1000_82571) &&
2075 (adapter->rx_ps_pages)) {
2d7edb92
MC		 2076 rxcsum |= E1000_RXCSUM_IPPCSE;
2077 }
2078 } else {
2079 rxcsum &= ~E1000_RXCSUM_TUOFL;
2080 /* don't need to clear IPPCSE as it defaults to 0 */
2081 }
581d708e 2082 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 2083 }
2084
21c4d5e0
AK		 2085 /* enable early receives on 82573, only takes effect if using > 2048
2086 * byte total frame size. for example only for jumbo frames */
2087#define E1000_ERT_2048 0x100
2088 if (hw->mac_type == e1000_82573)
2089 E1000_WRITE_REG(hw, ERT, E1000_ERT_2048);
2090
1da177e4 2091 /* Enable Receives */
581d708e 2092 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 2093}
2094
2095/**
581d708e 2096 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 2097 * @adapter: board private structure
581d708e 2098 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 2099 *
2100 * Free all transmit software resources
2101 **/
2102
3ad2cc67 2103static void
581d708e
MC		 2104e1000_free_tx_resources(struct e1000_adapter *adapter,
2105 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 2106{
2107 struct pci_dev *pdev = adapter->pdev;
2108
581d708e 2109 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 2110
581d708e
MC		 2111 vfree(tx_ring->buffer_info);
2112 tx_ring->buffer_info = NULL;
1da177e4 2113
581d708e 2114 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 2115
581d708e
MC		 2116 tx_ring->desc = NULL;
2117}
2118
2119/**
2120 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
2121 * @adapter: board private structure
2122 *
2123 * Free all transmit software resources
2124 **/
2125
2126void
2127e1000_free_all_tx_resources(struct e1000_adapter *adapter)
2128{
2129 int i;
2130
f56799ea 2131 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2132 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2133}
2134
e619d523 2135static void
1da177e4
LT		 2136e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
2137 struct e1000_buffer *buffer_info)
2138{
96838a40 2139 if (buffer_info->dma) {
2648345f
MC		 2140 pci_unmap_page(adapter->pdev,
2141 buffer_info->dma,
2142 buffer_info->length,
2143 PCI_DMA_TODEVICE);
a9ebadd6 2144 buffer_info->dma = 0;
1da177e4 2145 }
a9ebadd6 2146 if (buffer_info->skb) {
1da177e4 2147 dev_kfree_skb_any(buffer_info->skb);
a9ebadd6
JB		 2148 buffer_info->skb = NULL;
2149 }
2150 /* buffer_info must be completely set up in the transmit path */
1da177e4
LT		 2151}
2152
2153/**
2154 * e1000_clean_tx_ring - Free Tx Buffers
2155 * @adapter: board private structure
581d708e 2156 * @tx_ring: ring to be cleaned
1da177e4
LT		 2157 **/
2158
2159static void
581d708e
MC		 2160e1000_clean_tx_ring(struct e1000_adapter *adapter,
2161 struct e1000_tx_ring *tx_ring)
1da177e4 2162{
1da177e4
LT		 2163 struct e1000_buffer *buffer_info;
2164 unsigned long size;
2165 unsigned int i;
2166
2167 /* Free all the Tx ring sk_buffs */
2168
96838a40 2169 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 2170 buffer_info = &tx_ring->buffer_info[i];
2171 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
2172 }
2173
2174 size = sizeof(struct e1000_buffer) * tx_ring->count;
2175 memset(tx_ring->buffer_info, 0, size);
2176
2177 /* Zero out the descriptor ring */
2178
2179 memset(tx_ring->desc, 0, tx_ring->size);
2180
2181 tx_ring->next_to_use = 0;
2182 tx_ring->next_to_clean = 0;
fd803241 2183 tx_ring->last_tx_tso = 0;
1da177e4 2184
581d708e
MC		 2185 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
2186 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
2187}
2188
2189/**
2190 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
2191 * @adapter: board private structure
2192 **/
2193
2194static void
2195e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
2196{
2197 int i;
2198
f56799ea 2199 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 2200 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 2201}
2202
2203/**
2204 * e1000_free_rx_resources - Free Rx Resources
2205 * @adapter: board private structure
581d708e 2206 * @rx_ring: ring to clean the resources from
1da177e4
LT		 2207 *
2208 * Free all receive software resources
2209 **/
2210
3ad2cc67 2211static void
581d708e
MC		 2212e1000_free_rx_resources(struct e1000_adapter *adapter,
2213 struct e1000_rx_ring *rx_ring)
1da177e4 2214{
1da177e4
LT		 2215 struct pci_dev *pdev = adapter->pdev;
2216
581d708e 2217 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 2218
2219 vfree(rx_ring->buffer_info);
2220 rx_ring->buffer_info = NULL;
2d7edb92
MC		 2221 kfree(rx_ring->ps_page);
2222 rx_ring->ps_page = NULL;
2223 kfree(rx_ring->ps_page_dma);
2224 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 2225
2226 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
2227
2228 rx_ring->desc = NULL;
2229}
2230
2231/**
581d708e 2232 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 2233 * @adapter: board private structure
581d708e
MC		 2234 *
2235 * Free all receive software resources
2236 **/
2237
2238void
2239e1000_free_all_rx_resources(struct e1000_adapter *adapter)
2240{
2241 int i;
2242
f56799ea 2243 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 2244 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
2245}
2246
2247/**
2248 * e1000_clean_rx_ring - Free Rx Buffers per Queue
2249 * @adapter: board private structure
2250 * @rx_ring: ring to free buffers from
1da177e4
LT		 2251 **/
2252
2253static void
581d708e
MC		 2254e1000_clean_rx_ring(struct e1000_adapter *adapter,
2255 struct e1000_rx_ring *rx_ring)
1da177e4 2256{
1da177e4 2257 struct e1000_buffer *buffer_info;
2d7edb92
MC		 2258 struct e1000_ps_page *ps_page;
2259 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 2260 struct pci_dev *pdev = adapter->pdev;
2261 unsigned long size;
2d7edb92 2262 unsigned int i, j;
1da177e4
LT		 2263
2264 /* Free all the Rx ring sk_buffs */
96838a40 2265 for (i = 0; i < rx_ring->count; i++) {
1da177e4 2266 buffer_info = &rx_ring->buffer_info[i];
96838a40 2267 if (buffer_info->skb) {
1da177e4
LT		 2268 pci_unmap_single(pdev,
2269 buffer_info->dma,
2270 buffer_info->length,
2271 PCI_DMA_FROMDEVICE);
2272
2273 dev_kfree_skb(buffer_info->skb);
2274 buffer_info->skb = NULL;
997f5cbd
JK		 2275 }
2276 ps_page = &rx_ring->ps_page[i];
2277 ps_page_dma = &rx_ring->ps_page_dma[i];
2278 for (j = 0; j < adapter->rx_ps_pages; j++) {
2279 if (!ps_page->ps_page[j]) break;
2280 pci_unmap_page(pdev,
2281 ps_page_dma->ps_page_dma[j],
2282 PAGE_SIZE, PCI_DMA_FROMDEVICE);
2283 ps_page_dma->ps_page_dma[j] = 0;
2284 put_page(ps_page->ps_page[j]);
2285 ps_page->ps_page[j] = NULL;
1da177e4
LT		 2286 }
2287 }
2288
2289 size = sizeof(struct e1000_buffer) * rx_ring->count;
2290 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 2291 size = sizeof(struct e1000_ps_page) * rx_ring->count;
2292 memset(rx_ring->ps_page, 0, size);
2293 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
2294 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 2295
2296 /* Zero out the descriptor ring */
2297
2298 memset(rx_ring->desc, 0, rx_ring->size);
2299
2300 rx_ring->next_to_clean = 0;
2301 rx_ring->next_to_use = 0;
2302
581d708e
MC		 2303 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
2304 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
2305}
2306
2307/**
2308 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
2309 * @adapter: board private structure
2310 **/
2311
2312static void
2313e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
2314{
2315 int i;
2316
f56799ea 2317 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 2318 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 2319}
2320
2321/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
2322 * and memory write and invalidate disabled for certain operations
2323 */
2324static void
2325e1000_enter_82542_rst(struct e1000_adapter *adapter)
2326{
2327 struct net_device *netdev = adapter->netdev;
2328 uint32_t rctl;
2329
2330 e1000_pci_clear_mwi(&adapter->hw);
2331
2332 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2333 rctl |= E1000_RCTL_RST;
2334 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2335 E1000_WRITE_FLUSH(&adapter->hw);
2336 mdelay(5);
2337
96838a40 2338 if (netif_running(netdev))
581d708e 2339 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2340}
2341
2342static void
2343e1000_leave_82542_rst(struct e1000_adapter *adapter)
2344{
2345 struct net_device *netdev = adapter->netdev;
2346 uint32_t rctl;
2347
2348 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2349 rctl &= ~E1000_RCTL_RST;
2350 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2351 E1000_WRITE_FLUSH(&adapter->hw);
2352 mdelay(5);
2353
96838a40 2354 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2355 e1000_pci_set_mwi(&adapter->hw);
2356
96838a40 2357 if (netif_running(netdev)) {
72d64a43
JK		 2358 /* No need to loop, because 82542 supports only 1 queue */
2359 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2360 e1000_configure_rx(adapter);
72d64a43 2361 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2362 }
2363}
2364
2365/**
2366 * e1000_set_mac - Change the Ethernet Address of the NIC
2367 * @netdev: network interface device structure
2368 * @p: pointer to an address structure
2369 *
2370 * Returns 0 on success, negative on failure
2371 **/
2372
2373static int
2374e1000_set_mac(struct net_device *netdev, void *p)
2375{
60490fe0 2376 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2377 struct sockaddr *addr = p;
2378
96838a40 2379 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2380 return -EADDRNOTAVAIL;
2381
2382 /* 82542 2.0 needs to be in reset to write receive address registers */
2383
96838a40 2384 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2385 e1000_enter_82542_rst(adapter);
2386
2387 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2388 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2389
2390 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2391
868d5309
MC		 2392 /* With 82571 controllers, LAA may be overwritten (with the default)
2393 * due to controller reset from the other port. */
2394 if (adapter->hw.mac_type == e1000_82571) {
2395 /* activate the work around */
2396 adapter->hw.laa_is_present = 1;
2397
96838a40
JB		 2398 /* Hold a copy of the LAA in RAR[14] This is done so that
2399 * between the time RAR[0] gets clobbered and the time it
2400 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2401 * of the RARs and no incoming packets directed to this port
96838a40 2402 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2403 * RAR[14] */
96838a40 2404 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2405 E1000_RAR_ENTRIES - 1);
2406 }
2407
96838a40 2408 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2409 e1000_leave_82542_rst(adapter);
2410
2411 return 0;
2412}
2413
2414/**
2415 * e1000_set_multi - Multicast and Promiscuous mode set
2416 * @netdev: network interface device structure
2417 *
2418 * The set_multi entry point is called whenever the multicast address
2419 * list or the network interface flags are updated. This routine is
2420 * responsible for configuring the hardware for proper multicast,
2421 * promiscuous mode, and all-multi behavior.
2422 **/
2423
2424static void
2425e1000_set_multi(struct net_device *netdev)
2426{
60490fe0 2427 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2428 struct e1000_hw *hw = &adapter->hw;
2429 struct dev_mc_list *mc_ptr;
2430 uint32_t rctl;
2431 uint32_t hash_value;
868d5309 2432 int i, rar_entries = E1000_RAR_ENTRIES;
cd94dd0b
AK		 2433 int mta_reg_count = (hw->mac_type == e1000_ich8lan) ?
2434 E1000_NUM_MTA_REGISTERS_ICH8LAN :
2435 E1000_NUM_MTA_REGISTERS;
2436
2437 if (adapter->hw.mac_type == e1000_ich8lan)
2438 rar_entries = E1000_RAR_ENTRIES_ICH8LAN;
1da177e4 2439
868d5309
MC		 2440 /* reserve RAR[14] for LAA over-write work-around */
2441 if (adapter->hw.mac_type == e1000_82571)
2442 rar_entries--;
1da177e4 2443
2648345f
MC		 2444 /* Check for Promiscuous and All Multicast modes */
2445
1da177e4
LT		 2446 rctl = E1000_READ_REG(hw, RCTL);
2447
96838a40 2448 if (netdev->flags & IFF_PROMISC) {
1da177e4 2449 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2450 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2451 rctl |= E1000_RCTL_MPE;
2452 rctl &= ~E1000_RCTL_UPE;
2453 } else {
2454 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2455 }
2456
2457 E1000_WRITE_REG(hw, RCTL, rctl);
2458
2459 /* 82542 2.0 needs to be in reset to write receive address registers */
2460
96838a40 2461 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2462 e1000_enter_82542_rst(adapter);
2463
2464 /* load the first 14 multicast address into the exact filters 1-14
2465 * RAR 0 is used for the station MAC adddress
2466 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2467 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2468 */
2469 mc_ptr = netdev->mc_list;
2470
96838a40 2471 for (i = 1; i < rar_entries; i++) {
868d5309 2472 if (mc_ptr) {
1da177e4
LT		 2473 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2474 mc_ptr = mc_ptr->next;
2475 } else {
2476 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
4ca213a6 2477 E1000_WRITE_FLUSH(hw);
1da177e4 2478 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
4ca213a6 2479 E1000_WRITE_FLUSH(hw);
1da177e4
LT		 2480 }
2481 }
2482
2483 /* clear the old settings from the multicast hash table */
2484
cd94dd0b 2485 for (i = 0; i < mta_reg_count; i++) {
1da177e4 2486 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
4ca213a6
AK		 2487 E1000_WRITE_FLUSH(hw);
2488 }
1da177e4
LT		 2489
2490 /* load any remaining addresses into the hash table */
2491
96838a40 2492 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2493 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2494 e1000_mta_set(hw, hash_value);
2495 }
2496
96838a40 2497 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2498 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2499}
2500
2501/* Need to wait a few seconds after link up to get diagnostic information from
2502 * the phy */
2503
2504static void
2505e1000_update_phy_info(unsigned long data)
2506{
2507 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2508 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2509}
2510
2511/**
2512 * e1000_82547_tx_fifo_stall - Timer Call-back
2513 * @data: pointer to adapter cast into an unsigned long
2514 **/
2515
2516static void
2517e1000_82547_tx_fifo_stall(unsigned long data)
2518{
2519 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2520 struct net_device *netdev = adapter->netdev;
2521 uint32_t tctl;
2522
96838a40
JB		 2523 if (atomic_read(&adapter->tx_fifo_stall)) {
2524 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2525 E1000_READ_REG(&adapter->hw, TDH)) &&
2526 (E1000_READ_REG(&adapter->hw, TDFT) ==
2527 E1000_READ_REG(&adapter->hw, TDFH)) &&
2528 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2529 E1000_READ_REG(&adapter->hw, TDFHS))) {
2530 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2531 E1000_WRITE_REG(&adapter->hw, TCTL,
2532 tctl & ~E1000_TCTL_EN);
2533 E1000_WRITE_REG(&adapter->hw, TDFT,
2534 adapter->tx_head_addr);
2535 E1000_WRITE_REG(&adapter->hw, TDFH,
2536 adapter->tx_head_addr);
2537 E1000_WRITE_REG(&adapter->hw, TDFTS,
2538 adapter->tx_head_addr);
2539 E1000_WRITE_REG(&adapter->hw, TDFHS,
2540 adapter->tx_head_addr);
2541 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2542 E1000_WRITE_FLUSH(&adapter->hw);
2543
2544 adapter->tx_fifo_head = 0;
2545 atomic_set(&adapter->tx_fifo_stall, 0);
2546 netif_wake_queue(netdev);
2547 } else {
2548 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2549 }
2550 }
2551}
2552
2553/**
2554 * e1000_watchdog - Timer Call-back
2555 * @data: pointer to adapter cast into an unsigned long
2556 **/
2557static void
2558e1000_watchdog(unsigned long data)
2559{
2560 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
1da177e4 2561 struct net_device *netdev = adapter->netdev;
545c67c0 2562 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2563 uint32_t link, tctl;
cd94dd0b
AK		 2564 int32_t ret_val;
2565
2566 ret_val = e1000_check_for_link(&adapter->hw);
2567 if ((ret_val == E1000_ERR_PHY) &&
2568 (adapter->hw.phy_type == e1000_phy_igp_3) &&
2569 (E1000_READ_REG(&adapter->hw, CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
2570 /* See e1000_kumeran_lock_loss_workaround() */
2571 DPRINTK(LINK, INFO,
2572 "Gigabit has been disabled, downgrading speed\n");
2573 }
90fb5135 2574
2d7edb92
MC		 2575 if (adapter->hw.mac_type == e1000_82573) {
2576 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2577 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2578 e1000_update_mng_vlan(adapter);
96838a40 2579 }
1da177e4 2580
96838a40 2581 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2582 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2583 link = !adapter->hw.serdes_link_down;
2584 else
2585 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2586
96838a40
JB		 2587 if (link) {
2588 if (!netif_carrier_ok(netdev)) {
9669f53b 2589 uint32_t ctrl;
fe7fe28e 2590 boolean_t txb2b = 1;
1da177e4
LT		 2591 e1000_get_speed_and_duplex(&adapter->hw,
2592 &adapter->link_speed,
2593 &adapter->link_duplex);
2594
9669f53b
AK		 2595 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
2596 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s, "
2597 "Flow Control: %s\n",
2598 adapter->link_speed,
2599 adapter->link_duplex == FULL_DUPLEX ?
2600 "Full Duplex" : "Half Duplex",
2601 ((ctrl & E1000_CTRL_TFCE) && (ctrl &
2602 E1000_CTRL_RFCE)) ? "RX/TX" : ((ctrl &
2603 E1000_CTRL_RFCE) ? "RX" : ((ctrl &
2604 E1000_CTRL_TFCE) ? "TX" : "None" )));
1da177e4 2605
7e6c9861
JK		 2606 /* tweak tx_queue_len according to speed/duplex
2607 * and adjust the timeout factor */
66a2b0a3
JK		 2608 netdev->tx_queue_len = adapter->tx_queue_len;
2609 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2610 switch (adapter->link_speed) {
2611 case SPEED_10:
fe7fe28e 2612 txb2b = 0;
7e6c9861
JK		 2613 netdev->tx_queue_len = 10;
2614 adapter->tx_timeout_factor = 8;
2615 break;
2616 case SPEED_100:
fe7fe28e 2617 txb2b = 0;
7e6c9861
JK		 2618 netdev->tx_queue_len = 100;
2619 /* maybe add some timeout factor ? */
2620 break;
2621 }
2622
fe7fe28e 2623 if ((adapter->hw.mac_type == e1000_82571 ||
7e6c9861 2624 adapter->hw.mac_type == e1000_82572) &&
fe7fe28e 2625 txb2b == 0) {
7e6c9861
JK		 2626 uint32_t tarc0;
2627 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
90fb5135 2628 tarc0 &= ~(1 << 21);
7e6c9861
JK		 2629 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2630 }
90fb5135 2631
7e6c9861
JK		 2632 /* disable TSO for pcie and 10/100 speeds, to avoid
2633 * some hardware issues */
2634 if (!adapter->tso_force &&
2635 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2636 switch (adapter->link_speed) {
2637 case SPEED_10:
66a2b0a3 2638 case SPEED_100:
7e6c9861
JK		 2639 DPRINTK(PROBE,INFO,
2640 "10/100 speed: disabling TSO\n");
2641 netdev->features &= ~NETIF_F_TSO;
87ca4e5b 2642 netdev->features &= ~NETIF_F_TSO6;
7e6c9861
JK		 2643 break;
2644 case SPEED_1000:
2645 netdev->features |= NETIF_F_TSO;
87ca4e5b 2646 netdev->features |= NETIF_F_TSO6;
7e6c9861
JK		 2647 break;
2648 default:
2649 /* oops */
66a2b0a3
JK		 2650 break;
2651 }
2652 }
7e6c9861
JK		 2653
2654 /* enable transmits in the hardware, need to do this
2655 * after setting TARC0 */
2656 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2657 tctl |= E1000_TCTL_EN;
2658 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2659
1da177e4
LT		 2660 netif_carrier_on(netdev);
2661 netif_wake_queue(netdev);
56e1393f 2662 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4 2663 adapter->smartspeed = 0;
bb8e3311
JG		 2664 } else {
2665 /* make sure the receive unit is started */
2666 if (adapter->hw.rx_needs_kicking) {
2667 struct e1000_hw *hw = &adapter->hw;
2668 uint32_t rctl = E1000_READ_REG(hw, RCTL);
2669 E1000_WRITE_REG(hw, RCTL, rctl | E1000_RCTL_EN);
2670 }
1da177e4
LT		 2671 }
2672 } else {
96838a40 2673 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2674 adapter->link_speed = 0;
2675 adapter->link_duplex = 0;
2676 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2677 netif_carrier_off(netdev);
2678 netif_stop_queue(netdev);
56e1393f 2679 mod_timer(&adapter->phy_info_timer, round_jiffies(jiffies + 2 * HZ));
87041639
JK		 2680
2681 /* 80003ES2LAN workaround--
2682 * For packet buffer work-around on link down event;
2683 * disable receives in the ISR and
2684 * reset device here in the watchdog
2685 */
8fc897b0 2686 if (adapter->hw.mac_type == e1000_80003es2lan)
87041639
JK		 2687 /* reset device */
2688 schedule_work(&adapter->reset_task);
1da177e4
LT		 2689 }
2690
2691 e1000_smartspeed(adapter);
2692 }
2693
2694 e1000_update_stats(adapter);
2695
2696 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2697 adapter->tpt_old = adapter->stats.tpt;
2698 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2699 adapter->colc_old = adapter->stats.colc;
2700
2701 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2702 adapter->gorcl_old = adapter->stats.gorcl;
2703 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2704 adapter->gotcl_old = adapter->stats.gotcl;
2705
2706 e1000_update_adaptive(&adapter->hw);
2707
f56799ea 2708 if (!netif_carrier_ok(netdev)) {
581d708e 2709 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2710 /* We've lost link, so the controller stops DMA,
2711 * but we've got queued Tx work that's never going
2712 * to get done, so reset controller to flush Tx.
2713 * (Do the reset outside of interrupt context). */
87041639
JK		 2714 adapter->tx_timeout_count++;
2715 schedule_work(&adapter->reset_task);
1da177e4
LT		 2716 }
2717 }
2718
1da177e4
LT		 2719 /* Cause software interrupt to ensure rx ring is cleaned */
2720 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2721
2648345f 2722 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2723 adapter->detect_tx_hung = TRUE;
2724
96838a40 2725 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2726 * reset from the other port. Set the appropriate LAA in RAR[0] */
2727 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2728 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2729
1da177e4 2730 /* Reset the timer */
56e1393f 2731 mod_timer(&adapter->watchdog_timer, round_jiffies(jiffies + 2 * HZ));
1da177e4
LT		 2732}
2733
835bb129
JB		 2734enum latency_range {
2735 lowest_latency = 0,
2736 low_latency = 1,
2737 bulk_latency = 2,
2738 latency_invalid = 255
2739};
2740
2741/**
2742 * e1000_update_itr - update the dynamic ITR value based on statistics
2743 * Stores a new ITR value based on packets and byte
2744 * counts during the last interrupt. The advantage of per interrupt
2745 * computation is faster updates and more accurate ITR for the current
2746 * traffic pattern. Constants in this function were computed
2747 * based on theoretical maximum wire speed and thresholds were set based
2748 * on testing data as well as attempting to minimize response time
2749 * while increasing bulk throughput.
2750 * this functionality is controlled by the InterruptThrottleRate module
2751 * parameter (see e1000_param.c)
2752 * @adapter: pointer to adapter
2753 * @itr_setting: current adapter->itr
2754 * @packets: the number of packets during this measurement interval
2755 * @bytes: the number of bytes during this measurement interval
2756 **/
2757static unsigned int e1000_update_itr(struct e1000_adapter *adapter,
2758 uint16_t itr_setting,
2759 int packets,
2760 int bytes)
2761{
2762 unsigned int retval = itr_setting;
2763 struct e1000_hw *hw = &adapter->hw;
2764
2765 if (unlikely(hw->mac_type < e1000_82540))
2766 goto update_itr_done;
2767
2768 if (packets == 0)
2769 goto update_itr_done;
2770
835bb129
JB		 2771 switch (itr_setting) {
2772 case lowest_latency:
2b65326e
JB		 2773 /* jumbo frames get bulk treatment*/
2774 if (bytes/packets > 8000)
2775 retval = bulk_latency;
2776 else if ((packets < 5) && (bytes > 512))
835bb129
JB		 2777 retval = low_latency;
2778 break;
2779 case low_latency: /* 50 usec aka 20000 ints/s */
2780 if (bytes > 10000) {
2b65326e
JB		 2781 /* jumbo frames need bulk latency setting */
2782 if (bytes/packets > 8000)
2783 retval = bulk_latency;
2784 else if ((packets < 10) || ((bytes/packets) > 1200))
835bb129
JB		 2785 retval = bulk_latency;
2786 else if ((packets > 35))
2787 retval = lowest_latency;
2b65326e
JB		 2788 } else if (bytes/packets > 2000)
2789 retval = bulk_latency;
2790 else if (packets <= 2 && bytes < 512)
835bb129
JB		 2791 retval = lowest_latency;
2792 break;
2793 case bulk_latency: /* 250 usec aka 4000 ints/s */
2794 if (bytes > 25000) {
2795 if (packets > 35)
2796 retval = low_latency;
2b65326e
JB		 2797 } else if (bytes < 6000) {
2798 retval = low_latency;
835bb129
JB		 2799 }
2800 break;
2801 }
2802
2803update_itr_done:
2804 return retval;
2805}
2806
2807static void e1000_set_itr(struct e1000_adapter *adapter)
2808{
2809 struct e1000_hw *hw = &adapter->hw;
2810 uint16_t current_itr;
2811 uint32_t new_itr = adapter->itr;
2812
2813 if (unlikely(hw->mac_type < e1000_82540))
2814 return;
2815
2816 /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2817 if (unlikely(adapter->link_speed != SPEED_1000)) {
2818 current_itr = 0;
2819 new_itr = 4000;
2820 goto set_itr_now;
2821 }
2822
2823 adapter->tx_itr = e1000_update_itr(adapter,
2824 adapter->tx_itr,
2825 adapter->total_tx_packets,
2826 adapter->total_tx_bytes);
2b65326e
JB		 2827 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2828 if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2829 adapter->tx_itr = low_latency;
2830
835bb129
JB		 2831 adapter->rx_itr = e1000_update_itr(adapter,
2832 adapter->rx_itr,
2833 adapter->total_rx_packets,
2834 adapter->total_rx_bytes);
2b65326e
JB		 2835 /* conservative mode (itr 3) eliminates the lowest_latency setting */
2836 if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2837 adapter->rx_itr = low_latency;
835bb129
JB		 2838
2839 current_itr = max(adapter->rx_itr, adapter->tx_itr);
2840
835bb129
JB		 2841 switch (current_itr) {
2842 /* counts and packets in update_itr are dependent on these numbers */
2843 case lowest_latency:
2844 new_itr = 70000;
2845 break;
2846 case low_latency:
2847 new_itr = 20000; /* aka hwitr = ~200 */
2848 break;
2849 case bulk_latency:
2850 new_itr = 4000;
2851 break;
2852 default:
2853 break;
2854 }
2855
2856set_itr_now:
2857 if (new_itr != adapter->itr) {
2858 /* this attempts to bias the interrupt rate towards Bulk
2859 * by adding intermediate steps when interrupt rate is
2860 * increasing */
2861 new_itr = new_itr > adapter->itr ?
2862 min(adapter->itr + (new_itr >> 2), new_itr) :
2863 new_itr;
2864 adapter->itr = new_itr;
2865 E1000_WRITE_REG(hw, ITR, 1000000000 / (new_itr * 256));
2866 }
2867
2868 return;
2869}
2870
1da177e4
LT		 2871#define E1000_TX_FLAGS_CSUM 0x00000001
2872#define E1000_TX_FLAGS_VLAN 0x00000002
2873#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2874#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2875#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2876#define E1000_TX_FLAGS_VLAN_SHIFT 16
2877
e619d523 2878static int
581d708e
MC		 2879e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2880 struct sk_buff *skb)
1da177e4 2881{
1da177e4 2882 struct e1000_context_desc *context_desc;
545c67c0 2883 struct e1000_buffer *buffer_info;
1da177e4
LT		 2884 unsigned int i;
2885 uint32_t cmd_length = 0;
2d7edb92 2886 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2887 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2888 int err;
2889
89114afd 2890 if (skb_is_gso(skb)) {
1da177e4
LT		 2891 if (skb_header_cloned(skb)) {
2892 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2893 if (err)
2894 return err;
2895 }
2896
ab6a5bb6 2897 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
7967168c 2898 mss = skb_shinfo(skb)->gso_size;
60828236 2899 if (skb->protocol == htons(ETH_P_IP)) {
eddc9ec5
ACM		 2900 struct iphdr *iph = ip_hdr(skb);
2901 iph->tot_len = 0;
2902 iph->check = 0;
aa8223c7
ACM		 2903 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
2904 iph->daddr, 0,
2905 IPPROTO_TCP,
2906 0);
2d7edb92 2907 cmd_length = E1000_TXD_CMD_IP;
ea2ae17d 2908 ipcse = skb_transport_offset(skb) - 1;
e15fdd03 2909 } else if (skb->protocol == htons(ETH_P_IPV6)) {
0660e03f 2910 ipv6_hdr(skb)->payload_len = 0;
aa8223c7 2911 tcp_hdr(skb)->check =
0660e03f
ACM		 2912 ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
2913 &ipv6_hdr(skb)->daddr,
2914 0, IPPROTO_TCP, 0);
2d7edb92 2915 ipcse = 0;
2d7edb92 2916 }
bbe735e4 2917 ipcss = skb_network_offset(skb);
eddc9ec5 2918 ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
ea2ae17d 2919 tucss = skb_transport_offset(skb);
aa8223c7 2920 tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
1da177e4
LT		 2921 tucse = 0;
2922
2923 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2924 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2925
581d708e
MC		 2926 i = tx_ring->next_to_use;
2927 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2928 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2929
2930 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2931 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2932 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2933 context_desc->upper_setup.tcp_fields.tucss = tucss;
2934 context_desc->upper_setup.tcp_fields.tucso = tucso;
2935 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2936 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2937 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2938 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2939
545c67c0 2940 buffer_info->time_stamp = jiffies;
a9ebadd6 2941 buffer_info->next_to_watch = i;
545c67c0 2942
581d708e
MC		 2943 if (++i == tx_ring->count) i = 0;
2944 tx_ring->next_to_use = i;
1da177e4 2945
8241e35e 2946 return TRUE;
1da177e4 2947 }
8241e35e 2948 return FALSE;
1da177e4
LT		 2949}
2950
e619d523 2951static boolean_t
581d708e
MC		 2952e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2953 struct sk_buff *skb)
1da177e4
LT		 2954{
2955 struct e1000_context_desc *context_desc;
545c67c0 2956 struct e1000_buffer *buffer_info;
1da177e4
LT		 2957 unsigned int i;
2958 uint8_t css;
2959
84fa7933 2960 if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
ea2ae17d 2961 css = skb_transport_offset(skb);
1da177e4 2962
581d708e 2963 i = tx_ring->next_to_use;
545c67c0 2964 buffer_info = &tx_ring->buffer_info[i];
581d708e 2965 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4 2966
f6c57baf 2967 context_desc->lower_setup.ip_config = 0;
1da177e4 2968 context_desc->upper_setup.tcp_fields.tucss = css;
628592cc
HX		 2969 context_desc->upper_setup.tcp_fields.tucso =
2970 css + skb->csum_offset;
1da177e4
LT		 2971 context_desc->upper_setup.tcp_fields.tucse = 0;
2972 context_desc->tcp_seg_setup.data = 0;
2973 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2974
545c67c0 2975 buffer_info->time_stamp = jiffies;
a9ebadd6 2976 buffer_info->next_to_watch = i;
545c67c0 2977
581d708e
MC		 2978 if (unlikely(++i == tx_ring->count)) i = 0;
2979 tx_ring->next_to_use = i;
1da177e4
LT		 2980
2981 return TRUE;
2982 }
2983
2984 return FALSE;
2985}
2986
2987#define E1000_MAX_TXD_PWR 12
2988#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2989
e619d523 2990static int
581d708e
MC		 2991e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2992 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2993 unsigned int nr_frags, unsigned int mss)
1da177e4 2994{
1da177e4
LT		 2995 struct e1000_buffer *buffer_info;
2996 unsigned int len = skb->len;
2997 unsigned int offset = 0, size, count = 0, i;
2998 unsigned int f;
2999 len -= skb->data_len;
3000
3001 i = tx_ring->next_to_use;
3002
96838a40 3003 while (len) {
1da177e4
LT		 3004 buffer_info = &tx_ring->buffer_info[i];
3005 size = min(len, max_per_txd);
fd803241
JK		 3006 /* Workaround for Controller erratum --
3007 * descriptor for non-tso packet in a linear SKB that follows a
3008 * tso gets written back prematurely before the data is fully
0f15a8fa 3009 * DMA'd to the controller */
fd803241 3010 if (!skb->data_len && tx_ring->last_tx_tso &&
89114afd 3011 !skb_is_gso(skb)) {
fd803241
JK		 3012 tx_ring->last_tx_tso = 0;
3013 size -= 4;
3014 }
3015
1da177e4
LT		 3016 /* Workaround for premature desc write-backs
3017 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3018 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4 3019 size -= 4;
97338bde
MC		 3020 /* work-around for errata 10 and it applies
3021 * to all controllers in PCI-X mode
3022 * The fix is to make sure that the first descriptor of a
3023 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
3024 */
96838a40 3025 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3026 (size > 2015) && count == 0))
3027 size = 2015;
96838a40 3028
1da177e4
LT		 3029 /* Workaround for potential 82544 hang in PCI-X. Avoid
3030 * terminating buffers within evenly-aligned dwords. */
96838a40 3031 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3032 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
3033 size > 4))
3034 size -= 4;
3035
3036 buffer_info->length = size;
3037 buffer_info->dma =
3038 pci_map_single(adapter->pdev,
3039 skb->data + offset,
3040 size,
3041 PCI_DMA_TODEVICE);
3042 buffer_info->time_stamp = jiffies;
a9ebadd6 3043 buffer_info->next_to_watch = i;
1da177e4
LT		 3044
3045 len -= size;
3046 offset += size;
3047 count++;
96838a40 3048 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3049 }
3050
96838a40 3051 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 3052 struct skb_frag_struct *frag;
3053
3054 frag = &skb_shinfo(skb)->frags[f];
3055 len = frag->size;
3056 offset = frag->page_offset;
3057
96838a40 3058 while (len) {
1da177e4
LT		 3059 buffer_info = &tx_ring->buffer_info[i];
3060 size = min(len, max_per_txd);
1da177e4
LT		 3061 /* Workaround for premature desc write-backs
3062 * in TSO mode. Append 4-byte sentinel desc */
96838a40 3063 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4 3064 size -= 4;
1da177e4
LT		 3065 /* Workaround for potential 82544 hang in PCI-X.
3066 * Avoid terminating buffers within evenly-aligned
3067 * dwords. */
96838a40 3068 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 3069 !((unsigned long)(frag->page+offset+size-1) & 4) &&
3070 size > 4))
3071 size -= 4;
3072
3073 buffer_info->length = size;
3074 buffer_info->dma =
3075 pci_map_page(adapter->pdev,
3076 frag->page,
3077 offset,
3078 size,
3079 PCI_DMA_TODEVICE);
3080 buffer_info->time_stamp = jiffies;
a9ebadd6 3081 buffer_info->next_to_watch = i;
1da177e4
LT		 3082
3083 len -= size;
3084 offset += size;
3085 count++;
96838a40 3086 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3087 }
3088 }
3089
3090 i = (i == 0) ? tx_ring->count - 1 : i - 1;
3091 tx_ring->buffer_info[i].skb = skb;
3092 tx_ring->buffer_info[first].next_to_watch = i;
3093
3094 return count;
3095}
3096
e619d523 3097static void
581d708e
MC		 3098e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
3099 int tx_flags, int count)
1da177e4 3100{
1da177e4
LT		 3101 struct e1000_tx_desc *tx_desc = NULL;
3102 struct e1000_buffer *buffer_info;
3103 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
3104 unsigned int i;
3105
96838a40 3106 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 3107 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
3108 E1000_TXD_CMD_TSE;
2d7edb92
MC		 3109 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3110
96838a40 3111 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 3112 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 3113 }
3114
96838a40 3115 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 3116 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
3117 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
3118 }
3119
96838a40 3120 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 3121 txd_lower |= E1000_TXD_CMD_VLE;
3122 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
3123 }
3124
3125 i = tx_ring->next_to_use;
3126
96838a40 3127 while (count--) {
1da177e4
LT		 3128 buffer_info = &tx_ring->buffer_info[i];
3129 tx_desc = E1000_TX_DESC(*tx_ring, i);
3130 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3131 tx_desc->lower.data =
3132 cpu_to_le32(txd_lower | buffer_info->length);
3133 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 3134 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 3135 }
3136
3137 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
3138
3139 /* Force memory writes to complete before letting h/w
3140 * know there are new descriptors to fetch. (Only
3141 * applicable for weak-ordered memory model archs,
3142 * such as IA-64). */
3143 wmb();
3144
3145 tx_ring->next_to_use = i;
581d708e 3146 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
2ce9047f
JB		 3147 /* we need this if more than one processor can write to our tail
3148 * at a time, it syncronizes IO on IA64/Altix systems */
3149 mmiowb();
1da177e4
LT		 3150}
3151
3152/**
3153 * 82547 workaround to avoid controller hang in half-duplex environment.
3154 * The workaround is to avoid queuing a large packet that would span
3155 * the internal Tx FIFO ring boundary by notifying the stack to resend
3156 * the packet at a later time. This gives the Tx FIFO an opportunity to
3157 * flush all packets. When that occurs, we reset the Tx FIFO pointers
3158 * to the beginning of the Tx FIFO.
3159 **/
3160
3161#define E1000_FIFO_HDR 0x10
3162#define E1000_82547_PAD_LEN 0x3E0
3163
e619d523 3164static int
1da177e4
LT		 3165e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
3166{
3167 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
3168 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
3169
9099cfb9 3170 skb_fifo_len = ALIGN(skb_fifo_len, E1000_FIFO_HDR);
1da177e4 3171
96838a40 3172 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 3173 goto no_fifo_stall_required;
3174
96838a40 3175 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 3176 return 1;
3177
96838a40 3178 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 3179 atomic_set(&adapter->tx_fifo_stall, 1);
3180 return 1;
3181 }
3182
3183no_fifo_stall_required:
3184 adapter->tx_fifo_head += skb_fifo_len;
96838a40 3185 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 3186 adapter->tx_fifo_head -= adapter->tx_fifo_size;
3187 return 0;
3188}
3189
2d7edb92 3190#define MINIMUM_DHCP_PACKET_SIZE 282
e619d523 3191static int
2d7edb92
MC		 3192e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
3193{
3194 struct e1000_hw *hw = &adapter->hw;
3195 uint16_t length, offset;
96838a40
JB		 3196 if (vlan_tx_tag_present(skb)) {
3197 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 3198 ( adapter->hw.mng_cookie.status &
3199 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
3200 return 0;
3201 }
20a44028 3202 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 3203 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 3204 if ((htons(ETH_P_IP) == eth->h_proto)) {
3205 const struct iphdr *ip =
2d7edb92 3206 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 3207 if (IPPROTO_UDP == ip->protocol) {
3208 struct udphdr *udp =
3209 (struct udphdr *)((uint8_t *)ip +
2d7edb92 3210 (ip->ihl << 2));
96838a40 3211 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 3212 offset = (uint8_t *)udp + 8 - skb->data;
3213 length = skb->len - offset;
3214
3215 return e1000_mng_write_dhcp_info(hw,
96838a40 3216 (uint8_t *)udp + 8,
2d7edb92
MC		 3217 length);
3218 }
3219 }
3220 }
3221 }
3222 return 0;
3223}
3224
65c7973f
JB		 3225static int __e1000_maybe_stop_tx(struct net_device *netdev, int size)
3226{
3227 struct e1000_adapter *adapter = netdev_priv(netdev);
3228 struct e1000_tx_ring *tx_ring = adapter->tx_ring;
3229
3230 netif_stop_queue(netdev);
3231 /* Herbert's original patch had:
3232 * smp_mb__after_netif_stop_queue();
3233 * but since that doesn't exist yet, just open code it. */
3234 smp_mb();
3235
3236 /* We need to check again in a case another CPU has just
3237 * made room available. */
3238 if (likely(E1000_DESC_UNUSED(tx_ring) < size))
3239 return -EBUSY;
3240
3241 /* A reprieve! */
3242 netif_start_queue(netdev);
fcfb1224 3243 ++adapter->restart_queue;
65c7973f
JB		 3244 return 0;
3245}
3246
3247static int e1000_maybe_stop_tx(struct net_device *netdev,
3248 struct e1000_tx_ring *tx_ring, int size)
3249{
3250 if (likely(E1000_DESC_UNUSED(tx_ring) >= size))
3251 return 0;
3252 return __e1000_maybe_stop_tx(netdev, size);
3253}
3254
1da177e4
LT		 3255#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
3256static int
3257e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
3258{
60490fe0 3259 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 3260 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 3261 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
3262 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
3263 unsigned int tx_flags = 0;
3264 unsigned int len = skb->len;
3265 unsigned long flags;
3266 unsigned int nr_frags = 0;
3267 unsigned int mss = 0;
3268 int count = 0;
76c224bc 3269 int tso;
1da177e4
LT		 3270 unsigned int f;
3271 len -= skb->data_len;
3272
65c7973f
JB		 3273 /* This goes back to the question of how to logically map a tx queue
3274 * to a flow. Right now, performance is impacted slightly negatively
3275 * if using multiple tx queues. If the stack breaks away from a
3276 * single qdisc implementation, we can look at this again. */
581d708e 3277 tx_ring = adapter->tx_ring;
24025e4e 3278
581d708e 3279 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 3280 dev_kfree_skb_any(skb);
3281 return NETDEV_TX_OK;
3282 }
3283
032fe6e9
JB		 3284 /* 82571 and newer doesn't need the workaround that limited descriptor
3285 * length to 4kB */
3286 if (adapter->hw.mac_type >= e1000_82571)
3287 max_per_txd = 8192;
3288
7967168c 3289 mss = skb_shinfo(skb)->gso_size;
76c224bc 3290 /* The controller does a simple calculation to
1da177e4
LT		 3291 * make sure there is enough room in the FIFO before
3292 * initiating the DMA for each buffer. The calc is:
3293 * 4 = ceil(buffer len/mss). To make sure we don't
3294 * overrun the FIFO, adjust the max buffer len if mss
3295 * drops. */
96838a40 3296 if (mss) {
9a3056da 3297 uint8_t hdr_len;
1da177e4
LT		 3298 max_per_txd = min(mss << 2, max_per_txd);
3299 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 3300
90fb5135
AK		 3301 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
3302 * points to just header, pull a few bytes of payload from
3303 * frags into skb->data */
ab6a5bb6 3304 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
9f687888
JK		 3305 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
3306 switch (adapter->hw.mac_type) {
3307 unsigned int pull_size;
683a2aa3
HX		 3308 case e1000_82544:
3309 /* Make sure we have room to chop off 4 bytes,
3310 * and that the end alignment will work out to
3311 * this hardware's requirements
3312 * NOTE: this is a TSO only workaround
3313 * if end byte alignment not correct move us
3314 * into the next dword */
27a884dc 3315 if ((unsigned long)(skb_tail_pointer(skb) - 1) & 4)
683a2aa3
HX		 3316 break;
3317 /* fall through */
9f687888
JK		 3318 case e1000_82571:
3319 case e1000_82572:
3320 case e1000_82573:
cd94dd0b 3321 case e1000_ich8lan:
9f687888
JK		 3322 pull_size = min((unsigned int)4, skb->data_len);
3323 if (!__pskb_pull_tail(skb, pull_size)) {
a5eafce2 3324 DPRINTK(DRV, ERR,
9f687888
JK		 3325 "__pskb_pull_tail failed.\n");
3326 dev_kfree_skb_any(skb);
749dfc70 3327 return NETDEV_TX_OK;
9f687888
JK		 3328 }
3329 len = skb->len - skb->data_len;
3330 break;
3331 default:
3332 /* do nothing */
3333 break;
d74bbd3b 3334 }
9a3056da 3335 }
1da177e4
LT		 3336 }
3337
9a3056da 3338 /* reserve a descriptor for the offload context */
84fa7933 3339 if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
1da177e4 3340 count++;
2648345f 3341 count++;
fd803241 3342
fd803241 3343 /* Controller Erratum workaround */
89114afd 3344 if (!skb->data_len && tx_ring->last_tx_tso && !skb_is_gso(skb))
fd803241 3345 count++;
fd803241 3346
1da177e4
LT		 3347 count += TXD_USE_COUNT(len, max_txd_pwr);
3348
96838a40 3349 if (adapter->pcix_82544)
1da177e4
LT		 3350 count++;
3351
96838a40 3352 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 3353 * in PCI-X mode, so add one more descriptor to the count
3354 */
96838a40 3355 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 3356 (len > 2015)))
3357 count++;
3358
1da177e4 3359 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 3360 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 3361 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
3362 max_txd_pwr);
96838a40 3363 if (adapter->pcix_82544)
1da177e4
LT		 3364 count += nr_frags;
3365
0f15a8fa
JK		 3366
3367 if (adapter->hw.tx_pkt_filtering &&
3368 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 3369 e1000_transfer_dhcp_info(adapter, skb);
3370
f50393fe 3371 if (!spin_trylock_irqsave(&tx_ring->tx_lock, flags))
581d708e 3372 /* Collision - tell upper layer to requeue */
581d708e 3373 return NETDEV_TX_LOCKED;
1da177e4
LT		 3374
3375 /* need: count + 2 desc gap to keep tail from touching
3376 * head, otherwise try next time */
65c7973f 3377 if (unlikely(e1000_maybe_stop_tx(netdev, tx_ring, count + 2))) {
581d708e 3378 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3379 return NETDEV_TX_BUSY;
3380 }
3381
96838a40
JB		 3382 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
3383 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4 3384 netif_stop_queue(netdev);
1314bbf3 3385 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
581d708e 3386 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3387 return NETDEV_TX_BUSY;
3388 }
3389 }
3390
96838a40 3391 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 3392 tx_flags |= E1000_TX_FLAGS_VLAN;
3393 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
3394 }
3395
581d708e 3396 first = tx_ring->next_to_use;
96838a40 3397
581d708e 3398 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 3399 if (tso < 0) {
3400 dev_kfree_skb_any(skb);
581d708e 3401 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3402 return NETDEV_TX_OK;
3403 }
3404
fd803241
JK		 3405 if (likely(tso)) {
3406 tx_ring->last_tx_tso = 1;
1da177e4 3407 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 3408 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 3409 tx_flags |= E1000_TX_FLAGS_CSUM;
3410
2d7edb92 3411 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 3412 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 3413 * no longer assume, we must. */
60828236 3414 if (likely(skb->protocol == htons(ETH_P_IP)))
2d7edb92
MC		 3415 tx_flags |= E1000_TX_FLAGS_IPV4;
3416
581d708e
MC		 3417 e1000_tx_queue(adapter, tx_ring, tx_flags,
3418 e1000_tx_map(adapter, tx_ring, skb, first,
3419 max_per_txd, nr_frags, mss));
1da177e4
LT		 3420
3421 netdev->trans_start = jiffies;
3422
3423 /* Make sure there is space in the ring for the next send. */
65c7973f 3424 e1000_maybe_stop_tx(netdev, tx_ring, MAX_SKB_FRAGS + 2);
1da177e4 3425
581d708e 3426 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 3427 return NETDEV_TX_OK;
3428}
3429
3430/**
3431 * e1000_tx_timeout - Respond to a Tx Hang
3432 * @netdev: network interface device structure
3433 **/
3434
3435static void
3436e1000_tx_timeout(struct net_device *netdev)
3437{
60490fe0 3438 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 3439
3440 /* Do the reset outside of interrupt context */
87041639
JK		 3441 adapter->tx_timeout_count++;
3442 schedule_work(&adapter->reset_task);
1da177e4
LT		 3443}
3444
3445static void
65f27f38 3446e1000_reset_task(struct work_struct *work)
1da177e4 3447{
65f27f38
DH		 3448 struct e1000_adapter *adapter =
3449 container_of(work, struct e1000_adapter, reset_task);
1da177e4 3450
2db10a08 3451 e1000_reinit_locked(adapter);
1da177e4
LT		 3452}
3453
3454/**
3455 * e1000_get_stats - Get System Network Statistics
3456 * @netdev: network interface device structure
3457 *
3458 * Returns the address of the device statistics structure.
3459 * The statistics are actually updated from the timer callback.
3460 **/
3461
3462static struct net_device_stats *
3463e1000_get_stats(struct net_device *netdev)
3464{
60490fe0 3465 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3466
6b7660cd 3467 /* only return the current stats */
1da177e4
LT		 3468 return &adapter->net_stats;
3469}
3470
3471/**
3472 * e1000_change_mtu - Change the Maximum Transfer Unit
3473 * @netdev: network interface device structure
3474 * @new_mtu: new value for maximum frame size
3475 *
3476 * Returns 0 on success, negative on failure
3477 **/
3478
3479static int
3480e1000_change_mtu(struct net_device *netdev, int new_mtu)
3481{
60490fe0 3482 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3483 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 3484 uint16_t eeprom_data = 0;
1da177e4 3485
96838a40
JB		 3486 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
3487 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
3488 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 3489 return -EINVAL;
2d7edb92 3490 }
1da177e4 3491
997f5cbd
JK		 3492 /* Adapter-specific max frame size limits. */
3493 switch (adapter->hw.mac_type) {
9e2feace 3494 case e1000_undefined ... e1000_82542_rev2_1:
cd94dd0b 3495 case e1000_ich8lan:
997f5cbd
JK		 3496 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3497 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 3498 return -EINVAL;
2d7edb92 3499 }
997f5cbd 3500 break;
85b22eb6 3501 case e1000_82573:
249d71d6
BA		 3502 /* Jumbo Frames not supported if:
3503 * - this is not an 82573L device
3504 * - ASPM is enabled in any way (0x1A bits 3:2) */
85b22eb6
JK		 3505 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
3506 &eeprom_data);
249d71d6
BA		 3507 if ((adapter->hw.device_id != E1000_DEV_ID_82573L) ||
3508 (eeprom_data & EEPROM_WORD1A_ASPM_MASK)) {
85b22eb6
JK		 3509 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
3510 DPRINTK(PROBE, ERR,
3511 "Jumbo Frames not supported.\n");
3512 return -EINVAL;
3513 }
3514 break;
3515 }
249d71d6
BA		 3516 /* ERT will be enabled later to enable wire speed receives */
3517
85b22eb6 3518 /* fall through to get support */
997f5cbd
JK		 3519 case e1000_82571:
3520 case e1000_82572:
87041639 3521 case e1000_80003es2lan:
997f5cbd
JK		 3522#define MAX_STD_JUMBO_FRAME_SIZE 9234
3523 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3524 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3525 return -EINVAL;
3526 }
3527 break;
3528 default:
3529 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3530 break;
1da177e4
LT		 3531 }
3532
87f5032e 3533 /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
9e2feace
AK		 3534 * means we reserve 2 more, this pushes us to allocate from the next
3535 * larger slab size
3536 * i.e. RXBUFFER_2048 --> size-4096 slab */
3537
3538 if (max_frame <= E1000_RXBUFFER_256)
3539 adapter->rx_buffer_len = E1000_RXBUFFER_256;
3540 else if (max_frame <= E1000_RXBUFFER_512)
3541 adapter->rx_buffer_len = E1000_RXBUFFER_512;
3542 else if (max_frame <= E1000_RXBUFFER_1024)
3543 adapter->rx_buffer_len = E1000_RXBUFFER_1024;
3544 else if (max_frame <= E1000_RXBUFFER_2048)
3545 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3546 else if (max_frame <= E1000_RXBUFFER_4096)
3547 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3548 else if (max_frame <= E1000_RXBUFFER_8192)
3549 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3550 else if (max_frame <= E1000_RXBUFFER_16384)
3551 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3552
3553 /* adjust allocation if LPE protects us, and we aren't using SBP */
9e2feace
AK		 3554 if (!adapter->hw.tbi_compatibility_on &&
3555 ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
3556 (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
3557 adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
997f5cbd 3558
2d7edb92 3559 netdev->mtu = new_mtu;
83cd8279 3560 adapter->hw.max_frame_size = max_frame;
2d7edb92 3561
2db10a08
AK		 3562 if (netif_running(netdev))
3563 e1000_reinit_locked(adapter);
1da177e4 3564
1da177e4
LT		 3565 return 0;
3566}
3567
3568/**
3569 * e1000_update_stats - Update the board statistics counters
3570 * @adapter: board private structure
3571 **/
3572
3573void
3574e1000_update_stats(struct e1000_adapter *adapter)
3575{
3576 struct e1000_hw *hw = &adapter->hw;
282f33c9 3577 struct pci_dev *pdev = adapter->pdev;
1da177e4
LT		 3578 unsigned long flags;
3579 uint16_t phy_tmp;
3580
3581#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3582
282f33c9
LV		 3583 /*
3584 * Prevent stats update while adapter is being reset, or if the pci
3585 * connection is down.
3586 */
9026729b 3587 if (adapter->link_speed == 0)
282f33c9 3588 return;
81b1955e 3589 if (pci_channel_offline(pdev))
9026729b
AK		 3590 return;
3591
1da177e4
LT		 3592 spin_lock_irqsave(&adapter->stats_lock, flags);
3593
3594 /* these counters are modified from e1000_adjust_tbi_stats,
3595 * called from the interrupt context, so they must only
3596 * be written while holding adapter->stats_lock
3597 */
3598
3599 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3600 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3601 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3602 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3603 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3604 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3605 adapter->stats.roc += E1000_READ_REG(hw, ROC);
cd94dd0b
AK		 3606
3607 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3608 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3609 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3610 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3611 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3612 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3613 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
cd94dd0b 3614 }
1da177e4
LT		 3615
3616 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3617 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3618 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3619 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3620 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3621 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3622 adapter->stats.dc += E1000_READ_REG(hw, DC);
3623 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3624 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3625 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3626 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3627 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3628 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3629 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3630 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3631 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3632 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3633 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3634 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3635 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3636 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3637 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3638 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3639 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3640 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3641 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
cd94dd0b
AK		 3642
3643 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3644 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3645 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3646 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3647 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3648 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3649 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
cd94dd0b
AK		 3650 }
3651
1da177e4
LT		 3652 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3653 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3654
3655 /* used for adaptive IFS */
3656
3657 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3658 adapter->stats.tpt += hw->tx_packet_delta;
3659 hw->collision_delta = E1000_READ_REG(hw, COLC);
3660 adapter->stats.colc += hw->collision_delta;
3661
96838a40 3662 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3663 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3664 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3665 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3666 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3667 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3668 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3669 }
96838a40 3670 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3671 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3672 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
cd94dd0b
AK		 3673
3674 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 3675 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3676 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3677 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3678 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3679 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3680 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3681 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
cd94dd0b 3682 }
2d7edb92 3683 }
1da177e4
LT		 3684
3685 /* Fill out the OS statistics structure */
1da177e4
LT		 3686 adapter->net_stats.rx_packets = adapter->stats.gprc;
3687 adapter->net_stats.tx_packets = adapter->stats.gptc;
3688 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3689 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3690 adapter->net_stats.multicast = adapter->stats.mprc;
3691 adapter->net_stats.collisions = adapter->stats.colc;
3692
3693 /* Rx Errors */
3694
87041639
JK		 3695 /* RLEC on some newer hardware can be incorrect so build
3696 * our own version based on RUC and ROC */
1da177e4
LT		 3697 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3698 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3699 adapter->stats.ruc + adapter->stats.roc +
3700 adapter->stats.cexterr;
49559854
MW		 3701 adapter->stats.rlerrc = adapter->stats.ruc + adapter->stats.roc;
3702 adapter->net_stats.rx_length_errors = adapter->stats.rlerrc;
1da177e4
LT		 3703 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3704 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3705 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3706
3707 /* Tx Errors */
49559854
MW		 3708 adapter->stats.txerrc = adapter->stats.ecol + adapter->stats.latecol;
3709 adapter->net_stats.tx_errors = adapter->stats.txerrc;
1da177e4
LT		 3710 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3711 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3712 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
167fb284
JG		 3713 if (adapter->hw.bad_tx_carr_stats_fd &&
3714 adapter->link_duplex == FULL_DUPLEX) {
3715 adapter->net_stats.tx_carrier_errors = 0;
3716 adapter->stats.tncrs = 0;
3717 }
1da177e4
LT		 3718
3719 /* Tx Dropped needs to be maintained elsewhere */
3720
3721 /* Phy Stats */
96838a40
JB		 3722 if (hw->media_type == e1000_media_type_copper) {
3723 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3724 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3725 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3726 adapter->phy_stats.idle_errors += phy_tmp;
3727 }
3728
96838a40 3729 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3730 (hw->phy_type == e1000_phy_m88) &&
3731 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3732 adapter->phy_stats.receive_errors += phy_tmp;
3733 }
3734
15e376b4
JG		 3735 /* Management Stats */
3736 if (adapter->hw.has_smbus) {
3737 adapter->stats.mgptc += E1000_READ_REG(hw, MGTPTC);
3738 adapter->stats.mgprc += E1000_READ_REG(hw, MGTPRC);
3739 adapter->stats.mgpdc += E1000_READ_REG(hw, MGTPDC);
3740 }
3741
1da177e4
LT		 3742 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3743}
9ac98284
JB		 3744
3745/**
3746 * e1000_intr_msi - Interrupt Handler
3747 * @irq: interrupt number
3748 * @data: pointer to a network interface device structure
3749 **/
3750
b5fc8f0c
JB		 3751static irqreturn_t
3752e1000_intr_msi(int irq, void *data)
9ac98284
JB		 3753{
3754 struct net_device *netdev = data;
3755 struct e1000_adapter *adapter = netdev_priv(netdev);
3756 struct e1000_hw *hw = &adapter->hw;
3757#ifndef CONFIG_E1000_NAPI
3758 int i;
3759#endif
b5fc8f0c 3760 uint32_t icr = E1000_READ_REG(hw, ICR);
9ac98284 3761
9ac98284 3762#ifdef CONFIG_E1000_NAPI
b5fc8f0c
JB		 3763 /* read ICR disables interrupts using IAM, so keep up with our
3764 * enable/disable accounting */
3765 atomic_inc(&adapter->irq_sem);
9ac98284 3766#endif
b5fc8f0c
JB		 3767 if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
3768 hw->get_link_status = 1;
3769 /* 80003ES2LAN workaround-- For packet buffer work-around on
3770 * link down event; disable receives here in the ISR and reset
3771 * adapter in watchdog */
3772 if (netif_carrier_ok(netdev) &&
3773 (adapter->hw.mac_type == e1000_80003es2lan)) {
3774 /* disable receives */
3775 uint32_t rctl = E1000_READ_REG(hw, RCTL);
3776 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
9ac98284 3777 }
b5fc8f0c
JB		 3778 /* guard against interrupt when we're going down */
3779 if (!test_bit(__E1000_DOWN, &adapter->flags))
3780 mod_timer(&adapter->watchdog_timer, jiffies + 1);
9ac98284
JB		 3781 }
3782
3783#ifdef CONFIG_E1000_NAPI
bea3348e 3784 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
835bb129
JB		 3785 adapter->total_tx_bytes = 0;
3786 adapter->total_tx_packets = 0;
3787 adapter->total_rx_bytes = 0;
3788 adapter->total_rx_packets = 0;
bea3348e 3789 __netif_rx_schedule(netdev, &adapter->napi);
835bb129 3790 } else
9ac98284
JB		 3791 e1000_irq_enable(adapter);
3792#else
835bb129
JB		 3793 adapter->total_tx_bytes = 0;
3794 adapter->total_rx_bytes = 0;
3795 adapter->total_tx_packets = 0;
3796 adapter->total_rx_packets = 0;
3797
9ac98284
JB		 3798 for (i = 0; i < E1000_MAX_INTR; i++)
3799 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
46fcc86d 3800 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
9ac98284 3801 break;
835bb129
JB		 3802
3803 if (likely(adapter->itr_setting & 3))
3804 e1000_set_itr(adapter);
9ac98284
JB		 3805#endif
3806
3807 return IRQ_HANDLED;
3808}
1da177e4
LT		 3809
3810/**
3811 * e1000_intr - Interrupt Handler
3812 * @irq: interrupt number
3813 * @data: pointer to a network interface device structure
1da177e4
LT		 3814 **/
3815
3816static irqreturn_t
7d12e780 3817e1000_intr(int irq, void *data)
1da177e4
LT		 3818{
3819 struct net_device *netdev = data;
60490fe0 3820 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3821 struct e1000_hw *hw = &adapter->hw;
87041639 3822 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3823#ifndef CONFIG_E1000_NAPI
581d708e 3824 int i;
835bb129
JB		 3825#endif
3826 if (unlikely(!icr))
3827 return IRQ_NONE; /* Not our interrupt */
3828
3829#ifdef CONFIG_E1000_NAPI
3830 /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
3831 * not set, then the adapter didn't send an interrupt */
3832 if (unlikely(hw->mac_type >= e1000_82571 &&
3833 !(icr & E1000_ICR_INT_ASSERTED)))
3834 return IRQ_NONE;
3835
1e613fd9
JK		 3836 /* Interrupt Auto-Mask...upon reading ICR,
3837 * interrupts are masked. No need for the
3838 * IMC write, but it does mean we should
3839 * account for it ASAP. */
3840 if (likely(hw->mac_type >= e1000_82571))
3841 atomic_inc(&adapter->irq_sem);
be2b28ed 3842#endif
1da177e4 3843
96838a40 3844 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3845 hw->get_link_status = 1;
87041639
JK		 3846 /* 80003ES2LAN workaround--
3847 * For packet buffer work-around on link down event;
3848 * disable receives here in the ISR and
3849 * reset adapter in watchdog
3850 */
3851 if (netif_carrier_ok(netdev) &&
3852 (adapter->hw.mac_type == e1000_80003es2lan)) {
3853 /* disable receives */
3854 rctl = E1000_READ_REG(hw, RCTL);
3855 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3856 }
1314bbf3
AK		 3857 /* guard against interrupt when we're going down */
3858 if (!test_bit(__E1000_DOWN, &adapter->flags))
3859 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1da177e4
LT		 3860 }
3861
3862#ifdef CONFIG_E1000_NAPI
1e613fd9 3863 if (unlikely(hw->mac_type < e1000_82571)) {
835bb129 3864 /* disable interrupts, without the synchronize_irq bit */
1e613fd9
JK		 3865 atomic_inc(&adapter->irq_sem);
3866 E1000_WRITE_REG(hw, IMC, ~0);
3867 E1000_WRITE_FLUSH(hw);
3868 }
bea3348e 3869 if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
835bb129
JB		 3870 adapter->total_tx_bytes = 0;
3871 adapter->total_tx_packets = 0;
3872 adapter->total_rx_bytes = 0;
3873 adapter->total_rx_packets = 0;
bea3348e 3874 __netif_rx_schedule(netdev, &adapter->napi);
835bb129 3875 } else
90fb5135
AK		 3876 /* this really should not happen! if it does it is basically a
3877 * bug, but not a hard error, so enable ints and continue */
581d708e 3878 e1000_irq_enable(adapter);
c1605eb3 3879#else
1da177e4 3880 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3881 * Due to Hub Link bus being occupied, an interrupt
3882 * de-assertion message is not able to be sent.
3883 * When an interrupt assertion message is generated later,
3884 * two messages are re-ordered and sent out.
3885 * That causes APIC to think 82547 is in de-assertion
3886 * state, while 82547 is in assertion state, resulting
3887 * in dead lock. Writing IMC forces 82547 into
3888 * de-assertion state.
3889 */
3890 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3891 atomic_inc(&adapter->irq_sem);
2648345f 3892 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3893 }
3894
835bb129
JB		 3895 adapter->total_tx_bytes = 0;
3896 adapter->total_rx_bytes = 0;
3897 adapter->total_tx_packets = 0;
3898 adapter->total_rx_packets = 0;
3899
96838a40
JB		 3900 for (i = 0; i < E1000_MAX_INTR; i++)
3901 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
46fcc86d 3902 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3903 break;
3904
835bb129
JB		 3905 if (likely(adapter->itr_setting & 3))
3906 e1000_set_itr(adapter);
3907
96838a40 3908 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3909 e1000_irq_enable(adapter);
581d708e 3910
c1605eb3 3911#endif
1da177e4
LT		 3912 return IRQ_HANDLED;
3913}
3914
3915#ifdef CONFIG_E1000_NAPI
3916/**
3917 * e1000_clean - NAPI Rx polling callback
3918 * @adapter: board private structure
3919 **/
3920
3921static int
bea3348e 3922e1000_clean(struct napi_struct *napi, int budget)
1da177e4 3923{
bea3348e
SH		 3924 struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter, napi);
3925 struct net_device *poll_dev = adapter->netdev;
d3d9e484 3926 int tx_cleaned = 0, work_done = 0;
581d708e
MC		 3927
3928 /* Must NOT use netdev_priv macro here. */
3929 adapter = poll_dev->priv;
3930
3931 /* Keep link state information with original netdev */
d3d9e484 3932 if (!netif_carrier_ok(poll_dev))
581d708e 3933 goto quit_polling;
2648345f 3934
d3d9e484
AK		 3935 /* e1000_clean is called per-cpu. This lock protects
3936 * tx_ring[0] from being cleaned by multiple cpus
3937 * simultaneously. A failure obtaining the lock means
3938 * tx_ring[0] is currently being cleaned anyway. */
3939 if (spin_trylock(&adapter->tx_queue_lock)) {
3940 tx_cleaned = e1000_clean_tx_irq(adapter,
3941 &adapter->tx_ring[0]);
3942 spin_unlock(&adapter->tx_queue_lock);
581d708e
MC		 3943 }
3944
d3d9e484 3945 adapter->clean_rx(adapter, &adapter->rx_ring[0],
bea3348e 3946 &work_done, budget);
96838a40 3947
2b02893e 3948 /* If no Tx and not enough Rx work done, exit the polling mode */
bea3348e 3949 if ((!tx_cleaned && (work_done < budget)) ||
d3d9e484 3950 !netif_running(poll_dev)) {
581d708e 3951quit_polling:
835bb129
JB		 3952 if (likely(adapter->itr_setting & 3))
3953 e1000_set_itr(adapter);
bea3348e 3954 netif_rx_complete(poll_dev, napi);
1da177e4 3955 e1000_irq_enable(adapter);
1da177e4
LT		 3956 }
3957
bea3348e 3958 return work_done;
1da177e4
LT		 3959}
3960
3961#endif
3962/**
3963 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3964 * @adapter: board private structure
3965 **/
3966
3967static boolean_t
581d708e
MC		 3968e1000_clean_tx_irq(struct e1000_adapter *adapter,
3969 struct e1000_tx_ring *tx_ring)
1da177e4 3970{
1da177e4
LT		 3971 struct net_device *netdev = adapter->netdev;
3972 struct e1000_tx_desc *tx_desc, *eop_desc;
3973 struct e1000_buffer *buffer_info;
3974 unsigned int i, eop;
2a1af5d7
JK		 3975#ifdef CONFIG_E1000_NAPI
3976 unsigned int count = 0;
3977#endif
46fcc86d 3978 boolean_t cleaned = FALSE;
835bb129 3979 unsigned int total_tx_bytes=0, total_tx_packets=0;
1da177e4
LT		 3980
3981 i = tx_ring->next_to_clean;
3982 eop = tx_ring->buffer_info[i].next_to_watch;
3983 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3984
581d708e 3985 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3986 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3987 tx_desc = E1000_TX_DESC(*tx_ring, i);
3988 buffer_info = &tx_ring->buffer_info[i];
3989 cleaned = (i == eop);
3990
835bb129 3991 if (cleaned) {
2b65326e 3992 struct sk_buff *skb = buffer_info->skb;
7753b171
JB		 3993 unsigned int segs, bytecount;
3994 segs = skb_shinfo(skb)->gso_segs ?: 1;
3995 /* multiply data chunks by size of headers */
3996 bytecount = ((segs - 1) * skb_headlen(skb)) +
3997 skb->len;
2b65326e 3998 total_tx_packets += segs;
7753b171 3999 total_tx_bytes += bytecount;
835bb129 4000 }
fd803241 4001 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
a9ebadd6 4002 tx_desc->upper.data = 0;
1da177e4 4003
96838a40 4004 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 4005 }
581d708e 4006
1da177e4
LT		 4007 eop = tx_ring->buffer_info[i].next_to_watch;
4008 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 4009#ifdef CONFIG_E1000_NAPI
4010#define E1000_TX_WEIGHT 64
4011 /* weight of a sort for tx, to avoid endless transmit cleanup */
46fcc86d 4012 if (count++ == E1000_TX_WEIGHT) break;
2a1af5d7 4013#endif
1da177e4
LT		 4014 }
4015
4016 tx_ring->next_to_clean = i;
4017
77b2aad5 4018#define TX_WAKE_THRESHOLD 32
65c7973f
JB		 4019 if (unlikely(cleaned && netif_carrier_ok(netdev) &&
4020 E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD)) {
4021 /* Make sure that anybody stopping the queue after this
4022 * sees the new next_to_clean.
4023 */
4024 smp_mb();
fcfb1224 4025 if (netif_queue_stopped(netdev)) {
77b2aad5 4026 netif_wake_queue(netdev);
fcfb1224
JB		 4027 ++adapter->restart_queue;
4028 }
77b2aad5 4029 }
2648345f 4030
581d708e 4031 if (adapter->detect_tx_hung) {
2648345f 4032 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 4033 * check with the clearing of time_stamp and movement of i */
4034 adapter->detect_tx_hung = FALSE;
392137fa
JK		 4035 if (tx_ring->buffer_info[eop].dma &&
4036 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 4037 (adapter->tx_timeout_factor * HZ))
70b8f1e1 4038 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 4039 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 4040
4041 /* detected Tx unit hang */
c6963ef5 4042 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 4043 " Tx Queue <%lu>\n"
70b8f1e1
MC		 4044 " TDH <%x>\n"
4045 " TDT <%x>\n"
4046 " next_to_use <%x>\n"
4047 " next_to_clean <%x>\n"
4048 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 4049 " time_stamp <%lx>\n"
4050 " next_to_watch <%x>\n"
4051 " jiffies <%lx>\n"
4052 " next_to_watch.status <%x>\n",
7bfa4816
JK		 4053 (unsigned long)((tx_ring - adapter->tx_ring) /
4054 sizeof(struct e1000_tx_ring)),
581d708e
MC		 4055 readl(adapter->hw.hw_addr + tx_ring->tdh),
4056 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 4057 tx_ring->next_to_use,
392137fa
JK		 4058 tx_ring->next_to_clean,
4059 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 4060 eop,
4061 jiffies,
4062 eop_desc->upper.fields.status);
1da177e4 4063 netif_stop_queue(netdev);
70b8f1e1 4064 }
1da177e4 4065 }
835bb129
JB		 4066 adapter->total_tx_bytes += total_tx_bytes;
4067 adapter->total_tx_packets += total_tx_packets;
1da177e4
LT		 4068 return cleaned;
4069}
4070
4071/**
4072 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 4073 * @adapter: board private structure
4074 * @status_err: receive descriptor status and error fields
4075 * @csum: receive descriptor csum field
4076 * @sk_buff: socket buffer with received data
1da177e4
LT		 4077 **/
4078
e619d523 4079static void
1da177e4 4080e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 4081 uint32_t status_err, uint32_t csum,
4082 struct sk_buff *skb)
1da177e4 4083{
2d7edb92
MC		 4084 uint16_t status = (uint16_t)status_err;
4085 uint8_t errors = (uint8_t)(status_err >> 24);
4086 skb->ip_summed = CHECKSUM_NONE;
4087
1da177e4 4088 /* 82543 or newer only */
96838a40 4089 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 4090 /* Ignore Checksum bit is set */
96838a40 4091 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 4092 /* TCP/UDP checksum error bit is set */
96838a40 4093 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 4094 /* let the stack verify checksum errors */
1da177e4 4095 adapter->hw_csum_err++;
2d7edb92
MC		 4096 return;
4097 }
4098 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 4099 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
4100 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 4101 return;
1da177e4 4102 } else {
96838a40 4103 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 4104 return;
4105 }
4106 /* It must be a TCP or UDP packet with a valid checksum */
4107 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 4108 /* TCP checksum is good */
4109 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 4110 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
4111 /* IP fragment with UDP payload */
4112 /* Hardware complements the payload checksum, so we undo it
4113 * and then put the value in host order for further stack use.
4114 */
4115 csum = ntohl(csum ^ 0xFFFF);
4116 skb->csum = csum;
84fa7933 4117 skb->ip_summed = CHECKSUM_COMPLETE;
1da177e4 4118 }
2d7edb92 4119 adapter->hw_csum_good++;
1da177e4
LT		 4120}
4121
4122/**
2d7edb92 4123 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 4124 * @adapter: board private structure
4125 **/
4126
4127static boolean_t
4128#ifdef CONFIG_E1000_NAPI
581d708e
MC		 4129e1000_clean_rx_irq(struct e1000_adapter *adapter,
4130 struct e1000_rx_ring *rx_ring,
4131 int *work_done, int work_to_do)
1da177e4 4132#else
581d708e
MC		 4133e1000_clean_rx_irq(struct e1000_adapter *adapter,
4134 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 4135#endif
4136{
1da177e4
LT		 4137 struct net_device *netdev = adapter->netdev;
4138 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 4139 struct e1000_rx_desc *rx_desc, *next_rxd;
4140 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 4141 unsigned long flags;
4142 uint32_t length;
4143 uint8_t last_byte;
4144 unsigned int i;
72d64a43 4145 int cleaned_count = 0;
a1415ee6 4146 boolean_t cleaned = FALSE;
835bb129 4147 unsigned int total_rx_bytes=0, total_rx_packets=0;
1da177e4
LT		 4148
4149 i = rx_ring->next_to_clean;
4150 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 4151 buffer_info = &rx_ring->buffer_info[i];
1da177e4 4152
b92ff8ee 4153 while (rx_desc->status & E1000_RXD_STAT_DD) {
24f476ee 4154 struct sk_buff *skb;
a292ca6e 4155 u8 status;
90fb5135 4156
1da177e4 4157#ifdef CONFIG_E1000_NAPI
96838a40 4158 if (*work_done >= work_to_do)
1da177e4
LT		 4159 break;
4160 (*work_done)++;
4161#endif
a292ca6e 4162 status = rx_desc->status;
b92ff8ee 4163 skb = buffer_info->skb;
86c3d59f
JB		 4164 buffer_info->skb = NULL;
4165
30320be8
JK		 4166 prefetch(skb->data - NET_IP_ALIGN);
4167
86c3d59f
JB		 4168 if (++i == rx_ring->count) i = 0;
4169 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 4170 prefetch(next_rxd);
4171
86c3d59f 4172 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4173
72d64a43
JK		 4174 cleaned = TRUE;
4175 cleaned_count++;
a292ca6e
JK		 4176 pci_unmap_single(pdev,
4177 buffer_info->dma,
4178 buffer_info->length,
1da177e4
LT		 4179 PCI_DMA_FROMDEVICE);
4180
1da177e4
LT		 4181 length = le16_to_cpu(rx_desc->length);
4182
a1415ee6
JK		 4183 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
4184 /* All receives must fit into a single buffer */
4185 E1000_DBG("%s: Receive packet consumed multiple"
4186 " buffers\n", netdev->name);
864c4e45 4187 /* recycle */
8fc897b0 4188 buffer_info->skb = skb;
1da177e4
LT		 4189 goto next_desc;
4190 }
4191
96838a40 4192 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 4193 last_byte = *(skb->data + length - 1);
b92ff8ee 4194 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 4195 rx_desc->errors, length, last_byte)) {
4196 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 4197 e1000_tbi_adjust_stats(&adapter->hw,
4198 &adapter->stats,
1da177e4
LT		 4199 length, skb->data);
4200 spin_unlock_irqrestore(&adapter->stats_lock,
4201 flags);
4202 length--;
4203 } else {
9e2feace
AK		 4204 /* recycle */
4205 buffer_info->skb = skb;
1da177e4
LT		 4206 goto next_desc;
4207 }
1cb5821f 4208 }
1da177e4 4209
d2a1e213
JB		 4210 /* adjust length to remove Ethernet CRC, this must be
4211 * done after the TBI_ACCEPT workaround above */
4212 length -= 4;
4213
835bb129
JB		 4214 /* probably a little skewed due to removing CRC */
4215 total_rx_bytes += length;
4216 total_rx_packets++;
4217
a292ca6e
JK		 4218 /* code added for copybreak, this should improve
4219 * performance for small packets with large amounts
4220 * of reassembly being done in the stack */
1f753861 4221 if (length < copybreak) {
a292ca6e 4222 struct sk_buff *new_skb =
87f5032e 4223 netdev_alloc_skb(netdev, length + NET_IP_ALIGN);
a292ca6e
JK		 4224 if (new_skb) {
4225 skb_reserve(new_skb, NET_IP_ALIGN);
27d7ff46
ACM		 4226 skb_copy_to_linear_data_offset(new_skb,
4227 -NET_IP_ALIGN,
4228 (skb->data -
4229 NET_IP_ALIGN),
4230 (length +
4231 NET_IP_ALIGN));
a292ca6e
JK		 4232 /* save the skb in buffer_info as good */
4233 buffer_info->skb = skb;
4234 skb = new_skb;
a292ca6e 4235 }
996695de
AK		 4236 /* else just continue with the old one */
4237 }
a292ca6e 4238 /* end copybreak code */
996695de 4239 skb_put(skb, length);
1da177e4
LT		 4240
4241 /* Receive Checksum Offload */
a292ca6e
JK		 4242 e1000_rx_checksum(adapter,
4243 (uint32_t)(status) |
2d7edb92 4244 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 4245 le16_to_cpu(rx_desc->csum), skb);
96838a40 4246
1da177e4
LT		 4247 skb->protocol = eth_type_trans(skb, netdev);
4248#ifdef CONFIG_E1000_NAPI
96838a40 4249 if (unlikely(adapter->vlgrp &&
a292ca6e 4250 (status & E1000_RXD_STAT_VP))) {
1da177e4 4251 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 4252 le16_to_cpu(rx_desc->special) &
4253 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 4254 } else {
4255 netif_receive_skb(skb);
4256 }
4257#else /* CONFIG_E1000_NAPI */
96838a40 4258 if (unlikely(adapter->vlgrp &&
b92ff8ee 4259 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 4260 vlan_hwaccel_rx(skb, adapter->vlgrp,
4261 le16_to_cpu(rx_desc->special) &
4262 E1000_RXD_SPC_VLAN_MASK);
4263 } else {
4264 netif_rx(skb);
4265 }
4266#endif /* CONFIG_E1000_NAPI */
4267 netdev->last_rx = jiffies;
4268
4269next_desc:
4270 rx_desc->status = 0;
1da177e4 4271
72d64a43
JK		 4272 /* return some buffers to hardware, one at a time is too slow */
4273 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4274 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4275 cleaned_count = 0;
4276 }
4277
30320be8 4278 /* use prefetched values */
86c3d59f
JB		 4279 rx_desc = next_rxd;
4280 buffer_info = next_buffer;
1da177e4 4281 }
1da177e4 4282 rx_ring->next_to_clean = i;
72d64a43
JK		 4283
4284 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4285 if (cleaned_count)
4286 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92 4287
835bb129
JB		 4288 adapter->total_rx_packets += total_rx_packets;
4289 adapter->total_rx_bytes += total_rx_bytes;
2d7edb92
MC		 4290 return cleaned;
4291}
4292
4293/**
4294 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
4295 * @adapter: board private structure
4296 **/
4297
4298static boolean_t
4299#ifdef CONFIG_E1000_NAPI
581d708e
MC		 4300e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4301 struct e1000_rx_ring *rx_ring,
4302 int *work_done, int work_to_do)
2d7edb92 4303#else
581d708e
MC		 4304e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
4305 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 4306#endif
4307{
86c3d59f 4308 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 4309 struct net_device *netdev = adapter->netdev;
4310 struct pci_dev *pdev = adapter->pdev;
86c3d59f 4311 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 4312 struct e1000_ps_page *ps_page;
4313 struct e1000_ps_page_dma *ps_page_dma;
24f476ee 4314 struct sk_buff *skb;
2d7edb92
MC		 4315 unsigned int i, j;
4316 uint32_t length, staterr;
72d64a43 4317 int cleaned_count = 0;
2d7edb92 4318 boolean_t cleaned = FALSE;
835bb129 4319 unsigned int total_rx_bytes=0, total_rx_packets=0;
2d7edb92
MC		 4320
4321 i = rx_ring->next_to_clean;
4322 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 4323 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
9e2feace 4324 buffer_info = &rx_ring->buffer_info[i];
2d7edb92 4325
96838a40 4326 while (staterr & E1000_RXD_STAT_DD) {
2d7edb92
MC		 4327 ps_page = &rx_ring->ps_page[i];
4328 ps_page_dma = &rx_ring->ps_page_dma[i];
4329#ifdef CONFIG_E1000_NAPI
96838a40 4330 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 4331 break;
4332 (*work_done)++;
4333#endif
86c3d59f
JB		 4334 skb = buffer_info->skb;
4335
30320be8
JK		 4336 /* in the packet split case this is header only */
4337 prefetch(skb->data - NET_IP_ALIGN);
4338
86c3d59f
JB		 4339 if (++i == rx_ring->count) i = 0;
4340 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 4341 prefetch(next_rxd);
4342
86c3d59f 4343 next_buffer = &rx_ring->buffer_info[i];
86c3d59f 4344
2d7edb92 4345 cleaned = TRUE;
72d64a43 4346 cleaned_count++;
2d7edb92
MC		 4347 pci_unmap_single(pdev, buffer_info->dma,
4348 buffer_info->length,
4349 PCI_DMA_FROMDEVICE);
4350
96838a40 4351 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 4352 E1000_DBG("%s: Packet Split buffers didn't pick up"
4353 " the full packet\n", netdev->name);
4354 dev_kfree_skb_irq(skb);
4355 goto next_desc;
4356 }
1da177e4 4357
96838a40 4358 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 4359 dev_kfree_skb_irq(skb);
4360 goto next_desc;
4361 }
4362
4363 length = le16_to_cpu(rx_desc->wb.middle.length0);
4364
96838a40 4365 if (unlikely(!length)) {
2d7edb92
MC		 4366 E1000_DBG("%s: Last part of the packet spanning"
4367 " multiple descriptors\n", netdev->name);
4368 dev_kfree_skb_irq(skb);
4369 goto next_desc;
4370 }
4371
4372 /* Good Receive */
4373 skb_put(skb, length);
4374
dc7c6add
JK		 4375 {
4376 /* this looks ugly, but it seems compiler issues make it
4377 more efficient than reusing j */
4378 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
4379
4380 /* page alloc/put takes too long and effects small packet
4381 * throughput, so unsplit small packets and save the alloc/put*/
1f753861 4382 if (l1 && (l1 <= copybreak) && ((length + l1) <= adapter->rx_ps_bsize0)) {
dc7c6add 4383 u8 *vaddr;
76c224bc 4384 /* there is no documentation about how to call
dc7c6add
JK		 4385 * kmap_atomic, so we can't hold the mapping
4386 * very long */
4387 pci_dma_sync_single_for_cpu(pdev,
4388 ps_page_dma->ps_page_dma[0],
4389 PAGE_SIZE,
4390 PCI_DMA_FROMDEVICE);
4391 vaddr = kmap_atomic(ps_page->ps_page[0],
4392 KM_SKB_DATA_SOFTIRQ);
27a884dc 4393 memcpy(skb_tail_pointer(skb), vaddr, l1);
dc7c6add
JK		 4394 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
4395 pci_dma_sync_single_for_device(pdev,
4396 ps_page_dma->ps_page_dma[0],
4397 PAGE_SIZE, PCI_DMA_FROMDEVICE);
f235a2ab
AK		 4398 /* remove the CRC */
4399 l1 -= 4;
dc7c6add 4400 skb_put(skb, l1);
dc7c6add
JK		 4401 goto copydone;
4402 } /* if */
4403 }
90fb5135 4404
96838a40 4405 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 4406 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 4407 break;
2d7edb92
MC		 4408 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
4409 PAGE_SIZE, PCI_DMA_FROMDEVICE);
4410 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 4411 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
4412 length);
2d7edb92 4413 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 4414 skb->len += length;
4415 skb->data_len += length;
5d51b80f 4416 skb->truesize += length;
2d7edb92
MC		 4417 }
4418
f235a2ab
AK		 4419 /* strip the ethernet crc, problem is we're using pages now so
4420 * this whole operation can get a little cpu intensive */
4421 pskb_trim(skb, skb->len - 4);
4422
dc7c6add 4423copydone:
835bb129
JB		 4424 total_rx_bytes += skb->len;
4425 total_rx_packets++;
4426
2d7edb92 4427 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 4428 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 4429 skb->protocol = eth_type_trans(skb, netdev);
4430
96838a40 4431 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 4432 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 4433 adapter->rx_hdr_split++;
2d7edb92 4434#ifdef CONFIG_E1000_NAPI
96838a40 4435 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4436 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 4437 le16_to_cpu(rx_desc->wb.middle.vlan) &
4438 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4439 } else {
4440 netif_receive_skb(skb);
4441 }
4442#else /* CONFIG_E1000_NAPI */
96838a40 4443 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 4444 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 4445 le16_to_cpu(rx_desc->wb.middle.vlan) &
4446 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 4447 } else {
4448 netif_rx(skb);
4449 }
4450#endif /* CONFIG_E1000_NAPI */
4451 netdev->last_rx = jiffies;
4452
4453next_desc:
c3d7a3a4 4454 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 4455 buffer_info->skb = NULL;
2d7edb92 4456
72d64a43
JK		 4457 /* return some buffers to hardware, one at a time is too slow */
4458 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
4459 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
4460 cleaned_count = 0;
4461 }
4462
30320be8 4463 /* use prefetched values */
86c3d59f
JB		 4464 rx_desc = next_rxd;
4465 buffer_info = next_buffer;
4466
683a38f3 4467 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 4468 }
4469 rx_ring->next_to_clean = i;
72d64a43
JK		 4470
4471 cleaned_count = E1000_DESC_UNUSED(rx_ring);
4472 if (cleaned_count)
4473 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4 4474
835bb129
JB		 4475 adapter->total_rx_packets += total_rx_packets;
4476 adapter->total_rx_bytes += total_rx_bytes;
1da177e4
LT		 4477 return cleaned;
4478}
4479
4480/**
2d7edb92 4481 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 4482 * @adapter: address of board private structure
4483 **/
4484
4485static void
581d708e 4486e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 4487 struct e1000_rx_ring *rx_ring,
a292ca6e 4488 int cleaned_count)
1da177e4 4489{
1da177e4
LT		 4490 struct net_device *netdev = adapter->netdev;
4491 struct pci_dev *pdev = adapter->pdev;
4492 struct e1000_rx_desc *rx_desc;
4493 struct e1000_buffer *buffer_info;
4494 struct sk_buff *skb;
2648345f
MC		 4495 unsigned int i;
4496 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 4497
4498 i = rx_ring->next_to_use;
4499 buffer_info = &rx_ring->buffer_info[i];
4500
a292ca6e 4501 while (cleaned_count--) {
ca6f7224
CH		 4502 skb = buffer_info->skb;
4503 if (skb) {
a292ca6e
JK		 4504 skb_trim(skb, 0);
4505 goto map_skb;
4506 }
4507
ca6f7224 4508 skb = netdev_alloc_skb(netdev, bufsz);
96838a40 4509 if (unlikely(!skb)) {
1da177e4 4510 /* Better luck next round */
72d64a43 4511 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 4512 break;
4513 }
4514
2648345f 4515 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 4516 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4517 struct sk_buff *oldskb = skb;
2648345f
MC		 4518 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
4519 "at %p\n", bufsz, skb->data);
4520 /* Try again, without freeing the previous */
87f5032e 4521 skb = netdev_alloc_skb(netdev, bufsz);
2648345f 4522 /* Failed allocation, critical failure */
1da177e4
LT		 4523 if (!skb) {
4524 dev_kfree_skb(oldskb);
4525 break;
4526 }
2648345f 4527
1da177e4
LT		 4528 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
4529 /* give up */
4530 dev_kfree_skb(skb);
4531 dev_kfree_skb(oldskb);
4532 break; /* while !buffer_info->skb */
1da177e4 4533 }
ca6f7224
CH		 4534
4535 /* Use new allocation */
4536 dev_kfree_skb(oldskb);
1da177e4 4537 }
1da177e4
LT		 4538 /* Make buffer alignment 2 beyond a 16 byte boundary
4539 * this will result in a 16 byte aligned IP header after
4540 * the 14 byte MAC header is removed
4541 */
4542 skb_reserve(skb, NET_IP_ALIGN);
4543
1da177e4
LT		 4544 buffer_info->skb = skb;
4545 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 4546map_skb:
1da177e4
LT		 4547 buffer_info->dma = pci_map_single(pdev,
4548 skb->data,
4549 adapter->rx_buffer_len,
4550 PCI_DMA_FROMDEVICE);
4551
2648345f
MC		 4552 /* Fix for errata 23, can't cross 64kB boundary */
4553 if (!e1000_check_64k_bound(adapter,
4554 (void *)(unsigned long)buffer_info->dma,
4555 adapter->rx_buffer_len)) {
4556 DPRINTK(RX_ERR, ERR,
4557 "dma align check failed: %u bytes at %p\n",
4558 adapter->rx_buffer_len,
4559 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 4560 dev_kfree_skb(skb);
4561 buffer_info->skb = NULL;
4562
2648345f 4563 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 4564 adapter->rx_buffer_len,
4565 PCI_DMA_FROMDEVICE);
4566
4567 break; /* while !buffer_info->skb */
4568 }
1da177e4
LT		 4569 rx_desc = E1000_RX_DESC(*rx_ring, i);
4570 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
4571
96838a40
JB		 4572 if (unlikely(++i == rx_ring->count))
4573 i = 0;
1da177e4
LT		 4574 buffer_info = &rx_ring->buffer_info[i];
4575 }
4576
b92ff8ee
JB		 4577 if (likely(rx_ring->next_to_use != i)) {
4578 rx_ring->next_to_use = i;
4579 if (unlikely(i-- == 0))
4580 i = (rx_ring->count - 1);
4581
4582 /* Force memory writes to complete before letting h/w
4583 * know there are new descriptors to fetch. (Only
4584 * applicable for weak-ordered memory model archs,
4585 * such as IA-64). */
4586 wmb();
4587 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
4588 }
1da177e4
LT		 4589}
4590
2d7edb92
MC		 4591/**
4592 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
4593 * @adapter: address of board private structure
4594 **/
4595
4596static void
581d708e 4597e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 4598 struct e1000_rx_ring *rx_ring,
4599 int cleaned_count)
2d7edb92 4600{
2d7edb92
MC		 4601 struct net_device *netdev = adapter->netdev;
4602 struct pci_dev *pdev = adapter->pdev;
4603 union e1000_rx_desc_packet_split *rx_desc;
4604 struct e1000_buffer *buffer_info;
4605 struct e1000_ps_page *ps_page;
4606 struct e1000_ps_page_dma *ps_page_dma;
4607 struct sk_buff *skb;
4608 unsigned int i, j;
4609
4610 i = rx_ring->next_to_use;
4611 buffer_info = &rx_ring->buffer_info[i];
4612 ps_page = &rx_ring->ps_page[i];
4613 ps_page_dma = &rx_ring->ps_page_dma[i];
4614
72d64a43 4615 while (cleaned_count--) {
2d7edb92
MC		 4616 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
4617
96838a40 4618 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 4619 if (j < adapter->rx_ps_pages) {
4620 if (likely(!ps_page->ps_page[j])) {
4621 ps_page->ps_page[j] =
4622 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 4623 if (unlikely(!ps_page->ps_page[j])) {
4624 adapter->alloc_rx_buff_failed++;
e4c811c9 4625 goto no_buffers;
b92ff8ee 4626 }
e4c811c9
MC		 4627 ps_page_dma->ps_page_dma[j] =
4628 pci_map_page(pdev,
4629 ps_page->ps_page[j],
4630 0, PAGE_SIZE,
4631 PCI_DMA_FROMDEVICE);
4632 }
4633 /* Refresh the desc even if buffer_addrs didn't
96838a40 4634 * change because each write-back erases
e4c811c9
MC		 4635 * this info.
4636 */
4637 rx_desc->read.buffer_addr[j+1] =
4638 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
4639 } else
4640 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 4641 }
4642
87f5032e 4643 skb = netdev_alloc_skb(netdev,
90fb5135 4644 adapter->rx_ps_bsize0 + NET_IP_ALIGN);
2d7edb92 4645
b92ff8ee
JB		 4646 if (unlikely(!skb)) {
4647 adapter->alloc_rx_buff_failed++;
2d7edb92 4648 break;
b92ff8ee 4649 }
2d7edb92
MC		 4650
4651 /* Make buffer alignment 2 beyond a 16 byte boundary
4652 * this will result in a 16 byte aligned IP header after
4653 * the 14 byte MAC header is removed
4654 */
4655 skb_reserve(skb, NET_IP_ALIGN);
4656
2d7edb92
MC		 4657 buffer_info->skb = skb;
4658 buffer_info->length = adapter->rx_ps_bsize0;
4659 buffer_info->dma = pci_map_single(pdev, skb->data,
4660 adapter->rx_ps_bsize0,
4661 PCI_DMA_FROMDEVICE);
4662
4663 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4664
96838a40 4665 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4666 buffer_info = &rx_ring->buffer_info[i];
4667 ps_page = &rx_ring->ps_page[i];
4668 ps_page_dma = &rx_ring->ps_page_dma[i];
4669 }
4670
4671no_buffers:
b92ff8ee
JB		 4672 if (likely(rx_ring->next_to_use != i)) {
4673 rx_ring->next_to_use = i;
4674 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4675
4676 /* Force memory writes to complete before letting h/w
4677 * know there are new descriptors to fetch. (Only
4678 * applicable for weak-ordered memory model archs,
4679 * such as IA-64). */
4680 wmb();
4681 /* Hardware increments by 16 bytes, but packet split
4682 * descriptors are 32 bytes...so we increment tail
4683 * twice as much.
4684 */
4685 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4686 }
2d7edb92
MC		 4687}
4688
1da177e4
LT		 4689/**
4690 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4691 * @adapter:
4692 **/
4693
4694static void
4695e1000_smartspeed(struct e1000_adapter *adapter)
4696{
4697 uint16_t phy_status;
4698 uint16_t phy_ctrl;
4699
96838a40 4700 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4701 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4702 return;
4703
96838a40 4704 if (adapter->smartspeed == 0) {
1da177e4
LT		 4705 /* If Master/Slave config fault is asserted twice,
4706 * we assume back-to-back */
4707 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4708 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4709 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4710 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4711 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4712 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4713 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4714 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4715 phy_ctrl);
4716 adapter->smartspeed++;
96838a40 4717 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4718 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4719 &phy_ctrl)) {
4720 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4721 MII_CR_RESTART_AUTO_NEG);
4722 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4723 phy_ctrl);
4724 }
4725 }
4726 return;
96838a40 4727 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4728 /* If still no link, perhaps using 2/3 pair cable */
4729 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4730 phy_ctrl |= CR_1000T_MS_ENABLE;
4731 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4732 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4733 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4734 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4735 MII_CR_RESTART_AUTO_NEG);
4736 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4737 }
4738 }
4739 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4740 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4741 adapter->smartspeed = 0;
4742}
4743
4744/**
4745 * e1000_ioctl -
4746 * @netdev:
4747 * @ifreq:
4748 * @cmd:
4749 **/
4750
4751static int
4752e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4753{
4754 switch (cmd) {
4755 case SIOCGMIIPHY:
4756 case SIOCGMIIREG:
4757 case SIOCSMIIREG:
4758 return e1000_mii_ioctl(netdev, ifr, cmd);
4759 default:
4760 return -EOPNOTSUPP;
4761 }
4762}
4763
4764/**
4765 * e1000_mii_ioctl -
4766 * @netdev:
4767 * @ifreq:
4768 * @cmd:
4769 **/
4770
4771static int
4772e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4773{
60490fe0 4774 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4775 struct mii_ioctl_data *data = if_mii(ifr);
4776 int retval;
4777 uint16_t mii_reg;
4778 uint16_t spddplx;
97876fc6 4779 unsigned long flags;
1da177e4 4780
96838a40 4781 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4782 return -EOPNOTSUPP;
4783
4784 switch (cmd) {
4785 case SIOCGMIIPHY:
4786 data->phy_id = adapter->hw.phy_addr;
4787 break;
4788 case SIOCGMIIREG:
96838a40 4789 if (!capable(CAP_NET_ADMIN))
1da177e4 4790 return -EPERM;
97876fc6 4791 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4792 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4793 &data->val_out)) {
4794 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4795 return -EIO;
97876fc6
MC		 4796 }
4797 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4798 break;
4799 case SIOCSMIIREG:
96838a40 4800 if (!capable(CAP_NET_ADMIN))
1da177e4 4801 return -EPERM;
96838a40 4802 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4803 return -EFAULT;
4804 mii_reg = data->val_in;
97876fc6 4805 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4806 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4807 mii_reg)) {
4808 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4809 return -EIO;
97876fc6 4810 }
dc86d32a 4811 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 4812 switch (data->reg_num) {
4813 case PHY_CTRL:
96838a40 4814 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4815 break;
96838a40 4816 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4817 adapter->hw.autoneg = 1;
4818 adapter->hw.autoneg_advertised = 0x2F;
4819 } else {
4820 if (mii_reg & 0x40)
4821 spddplx = SPEED_1000;
4822 else if (mii_reg & 0x2000)
4823 spddplx = SPEED_100;
4824 else
4825 spddplx = SPEED_10;
4826 spddplx += (mii_reg & 0x100)
cb764326
JK		 4827 ? DUPLEX_FULL :
4828 DUPLEX_HALF;
1da177e4
LT		 4829 retval = e1000_set_spd_dplx(adapter,
4830 spddplx);
96838a40 4831 if (retval) {
97876fc6 4832 spin_unlock_irqrestore(
96838a40 4833 &adapter->stats_lock,
97876fc6 4834 flags);
1da177e4 4835 return retval;
97876fc6 4836 }
1da177e4 4837 }
2db10a08
AK		 4838 if (netif_running(adapter->netdev))
4839 e1000_reinit_locked(adapter);
4840 else
1da177e4
LT		 4841 e1000_reset(adapter);
4842 break;
4843 case M88E1000_PHY_SPEC_CTRL:
4844 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4845 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4846 spin_unlock_irqrestore(
4847 &adapter->stats_lock, flags);
1da177e4 4848 return -EIO;
97876fc6 4849 }
1da177e4
LT		 4850 break;
4851 }
4852 } else {
4853 switch (data->reg_num) {
4854 case PHY_CTRL:
96838a40 4855 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4856 break;
2db10a08
AK		 4857 if (netif_running(adapter->netdev))
4858 e1000_reinit_locked(adapter);
4859 else
1da177e4
LT		 4860 e1000_reset(adapter);
4861 break;
4862 }
4863 }
97876fc6 4864 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4865 break;
4866 default:
4867 return -EOPNOTSUPP;
4868 }
4869 return E1000_SUCCESS;
4870}
4871
4872void
4873e1000_pci_set_mwi(struct e1000_hw *hw)
4874{
4875 struct e1000_adapter *adapter = hw->back;
2648345f 4876 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4877
96838a40 4878 if (ret_val)
2648345f 4879 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4880}
4881
4882void
4883e1000_pci_clear_mwi(struct e1000_hw *hw)
4884{
4885 struct e1000_adapter *adapter = hw->back;
4886
4887 pci_clear_mwi(adapter->pdev);
4888}
4889
4890void
4891e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4892{
4893 struct e1000_adapter *adapter = hw->back;
4894
4895 pci_read_config_word(adapter->pdev, reg, value);
4896}
4897
4898void
4899e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4900{
4901 struct e1000_adapter *adapter = hw->back;
4902
4903 pci_write_config_word(adapter->pdev, reg, *value);
4904}
4905
caeccb68
JK		 4906int32_t
4907e1000_read_pcie_cap_reg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4908{
4909 struct e1000_adapter *adapter = hw->back;
4910 uint16_t cap_offset;
4911
4912 cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
4913 if (!cap_offset)
4914 return -E1000_ERR_CONFIG;
4915
4916 pci_read_config_word(adapter->pdev, cap_offset + reg, value);
4917
4918 return E1000_SUCCESS;
4919}
4920
1da177e4
LT		 4921void
4922e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4923{
4924 outl(value, port);
4925}
4926
4927static void
4928e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4929{
60490fe0 4930 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4931 uint32_t ctrl, rctl;
4932
4933 e1000_irq_disable(adapter);
4934 adapter->vlgrp = grp;
4935
96838a40 4936 if (grp) {
1da177e4
LT		 4937 /* enable VLAN tag insert/strip */
4938 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4939 ctrl |= E1000_CTRL_VME;
4940 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4941
cd94dd0b 4942 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 4943 /* enable VLAN receive filtering */
4944 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4945 rctl |= E1000_RCTL_VFE;
4946 rctl &= ~E1000_RCTL_CFIEN;
4947 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4948 e1000_update_mng_vlan(adapter);
cd94dd0b 4949 }
1da177e4
LT		 4950 } else {
4951 /* disable VLAN tag insert/strip */
4952 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4953 ctrl &= ~E1000_CTRL_VME;
4954 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4955
cd94dd0b 4956 if (adapter->hw.mac_type != e1000_ich8lan) {
90fb5135
AK		 4957 /* disable VLAN filtering */
4958 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4959 rctl &= ~E1000_RCTL_VFE;
4960 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4961 if (adapter->mng_vlan_id !=
4962 (uint16_t)E1000_MNG_VLAN_NONE) {
4963 e1000_vlan_rx_kill_vid(netdev,
4964 adapter->mng_vlan_id);
4965 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4966 }
cd94dd0b 4967 }
1da177e4
LT		 4968 }
4969
4970 e1000_irq_enable(adapter);
4971}
4972
4973static void
4974e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4975{
60490fe0 4976 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4977 uint32_t vfta, index;
96838a40
JB		 4978
4979 if ((adapter->hw.mng_cookie.status &
4980 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4981 (vid == adapter->mng_vlan_id))
2d7edb92 4982 return;
1da177e4
LT		 4983 /* add VID to filter table */
4984 index = (vid >> 5) & 0x7F;
4985 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4986 vfta |= (1 << (vid & 0x1F));
4987 e1000_write_vfta(&adapter->hw, index, vfta);
4988}
4989
4990static void
4991e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4992{
60490fe0 4993 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4994 uint32_t vfta, index;
4995
4996 e1000_irq_disable(adapter);
5c15bdec 4997 vlan_group_set_device(adapter->vlgrp, vid, NULL);
1da177e4
LT		 4998 e1000_irq_enable(adapter);
4999
96838a40
JB		 5000 if ((adapter->hw.mng_cookie.status &
5001 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 5002 (vid == adapter->mng_vlan_id)) {
5003 /* release control to f/w */
5004 e1000_release_hw_control(adapter);
2d7edb92 5005 return;
ff147013
JK		 5006 }
5007
1da177e4
LT		 5008 /* remove VID from filter table */
5009 index = (vid >> 5) & 0x7F;
5010 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
5011 vfta &= ~(1 << (vid & 0x1F));
5012 e1000_write_vfta(&adapter->hw, index, vfta);
5013}
5014
5015static void
5016e1000_restore_vlan(struct e1000_adapter *adapter)
5017{
5018 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
5019
96838a40 5020 if (adapter->vlgrp) {
1da177e4 5021 uint16_t vid;
96838a40 5022 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
5c15bdec 5023 if (!vlan_group_get_device(adapter->vlgrp, vid))
1da177e4
LT		 5024 continue;
5025 e1000_vlan_rx_add_vid(adapter->netdev, vid);
5026 }
5027 }
5028}
5029
5030int
5031e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
5032{
5033 adapter->hw.autoneg = 0;
5034
6921368f 5035 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 5036 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 5037 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
5038 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
5039 return -EINVAL;
5040 }
5041
96838a40 5042 switch (spddplx) {
1da177e4
LT		 5043 case SPEED_10 + DUPLEX_HALF:
5044 adapter->hw.forced_speed_duplex = e1000_10_half;
5045 break;
5046 case SPEED_10 + DUPLEX_FULL:
5047 adapter->hw.forced_speed_duplex = e1000_10_full;
5048 break;
5049 case SPEED_100 + DUPLEX_HALF:
5050 adapter->hw.forced_speed_duplex = e1000_100_half;
5051 break;
5052 case SPEED_100 + DUPLEX_FULL:
5053 adapter->hw.forced_speed_duplex = e1000_100_full;
5054 break;
5055 case SPEED_1000 + DUPLEX_FULL:
5056 adapter->hw.autoneg = 1;
5057 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
5058 break;
5059 case SPEED_1000 + DUPLEX_HALF: /* not supported */
5060 default:
2648345f 5061 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 5062 return -EINVAL;
5063 }
5064 return 0;
5065}
5066
1da177e4 5067static int
829ca9a3 5068e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 5069{
5070 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5071 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9 5072 uint32_t ctrl, ctrl_ext, rctl, status;
1da177e4 5073 uint32_t wufc = adapter->wol;
6fdfef16 5074#ifdef CONFIG_PM
240b1710 5075 int retval = 0;
6fdfef16 5076#endif
1da177e4
LT		 5077
5078 netif_device_detach(netdev);
5079
2db10a08
AK		 5080 if (netif_running(netdev)) {
5081 WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
1da177e4 5082 e1000_down(adapter);
2db10a08 5083 }
1da177e4 5084
2f82665f 5085#ifdef CONFIG_PM
1d33e9c6 5086 retval = pci_save_state(pdev);
2f82665f
JB		 5087 if (retval)
5088 return retval;
5089#endif
5090
1da177e4 5091 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 5092 if (status & E1000_STATUS_LU)
1da177e4
LT		 5093 wufc &= ~E1000_WUFC_LNKC;
5094
96838a40 5095 if (wufc) {
1da177e4
LT		 5096 e1000_setup_rctl(adapter);
5097 e1000_set_multi(netdev);
5098
5099 /* turn on all-multi mode if wake on multicast is enabled */
120cd576 5100 if (wufc & E1000_WUFC_MC) {
1da177e4
LT		 5101 rctl = E1000_READ_REG(&adapter->hw, RCTL);
5102 rctl |= E1000_RCTL_MPE;
5103 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
5104 }
5105
96838a40 5106 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 5107 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
5108 /* advertise wake from D3Cold */
5109 #define E1000_CTRL_ADVD3WUC 0x00100000
5110 /* phy power management enable */
5111 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
5112 ctrl |= E1000_CTRL_ADVD3WUC |
5113 E1000_CTRL_EN_PHY_PWR_MGMT;
5114 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
5115 }
5116
96838a40 5117 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 5118 adapter->hw.media_type == e1000_media_type_internal_serdes) {
5119 /* keep the laser running in D3 */
5120 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
5121 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
5122 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
5123 }
5124
2d7edb92
MC		 5125 /* Allow time for pending master requests to run */
5126 e1000_disable_pciex_master(&adapter->hw);
5127
1da177e4
LT		 5128 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
5129 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
d0e027db
AK		 5130 pci_enable_wake(pdev, PCI_D3hot, 1);
5131 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 5132 } else {
5133 E1000_WRITE_REG(&adapter->hw, WUC, 0);
5134 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
d0e027db
AK		 5135 pci_enable_wake(pdev, PCI_D3hot, 0);
5136 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4
LT		 5137 }
5138
0fccd0e9
JG		 5139 e1000_release_manageability(adapter);
5140
5141 /* make sure adapter isn't asleep if manageability is enabled */
5142 if (adapter->en_mng_pt) {
5143 pci_enable_wake(pdev, PCI_D3hot, 1);
5144 pci_enable_wake(pdev, PCI_D3cold, 1);
1da177e4
LT		 5145 }
5146
cd94dd0b
AK		 5147 if (adapter->hw.phy_type == e1000_phy_igp_3)
5148 e1000_phy_powerdown_workaround(&adapter->hw);
5149
edd106fc
AK		 5150 if (netif_running(netdev))
5151 e1000_free_irq(adapter);
5152
b55ccb35
JK		 5153 /* Release control of h/w to f/w. If f/w is AMT enabled, this
5154 * would have already happened in close and is redundant. */
5155 e1000_release_hw_control(adapter);
2d7edb92 5156
1da177e4 5157 pci_disable_device(pdev);
240b1710 5158
d0e027db 5159 pci_set_power_state(pdev, pci_choose_state(pdev, state));
1da177e4
LT		 5160
5161 return 0;
5162}
5163
2f82665f 5164#ifdef CONFIG_PM
1da177e4
LT		 5165static int
5166e1000_resume(struct pci_dev *pdev)
5167{
5168 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 5169 struct e1000_adapter *adapter = netdev_priv(netdev);
0fccd0e9 5170 uint32_t err;
1da177e4 5171
d0e027db 5172 pci_set_power_state(pdev, PCI_D0);
1d33e9c6 5173 pci_restore_state(pdev);
3d1dd8cb
AK		 5174 if ((err = pci_enable_device(pdev))) {
5175 printk(KERN_ERR "e1000: Cannot enable PCI device from suspend\n");
5176 return err;
5177 }
a4cb847d 5178 pci_set_master(pdev);
1da177e4 5179
d0e027db
AK		 5180 pci_enable_wake(pdev, PCI_D3hot, 0);
5181 pci_enable_wake(pdev, PCI_D3cold, 0);
1da177e4 5182
edd106fc
AK		 5183 if (netif_running(netdev) && (err = e1000_request_irq(adapter)))
5184 return err;
5185
5186 e1000_power_up_phy(adapter);
1da177e4
LT		 5187 e1000_reset(adapter);
5188 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5189
0fccd0e9
JG		 5190 e1000_init_manageability(adapter);
5191
96838a40 5192 if (netif_running(netdev))
1da177e4
LT		 5193 e1000_up(adapter);
5194
5195 netif_device_attach(netdev);
5196
b55ccb35
JK		 5197 /* If the controller is 82573 and f/w is AMT, do not set
5198 * DRV_LOAD until the interface is up. For all other cases,
5199 * let the f/w know that the h/w is now under the control
5200 * of the driver. */
5201 if (adapter->hw.mac_type != e1000_82573 ||
5202 !e1000_check_mng_mode(&adapter->hw))
5203 e1000_get_hw_control(adapter);
2d7edb92 5204
1da177e4
LT		 5205 return 0;
5206}
5207#endif
c653e635
AK		 5208
5209static void e1000_shutdown(struct pci_dev *pdev)
5210{
5211 e1000_suspend(pdev, PMSG_SUSPEND);
5212}
5213
1da177e4
LT		 5214#ifdef CONFIG_NET_POLL_CONTROLLER
5215/*
5216 * Polling 'interrupt' - used by things like netconsole to send skbs
5217 * without having to re-enable interrupts. It's not called while
5218 * the interrupt routine is executing.
5219 */
5220static void
2648345f 5221e1000_netpoll(struct net_device *netdev)
1da177e4 5222{
60490fe0 5223 struct e1000_adapter *adapter = netdev_priv(netdev);
d3d9e484 5224
1da177e4 5225 disable_irq(adapter->pdev->irq);
7d12e780 5226 e1000_intr(adapter->pdev->irq, netdev);
c4cfe567 5227 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 5228#ifndef CONFIG_E1000_NAPI
5229 adapter->clean_rx(adapter, adapter->rx_ring);
5230#endif
1da177e4
LT		 5231 enable_irq(adapter->pdev->irq);
5232}
5233#endif
5234
9026729b
AK		 5235/**
5236 * e1000_io_error_detected - called when PCI error is detected
5237 * @pdev: Pointer to PCI device
5238 * @state: The current pci conneection state
5239 *
5240 * This function is called after a PCI bus error affecting
5241 * this device has been detected.
5242 */
5243static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5244{
5245 struct net_device *netdev = pci_get_drvdata(pdev);
5246 struct e1000_adapter *adapter = netdev->priv;
5247
5248 netif_device_detach(netdev);
5249
5250 if (netif_running(netdev))
5251 e1000_down(adapter);
72e8d6bb 5252 pci_disable_device(pdev);
9026729b
AK		 5253
5254 /* Request a slot slot reset. */
5255 return PCI_ERS_RESULT_NEED_RESET;
5256}
5257
5258/**
5259 * e1000_io_slot_reset - called after the pci bus has been reset.
5260 * @pdev: Pointer to PCI device
5261 *
5262 * Restart the card from scratch, as if from a cold-boot. Implementation
5263 * resembles the first-half of the e1000_resume routine.
5264 */
5265static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
5266{
5267 struct net_device *netdev = pci_get_drvdata(pdev);
5268 struct e1000_adapter *adapter = netdev->priv;
5269
5270 if (pci_enable_device(pdev)) {
5271 printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
5272 return PCI_ERS_RESULT_DISCONNECT;
5273 }
5274 pci_set_master(pdev);
5275
dbf38c94
LV		 5276 pci_enable_wake(pdev, PCI_D3hot, 0);
5277 pci_enable_wake(pdev, PCI_D3cold, 0);
9026729b 5278
9026729b
AK		 5279 e1000_reset(adapter);
5280 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
5281
5282 return PCI_ERS_RESULT_RECOVERED;
5283}
5284
5285/**
5286 * e1000_io_resume - called when traffic can start flowing again.
5287 * @pdev: Pointer to PCI device
5288 *
5289 * This callback is called when the error recovery driver tells us that
5290 * its OK to resume normal operation. Implementation resembles the
5291 * second-half of the e1000_resume routine.
5292 */
5293static void e1000_io_resume(struct pci_dev *pdev)
5294{
5295 struct net_device *netdev = pci_get_drvdata(pdev);
5296 struct e1000_adapter *adapter = netdev->priv;
0fccd0e9
JG		 5297
5298 e1000_init_manageability(adapter);
9026729b
AK		 5299
5300 if (netif_running(netdev)) {
5301 if (e1000_up(adapter)) {
5302 printk("e1000: can't bring device back up after reset\n");
5303 return;
5304 }
5305 }
5306
5307 netif_device_attach(netdev);
5308
0fccd0e9
JG		 5309 /* If the controller is 82573 and f/w is AMT, do not set
5310 * DRV_LOAD until the interface is up. For all other cases,
5311 * let the f/w know that the h/w is now under the control
5312 * of the driver. */
5313 if (adapter->hw.mac_type != e1000_82573 ||
5314 !e1000_check_mng_mode(&adapter->hw))
5315 e1000_get_hw_control(adapter);
9026729b 5316
9026729b
AK		 5317}
5318
1da177e4 5319/* e1000_main.c */
Clone of davem's net-next-2.6 tree