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1da177e4
LT		 1/*******************************************************************************
2
3
2648345f 4 Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
1da177e4
LT		 5
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2 of the License, or (at your option)
9 any later version.
10
11 This program is distributed in the hope that it will be useful, but WITHOUT
12 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 more details.
15
16 You should have received a copy of the GNU General Public License along with
17 this program; if not, write to the Free Software Foundation, Inc., 59
18 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
19
20 The full GNU General Public License is included in this distribution in the
21 file called LICENSE.
22
23 Contact Information:
24 Linux NICS <linux.nics@intel.com>
25 Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26
27*******************************************************************************/
28
29#include "e1000.h"
30
31/* Change Log
0f15a8fa
JK		 32 * 7.0.33 3-Feb-2006
33 * o Added another fix for the pass false carrier bit
34 * 7.0.32 24-Jan-2006
35 * o Need to rebuild with noew version number for the pass false carrier
36 * fix in e1000_hw.c
37 * 7.0.30 18-Jan-2006
38 * o fixup for tso workaround to disable it for pci-x
39 * o fix mem leak on 82542
40 * o fixes for 10 Mb/s connections and incorrect stats
41 * 7.0.28 01/06/2006
42 * o hardware workaround to only set "speed mode" bit for 1G link.
43 * 7.0.26 12/23/2005
44 * o wake on lan support modified for device ID 10B5
45 * o fix dhcp + vlan issue not making it to the iAMT firmware
46 * 7.0.24 12/9/2005
47 * o New hardware support for the Gigabit NIC embedded in the south bridge
48 * o Fixes to the recycling logic (skb->tail) from IBM LTC
73629bbc
JB		 49 * 6.3.9 12/16/2005
50 * o incorporate fix for recycled skbs from IBM LTC
51 * 6.3.7 11/18/2005
52 * o Honor eeprom setting for enabling/disabling Wake On Lan
53 * 6.3.5 11/17/2005
54 * o Fix memory leak in rx ring handling for PCI Express adapters
55 * 6.3.4 11/8/05
56 * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
57 * 6.3.2 9/20/05
58 * o Render logic that sets/resets DRV_LOAD as inline functions to
59 * avoid code replication. If f/w is AMT then set DRV_LOAD only when
60 * network interface is open.
61 * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
62 * o Adjust PBA partioning for Jumbo frames using MTU size and not
63 * rx_buffer_len
64 * 6.3.1 9/19/05
65 * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
0f15a8fa 66 * (e1000_clean_tx_irq)
73629bbc 67 * o Support for 8086:10B5 device (Quad Port)
1da177e4
LT		 68 */
69
70char e1000_driver_name[] = "e1000";
3ad2cc67 71static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
1da177e4
LT		 72#ifndef CONFIG_E1000_NAPI
73#define DRIVERNAPI
74#else
75#define DRIVERNAPI "-NAPI"
76#endif
c1605eb3 77#define DRV_VERSION "7.0.33-k2"DRIVERNAPI
1da177e4 78char e1000_driver_version[] = DRV_VERSION;
3ad2cc67 79static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
1da177e4
LT		 80
81/* e1000_pci_tbl - PCI Device ID Table
82 *
83 * Last entry must be all 0s
84 *
85 * Macro expands to...
86 * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
87 */
88static struct pci_device_id e1000_pci_tbl[] = {
89 INTEL_E1000_ETHERNET_DEVICE(0x1000),
90 INTEL_E1000_ETHERNET_DEVICE(0x1001),
91 INTEL_E1000_ETHERNET_DEVICE(0x1004),
92 INTEL_E1000_ETHERNET_DEVICE(0x1008),
93 INTEL_E1000_ETHERNET_DEVICE(0x1009),
94 INTEL_E1000_ETHERNET_DEVICE(0x100C),
95 INTEL_E1000_ETHERNET_DEVICE(0x100D),
96 INTEL_E1000_ETHERNET_DEVICE(0x100E),
97 INTEL_E1000_ETHERNET_DEVICE(0x100F),
98 INTEL_E1000_ETHERNET_DEVICE(0x1010),
99 INTEL_E1000_ETHERNET_DEVICE(0x1011),
100 INTEL_E1000_ETHERNET_DEVICE(0x1012),
101 INTEL_E1000_ETHERNET_DEVICE(0x1013),
102 INTEL_E1000_ETHERNET_DEVICE(0x1014),
103 INTEL_E1000_ETHERNET_DEVICE(0x1015),
104 INTEL_E1000_ETHERNET_DEVICE(0x1016),
105 INTEL_E1000_ETHERNET_DEVICE(0x1017),
106 INTEL_E1000_ETHERNET_DEVICE(0x1018),
107 INTEL_E1000_ETHERNET_DEVICE(0x1019),
2648345f 108 INTEL_E1000_ETHERNET_DEVICE(0x101A),
1da177e4
LT		 109 INTEL_E1000_ETHERNET_DEVICE(0x101D),
110 INTEL_E1000_ETHERNET_DEVICE(0x101E),
111 INTEL_E1000_ETHERNET_DEVICE(0x1026),
112 INTEL_E1000_ETHERNET_DEVICE(0x1027),
113 INTEL_E1000_ETHERNET_DEVICE(0x1028),
07b8fede
MC		 114 INTEL_E1000_ETHERNET_DEVICE(0x105E),
115 INTEL_E1000_ETHERNET_DEVICE(0x105F),
116 INTEL_E1000_ETHERNET_DEVICE(0x1060),
1da177e4
LT		 117 INTEL_E1000_ETHERNET_DEVICE(0x1075),
118 INTEL_E1000_ETHERNET_DEVICE(0x1076),
119 INTEL_E1000_ETHERNET_DEVICE(0x1077),
120 INTEL_E1000_ETHERNET_DEVICE(0x1078),
121 INTEL_E1000_ETHERNET_DEVICE(0x1079),
122 INTEL_E1000_ETHERNET_DEVICE(0x107A),
123 INTEL_E1000_ETHERNET_DEVICE(0x107B),
124 INTEL_E1000_ETHERNET_DEVICE(0x107C),
07b8fede
MC		 125 INTEL_E1000_ETHERNET_DEVICE(0x107D),
126 INTEL_E1000_ETHERNET_DEVICE(0x107E),
127 INTEL_E1000_ETHERNET_DEVICE(0x107F),
1da177e4 128 INTEL_E1000_ETHERNET_DEVICE(0x108A),
2648345f
MC		 129 INTEL_E1000_ETHERNET_DEVICE(0x108B),
130 INTEL_E1000_ETHERNET_DEVICE(0x108C),
6418ecc6
JK		 131 INTEL_E1000_ETHERNET_DEVICE(0x1096),
132 INTEL_E1000_ETHERNET_DEVICE(0x1098),
b7ee49db 133 INTEL_E1000_ETHERNET_DEVICE(0x1099),
07b8fede 134 INTEL_E1000_ETHERNET_DEVICE(0x109A),
b7ee49db 135 INTEL_E1000_ETHERNET_DEVICE(0x10B5),
6418ecc6 136 INTEL_E1000_ETHERNET_DEVICE(0x10B9),
1da177e4
LT		 137 /* required last entry */
138 {0,}
139};
140
141MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
142
3ad2cc67 143static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 144 struct e1000_tx_ring *txdr);
3ad2cc67 145static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 146 struct e1000_rx_ring *rxdr);
3ad2cc67 147static void e1000_free_tx_resources(struct e1000_adapter *adapter,
0f15a8fa 148 struct e1000_tx_ring *tx_ring);
3ad2cc67 149static void e1000_free_rx_resources(struct e1000_adapter *adapter,
0f15a8fa 150 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 151
152/* Local Function Prototypes */
153
154static int e1000_init_module(void);
155static void e1000_exit_module(void);
156static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
157static void __devexit e1000_remove(struct pci_dev *pdev);
581d708e 158static int e1000_alloc_queues(struct e1000_adapter *adapter);
1da177e4
LT		 159static int e1000_sw_init(struct e1000_adapter *adapter);
160static int e1000_open(struct net_device *netdev);
161static int e1000_close(struct net_device *netdev);
162static void e1000_configure_tx(struct e1000_adapter *adapter);
163static void e1000_configure_rx(struct e1000_adapter *adapter);
164static void e1000_setup_rctl(struct e1000_adapter *adapter);
581d708e
MC		 165static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
166static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
167static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
168 struct e1000_tx_ring *tx_ring);
169static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
170 struct e1000_rx_ring *rx_ring);
1da177e4
LT		 171static void e1000_set_multi(struct net_device *netdev);
172static void e1000_update_phy_info(unsigned long data);
173static void e1000_watchdog(unsigned long data);
174static void e1000_watchdog_task(struct e1000_adapter *adapter);
175static void e1000_82547_tx_fifo_stall(unsigned long data);
176static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
177static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
178static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
179static int e1000_set_mac(struct net_device *netdev, void *p);
180static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
581d708e
MC		 181static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
182 struct e1000_tx_ring *tx_ring);
1da177e4 183#ifdef CONFIG_E1000_NAPI
581d708e 184static int e1000_clean(struct net_device *poll_dev, int *budget);
1da177e4 185static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
581d708e 186 struct e1000_rx_ring *rx_ring,
1da177e4 187 int *work_done, int work_to_do);
2d7edb92 188static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
581d708e 189 struct e1000_rx_ring *rx_ring,
2d7edb92 190 int *work_done, int work_to_do);
1da177e4 191#else
581d708e
MC		 192static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
193 struct e1000_rx_ring *rx_ring);
194static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
195 struct e1000_rx_ring *rx_ring);
1da177e4 196#endif
581d708e 197static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43
JK		 198 struct e1000_rx_ring *rx_ring,
199 int cleaned_count);
581d708e 200static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 201 struct e1000_rx_ring *rx_ring,
202 int cleaned_count);
1da177e4
LT		 203static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
204static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
205 int cmd);
1da177e4
LT		 206static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
207static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
208static void e1000_tx_timeout(struct net_device *dev);
87041639 209static void e1000_reset_task(struct net_device *dev);
1da177e4
LT		 210static void e1000_smartspeed(struct e1000_adapter *adapter);
211static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
212 struct sk_buff *skb);
213
214static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
215static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
216static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
217static void e1000_restore_vlan(struct e1000_adapter *adapter);
218
1da177e4 219#ifdef CONFIG_PM
977e74b5 220static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
1da177e4
LT		 221static int e1000_resume(struct pci_dev *pdev);
222#endif
223
224#ifdef CONFIG_NET_POLL_CONTROLLER
225/* for netdump / net console */
226static void e1000_netpoll (struct net_device *netdev);
227#endif
228
24025e4e 229
1da177e4
LT		 230static struct pci_driver e1000_driver = {
231 .name = e1000_driver_name,
232 .id_table = e1000_pci_tbl,
233 .probe = e1000_probe,
234 .remove = __devexit_p(e1000_remove),
235 /* Power Managment Hooks */
236#ifdef CONFIG_PM
237 .suspend = e1000_suspend,
238 .resume = e1000_resume
239#endif
240};
241
242MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
243MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
244MODULE_LICENSE("GPL");
245MODULE_VERSION(DRV_VERSION);
246
247static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
248module_param(debug, int, 0);
249MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
250
251/**
252 * e1000_init_module - Driver Registration Routine
253 *
254 * e1000_init_module is the first routine called when the driver is
255 * loaded. All it does is register with the PCI subsystem.
256 **/
257
258static int __init
259e1000_init_module(void)
260{
261 int ret;
262 printk(KERN_INFO "%s - version %s\n",
263 e1000_driver_string, e1000_driver_version);
264
265 printk(KERN_INFO "%s\n", e1000_copyright);
266
267 ret = pci_module_init(&e1000_driver);
8b378def 268
1da177e4
LT		 269 return ret;
270}
271
272module_init(e1000_init_module);
273
274/**
275 * e1000_exit_module - Driver Exit Cleanup Routine
276 *
277 * e1000_exit_module is called just before the driver is removed
278 * from memory.
279 **/
280
281static void __exit
282e1000_exit_module(void)
283{
1da177e4
LT		 284 pci_unregister_driver(&e1000_driver);
285}
286
287module_exit(e1000_exit_module);
288
289/**
290 * e1000_irq_disable - Mask off interrupt generation on the NIC
291 * @adapter: board private structure
292 **/
293
294static inline void
295e1000_irq_disable(struct e1000_adapter *adapter)
296{
297 atomic_inc(&adapter->irq_sem);
298 E1000_WRITE_REG(&adapter->hw, IMC, ~0);
299 E1000_WRITE_FLUSH(&adapter->hw);
300 synchronize_irq(adapter->pdev->irq);
301}
302
303/**
304 * e1000_irq_enable - Enable default interrupt generation settings
305 * @adapter: board private structure
306 **/
307
308static inline void
309e1000_irq_enable(struct e1000_adapter *adapter)
310{
96838a40 311 if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
1da177e4
LT		 312 E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
313 E1000_WRITE_FLUSH(&adapter->hw);
314 }
315}
3ad2cc67
AB		 316
317static void
2d7edb92
MC		 318e1000_update_mng_vlan(struct e1000_adapter *adapter)
319{
320 struct net_device *netdev = adapter->netdev;
321 uint16_t vid = adapter->hw.mng_cookie.vlan_id;
322 uint16_t old_vid = adapter->mng_vlan_id;
96838a40
JB		 323 if (adapter->vlgrp) {
324 if (!adapter->vlgrp->vlan_devices[vid]) {
325 if (adapter->hw.mng_cookie.status &
2d7edb92
MC		 326 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
327 e1000_vlan_rx_add_vid(netdev, vid);
328 adapter->mng_vlan_id = vid;
329 } else
330 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40
JB		 331
332 if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
333 (vid != old_vid) &&
2d7edb92
MC		 334 !adapter->vlgrp->vlan_devices[old_vid])
335 e1000_vlan_rx_kill_vid(netdev, old_vid);
c5f226fe
JK		 336 } else
337 adapter->mng_vlan_id = vid;
2d7edb92
MC		 338 }
339}
b55ccb35
JK		 340
341/**
342 * e1000_release_hw_control - release control of the h/w to f/w
343 * @adapter: address of board private structure
344 *
345 * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
346 * For ASF and Pass Through versions of f/w this means that the
347 * driver is no longer loaded. For AMT version (only with 82573) i
348 * of the f/w this means that the netowrk i/f is closed.
349 *
350 **/
351
352static inline void
353e1000_release_hw_control(struct e1000_adapter *adapter)
354{
355 uint32_t ctrl_ext;
356 uint32_t swsm;
357
358 /* Let firmware taken over control of h/w */
359 switch (adapter->hw.mac_type) {
360 case e1000_82571:
361 case e1000_82572:
362 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
363 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
364 ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
365 break;
366 case e1000_82573:
367 swsm = E1000_READ_REG(&adapter->hw, SWSM);
368 E1000_WRITE_REG(&adapter->hw, SWSM,
369 swsm & ~E1000_SWSM_DRV_LOAD);
370 default:
371 break;
372 }
373}
374
375/**
376 * e1000_get_hw_control - get control of the h/w from f/w
377 * @adapter: address of board private structure
378 *
379 * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
380 * For ASF and Pass Through versions of f/w this means that
381 * the driver is loaded. For AMT version (only with 82573)
382 * of the f/w this means that the netowrk i/f is open.
383 *
384 **/
385
386static inline void
387e1000_get_hw_control(struct e1000_adapter *adapter)
388{
389 uint32_t ctrl_ext;
390 uint32_t swsm;
391 /* Let firmware know the driver has taken over */
392 switch (adapter->hw.mac_type) {
393 case e1000_82571:
394 case e1000_82572:
395 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
396 E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
397 ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
398 break;
399 case e1000_82573:
400 swsm = E1000_READ_REG(&adapter->hw, SWSM);
401 E1000_WRITE_REG(&adapter->hw, SWSM,
402 swsm | E1000_SWSM_DRV_LOAD);
403 break;
404 default:
405 break;
406 }
407}
408
1da177e4
LT		 409int
410e1000_up(struct e1000_adapter *adapter)
411{
412 struct net_device *netdev = adapter->netdev;
581d708e 413 int i, err;
1da177e4
LT		 414
415 /* hardware has been reset, we need to reload some things */
416
417 /* Reset the PHY if it was previously powered down */
96838a40 418 if (adapter->hw.media_type == e1000_media_type_copper) {
1da177e4
LT		 419 uint16_t mii_reg;
420 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
96838a40 421 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4
LT		 422 e1000_phy_reset(&adapter->hw);
423 }
424
425 e1000_set_multi(netdev);
426
427 e1000_restore_vlan(adapter);
428
429 e1000_configure_tx(adapter);
430 e1000_setup_rctl(adapter);
431 e1000_configure_rx(adapter);
72d64a43
JK		 432 /* call E1000_DESC_UNUSED which always leaves
433 * at least 1 descriptor unused to make sure
434 * next_to_use != next_to_clean */
f56799ea 435 for (i = 0; i < adapter->num_rx_queues; i++) {
72d64a43 436 struct e1000_rx_ring *ring = &adapter->rx_ring[i];
a292ca6e
JK		 437 adapter->alloc_rx_buf(adapter, ring,
438 E1000_DESC_UNUSED(ring));
f56799ea 439 }
1da177e4 440
fa4f7ef3 441#ifdef CONFIG_PCI_MSI
96838a40 442 if (adapter->hw.mac_type > e1000_82547_rev_2) {
fa4f7ef3 443 adapter->have_msi = TRUE;
96838a40 444 if ((err = pci_enable_msi(adapter->pdev))) {
fa4f7ef3
MC		 445 DPRINTK(PROBE, ERR,
446 "Unable to allocate MSI interrupt Error: %d\n", err);
447 adapter->have_msi = FALSE;
448 }
449 }
450#endif
96838a40 451 if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
1da177e4 452 SA_SHIRQ | SA_SAMPLE_RANDOM,
2648345f
MC		 453 netdev->name, netdev))) {
454 DPRINTK(PROBE, ERR,
455 "Unable to allocate interrupt Error: %d\n", err);
1da177e4 456 return err;
2648345f 457 }
1da177e4 458
7bfa4816
JK		 459 adapter->tx_queue_len = netdev->tx_queue_len;
460
1da177e4 461 mod_timer(&adapter->watchdog_timer, jiffies);
1da177e4
LT		 462
463#ifdef CONFIG_E1000_NAPI
464 netif_poll_enable(netdev);
465#endif
5de55624
MC		 466 e1000_irq_enable(adapter);
467
1da177e4
LT		 468 return 0;
469}
470
471void
472e1000_down(struct e1000_adapter *adapter)
473{
474 struct net_device *netdev = adapter->netdev;
57128197
JK		 475 boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
476 e1000_check_mng_mode(&adapter->hw);
1da177e4
LT		 477
478 e1000_irq_disable(adapter);
c1605eb3 479
1da177e4 480 free_irq(adapter->pdev->irq, netdev);
fa4f7ef3 481#ifdef CONFIG_PCI_MSI
96838a40 482 if (adapter->hw.mac_type > e1000_82547_rev_2 &&
fa4f7ef3
MC		 483 adapter->have_msi == TRUE)
484 pci_disable_msi(adapter->pdev);
485#endif
1da177e4
LT		 486 del_timer_sync(&adapter->tx_fifo_stall_timer);
487 del_timer_sync(&adapter->watchdog_timer);
488 del_timer_sync(&adapter->phy_info_timer);
489
490#ifdef CONFIG_E1000_NAPI
491 netif_poll_disable(netdev);
492#endif
7bfa4816 493 netdev->tx_queue_len = adapter->tx_queue_len;
1da177e4
LT		 494 adapter->link_speed = 0;
495 adapter->link_duplex = 0;
496 netif_carrier_off(netdev);
497 netif_stop_queue(netdev);
498
499 e1000_reset(adapter);
581d708e
MC		 500 e1000_clean_all_tx_rings(adapter);
501 e1000_clean_all_rx_rings(adapter);
1da177e4 502
57128197
JK		 503 /* Power down the PHY so no link is implied when interface is down *
504 * The PHY cannot be powered down if any of the following is TRUE *
505 * (a) WoL is enabled
506 * (b) AMT is active
507 * (c) SoL/IDER session is active */
508 if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
2d7edb92 509 adapter->hw.media_type == e1000_media_type_copper &&
57128197
JK		 510 !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
511 !mng_mode_enabled &&
512 !e1000_check_phy_reset_block(&adapter->hw)) {
1da177e4
LT		 513 uint16_t mii_reg;
514 e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
515 mii_reg |= MII_CR_POWER_DOWN;
516 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
4e48a2b9 517 mdelay(1);
1da177e4
LT		 518 }
519}
520
521void
522e1000_reset(struct e1000_adapter *adapter)
523{
2d7edb92 524 uint32_t pba, manc;
1125ecbc 525 uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
1da177e4
LT		 526
527 /* Repartition Pba for greater than 9k mtu
528 * To take effect CTRL.RST is required.
529 */
530
2d7edb92
MC		 531 switch (adapter->hw.mac_type) {
532 case e1000_82547:
0e6ef3e0 533 case e1000_82547_rev_2:
2d7edb92
MC		 534 pba = E1000_PBA_30K;
535 break;
868d5309
MC		 536 case e1000_82571:
537 case e1000_82572:
6418ecc6 538 case e1000_80003es2lan:
868d5309
MC		 539 pba = E1000_PBA_38K;
540 break;
2d7edb92
MC		 541 case e1000_82573:
542 pba = E1000_PBA_12K;
543 break;
544 default:
545 pba = E1000_PBA_48K;
546 break;
547 }
548
96838a40 549 if ((adapter->hw.mac_type != e1000_82573) &&
f11b7f85 550 (adapter->netdev->mtu > E1000_RXBUFFER_8192))
1125ecbc 551 pba -= 8; /* allocate more FIFO for Tx */
2d7edb92
MC		 552
553
96838a40 554 if (adapter->hw.mac_type == e1000_82547) {
1da177e4
LT		 555 adapter->tx_fifo_head = 0;
556 adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
557 adapter->tx_fifo_size =
558 (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
559 atomic_set(&adapter->tx_fifo_stall, 0);
560 }
2d7edb92 561
1da177e4
LT		 562 E1000_WRITE_REG(&adapter->hw, PBA, pba);
563
564 /* flow control settings */
f11b7f85
JK		 565 /* Set the FC high water mark to 90% of the FIFO size.
566 * Required to clear last 3 LSB */
567 fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
568
569 adapter->hw.fc_high_water = fc_high_water_mark;
570 adapter->hw.fc_low_water = fc_high_water_mark - 8;
87041639
JK		 571 if (adapter->hw.mac_type == e1000_80003es2lan)
572 adapter->hw.fc_pause_time = 0xFFFF;
573 else
574 adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
1da177e4
LT		 575 adapter->hw.fc_send_xon = 1;
576 adapter->hw.fc = adapter->hw.original_fc;
577
2d7edb92 578 /* Allow time for pending master requests to run */
1da177e4 579 e1000_reset_hw(&adapter->hw);
96838a40 580 if (adapter->hw.mac_type >= e1000_82544)
1da177e4 581 E1000_WRITE_REG(&adapter->hw, WUC, 0);
96838a40 582 if (e1000_init_hw(&adapter->hw))
1da177e4 583 DPRINTK(PROBE, ERR, "Hardware Error\n");
2d7edb92 584 e1000_update_mng_vlan(adapter);
1da177e4
LT		 585 /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
586 E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
587
588 e1000_reset_adaptive(&adapter->hw);
589 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2d7edb92
MC		 590 if (adapter->en_mng_pt) {
591 manc = E1000_READ_REG(&adapter->hw, MANC);
592 manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
593 E1000_WRITE_REG(&adapter->hw, MANC, manc);
594 }
1da177e4
LT		 595}
596
597/**
598 * e1000_probe - Device Initialization Routine
599 * @pdev: PCI device information struct
600 * @ent: entry in e1000_pci_tbl
601 *
602 * Returns 0 on success, negative on failure
603 *
604 * e1000_probe initializes an adapter identified by a pci_dev structure.
605 * The OS initialization, configuring of the adapter private structure,
606 * and a hardware reset occur.
607 **/
608
609static int __devinit
610e1000_probe(struct pci_dev *pdev,
611 const struct pci_device_id *ent)
612{
613 struct net_device *netdev;
614 struct e1000_adapter *adapter;
2d7edb92 615 unsigned long mmio_start, mmio_len;
2d7edb92 616
1da177e4 617 static int cards_found = 0;
84916829 618 static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
2d7edb92 619 int i, err, pci_using_dac;
1da177e4
LT		 620 uint16_t eeprom_data;
621 uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
96838a40 622 if ((err = pci_enable_device(pdev)))
1da177e4
LT		 623 return err;
624
96838a40 625 if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
1da177e4
LT		 626 pci_using_dac = 1;
627 } else {
96838a40 628 if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
1da177e4
LT		 629 E1000_ERR("No usable DMA configuration, aborting\n");
630 return err;
631 }
632 pci_using_dac = 0;
633 }
634
96838a40 635 if ((err = pci_request_regions(pdev, e1000_driver_name)))
1da177e4
LT		 636 return err;
637
638 pci_set_master(pdev);
639
640 netdev = alloc_etherdev(sizeof(struct e1000_adapter));
96838a40 641 if (!netdev) {
1da177e4
LT		 642 err = -ENOMEM;
643 goto err_alloc_etherdev;
644 }
645
646 SET_MODULE_OWNER(netdev);
647 SET_NETDEV_DEV(netdev, &pdev->dev);
648
649 pci_set_drvdata(pdev, netdev);
60490fe0 650 adapter = netdev_priv(netdev);
1da177e4
LT		 651 adapter->netdev = netdev;
652 adapter->pdev = pdev;
653 adapter->hw.back = adapter;
654 adapter->msg_enable = (1 << debug) - 1;
655
656 mmio_start = pci_resource_start(pdev, BAR_0);
657 mmio_len = pci_resource_len(pdev, BAR_0);
658
659 adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
96838a40 660 if (!adapter->hw.hw_addr) {
1da177e4
LT		 661 err = -EIO;
662 goto err_ioremap;
663 }
664
96838a40
JB		 665 for (i = BAR_1; i <= BAR_5; i++) {
666 if (pci_resource_len(pdev, i) == 0)
1da177e4 667 continue;
96838a40 668 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
1da177e4
LT		 669 adapter->hw.io_base = pci_resource_start(pdev, i);
670 break;
671 }
672 }
673
674 netdev->open = &e1000_open;
675 netdev->stop = &e1000_close;
676 netdev->hard_start_xmit = &e1000_xmit_frame;
677 netdev->get_stats = &e1000_get_stats;
678 netdev->set_multicast_list = &e1000_set_multi;
679 netdev->set_mac_address = &e1000_set_mac;
680 netdev->change_mtu = &e1000_change_mtu;
681 netdev->do_ioctl = &e1000_ioctl;
682 e1000_set_ethtool_ops(netdev);
683 netdev->tx_timeout = &e1000_tx_timeout;
684 netdev->watchdog_timeo = 5 * HZ;
685#ifdef CONFIG_E1000_NAPI
686 netdev->poll = &e1000_clean;
687 netdev->weight = 64;
688#endif
689 netdev->vlan_rx_register = e1000_vlan_rx_register;
690 netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
691 netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
692#ifdef CONFIG_NET_POLL_CONTROLLER
693 netdev->poll_controller = e1000_netpoll;
694#endif
695 strcpy(netdev->name, pci_name(pdev));
696
697 netdev->mem_start = mmio_start;
698 netdev->mem_end = mmio_start + mmio_len;
699 netdev->base_addr = adapter->hw.io_base;
700
701 adapter->bd_number = cards_found;
702
703 /* setup the private structure */
704
96838a40 705 if ((err = e1000_sw_init(adapter)))
1da177e4
LT		 706 goto err_sw_init;
707
96838a40 708 if ((err = e1000_check_phy_reset_block(&adapter->hw)))
2d7edb92
MC		 709 DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
710
84916829
JK		 711 /* if ksp3, indicate if it's port a being setup */
712 if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
713 e1000_ksp3_port_a == 0)
714 adapter->ksp3_port_a = 1;
715 e1000_ksp3_port_a++;
716 /* Reset for multiple KP3 adapters */
717 if (e1000_ksp3_port_a == 4)
718 e1000_ksp3_port_a = 0;
719
96838a40 720 if (adapter->hw.mac_type >= e1000_82543) {
1da177e4
LT		 721 netdev->features = NETIF_F_SG |
722 NETIF_F_HW_CSUM |
723 NETIF_F_HW_VLAN_TX |
724 NETIF_F_HW_VLAN_RX |
725 NETIF_F_HW_VLAN_FILTER;
726 }
727
728#ifdef NETIF_F_TSO
96838a40 729 if ((adapter->hw.mac_type >= e1000_82544) &&
1da177e4
LT		 730 (adapter->hw.mac_type != e1000_82547))
731 netdev->features |= NETIF_F_TSO;
2d7edb92
MC		 732
733#ifdef NETIF_F_TSO_IPV6
96838a40 734 if (adapter->hw.mac_type > e1000_82547_rev_2)
2d7edb92
MC		 735 netdev->features |= NETIF_F_TSO_IPV6;
736#endif
1da177e4 737#endif
96838a40 738 if (pci_using_dac)
1da177e4
LT		 739 netdev->features |= NETIF_F_HIGHDMA;
740
741 /* hard_start_xmit is safe against parallel locking */
742 netdev->features |= NETIF_F_LLTX;
743
2d7edb92
MC		 744 adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
745
96838a40 746 /* before reading the EEPROM, reset the controller to
1da177e4 747 * put the device in a known good starting state */
96838a40 748
1da177e4
LT		 749 e1000_reset_hw(&adapter->hw);
750
751 /* make sure the EEPROM is good */
752
96838a40 753 if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
1da177e4
LT		 754 DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
755 err = -EIO;
756 goto err_eeprom;
757 }
758
759 /* copy the MAC address out of the EEPROM */
760
96838a40 761 if (e1000_read_mac_addr(&adapter->hw))
1da177e4
LT		 762 DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
763 memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
9beb0ac1 764 memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
1da177e4 765
96838a40 766 if (!is_valid_ether_addr(netdev->perm_addr)) {
1da177e4
LT		 767 DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
768 err = -EIO;
769 goto err_eeprom;
770 }
771
772 e1000_read_part_num(&adapter->hw, &(adapter->part_num));
773
774 e1000_get_bus_info(&adapter->hw);
775
776 init_timer(&adapter->tx_fifo_stall_timer);
777 adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
778 adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
779
780 init_timer(&adapter->watchdog_timer);
781 adapter->watchdog_timer.function = &e1000_watchdog;
782 adapter->watchdog_timer.data = (unsigned long) adapter;
783
784 INIT_WORK(&adapter->watchdog_task,
785 (void (*)(void *))e1000_watchdog_task, adapter);
786
787 init_timer(&adapter->phy_info_timer);
788 adapter->phy_info_timer.function = &e1000_update_phy_info;
789 adapter->phy_info_timer.data = (unsigned long) adapter;
790
87041639
JK		 791 INIT_WORK(&adapter->reset_task,
792 (void (*)(void *))e1000_reset_task, netdev);
1da177e4
LT		 793
794 /* we're going to reset, so assume we have no link for now */
795
796 netif_carrier_off(netdev);
797 netif_stop_queue(netdev);
798
799 e1000_check_options(adapter);
800
801 /* Initial Wake on LAN setting
802 * If APM wake is enabled in the EEPROM,
803 * enable the ACPI Magic Packet filter
804 */
805
96838a40 806 switch (adapter->hw.mac_type) {
1da177e4
LT		 807 case e1000_82542_rev2_0:
808 case e1000_82542_rev2_1:
809 case e1000_82543:
810 break;
811 case e1000_82544:
812 e1000_read_eeprom(&adapter->hw,
813 EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
814 eeprom_apme_mask = E1000_EEPROM_82544_APM;
815 break;
816 case e1000_82546:
817 case e1000_82546_rev_3:
fd803241 818 case e1000_82571:
6418ecc6 819 case e1000_80003es2lan:
96838a40 820 if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
1da177e4
LT		 821 e1000_read_eeprom(&adapter->hw,
822 EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
823 break;
824 }
825 /* Fall Through */
826 default:
827 e1000_read_eeprom(&adapter->hw,
828 EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
829 break;
830 }
96838a40 831 if (eeprom_data & eeprom_apme_mask)
1da177e4
LT		 832 adapter->wol |= E1000_WUFC_MAG;
833
fb3d47d4
JK		 834 /* print bus type/speed/width info */
835 {
836 struct e1000_hw *hw = &adapter->hw;
837 DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
838 ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
839 (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
840 ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
841 (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
842 (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
843 (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
844 (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
845 ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
846 (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
847 (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
848 "32-bit"));
849 }
850
851 for (i = 0; i < 6; i++)
852 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
853
1da177e4
LT		 854 /* reset the hardware with the new settings */
855 e1000_reset(adapter);
856
b55ccb35
JK		 857 /* If the controller is 82573 and f/w is AMT, do not set
858 * DRV_LOAD until the interface is up. For all other cases,
859 * let the f/w know that the h/w is now under the control
860 * of the driver. */
861 if (adapter->hw.mac_type != e1000_82573 ||
862 !e1000_check_mng_mode(&adapter->hw))
863 e1000_get_hw_control(adapter);
2d7edb92 864
1da177e4 865 strcpy(netdev->name, "eth%d");
96838a40 866 if ((err = register_netdev(netdev)))
1da177e4
LT		 867 goto err_register;
868
869 DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
870
871 cards_found++;
872 return 0;
873
874err_register:
875err_sw_init:
876err_eeprom:
877 iounmap(adapter->hw.hw_addr);
878err_ioremap:
879 free_netdev(netdev);
880err_alloc_etherdev:
881 pci_release_regions(pdev);
882 return err;
883}
884
885/**
886 * e1000_remove - Device Removal Routine
887 * @pdev: PCI device information struct
888 *
889 * e1000_remove is called by the PCI subsystem to alert the driver
890 * that it should release a PCI device. The could be caused by a
891 * Hot-Plug event, or because the driver is going to be removed from
892 * memory.
893 **/
894
895static void __devexit
896e1000_remove(struct pci_dev *pdev)
897{
898 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 899 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 900 uint32_t manc;
581d708e
MC		 901#ifdef CONFIG_E1000_NAPI
902 int i;
903#endif
1da177e4 904
be2b28ed
JG		 905 flush_scheduled_work();
906
96838a40 907 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 908 adapter->hw.media_type == e1000_media_type_copper) {
909 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 910 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 911 manc |= E1000_MANC_ARP_EN;
912 E1000_WRITE_REG(&adapter->hw, MANC, manc);
913 }
914 }
915
b55ccb35
JK		 916 /* Release control of h/w to f/w. If f/w is AMT enabled, this
917 * would have already happened in close and is redundant. */
918 e1000_release_hw_control(adapter);
2d7edb92 919
1da177e4 920 unregister_netdev(netdev);
581d708e 921#ifdef CONFIG_E1000_NAPI
f56799ea 922 for (i = 0; i < adapter->num_rx_queues; i++)
15333061 923 dev_put(&adapter->polling_netdev[i]);
581d708e 924#endif
1da177e4 925
96838a40 926 if (!e1000_check_phy_reset_block(&adapter->hw))
2d7edb92 927 e1000_phy_hw_reset(&adapter->hw);
1da177e4 928
24025e4e
MC		 929 kfree(adapter->tx_ring);
930 kfree(adapter->rx_ring);
931#ifdef CONFIG_E1000_NAPI
932 kfree(adapter->polling_netdev);
933#endif
934
1da177e4
LT		 935 iounmap(adapter->hw.hw_addr);
936 pci_release_regions(pdev);
937
938 free_netdev(netdev);
939
940 pci_disable_device(pdev);
941}
942
943/**
944 * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
945 * @adapter: board private structure to initialize
946 *
947 * e1000_sw_init initializes the Adapter private data structure.
948 * Fields are initialized based on PCI device information and
949 * OS network device settings (MTU size).
950 **/
951
952static int __devinit
953e1000_sw_init(struct e1000_adapter *adapter)
954{
955 struct e1000_hw *hw = &adapter->hw;
956 struct net_device *netdev = adapter->netdev;
957 struct pci_dev *pdev = adapter->pdev;
581d708e
MC		 958#ifdef CONFIG_E1000_NAPI
959 int i;
960#endif
1da177e4
LT		 961
962 /* PCI config space info */
963
964 hw->vendor_id = pdev->vendor;
965 hw->device_id = pdev->device;
966 hw->subsystem_vendor_id = pdev->subsystem_vendor;
967 hw->subsystem_id = pdev->subsystem_device;
968
969 pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
970
971 pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
972
973 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
2d7edb92 974 adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
1da177e4
LT		 975 hw->max_frame_size = netdev->mtu +
976 ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
977 hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
978
979 /* identify the MAC */
980
96838a40 981 if (e1000_set_mac_type(hw)) {
1da177e4
LT		 982 DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
983 return -EIO;
984 }
985
986 /* initialize eeprom parameters */
987
96838a40 988 if (e1000_init_eeprom_params(hw)) {
2d7edb92
MC		 989 E1000_ERR("EEPROM initialization failed\n");
990 return -EIO;
991 }
1da177e4 992
96838a40 993 switch (hw->mac_type) {
1da177e4
LT		 994 default:
995 break;
996 case e1000_82541:
997 case e1000_82547:
998 case e1000_82541_rev_2:
999 case e1000_82547_rev_2:
1000 hw->phy_init_script = 1;
1001 break;
1002 }
1003
1004 e1000_set_media_type(hw);
1005
1006 hw->wait_autoneg_complete = FALSE;
1007 hw->tbi_compatibility_en = TRUE;
1008 hw->adaptive_ifs = TRUE;
1009
1010 /* Copper options */
1011
96838a40 1012 if (hw->media_type == e1000_media_type_copper) {
1da177e4
LT		 1013 hw->mdix = AUTO_ALL_MODES;
1014 hw->disable_polarity_correction = FALSE;
1015 hw->master_slave = E1000_MASTER_SLAVE;
1016 }
1017
f56799ea
JK		 1018 adapter->num_tx_queues = 1;
1019 adapter->num_rx_queues = 1;
581d708e
MC		 1020
1021 if (e1000_alloc_queues(adapter)) {
1022 DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
1023 return -ENOMEM;
1024 }
1025
1026#ifdef CONFIG_E1000_NAPI
f56799ea 1027 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1028 adapter->polling_netdev[i].priv = adapter;
1029 adapter->polling_netdev[i].poll = &e1000_clean;
1030 adapter->polling_netdev[i].weight = 64;
1031 dev_hold(&adapter->polling_netdev[i]);
1032 set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
1033 }
7bfa4816 1034 spin_lock_init(&adapter->tx_queue_lock);
24025e4e
MC		 1035#endif
1036
1da177e4
LT		 1037 atomic_set(&adapter->irq_sem, 1);
1038 spin_lock_init(&adapter->stats_lock);
1da177e4
LT		 1039
1040 return 0;
1041}
1042
581d708e
MC		 1043/**
1044 * e1000_alloc_queues - Allocate memory for all rings
1045 * @adapter: board private structure to initialize
1046 *
1047 * We allocate one ring per queue at run-time since we don't know the
1048 * number of queues at compile-time. The polling_netdev array is
1049 * intended for Multiqueue, but should work fine with a single queue.
1050 **/
1051
1052static int __devinit
1053e1000_alloc_queues(struct e1000_adapter *adapter)
1054{
1055 int size;
1056
f56799ea 1057 size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
581d708e
MC		 1058 adapter->tx_ring = kmalloc(size, GFP_KERNEL);
1059 if (!adapter->tx_ring)
1060 return -ENOMEM;
1061 memset(adapter->tx_ring, 0, size);
1062
f56799ea 1063 size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
581d708e
MC		 1064 adapter->rx_ring = kmalloc(size, GFP_KERNEL);
1065 if (!adapter->rx_ring) {
1066 kfree(adapter->tx_ring);
1067 return -ENOMEM;
1068 }
1069 memset(adapter->rx_ring, 0, size);
1070
1071#ifdef CONFIG_E1000_NAPI
f56799ea 1072 size = sizeof(struct net_device) * adapter->num_rx_queues;
581d708e
MC		 1073 adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
1074 if (!adapter->polling_netdev) {
1075 kfree(adapter->tx_ring);
1076 kfree(adapter->rx_ring);
1077 return -ENOMEM;
1078 }
1079 memset(adapter->polling_netdev, 0, size);
1080#endif
1081
1082 return E1000_SUCCESS;
1083}
1084
1da177e4
LT		 1085/**
1086 * e1000_open - Called when a network interface is made active
1087 * @netdev: network interface device structure
1088 *
1089 * Returns 0 on success, negative value on failure
1090 *
1091 * The open entry point is called when a network interface is made
1092 * active by the system (IFF_UP). At this point all resources needed
1093 * for transmit and receive operations are allocated, the interrupt
1094 * handler is registered with the OS, the watchdog timer is started,
1095 * and the stack is notified that the interface is ready.
1096 **/
1097
1098static int
1099e1000_open(struct net_device *netdev)
1100{
60490fe0 1101 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1102 int err;
1103
1104 /* allocate transmit descriptors */
1105
581d708e 1106 if ((err = e1000_setup_all_tx_resources(adapter)))
1da177e4
LT		 1107 goto err_setup_tx;
1108
1109 /* allocate receive descriptors */
1110
581d708e 1111 if ((err = e1000_setup_all_rx_resources(adapter)))
1da177e4
LT		 1112 goto err_setup_rx;
1113
96838a40 1114 if ((err = e1000_up(adapter)))
1da177e4 1115 goto err_up;
2d7edb92 1116 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
96838a40 1117 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1118 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1119 e1000_update_mng_vlan(adapter);
1120 }
1da177e4 1121
b55ccb35
JK		 1122 /* If AMT is enabled, let the firmware know that the network
1123 * interface is now open */
1124 if (adapter->hw.mac_type == e1000_82573 &&
1125 e1000_check_mng_mode(&adapter->hw))
1126 e1000_get_hw_control(adapter);
1127
1da177e4
LT		 1128 return E1000_SUCCESS;
1129
1130err_up:
581d708e 1131 e1000_free_all_rx_resources(adapter);
1da177e4 1132err_setup_rx:
581d708e 1133 e1000_free_all_tx_resources(adapter);
1da177e4
LT		 1134err_setup_tx:
1135 e1000_reset(adapter);
1136
1137 return err;
1138}
1139
1140/**
1141 * e1000_close - Disables a network interface
1142 * @netdev: network interface device structure
1143 *
1144 * Returns 0, this is not allowed to fail
1145 *
1146 * The close entry point is called when an interface is de-activated
1147 * by the OS. The hardware is still under the drivers control, but
1148 * needs to be disabled. A global MAC reset is issued to stop the
1149 * hardware, and all transmit and receive resources are freed.
1150 **/
1151
1152static int
1153e1000_close(struct net_device *netdev)
1154{
60490fe0 1155 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 1156
1157 e1000_down(adapter);
1158
581d708e
MC		 1159 e1000_free_all_tx_resources(adapter);
1160 e1000_free_all_rx_resources(adapter);
1da177e4 1161
96838a40 1162 if ((adapter->hw.mng_cookie.status &
2d7edb92
MC		 1163 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
1164 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
1165 }
b55ccb35
JK		 1166
1167 /* If AMT is enabled, let the firmware know that the network
1168 * interface is now closed */
1169 if (adapter->hw.mac_type == e1000_82573 &&
1170 e1000_check_mng_mode(&adapter->hw))
1171 e1000_release_hw_control(adapter);
1172
1da177e4
LT		 1173 return 0;
1174}
1175
1176/**
1177 * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
1178 * @adapter: address of board private structure
2d7edb92
MC		 1179 * @start: address of beginning of memory
1180 * @len: length of memory
1da177e4
LT		 1181 **/
1182static inline boolean_t
1183e1000_check_64k_bound(struct e1000_adapter *adapter,
1184 void *start, unsigned long len)
1185{
1186 unsigned long begin = (unsigned long) start;
1187 unsigned long end = begin + len;
1188
2648345f
MC		 1189 /* First rev 82545 and 82546 need to not allow any memory
1190 * write location to cross 64k boundary due to errata 23 */
1da177e4 1191 if (adapter->hw.mac_type == e1000_82545 ||
2648345f 1192 adapter->hw.mac_type == e1000_82546) {
1da177e4
LT		 1193 return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
1194 }
1195
1196 return TRUE;
1197}
1198
1199/**
1200 * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
1201 * @adapter: board private structure
581d708e 1202 * @txdr: tx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1203 *
1204 * Return 0 on success, negative on failure
1205 **/
1206
3ad2cc67 1207static int
581d708e
MC		 1208e1000_setup_tx_resources(struct e1000_adapter *adapter,
1209 struct e1000_tx_ring *txdr)
1da177e4 1210{
1da177e4
LT		 1211 struct pci_dev *pdev = adapter->pdev;
1212 int size;
1213
1214 size = sizeof(struct e1000_buffer) * txdr->count;
a7ec15da
RT		 1215
1216 txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
96838a40 1217 if (!txdr->buffer_info) {
2648345f
MC		 1218 DPRINTK(PROBE, ERR,
1219 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1220 return -ENOMEM;
1221 }
1222 memset(txdr->buffer_info, 0, size);
1223
1224 /* round up to nearest 4K */
1225
1226 txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
1227 E1000_ROUNDUP(txdr->size, 4096);
1228
1229 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
96838a40 1230 if (!txdr->desc) {
1da177e4 1231setup_tx_desc_die:
1da177e4 1232 vfree(txdr->buffer_info);
2648345f
MC		 1233 DPRINTK(PROBE, ERR,
1234 "Unable to allocate memory for the transmit descriptor ring\n");
1da177e4
LT		 1235 return -ENOMEM;
1236 }
1237
2648345f 1238 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1239 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1240 void *olddesc = txdr->desc;
1241 dma_addr_t olddma = txdr->dma;
2648345f
MC		 1242 DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
1243 "at %p\n", txdr->size, txdr->desc);
1244 /* Try again, without freeing the previous */
1da177e4 1245 txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
2648345f 1246 /* Failed allocation, critical failure */
96838a40 1247 if (!txdr->desc) {
1da177e4
LT		 1248 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1249 goto setup_tx_desc_die;
1250 }
1251
1252 if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
1253 /* give up */
2648345f
MC		 1254 pci_free_consistent(pdev, txdr->size, txdr->desc,
1255 txdr->dma);
1da177e4
LT		 1256 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1257 DPRINTK(PROBE, ERR,
2648345f
MC		 1258 "Unable to allocate aligned memory "
1259 "for the transmit descriptor ring\n");
1da177e4
LT		 1260 vfree(txdr->buffer_info);
1261 return -ENOMEM;
1262 } else {
2648345f 1263 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1264 pci_free_consistent(pdev, txdr->size, olddesc, olddma);
1265 }
1266 }
1267 memset(txdr->desc, 0, txdr->size);
1268
1269 txdr->next_to_use = 0;
1270 txdr->next_to_clean = 0;
2ae76d98 1271 spin_lock_init(&txdr->tx_lock);
1da177e4
LT		 1272
1273 return 0;
1274}
1275
581d708e
MC		 1276/**
1277 * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
1278 * (Descriptors) for all queues
1279 * @adapter: board private structure
1280 *
1281 * If this function returns with an error, then it's possible one or
1282 * more of the rings is populated (while the rest are not). It is the
1283 * callers duty to clean those orphaned rings.
1284 *
1285 * Return 0 on success, negative on failure
1286 **/
1287
1288int
1289e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
1290{
1291 int i, err = 0;
1292
f56799ea 1293 for (i = 0; i < adapter->num_tx_queues; i++) {
581d708e
MC		 1294 err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
1295 if (err) {
1296 DPRINTK(PROBE, ERR,
1297 "Allocation for Tx Queue %u failed\n", i);
1298 break;
1299 }
1300 }
1301
1302 return err;
1303}
1304
1da177e4
LT		 1305/**
1306 * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
1307 * @adapter: board private structure
1308 *
1309 * Configure the Tx unit of the MAC after a reset.
1310 **/
1311
1312static void
1313e1000_configure_tx(struct e1000_adapter *adapter)
1314{
581d708e
MC		 1315 uint64_t tdba;
1316 struct e1000_hw *hw = &adapter->hw;
1317 uint32_t tdlen, tctl, tipg, tarc;
0fadb059 1318 uint32_t ipgr1, ipgr2;
1da177e4
LT		 1319
1320 /* Setup the HW Tx Head and Tail descriptor pointers */
1321
f56799ea 1322 switch (adapter->num_tx_queues) {
24025e4e
MC		 1323 case 1:
1324 default:
581d708e
MC		 1325 tdba = adapter->tx_ring[0].dma;
1326 tdlen = adapter->tx_ring[0].count *
1327 sizeof(struct e1000_tx_desc);
1328 E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
1329 E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
1330 E1000_WRITE_REG(hw, TDLEN, tdlen);
1331 E1000_WRITE_REG(hw, TDH, 0);
1332 E1000_WRITE_REG(hw, TDT, 0);
1333 adapter->tx_ring[0].tdh = E1000_TDH;
1334 adapter->tx_ring[0].tdt = E1000_TDT;
24025e4e
MC		 1335 break;
1336 }
1da177e4
LT		 1337
1338 /* Set the default values for the Tx Inter Packet Gap timer */
1339
0fadb059
JK		 1340 if (hw->media_type == e1000_media_type_fiber ||
1341 hw->media_type == e1000_media_type_internal_serdes)
1342 tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
1343 else
1344 tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
1345
581d708e 1346 switch (hw->mac_type) {
1da177e4
LT		 1347 case e1000_82542_rev2_0:
1348 case e1000_82542_rev2_1:
1349 tipg = DEFAULT_82542_TIPG_IPGT;
0fadb059
JK		 1350 ipgr1 = DEFAULT_82542_TIPG_IPGR1;
1351 ipgr2 = DEFAULT_82542_TIPG_IPGR2;
1da177e4 1352 break;
87041639
JK		 1353 case e1000_80003es2lan:
1354 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1355 ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
1356 break;
1da177e4 1357 default:
0fadb059
JK		 1358 ipgr1 = DEFAULT_82543_TIPG_IPGR1;
1359 ipgr2 = DEFAULT_82543_TIPG_IPGR2;
1360 break;
1da177e4 1361 }
0fadb059
JK		 1362 tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
1363 tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
581d708e 1364 E1000_WRITE_REG(hw, TIPG, tipg);
1da177e4
LT		 1365
1366 /* Set the Tx Interrupt Delay register */
1367
581d708e
MC		 1368 E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
1369 if (hw->mac_type >= e1000_82540)
1370 E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
1da177e4
LT		 1371
1372 /* Program the Transmit Control Register */
1373
581d708e 1374 tctl = E1000_READ_REG(hw, TCTL);
1da177e4
LT		 1375
1376 tctl &= ~E1000_TCTL_CT;
7e6c9861 1377 tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
1da177e4
LT		 1378 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
1379
7e6c9861
JK		 1380#ifdef DISABLE_MULR
1381 /* disable Multiple Reads for debugging */
1382 tctl &= ~E1000_TCTL_MULR;
1383#endif
1da177e4 1384
2ae76d98
MC		 1385 if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
1386 tarc = E1000_READ_REG(hw, TARC0);
1387 tarc |= ((1 << 25) | (1 << 21));
1388 E1000_WRITE_REG(hw, TARC0, tarc);
1389 tarc = E1000_READ_REG(hw, TARC1);
1390 tarc |= (1 << 25);
1391 if (tctl & E1000_TCTL_MULR)
1392 tarc &= ~(1 << 28);
1393 else
1394 tarc |= (1 << 28);
1395 E1000_WRITE_REG(hw, TARC1, tarc);
87041639
JK		 1396 } else if (hw->mac_type == e1000_80003es2lan) {
1397 tarc = E1000_READ_REG(hw, TARC0);
1398 tarc |= 1;
1399 if (hw->media_type == e1000_media_type_internal_serdes)
1400 tarc |= (1 << 20);
1401 E1000_WRITE_REG(hw, TARC0, tarc);
1402 tarc = E1000_READ_REG(hw, TARC1);
1403 tarc |= 1;
1404 E1000_WRITE_REG(hw, TARC1, tarc);
2ae76d98
MC		 1405 }
1406
581d708e 1407 e1000_config_collision_dist(hw);
1da177e4
LT		 1408
1409 /* Setup Transmit Descriptor Settings for eop descriptor */
1410 adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
1411 E1000_TXD_CMD_IFCS;
1412
581d708e 1413 if (hw->mac_type < e1000_82543)
1da177e4
LT		 1414 adapter->txd_cmd |= E1000_TXD_CMD_RPS;
1415 else
1416 adapter->txd_cmd |= E1000_TXD_CMD_RS;
1417
1418 /* Cache if we're 82544 running in PCI-X because we'll
1419 * need this to apply a workaround later in the send path. */
581d708e
MC		 1420 if (hw->mac_type == e1000_82544 &&
1421 hw->bus_type == e1000_bus_type_pcix)
1da177e4 1422 adapter->pcix_82544 = 1;
7e6c9861
JK		 1423
1424 E1000_WRITE_REG(hw, TCTL, tctl);
1425
1da177e4
LT		 1426}
1427
1428/**
1429 * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
1430 * @adapter: board private structure
581d708e 1431 * @rxdr: rx descriptor ring (for a specific queue) to setup
1da177e4
LT		 1432 *
1433 * Returns 0 on success, negative on failure
1434 **/
1435
3ad2cc67 1436static int
581d708e
MC		 1437e1000_setup_rx_resources(struct e1000_adapter *adapter,
1438 struct e1000_rx_ring *rxdr)
1da177e4 1439{
1da177e4 1440 struct pci_dev *pdev = adapter->pdev;
2d7edb92 1441 int size, desc_len;
1da177e4
LT		 1442
1443 size = sizeof(struct e1000_buffer) * rxdr->count;
a7ec15da 1444 rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
581d708e 1445 if (!rxdr->buffer_info) {
2648345f
MC		 1446 DPRINTK(PROBE, ERR,
1447 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4
LT		 1448 return -ENOMEM;
1449 }
1450 memset(rxdr->buffer_info, 0, size);
1451
2d7edb92
MC		 1452 size = sizeof(struct e1000_ps_page) * rxdr->count;
1453 rxdr->ps_page = kmalloc(size, GFP_KERNEL);
96838a40 1454 if (!rxdr->ps_page) {
2d7edb92
MC		 1455 vfree(rxdr->buffer_info);
1456 DPRINTK(PROBE, ERR,
1457 "Unable to allocate memory for the receive descriptor ring\n");
1458 return -ENOMEM;
1459 }
1460 memset(rxdr->ps_page, 0, size);
1461
1462 size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
1463 rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
96838a40 1464 if (!rxdr->ps_page_dma) {
2d7edb92
MC		 1465 vfree(rxdr->buffer_info);
1466 kfree(rxdr->ps_page);
1467 DPRINTK(PROBE, ERR,
1468 "Unable to allocate memory for the receive descriptor ring\n");
1469 return -ENOMEM;
1470 }
1471 memset(rxdr->ps_page_dma, 0, size);
1472
96838a40 1473 if (adapter->hw.mac_type <= e1000_82547_rev_2)
2d7edb92
MC		 1474 desc_len = sizeof(struct e1000_rx_desc);
1475 else
1476 desc_len = sizeof(union e1000_rx_desc_packet_split);
1477
1da177e4
LT		 1478 /* Round up to nearest 4K */
1479
2d7edb92 1480 rxdr->size = rxdr->count * desc_len;
1da177e4
LT		 1481 E1000_ROUNDUP(rxdr->size, 4096);
1482
1483 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
1484
581d708e
MC		 1485 if (!rxdr->desc) {
1486 DPRINTK(PROBE, ERR,
1487 "Unable to allocate memory for the receive descriptor ring\n");
1da177e4 1488setup_rx_desc_die:
1da177e4 1489 vfree(rxdr->buffer_info);
2d7edb92
MC		 1490 kfree(rxdr->ps_page);
1491 kfree(rxdr->ps_page_dma);
1da177e4
LT		 1492 return -ENOMEM;
1493 }
1494
2648345f 1495 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 1496 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1497 void *olddesc = rxdr->desc;
1498 dma_addr_t olddma = rxdr->dma;
2648345f
MC		 1499 DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
1500 "at %p\n", rxdr->size, rxdr->desc);
1501 /* Try again, without freeing the previous */
1da177e4 1502 rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
2648345f 1503 /* Failed allocation, critical failure */
581d708e 1504 if (!rxdr->desc) {
1da177e4 1505 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
581d708e
MC		 1506 DPRINTK(PROBE, ERR,
1507 "Unable to allocate memory "
1508 "for the receive descriptor ring\n");
1da177e4
LT		 1509 goto setup_rx_desc_die;
1510 }
1511
1512 if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
1513 /* give up */
2648345f
MC		 1514 pci_free_consistent(pdev, rxdr->size, rxdr->desc,
1515 rxdr->dma);
1da177e4 1516 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
2648345f
MC		 1517 DPRINTK(PROBE, ERR,
1518 "Unable to allocate aligned memory "
1519 "for the receive descriptor ring\n");
581d708e 1520 goto setup_rx_desc_die;
1da177e4 1521 } else {
2648345f 1522 /* Free old allocation, new allocation was successful */
1da177e4
LT		 1523 pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
1524 }
1525 }
1526 memset(rxdr->desc, 0, rxdr->size);
1527
1528 rxdr->next_to_clean = 0;
1529 rxdr->next_to_use = 0;
1530
1531 return 0;
1532}
1533
581d708e
MC		 1534/**
1535 * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
1536 * (Descriptors) for all queues
1537 * @adapter: board private structure
1538 *
1539 * If this function returns with an error, then it's possible one or
1540 * more of the rings is populated (while the rest are not). It is the
1541 * callers duty to clean those orphaned rings.
1542 *
1543 * Return 0 on success, negative on failure
1544 **/
1545
1546int
1547e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
1548{
1549 int i, err = 0;
1550
f56799ea 1551 for (i = 0; i < adapter->num_rx_queues; i++) {
581d708e
MC		 1552 err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
1553 if (err) {
1554 DPRINTK(PROBE, ERR,
1555 "Allocation for Rx Queue %u failed\n", i);
1556 break;
1557 }
1558 }
1559
1560 return err;
1561}
1562
1da177e4 1563/**
2648345f 1564 * e1000_setup_rctl - configure the receive control registers
1da177e4
LT		 1565 * @adapter: Board private structure
1566 **/
e4c811c9
MC		 1567#define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
1568 (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
1da177e4
LT		 1569static void
1570e1000_setup_rctl(struct e1000_adapter *adapter)
1571{
2d7edb92
MC		 1572 uint32_t rctl, rfctl;
1573 uint32_t psrctl = 0;
35ec56bb 1574#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
e4c811c9
MC		 1575 uint32_t pages = 0;
1576#endif
1da177e4
LT		 1577
1578 rctl = E1000_READ_REG(&adapter->hw, RCTL);
1579
1580 rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
1581
1582 rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
1583 E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
1584 (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
1585
0fadb059
JK		 1586 if (adapter->hw.mac_type > e1000_82543)
1587 rctl |= E1000_RCTL_SECRC;
1588
1589 if (adapter->hw.tbi_compatibility_on == 1)
1da177e4
LT		 1590 rctl |= E1000_RCTL_SBP;
1591 else
1592 rctl &= ~E1000_RCTL_SBP;
1593
2d7edb92
MC		 1594 if (adapter->netdev->mtu <= ETH_DATA_LEN)
1595 rctl &= ~E1000_RCTL_LPE;
1596 else
1597 rctl |= E1000_RCTL_LPE;
1598
1da177e4 1599 /* Setup buffer sizes */
96838a40 1600 if (adapter->hw.mac_type >= e1000_82571) {
2d7edb92
MC		 1601 /* We can now specify buffers in 1K increments.
1602 * BSIZE and BSEX are ignored in this case. */
1603 rctl |= adapter->rx_buffer_len << 0x11;
1604 } else {
1605 rctl &= ~E1000_RCTL_SZ_4096;
a1415ee6
JK		 1606 rctl |= E1000_RCTL_BSEX;
1607 switch (adapter->rx_buffer_len) {
1608 case E1000_RXBUFFER_2048:
1609 default:
1610 rctl |= E1000_RCTL_SZ_2048;
1611 rctl &= ~E1000_RCTL_BSEX;
1612 break;
1613 case E1000_RXBUFFER_4096:
1614 rctl |= E1000_RCTL_SZ_4096;
1615 break;
1616 case E1000_RXBUFFER_8192:
1617 rctl |= E1000_RCTL_SZ_8192;
1618 break;
1619 case E1000_RXBUFFER_16384:
1620 rctl |= E1000_RCTL_SZ_16384;
1621 break;
1622 }
2d7edb92
MC		 1623 }
1624
35ec56bb 1625#ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
2d7edb92
MC		 1626 /* 82571 and greater support packet-split where the protocol
1627 * header is placed in skb->data and the packet data is
1628 * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
1629 * In the case of a non-split, skb->data is linearly filled,
1630 * followed by the page buffers. Therefore, skb->data is
1631 * sized to hold the largest protocol header.
1632 */
e4c811c9
MC		 1633 pages = PAGE_USE_COUNT(adapter->netdev->mtu);
1634 if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
1635 PAGE_SIZE <= 16384)
1636 adapter->rx_ps_pages = pages;
1637 else
1638 adapter->rx_ps_pages = 0;
2d7edb92 1639#endif
e4c811c9 1640 if (adapter->rx_ps_pages) {
2d7edb92
MC		 1641 /* Configure extra packet-split registers */
1642 rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
1643 rfctl |= E1000_RFCTL_EXTEN;
1644 /* disable IPv6 packet split support */
1645 rfctl |= E1000_RFCTL_IPV6_DIS;
1646 E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
1647
1648 rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
96838a40 1649
2d7edb92
MC		 1650 psrctl |= adapter->rx_ps_bsize0 >>
1651 E1000_PSRCTL_BSIZE0_SHIFT;
e4c811c9
MC		 1652
1653 switch (adapter->rx_ps_pages) {
1654 case 3:
1655 psrctl |= PAGE_SIZE <<
1656 E1000_PSRCTL_BSIZE3_SHIFT;
1657 case 2:
1658 psrctl |= PAGE_SIZE <<
1659 E1000_PSRCTL_BSIZE2_SHIFT;
1660 case 1:
1661 psrctl |= PAGE_SIZE >>
1662 E1000_PSRCTL_BSIZE1_SHIFT;
1663 break;
1664 }
2d7edb92
MC		 1665
1666 E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
1da177e4
LT		 1667 }
1668
1669 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
1670}
1671
1672/**
1673 * e1000_configure_rx - Configure 8254x Receive Unit after Reset
1674 * @adapter: board private structure
1675 *
1676 * Configure the Rx unit of the MAC after a reset.
1677 **/
1678
1679static void
1680e1000_configure_rx(struct e1000_adapter *adapter)
1681{
581d708e
MC		 1682 uint64_t rdba;
1683 struct e1000_hw *hw = &adapter->hw;
1684 uint32_t rdlen, rctl, rxcsum, ctrl_ext;
2d7edb92 1685
e4c811c9 1686 if (adapter->rx_ps_pages) {
0f15a8fa 1687 /* this is a 32 byte descriptor */
581d708e 1688 rdlen = adapter->rx_ring[0].count *
2d7edb92
MC		 1689 sizeof(union e1000_rx_desc_packet_split);
1690 adapter->clean_rx = e1000_clean_rx_irq_ps;
1691 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
1692 } else {
581d708e
MC		 1693 rdlen = adapter->rx_ring[0].count *
1694 sizeof(struct e1000_rx_desc);
2d7edb92
MC		 1695 adapter->clean_rx = e1000_clean_rx_irq;
1696 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
1697 }
1da177e4
LT		 1698
1699 /* disable receives while setting up the descriptors */
581d708e
MC		 1700 rctl = E1000_READ_REG(hw, RCTL);
1701 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
1da177e4
LT		 1702
1703 /* set the Receive Delay Timer Register */
581d708e 1704 E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
1da177e4 1705
581d708e
MC		 1706 if (hw->mac_type >= e1000_82540) {
1707 E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
96838a40 1708 if (adapter->itr > 1)
581d708e 1709 E1000_WRITE_REG(hw, ITR,
1da177e4
LT		 1710 1000000000 / (adapter->itr * 256));
1711 }
1712
2ae76d98 1713 if (hw->mac_type >= e1000_82571) {
2ae76d98 1714 ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
1e613fd9 1715 /* Reset delay timers after every interrupt */
2ae76d98 1716 ctrl_ext |= E1000_CTRL_EXT_CANC;
1e613fd9
JK		 1717#ifdef CONFIG_E1000_NAPI
1718 /* Auto-Mask interrupts upon ICR read. */
1719 ctrl_ext |= E1000_CTRL_EXT_IAME;
1720#endif
2ae76d98 1721 E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
1e613fd9 1722 E1000_WRITE_REG(hw, IAM, ~0);
2ae76d98
MC		 1723 E1000_WRITE_FLUSH(hw);
1724 }
1725
581d708e
MC		 1726 /* Setup the HW Rx Head and Tail Descriptor Pointers and
1727 * the Base and Length of the Rx Descriptor Ring */
f56799ea 1728 switch (adapter->num_rx_queues) {
24025e4e
MC		 1729 case 1:
1730 default:
581d708e
MC		 1731 rdba = adapter->rx_ring[0].dma;
1732 E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
1733 E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
1734 E1000_WRITE_REG(hw, RDLEN, rdlen);
1735 E1000_WRITE_REG(hw, RDH, 0);
1736 E1000_WRITE_REG(hw, RDT, 0);
1737 adapter->rx_ring[0].rdh = E1000_RDH;
1738 adapter->rx_ring[0].rdt = E1000_RDT;
1739 break;
24025e4e
MC		 1740 }
1741
1da177e4 1742 /* Enable 82543 Receive Checksum Offload for TCP and UDP */
581d708e
MC		 1743 if (hw->mac_type >= e1000_82543) {
1744 rxcsum = E1000_READ_REG(hw, RXCSUM);
96838a40 1745 if (adapter->rx_csum == TRUE) {
2d7edb92
MC		 1746 rxcsum |= E1000_RXCSUM_TUOFL;
1747
868d5309 1748 /* Enable 82571 IPv4 payload checksum for UDP fragments
2d7edb92 1749 * Must be used in conjunction with packet-split. */
96838a40
JB		 1750 if ((hw->mac_type >= e1000_82571) &&
1751 (adapter->rx_ps_pages)) {
2d7edb92
MC		 1752 rxcsum |= E1000_RXCSUM_IPPCSE;
1753 }
1754 } else {
1755 rxcsum &= ~E1000_RXCSUM_TUOFL;
1756 /* don't need to clear IPPCSE as it defaults to 0 */
1757 }
581d708e 1758 E1000_WRITE_REG(hw, RXCSUM, rxcsum);
1da177e4
LT		 1759 }
1760
581d708e
MC		 1761 if (hw->mac_type == e1000_82573)
1762 E1000_WRITE_REG(hw, ERT, 0x0100);
2d7edb92 1763
1da177e4 1764 /* Enable Receives */
581d708e 1765 E1000_WRITE_REG(hw, RCTL, rctl);
1da177e4
LT		 1766}
1767
1768/**
581d708e 1769 * e1000_free_tx_resources - Free Tx Resources per Queue
1da177e4 1770 * @adapter: board private structure
581d708e 1771 * @tx_ring: Tx descriptor ring for a specific queue
1da177e4
LT		 1772 *
1773 * Free all transmit software resources
1774 **/
1775
3ad2cc67 1776static void
581d708e
MC		 1777e1000_free_tx_resources(struct e1000_adapter *adapter,
1778 struct e1000_tx_ring *tx_ring)
1da177e4
LT		 1779{
1780 struct pci_dev *pdev = adapter->pdev;
1781
581d708e 1782 e1000_clean_tx_ring(adapter, tx_ring);
1da177e4 1783
581d708e
MC		 1784 vfree(tx_ring->buffer_info);
1785 tx_ring->buffer_info = NULL;
1da177e4 1786
581d708e 1787 pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
1da177e4 1788
581d708e
MC		 1789 tx_ring->desc = NULL;
1790}
1791
1792/**
1793 * e1000_free_all_tx_resources - Free Tx Resources for All Queues
1794 * @adapter: board private structure
1795 *
1796 * Free all transmit software resources
1797 **/
1798
1799void
1800e1000_free_all_tx_resources(struct e1000_adapter *adapter)
1801{
1802 int i;
1803
f56799ea 1804 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1805 e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1806}
1807
1808static inline void
1809e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
1810 struct e1000_buffer *buffer_info)
1811{
96838a40 1812 if (buffer_info->dma) {
2648345f
MC		 1813 pci_unmap_page(adapter->pdev,
1814 buffer_info->dma,
1815 buffer_info->length,
1816 PCI_DMA_TODEVICE);
1da177e4 1817 }
8241e35e 1818 if (buffer_info->skb)
1da177e4 1819 dev_kfree_skb_any(buffer_info->skb);
8241e35e 1820 memset(buffer_info, 0, sizeof(struct e1000_buffer));
1da177e4
LT		 1821}
1822
1823/**
1824 * e1000_clean_tx_ring - Free Tx Buffers
1825 * @adapter: board private structure
581d708e 1826 * @tx_ring: ring to be cleaned
1da177e4
LT		 1827 **/
1828
1829static void
581d708e
MC		 1830e1000_clean_tx_ring(struct e1000_adapter *adapter,
1831 struct e1000_tx_ring *tx_ring)
1da177e4 1832{
1da177e4
LT		 1833 struct e1000_buffer *buffer_info;
1834 unsigned long size;
1835 unsigned int i;
1836
1837 /* Free all the Tx ring sk_buffs */
1838
96838a40 1839 for (i = 0; i < tx_ring->count; i++) {
1da177e4
LT		 1840 buffer_info = &tx_ring->buffer_info[i];
1841 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
1842 }
1843
1844 size = sizeof(struct e1000_buffer) * tx_ring->count;
1845 memset(tx_ring->buffer_info, 0, size);
1846
1847 /* Zero out the descriptor ring */
1848
1849 memset(tx_ring->desc, 0, tx_ring->size);
1850
1851 tx_ring->next_to_use = 0;
1852 tx_ring->next_to_clean = 0;
fd803241 1853 tx_ring->last_tx_tso = 0;
1da177e4 1854
581d708e
MC		 1855 writel(0, adapter->hw.hw_addr + tx_ring->tdh);
1856 writel(0, adapter->hw.hw_addr + tx_ring->tdt);
1857}
1858
1859/**
1860 * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
1861 * @adapter: board private structure
1862 **/
1863
1864static void
1865e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
1866{
1867 int i;
1868
f56799ea 1869 for (i = 0; i < adapter->num_tx_queues; i++)
581d708e 1870 e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
1da177e4
LT		 1871}
1872
1873/**
1874 * e1000_free_rx_resources - Free Rx Resources
1875 * @adapter: board private structure
581d708e 1876 * @rx_ring: ring to clean the resources from
1da177e4
LT		 1877 *
1878 * Free all receive software resources
1879 **/
1880
3ad2cc67 1881static void
581d708e
MC		 1882e1000_free_rx_resources(struct e1000_adapter *adapter,
1883 struct e1000_rx_ring *rx_ring)
1da177e4 1884{
1da177e4
LT		 1885 struct pci_dev *pdev = adapter->pdev;
1886
581d708e 1887 e1000_clean_rx_ring(adapter, rx_ring);
1da177e4
LT		 1888
1889 vfree(rx_ring->buffer_info);
1890 rx_ring->buffer_info = NULL;
2d7edb92
MC		 1891 kfree(rx_ring->ps_page);
1892 rx_ring->ps_page = NULL;
1893 kfree(rx_ring->ps_page_dma);
1894 rx_ring->ps_page_dma = NULL;
1da177e4
LT		 1895
1896 pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
1897
1898 rx_ring->desc = NULL;
1899}
1900
1901/**
581d708e 1902 * e1000_free_all_rx_resources - Free Rx Resources for All Queues
1da177e4 1903 * @adapter: board private structure
581d708e
MC		 1904 *
1905 * Free all receive software resources
1906 **/
1907
1908void
1909e1000_free_all_rx_resources(struct e1000_adapter *adapter)
1910{
1911 int i;
1912
f56799ea 1913 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e
MC		 1914 e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
1915}
1916
1917/**
1918 * e1000_clean_rx_ring - Free Rx Buffers per Queue
1919 * @adapter: board private structure
1920 * @rx_ring: ring to free buffers from
1da177e4
LT		 1921 **/
1922
1923static void
581d708e
MC		 1924e1000_clean_rx_ring(struct e1000_adapter *adapter,
1925 struct e1000_rx_ring *rx_ring)
1da177e4 1926{
1da177e4 1927 struct e1000_buffer *buffer_info;
2d7edb92
MC		 1928 struct e1000_ps_page *ps_page;
1929 struct e1000_ps_page_dma *ps_page_dma;
1da177e4
LT		 1930 struct pci_dev *pdev = adapter->pdev;
1931 unsigned long size;
2d7edb92 1932 unsigned int i, j;
1da177e4
LT		 1933
1934 /* Free all the Rx ring sk_buffs */
96838a40 1935 for (i = 0; i < rx_ring->count; i++) {
1da177e4 1936 buffer_info = &rx_ring->buffer_info[i];
96838a40 1937 if (buffer_info->skb) {
1da177e4
LT		 1938 pci_unmap_single(pdev,
1939 buffer_info->dma,
1940 buffer_info->length,
1941 PCI_DMA_FROMDEVICE);
1942
1943 dev_kfree_skb(buffer_info->skb);
1944 buffer_info->skb = NULL;
997f5cbd
JK		 1945 }
1946 ps_page = &rx_ring->ps_page[i];
1947 ps_page_dma = &rx_ring->ps_page_dma[i];
1948 for (j = 0; j < adapter->rx_ps_pages; j++) {
1949 if (!ps_page->ps_page[j]) break;
1950 pci_unmap_page(pdev,
1951 ps_page_dma->ps_page_dma[j],
1952 PAGE_SIZE, PCI_DMA_FROMDEVICE);
1953 ps_page_dma->ps_page_dma[j] = 0;
1954 put_page(ps_page->ps_page[j]);
1955 ps_page->ps_page[j] = NULL;
1da177e4
LT		 1956 }
1957 }
1958
1959 size = sizeof(struct e1000_buffer) * rx_ring->count;
1960 memset(rx_ring->buffer_info, 0, size);
2d7edb92
MC		 1961 size = sizeof(struct e1000_ps_page) * rx_ring->count;
1962 memset(rx_ring->ps_page, 0, size);
1963 size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
1964 memset(rx_ring->ps_page_dma, 0, size);
1da177e4
LT		 1965
1966 /* Zero out the descriptor ring */
1967
1968 memset(rx_ring->desc, 0, rx_ring->size);
1969
1970 rx_ring->next_to_clean = 0;
1971 rx_ring->next_to_use = 0;
1972
581d708e
MC		 1973 writel(0, adapter->hw.hw_addr + rx_ring->rdh);
1974 writel(0, adapter->hw.hw_addr + rx_ring->rdt);
1975}
1976
1977/**
1978 * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
1979 * @adapter: board private structure
1980 **/
1981
1982static void
1983e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
1984{
1985 int i;
1986
f56799ea 1987 for (i = 0; i < adapter->num_rx_queues; i++)
581d708e 1988 e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
1da177e4
LT		 1989}
1990
1991/* The 82542 2.0 (revision 2) needs to have the receive unit in reset
1992 * and memory write and invalidate disabled for certain operations
1993 */
1994static void
1995e1000_enter_82542_rst(struct e1000_adapter *adapter)
1996{
1997 struct net_device *netdev = adapter->netdev;
1998 uint32_t rctl;
1999
2000 e1000_pci_clear_mwi(&adapter->hw);
2001
2002 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2003 rctl |= E1000_RCTL_RST;
2004 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2005 E1000_WRITE_FLUSH(&adapter->hw);
2006 mdelay(5);
2007
96838a40 2008 if (netif_running(netdev))
581d708e 2009 e1000_clean_all_rx_rings(adapter);
1da177e4
LT		 2010}
2011
2012static void
2013e1000_leave_82542_rst(struct e1000_adapter *adapter)
2014{
2015 struct net_device *netdev = adapter->netdev;
2016 uint32_t rctl;
2017
2018 rctl = E1000_READ_REG(&adapter->hw, RCTL);
2019 rctl &= ~E1000_RCTL_RST;
2020 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2021 E1000_WRITE_FLUSH(&adapter->hw);
2022 mdelay(5);
2023
96838a40 2024 if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
1da177e4
LT		 2025 e1000_pci_set_mwi(&adapter->hw);
2026
96838a40 2027 if (netif_running(netdev)) {
72d64a43
JK		 2028 /* No need to loop, because 82542 supports only 1 queue */
2029 struct e1000_rx_ring *ring = &adapter->rx_ring[0];
7c4d3367 2030 e1000_configure_rx(adapter);
72d64a43 2031 adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
1da177e4
LT		 2032 }
2033}
2034
2035/**
2036 * e1000_set_mac - Change the Ethernet Address of the NIC
2037 * @netdev: network interface device structure
2038 * @p: pointer to an address structure
2039 *
2040 * Returns 0 on success, negative on failure
2041 **/
2042
2043static int
2044e1000_set_mac(struct net_device *netdev, void *p)
2045{
60490fe0 2046 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2047 struct sockaddr *addr = p;
2048
96838a40 2049 if (!is_valid_ether_addr(addr->sa_data))
1da177e4
LT		 2050 return -EADDRNOTAVAIL;
2051
2052 /* 82542 2.0 needs to be in reset to write receive address registers */
2053
96838a40 2054 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2055 e1000_enter_82542_rst(adapter);
2056
2057 memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2058 memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
2059
2060 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2061
868d5309
MC		 2062 /* With 82571 controllers, LAA may be overwritten (with the default)
2063 * due to controller reset from the other port. */
2064 if (adapter->hw.mac_type == e1000_82571) {
2065 /* activate the work around */
2066 adapter->hw.laa_is_present = 1;
2067
96838a40
JB		 2068 /* Hold a copy of the LAA in RAR[14] This is done so that
2069 * between the time RAR[0] gets clobbered and the time it
2070 * gets fixed (in e1000_watchdog), the actual LAA is in one
868d5309 2071 * of the RARs and no incoming packets directed to this port
96838a40 2072 * are dropped. Eventaully the LAA will be in RAR[0] and
868d5309 2073 * RAR[14] */
96838a40 2074 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
868d5309
MC		 2075 E1000_RAR_ENTRIES - 1);
2076 }
2077
96838a40 2078 if (adapter->hw.mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2079 e1000_leave_82542_rst(adapter);
2080
2081 return 0;
2082}
2083
2084/**
2085 * e1000_set_multi - Multicast and Promiscuous mode set
2086 * @netdev: network interface device structure
2087 *
2088 * The set_multi entry point is called whenever the multicast address
2089 * list or the network interface flags are updated. This routine is
2090 * responsible for configuring the hardware for proper multicast,
2091 * promiscuous mode, and all-multi behavior.
2092 **/
2093
2094static void
2095e1000_set_multi(struct net_device *netdev)
2096{
60490fe0 2097 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2098 struct e1000_hw *hw = &adapter->hw;
2099 struct dev_mc_list *mc_ptr;
2100 uint32_t rctl;
2101 uint32_t hash_value;
868d5309 2102 int i, rar_entries = E1000_RAR_ENTRIES;
1da177e4 2103
868d5309
MC		 2104 /* reserve RAR[14] for LAA over-write work-around */
2105 if (adapter->hw.mac_type == e1000_82571)
2106 rar_entries--;
1da177e4 2107
2648345f
MC		 2108 /* Check for Promiscuous and All Multicast modes */
2109
1da177e4
LT		 2110 rctl = E1000_READ_REG(hw, RCTL);
2111
96838a40 2112 if (netdev->flags & IFF_PROMISC) {
1da177e4 2113 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
96838a40 2114 } else if (netdev->flags & IFF_ALLMULTI) {
1da177e4
LT		 2115 rctl |= E1000_RCTL_MPE;
2116 rctl &= ~E1000_RCTL_UPE;
2117 } else {
2118 rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
2119 }
2120
2121 E1000_WRITE_REG(hw, RCTL, rctl);
2122
2123 /* 82542 2.0 needs to be in reset to write receive address registers */
2124
96838a40 2125 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4
LT		 2126 e1000_enter_82542_rst(adapter);
2127
2128 /* load the first 14 multicast address into the exact filters 1-14
2129 * RAR 0 is used for the station MAC adddress
2130 * if there are not 14 addresses, go ahead and clear the filters
868d5309 2131 * -- with 82571 controllers only 0-13 entries are filled here
1da177e4
LT		 2132 */
2133 mc_ptr = netdev->mc_list;
2134
96838a40 2135 for (i = 1; i < rar_entries; i++) {
868d5309 2136 if (mc_ptr) {
1da177e4
LT		 2137 e1000_rar_set(hw, mc_ptr->dmi_addr, i);
2138 mc_ptr = mc_ptr->next;
2139 } else {
2140 E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
2141 E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
2142 }
2143 }
2144
2145 /* clear the old settings from the multicast hash table */
2146
96838a40 2147 for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
1da177e4
LT		 2148 E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
2149
2150 /* load any remaining addresses into the hash table */
2151
96838a40 2152 for (; mc_ptr; mc_ptr = mc_ptr->next) {
1da177e4
LT		 2153 hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
2154 e1000_mta_set(hw, hash_value);
2155 }
2156
96838a40 2157 if (hw->mac_type == e1000_82542_rev2_0)
1da177e4 2158 e1000_leave_82542_rst(adapter);
1da177e4
LT		 2159}
2160
2161/* Need to wait a few seconds after link up to get diagnostic information from
2162 * the phy */
2163
2164static void
2165e1000_update_phy_info(unsigned long data)
2166{
2167 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2168 e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
2169}
2170
2171/**
2172 * e1000_82547_tx_fifo_stall - Timer Call-back
2173 * @data: pointer to adapter cast into an unsigned long
2174 **/
2175
2176static void
2177e1000_82547_tx_fifo_stall(unsigned long data)
2178{
2179 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2180 struct net_device *netdev = adapter->netdev;
2181 uint32_t tctl;
2182
96838a40
JB		 2183 if (atomic_read(&adapter->tx_fifo_stall)) {
2184 if ((E1000_READ_REG(&adapter->hw, TDT) ==
1da177e4
LT		 2185 E1000_READ_REG(&adapter->hw, TDH)) &&
2186 (E1000_READ_REG(&adapter->hw, TDFT) ==
2187 E1000_READ_REG(&adapter->hw, TDFH)) &&
2188 (E1000_READ_REG(&adapter->hw, TDFTS) ==
2189 E1000_READ_REG(&adapter->hw, TDFHS))) {
2190 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2191 E1000_WRITE_REG(&adapter->hw, TCTL,
2192 tctl & ~E1000_TCTL_EN);
2193 E1000_WRITE_REG(&adapter->hw, TDFT,
2194 adapter->tx_head_addr);
2195 E1000_WRITE_REG(&adapter->hw, TDFH,
2196 adapter->tx_head_addr);
2197 E1000_WRITE_REG(&adapter->hw, TDFTS,
2198 adapter->tx_head_addr);
2199 E1000_WRITE_REG(&adapter->hw, TDFHS,
2200 adapter->tx_head_addr);
2201 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
2202 E1000_WRITE_FLUSH(&adapter->hw);
2203
2204 adapter->tx_fifo_head = 0;
2205 atomic_set(&adapter->tx_fifo_stall, 0);
2206 netif_wake_queue(netdev);
2207 } else {
2208 mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
2209 }
2210 }
2211}
2212
2213/**
2214 * e1000_watchdog - Timer Call-back
2215 * @data: pointer to adapter cast into an unsigned long
2216 **/
2217static void
2218e1000_watchdog(unsigned long data)
2219{
2220 struct e1000_adapter *adapter = (struct e1000_adapter *) data;
2221
2222 /* Do the rest outside of interrupt context */
2223 schedule_work(&adapter->watchdog_task);
2224}
2225
2226static void
2227e1000_watchdog_task(struct e1000_adapter *adapter)
2228{
2229 struct net_device *netdev = adapter->netdev;
545c67c0 2230 struct e1000_tx_ring *txdr = adapter->tx_ring;
7e6c9861 2231 uint32_t link, tctl;
1da177e4
LT		 2232
2233 e1000_check_for_link(&adapter->hw);
2d7edb92
MC		 2234 if (adapter->hw.mac_type == e1000_82573) {
2235 e1000_enable_tx_pkt_filtering(&adapter->hw);
96838a40 2236 if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
2d7edb92 2237 e1000_update_mng_vlan(adapter);
96838a40 2238 }
1da177e4 2239
96838a40 2240 if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
1da177e4
LT		 2241 !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
2242 link = !adapter->hw.serdes_link_down;
2243 else
2244 link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
2245
96838a40
JB		 2246 if (link) {
2247 if (!netif_carrier_ok(netdev)) {
1da177e4
LT		 2248 e1000_get_speed_and_duplex(&adapter->hw,
2249 &adapter->link_speed,
2250 &adapter->link_duplex);
2251
2252 DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
2253 adapter->link_speed,
2254 adapter->link_duplex == FULL_DUPLEX ?
2255 "Full Duplex" : "Half Duplex");
2256
7e6c9861
JK		 2257 /* tweak tx_queue_len according to speed/duplex
2258 * and adjust the timeout factor */
66a2b0a3
JK		 2259 netdev->tx_queue_len = adapter->tx_queue_len;
2260 adapter->tx_timeout_factor = 1;
7e6c9861
JK		 2261 adapter->txb2b = 1;
2262 switch (adapter->link_speed) {
2263 case SPEED_10:
2264 adapter->txb2b = 0;
2265 netdev->tx_queue_len = 10;
2266 adapter->tx_timeout_factor = 8;
2267 break;
2268 case SPEED_100:
2269 adapter->txb2b = 0;
2270 netdev->tx_queue_len = 100;
2271 /* maybe add some timeout factor ? */
2272 break;
2273 }
2274
2275 if ((adapter->hw.mac_type == e1000_82571 ||
2276 adapter->hw.mac_type == e1000_82572) &&
2277 adapter->txb2b == 0) {
2278#define SPEED_MODE_BIT (1 << 21)
2279 uint32_t tarc0;
2280 tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
2281 tarc0 &= ~SPEED_MODE_BIT;
2282 E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
2283 }
2284
2285#ifdef NETIF_F_TSO
2286 /* disable TSO for pcie and 10/100 speeds, to avoid
2287 * some hardware issues */
2288 if (!adapter->tso_force &&
2289 adapter->hw.bus_type == e1000_bus_type_pci_express){
66a2b0a3
JK		 2290 switch (adapter->link_speed) {
2291 case SPEED_10:
66a2b0a3 2292 case SPEED_100:
7e6c9861
JK		 2293 DPRINTK(PROBE,INFO,
2294 "10/100 speed: disabling TSO\n");
2295 netdev->features &= ~NETIF_F_TSO;
2296 break;
2297 case SPEED_1000:
2298 netdev->features |= NETIF_F_TSO;
2299 break;
2300 default:
2301 /* oops */
66a2b0a3
JK		 2302 break;
2303 }
2304 }
7e6c9861
JK		 2305#endif
2306
2307 /* enable transmits in the hardware, need to do this
2308 * after setting TARC0 */
2309 tctl = E1000_READ_REG(&adapter->hw, TCTL);
2310 tctl |= E1000_TCTL_EN;
2311 E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
66a2b0a3 2312
1da177e4
LT		 2313 netif_carrier_on(netdev);
2314 netif_wake_queue(netdev);
2315 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
2316 adapter->smartspeed = 0;
2317 }
2318 } else {
96838a40 2319 if (netif_carrier_ok(netdev)) {
1da177e4
LT		 2320 adapter->link_speed = 0;
2321 adapter->link_duplex = 0;
2322 DPRINTK(LINK, INFO, "NIC Link is Down\n");
2323 netif_carrier_off(netdev);
2324 netif_stop_queue(netdev);
2325 mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
87041639
JK		 2326
2327 /* 80003ES2LAN workaround--
2328 * For packet buffer work-around on link down event;
2329 * disable receives in the ISR and
2330 * reset device here in the watchdog
2331 */
2332 if (adapter->hw.mac_type == e1000_80003es2lan) {
2333 /* reset device */
2334 schedule_work(&adapter->reset_task);
2335 }
1da177e4
LT		 2336 }
2337
2338 e1000_smartspeed(adapter);
2339 }
2340
2341 e1000_update_stats(adapter);
2342
2343 adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
2344 adapter->tpt_old = adapter->stats.tpt;
2345 adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
2346 adapter->colc_old = adapter->stats.colc;
2347
2348 adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
2349 adapter->gorcl_old = adapter->stats.gorcl;
2350 adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
2351 adapter->gotcl_old = adapter->stats.gotcl;
2352
2353 e1000_update_adaptive(&adapter->hw);
2354
f56799ea 2355 if (!netif_carrier_ok(netdev)) {
581d708e 2356 if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
1da177e4
LT		 2357 /* We've lost link, so the controller stops DMA,
2358 * but we've got queued Tx work that's never going
2359 * to get done, so reset controller to flush Tx.
2360 * (Do the reset outside of interrupt context). */
87041639
JK		 2361 adapter->tx_timeout_count++;
2362 schedule_work(&adapter->reset_task);
1da177e4
LT		 2363 }
2364 }
2365
2366 /* Dynamic mode for Interrupt Throttle Rate (ITR) */
96838a40 2367 if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
1da177e4
LT		 2368 /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
2369 * asymmetrical Tx or Rx gets ITR=8000; everyone
2370 * else is between 2000-8000. */
2371 uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
96838a40 2372 uint32_t dif = (adapter->gotcl > adapter->gorcl ?
1da177e4
LT		 2373 adapter->gotcl - adapter->gorcl :
2374 adapter->gorcl - adapter->gotcl) / 10000;
2375 uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
2376 E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
2377 }
2378
2379 /* Cause software interrupt to ensure rx ring is cleaned */
2380 E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
2381
2648345f 2382 /* Force detection of hung controller every watchdog period */
1da177e4
LT		 2383 adapter->detect_tx_hung = TRUE;
2384
96838a40 2385 /* With 82571 controllers, LAA may be overwritten due to controller
868d5309
MC		 2386 * reset from the other port. Set the appropriate LAA in RAR[0] */
2387 if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
2388 e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
2389
1da177e4
LT		 2390 /* Reset the timer */
2391 mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
2392}
2393
2394#define E1000_TX_FLAGS_CSUM 0x00000001
2395#define E1000_TX_FLAGS_VLAN 0x00000002
2396#define E1000_TX_FLAGS_TSO 0x00000004
2d7edb92 2397#define E1000_TX_FLAGS_IPV4 0x00000008
1da177e4
LT		 2398#define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
2399#define E1000_TX_FLAGS_VLAN_SHIFT 16
2400
2401static inline int
581d708e
MC		 2402e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2403 struct sk_buff *skb)
1da177e4
LT		 2404{
2405#ifdef NETIF_F_TSO
2406 struct e1000_context_desc *context_desc;
545c67c0 2407 struct e1000_buffer *buffer_info;
1da177e4
LT		 2408 unsigned int i;
2409 uint32_t cmd_length = 0;
2d7edb92 2410 uint16_t ipcse = 0, tucse, mss;
1da177e4
LT		 2411 uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
2412 int err;
2413
96838a40 2414 if (skb_shinfo(skb)->tso_size) {
1da177e4
LT		 2415 if (skb_header_cloned(skb)) {
2416 err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
2417 if (err)
2418 return err;
2419 }
2420
2421 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
2422 mss = skb_shinfo(skb)->tso_size;
96838a40 2423 if (skb->protocol == ntohs(ETH_P_IP)) {
2d7edb92
MC		 2424 skb->nh.iph->tot_len = 0;
2425 skb->nh.iph->check = 0;
2426 skb->h.th->check =
2427 ~csum_tcpudp_magic(skb->nh.iph->saddr,
2428 skb->nh.iph->daddr,
2429 0,
2430 IPPROTO_TCP,
2431 0);
2432 cmd_length = E1000_TXD_CMD_IP;
2433 ipcse = skb->h.raw - skb->data - 1;
2434#ifdef NETIF_F_TSO_IPV6
96838a40 2435 } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
2d7edb92
MC		 2436 skb->nh.ipv6h->payload_len = 0;
2437 skb->h.th->check =
2438 ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
2439 &skb->nh.ipv6h->daddr,
2440 0,
2441 IPPROTO_TCP,
2442 0);
2443 ipcse = 0;
2444#endif
2445 }
1da177e4
LT		 2446 ipcss = skb->nh.raw - skb->data;
2447 ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
1da177e4
LT		 2448 tucss = skb->h.raw - skb->data;
2449 tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
2450 tucse = 0;
2451
2452 cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
2d7edb92 2453 E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
1da177e4 2454
581d708e
MC		 2455 i = tx_ring->next_to_use;
2456 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
545c67c0 2457 buffer_info = &tx_ring->buffer_info[i];
1da177e4
LT		 2458
2459 context_desc->lower_setup.ip_fields.ipcss = ipcss;
2460 context_desc->lower_setup.ip_fields.ipcso = ipcso;
2461 context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
2462 context_desc->upper_setup.tcp_fields.tucss = tucss;
2463 context_desc->upper_setup.tcp_fields.tucso = tucso;
2464 context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
2465 context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
2466 context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
2467 context_desc->cmd_and_length = cpu_to_le32(cmd_length);
2468
545c67c0
JK		 2469 buffer_info->time_stamp = jiffies;
2470
581d708e
MC		 2471 if (++i == tx_ring->count) i = 0;
2472 tx_ring->next_to_use = i;
1da177e4 2473
8241e35e 2474 return TRUE;
1da177e4
LT		 2475 }
2476#endif
2477
8241e35e 2478 return FALSE;
1da177e4
LT		 2479}
2480
2481static inline boolean_t
581d708e
MC		 2482e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2483 struct sk_buff *skb)
1da177e4
LT		 2484{
2485 struct e1000_context_desc *context_desc;
545c67c0 2486 struct e1000_buffer *buffer_info;
1da177e4
LT		 2487 unsigned int i;
2488 uint8_t css;
2489
96838a40 2490 if (likely(skb->ip_summed == CHECKSUM_HW)) {
1da177e4
LT		 2491 css = skb->h.raw - skb->data;
2492
581d708e 2493 i = tx_ring->next_to_use;
545c67c0 2494 buffer_info = &tx_ring->buffer_info[i];
581d708e 2495 context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
1da177e4
LT		 2496
2497 context_desc->upper_setup.tcp_fields.tucss = css;
2498 context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
2499 context_desc->upper_setup.tcp_fields.tucse = 0;
2500 context_desc->tcp_seg_setup.data = 0;
2501 context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
2502
545c67c0
JK		 2503 buffer_info->time_stamp = jiffies;
2504
581d708e
MC		 2505 if (unlikely(++i == tx_ring->count)) i = 0;
2506 tx_ring->next_to_use = i;
1da177e4
LT		 2507
2508 return TRUE;
2509 }
2510
2511 return FALSE;
2512}
2513
2514#define E1000_MAX_TXD_PWR 12
2515#define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
2516
2517static inline int
581d708e
MC		 2518e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2519 struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
2520 unsigned int nr_frags, unsigned int mss)
1da177e4 2521{
1da177e4
LT		 2522 struct e1000_buffer *buffer_info;
2523 unsigned int len = skb->len;
2524 unsigned int offset = 0, size, count = 0, i;
2525 unsigned int f;
2526 len -= skb->data_len;
2527
2528 i = tx_ring->next_to_use;
2529
96838a40 2530 while (len) {
1da177e4
LT		 2531 buffer_info = &tx_ring->buffer_info[i];
2532 size = min(len, max_per_txd);
2533#ifdef NETIF_F_TSO
fd803241
JK		 2534 /* Workaround for Controller erratum --
2535 * descriptor for non-tso packet in a linear SKB that follows a
2536 * tso gets written back prematurely before the data is fully
0f15a8fa 2537 * DMA'd to the controller */
fd803241 2538 if (!skb->data_len && tx_ring->last_tx_tso &&
0f15a8fa 2539 !skb_shinfo(skb)->tso_size) {
fd803241
JK		 2540 tx_ring->last_tx_tso = 0;
2541 size -= 4;
2542 }
2543
1da177e4
LT		 2544 /* Workaround for premature desc write-backs
2545 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2546 if (unlikely(mss && !nr_frags && size == len && size > 8))
1da177e4
LT		 2547 size -= 4;
2548#endif
97338bde
MC		 2549 /* work-around for errata 10 and it applies
2550 * to all controllers in PCI-X mode
2551 * The fix is to make sure that the first descriptor of a
2552 * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
2553 */
96838a40 2554 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2555 (size > 2015) && count == 0))
2556 size = 2015;
96838a40 2557
1da177e4
LT		 2558 /* Workaround for potential 82544 hang in PCI-X. Avoid
2559 * terminating buffers within evenly-aligned dwords. */
96838a40 2560 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2561 !((unsigned long)(skb->data + offset + size - 1) & 4) &&
2562 size > 4))
2563 size -= 4;
2564
2565 buffer_info->length = size;
2566 buffer_info->dma =
2567 pci_map_single(adapter->pdev,
2568 skb->data + offset,
2569 size,
2570 PCI_DMA_TODEVICE);
2571 buffer_info->time_stamp = jiffies;
2572
2573 len -= size;
2574 offset += size;
2575 count++;
96838a40 2576 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2577 }
2578
96838a40 2579 for (f = 0; f < nr_frags; f++) {
1da177e4
LT		 2580 struct skb_frag_struct *frag;
2581
2582 frag = &skb_shinfo(skb)->frags[f];
2583 len = frag->size;
2584 offset = frag->page_offset;
2585
96838a40 2586 while (len) {
1da177e4
LT		 2587 buffer_info = &tx_ring->buffer_info[i];
2588 size = min(len, max_per_txd);
2589#ifdef NETIF_F_TSO
2590 /* Workaround for premature desc write-backs
2591 * in TSO mode. Append 4-byte sentinel desc */
96838a40 2592 if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
1da177e4
LT		 2593 size -= 4;
2594#endif
2595 /* Workaround for potential 82544 hang in PCI-X.
2596 * Avoid terminating buffers within evenly-aligned
2597 * dwords. */
96838a40 2598 if (unlikely(adapter->pcix_82544 &&
1da177e4
LT		 2599 !((unsigned long)(frag->page+offset+size-1) & 4) &&
2600 size > 4))
2601 size -= 4;
2602
2603 buffer_info->length = size;
2604 buffer_info->dma =
2605 pci_map_page(adapter->pdev,
2606 frag->page,
2607 offset,
2608 size,
2609 PCI_DMA_TODEVICE);
2610 buffer_info->time_stamp = jiffies;
2611
2612 len -= size;
2613 offset += size;
2614 count++;
96838a40 2615 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2616 }
2617 }
2618
2619 i = (i == 0) ? tx_ring->count - 1 : i - 1;
2620 tx_ring->buffer_info[i].skb = skb;
2621 tx_ring->buffer_info[first].next_to_watch = i;
2622
2623 return count;
2624}
2625
2626static inline void
581d708e
MC		 2627e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
2628 int tx_flags, int count)
1da177e4 2629{
1da177e4
LT		 2630 struct e1000_tx_desc *tx_desc = NULL;
2631 struct e1000_buffer *buffer_info;
2632 uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
2633 unsigned int i;
2634
96838a40 2635 if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
1da177e4
LT		 2636 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
2637 E1000_TXD_CMD_TSE;
2d7edb92
MC		 2638 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2639
96838a40 2640 if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
2d7edb92 2641 txd_upper |= E1000_TXD_POPTS_IXSM << 8;
1da177e4
LT		 2642 }
2643
96838a40 2644 if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
1da177e4
LT		 2645 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
2646 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
2647 }
2648
96838a40 2649 if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
1da177e4
LT		 2650 txd_lower |= E1000_TXD_CMD_VLE;
2651 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
2652 }
2653
2654 i = tx_ring->next_to_use;
2655
96838a40 2656 while (count--) {
1da177e4
LT		 2657 buffer_info = &tx_ring->buffer_info[i];
2658 tx_desc = E1000_TX_DESC(*tx_ring, i);
2659 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
2660 tx_desc->lower.data =
2661 cpu_to_le32(txd_lower | buffer_info->length);
2662 tx_desc->upper.data = cpu_to_le32(txd_upper);
96838a40 2663 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4
LT		 2664 }
2665
2666 tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
2667
2668 /* Force memory writes to complete before letting h/w
2669 * know there are new descriptors to fetch. (Only
2670 * applicable for weak-ordered memory model archs,
2671 * such as IA-64). */
2672 wmb();
2673
2674 tx_ring->next_to_use = i;
581d708e 2675 writel(i, adapter->hw.hw_addr + tx_ring->tdt);
1da177e4
LT		 2676}
2677
2678/**
2679 * 82547 workaround to avoid controller hang in half-duplex environment.
2680 * The workaround is to avoid queuing a large packet that would span
2681 * the internal Tx FIFO ring boundary by notifying the stack to resend
2682 * the packet at a later time. This gives the Tx FIFO an opportunity to
2683 * flush all packets. When that occurs, we reset the Tx FIFO pointers
2684 * to the beginning of the Tx FIFO.
2685 **/
2686
2687#define E1000_FIFO_HDR 0x10
2688#define E1000_82547_PAD_LEN 0x3E0
2689
2690static inline int
2691e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
2692{
2693 uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
2694 uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
2695
2696 E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
2697
96838a40 2698 if (adapter->link_duplex != HALF_DUPLEX)
1da177e4
LT		 2699 goto no_fifo_stall_required;
2700
96838a40 2701 if (atomic_read(&adapter->tx_fifo_stall))
1da177e4
LT		 2702 return 1;
2703
96838a40 2704 if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
1da177e4
LT		 2705 atomic_set(&adapter->tx_fifo_stall, 1);
2706 return 1;
2707 }
2708
2709no_fifo_stall_required:
2710 adapter->tx_fifo_head += skb_fifo_len;
96838a40 2711 if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
1da177e4
LT		 2712 adapter->tx_fifo_head -= adapter->tx_fifo_size;
2713 return 0;
2714}
2715
2d7edb92
MC		 2716#define MINIMUM_DHCP_PACKET_SIZE 282
2717static inline int
2718e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
2719{
2720 struct e1000_hw *hw = &adapter->hw;
2721 uint16_t length, offset;
96838a40
JB		 2722 if (vlan_tx_tag_present(skb)) {
2723 if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
2d7edb92
MC		 2724 ( adapter->hw.mng_cookie.status &
2725 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
2726 return 0;
2727 }
20a44028 2728 if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
2d7edb92 2729 struct ethhdr *eth = (struct ethhdr *) skb->data;
96838a40
JB		 2730 if ((htons(ETH_P_IP) == eth->h_proto)) {
2731 const struct iphdr *ip =
2d7edb92 2732 (struct iphdr *)((uint8_t *)skb->data+14);
96838a40
JB		 2733 if (IPPROTO_UDP == ip->protocol) {
2734 struct udphdr *udp =
2735 (struct udphdr *)((uint8_t *)ip +
2d7edb92 2736 (ip->ihl << 2));
96838a40 2737 if (ntohs(udp->dest) == 67) {
2d7edb92
MC		 2738 offset = (uint8_t *)udp + 8 - skb->data;
2739 length = skb->len - offset;
2740
2741 return e1000_mng_write_dhcp_info(hw,
96838a40 2742 (uint8_t *)udp + 8,
2d7edb92
MC		 2743 length);
2744 }
2745 }
2746 }
2747 }
2748 return 0;
2749}
2750
1da177e4
LT		 2751#define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
2752static int
2753e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
2754{
60490fe0 2755 struct e1000_adapter *adapter = netdev_priv(netdev);
581d708e 2756 struct e1000_tx_ring *tx_ring;
1da177e4
LT		 2757 unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
2758 unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
2759 unsigned int tx_flags = 0;
2760 unsigned int len = skb->len;
2761 unsigned long flags;
2762 unsigned int nr_frags = 0;
2763 unsigned int mss = 0;
2764 int count = 0;
96838a40 2765 int tso;
1da177e4
LT		 2766 unsigned int f;
2767 len -= skb->data_len;
2768
581d708e 2769 tx_ring = adapter->tx_ring;
24025e4e 2770
581d708e 2771 if (unlikely(skb->len <= 0)) {
1da177e4
LT		 2772 dev_kfree_skb_any(skb);
2773 return NETDEV_TX_OK;
2774 }
2775
2776#ifdef NETIF_F_TSO
2777 mss = skb_shinfo(skb)->tso_size;
2648345f 2778 /* The controller does a simple calculation to
1da177e4
LT		 2779 * make sure there is enough room in the FIFO before
2780 * initiating the DMA for each buffer. The calc is:
2781 * 4 = ceil(buffer len/mss). To make sure we don't
2782 * overrun the FIFO, adjust the max buffer len if mss
2783 * drops. */
96838a40 2784 if (mss) {
9a3056da 2785 uint8_t hdr_len;
1da177e4
LT		 2786 max_per_txd = min(mss << 2, max_per_txd);
2787 max_txd_pwr = fls(max_per_txd) - 1;
9a3056da 2788
9f687888 2789 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
9a3056da
JK		 2790 * points to just header, pull a few bytes of payload from
2791 * frags into skb->data */
2792 hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
9f687888
JK		 2793 if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
2794 switch (adapter->hw.mac_type) {
2795 unsigned int pull_size;
2796 case e1000_82571:
2797 case e1000_82572:
2798 case e1000_82573:
2799 pull_size = min((unsigned int)4, skb->data_len);
2800 if (!__pskb_pull_tail(skb, pull_size)) {
2801 printk(KERN_ERR
2802 "__pskb_pull_tail failed.\n");
2803 dev_kfree_skb_any(skb);
749dfc70 2804 return NETDEV_TX_OK;
9f687888
JK		 2805 }
2806 len = skb->len - skb->data_len;
2807 break;
2808 default:
2809 /* do nothing */
2810 break;
d74bbd3b 2811 }
9a3056da 2812 }
1da177e4
LT		 2813 }
2814
9a3056da 2815 /* reserve a descriptor for the offload context */
96838a40 2816 if ((mss) || (skb->ip_summed == CHECKSUM_HW))
1da177e4 2817 count++;
2648345f 2818 count++;
1da177e4 2819#else
96838a40 2820 if (skb->ip_summed == CHECKSUM_HW)
1da177e4
LT		 2821 count++;
2822#endif
fd803241
JK		 2823
2824#ifdef NETIF_F_TSO
2825 /* Controller Erratum workaround */
2826 if (!skb->data_len && tx_ring->last_tx_tso &&
0f15a8fa 2827 !skb_shinfo(skb)->tso_size)
fd803241
JK		 2828 count++;
2829#endif
2830
1da177e4
LT		 2831 count += TXD_USE_COUNT(len, max_txd_pwr);
2832
96838a40 2833 if (adapter->pcix_82544)
1da177e4
LT		 2834 count++;
2835
96838a40 2836 /* work-around for errata 10 and it applies to all controllers
97338bde
MC		 2837 * in PCI-X mode, so add one more descriptor to the count
2838 */
96838a40 2839 if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
97338bde
MC		 2840 (len > 2015)))
2841 count++;
2842
1da177e4 2843 nr_frags = skb_shinfo(skb)->nr_frags;
96838a40 2844 for (f = 0; f < nr_frags; f++)
1da177e4
LT		 2845 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
2846 max_txd_pwr);
96838a40 2847 if (adapter->pcix_82544)
1da177e4
LT		 2848 count += nr_frags;
2849
0f15a8fa
JK		 2850
2851 if (adapter->hw.tx_pkt_filtering &&
2852 (adapter->hw.mac_type == e1000_82573))
2d7edb92
MC		 2853 e1000_transfer_dhcp_info(adapter, skb);
2854
581d708e
MC		 2855 local_irq_save(flags);
2856 if (!spin_trylock(&tx_ring->tx_lock)) {
2857 /* Collision - tell upper layer to requeue */
2858 local_irq_restore(flags);
2859 return NETDEV_TX_LOCKED;
2860 }
1da177e4
LT		 2861
2862 /* need: count + 2 desc gap to keep tail from touching
2863 * head, otherwise try next time */
581d708e 2864 if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
1da177e4 2865 netif_stop_queue(netdev);
581d708e 2866 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2867 return NETDEV_TX_BUSY;
2868 }
2869
96838a40
JB		 2870 if (unlikely(adapter->hw.mac_type == e1000_82547)) {
2871 if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
1da177e4
LT		 2872 netif_stop_queue(netdev);
2873 mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
581d708e 2874 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2875 return NETDEV_TX_BUSY;
2876 }
2877 }
2878
96838a40 2879 if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
1da177e4
LT		 2880 tx_flags |= E1000_TX_FLAGS_VLAN;
2881 tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
2882 }
2883
581d708e 2884 first = tx_ring->next_to_use;
96838a40 2885
581d708e 2886 tso = e1000_tso(adapter, tx_ring, skb);
1da177e4
LT		 2887 if (tso < 0) {
2888 dev_kfree_skb_any(skb);
581d708e 2889 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2890 return NETDEV_TX_OK;
2891 }
2892
fd803241
JK		 2893 if (likely(tso)) {
2894 tx_ring->last_tx_tso = 1;
1da177e4 2895 tx_flags |= E1000_TX_FLAGS_TSO;
fd803241 2896 } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
1da177e4
LT		 2897 tx_flags |= E1000_TX_FLAGS_CSUM;
2898
2d7edb92 2899 /* Old method was to assume IPv4 packet by default if TSO was enabled.
868d5309 2900 * 82571 hardware supports TSO capabilities for IPv6 as well...
2d7edb92 2901 * no longer assume, we must. */
581d708e 2902 if (likely(skb->protocol == ntohs(ETH_P_IP)))
2d7edb92
MC		 2903 tx_flags |= E1000_TX_FLAGS_IPV4;
2904
581d708e
MC		 2905 e1000_tx_queue(adapter, tx_ring, tx_flags,
2906 e1000_tx_map(adapter, tx_ring, skb, first,
2907 max_per_txd, nr_frags, mss));
1da177e4
LT		 2908
2909 netdev->trans_start = jiffies;
2910
2911 /* Make sure there is space in the ring for the next send. */
581d708e 2912 if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
1da177e4
LT		 2913 netif_stop_queue(netdev);
2914
581d708e 2915 spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
1da177e4
LT		 2916 return NETDEV_TX_OK;
2917}
2918
2919/**
2920 * e1000_tx_timeout - Respond to a Tx Hang
2921 * @netdev: network interface device structure
2922 **/
2923
2924static void
2925e1000_tx_timeout(struct net_device *netdev)
2926{
60490fe0 2927 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2928
2929 /* Do the reset outside of interrupt context */
87041639
JK		 2930 adapter->tx_timeout_count++;
2931 schedule_work(&adapter->reset_task);
1da177e4
LT		 2932}
2933
2934static void
87041639 2935e1000_reset_task(struct net_device *netdev)
1da177e4 2936{
60490fe0 2937 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 2938
2939 e1000_down(adapter);
2940 e1000_up(adapter);
2941}
2942
2943/**
2944 * e1000_get_stats - Get System Network Statistics
2945 * @netdev: network interface device structure
2946 *
2947 * Returns the address of the device statistics structure.
2948 * The statistics are actually updated from the timer callback.
2949 **/
2950
2951static struct net_device_stats *
2952e1000_get_stats(struct net_device *netdev)
2953{
60490fe0 2954 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2955
6b7660cd 2956 /* only return the current stats */
1da177e4
LT		 2957 return &adapter->net_stats;
2958}
2959
2960/**
2961 * e1000_change_mtu - Change the Maximum Transfer Unit
2962 * @netdev: network interface device structure
2963 * @new_mtu: new value for maximum frame size
2964 *
2965 * Returns 0 on success, negative on failure
2966 **/
2967
2968static int
2969e1000_change_mtu(struct net_device *netdev, int new_mtu)
2970{
60490fe0 2971 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 2972 int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
85b22eb6 2973 uint16_t eeprom_data = 0;
1da177e4 2974
96838a40
JB		 2975 if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
2976 (max_frame > MAX_JUMBO_FRAME_SIZE)) {
2977 DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
1da177e4 2978 return -EINVAL;
2d7edb92 2979 }
1da177e4 2980
997f5cbd
JK		 2981 /* Adapter-specific max frame size limits. */
2982 switch (adapter->hw.mac_type) {
2983 case e1000_82542_rev2_0:
2984 case e1000_82542_rev2_1:
997f5cbd
JK		 2985 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
2986 DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
2d7edb92 2987 return -EINVAL;
2d7edb92 2988 }
997f5cbd 2989 break;
85b22eb6
JK		 2990 case e1000_82573:
2991 /* only enable jumbo frames if ASPM is disabled completely
2992 * this means both bits must be zero in 0x1A bits 3:2 */
2993 e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
2994 &eeprom_data);
2995 if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
2996 if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
2997 DPRINTK(PROBE, ERR,
2998 "Jumbo Frames not supported.\n");
2999 return -EINVAL;
3000 }
3001 break;
3002 }
3003 /* fall through to get support */
997f5cbd
JK		 3004 case e1000_82571:
3005 case e1000_82572:
87041639 3006 case e1000_80003es2lan:
997f5cbd
JK		 3007#define MAX_STD_JUMBO_FRAME_SIZE 9234
3008 if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
3009 DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
3010 return -EINVAL;
3011 }
3012 break;
3013 default:
3014 /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
3015 break;
1da177e4
LT		 3016 }
3017
997f5cbd 3018
997f5cbd 3019 if (adapter->hw.mac_type > e1000_82547_rev_2) {
a1415ee6 3020 adapter->rx_buffer_len = max_frame;
997f5cbd 3021 E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
a1415ee6
JK		 3022 } else {
3023 if(unlikely((adapter->hw.mac_type < e1000_82543) &&
3024 (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
3025 DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
3026 "on 82542\n");
3027 return -EINVAL;
3028 } else {
3029 if(max_frame <= E1000_RXBUFFER_2048)
3030 adapter->rx_buffer_len = E1000_RXBUFFER_2048;
3031 else if(max_frame <= E1000_RXBUFFER_4096)
3032 adapter->rx_buffer_len = E1000_RXBUFFER_4096;
3033 else if(max_frame <= E1000_RXBUFFER_8192)
3034 adapter->rx_buffer_len = E1000_RXBUFFER_8192;
3035 else if(max_frame <= E1000_RXBUFFER_16384)
3036 adapter->rx_buffer_len = E1000_RXBUFFER_16384;
3037 }
3038 }
997f5cbd 3039
2d7edb92
MC		 3040 netdev->mtu = new_mtu;
3041
96838a40 3042 if (netif_running(netdev)) {
1da177e4
LT		 3043 e1000_down(adapter);
3044 e1000_up(adapter);
3045 }
3046
1da177e4
LT		 3047 adapter->hw.max_frame_size = max_frame;
3048
3049 return 0;
3050}
3051
3052/**
3053 * e1000_update_stats - Update the board statistics counters
3054 * @adapter: board private structure
3055 **/
3056
3057void
3058e1000_update_stats(struct e1000_adapter *adapter)
3059{
3060 struct e1000_hw *hw = &adapter->hw;
3061 unsigned long flags;
3062 uint16_t phy_tmp;
3063
3064#define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
3065
3066 spin_lock_irqsave(&adapter->stats_lock, flags);
3067
3068 /* these counters are modified from e1000_adjust_tbi_stats,
3069 * called from the interrupt context, so they must only
3070 * be written while holding adapter->stats_lock
3071 */
3072
3073 adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
3074 adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
3075 adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
3076 adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
3077 adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
3078 adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
3079 adapter->stats.roc += E1000_READ_REG(hw, ROC);
3080 adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
3081 adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
3082 adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
3083 adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
3084 adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
3085 adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
3086
3087 adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
3088 adapter->stats.mpc += E1000_READ_REG(hw, MPC);
3089 adapter->stats.scc += E1000_READ_REG(hw, SCC);
3090 adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
3091 adapter->stats.mcc += E1000_READ_REG(hw, MCC);
3092 adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
3093 adapter->stats.dc += E1000_READ_REG(hw, DC);
3094 adapter->stats.sec += E1000_READ_REG(hw, SEC);
3095 adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
3096 adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
3097 adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
3098 adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
3099 adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
3100 adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
3101 adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
3102 adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
3103 adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
3104 adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
3105 adapter->stats.ruc += E1000_READ_REG(hw, RUC);
3106 adapter->stats.rfc += E1000_READ_REG(hw, RFC);
3107 adapter->stats.rjc += E1000_READ_REG(hw, RJC);
3108 adapter->stats.torl += E1000_READ_REG(hw, TORL);
3109 adapter->stats.torh += E1000_READ_REG(hw, TORH);
3110 adapter->stats.totl += E1000_READ_REG(hw, TOTL);
3111 adapter->stats.toth += E1000_READ_REG(hw, TOTH);
3112 adapter->stats.tpr += E1000_READ_REG(hw, TPR);
3113 adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
3114 adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
3115 adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
3116 adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
3117 adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
3118 adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
3119 adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
3120 adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
3121
3122 /* used for adaptive IFS */
3123
3124 hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
3125 adapter->stats.tpt += hw->tx_packet_delta;
3126 hw->collision_delta = E1000_READ_REG(hw, COLC);
3127 adapter->stats.colc += hw->collision_delta;
3128
96838a40 3129 if (hw->mac_type >= e1000_82543) {
1da177e4
LT		 3130 adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
3131 adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
3132 adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
3133 adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
3134 adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
3135 adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
3136 }
96838a40 3137 if (hw->mac_type > e1000_82547_rev_2) {
2d7edb92
MC		 3138 adapter->stats.iac += E1000_READ_REG(hw, IAC);
3139 adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
3140 adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
3141 adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
3142 adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
3143 adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
3144 adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
3145 adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
3146 adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
3147 }
1da177e4
LT		 3148
3149 /* Fill out the OS statistics structure */
3150
3151 adapter->net_stats.rx_packets = adapter->stats.gprc;
3152 adapter->net_stats.tx_packets = adapter->stats.gptc;
3153 adapter->net_stats.rx_bytes = adapter->stats.gorcl;
3154 adapter->net_stats.tx_bytes = adapter->stats.gotcl;
3155 adapter->net_stats.multicast = adapter->stats.mprc;
3156 adapter->net_stats.collisions = adapter->stats.colc;
3157
3158 /* Rx Errors */
3159
87041639
JK		 3160 /* RLEC on some newer hardware can be incorrect so build
3161 * our own version based on RUC and ROC */
1da177e4
LT		 3162 adapter->net_stats.rx_errors = adapter->stats.rxerrc +
3163 adapter->stats.crcerrs + adapter->stats.algnerrc +
87041639
JK		 3164 adapter->stats.ruc + adapter->stats.roc +
3165 adapter->stats.cexterr;
6b7660cd 3166 adapter->net_stats.rx_dropped = 0;
87041639
JK		 3167 adapter->net_stats.rx_length_errors = adapter->stats.ruc +
3168 adapter->stats.roc;
1da177e4
LT		 3169 adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
3170 adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
1da177e4
LT		 3171 adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
3172
3173 /* Tx Errors */
3174
3175 adapter->net_stats.tx_errors = adapter->stats.ecol +
3176 adapter->stats.latecol;
3177 adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
3178 adapter->net_stats.tx_window_errors = adapter->stats.latecol;
3179 adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
3180
3181 /* Tx Dropped needs to be maintained elsewhere */
3182
3183 /* Phy Stats */
3184
96838a40
JB		 3185 if (hw->media_type == e1000_media_type_copper) {
3186 if ((adapter->link_speed == SPEED_1000) &&
1da177e4
LT		 3187 (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
3188 phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
3189 adapter->phy_stats.idle_errors += phy_tmp;
3190 }
3191
96838a40 3192 if ((hw->mac_type <= e1000_82546) &&
1da177e4
LT		 3193 (hw->phy_type == e1000_phy_m88) &&
3194 !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
3195 adapter->phy_stats.receive_errors += phy_tmp;
3196 }
3197
3198 spin_unlock_irqrestore(&adapter->stats_lock, flags);
3199}
3200
3201/**
3202 * e1000_intr - Interrupt Handler
3203 * @irq: interrupt number
3204 * @data: pointer to a network interface device structure
3205 * @pt_regs: CPU registers structure
3206 **/
3207
3208static irqreturn_t
3209e1000_intr(int irq, void *data, struct pt_regs *regs)
3210{
3211 struct net_device *netdev = data;
60490fe0 3212 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 3213 struct e1000_hw *hw = &adapter->hw;
87041639 3214 uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
1e613fd9 3215#ifndef CONFIG_E1000_NAPI
581d708e 3216 int i;
1e613fd9
JK		 3217#else
3218 /* Interrupt Auto-Mask...upon reading ICR,
3219 * interrupts are masked. No need for the
3220 * IMC write, but it does mean we should
3221 * account for it ASAP. */
3222 if (likely(hw->mac_type >= e1000_82571))
3223 atomic_inc(&adapter->irq_sem);
be2b28ed 3224#endif
1da177e4 3225
1e613fd9
JK		 3226 if (unlikely(!icr)) {
3227#ifdef CONFIG_E1000_NAPI
3228 if (hw->mac_type >= e1000_82571)
3229 e1000_irq_enable(adapter);
3230#endif
1da177e4 3231 return IRQ_NONE; /* Not our interrupt */
1e613fd9 3232 }
1da177e4 3233
96838a40 3234 if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
1da177e4 3235 hw->get_link_status = 1;
87041639
JK		 3236 /* 80003ES2LAN workaround--
3237 * For packet buffer work-around on link down event;
3238 * disable receives here in the ISR and
3239 * reset adapter in watchdog
3240 */
3241 if (netif_carrier_ok(netdev) &&
3242 (adapter->hw.mac_type == e1000_80003es2lan)) {
3243 /* disable receives */
3244 rctl = E1000_READ_REG(hw, RCTL);
3245 E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
3246 }
1da177e4
LT		 3247 mod_timer(&adapter->watchdog_timer, jiffies);
3248 }
3249
3250#ifdef CONFIG_E1000_NAPI
1e613fd9
JK		 3251 if (unlikely(hw->mac_type < e1000_82571)) {
3252 atomic_inc(&adapter->irq_sem);
3253 E1000_WRITE_REG(hw, IMC, ~0);
3254 E1000_WRITE_FLUSH(hw);
3255 }
581d708e
MC		 3256 if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
3257 __netif_rx_schedule(&adapter->polling_netdev[0]);
3258 else
3259 e1000_irq_enable(adapter);
c1605eb3 3260#else
1da177e4 3261 /* Writing IMC and IMS is needed for 82547.
96838a40
JB		 3262 * Due to Hub Link bus being occupied, an interrupt
3263 * de-assertion message is not able to be sent.
3264 * When an interrupt assertion message is generated later,
3265 * two messages are re-ordered and sent out.
3266 * That causes APIC to think 82547 is in de-assertion
3267 * state, while 82547 is in assertion state, resulting
3268 * in dead lock. Writing IMC forces 82547 into
3269 * de-assertion state.
3270 */
3271 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
1da177e4 3272 atomic_inc(&adapter->irq_sem);
2648345f 3273 E1000_WRITE_REG(hw, IMC, ~0);
1da177e4
LT		 3274 }
3275
96838a40
JB		 3276 for (i = 0; i < E1000_MAX_INTR; i++)
3277 if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
581d708e 3278 !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
1da177e4
LT		 3279 break;
3280
96838a40 3281 if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
1da177e4 3282 e1000_irq_enable(adapter);
581d708e 3283
c1605eb3 3284#endif
1da177e4
LT		 3285
3286 return IRQ_HANDLED;
3287}
3288
3289#ifdef CONFIG_E1000_NAPI
3290/**
3291 * e1000_clean - NAPI Rx polling callback
3292 * @adapter: board private structure
3293 **/
3294
3295static int
581d708e 3296e1000_clean(struct net_device *poll_dev, int *budget)
1da177e4 3297{
581d708e
MC		 3298 struct e1000_adapter *adapter;
3299 int work_to_do = min(*budget, poll_dev->quota);
38bd3b26 3300 int tx_cleaned = 0, i = 0, work_done = 0;
581d708e
MC		 3301
3302 /* Must NOT use netdev_priv macro here. */
3303 adapter = poll_dev->priv;
3304
3305 /* Keep link state information with original netdev */
3306 if (!netif_carrier_ok(adapter->netdev))
3307 goto quit_polling;
2648345f 3308
581d708e
MC		 3309 while (poll_dev != &adapter->polling_netdev[i]) {
3310 i++;
5d9428de 3311 BUG_ON(i == adapter->num_rx_queues);
581d708e
MC		 3312 }
3313
8241e35e
JK		 3314 if (likely(adapter->num_tx_queues == 1)) {
3315 /* e1000_clean is called per-cpu. This lock protects
3316 * tx_ring[0] from being cleaned by multiple cpus
3317 * simultaneously. A failure obtaining the lock means
3318 * tx_ring[0] is currently being cleaned anyway. */
3319 if (spin_trylock(&adapter->tx_queue_lock)) {
3320 tx_cleaned = e1000_clean_tx_irq(adapter,
3321 &adapter->tx_ring[0]);
3322 spin_unlock(&adapter->tx_queue_lock);
3323 }
3324 } else
3325 tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
3326
581d708e
MC		 3327 adapter->clean_rx(adapter, &adapter->rx_ring[i],
3328 &work_done, work_to_do);
1da177e4
LT		 3329
3330 *budget -= work_done;
581d708e 3331 poll_dev->quota -= work_done;
96838a40 3332
2b02893e 3333 /* If no Tx and not enough Rx work done, exit the polling mode */
96838a40 3334 if ((!tx_cleaned && (work_done == 0)) ||
581d708e
MC		 3335 !netif_running(adapter->netdev)) {
3336quit_polling:
3337 netif_rx_complete(poll_dev);
1da177e4
LT		 3338 e1000_irq_enable(adapter);
3339 return 0;
3340 }
3341
3342 return 1;
3343}
3344
3345#endif
3346/**
3347 * e1000_clean_tx_irq - Reclaim resources after transmit completes
3348 * @adapter: board private structure
3349 **/
3350
3351static boolean_t
581d708e
MC		 3352e1000_clean_tx_irq(struct e1000_adapter *adapter,
3353 struct e1000_tx_ring *tx_ring)
1da177e4 3354{
1da177e4
LT		 3355 struct net_device *netdev = adapter->netdev;
3356 struct e1000_tx_desc *tx_desc, *eop_desc;
3357 struct e1000_buffer *buffer_info;
3358 unsigned int i, eop;
2a1af5d7
JK		 3359#ifdef CONFIG_E1000_NAPI
3360 unsigned int count = 0;
3361#endif
1da177e4
LT		 3362 boolean_t cleaned = FALSE;
3363
3364 i = tx_ring->next_to_clean;
3365 eop = tx_ring->buffer_info[i].next_to_watch;
3366 eop_desc = E1000_TX_DESC(*tx_ring, eop);
3367
581d708e 3368 while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
96838a40 3369 for (cleaned = FALSE; !cleaned; ) {
1da177e4
LT		 3370 tx_desc = E1000_TX_DESC(*tx_ring, i);
3371 buffer_info = &tx_ring->buffer_info[i];
3372 cleaned = (i == eop);
3373
fd803241 3374 e1000_unmap_and_free_tx_resource(adapter, buffer_info);
8241e35e 3375 memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
1da177e4 3376
96838a40 3377 if (unlikely(++i == tx_ring->count)) i = 0;
1da177e4 3378 }
581d708e 3379
7bfa4816 3380
1da177e4
LT		 3381 eop = tx_ring->buffer_info[i].next_to_watch;
3382 eop_desc = E1000_TX_DESC(*tx_ring, eop);
2a1af5d7
JK		 3383#ifdef CONFIG_E1000_NAPI
3384#define E1000_TX_WEIGHT 64
3385 /* weight of a sort for tx, to avoid endless transmit cleanup */
3386 if (count++ == E1000_TX_WEIGHT) break;
3387#endif
1da177e4
LT		 3388 }
3389
3390 tx_ring->next_to_clean = i;
3391
581d708e 3392 spin_lock(&tx_ring->tx_lock);
1da177e4 3393
96838a40 3394 if (unlikely(cleaned && netif_queue_stopped(netdev) &&
1da177e4
LT		 3395 netif_carrier_ok(netdev)))
3396 netif_wake_queue(netdev);
3397
581d708e 3398 spin_unlock(&tx_ring->tx_lock);
2648345f 3399
581d708e 3400 if (adapter->detect_tx_hung) {
2648345f 3401 /* Detect a transmit hang in hardware, this serializes the
1da177e4
LT		 3402 * check with the clearing of time_stamp and movement of i */
3403 adapter->detect_tx_hung = FALSE;
392137fa
JK		 3404 if (tx_ring->buffer_info[eop].dma &&
3405 time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
7e6c9861 3406 (adapter->tx_timeout_factor * HZ))
70b8f1e1 3407 && !(E1000_READ_REG(&adapter->hw, STATUS) &
392137fa 3408 E1000_STATUS_TXOFF)) {
70b8f1e1
MC		 3409
3410 /* detected Tx unit hang */
c6963ef5 3411 DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
7bfa4816 3412 " Tx Queue <%lu>\n"
70b8f1e1
MC		 3413 " TDH <%x>\n"
3414 " TDT <%x>\n"
3415 " next_to_use <%x>\n"
3416 " next_to_clean <%x>\n"
3417 "buffer_info[next_to_clean]\n"
70b8f1e1
MC		 3418 " time_stamp <%lx>\n"
3419 " next_to_watch <%x>\n"
3420 " jiffies <%lx>\n"
3421 " next_to_watch.status <%x>\n",
7bfa4816
JK		 3422 (unsigned long)((tx_ring - adapter->tx_ring) /
3423 sizeof(struct e1000_tx_ring)),
581d708e
MC		 3424 readl(adapter->hw.hw_addr + tx_ring->tdh),
3425 readl(adapter->hw.hw_addr + tx_ring->tdt),
70b8f1e1 3426 tx_ring->next_to_use,
392137fa
JK		 3427 tx_ring->next_to_clean,
3428 tx_ring->buffer_info[eop].time_stamp,
70b8f1e1
MC		 3429 eop,
3430 jiffies,
3431 eop_desc->upper.fields.status);
1da177e4 3432 netif_stop_queue(netdev);
70b8f1e1 3433 }
1da177e4 3434 }
1da177e4
LT		 3435 return cleaned;
3436}
3437
3438/**
3439 * e1000_rx_checksum - Receive Checksum Offload for 82543
2d7edb92
MC		 3440 * @adapter: board private structure
3441 * @status_err: receive descriptor status and error fields
3442 * @csum: receive descriptor csum field
3443 * @sk_buff: socket buffer with received data
1da177e4
LT		 3444 **/
3445
3446static inline void
3447e1000_rx_checksum(struct e1000_adapter *adapter,
2d7edb92
MC		 3448 uint32_t status_err, uint32_t csum,
3449 struct sk_buff *skb)
1da177e4 3450{
2d7edb92
MC		 3451 uint16_t status = (uint16_t)status_err;
3452 uint8_t errors = (uint8_t)(status_err >> 24);
3453 skb->ip_summed = CHECKSUM_NONE;
3454
1da177e4 3455 /* 82543 or newer only */
96838a40 3456 if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
1da177e4 3457 /* Ignore Checksum bit is set */
96838a40 3458 if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
2d7edb92 3459 /* TCP/UDP checksum error bit is set */
96838a40 3460 if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
1da177e4 3461 /* let the stack verify checksum errors */
1da177e4 3462 adapter->hw_csum_err++;
2d7edb92
MC		 3463 return;
3464 }
3465 /* TCP/UDP Checksum has not been calculated */
96838a40
JB		 3466 if (adapter->hw.mac_type <= e1000_82547_rev_2) {
3467 if (!(status & E1000_RXD_STAT_TCPCS))
2d7edb92 3468 return;
1da177e4 3469 } else {
96838a40 3470 if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
2d7edb92
MC		 3471 return;
3472 }
3473 /* It must be a TCP or UDP packet with a valid checksum */
3474 if (likely(status & E1000_RXD_STAT_TCPCS)) {
1da177e4
LT		 3475 /* TCP checksum is good */
3476 skb->ip_summed = CHECKSUM_UNNECESSARY;
2d7edb92
MC		 3477 } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
3478 /* IP fragment with UDP payload */
3479 /* Hardware complements the payload checksum, so we undo it
3480 * and then put the value in host order for further stack use.
3481 */
3482 csum = ntohl(csum ^ 0xFFFF);
3483 skb->csum = csum;
3484 skb->ip_summed = CHECKSUM_HW;
1da177e4 3485 }
2d7edb92 3486 adapter->hw_csum_good++;
1da177e4
LT		 3487}
3488
3489/**
2d7edb92 3490 * e1000_clean_rx_irq - Send received data up the network stack; legacy
1da177e4
LT		 3491 * @adapter: board private structure
3492 **/
3493
3494static boolean_t
3495#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3496e1000_clean_rx_irq(struct e1000_adapter *adapter,
3497 struct e1000_rx_ring *rx_ring,
3498 int *work_done, int work_to_do)
1da177e4 3499#else
581d708e
MC		 3500e1000_clean_rx_irq(struct e1000_adapter *adapter,
3501 struct e1000_rx_ring *rx_ring)
1da177e4
LT		 3502#endif
3503{
1da177e4
LT		 3504 struct net_device *netdev = adapter->netdev;
3505 struct pci_dev *pdev = adapter->pdev;
86c3d59f
JB		 3506 struct e1000_rx_desc *rx_desc, *next_rxd;
3507 struct e1000_buffer *buffer_info, *next_buffer;
1da177e4
LT		 3508 unsigned long flags;
3509 uint32_t length;
3510 uint8_t last_byte;
3511 unsigned int i;
72d64a43 3512 int cleaned_count = 0;
a1415ee6 3513 boolean_t cleaned = FALSE;
1da177e4
LT		 3514
3515 i = rx_ring->next_to_clean;
3516 rx_desc = E1000_RX_DESC(*rx_ring, i);
b92ff8ee 3517 buffer_info = &rx_ring->buffer_info[i];
1da177e4 3518
b92ff8ee 3519 while (rx_desc->status & E1000_RXD_STAT_DD) {
86c3d59f 3520 struct sk_buff *skb, *next_skb;
a292ca6e 3521 u8 status;
1da177e4 3522#ifdef CONFIG_E1000_NAPI
96838a40 3523 if (*work_done >= work_to_do)
1da177e4
LT		 3524 break;
3525 (*work_done)++;
3526#endif
a292ca6e 3527 status = rx_desc->status;
b92ff8ee 3528 skb = buffer_info->skb;
86c3d59f
JB		 3529 buffer_info->skb = NULL;
3530
30320be8
JK		 3531 prefetch(skb->data - NET_IP_ALIGN);
3532
86c3d59f
JB		 3533 if (++i == rx_ring->count) i = 0;
3534 next_rxd = E1000_RX_DESC(*rx_ring, i);
30320be8
JK		 3535 prefetch(next_rxd);
3536
86c3d59f
JB		 3537 next_buffer = &rx_ring->buffer_info[i];
3538 next_skb = next_buffer->skb;
30320be8 3539 prefetch(next_skb->data - NET_IP_ALIGN);
86c3d59f 3540
72d64a43
JK		 3541 cleaned = TRUE;
3542 cleaned_count++;
a292ca6e
JK		 3543 pci_unmap_single(pdev,
3544 buffer_info->dma,
3545 buffer_info->length,
1da177e4
LT		 3546 PCI_DMA_FROMDEVICE);
3547
1da177e4
LT		 3548 length = le16_to_cpu(rx_desc->length);
3549
a1415ee6
JK		 3550 if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
3551 /* All receives must fit into a single buffer */
3552 E1000_DBG("%s: Receive packet consumed multiple"
3553 " buffers\n", netdev->name);
3554 dev_kfree_skb_irq(skb);
1da177e4
LT		 3555 goto next_desc;
3556 }
3557
96838a40 3558 if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
1da177e4 3559 last_byte = *(skb->data + length - 1);
b92ff8ee 3560 if (TBI_ACCEPT(&adapter->hw, status,
1da177e4
LT		 3561 rx_desc->errors, length, last_byte)) {
3562 spin_lock_irqsave(&adapter->stats_lock, flags);
a292ca6e
JK		 3563 e1000_tbi_adjust_stats(&adapter->hw,
3564 &adapter->stats,
1da177e4
LT		 3565 length, skb->data);
3566 spin_unlock_irqrestore(&adapter->stats_lock,
3567 flags);
3568 length--;
3569 } else {
3570 dev_kfree_skb_irq(skb);
3571 goto next_desc;
3572 }
3573 }
3574
a292ca6e
JK		 3575 /* code added for copybreak, this should improve
3576 * performance for small packets with large amounts
3577 * of reassembly being done in the stack */
3578#define E1000_CB_LENGTH 256
a1415ee6 3579 if (length < E1000_CB_LENGTH) {
a292ca6e
JK		 3580 struct sk_buff *new_skb =
3581 dev_alloc_skb(length + NET_IP_ALIGN);
3582 if (new_skb) {
3583 skb_reserve(new_skb, NET_IP_ALIGN);
3584 new_skb->dev = netdev;
3585 memcpy(new_skb->data - NET_IP_ALIGN,
3586 skb->data - NET_IP_ALIGN,
3587 length + NET_IP_ALIGN);
3588 /* save the skb in buffer_info as good */
3589 buffer_info->skb = skb;
3590 skb = new_skb;
3591 skb_put(skb, length);
3592 }
a1415ee6
JK		 3593 } else
3594 skb_put(skb, length);
a292ca6e
JK		 3595
3596 /* end copybreak code */
1da177e4
LT		 3597
3598 /* Receive Checksum Offload */
a292ca6e
JK		 3599 e1000_rx_checksum(adapter,
3600 (uint32_t)(status) |
2d7edb92 3601 ((uint32_t)(rx_desc->errors) << 24),
c3d7a3a4 3602 le16_to_cpu(rx_desc->csum), skb);
96838a40 3603
1da177e4
LT		 3604 skb->protocol = eth_type_trans(skb, netdev);
3605#ifdef CONFIG_E1000_NAPI
96838a40 3606 if (unlikely(adapter->vlgrp &&
a292ca6e 3607 (status & E1000_RXD_STAT_VP))) {
1da177e4 3608 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
2d7edb92
MC		 3609 le16_to_cpu(rx_desc->special) &
3610 E1000_RXD_SPC_VLAN_MASK);
1da177e4
LT		 3611 } else {
3612 netif_receive_skb(skb);
3613 }
3614#else /* CONFIG_E1000_NAPI */
96838a40 3615 if (unlikely(adapter->vlgrp &&
b92ff8ee 3616 (status & E1000_RXD_STAT_VP))) {
1da177e4
LT		 3617 vlan_hwaccel_rx(skb, adapter->vlgrp,
3618 le16_to_cpu(rx_desc->special) &
3619 E1000_RXD_SPC_VLAN_MASK);
3620 } else {
3621 netif_rx(skb);
3622 }
3623#endif /* CONFIG_E1000_NAPI */
3624 netdev->last_rx = jiffies;
3625
3626next_desc:
3627 rx_desc->status = 0;
1da177e4 3628
72d64a43
JK		 3629 /* return some buffers to hardware, one at a time is too slow */
3630 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3631 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3632 cleaned_count = 0;
3633 }
3634
30320be8 3635 /* use prefetched values */
86c3d59f
JB		 3636 rx_desc = next_rxd;
3637 buffer_info = next_buffer;
1da177e4 3638 }
1da177e4 3639 rx_ring->next_to_clean = i;
72d64a43
JK		 3640
3641 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3642 if (cleaned_count)
3643 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
2d7edb92
MC		 3644
3645 return cleaned;
3646}
3647
3648/**
3649 * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
3650 * @adapter: board private structure
3651 **/
3652
3653static boolean_t
3654#ifdef CONFIG_E1000_NAPI
581d708e
MC		 3655e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3656 struct e1000_rx_ring *rx_ring,
3657 int *work_done, int work_to_do)
2d7edb92 3658#else
581d708e
MC		 3659e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
3660 struct e1000_rx_ring *rx_ring)
2d7edb92
MC		 3661#endif
3662{
86c3d59f 3663 union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
2d7edb92
MC		 3664 struct net_device *netdev = adapter->netdev;
3665 struct pci_dev *pdev = adapter->pdev;
86c3d59f 3666 struct e1000_buffer *buffer_info, *next_buffer;
2d7edb92
MC		 3667 struct e1000_ps_page *ps_page;
3668 struct e1000_ps_page_dma *ps_page_dma;
86c3d59f 3669 struct sk_buff *skb, *next_skb;
2d7edb92
MC		 3670 unsigned int i, j;
3671 uint32_t length, staterr;
72d64a43 3672 int cleaned_count = 0;
2d7edb92
MC		 3673 boolean_t cleaned = FALSE;
3674
3675 i = rx_ring->next_to_clean;
3676 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
683a38f3 3677 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92 3678
96838a40 3679 while (staterr & E1000_RXD_STAT_DD) {
30320be8 3680 buffer_info = &rx_ring->buffer_info[i];
2d7edb92
MC		 3681 ps_page = &rx_ring->ps_page[i];
3682 ps_page_dma = &rx_ring->ps_page_dma[i];
3683#ifdef CONFIG_E1000_NAPI
96838a40 3684 if (unlikely(*work_done >= work_to_do))
2d7edb92
MC		 3685 break;
3686 (*work_done)++;
3687#endif
86c3d59f
JB		 3688 skb = buffer_info->skb;
3689
30320be8
JK		 3690 /* in the packet split case this is header only */
3691 prefetch(skb->data - NET_IP_ALIGN);
3692
86c3d59f
JB		 3693 if (++i == rx_ring->count) i = 0;
3694 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
30320be8
JK		 3695 prefetch(next_rxd);
3696
86c3d59f
JB		 3697 next_buffer = &rx_ring->buffer_info[i];
3698 next_skb = next_buffer->skb;
30320be8 3699 prefetch(next_skb->data - NET_IP_ALIGN);
86c3d59f 3700
2d7edb92 3701 cleaned = TRUE;
72d64a43 3702 cleaned_count++;
2d7edb92
MC		 3703 pci_unmap_single(pdev, buffer_info->dma,
3704 buffer_info->length,
3705 PCI_DMA_FROMDEVICE);
3706
96838a40 3707 if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
2d7edb92
MC		 3708 E1000_DBG("%s: Packet Split buffers didn't pick up"
3709 " the full packet\n", netdev->name);
3710 dev_kfree_skb_irq(skb);
3711 goto next_desc;
3712 }
1da177e4 3713
96838a40 3714 if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
2d7edb92
MC		 3715 dev_kfree_skb_irq(skb);
3716 goto next_desc;
3717 }
3718
3719 length = le16_to_cpu(rx_desc->wb.middle.length0);
3720
96838a40 3721 if (unlikely(!length)) {
2d7edb92
MC		 3722 E1000_DBG("%s: Last part of the packet spanning"
3723 " multiple descriptors\n", netdev->name);
3724 dev_kfree_skb_irq(skb);
3725 goto next_desc;
3726 }
3727
3728 /* Good Receive */
3729 skb_put(skb, length);
3730
dc7c6add
JK		 3731 {
3732 /* this looks ugly, but it seems compiler issues make it
3733 more efficient than reusing j */
3734 int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
3735
3736 /* page alloc/put takes too long and effects small packet
3737 * throughput, so unsplit small packets and save the alloc/put*/
3738 if (l1 && ((length + l1) < E1000_CB_LENGTH)) {
3739 u8 *vaddr;
3740 /* there is no documentation about how to call
3741 * kmap_atomic, so we can't hold the mapping
3742 * very long */
3743 pci_dma_sync_single_for_cpu(pdev,
3744 ps_page_dma->ps_page_dma[0],
3745 PAGE_SIZE,
3746 PCI_DMA_FROMDEVICE);
3747 vaddr = kmap_atomic(ps_page->ps_page[0],
3748 KM_SKB_DATA_SOFTIRQ);
3749 memcpy(skb->tail, vaddr, l1);
3750 kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
3751 pci_dma_sync_single_for_device(pdev,
3752 ps_page_dma->ps_page_dma[0],
3753 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3754 skb_put(skb, l1);
3755 length += l1;
3756 goto copydone;
3757 } /* if */
3758 }
3759
96838a40 3760 for (j = 0; j < adapter->rx_ps_pages; j++) {
30320be8 3761 if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
2d7edb92 3762 break;
2d7edb92
MC		 3763 pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
3764 PAGE_SIZE, PCI_DMA_FROMDEVICE);
3765 ps_page_dma->ps_page_dma[j] = 0;
329bfd0b
JK		 3766 skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
3767 length);
2d7edb92 3768 ps_page->ps_page[j] = NULL;
2d7edb92
MC		 3769 skb->len += length;
3770 skb->data_len += length;
3771 }
3772
dc7c6add 3773copydone:
2d7edb92 3774 e1000_rx_checksum(adapter, staterr,
c3d7a3a4 3775 le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
2d7edb92
MC		 3776 skb->protocol = eth_type_trans(skb, netdev);
3777
96838a40 3778 if (likely(rx_desc->wb.upper.header_status &
c3d7a3a4 3779 cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
e4c811c9 3780 adapter->rx_hdr_split++;
2d7edb92 3781#ifdef CONFIG_E1000_NAPI
96838a40 3782 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3783 vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
683a38f3
MC		 3784 le16_to_cpu(rx_desc->wb.middle.vlan) &
3785 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3786 } else {
3787 netif_receive_skb(skb);
3788 }
3789#else /* CONFIG_E1000_NAPI */
96838a40 3790 if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
2d7edb92 3791 vlan_hwaccel_rx(skb, adapter->vlgrp,
683a38f3
MC		 3792 le16_to_cpu(rx_desc->wb.middle.vlan) &
3793 E1000_RXD_SPC_VLAN_MASK);
2d7edb92
MC		 3794 } else {
3795 netif_rx(skb);
3796 }
3797#endif /* CONFIG_E1000_NAPI */
3798 netdev->last_rx = jiffies;
3799
3800next_desc:
c3d7a3a4 3801 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
2d7edb92 3802 buffer_info->skb = NULL;
2d7edb92 3803
72d64a43
JK		 3804 /* return some buffers to hardware, one at a time is too slow */
3805 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
3806 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
3807 cleaned_count = 0;
3808 }
3809
30320be8 3810 /* use prefetched values */
86c3d59f
JB		 3811 rx_desc = next_rxd;
3812 buffer_info = next_buffer;
3813
683a38f3 3814 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
2d7edb92
MC		 3815 }
3816 rx_ring->next_to_clean = i;
72d64a43
JK		 3817
3818 cleaned_count = E1000_DESC_UNUSED(rx_ring);
3819 if (cleaned_count)
3820 adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
1da177e4
LT		 3821
3822 return cleaned;
3823}
3824
3825/**
2d7edb92 3826 * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
1da177e4
LT		 3827 * @adapter: address of board private structure
3828 **/
3829
3830static void
581d708e 3831e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
72d64a43 3832 struct e1000_rx_ring *rx_ring,
a292ca6e 3833 int cleaned_count)
1da177e4 3834{
1da177e4
LT		 3835 struct net_device *netdev = adapter->netdev;
3836 struct pci_dev *pdev = adapter->pdev;
3837 struct e1000_rx_desc *rx_desc;
3838 struct e1000_buffer *buffer_info;
3839 struct sk_buff *skb;
2648345f
MC		 3840 unsigned int i;
3841 unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
1da177e4
LT		 3842
3843 i = rx_ring->next_to_use;
3844 buffer_info = &rx_ring->buffer_info[i];
3845
a292ca6e
JK		 3846 while (cleaned_count--) {
3847 if (!(skb = buffer_info->skb))
3848 skb = dev_alloc_skb(bufsz);
3849 else {
3850 skb_trim(skb, 0);
3851 goto map_skb;
3852 }
3853
96838a40 3854 if (unlikely(!skb)) {
1da177e4 3855 /* Better luck next round */
72d64a43 3856 adapter->alloc_rx_buff_failed++;
1da177e4
LT		 3857 break;
3858 }
3859
2648345f 3860 /* Fix for errata 23, can't cross 64kB boundary */
1da177e4
LT		 3861 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3862 struct sk_buff *oldskb = skb;
2648345f
MC		 3863 DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
3864 "at %p\n", bufsz, skb->data);
3865 /* Try again, without freeing the previous */
1da177e4 3866 skb = dev_alloc_skb(bufsz);
2648345f 3867 /* Failed allocation, critical failure */
1da177e4
LT		 3868 if (!skb) {
3869 dev_kfree_skb(oldskb);
3870 break;
3871 }
2648345f 3872
1da177e4
LT		 3873 if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
3874 /* give up */
3875 dev_kfree_skb(skb);
3876 dev_kfree_skb(oldskb);
3877 break; /* while !buffer_info->skb */
3878 } else {
2648345f 3879 /* Use new allocation */
1da177e4
LT		 3880 dev_kfree_skb(oldskb);
3881 }
3882 }
1da177e4
LT		 3883 /* Make buffer alignment 2 beyond a 16 byte boundary
3884 * this will result in a 16 byte aligned IP header after
3885 * the 14 byte MAC header is removed
3886 */
3887 skb_reserve(skb, NET_IP_ALIGN);
3888
3889 skb->dev = netdev;
3890
3891 buffer_info->skb = skb;
3892 buffer_info->length = adapter->rx_buffer_len;
a292ca6e 3893map_skb:
1da177e4
LT		 3894 buffer_info->dma = pci_map_single(pdev,
3895 skb->data,
3896 adapter->rx_buffer_len,
3897 PCI_DMA_FROMDEVICE);
3898
2648345f
MC		 3899 /* Fix for errata 23, can't cross 64kB boundary */
3900 if (!e1000_check_64k_bound(adapter,
3901 (void *)(unsigned long)buffer_info->dma,
3902 adapter->rx_buffer_len)) {
3903 DPRINTK(RX_ERR, ERR,
3904 "dma align check failed: %u bytes at %p\n",
3905 adapter->rx_buffer_len,
3906 (void *)(unsigned long)buffer_info->dma);
1da177e4
LT		 3907 dev_kfree_skb(skb);
3908 buffer_info->skb = NULL;
3909
2648345f 3910 pci_unmap_single(pdev, buffer_info->dma,
1da177e4
LT		 3911 adapter->rx_buffer_len,
3912 PCI_DMA_FROMDEVICE);
3913
3914 break; /* while !buffer_info->skb */
3915 }
1da177e4
LT		 3916 rx_desc = E1000_RX_DESC(*rx_ring, i);
3917 rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
3918
96838a40
JB		 3919 if (unlikely(++i == rx_ring->count))
3920 i = 0;
1da177e4
LT		 3921 buffer_info = &rx_ring->buffer_info[i];
3922 }
3923
b92ff8ee
JB		 3924 if (likely(rx_ring->next_to_use != i)) {
3925 rx_ring->next_to_use = i;
3926 if (unlikely(i-- == 0))
3927 i = (rx_ring->count - 1);
3928
3929 /* Force memory writes to complete before letting h/w
3930 * know there are new descriptors to fetch. (Only
3931 * applicable for weak-ordered memory model archs,
3932 * such as IA-64). */
3933 wmb();
3934 writel(i, adapter->hw.hw_addr + rx_ring->rdt);
3935 }
1da177e4
LT		 3936}
3937
2d7edb92
MC		 3938/**
3939 * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
3940 * @adapter: address of board private structure
3941 **/
3942
3943static void
581d708e 3944e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
72d64a43
JK		 3945 struct e1000_rx_ring *rx_ring,
3946 int cleaned_count)
2d7edb92 3947{
2d7edb92
MC		 3948 struct net_device *netdev = adapter->netdev;
3949 struct pci_dev *pdev = adapter->pdev;
3950 union e1000_rx_desc_packet_split *rx_desc;
3951 struct e1000_buffer *buffer_info;
3952 struct e1000_ps_page *ps_page;
3953 struct e1000_ps_page_dma *ps_page_dma;
3954 struct sk_buff *skb;
3955 unsigned int i, j;
3956
3957 i = rx_ring->next_to_use;
3958 buffer_info = &rx_ring->buffer_info[i];
3959 ps_page = &rx_ring->ps_page[i];
3960 ps_page_dma = &rx_ring->ps_page_dma[i];
3961
72d64a43 3962 while (cleaned_count--) {
2d7edb92
MC		 3963 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
3964
96838a40 3965 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
e4c811c9
MC		 3966 if (j < adapter->rx_ps_pages) {
3967 if (likely(!ps_page->ps_page[j])) {
3968 ps_page->ps_page[j] =
3969 alloc_page(GFP_ATOMIC);
b92ff8ee
JB		 3970 if (unlikely(!ps_page->ps_page[j])) {
3971 adapter->alloc_rx_buff_failed++;
e4c811c9 3972 goto no_buffers;
b92ff8ee 3973 }
e4c811c9
MC		 3974 ps_page_dma->ps_page_dma[j] =
3975 pci_map_page(pdev,
3976 ps_page->ps_page[j],
3977 0, PAGE_SIZE,
3978 PCI_DMA_FROMDEVICE);
3979 }
3980 /* Refresh the desc even if buffer_addrs didn't
96838a40 3981 * change because each write-back erases
e4c811c9
MC		 3982 * this info.
3983 */
3984 rx_desc->read.buffer_addr[j+1] =
3985 cpu_to_le64(ps_page_dma->ps_page_dma[j]);
3986 } else
3987 rx_desc->read.buffer_addr[j+1] = ~0;
2d7edb92
MC		 3988 }
3989
3990 skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
3991
b92ff8ee
JB		 3992 if (unlikely(!skb)) {
3993 adapter->alloc_rx_buff_failed++;
2d7edb92 3994 break;
b92ff8ee 3995 }
2d7edb92
MC		 3996
3997 /* Make buffer alignment 2 beyond a 16 byte boundary
3998 * this will result in a 16 byte aligned IP header after
3999 * the 14 byte MAC header is removed
4000 */
4001 skb_reserve(skb, NET_IP_ALIGN);
4002
4003 skb->dev = netdev;
4004
4005 buffer_info->skb = skb;
4006 buffer_info->length = adapter->rx_ps_bsize0;
4007 buffer_info->dma = pci_map_single(pdev, skb->data,
4008 adapter->rx_ps_bsize0,
4009 PCI_DMA_FROMDEVICE);
4010
4011 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
4012
96838a40 4013 if (unlikely(++i == rx_ring->count)) i = 0;
2d7edb92
MC		 4014 buffer_info = &rx_ring->buffer_info[i];
4015 ps_page = &rx_ring->ps_page[i];
4016 ps_page_dma = &rx_ring->ps_page_dma[i];
4017 }
4018
4019no_buffers:
b92ff8ee
JB		 4020 if (likely(rx_ring->next_to_use != i)) {
4021 rx_ring->next_to_use = i;
4022 if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
4023
4024 /* Force memory writes to complete before letting h/w
4025 * know there are new descriptors to fetch. (Only
4026 * applicable for weak-ordered memory model archs,
4027 * such as IA-64). */
4028 wmb();
4029 /* Hardware increments by 16 bytes, but packet split
4030 * descriptors are 32 bytes...so we increment tail
4031 * twice as much.
4032 */
4033 writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
4034 }
2d7edb92
MC		 4035}
4036
1da177e4
LT		 4037/**
4038 * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
4039 * @adapter:
4040 **/
4041
4042static void
4043e1000_smartspeed(struct e1000_adapter *adapter)
4044{
4045 uint16_t phy_status;
4046 uint16_t phy_ctrl;
4047
96838a40 4048 if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
1da177e4
LT		 4049 !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
4050 return;
4051
96838a40 4052 if (adapter->smartspeed == 0) {
1da177e4
LT		 4053 /* If Master/Slave config fault is asserted twice,
4054 * we assume back-to-back */
4055 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4056 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4057 e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
96838a40 4058 if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
1da177e4 4059 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
96838a40 4060 if (phy_ctrl & CR_1000T_MS_ENABLE) {
1da177e4
LT		 4061 phy_ctrl &= ~CR_1000T_MS_ENABLE;
4062 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
4063 phy_ctrl);
4064 adapter->smartspeed++;
96838a40 4065 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4066 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
4067 &phy_ctrl)) {
4068 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4069 MII_CR_RESTART_AUTO_NEG);
4070 e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
4071 phy_ctrl);
4072 }
4073 }
4074 return;
96838a40 4075 } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
1da177e4
LT		 4076 /* If still no link, perhaps using 2/3 pair cable */
4077 e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
4078 phy_ctrl |= CR_1000T_MS_ENABLE;
4079 e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
96838a40 4080 if (!e1000_phy_setup_autoneg(&adapter->hw) &&
1da177e4
LT		 4081 !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
4082 phy_ctrl |= (MII_CR_AUTO_NEG_EN |
4083 MII_CR_RESTART_AUTO_NEG);
4084 e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
4085 }
4086 }
4087 /* Restart process after E1000_SMARTSPEED_MAX iterations */
96838a40 4088 if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
1da177e4
LT		 4089 adapter->smartspeed = 0;
4090}
4091
4092/**
4093 * e1000_ioctl -
4094 * @netdev:
4095 * @ifreq:
4096 * @cmd:
4097 **/
4098
4099static int
4100e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4101{
4102 switch (cmd) {
4103 case SIOCGMIIPHY:
4104 case SIOCGMIIREG:
4105 case SIOCSMIIREG:
4106 return e1000_mii_ioctl(netdev, ifr, cmd);
4107 default:
4108 return -EOPNOTSUPP;
4109 }
4110}
4111
4112/**
4113 * e1000_mii_ioctl -
4114 * @netdev:
4115 * @ifreq:
4116 * @cmd:
4117 **/
4118
4119static int
4120e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
4121{
60490fe0 4122 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4123 struct mii_ioctl_data *data = if_mii(ifr);
4124 int retval;
4125 uint16_t mii_reg;
4126 uint16_t spddplx;
97876fc6 4127 unsigned long flags;
1da177e4 4128
96838a40 4129 if (adapter->hw.media_type != e1000_media_type_copper)
1da177e4
LT		 4130 return -EOPNOTSUPP;
4131
4132 switch (cmd) {
4133 case SIOCGMIIPHY:
4134 data->phy_id = adapter->hw.phy_addr;
4135 break;
4136 case SIOCGMIIREG:
96838a40 4137 if (!capable(CAP_NET_ADMIN))
1da177e4 4138 return -EPERM;
97876fc6 4139 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4140 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
97876fc6
MC		 4141 &data->val_out)) {
4142 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4143 return -EIO;
97876fc6
MC		 4144 }
4145 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4146 break;
4147 case SIOCSMIIREG:
96838a40 4148 if (!capable(CAP_NET_ADMIN))
1da177e4 4149 return -EPERM;
96838a40 4150 if (data->reg_num & ~(0x1F))
1da177e4
LT		 4151 return -EFAULT;
4152 mii_reg = data->val_in;
97876fc6 4153 spin_lock_irqsave(&adapter->stats_lock, flags);
96838a40 4154 if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
97876fc6
MC		 4155 mii_reg)) {
4156 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4 4157 return -EIO;
97876fc6 4158 }
cb764326 4159 if (adapter->hw.phy_type == e1000_media_type_copper) {
1da177e4
LT		 4160 switch (data->reg_num) {
4161 case PHY_CTRL:
96838a40 4162 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4163 break;
96838a40 4164 if (mii_reg & MII_CR_AUTO_NEG_EN) {
1da177e4
LT		 4165 adapter->hw.autoneg = 1;
4166 adapter->hw.autoneg_advertised = 0x2F;
4167 } else {
4168 if (mii_reg & 0x40)
4169 spddplx = SPEED_1000;
4170 else if (mii_reg & 0x2000)
4171 spddplx = SPEED_100;
4172 else
4173 spddplx = SPEED_10;
4174 spddplx += (mii_reg & 0x100)
cb764326
JK		 4175 ? DUPLEX_FULL :
4176 DUPLEX_HALF;
1da177e4
LT		 4177 retval = e1000_set_spd_dplx(adapter,
4178 spddplx);
96838a40 4179 if (retval) {
97876fc6 4180 spin_unlock_irqrestore(
96838a40 4181 &adapter->stats_lock,
97876fc6 4182 flags);
1da177e4 4183 return retval;
97876fc6 4184 }
1da177e4 4185 }
96838a40 4186 if (netif_running(adapter->netdev)) {
1da177e4
LT		 4187 e1000_down(adapter);
4188 e1000_up(adapter);
4189 } else
4190 e1000_reset(adapter);
4191 break;
4192 case M88E1000_PHY_SPEC_CTRL:
4193 case M88E1000_EXT_PHY_SPEC_CTRL:
96838a40 4194 if (e1000_phy_reset(&adapter->hw)) {
97876fc6
MC		 4195 spin_unlock_irqrestore(
4196 &adapter->stats_lock, flags);
1da177e4 4197 return -EIO;
97876fc6 4198 }
1da177e4
LT		 4199 break;
4200 }
4201 } else {
4202 switch (data->reg_num) {
4203 case PHY_CTRL:
96838a40 4204 if (mii_reg & MII_CR_POWER_DOWN)
1da177e4 4205 break;
96838a40 4206 if (netif_running(adapter->netdev)) {
1da177e4
LT		 4207 e1000_down(adapter);
4208 e1000_up(adapter);
4209 } else
4210 e1000_reset(adapter);
4211 break;
4212 }
4213 }
97876fc6 4214 spin_unlock_irqrestore(&adapter->stats_lock, flags);
1da177e4
LT		 4215 break;
4216 default:
4217 return -EOPNOTSUPP;
4218 }
4219 return E1000_SUCCESS;
4220}
4221
4222void
4223e1000_pci_set_mwi(struct e1000_hw *hw)
4224{
4225 struct e1000_adapter *adapter = hw->back;
2648345f 4226 int ret_val = pci_set_mwi(adapter->pdev);
1da177e4 4227
96838a40 4228 if (ret_val)
2648345f 4229 DPRINTK(PROBE, ERR, "Error in setting MWI\n");
1da177e4
LT		 4230}
4231
4232void
4233e1000_pci_clear_mwi(struct e1000_hw *hw)
4234{
4235 struct e1000_adapter *adapter = hw->back;
4236
4237 pci_clear_mwi(adapter->pdev);
4238}
4239
4240void
4241e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4242{
4243 struct e1000_adapter *adapter = hw->back;
4244
4245 pci_read_config_word(adapter->pdev, reg, value);
4246}
4247
4248void
4249e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
4250{
4251 struct e1000_adapter *adapter = hw->back;
4252
4253 pci_write_config_word(adapter->pdev, reg, *value);
4254}
4255
4256uint32_t
4257e1000_io_read(struct e1000_hw *hw, unsigned long port)
4258{
4259 return inl(port);
4260}
4261
4262void
4263e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
4264{
4265 outl(value, port);
4266}
4267
4268static void
4269e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
4270{
60490fe0 4271 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4272 uint32_t ctrl, rctl;
4273
4274 e1000_irq_disable(adapter);
4275 adapter->vlgrp = grp;
4276
96838a40 4277 if (grp) {
1da177e4
LT		 4278 /* enable VLAN tag insert/strip */
4279 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4280 ctrl |= E1000_CTRL_VME;
4281 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4282
4283 /* enable VLAN receive filtering */
4284 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4285 rctl |= E1000_RCTL_VFE;
4286 rctl &= ~E1000_RCTL_CFIEN;
4287 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
2d7edb92 4288 e1000_update_mng_vlan(adapter);
1da177e4
LT		 4289 } else {
4290 /* disable VLAN tag insert/strip */
4291 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4292 ctrl &= ~E1000_CTRL_VME;
4293 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4294
4295 /* disable VLAN filtering */
4296 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4297 rctl &= ~E1000_RCTL_VFE;
4298 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
96838a40 4299 if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
2d7edb92
MC		 4300 e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
4301 adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4302 }
1da177e4
LT		 4303 }
4304
4305 e1000_irq_enable(adapter);
4306}
4307
4308static void
4309e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
4310{
60490fe0 4311 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4 4312 uint32_t vfta, index;
96838a40
JB		 4313
4314 if ((adapter->hw.mng_cookie.status &
4315 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
4316 (vid == adapter->mng_vlan_id))
2d7edb92 4317 return;
1da177e4
LT		 4318 /* add VID to filter table */
4319 index = (vid >> 5) & 0x7F;
4320 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4321 vfta |= (1 << (vid & 0x1F));
4322 e1000_write_vfta(&adapter->hw, index, vfta);
4323}
4324
4325static void
4326e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
4327{
60490fe0 4328 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4329 uint32_t vfta, index;
4330
4331 e1000_irq_disable(adapter);
4332
96838a40 4333 if (adapter->vlgrp)
1da177e4
LT		 4334 adapter->vlgrp->vlan_devices[vid] = NULL;
4335
4336 e1000_irq_enable(adapter);
4337
96838a40
JB		 4338 if ((adapter->hw.mng_cookie.status &
4339 E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
ff147013
JK		 4340 (vid == adapter->mng_vlan_id)) {
4341 /* release control to f/w */
4342 e1000_release_hw_control(adapter);
2d7edb92 4343 return;
ff147013
JK		 4344 }
4345
1da177e4
LT		 4346 /* remove VID from filter table */
4347 index = (vid >> 5) & 0x7F;
4348 vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
4349 vfta &= ~(1 << (vid & 0x1F));
4350 e1000_write_vfta(&adapter->hw, index, vfta);
4351}
4352
4353static void
4354e1000_restore_vlan(struct e1000_adapter *adapter)
4355{
4356 e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
4357
96838a40 4358 if (adapter->vlgrp) {
1da177e4 4359 uint16_t vid;
96838a40
JB		 4360 for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
4361 if (!adapter->vlgrp->vlan_devices[vid])
1da177e4
LT		 4362 continue;
4363 e1000_vlan_rx_add_vid(adapter->netdev, vid);
4364 }
4365 }
4366}
4367
4368int
4369e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
4370{
4371 adapter->hw.autoneg = 0;
4372
6921368f 4373 /* Fiber NICs only allow 1000 gbps Full duplex */
96838a40 4374 if ((adapter->hw.media_type == e1000_media_type_fiber) &&
6921368f
MC		 4375 spddplx != (SPEED_1000 + DUPLEX_FULL)) {
4376 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
4377 return -EINVAL;
4378 }
4379
96838a40 4380 switch (spddplx) {
1da177e4
LT		 4381 case SPEED_10 + DUPLEX_HALF:
4382 adapter->hw.forced_speed_duplex = e1000_10_half;
4383 break;
4384 case SPEED_10 + DUPLEX_FULL:
4385 adapter->hw.forced_speed_duplex = e1000_10_full;
4386 break;
4387 case SPEED_100 + DUPLEX_HALF:
4388 adapter->hw.forced_speed_duplex = e1000_100_half;
4389 break;
4390 case SPEED_100 + DUPLEX_FULL:
4391 adapter->hw.forced_speed_duplex = e1000_100_full;
4392 break;
4393 case SPEED_1000 + DUPLEX_FULL:
4394 adapter->hw.autoneg = 1;
4395 adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
4396 break;
4397 case SPEED_1000 + DUPLEX_HALF: /* not supported */
4398 default:
2648345f 4399 DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
1da177e4
LT		 4400 return -EINVAL;
4401 }
4402 return 0;
4403}
4404
b6a1d5f8 4405#ifdef CONFIG_PM
0f15a8fa
JK		 4406/* Save/restore 16 or 64 dwords of PCI config space depending on which
4407 * bus we're on (PCI(X) vs. PCI-E)
2f82665f
JB		 4408 */
4409#define PCIE_CONFIG_SPACE_LEN 256
4410#define PCI_CONFIG_SPACE_LEN 64
4411static int
4412e1000_pci_save_state(struct e1000_adapter *adapter)
4413{
4414 struct pci_dev *dev = adapter->pdev;
4415 int size;
4416 int i;
0f15a8fa 4417
2f82665f
JB		 4418 if (adapter->hw.mac_type >= e1000_82571)
4419 size = PCIE_CONFIG_SPACE_LEN;
4420 else
4421 size = PCI_CONFIG_SPACE_LEN;
4422
4423 WARN_ON(adapter->config_space != NULL);
4424
4425 adapter->config_space = kmalloc(size, GFP_KERNEL);
4426 if (!adapter->config_space) {
4427 DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
4428 return -ENOMEM;
4429 }
4430 for (i = 0; i < (size / 4); i++)
4431 pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
4432 return 0;
4433}
4434
4435static void
4436e1000_pci_restore_state(struct e1000_adapter *adapter)
4437{
4438 struct pci_dev *dev = adapter->pdev;
4439 int size;
4440 int i;
0f15a8fa 4441
2f82665f
JB		 4442 if (adapter->config_space == NULL)
4443 return;
0f15a8fa 4444
2f82665f
JB		 4445 if (adapter->hw.mac_type >= e1000_82571)
4446 size = PCIE_CONFIG_SPACE_LEN;
4447 else
4448 size = PCI_CONFIG_SPACE_LEN;
4449 for (i = 0; i < (size / 4); i++)
4450 pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
4451 kfree(adapter->config_space);
4452 adapter->config_space = NULL;
4453 return;
4454}
4455#endif /* CONFIG_PM */
4456
1da177e4 4457static int
829ca9a3 4458e1000_suspend(struct pci_dev *pdev, pm_message_t state)
1da177e4
LT		 4459{
4460 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4461 struct e1000_adapter *adapter = netdev_priv(netdev);
b55ccb35 4462 uint32_t ctrl, ctrl_ext, rctl, manc, status;
1da177e4 4463 uint32_t wufc = adapter->wol;
240b1710 4464 int retval = 0;
1da177e4
LT		 4465
4466 netif_device_detach(netdev);
4467
96838a40 4468 if (netif_running(netdev))
1da177e4
LT		 4469 e1000_down(adapter);
4470
2f82665f 4471#ifdef CONFIG_PM
0f15a8fa
JK		 4472 /* Implement our own version of pci_save_state(pdev) because pci-
4473 * express adapters have 256-byte config spaces. */
2f82665f
JB		 4474 retval = e1000_pci_save_state(adapter);
4475 if (retval)
4476 return retval;
4477#endif
4478
1da177e4 4479 status = E1000_READ_REG(&adapter->hw, STATUS);
96838a40 4480 if (status & E1000_STATUS_LU)
1da177e4
LT		 4481 wufc &= ~E1000_WUFC_LNKC;
4482
96838a40 4483 if (wufc) {
1da177e4
LT		 4484 e1000_setup_rctl(adapter);
4485 e1000_set_multi(netdev);
4486
4487 /* turn on all-multi mode if wake on multicast is enabled */
96838a40 4488 if (adapter->wol & E1000_WUFC_MC) {
1da177e4
LT		 4489 rctl = E1000_READ_REG(&adapter->hw, RCTL);
4490 rctl |= E1000_RCTL_MPE;
4491 E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
4492 }
4493
96838a40 4494 if (adapter->hw.mac_type >= e1000_82540) {
1da177e4
LT		 4495 ctrl = E1000_READ_REG(&adapter->hw, CTRL);
4496 /* advertise wake from D3Cold */
4497 #define E1000_CTRL_ADVD3WUC 0x00100000
4498 /* phy power management enable */
4499 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
4500 ctrl |= E1000_CTRL_ADVD3WUC |
4501 E1000_CTRL_EN_PHY_PWR_MGMT;
4502 E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
4503 }
4504
96838a40 4505 if (adapter->hw.media_type == e1000_media_type_fiber ||
1da177e4
LT		 4506 adapter->hw.media_type == e1000_media_type_internal_serdes) {
4507 /* keep the laser running in D3 */
4508 ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
4509 ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
4510 E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
4511 }
4512
2d7edb92
MC		 4513 /* Allow time for pending master requests to run */
4514 e1000_disable_pciex_master(&adapter->hw);
4515
1da177e4
LT		 4516 E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
4517 E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
240b1710
JK		 4518 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4519 if (retval)
4520 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4521 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4522 if (retval)
4523 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4524 } else {
4525 E1000_WRITE_REG(&adapter->hw, WUC, 0);
4526 E1000_WRITE_REG(&adapter->hw, WUFC, 0);
240b1710
JK		 4527 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4528 if (retval)
4529 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
0f15a8fa 4530 retval = pci_enable_wake(pdev, PCI_D3cold, 0);
240b1710
JK		 4531 if (retval)
4532 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4533 }
4534
96838a40 4535 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4536 adapter->hw.media_type == e1000_media_type_copper) {
4537 manc = E1000_READ_REG(&adapter->hw, MANC);
96838a40 4538 if (manc & E1000_MANC_SMBUS_EN) {
1da177e4
LT		 4539 manc |= E1000_MANC_ARP_EN;
4540 E1000_WRITE_REG(&adapter->hw, MANC, manc);
240b1710
JK		 4541 retval = pci_enable_wake(pdev, PCI_D3hot, 1);
4542 if (retval)
4543 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4544 retval = pci_enable_wake(pdev, PCI_D3cold, 1);
4545 if (retval)
0f15a8fa
JK		 4546 DPRINTK(PROBE, ERR,
4547 "Error enabling D3 cold wake\n");
1da177e4
LT		 4548 }
4549 }
4550
b55ccb35
JK		 4551 /* Release control of h/w to f/w. If f/w is AMT enabled, this
4552 * would have already happened in close and is redundant. */
4553 e1000_release_hw_control(adapter);
2d7edb92 4554
1da177e4 4555 pci_disable_device(pdev);
240b1710
JK		 4556
4557 retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
4558 if (retval)
4559 DPRINTK(PROBE, ERR, "Error in setting power state\n");
1da177e4
LT		 4560
4561 return 0;
4562}
4563
2f82665f 4564#ifdef CONFIG_PM
1da177e4
LT		 4565static int
4566e1000_resume(struct pci_dev *pdev)
4567{
4568 struct net_device *netdev = pci_get_drvdata(pdev);
60490fe0 4569 struct e1000_adapter *adapter = netdev_priv(netdev);
240b1710 4570 int retval;
b55ccb35 4571 uint32_t manc, ret_val;
1da177e4 4572
240b1710
JK		 4573 retval = pci_set_power_state(pdev, PCI_D0);
4574 if (retval)
4575 DPRINTK(PROBE, ERR, "Error in setting power state\n");
2f82665f 4576 e1000_pci_restore_state(adapter);
2b02893e 4577 ret_val = pci_enable_device(pdev);
a4cb847d 4578 pci_set_master(pdev);
1da177e4 4579
240b1710
JK		 4580 retval = pci_enable_wake(pdev, PCI_D3hot, 0);
4581 if (retval)
4582 DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
4583 retval = pci_enable_wake(pdev, PCI_D3cold, 0);
4584 if (retval)
4585 DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
1da177e4
LT		 4586
4587 e1000_reset(adapter);
4588 E1000_WRITE_REG(&adapter->hw, WUS, ~0);
4589
96838a40 4590 if (netif_running(netdev))
1da177e4
LT		 4591 e1000_up(adapter);
4592
4593 netif_device_attach(netdev);
4594
96838a40 4595 if (adapter->hw.mac_type >= e1000_82540 &&
1da177e4
LT		 4596 adapter->hw.media_type == e1000_media_type_copper) {
4597 manc = E1000_READ_REG(&adapter->hw, MANC);
4598 manc &= ~(E1000_MANC_ARP_EN);
4599 E1000_WRITE_REG(&adapter->hw, MANC, manc);
4600 }
4601
b55ccb35
JK		 4602 /* If the controller is 82573 and f/w is AMT, do not set
4603 * DRV_LOAD until the interface is up. For all other cases,
4604 * let the f/w know that the h/w is now under the control
4605 * of the driver. */
4606 if (adapter->hw.mac_type != e1000_82573 ||
4607 !e1000_check_mng_mode(&adapter->hw))
4608 e1000_get_hw_control(adapter);
2d7edb92 4609
1da177e4
LT		 4610 return 0;
4611}
4612#endif
1da177e4
LT		 4613#ifdef CONFIG_NET_POLL_CONTROLLER
4614/*
4615 * Polling 'interrupt' - used by things like netconsole to send skbs
4616 * without having to re-enable interrupts. It's not called while
4617 * the interrupt routine is executing.
4618 */
4619static void
2648345f 4620e1000_netpoll(struct net_device *netdev)
1da177e4 4621{
60490fe0 4622 struct e1000_adapter *adapter = netdev_priv(netdev);
1da177e4
LT		 4623 disable_irq(adapter->pdev->irq);
4624 e1000_intr(adapter->pdev->irq, netdev, NULL);
c4cfe567 4625 e1000_clean_tx_irq(adapter, adapter->tx_ring);
e8da8be1
JK		 4626#ifndef CONFIG_E1000_NAPI
4627 adapter->clean_rx(adapter, adapter->rx_ring);
4628#endif
1da177e4
LT		 4629 enable_irq(adapter->pdev->irq);
4630}
4631#endif
4632
4633/* e1000_main.c */
Clone of davem's net-next-2.6 tree