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CRISv10: Don't autonegotiate if autonegotiation is off
[net-next-2.6.git] / drivers / net / cris / eth_v10.c
CommitLineData
5efa1d1c 1/*
1da177e4
LT		 2 * e100net.c: A network driver for the ETRAX 100LX network controller.
3 *
4 * Copyright (c) 1998-2002 Axis Communications AB.
5 *
6 * The outline of this driver comes from skeleton.c.
7 *
1da177e4
LT		 8 */
9
1da177e4
LT		 10
11#include <linux/module.h>
12
13#include <linux/kernel.h>
1da177e4
LT		 14#include <linux/delay.h>
15#include <linux/types.h>
16#include <linux/fcntl.h>
17#include <linux/interrupt.h>
18#include <linux/ptrace.h>
19#include <linux/ioport.h>
20#include <linux/in.h>
21#include <linux/slab.h>
22#include <linux/string.h>
23#include <linux/spinlock.h>
24#include <linux/errno.h>
25#include <linux/init.h>
1977f032 26#include <linux/bitops.h>
1da177e4
LT		 27
28#include <linux/if.h>
29#include <linux/mii.h>
30#include <linux/netdevice.h>
31#include <linux/etherdevice.h>
32#include <linux/skbuff.h>
33#include <linux/ethtool.h>
34
556dcee7 35#include <arch/svinto.h>/* DMA and register descriptions */
5efa1d1c 36#include <asm/io.h> /* CRIS_LED_* I/O functions */
1da177e4
LT		 37#include <asm/irq.h>
38#include <asm/dma.h>
39#include <asm/system.h>
1da177e4
LT		 40#include <asm/ethernet.h>
41#include <asm/cache.h>
556dcee7 42#include <arch/io_interface_mux.h>
1da177e4
LT		 43
44//#define ETHDEBUG
45#define D(x)
46
47/*
48 * The name of the card. Is used for messages and in the requests for
49 * io regions, irqs and dma channels
50 */
51
52static const char* cardname = "ETRAX 100LX built-in ethernet controller";
53
54/* A default ethernet address. Highlevel SW will set the real one later */
55
56static struct sockaddr default_mac = {
57 0,
58 { 0x00, 0x40, 0x8C, 0xCD, 0x00, 0x00 }
59};
60
61/* Information that need to be kept for each board. */
62struct net_local {
63 struct net_device_stats stats;
64 struct mii_if_info mii_if;
65
66 /* Tx control lock. This protects the transmit buffer ring
67 * state along with the "tx full" state of the driver. This
68 * means all netif_queue flow control actions are protected
69 * by this lock as well.
70 */
71 spinlock_t lock;
bafef0ae
JN		 72
73 spinlock_t led_lock; /* Protect LED state */
74 spinlock_t transceiver_lock; /* Protect transceiver state. */
1da177e4
LT		 75};
76
77typedef struct etrax_eth_descr
78{
79 etrax_dma_descr descr;
80 struct sk_buff* skb;
81} etrax_eth_descr;
82
83/* Some transceivers requires special handling */
84struct transceiver_ops
85{
86 unsigned int oui;
87 void (*check_speed)(struct net_device* dev);
88 void (*check_duplex)(struct net_device* dev);
89};
90
1da177e4
LT		 91/* Duplex settings */
92enum duplex
93{
94 half,
95 full,
96 autoneg
97};
98
99/* Dma descriptors etc. */
100
bafef0ae 101#define MAX_MEDIA_DATA_SIZE 1522
1da177e4
LT		 102
103#define MIN_PACKET_LEN 46
104#define ETHER_HEAD_LEN 14
105
106/*
107** MDIO constants.
108*/
109#define MDIO_START 0x1
110#define MDIO_READ 0x2
111#define MDIO_WRITE 0x1
112#define MDIO_PREAMBLE 0xfffffffful
113
114/* Broadcom specific */
115#define MDIO_AUX_CTRL_STATUS_REG 0x18
116#define MDIO_BC_FULL_DUPLEX_IND 0x1
117#define MDIO_BC_SPEED 0x2
118
119/* TDK specific */
120#define MDIO_TDK_DIAGNOSTIC_REG 18
121#define MDIO_TDK_DIAGNOSTIC_RATE 0x400
122#define MDIO_TDK_DIAGNOSTIC_DPLX 0x800
123
124/*Intel LXT972A specific*/
125#define MDIO_INT_STATUS_REG_2 0x0011
bafef0ae
JN		 126#define MDIO_INT_FULL_DUPLEX_IND (1 << 9)
127#define MDIO_INT_SPEED (1 << 14)
1da177e4
LT		 128
129/* Network flash constants */
130#define NET_FLASH_TIME (HZ/50) /* 20 ms */
131#define NET_FLASH_PAUSE (HZ/100) /* 10 ms */
132#define NET_LINK_UP_CHECK_INTERVAL (2*HZ) /* 2 s */
133#define NET_DUPLEX_CHECK_INTERVAL (2*HZ) /* 2 s */
134
135#define NO_NETWORK_ACTIVITY 0
136#define NETWORK_ACTIVITY 1
137
bafef0ae
JN		 138#define NBR_OF_RX_DESC 32
139#define NBR_OF_TX_DESC 16
1da177e4
LT		 140
141/* Large packets are sent directly to upper layers while small packets are */
142/* copied (to reduce memory waste). The following constant decides the breakpoint */
143#define RX_COPYBREAK 256
144
145/* Due to a chip bug we need to flush the cache when descriptors are returned */
146/* to the DMA. To decrease performance impact we return descriptors in chunks. */
147/* The following constant determines the number of descriptors to return. */
148#define RX_QUEUE_THRESHOLD NBR_OF_RX_DESC/2
149
150#define GET_BIT(bit,val) (((val) >> (bit)) & 0x01)
151
152/* Define some macros to access ETRAX 100 registers */
153#define SETF(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
154 IO_FIELD_(reg##_, field##_, val)
155#define SETS(var, reg, field, val) var = (var & ~IO_MASK_(reg##_, field##_)) | \
156 IO_STATE_(reg##_, field##_, _##val)
157
158static etrax_eth_descr *myNextRxDesc; /* Points to the next descriptor to
159 to be processed */
160static etrax_eth_descr *myLastRxDesc; /* The last processed descriptor */
1da177e4
LT		 161
162static etrax_eth_descr RxDescList[NBR_OF_RX_DESC] __attribute__ ((aligned(32)));
163
164static etrax_eth_descr* myFirstTxDesc; /* First packet not yet sent */
165static etrax_eth_descr* myLastTxDesc; /* End of send queue */
166static etrax_eth_descr* myNextTxDesc; /* Next descriptor to use */
167static etrax_eth_descr TxDescList[NBR_OF_TX_DESC] __attribute__ ((aligned(32)));
168
169static unsigned int network_rec_config_shadow = 0;
1da177e4
LT		 170
171static unsigned int network_tr_ctrl_shadow = 0;
172
173/* Network speed indication. */
8d06afab
IM		 174static DEFINE_TIMER(speed_timer, NULL, 0, 0);
175static DEFINE_TIMER(clear_led_timer, NULL, 0, 0);
1da177e4
LT		 176static int current_speed; /* Speed read from transceiver */
177static int current_speed_selection; /* Speed selected by user */
178static unsigned long led_next_time;
179static int led_active;
180static int rx_queue_len;
181
182/* Duplex */
8d06afab 183static DEFINE_TIMER(duplex_timer, NULL, 0, 0);
1da177e4
LT		 184static int full_duplex;
185static enum duplex current_duplex;
186
187/* Index to functions, as function prototypes. */
188
189static int etrax_ethernet_init(void);
190
191static int e100_open(struct net_device *dev);
192static int e100_set_mac_address(struct net_device *dev, void *addr);
193static int e100_send_packet(struct sk_buff *skb, struct net_device *dev);
7d12e780
DH		 194static irqreturn_t e100rxtx_interrupt(int irq, void *dev_id);
195static irqreturn_t e100nw_interrupt(int irq, void *dev_id);
1da177e4
LT		 196static void e100_rx(struct net_device *dev);
197static int e100_close(struct net_device *dev);
198static int e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd);
1da177e4
LT		 199static int e100_set_config(struct net_device* dev, struct ifmap* map);
200static void e100_tx_timeout(struct net_device *dev);
201static struct net_device_stats *e100_get_stats(struct net_device *dev);
202static void set_multicast_list(struct net_device *dev);
bafef0ae 203static void e100_hardware_send_packet(struct net_local* np, char *buf, int length);
1da177e4
LT		 204static void update_rx_stats(struct net_device_stats *);
205static void update_tx_stats(struct net_device_stats *);
206static int e100_probe_transceiver(struct net_device* dev);
207
208static void e100_check_speed(unsigned long priv);
209static void e100_set_speed(struct net_device* dev, unsigned long speed);
210static void e100_check_duplex(unsigned long priv);
211static void e100_set_duplex(struct net_device* dev, enum duplex);
212static void e100_negotiate(struct net_device* dev);
213
214static int e100_get_mdio_reg(struct net_device *dev, int phy_id, int location);
215static void e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value);
216
217static void e100_send_mdio_cmd(unsigned short cmd, int write_cmd);
218static void e100_send_mdio_bit(unsigned char bit);
219static unsigned char e100_receive_mdio_bit(void);
220static void e100_reset_transceiver(struct net_device* net);
221
222static void e100_clear_network_leds(unsigned long dummy);
223static void e100_set_network_leds(int active);
224
7282d491 225static const struct ethtool_ops e100_ethtool_ops;
bafef0ae
JN		 226#if defined(CONFIG_ETRAX_NO_PHY)
227static void dummy_check_speed(struct net_device* dev);
228static void dummy_check_duplex(struct net_device* dev);
229#else
1da177e4
LT		 230static void broadcom_check_speed(struct net_device* dev);
231static void broadcom_check_duplex(struct net_device* dev);
232static void tdk_check_speed(struct net_device* dev);
233static void tdk_check_duplex(struct net_device* dev);
234static void intel_check_speed(struct net_device* dev);
235static void intel_check_duplex(struct net_device* dev);
236static void generic_check_speed(struct net_device* dev);
237static void generic_check_duplex(struct net_device* dev);
bafef0ae
JN		 238#endif
239#ifdef CONFIG_NET_POLL_CONTROLLER
240static void e100_netpoll(struct net_device* dev);
241#endif
242
243static int autoneg_normal = 1;
1da177e4
LT		 244
245struct transceiver_ops transceivers[] =
246{
bafef0ae
JN		 247#if defined(CONFIG_ETRAX_NO_PHY)
248 {0x0000, dummy_check_speed, dummy_check_duplex} /* Dummy */
249#else
1da177e4
LT		 250 {0x1018, broadcom_check_speed, broadcom_check_duplex}, /* Broadcom */
251 {0xC039, tdk_check_speed, tdk_check_duplex}, /* TDK 2120 */
252 {0x039C, tdk_check_speed, tdk_check_duplex}, /* TDK 2120C */
253 {0x04de, intel_check_speed, intel_check_duplex}, /* Intel LXT972A*/
254 {0x0000, generic_check_speed, generic_check_duplex} /* Generic, must be last */
bafef0ae 255#endif
1da177e4
LT		 256};
257
bafef0ae
JN		 258struct transceiver_ops* transceiver = &transceivers[0];
259
a95c2a3b
AB		 260static const struct net_device_ops e100_netdev_ops = {
261 .ndo_open = e100_open,
262 .ndo_stop = e100_close,
263 .ndo_start_xmit = e100_send_packet,
264 .ndo_tx_timeout = e100_tx_timeout,
265 .ndo_get_stats = e100_get_stats,
266 .ndo_set_multicast_list = set_multicast_list,
267 .ndo_do_ioctl = e100_ioctl,
268 .ndo_set_mac_address = e100_set_mac_address,
269 .ndo_validate_addr = eth_validate_addr,
270 .ndo_change_mtu = eth_change_mtu,
271 .ndo_set_config = e100_set_config,
272#ifdef CONFIG_NET_POLL_CONTROLLER
273 .ndo_poll_controller = e100_netpoll,
274#endif
275};
276
1da177e4
LT		 277#define tx_done(dev) (*R_DMA_CH0_CMD == 0)
278
279/*
280 * Check for a network adaptor of this type, and return '0' if one exists.
281 * If dev->base_addr == 0, probe all likely locations.
282 * If dev->base_addr == 1, always return failure.
283 * If dev->base_addr == 2, allocate space for the device and return success
284 * (detachable devices only).
285 */
286
287static int __init
288etrax_ethernet_init(void)
289{
290 struct net_device *dev;
291 struct net_local* np;
292 int i, err;
293
294 printk(KERN_INFO
bafef0ae 295 "ETRAX 100LX 10/100MBit ethernet v2.0 (c) 1998-2007 Axis Communications AB\n");
1da177e4 296
bafef0ae
JN		 297 if (cris_request_io_interface(if_eth, cardname)) {
298 printk(KERN_CRIT "etrax_ethernet_init failed to get IO interface\n");
299 return -EBUSY;
300 }
1da177e4 301
bafef0ae 302 dev = alloc_etherdev(sizeof(struct net_local));
1da177e4
LT		 303 if (!dev)
304 return -ENOMEM;
305
bafef0ae
JN		 306 np = netdev_priv(dev);
307
308 /* we do our own locking */
309 dev->features |= NETIF_F_LLTX;
310
1da177e4
LT		 311 dev->base_addr = (unsigned int)R_NETWORK_SA_0; /* just to have something to show */
312
313 /* now setup our etrax specific stuff */
314
315 dev->irq = NETWORK_DMA_RX_IRQ_NBR; /* we really use DMATX as well... */
316 dev->dma = NETWORK_RX_DMA_NBR;
317
318 /* fill in our handlers so the network layer can talk to us in the future */
319
76f2b4d9 320 dev->ethtool_ops = &e100_ethtool_ops;
a95c2a3b 321 dev->netdev_ops = &e100_netdev_ops;
bafef0ae
JN		 322
323 spin_lock_init(&np->lock);
324 spin_lock_init(&np->led_lock);
325 spin_lock_init(&np->transceiver_lock);
1da177e4
LT		 326
327 /* Initialise the list of Etrax DMA-descriptors */
328
329 /* Initialise receive descriptors */
330
331 for (i = 0; i < NBR_OF_RX_DESC; i++) {
bafef0ae
JN		 332 /* Allocate two extra cachelines to make sure that buffer used
333 * by DMA does not share cacheline with any other data (to
334 * avoid cache bug)
1da177e4
LT		 335 */
336 RxDescList[i].skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
92b1f905
DR		 337 if (!RxDescList[i].skb)
338 return -ENOMEM;
1da177e4
LT		 339 RxDescList[i].descr.ctrl = 0;
340 RxDescList[i].descr.sw_len = MAX_MEDIA_DATA_SIZE;
341 RxDescList[i].descr.next = virt_to_phys(&RxDescList[i + 1]);
342 RxDescList[i].descr.buf = L1_CACHE_ALIGN(virt_to_phys(RxDescList[i].skb->data));
343 RxDescList[i].descr.status = 0;
344 RxDescList[i].descr.hw_len = 0;
345 prepare_rx_descriptor(&RxDescList[i].descr);
346 }
347
348 RxDescList[NBR_OF_RX_DESC - 1].descr.ctrl = d_eol;
349 RxDescList[NBR_OF_RX_DESC - 1].descr.next = virt_to_phys(&RxDescList[0]);
350 rx_queue_len = 0;
351
352 /* Initialize transmit descriptors */
353 for (i = 0; i < NBR_OF_TX_DESC; i++) {
354 TxDescList[i].descr.ctrl = 0;
355 TxDescList[i].descr.sw_len = 0;
356 TxDescList[i].descr.next = virt_to_phys(&TxDescList[i + 1].descr);
357 TxDescList[i].descr.buf = 0;
358 TxDescList[i].descr.status = 0;
359 TxDescList[i].descr.hw_len = 0;
360 TxDescList[i].skb = 0;
361 }
362
363 TxDescList[NBR_OF_TX_DESC - 1].descr.ctrl = d_eol;
364 TxDescList[NBR_OF_TX_DESC - 1].descr.next = virt_to_phys(&TxDescList[0].descr);
365
366 /* Initialise initial pointers */
367
368 myNextRxDesc = &RxDescList[0];
369 myLastRxDesc = &RxDescList[NBR_OF_RX_DESC - 1];
1da177e4
LT		 370 myFirstTxDesc = &TxDescList[0];
371 myNextTxDesc = &TxDescList[0];
372 myLastTxDesc = &TxDescList[NBR_OF_TX_DESC - 1];
373
374 /* Register device */
375 err = register_netdev(dev);
376 if (err) {
377 free_netdev(dev);
378 return err;
379 }
380
381 /* set the default MAC address */
382
383 e100_set_mac_address(dev, &default_mac);
384
385 /* Initialize speed indicator stuff. */
386
387 current_speed = 10;
388 current_speed_selection = 0; /* Auto */
389 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
bafef0ae 390 speed_timer.data = (unsigned long)dev;
1da177e4
LT		 391 speed_timer.function = e100_check_speed;
392
393 clear_led_timer.function = e100_clear_network_leds;
bafef0ae 394 clear_led_timer.data = (unsigned long)dev;
1da177e4
LT		 395
396 full_duplex = 0;
397 current_duplex = autoneg;
398 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
399 duplex_timer.data = (unsigned long)dev;
400 duplex_timer.function = e100_check_duplex;
401
402 /* Initialize mii interface */
1da177e4
LT		 403 np->mii_if.phy_id_mask = 0x1f;
404 np->mii_if.reg_num_mask = 0x1f;
405 np->mii_if.dev = dev;
406 np->mii_if.mdio_read = e100_get_mdio_reg;
407 np->mii_if.mdio_write = e100_set_mdio_reg;
408
409 /* Initialize group address registers to make sure that no */
410 /* unwanted addresses are matched */
411 *R_NETWORK_GA_0 = 0x00000000;
412 *R_NETWORK_GA_1 = 0x00000000;
bafef0ae
JN		 413
414 /* Initialize next time the led can flash */
415 led_next_time = jiffies;
1da177e4
LT		 416 return 0;
417}
418
419/* set MAC address of the interface. called from the core after a
420 * SIOCSIFADDR ioctl, and from the bootup above.
421 */
422
423static int
424e100_set_mac_address(struct net_device *dev, void *p)
425{
bafef0ae 426 struct net_local *np = netdev_priv(dev);
1da177e4 427 struct sockaddr *addr = p;
1da177e4
LT		 428
429 spin_lock(&np->lock); /* preemption protection */
430
431 /* remember it */
432
433 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
434
435 /* Write it to the hardware.
436 * Note the way the address is wrapped:
437 * *R_NETWORK_SA_0 = a0_0 | (a0_1 << 8) | (a0_2 << 16) | (a0_3 << 24);
438 * *R_NETWORK_SA_1 = a0_4 | (a0_5 << 8);
439 */
440
441 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
442 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
443 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
444 *R_NETWORK_SA_2 = 0;
445
446 /* show it in the log as well */
447
e174961c 448 printk(KERN_INFO "%s: changed MAC to %pM\n", dev->name, dev->dev_addr);
1da177e4
LT		 449
450 spin_unlock(&np->lock);
451
452 return 0;
453}
454
455/*
456 * Open/initialize the board. This is called (in the current kernel)
457 * sometime after booting when the 'ifconfig' program is run.
458 *
459 * This routine should set everything up anew at each open, even
460 * registers that "should" only need to be set once at boot, so that
461 * there is non-reboot way to recover if something goes wrong.
462 */
463
464static int
465e100_open(struct net_device *dev)
466{
467 unsigned long flags;
468
469 /* enable the MDIO output pin */
470
471 *R_NETWORK_MGM_CTRL = IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable);
472
473 *R_IRQ_MASK0_CLR =
474 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
475 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
476 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
477
478 /* clear dma0 and 1 eop and descr irq masks */
479 *R_IRQ_MASK2_CLR =
480 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
481 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
482 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
483 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
484
485 /* Reset and wait for the DMA channels */
486
487 RESET_DMA(NETWORK_TX_DMA_NBR);
488 RESET_DMA(NETWORK_RX_DMA_NBR);
489 WAIT_DMA(NETWORK_TX_DMA_NBR);
490 WAIT_DMA(NETWORK_RX_DMA_NBR);
491
492 /* Initialise the etrax network controller */
493
494 /* allocate the irq corresponding to the receiving DMA */
495
496 if (request_irq(NETWORK_DMA_RX_IRQ_NBR, e100rxtx_interrupt,
1fb9df5d 497 IRQF_SAMPLE_RANDOM, cardname, (void *)dev)) {
1da177e4
LT		 498 goto grace_exit0;
499 }
500
501 /* allocate the irq corresponding to the transmitting DMA */
502
503 if (request_irq(NETWORK_DMA_TX_IRQ_NBR, e100rxtx_interrupt, 0,
504 cardname, (void *)dev)) {
505 goto grace_exit1;
506 }
507
508 /* allocate the irq corresponding to the network errors etc */
509
510 if (request_irq(NETWORK_STATUS_IRQ_NBR, e100nw_interrupt, 0,
511 cardname, (void *)dev)) {
512 goto grace_exit2;
513 }
514
bafef0ae
JN		 515 /*
516 * Always allocate the DMA channels after the IRQ,
517 * and clean up on failure.
518 */
519
520 if (cris_request_dma(NETWORK_TX_DMA_NBR,
521 cardname,
522 DMA_VERBOSE_ON_ERROR,
523 dma_eth)) {
524 goto grace_exit3;
525 }
526
527 if (cris_request_dma(NETWORK_RX_DMA_NBR,
528 cardname,
529 DMA_VERBOSE_ON_ERROR,
530 dma_eth)) {
531 goto grace_exit4;
532 }
533
1da177e4
LT		 534 /* give the HW an idea of what MAC address we want */
535
536 *R_NETWORK_SA_0 = dev->dev_addr[0] | (dev->dev_addr[1] << 8) |
537 (dev->dev_addr[2] << 16) | (dev->dev_addr[3] << 24);
538 *R_NETWORK_SA_1 = dev->dev_addr[4] | (dev->dev_addr[5] << 8);
539 *R_NETWORK_SA_2 = 0;
540
541#if 0
542 /* use promiscuous mode for testing */
543 *R_NETWORK_GA_0 = 0xffffffff;
544 *R_NETWORK_GA_1 = 0xffffffff;
545
546 *R_NETWORK_REC_CONFIG = 0xd; /* broadcast rec, individ. rec, ma0 enabled */
547#else
bafef0ae 548 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, max_size, size1522);
1da177e4
LT		 549 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, broadcast, receive);
550 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, ma0, enable);
551 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
552 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
553#endif
554
555 *R_NETWORK_GEN_CONFIG =
556 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk) |
557 IO_STATE(R_NETWORK_GEN_CONFIG, enable, on);
558
559 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
560 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, delay, none);
561 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cancel, dont);
562 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, cd, enable);
563 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, retry, enable);
564 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, pad, enable);
565 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, crc, enable);
566 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
567
bafef0ae 568 local_irq_save(flags);
1da177e4
LT		 569
570 /* enable the irq's for ethernet DMA */
571
572 *R_IRQ_MASK2_SET =
573 IO_STATE(R_IRQ_MASK2_SET, dma0_eop, set) |
574 IO_STATE(R_IRQ_MASK2_SET, dma1_eop, set);
575
576 *R_IRQ_MASK0_SET =
577 IO_STATE(R_IRQ_MASK0_SET, overrun, set) |
578 IO_STATE(R_IRQ_MASK0_SET, underrun, set) |
579 IO_STATE(R_IRQ_MASK0_SET, excessive_col, set);
580
581 /* make sure the irqs are cleared */
582
583 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
584 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
585
586 /* make sure the rec and transmit error counters are cleared */
587
588 (void)*R_REC_COUNTERS; /* dummy read */
589 (void)*R_TR_COUNTERS; /* dummy read */
590
591 /* start the receiving DMA channel so we can receive packets from now on */
592
593 *R_DMA_CH1_FIRST = virt_to_phys(myNextRxDesc);
594 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, start);
595
596 /* Set up transmit DMA channel so it can be restarted later */
597
598 *R_DMA_CH0_FIRST = 0;
599 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
bafef0ae 600 netif_start_queue(dev);
1da177e4 601
bafef0ae 602 local_irq_restore(flags);
1da177e4
LT		 603
604 /* Probe for transceiver */
605 if (e100_probe_transceiver(dev))
bafef0ae 606 goto grace_exit5;
1da177e4
LT		 607
608 /* Start duplex/speed timers */
609 add_timer(&speed_timer);
610 add_timer(&duplex_timer);
611
612 /* We are now ready to accept transmit requeusts from
613 * the queueing layer of the networking.
614 */
bafef0ae 615 netif_carrier_on(dev);
1da177e4
LT		 616
617 return 0;
618
bafef0ae
JN		 619grace_exit5:
620 cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
621grace_exit4:
622 cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
1da177e4
LT		 623grace_exit3:
624 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
625grace_exit2:
626 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
627grace_exit1:
628 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
629grace_exit0:
630 return -EAGAIN;
631}
632
bafef0ae
JN		 633#if defined(CONFIG_ETRAX_NO_PHY)
634static void
635dummy_check_speed(struct net_device* dev)
636{
637 current_speed = 100;
638}
639#else
1da177e4
LT		 640static void
641generic_check_speed(struct net_device* dev)
642{
643 unsigned long data;
bafef0ae
JN		 644 struct net_local *np = netdev_priv(dev);
645
646 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE);
1da177e4
LT		 647 if ((data & ADVERTISE_100FULL) ||
648 (data & ADVERTISE_100HALF))
649 current_speed = 100;
650 else
651 current_speed = 10;
652}
653
654static void
655tdk_check_speed(struct net_device* dev)
656{
657 unsigned long data;
bafef0ae
JN		 658 struct net_local *np = netdev_priv(dev);
659
660 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
661 MDIO_TDK_DIAGNOSTIC_REG);
1da177e4
LT		 662 current_speed = (data & MDIO_TDK_DIAGNOSTIC_RATE ? 100 : 10);
663}
664
665static void
666broadcom_check_speed(struct net_device* dev)
667{
668 unsigned long data;
bafef0ae
JN		 669 struct net_local *np = netdev_priv(dev);
670
671 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
672 MDIO_AUX_CTRL_STATUS_REG);
1da177e4
LT		 673 current_speed = (data & MDIO_BC_SPEED ? 100 : 10);
674}
675
676static void
677intel_check_speed(struct net_device* dev)
678{
679 unsigned long data;
bafef0ae
JN		 680 struct net_local *np = netdev_priv(dev);
681
682 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
683 MDIO_INT_STATUS_REG_2);
1da177e4
LT		 684 current_speed = (data & MDIO_INT_SPEED ? 100 : 10);
685}
bafef0ae 686#endif
1da177e4
LT		 687static void
688e100_check_speed(unsigned long priv)
689{
690 struct net_device* dev = (struct net_device*)priv;
bafef0ae 691 struct net_local *np = netdev_priv(dev);
1da177e4
LT		 692 static int led_initiated = 0;
693 unsigned long data;
694 int old_speed = current_speed;
695
bafef0ae
JN		 696 spin_lock(&np->transceiver_lock);
697
698 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMSR);
1da177e4
LT		 699 if (!(data & BMSR_LSTATUS)) {
700 current_speed = 0;
701 } else {
702 transceiver->check_speed(dev);
703 }
704
bafef0ae 705 spin_lock(&np->led_lock);
1da177e4
LT		 706 if ((old_speed != current_speed) || !led_initiated) {
707 led_initiated = 1;
708 e100_set_network_leds(NO_NETWORK_ACTIVITY);
bafef0ae
JN		 709 if (current_speed)
710 netif_carrier_on(dev);
711 else
712 netif_carrier_off(dev);
1da177e4 713 }
bafef0ae 714 spin_unlock(&np->led_lock);
1da177e4
LT		 715
716 /* Reinitialize the timer. */
717 speed_timer.expires = jiffies + NET_LINK_UP_CHECK_INTERVAL;
718 add_timer(&speed_timer);
bafef0ae
JN		 719
720 spin_unlock(&np->transceiver_lock);
1da177e4
LT		 721}
722
723static void
724e100_negotiate(struct net_device* dev)
725{
bafef0ae
JN		 726 struct net_local *np = netdev_priv(dev);
727 unsigned short data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
728 MII_ADVERTISE);
1da177e4
LT		 729
730 /* Discard old speed and duplex settings */
731 data &= ~(ADVERTISE_100HALF | ADVERTISE_100FULL |
732 ADVERTISE_10HALF | ADVERTISE_10FULL);
733
734 switch (current_speed_selection) {
bafef0ae 735 case 10:
1da177e4
LT		 736 if (current_duplex == full)
737 data |= ADVERTISE_10FULL;
738 else if (current_duplex == half)
739 data |= ADVERTISE_10HALF;
740 else
741 data |= ADVERTISE_10HALF | ADVERTISE_10FULL;
742 break;
743
bafef0ae 744 case 100:
1da177e4
LT		 745 if (current_duplex == full)
746 data |= ADVERTISE_100FULL;
747 else if (current_duplex == half)
748 data |= ADVERTISE_100HALF;
749 else
750 data |= ADVERTISE_100HALF | ADVERTISE_100FULL;
751 break;
752
bafef0ae 753 case 0: /* Auto */
1da177e4
LT		 754 if (current_duplex == full)
755 data |= ADVERTISE_100FULL | ADVERTISE_10FULL;
756 else if (current_duplex == half)
757 data |= ADVERTISE_100HALF | ADVERTISE_10HALF;
758 else
759 data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
760 ADVERTISE_100HALF | ADVERTISE_100FULL;
761 break;
762
bafef0ae 763 default: /* assume autoneg speed and duplex */
1da177e4
LT		 764 data |= ADVERTISE_10HALF | ADVERTISE_10FULL |
765 ADVERTISE_100HALF | ADVERTISE_100FULL;
bafef0ae 766 break;
1da177e4
LT		 767 }
768
bafef0ae 769 e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE, data);
1da177e4 770
e6cd1974 771 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR);
bafef0ae 772 if (autoneg_normal) {
e6cd1974
JN		 773 /* Renegotiate with link partner */
774 data |= BMCR_ANENABLE | BMCR_ANRESTART;
775 } else {
776 /* Don't negotiate speed or duplex */
777 data &= ~(BMCR_ANENABLE | BMCR_ANRESTART);
778
779 /* Set speed and duplex static */
780 if (current_speed_selection == 10)
781 data &= ~BMCR_SPEED100;
782 else
783 data |= BMCR_SPEED100;
784
785 if (current_duplex != full)
786 data &= ~BMCR_FULLDPLX;
787 else
788 data |= BMCR_FULLDPLX;
bafef0ae
JN		 789 }
790 e100_set_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR, data);
1da177e4
LT		 791}
792
793static void
794e100_set_speed(struct net_device* dev, unsigned long speed)
795{
bafef0ae
JN		 796 struct net_local *np = netdev_priv(dev);
797
798 spin_lock(&np->transceiver_lock);
1da177e4
LT		 799 if (speed != current_speed_selection) {
800 current_speed_selection = speed;
801 e100_negotiate(dev);
802 }
bafef0ae 803 spin_unlock(&np->transceiver_lock);
1da177e4
LT		 804}
805
806static void
807e100_check_duplex(unsigned long priv)
808{
809 struct net_device *dev = (struct net_device *)priv;
bafef0ae
JN		 810 struct net_local *np = netdev_priv(dev);
811 int old_duplex;
812
813 spin_lock(&np->transceiver_lock);
814 old_duplex = full_duplex;
1da177e4
LT		 815 transceiver->check_duplex(dev);
816 if (old_duplex != full_duplex) {
817 /* Duplex changed */
818 SETF(network_rec_config_shadow, R_NETWORK_REC_CONFIG, duplex, full_duplex);
819 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
820 }
821
822 /* Reinitialize the timer. */
823 duplex_timer.expires = jiffies + NET_DUPLEX_CHECK_INTERVAL;
824 add_timer(&duplex_timer);
825 np->mii_if.full_duplex = full_duplex;
bafef0ae 826 spin_unlock(&np->transceiver_lock);
1da177e4 827}
bafef0ae
JN		 828#if defined(CONFIG_ETRAX_NO_PHY)
829static void
830dummy_check_duplex(struct net_device* dev)
831{
832 full_duplex = 1;
833}
834#else
1da177e4
LT		 835static void
836generic_check_duplex(struct net_device* dev)
837{
838 unsigned long data;
bafef0ae
JN		 839 struct net_local *np = netdev_priv(dev);
840
841 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_ADVERTISE);
1da177e4
LT		 842 if ((data & ADVERTISE_10FULL) ||
843 (data & ADVERTISE_100FULL))
844 full_duplex = 1;
845 else
846 full_duplex = 0;
847}
848
849static void
850tdk_check_duplex(struct net_device* dev)
851{
852 unsigned long data;
bafef0ae
JN		 853 struct net_local *np = netdev_priv(dev);
854
855 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
856 MDIO_TDK_DIAGNOSTIC_REG);
1da177e4
LT		 857 full_duplex = (data & MDIO_TDK_DIAGNOSTIC_DPLX) ? 1 : 0;
858}
859
860static void
861broadcom_check_duplex(struct net_device* dev)
862{
863 unsigned long data;
bafef0ae
JN		 864 struct net_local *np = netdev_priv(dev);
865
866 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
867 MDIO_AUX_CTRL_STATUS_REG);
1da177e4
LT		 868 full_duplex = (data & MDIO_BC_FULL_DUPLEX_IND) ? 1 : 0;
869}
870
871static void
872intel_check_duplex(struct net_device* dev)
873{
874 unsigned long data;
bafef0ae
JN		 875 struct net_local *np = netdev_priv(dev);
876
877 data = e100_get_mdio_reg(dev, np->mii_if.phy_id,
878 MDIO_INT_STATUS_REG_2);
1da177e4
LT		 879 full_duplex = (data & MDIO_INT_FULL_DUPLEX_IND) ? 1 : 0;
880}
bafef0ae 881#endif
1da177e4
LT		 882static void
883e100_set_duplex(struct net_device* dev, enum duplex new_duplex)
884{
bafef0ae
JN		 885 struct net_local *np = netdev_priv(dev);
886
887 spin_lock(&np->transceiver_lock);
1da177e4
LT		 888 if (new_duplex != current_duplex) {
889 current_duplex = new_duplex;
890 e100_negotiate(dev);
891 }
bafef0ae 892 spin_unlock(&np->transceiver_lock);
1da177e4
LT		 893}
894
895static int
896e100_probe_transceiver(struct net_device* dev)
897{
633edf5a
AM		 898 int ret = 0;
899
bafef0ae 900#if !defined(CONFIG_ETRAX_NO_PHY)
1da177e4
LT		 901 unsigned int phyid_high;
902 unsigned int phyid_low;
903 unsigned int oui;
904 struct transceiver_ops* ops = NULL;
bafef0ae
JN		 905 struct net_local *np = netdev_priv(dev);
906
907 spin_lock(&np->transceiver_lock);
1da177e4
LT		 908
909 /* Probe MDIO physical address */
bafef0ae
JN		 910 for (np->mii_if.phy_id = 0; np->mii_if.phy_id <= 31;
911 np->mii_if.phy_id++) {
912 if (e100_get_mdio_reg(dev,
913 np->mii_if.phy_id, MII_BMSR) != 0xffff)
1da177e4
LT		 914 break;
915 }
633edf5a
AM		 916 if (np->mii_if.phy_id == 32) {
917 ret = -ENODEV;
918 goto out;
919 }
1da177e4
LT		 920
921 /* Get manufacturer */
bafef0ae
JN		 922 phyid_high = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID1);
923 phyid_low = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_PHYSID2);
1da177e4
LT		 924 oui = (phyid_high << 6) | (phyid_low >> 10);
925
926 for (ops = &transceivers[0]; ops->oui; ops++) {
927 if (ops->oui == oui)
928 break;
929 }
930 transceiver = ops;
633edf5a 931out:
bafef0ae
JN		 932 spin_unlock(&np->transceiver_lock);
933#endif
633edf5a 934 return ret;
1da177e4
LT		 935}
936
937static int
938e100_get_mdio_reg(struct net_device *dev, int phy_id, int location)
939{
940 unsigned short cmd; /* Data to be sent on MDIO port */
941 int data; /* Data read from MDIO */
942 int bitCounter;
943
944 /* Start of frame, OP Code, Physical Address, Register Address */
945 cmd = (MDIO_START << 14) | (MDIO_READ << 12) | (phy_id << 7) |
946 (location << 2);
947
948 e100_send_mdio_cmd(cmd, 0);
949
950 data = 0;
951
952 /* Data... */
953 for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
954 data |= (e100_receive_mdio_bit() << bitCounter);
955 }
956
957 return data;
958}
959
960static void
961e100_set_mdio_reg(struct net_device *dev, int phy_id, int location, int value)
962{
963 int bitCounter;
964 unsigned short cmd;
965
966 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (phy_id << 7) |
967 (location << 2);
968
969 e100_send_mdio_cmd(cmd, 1);
970
971 /* Data... */
972 for (bitCounter=15; bitCounter>=0 ; bitCounter--) {
973 e100_send_mdio_bit(GET_BIT(bitCounter, value));
974 }
975
976}
977
978static void
979e100_send_mdio_cmd(unsigned short cmd, int write_cmd)
980{
981 int bitCounter;
982 unsigned char data = 0x2;
983
984 /* Preamble */
985 for (bitCounter = 31; bitCounter>= 0; bitCounter--)
986 e100_send_mdio_bit(GET_BIT(bitCounter, MDIO_PREAMBLE));
987
988 for (bitCounter = 15; bitCounter >= 2; bitCounter--)
989 e100_send_mdio_bit(GET_BIT(bitCounter, cmd));
990
991 /* Turnaround */
992 for (bitCounter = 1; bitCounter >= 0 ; bitCounter--)
993 if (write_cmd)
994 e100_send_mdio_bit(GET_BIT(bitCounter, data));
995 else
996 e100_receive_mdio_bit();
997}
998
999static void
1000e100_send_mdio_bit(unsigned char bit)
1001{
1002 *R_NETWORK_MGM_CTRL =
1003 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
1004 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
1005 udelay(1);
1006 *R_NETWORK_MGM_CTRL =
1007 IO_STATE(R_NETWORK_MGM_CTRL, mdoe, enable) |
1008 IO_MASK(R_NETWORK_MGM_CTRL, mdck) |
1009 IO_FIELD(R_NETWORK_MGM_CTRL, mdio, bit);
1010 udelay(1);
1011}
1012
1013static unsigned char
1014e100_receive_mdio_bit()
1015{
1016 unsigned char bit;
1017 *R_NETWORK_MGM_CTRL = 0;
1018 bit = IO_EXTRACT(R_NETWORK_STAT, mdio, *R_NETWORK_STAT);
1019 udelay(1);
1020 *R_NETWORK_MGM_CTRL = IO_MASK(R_NETWORK_MGM_CTRL, mdck);
1021 udelay(1);
1022 return bit;
1023}
1024
1025static void
1026e100_reset_transceiver(struct net_device* dev)
1027{
bafef0ae 1028 struct net_local *np = netdev_priv(dev);
1da177e4
LT		 1029 unsigned short cmd;
1030 unsigned short data;
1031 int bitCounter;
1032
bafef0ae 1033 data = e100_get_mdio_reg(dev, np->mii_if.phy_id, MII_BMCR);
1da177e4 1034
bafef0ae 1035 cmd = (MDIO_START << 14) | (MDIO_WRITE << 12) | (np->mii_if.phy_id << 7) | (MII_BMCR << 2);
1da177e4
LT		 1036
1037 e100_send_mdio_cmd(cmd, 1);
1038
1039 data |= 0x8000;
1040
1041 for (bitCounter = 15; bitCounter >= 0 ; bitCounter--) {
1042 e100_send_mdio_bit(GET_BIT(bitCounter, data));
1043 }
1044}
1045
1046/* Called by upper layers if they decide it took too long to complete
1047 * sending a packet - we need to reset and stuff.
1048 */
1049
1050static void
1051e100_tx_timeout(struct net_device *dev)
1052{
bafef0ae 1053 struct net_local *np = netdev_priv(dev);
1da177e4
LT		 1054 unsigned long flags;
1055
1056 spin_lock_irqsave(&np->lock, flags);
1057
1058 printk(KERN_WARNING "%s: transmit timed out, %s?\n", dev->name,
1059 tx_done(dev) ? "IRQ problem" : "network cable problem");
1060
1061 /* remember we got an error */
1062
1063 np->stats.tx_errors++;
1064
1065 /* reset the TX DMA in case it has hung on something */
1066
1067 RESET_DMA(NETWORK_TX_DMA_NBR);
1068 WAIT_DMA(NETWORK_TX_DMA_NBR);
1069
1070 /* Reset the transceiver. */
1071
1072 e100_reset_transceiver(dev);
1073
1074 /* and get rid of the packets that never got an interrupt */
bafef0ae 1075 while (myFirstTxDesc != myNextTxDesc) {
1da177e4
LT		 1076 dev_kfree_skb(myFirstTxDesc->skb);
1077 myFirstTxDesc->skb = 0;
1078 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
1079 }
1080
1081 /* Set up transmit DMA channel so it can be restarted later */
1082 *R_DMA_CH0_FIRST = 0;
1083 *R_DMA_CH0_DESCR = virt_to_phys(myLastTxDesc);
1084
1085 /* tell the upper layers we're ok again */
1086
1087 netif_wake_queue(dev);
1088 spin_unlock_irqrestore(&np->lock, flags);
1089}
1090
1091
1092/* This will only be invoked if the driver is _not_ in XOFF state.
1093 * What this means is that we need not check it, and that this
1094 * invariant will hold if we make sure that the netif_*_queue()
1095 * calls are done at the proper times.
1096 */
1097
1098static int
1099e100_send_packet(struct sk_buff *skb, struct net_device *dev)
1100{
bafef0ae 1101 struct net_local *np = netdev_priv(dev);
1da177e4
LT		 1102 unsigned char *buf = skb->data;
1103 unsigned long flags;
1104
1105#ifdef ETHDEBUG
1106 printk("send packet len %d\n", length);
1107#endif
1108 spin_lock_irqsave(&np->lock, flags); /* protect from tx_interrupt and ourself */
1109
1110 myNextTxDesc->skb = skb;
1111
1112 dev->trans_start = jiffies;
1113
bafef0ae 1114 e100_hardware_send_packet(np, buf, skb->len);
1da177e4
LT		 1115
1116 myNextTxDesc = phys_to_virt(myNextTxDesc->descr.next);
1117
1118 /* Stop queue if full */
1119 if (myNextTxDesc == myFirstTxDesc) {
1120 netif_stop_queue(dev);
1121 }
1122
1123 spin_unlock_irqrestore(&np->lock, flags);
1124
1125 return 0;
1126}
1127
1128/*
1129 * The typical workload of the driver:
1130 * Handle the network interface interrupts.
1131 */
1132
1133static irqreturn_t
7d12e780 1134e100rxtx_interrupt(int irq, void *dev_id)
1da177e4
LT		 1135{
1136 struct net_device *dev = (struct net_device *)dev_id;
bafef0ae
JN		 1137 struct net_local *np = netdev_priv(dev);
1138 unsigned long irqbits;
1da177e4 1139
bafef0ae
JN		 1140 /*
1141 * Note that both rx and tx interrupts are blocked at this point,
1142 * regardless of which got us here.
1143 */
1144
1145 irqbits = *R_IRQ_MASK2_RD;
1da177e4
LT		 1146
1147 /* Handle received packets */
1148 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma1_eop, active)) {
1149 /* acknowledge the eop interrupt */
1150
1151 *R_DMA_CH1_CLR_INTR = IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do);
1152
1153 /* check if one or more complete packets were indeed received */
1154
1155 while ((*R_DMA_CH1_FIRST != virt_to_phys(myNextRxDesc)) &&
1156 (myNextRxDesc != myLastRxDesc)) {
1157 /* Take out the buffer and give it to the OS, then
1158 * allocate a new buffer to put a packet in.
1159 */
1160 e100_rx(dev);
bafef0ae 1161 np->stats.rx_packets++;
1da177e4
LT		 1162 /* restart/continue on the channel, for safety */
1163 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, restart);
1164 /* clear dma channel 1 eop/descr irq bits */
1165 *R_DMA_CH1_CLR_INTR =
1166 IO_STATE(R_DMA_CH1_CLR_INTR, clr_eop, do) |
1167 IO_STATE(R_DMA_CH1_CLR_INTR, clr_descr, do);
1168
1169 /* now, we might have gotten another packet
1170 so we have to loop back and check if so */
1171 }
1172 }
1173
1174 /* Report any packets that have been sent */
bafef0ae
JN		 1175 while (virt_to_phys(myFirstTxDesc) != *R_DMA_CH0_FIRST &&
1176 (netif_queue_stopped(dev) || myFirstTxDesc != myNextTxDesc)) {
1da177e4
LT		 1177 np->stats.tx_bytes += myFirstTxDesc->skb->len;
1178 np->stats.tx_packets++;
1179
1180 /* dma is ready with the transmission of the data in tx_skb, so now
1181 we can release the skb memory */
1182 dev_kfree_skb_irq(myFirstTxDesc->skb);
1183 myFirstTxDesc->skb = 0;
1184 myFirstTxDesc = phys_to_virt(myFirstTxDesc->descr.next);
bafef0ae
JN		 1185 /* Wake up queue. */
1186 netif_wake_queue(dev);
1da177e4
LT		 1187 }
1188
1189 if (irqbits & IO_STATE(R_IRQ_MASK2_RD, dma0_eop, active)) {
bafef0ae 1190 /* acknowledge the eop interrupt. */
1da177e4 1191 *R_DMA_CH0_CLR_INTR = IO_STATE(R_DMA_CH0_CLR_INTR, clr_eop, do);
1da177e4
LT		 1192 }
1193
1da177e4
LT		 1194 return IRQ_HANDLED;
1195}
1196
1197static irqreturn_t
7d12e780 1198e100nw_interrupt(int irq, void *dev_id)
1da177e4
LT		 1199{
1200 struct net_device *dev = (struct net_device *)dev_id;
bafef0ae 1201 struct net_local *np = netdev_priv(dev);
1da177e4
LT		 1202 unsigned long irqbits = *R_IRQ_MASK0_RD;
1203
1204 /* check for underrun irq */
1205 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, underrun, active)) {
1206 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
1207 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
1208 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
1209 np->stats.tx_errors++;
1210 D(printk("ethernet receiver underrun!\n"));
1211 }
1212
1213 /* check for overrun irq */
1214 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, overrun, active)) {
1215 update_rx_stats(&np->stats); /* this will ack the irq */
1216 D(printk("ethernet receiver overrun!\n"));
1217 }
1218 /* check for excessive collision irq */
1219 if (irqbits & IO_STATE(R_IRQ_MASK0_RD, excessive_col, active)) {
1220 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, clr);
1221 *R_NETWORK_TR_CTRL = network_tr_ctrl_shadow;
1222 SETS(network_tr_ctrl_shadow, R_NETWORK_TR_CTRL, clr_error, nop);
1da177e4
LT		 1223 np->stats.tx_errors++;
1224 D(printk("ethernet excessive collisions!\n"));
1225 }
1226 return IRQ_HANDLED;
1227}
1228
1229/* We have a good packet(s), get it/them out of the buffers. */
1230static void
1231e100_rx(struct net_device *dev)
1232{
1233 struct sk_buff *skb;
1234 int length = 0;
bafef0ae 1235 struct net_local *np = netdev_priv(dev);
1da177e4
LT		 1236 unsigned char *skb_data_ptr;
1237#ifdef ETHDEBUG
1238 int i;
1239#endif
bafef0ae
JN		 1240 etrax_eth_descr *prevRxDesc; /* The descriptor right before myNextRxDesc */
1241 spin_lock(&np->led_lock);
1da177e4
LT		 1242 if (!led_active && time_after(jiffies, led_next_time)) {
1243 /* light the network leds depending on the current speed. */
1244 e100_set_network_leds(NETWORK_ACTIVITY);
1245
1246 /* Set the earliest time we may clear the LED */
1247 led_next_time = jiffies + NET_FLASH_TIME;
1248 led_active = 1;
1249 mod_timer(&clear_led_timer, jiffies + HZ/10);
1250 }
bafef0ae 1251 spin_unlock(&np->led_lock);
1da177e4
LT		 1252
1253 length = myNextRxDesc->descr.hw_len - 4;
bafef0ae 1254 np->stats.rx_bytes += length;
1da177e4
LT		 1255
1256#ifdef ETHDEBUG
1257 printk("Got a packet of length %d:\n", length);
1258 /* dump the first bytes in the packet */
1259 skb_data_ptr = (unsigned char *)phys_to_virt(myNextRxDesc->descr.buf);
1260 for (i = 0; i < 8; i++) {
1261 printk("%d: %.2x %.2x %.2x %.2x %.2x %.2x %.2x %.2x\n", i * 8,
1262 skb_data_ptr[0],skb_data_ptr[1],skb_data_ptr[2],skb_data_ptr[3],
1263 skb_data_ptr[4],skb_data_ptr[5],skb_data_ptr[6],skb_data_ptr[7]);
1264 skb_data_ptr += 8;
1265 }
1266#endif
1267
1268 if (length < RX_COPYBREAK) {
1269 /* Small packet, copy data */
1270 skb = dev_alloc_skb(length - ETHER_HEAD_LEN);
1271 if (!skb) {
1272 np->stats.rx_errors++;
1273 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
bafef0ae 1274 goto update_nextrxdesc;
1da177e4
LT		 1275 }
1276
1277 skb_put(skb, length - ETHER_HEAD_LEN); /* allocate room for the packet body */
1278 skb_data_ptr = skb_push(skb, ETHER_HEAD_LEN); /* allocate room for the header */
1279
1280#ifdef ETHDEBUG
1281 printk("head = 0x%x, data = 0x%x, tail = 0x%x, end = 0x%x\n",
4305b541
ACM		 1282 skb->head, skb->data, skb_tail_pointer(skb),
1283 skb_end_pointer(skb));
1da177e4
LT		 1284 printk("copying packet to 0x%x.\n", skb_data_ptr);
1285#endif
1286
1287 memcpy(skb_data_ptr, phys_to_virt(myNextRxDesc->descr.buf), length);
1288 }
1289 else {
1290 /* Large packet, send directly to upper layers and allocate new
1291 * memory (aligned to cache line boundary to avoid bug).
bafef0ae
JN		 1292 * Before sending the skb to upper layers we must make sure
1293 * that skb->data points to the aligned start of the packet.
1da177e4
LT		 1294 */
1295 int align;
1296 struct sk_buff *new_skb = dev_alloc_skb(MAX_MEDIA_DATA_SIZE + 2 * L1_CACHE_BYTES);
1297 if (!new_skb) {
1298 np->stats.rx_errors++;
1299 printk(KERN_NOTICE "%s: Memory squeeze, dropping packet.\n", dev->name);
bafef0ae 1300 goto update_nextrxdesc;
1da177e4
LT		 1301 }
1302 skb = myNextRxDesc->skb;
1303 align = (int)phys_to_virt(myNextRxDesc->descr.buf) - (int)skb->data;
1304 skb_put(skb, length + align);
1305 skb_pull(skb, align); /* Remove alignment bytes */
1306 myNextRxDesc->skb = new_skb;
1307 myNextRxDesc->descr.buf = L1_CACHE_ALIGN(virt_to_phys(myNextRxDesc->skb->data));
1308 }
1309
1da177e4
LT		 1310 skb->protocol = eth_type_trans(skb, dev);
1311
1312 /* Send the packet to the upper layers */
1313 netif_rx(skb);
1314
bafef0ae 1315 update_nextrxdesc:
1da177e4
LT		 1316 /* Prepare for next packet */
1317 myNextRxDesc->descr.status = 0;
bafef0ae 1318 prevRxDesc = myNextRxDesc;
1da177e4
LT		 1319 myNextRxDesc = phys_to_virt(myNextRxDesc->descr.next);
1320
1321 rx_queue_len++;
1322
1323 /* Check if descriptors should be returned */
1324 if (rx_queue_len == RX_QUEUE_THRESHOLD) {
1325 flush_etrax_cache();
bafef0ae 1326 prevRxDesc->descr.ctrl |= d_eol;
1da177e4 1327 myLastRxDesc->descr.ctrl &= ~d_eol;
bafef0ae 1328 myLastRxDesc = prevRxDesc;
1da177e4
LT		 1329 rx_queue_len = 0;
1330 }
1331}
1332
1333/* The inverse routine to net_open(). */
1334static int
1335e100_close(struct net_device *dev)
1336{
bafef0ae 1337 struct net_local *np = netdev_priv(dev);
1da177e4
LT		 1338
1339 printk(KERN_INFO "Closing %s.\n", dev->name);
1340
1341 netif_stop_queue(dev);
1342
1343 *R_IRQ_MASK0_CLR =
1344 IO_STATE(R_IRQ_MASK0_CLR, overrun, clr) |
1345 IO_STATE(R_IRQ_MASK0_CLR, underrun, clr) |
1346 IO_STATE(R_IRQ_MASK0_CLR, excessive_col, clr);
1347
1348 *R_IRQ_MASK2_CLR =
1349 IO_STATE(R_IRQ_MASK2_CLR, dma0_descr, clr) |
1350 IO_STATE(R_IRQ_MASK2_CLR, dma0_eop, clr) |
1351 IO_STATE(R_IRQ_MASK2_CLR, dma1_descr, clr) |
1352 IO_STATE(R_IRQ_MASK2_CLR, dma1_eop, clr);
1353
1354 /* Stop the receiver and the transmitter */
1355
1356 RESET_DMA(NETWORK_TX_DMA_NBR);
1357 RESET_DMA(NETWORK_RX_DMA_NBR);
1358
1359 /* Flush the Tx and disable Rx here. */
1360
1361 free_irq(NETWORK_DMA_RX_IRQ_NBR, (void *)dev);
1362 free_irq(NETWORK_DMA_TX_IRQ_NBR, (void *)dev);
1363 free_irq(NETWORK_STATUS_IRQ_NBR, (void *)dev);
1364
bafef0ae
JN		 1365 cris_free_dma(NETWORK_TX_DMA_NBR, cardname);
1366 cris_free_dma(NETWORK_RX_DMA_NBR, cardname);
1367
1da177e4
LT		 1368 /* Update the statistics here. */
1369
1370 update_rx_stats(&np->stats);
1371 update_tx_stats(&np->stats);
1372
1373 /* Stop speed/duplex timers */
1374 del_timer(&speed_timer);
1375 del_timer(&duplex_timer);
1376
1377 return 0;
1378}
1379
1380static int
1381e100_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1382{
1383 struct mii_ioctl_data *data = if_mii(ifr);
1384 struct net_local *np = netdev_priv(dev);
bafef0ae
JN		 1385 int rc = 0;
1386 int old_autoneg;
1da177e4
LT		 1387
1388 spin_lock(&np->lock); /* Preempt protection */
1389 switch (cmd) {
1da177e4
LT		 1390 /* The ioctls below should be considered obsolete but are */
1391 /* still present for compatability with old scripts/apps */
1392 case SET_ETH_SPEED_10: /* 10 Mbps */
1393 e100_set_speed(dev, 10);
1394 break;
1395 case SET_ETH_SPEED_100: /* 100 Mbps */
1396 e100_set_speed(dev, 100);
1397 break;
bafef0ae 1398 case SET_ETH_SPEED_AUTO: /* Auto-negotiate speed */
1da177e4
LT		 1399 e100_set_speed(dev, 0);
1400 break;
bafef0ae 1401 case SET_ETH_DUPLEX_HALF: /* Half duplex */
1da177e4
LT		 1402 e100_set_duplex(dev, half);
1403 break;
bafef0ae 1404 case SET_ETH_DUPLEX_FULL: /* Full duplex */
1da177e4
LT		 1405 e100_set_duplex(dev, full);
1406 break;
bafef0ae 1407 case SET_ETH_DUPLEX_AUTO: /* Auto-negotiate duplex */
1da177e4
LT		 1408 e100_set_duplex(dev, autoneg);
1409 break;
bafef0ae
JN		 1410 case SET_ETH_AUTONEG:
1411 old_autoneg = autoneg_normal;
1412 autoneg_normal = *(int*)data;
1413 if (autoneg_normal != old_autoneg)
1414 e100_negotiate(dev);
1415 break;
1da177e4 1416 default:
bafef0ae
JN		 1417 rc = generic_mii_ioctl(&np->mii_if, if_mii(ifr),
1418 cmd, NULL);
1419 break;
1da177e4
LT		 1420 }
1421 spin_unlock(&np->lock);
bafef0ae 1422 return rc;
1da177e4
LT		 1423}
1424
bafef0ae
JN		 1425static int e100_get_settings(struct net_device *dev,
1426 struct ethtool_cmd *cmd)
1da177e4 1427{
bafef0ae
JN		 1428 struct net_local *np = netdev_priv(dev);
1429 int err;
76f2b4d9 1430
bafef0ae
JN		 1431 spin_lock_irq(&np->lock);
1432 err = mii_ethtool_gset(&np->mii_if, cmd);
1433 spin_unlock_irq(&np->lock);
76f2b4d9 1434
bafef0ae
JN		 1435 /* The PHY may support 1000baseT, but the Etrax100 does not. */
1436 cmd->supported &= ~(SUPPORTED_1000baseT_Half
1437 | SUPPORTED_1000baseT_Full);
1438 return err;
76f2b4d9
CH		 1439}
1440
1441static int e100_set_settings(struct net_device *dev,
1442 struct ethtool_cmd *ecmd)
1443{
1444 if (ecmd->autoneg == AUTONEG_ENABLE) {
1445 e100_set_duplex(dev, autoneg);
1446 e100_set_speed(dev, 0);
1447 } else {
1448 e100_set_duplex(dev, ecmd->duplex == DUPLEX_HALF ? half : full);
1449 e100_set_speed(dev, ecmd->speed == SPEED_10 ? 10: 100);
1da177e4 1450 }
76f2b4d9
CH		 1451
1452 return 0;
1453}
1454
1455static void e100_get_drvinfo(struct net_device *dev,
1456 struct ethtool_drvinfo *info)
1457{
1458 strncpy(info->driver, "ETRAX 100LX", sizeof(info->driver) - 1);
1459 strncpy(info->version, "$Revision: 1.31 $", sizeof(info->version) - 1);
1460 strncpy(info->fw_version, "N/A", sizeof(info->fw_version) - 1);
1461 strncpy(info->bus_info, "N/A", sizeof(info->bus_info) - 1);
1462}
1463
1464static int e100_nway_reset(struct net_device *dev)
1465{
1466 if (current_duplex == autoneg && current_speed_selection == 0)
1467 e100_negotiate(dev);
1da177e4
LT		 1468 return 0;
1469}
1470
7282d491 1471static const struct ethtool_ops e100_ethtool_ops = {
76f2b4d9
CH		 1472 .get_settings = e100_get_settings,
1473 .set_settings = e100_set_settings,
1474 .get_drvinfo = e100_get_drvinfo,
1475 .nway_reset = e100_nway_reset,
1476 .get_link = ethtool_op_get_link,
1477};
1478
1da177e4
LT		 1479static int
1480e100_set_config(struct net_device *dev, struct ifmap *map)
1481{
bafef0ae
JN		 1482 struct net_local *np = netdev_priv(dev);
1483
1da177e4
LT		 1484 spin_lock(&np->lock); /* Preempt protection */
1485
1486 switch(map->port) {
1487 case IF_PORT_UNKNOWN:
1488 /* Use autoneg */
1489 e100_set_speed(dev, 0);
1490 e100_set_duplex(dev, autoneg);
1491 break;
1492 case IF_PORT_10BASET:
1493 e100_set_speed(dev, 10);
1494 e100_set_duplex(dev, autoneg);
1495 break;
1496 case IF_PORT_100BASET:
1497 case IF_PORT_100BASETX:
1498 e100_set_speed(dev, 100);
1499 e100_set_duplex(dev, autoneg);
1500 break;
1501 case IF_PORT_100BASEFX:
1502 case IF_PORT_10BASE2:
1503 case IF_PORT_AUI:
1504 spin_unlock(&np->lock);
1505 return -EOPNOTSUPP;
1506 break;
1507 default:
1508 printk(KERN_ERR "%s: Invalid media selected", dev->name);
1509 spin_unlock(&np->lock);
1510 return -EINVAL;
1511 }
1512 spin_unlock(&np->lock);
1513 return 0;
1514}
1515
1516static void
1517update_rx_stats(struct net_device_stats *es)
1518{
1519 unsigned long r = *R_REC_COUNTERS;
1520 /* update stats relevant to reception errors */
1521 es->rx_fifo_errors += IO_EXTRACT(R_REC_COUNTERS, congestion, r);
1522 es->rx_crc_errors += IO_EXTRACT(R_REC_COUNTERS, crc_error, r);
1523 es->rx_frame_errors += IO_EXTRACT(R_REC_COUNTERS, alignment_error, r);
1524 es->rx_length_errors += IO_EXTRACT(R_REC_COUNTERS, oversize, r);
1525}
1526
1527static void
1528update_tx_stats(struct net_device_stats *es)
1529{
1530 unsigned long r = *R_TR_COUNTERS;
1531 /* update stats relevant to transmission errors */
1532 es->collisions +=
1533 IO_EXTRACT(R_TR_COUNTERS, single_col, r) +
1534 IO_EXTRACT(R_TR_COUNTERS, multiple_col, r);
1da177e4
LT		 1535}
1536
1537/*
1538 * Get the current statistics.
1539 * This may be called with the card open or closed.
1540 */
1541static struct net_device_stats *
1542e100_get_stats(struct net_device *dev)
1543{
bafef0ae 1544 struct net_local *lp = netdev_priv(dev);
1da177e4 1545 unsigned long flags;
bafef0ae 1546
1da177e4
LT		 1547 spin_lock_irqsave(&lp->lock, flags);
1548
1549 update_rx_stats(&lp->stats);
1550 update_tx_stats(&lp->stats);
1551
1552 spin_unlock_irqrestore(&lp->lock, flags);
1553 return &lp->stats;
1554}
1555
1556/*
1557 * Set or clear the multicast filter for this adaptor.
1558 * num_addrs == -1 Promiscuous mode, receive all packets
1559 * num_addrs == 0 Normal mode, clear multicast list
1560 * num_addrs > 0 Multicast mode, receive normal and MC packets,
1561 * and do best-effort filtering.
1562 */
1563static void
1564set_multicast_list(struct net_device *dev)
1565{
bafef0ae 1566 struct net_local *lp = netdev_priv(dev);
1da177e4
LT		 1567 int num_addr = dev->mc_count;
1568 unsigned long int lo_bits;
1569 unsigned long int hi_bits;
bafef0ae 1570
1da177e4 1571 spin_lock(&lp->lock);
bafef0ae 1572 if (dev->flags & IFF_PROMISC) {
1da177e4
LT		 1573 /* promiscuous mode */
1574 lo_bits = 0xfffffffful;
1575 hi_bits = 0xfffffffful;
1576
1577 /* Enable individual receive */
1578 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, receive);
1579 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1580 } else if (dev->flags & IFF_ALLMULTI) {
1581 /* enable all multicasts */
1582 lo_bits = 0xfffffffful;
1583 hi_bits = 0xfffffffful;
1584
1585 /* Disable individual receive */
1586 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1587 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1588 } else if (num_addr == 0) {
1589 /* Normal, clear the mc list */
1590 lo_bits = 0x00000000ul;
1591 hi_bits = 0x00000000ul;
1592
1593 /* Disable individual receive */
1594 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1595 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1596 } else {
1597 /* MC mode, receive normal and MC packets */
1598 char hash_ix;
1599 struct dev_mc_list *dmi = dev->mc_list;
1600 int i;
1601 char *baddr;
bafef0ae 1602
1da177e4
LT		 1603 lo_bits = 0x00000000ul;
1604 hi_bits = 0x00000000ul;
bafef0ae 1605 for (i = 0; i < num_addr; i++) {
1da177e4
LT		 1606 /* Calculate the hash index for the GA registers */
1607
1608 hash_ix = 0;
1609 baddr = dmi->dmi_addr;
1610 hash_ix ^= (*baddr) & 0x3f;
1611 hash_ix ^= ((*baddr) >> 6) & 0x03;
1612 ++baddr;
1613 hash_ix ^= ((*baddr) << 2) & 0x03c;
1614 hash_ix ^= ((*baddr) >> 4) & 0xf;
1615 ++baddr;
1616 hash_ix ^= ((*baddr) << 4) & 0x30;
1617 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1618 ++baddr;
1619 hash_ix ^= (*baddr) & 0x3f;
1620 hash_ix ^= ((*baddr) >> 6) & 0x03;
1621 ++baddr;
1622 hash_ix ^= ((*baddr) << 2) & 0x03c;
1623 hash_ix ^= ((*baddr) >> 4) & 0xf;
1624 ++baddr;
1625 hash_ix ^= ((*baddr) << 4) & 0x30;
1626 hash_ix ^= ((*baddr) >> 2) & 0x3f;
1627
1628 hash_ix &= 0x3f;
1629
1630 if (hash_ix >= 32) {
1631 hi_bits |= (1 << (hash_ix-32));
bafef0ae 1632 } else {
1da177e4
LT		 1633 lo_bits |= (1 << hash_ix);
1634 }
1635 dmi = dmi->next;
1636 }
1637 /* Disable individual receive */
1638 SETS(network_rec_config_shadow, R_NETWORK_REC_CONFIG, individual, discard);
1639 *R_NETWORK_REC_CONFIG = network_rec_config_shadow;
1640 }
1641 *R_NETWORK_GA_0 = lo_bits;
1642 *R_NETWORK_GA_1 = hi_bits;
1643 spin_unlock(&lp->lock);
1644}
1645
1646void
bafef0ae 1647e100_hardware_send_packet(struct net_local *np, char *buf, int length)
1da177e4
LT		 1648{
1649 D(printk("e100 send pack, buf 0x%x len %d\n", buf, length));
1650
bafef0ae 1651 spin_lock(&np->led_lock);
1da177e4
LT		 1652 if (!led_active && time_after(jiffies, led_next_time)) {
1653 /* light the network leds depending on the current speed. */
1654 e100_set_network_leds(NETWORK_ACTIVITY);
1655
1656 /* Set the earliest time we may clear the LED */
1657 led_next_time = jiffies + NET_FLASH_TIME;
1658 led_active = 1;
1659 mod_timer(&clear_led_timer, jiffies + HZ/10);
1660 }
bafef0ae 1661 spin_unlock(&np->led_lock);
1da177e4
LT		 1662
1663 /* configure the tx dma descriptor */
1664 myNextTxDesc->descr.sw_len = length;
1665 myNextTxDesc->descr.ctrl = d_eop | d_eol | d_wait;
1666 myNextTxDesc->descr.buf = virt_to_phys(buf);
1667
1668 /* Move end of list */
1669 myLastTxDesc->descr.ctrl &= ~d_eol;
1670 myLastTxDesc = myNextTxDesc;
1671
1672 /* Restart DMA channel */
1673 *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, restart);
1674}
1675
1676static void
1677e100_clear_network_leds(unsigned long dummy)
1678{
bafef0ae
JN		 1679 struct net_device *dev = (struct net_device *)dummy;
1680 struct net_local *np = netdev_priv(dev);
1681
1682 spin_lock(&np->led_lock);
1683
1da177e4
LT		 1684 if (led_active && time_after(jiffies, led_next_time)) {
1685 e100_set_network_leds(NO_NETWORK_ACTIVITY);
1686
1687 /* Set the earliest time we may set the LED */
1688 led_next_time = jiffies + NET_FLASH_PAUSE;
1689 led_active = 0;
1690 }
bafef0ae
JN		 1691
1692 spin_unlock(&np->led_lock);
1da177e4
LT		 1693}
1694
1695static void
1696e100_set_network_leds(int active)
1697{
1698#if defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK)
1699 int light_leds = (active == NO_NETWORK_ACTIVITY);
1700#elif defined(CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY)
1701 int light_leds = (active == NETWORK_ACTIVITY);
1702#else
1703#error "Define either CONFIG_ETRAX_NETWORK_LED_ON_WHEN_LINK or CONFIG_ETRAX_NETWORK_LED_ON_WHEN_ACTIVITY"
1704#endif
1705
1706 if (!current_speed) {
1707 /* Make LED red, link is down */
1708#if defined(CONFIG_ETRAX_NETWORK_RED_ON_NO_CONNECTION)
5efa1d1c 1709 CRIS_LED_NETWORK_SET(CRIS_LED_RED);
1da177e4 1710#else
5efa1d1c 1711 CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
1da177e4 1712#endif
bafef0ae 1713 } else if (light_leds) {
1da177e4 1714 if (current_speed == 10) {
5efa1d1c 1715 CRIS_LED_NETWORK_SET(CRIS_LED_ORANGE);
1da177e4 1716 } else {
5efa1d1c 1717 CRIS_LED_NETWORK_SET(CRIS_LED_GREEN);
1da177e4 1718 }
bafef0ae 1719 } else {
5efa1d1c 1720 CRIS_LED_NETWORK_SET(CRIS_LED_OFF);
1da177e4
LT		 1721 }
1722}
1723
bafef0ae
JN		 1724#ifdef CONFIG_NET_POLL_CONTROLLER
1725static void
1726e100_netpoll(struct net_device* netdev)
1727{
1728 e100rxtx_interrupt(NETWORK_DMA_TX_IRQ_NBR, netdev, NULL);
1729}
1730#endif
1731
1da177e4
LT		 1732static int
1733etrax_init_module(void)
1734{
1735 return etrax_ethernet_init();
1736}
1737
1738static int __init
1739e100_boot_setup(char* str)
1740{
1741 struct sockaddr sa = {0};
1742 int i;
1743
1744 /* Parse the colon separated Ethernet station address */
1745 for (i = 0; i < ETH_ALEN; i++) {
1746 unsigned int tmp;
1747 if (sscanf(str + 3*i, "%2x", &tmp) != 1) {
1748 printk(KERN_WARNING "Malformed station address");
1749 return 0;
1750 }
1751 sa.sa_data[i] = (char)tmp;
1752 }
1753
1754 default_mac = sa;
1755 return 1;
1756}
1757
1758__setup("etrax100_eth=", e100_boot_setup);
1759
1760module_init(etrax_init_module);
Clone of davem's net-next-2.6 tree