[net-next-2.6.git] / drivers / net / cnic.h

/* cnic.h: Broadcom CNIC core network driver.
 *
 * Copyright (c) 2006-2010 Broadcom Corporation
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation.
 *
 */


#ifndef CNIC_H
#define CNIC_H

#define HC_INDEX_ISCSI_EQ_CONS			6

#define HC_INDEX_FCOE_EQ_CONS			3

#define HC_SP_INDEX_ETH_ISCSI_CQ_CONS		5
#define HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS	1

#define KWQ_PAGE_CNT	4
#define KCQ_PAGE_CNT	16

#define KWQ_CID 		24
#define KCQ_CID 		25

/*
 *	krnlq_context definition
 */
#define L5_KRNLQ_FLAGS	0x00000000
#define L5_KRNLQ_SIZE	0x00000000
#define L5_KRNLQ_TYPE	0x00000000
#define KRNLQ_FLAGS_PG_SZ					(0xf<<0)
#define KRNLQ_FLAGS_PG_SZ_256					(0<<0)
#define KRNLQ_FLAGS_PG_SZ_512					(1<<0)
#define KRNLQ_FLAGS_PG_SZ_1K					(2<<0)
#define KRNLQ_FLAGS_PG_SZ_2K					(3<<0)
#define KRNLQ_FLAGS_PG_SZ_4K					(4<<0)
#define KRNLQ_FLAGS_PG_SZ_8K					(5<<0)
#define KRNLQ_FLAGS_PG_SZ_16K					(6<<0)
#define KRNLQ_FLAGS_PG_SZ_32K					(7<<0)
#define KRNLQ_FLAGS_PG_SZ_64K					(8<<0)
#define KRNLQ_FLAGS_PG_SZ_128K					(9<<0)
#define KRNLQ_FLAGS_PG_SZ_256K					(10<<0)
#define KRNLQ_FLAGS_PG_SZ_512K					(11<<0)
#define KRNLQ_FLAGS_PG_SZ_1M					(12<<0)
#define KRNLQ_FLAGS_PG_SZ_2M					(13<<0)
#define KRNLQ_FLAGS_QE_SELF_SEQ					(1<<15)
#define KRNLQ_SIZE_TYPE_SIZE	((((0x28 + 0x1f) & ~0x1f) / 0x20) << 16)
#define KRNLQ_TYPE_TYPE						(0xf<<28)
#define KRNLQ_TYPE_TYPE_EMPTY					(0<<28)
#define KRNLQ_TYPE_TYPE_KRNLQ					(6<<28)

#define L5_KRNLQ_HOST_QIDX		0x00000004
#define L5_KRNLQ_HOST_FW_QIDX		0x00000008
#define L5_KRNLQ_NX_QE_SELF_SEQ 	0x0000000c
#define L5_KRNLQ_QE_SELF_SEQ_MAX	0x0000000c
#define L5_KRNLQ_NX_QE_HADDR_HI 	0x00000010
#define L5_KRNLQ_NX_QE_HADDR_LO 	0x00000014
#define L5_KRNLQ_PGTBL_PGIDX		0x00000018
#define L5_KRNLQ_NX_PG_QIDX 		0x00000018
#define L5_KRNLQ_PGTBL_NPAGES		0x0000001c
#define L5_KRNLQ_QIDX_INCR		0x0000001c
#define L5_KRNLQ_PGTBL_HADDR_HI 	0x00000020
#define L5_KRNLQ_PGTBL_HADDR_LO 	0x00000024

#define BNX2_PG_CTX_MAP			0x1a0034
#define BNX2_ISCSI_CTX_MAP		0x1a0074

struct cnic_redirect_entry {
	struct dst_entry *old_dst;
	struct dst_entry *new_dst;
};

#define MAX_COMPLETED_KCQE	64

#define MAX_CNIC_L5_CONTEXT	256

#define MAX_CM_SK_TBL_SZ	MAX_CNIC_L5_CONTEXT

#define MAX_ISCSI_TBL_SZ	256

#define CNIC_LOCAL_PORT_MIN	60000
#define CNIC_LOCAL_PORT_MAX	61000
#define CNIC_LOCAL_PORT_RANGE	(CNIC_LOCAL_PORT_MAX - CNIC_LOCAL_PORT_MIN)

#define KWQE_CNT (BCM_PAGE_SIZE / sizeof(struct kwqe))
#define KCQE_CNT (BCM_PAGE_SIZE / sizeof(struct kcqe))
#define MAX_KWQE_CNT (KWQE_CNT - 1)
#define MAX_KCQE_CNT (KCQE_CNT - 1)

#define MAX_KWQ_IDX	((KWQ_PAGE_CNT * KWQE_CNT) - 1)
#define MAX_KCQ_IDX	((KCQ_PAGE_CNT * KCQE_CNT) - 1)

#define KWQ_PG(x) (((x) & ~MAX_KWQE_CNT) >> (BCM_PAGE_BITS - 5))
#define KWQ_IDX(x) ((x) & MAX_KWQE_CNT)

#define KCQ_PG(x) (((x) & ~MAX_KCQE_CNT) >> (BCM_PAGE_BITS - 5))
#define KCQ_IDX(x) ((x) & MAX_KCQE_CNT)

#define BNX2X_NEXT_KCQE(x) (((x) & (MAX_KCQE_CNT - 1)) ==		\
		(MAX_KCQE_CNT - 1)) ?					\
		(x) + 2 : (x) + 1

#define BNX2X_KWQ_DATA_PG(cp, x) ((x) / (cp)->kwq_16_data_pp)
#define BNX2X_KWQ_DATA_IDX(cp, x) ((x) % (cp)->kwq_16_data_pp)
#define BNX2X_KWQ_DATA(cp, x)						\
	&(cp)->kwq_16_data[BNX2X_KWQ_DATA_PG(cp, x)][BNX2X_KWQ_DATA_IDX(cp, x)]

#define DEF_IPID_START		0x8000

#define DEF_KA_TIMEOUT		10000
#define DEF_KA_INTERVAL		300000
#define DEF_KA_MAX_PROBE_COUNT	3
#define DEF_TOS			0
#define DEF_TTL			0xfe
#define DEF_SND_SEQ_SCALE	0
#define DEF_RCV_BUF		0xffff
#define DEF_SND_BUF		0xffff
#define DEF_SEED		0
#define DEF_MAX_RT_TIME		500
#define DEF_MAX_DA_COUNT	2
#define DEF_SWS_TIMER		1000
#define DEF_MAX_CWND		0xffff

struct cnic_ctx {
	u32		cid;
	void		*ctx;
	dma_addr_t	mapping;
};

#define BNX2_MAX_CID		0x2000

struct cnic_dma {
	int		num_pages;
	void		**pg_arr;
	dma_addr_t	*pg_map_arr;
	int		pgtbl_size;
	u32		*pgtbl;
	dma_addr_t	pgtbl_map;
};

struct cnic_id_tbl {
	spinlock_t	lock;
	u32		start;
	u32		max;
	u32		next;
	unsigned long	*table;
};

#define CNIC_KWQ16_DATA_SIZE	128

struct kwqe_16_data {
	u8	data[CNIC_KWQ16_DATA_SIZE];
};

struct cnic_iscsi {
	struct cnic_dma		task_array_info;
	struct cnic_dma		r2tq_info;
	struct cnic_dma		hq_info;
};

struct cnic_context {
	u32			cid;
	struct kwqe_16_data	*kwqe_data;
	dma_addr_t		kwqe_data_mapping;
	wait_queue_head_t	waitq;
	int			wait_cond;
	unsigned long		timestamp;
	unsigned long		ctx_flags;
#define	CTX_FL_OFFLD_START	0
#define	CTX_FL_DELETE_WAIT	1
	u8			ulp_proto_id;
	union {
		struct cnic_iscsi	*iscsi;
	} proto;
};

struct kcq_info {
	struct cnic_dma	dma;
	struct kcqe	**kcq;

	u16		*hw_prod_idx_ptr;
	u16		sw_prod_idx;
	u16		*status_idx_ptr;
	u32		io_addr;
};

struct iro {
	u32 base;
	u16 m1;
	u16 m2;
	u16 m3;
	u16 size;
};

struct cnic_uio_dev {
	struct uio_info		cnic_uinfo;
	u32			uio_dev;

	int			l2_ring_size;
	void			*l2_ring;
	dma_addr_t		l2_ring_map;

	int			l2_buf_size;
	void			*l2_buf;
	dma_addr_t		l2_buf_map;

	struct cnic_dev		*dev;
	struct pci_dev		*pdev;
	struct list_head	list;
};

struct cnic_local {

	spinlock_t cnic_ulp_lock;
	void *ulp_handle[MAX_CNIC_ULP_TYPE];
	unsigned long ulp_flags[MAX_CNIC_ULP_TYPE];
#define ULP_F_INIT	0
#define ULP_F_START	1
#define ULP_F_CALL_PENDING	2
	struct cnic_ulp_ops *ulp_ops[MAX_CNIC_ULP_TYPE];

	unsigned long cnic_local_flags;
#define	CNIC_LCL_FL_KWQ_INIT		0x0
#define	CNIC_LCL_FL_L2_WAIT		0x1
#define	CNIC_LCL_FL_RINGS_INITED	0x2

	struct cnic_dev *dev;

	struct cnic_eth_dev *ethdev;

	struct cnic_uio_dev *udev;

	int		l2_rx_ring_size;
	int		l2_single_buf_size;

	u16		*rx_cons_ptr;
	u16		*tx_cons_ptr;
	u16		rx_cons;
	u16		tx_cons;

	struct iro		*iro_arr;
#define IRO (((struct cnic_local *) dev->cnic_priv)->iro_arr)

	struct cnic_dma		kwq_info;
	struct kwqe		**kwq;

	struct cnic_dma		kwq_16_data_info;

	u16		max_kwq_idx;

	u16		kwq_prod_idx;
	u32		kwq_io_addr;

	u16		*kwq_con_idx_ptr;
	u16		kwq_con_idx;

	struct kcq_info	kcq1;

	union {
		void				*gen;
		struct status_block_msix	*bnx2;
		struct host_hc_status_block_e1x	*bnx2x_e1x;
		/* index values - which counter to update */
		#define SM_RX_ID		0
		#define SM_TX_ID		1
	} status_blk;

	struct host_sp_status_block	*bnx2x_def_status_blk;

	u32				status_blk_num;
	u32				bnx2x_igu_sb_id;
	u32				int_num;
	u32				last_status_idx;
	struct tasklet_struct		cnic_irq_task;

	struct kcqe		*completed_kcq[MAX_COMPLETED_KCQE];

	struct cnic_sock	*csk_tbl;
	struct cnic_id_tbl	csk_port_tbl;

	struct cnic_dma		conn_buf_info;
	struct cnic_dma		gbl_buf_info;

	struct cnic_iscsi	*iscsi_tbl;
	struct cnic_context	*ctx_tbl;
	struct cnic_id_tbl	cid_tbl;
	atomic_t		iscsi_conn;
	u32			iscsi_start_cid;

	u32			max_cid_space;

	/* per connection parameters */
	int			num_iscsi_tasks;
	int			num_ccells;
	int			task_array_size;
	int			r2tq_size;
	int			hq_size;
	int			num_cqs;

	struct delayed_work	delete_task;

	struct cnic_ctx		*ctx_arr;
	int			ctx_blks;
	int			ctx_blk_size;
	unsigned long		ctx_align;
	int			cids_per_blk;

	u32			chip_id;
	int			func;
	u32			pfid;
	u32			shmem_base;

	struct cnic_ops		*cnic_ops;
	int			(*start_hw)(struct cnic_dev *);
	void			(*stop_hw)(struct cnic_dev *);
	void			(*setup_pgtbl)(struct cnic_dev *,
					       struct cnic_dma *);
	int			(*alloc_resc)(struct cnic_dev *);
	void			(*free_resc)(struct cnic_dev *);
	int			(*start_cm)(struct cnic_dev *);
	void			(*stop_cm)(struct cnic_dev *);
	void			(*enable_int)(struct cnic_dev *);
	void			(*disable_int_sync)(struct cnic_dev *);
	void			(*ack_int)(struct cnic_dev *);
	void			(*close_conn)(struct cnic_sock *, u32 opcode);
	u16			(*next_idx)(u16);
	u16			(*hw_idx)(u16);
};

struct bnx2x_bd_chain_next {
	u32	addr_lo;
	u32	addr_hi;
	u8	reserved[8];
};

#define ISCSI_DEFAULT_MAX_OUTSTANDING_R2T 	(1)

#define ISCSI_RAMROD_CMD_ID_UPDATE_CONN		(ISCSI_KCQE_OPCODE_UPDATE_CONN)
#define ISCSI_RAMROD_CMD_ID_INIT		(ISCSI_KCQE_OPCODE_INIT)

#define CDU_REGION_NUMBER_XCM_AG 2
#define CDU_REGION_NUMBER_UCM_AG 4

#define CDU_VALID_DATA(_cid, _region, _type)	\
	(((_cid) << 8) | (((_region)&0xf)<<4) | (((_type)&0xf)))

#define CDU_CRC8(_cid, _region, _type)	\
	(calc_crc8(CDU_VALID_DATA(_cid, _region, _type), 0xff))

#define CDU_RSRVD_VALUE_TYPE_A(_cid, _region, _type)	\
	(0x80 | ((CDU_CRC8(_cid, _region, _type)) & 0x7f))

#define BNX2X_CONTEXT_MEM_SIZE		1024
#define BNX2X_FCOE_CID			16

/* iSCSI client IDs are 17, 19, 21, 23 */
#define BNX2X_ISCSI_BASE_CL_ID		17
#define BNX2X_ISCSI_CL_ID(vn)		(BNX2X_ISCSI_BASE_CL_ID + ((vn) << 1))

#define BNX2X_ISCSI_L2_CID		17
#define BNX2X_ISCSI_START_CID		18
#define BNX2X_ISCSI_NUM_CONNECTIONS	128
#define BNX2X_ISCSI_TASK_CONTEXT_SIZE	128
#define BNX2X_ISCSI_MAX_PENDING_R2TS	4
#define BNX2X_ISCSI_R2TQE_SIZE		8
#define BNX2X_ISCSI_HQ_BD_SIZE		64
#define BNX2X_ISCSI_CONN_BUF_SIZE	64
#define BNX2X_ISCSI_GLB_BUF_SIZE	64
#define BNX2X_ISCSI_PBL_NOT_CACHED	0xff
#define BNX2X_ISCSI_PDU_HEADER_NOT_CACHED	0xff

#define BNX2X_CHIP_NUM_57710		0x164e
#define BNX2X_CHIP_NUM_57711		0x164f
#define BNX2X_CHIP_NUM_57711E		0x1650
#define BNX2X_CHIP_NUM_57712		0x1662
#define BNX2X_CHIP_NUM_57712E		0x1663
#define BNX2X_CHIP_NUM_57713		0x1651
#define BNX2X_CHIP_NUM_57713E		0x1652

#define BNX2X_CHIP_NUM(x)		(x >> 16)
#define BNX2X_CHIP_IS_57710(x)		\
	(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57710)
#define BNX2X_CHIP_IS_57711(x)		\
	(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711)
#define BNX2X_CHIP_IS_57711E(x)		\
	(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711E)
#define BNX2X_CHIP_IS_E1H(x)		\
	(BNX2X_CHIP_IS_57711(x) || BNX2X_CHIP_IS_57711E(x))
#define BNX2X_CHIP_IS_57712(x)		\
	(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57712)
#define BNX2X_CHIP_IS_57712E(x)		\
	(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57712E)
#define BNX2X_CHIP_IS_57713(x)		\
	(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57713)
#define BNX2X_CHIP_IS_57713E(x)		\
	(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57713E)
#define BNX2X_CHIP_IS_E2(x)		\
	(BNX2X_CHIP_IS_57712(x) || BNX2X_CHIP_IS_57712E(x) || \
	 BNX2X_CHIP_IS_57713(x) || BNX2X_CHIP_IS_57713E(x))

#define IS_E1H_OFFSET       		BNX2X_CHIP_IS_E1H(cp->chip_id)

#define BNX2X_RX_DESC_CNT		(BCM_PAGE_SIZE / sizeof(struct eth_rx_bd))
#define BNX2X_MAX_RX_DESC_CNT		(BNX2X_RX_DESC_CNT - 2)
#define BNX2X_RCQ_DESC_CNT		(BCM_PAGE_SIZE / sizeof(union eth_rx_cqe))
#define BNX2X_MAX_RCQ_DESC_CNT		(BNX2X_RCQ_DESC_CNT - 1)

#define BNX2X_NEXT_RCQE(x) (((x) & BNX2X_MAX_RCQ_DESC_CNT) ==		\
		(BNX2X_MAX_RCQ_DESC_CNT - 1)) ?				\
		((x) + 2) : ((x) + 1)

#define BNX2X_DEF_SB_ID			HC_SP_SB_ID

#define BNX2X_SHMEM_MF_BLK_OFFSET	0x7e4

#define BNX2X_SHMEM_ADDR(base, field)	(base + \
					 offsetof(struct shmem_region, field))

#define BNX2X_SHMEM2_ADDR(base, field)	(base + \
					 offsetof(struct shmem2_region, field))

#define BNX2X_SHMEM2_HAS(base, field)				\
		((base) &&					\
		 (CNIC_RD(dev, BNX2X_SHMEM2_ADDR(base, size)) >	\
		  offsetof(struct shmem2_region, field)))

#define CNIC_PORT(cp)			((cp)->pfid & 1)
#define CNIC_FUNC(cp)			((cp)->func)
#define CNIC_PATH(cp)			(!BNX2X_CHIP_IS_E2(cp->chip_id) ? 0 :\
					 (CNIC_FUNC(cp) & 1))
#define CNIC_E1HVN(cp)			((cp)->pfid >> 1)

#define BNX2X_HW_CID(cp, x)		((CNIC_PORT(cp) << 23) | \
					 (CNIC_E1HVN(cp) << 17) | (x))

#define BNX2X_SW_CID(x)			(x & 0x1ffff)

#define BNX2X_CL_QZONE_ID(cp, cli)					\
		(cli + (CNIC_PORT(cp) * ETH_MAX_RX_CLIENTS_E1H))

#define TCP_TSTORM_OOO_DROP_AND_PROC_ACK	(0<<4)
#endif
Commit	Line	Data
a4636960 MC	1	/* cnic.h: Broadcom CNIC core network driver.
a4636960 MC	2	*
1d9cfc4e	3	* Copyright (c) 2006-2010 Broadcom Corporation
a4636960 MC	4	*
	5	* This program is free software; you can redistribute it and/or modify
	6	* it under the terms of the GNU General Public License as published by
	7	* the Free Software Foundation.
	8	*
	9	*/
	10
	11
	12	#ifndef CNIC_H
	13	#define CNIC_H
	14
523224a3 DK	15	#define HC_INDEX_ISCSI_EQ_CONS 6
	16
	17	#define HC_INDEX_FCOE_EQ_CONS 3
	18
	19	#define HC_SP_INDEX_ETH_ISCSI_CQ_CONS 5
	20	#define HC_SP_INDEX_ETH_ISCSI_RX_CQ_CONS 1
	21
a4636960 MC	22	#define KWQ_PAGE_CNT 4
	23	#define KCQ_PAGE_CNT 16
	24
	25	#define KWQ_CID 24
	26	#define KCQ_CID 25
	27
	28	/*
	29	* krnlq_context definition
	30	*/
	31	#define L5_KRNLQ_FLAGS 0x00000000
	32	#define L5_KRNLQ_SIZE 0x00000000
	33	#define L5_KRNLQ_TYPE 0x00000000
	34	#define KRNLQ_FLAGS_PG_SZ (0xf<<0)
	35	#define KRNLQ_FLAGS_PG_SZ_256 (0<<0)
	36	#define KRNLQ_FLAGS_PG_SZ_512 (1<<0)
	37	#define KRNLQ_FLAGS_PG_SZ_1K (2<<0)
	38	#define KRNLQ_FLAGS_PG_SZ_2K (3<<0)
	39	#define KRNLQ_FLAGS_PG_SZ_4K (4<<0)
	40	#define KRNLQ_FLAGS_PG_SZ_8K (5<<0)
	41	#define KRNLQ_FLAGS_PG_SZ_16K (6<<0)
	42	#define KRNLQ_FLAGS_PG_SZ_32K (7<<0)
	43	#define KRNLQ_FLAGS_PG_SZ_64K (8<<0)
	44	#define KRNLQ_FLAGS_PG_SZ_128K (9<<0)
	45	#define KRNLQ_FLAGS_PG_SZ_256K (10<<0)
	46	#define KRNLQ_FLAGS_PG_SZ_512K (11<<0)
	47	#define KRNLQ_FLAGS_PG_SZ_1M (12<<0)
	48	#define KRNLQ_FLAGS_PG_SZ_2M (13<<0)
	49	#define KRNLQ_FLAGS_QE_SELF_SEQ (1<<15)
	50	#define KRNLQ_SIZE_TYPE_SIZE ((((0x28 + 0x1f) & ~0x1f) / 0x20) << 16)
	51	#define KRNLQ_TYPE_TYPE (0xf<<28)
	52	#define KRNLQ_TYPE_TYPE_EMPTY (0<<28)
	53	#define KRNLQ_TYPE_TYPE_KRNLQ (6<<28)
	54
	55	#define L5_KRNLQ_HOST_QIDX 0x00000004
	56	#define L5_KRNLQ_HOST_FW_QIDX 0x00000008
	57	#define L5_KRNLQ_NX_QE_SELF_SEQ 0x0000000c
	58	#define L5_KRNLQ_QE_SELF_SEQ_MAX 0x0000000c
	59	#define L5_KRNLQ_NX_QE_HADDR_HI 0x00000010
	60	#define L5_KRNLQ_NX_QE_HADDR_LO 0x00000014
	61	#define L5_KRNLQ_PGTBL_PGIDX 0x00000018
	62	#define L5_KRNLQ_NX_PG_QIDX 0x00000018
	63	#define L5_KRNLQ_PGTBL_NPAGES 0x0000001c
	64	#define L5_KRNLQ_QIDX_INCR 0x0000001c
	65	#define L5_KRNLQ_PGTBL_HADDR_HI 0x00000020
	66	#define L5_KRNLQ_PGTBL_HADDR_LO 0x00000024
	67
	68	#define BNX2_PG_CTX_MAP 0x1a0034
	69	#define BNX2_ISCSI_CTX_MAP 0x1a0074
	70
	71	struct cnic_redirect_entry {
	72	struct dst_entry *old_dst;
	73	struct dst_entry *new_dst;
	74	};
	75
	76	#define MAX_COMPLETED_KCQE 64
	77
	78	#define MAX_CNIC_L5_CONTEXT 256
	79
	80	#define MAX_CM_SK_TBL_SZ MAX_CNIC_L5_CONTEXT
	81
	82	#define MAX_ISCSI_TBL_SZ 256
	83
	84	#define CNIC_LOCAL_PORT_MIN 60000
	85	#define CNIC_LOCAL_PORT_MAX 61000
86	#define CNIC_LOCAL_PORT_RANGE (CNIC_LOCAL_PORT_MAX - CNIC_LOCAL_PORT_MIN)
87
88	#define KWQE_CNT (BCM_PAGE_SIZE / sizeof(struct kwqe))
89	#define KCQE_CNT (BCM_PAGE_SIZE / sizeof(struct kcqe))
90	#define MAX_KWQE_CNT (KWQE_CNT - 1)
91	#define MAX_KCQE_CNT (KCQE_CNT - 1)
92
93	#define MAX_KWQ_IDX ((KWQ_PAGE_CNT * KWQE_CNT) - 1)
94	#define MAX_KCQ_IDX ((KCQ_PAGE_CNT * KCQE_CNT) - 1)
95
96	#define KWQ_PG(x) (((x) & ~MAX_KWQE_CNT) >> (BCM_PAGE_BITS - 5))
97	#define KWQ_IDX(x) ((x) & MAX_KWQE_CNT)
98
99	#define KCQ_PG(x) (((x) & ~MAX_KCQE_CNT) >> (BCM_PAGE_BITS - 5))
100	#define KCQ_IDX(x) ((x) & MAX_KCQE_CNT)
101
102	#define BNX2X_NEXT_KCQE(x) (((x) & (MAX_KCQE_CNT - 1)) == \
103	(MAX_KCQE_CNT - 1)) ? \
104	(x) + 2 : (x) + 1
105
106	#define BNX2X_KWQ_DATA_PG(cp, x) ((x) / (cp)->kwq_16_data_pp)
107	#define BNX2X_KWQ_DATA_IDX(cp, x) ((x) % (cp)->kwq_16_data_pp)
108	#define BNX2X_KWQ_DATA(cp, x) \
109	&(cp)->kwq_16_data[BNX2X_KWQ_DATA_PG(cp, x)][BNX2X_KWQ_DATA_IDX(cp, x)]
110
a9736c08	111	#define DEF_IPID_START 0x8000
a4636960 MC	112
	113	#define DEF_KA_TIMEOUT 10000
	114	#define DEF_KA_INTERVAL 300000
	115	#define DEF_KA_MAX_PROBE_COUNT 3
	116	#define DEF_TOS 0
	117	#define DEF_TTL 0xfe
	118	#define DEF_SND_SEQ_SCALE 0
	119	#define DEF_RCV_BUF 0xffff
	120	#define DEF_SND_BUF 0xffff
	121	#define DEF_SEED 0
	122	#define DEF_MAX_RT_TIME 500
	123	#define DEF_MAX_DA_COUNT 2
	124	#define DEF_SWS_TIMER 1000
	125	#define DEF_MAX_CWND 0xffff
	126
	127	struct cnic_ctx {
	128	u32 cid;
	129	void *ctx;
	130	dma_addr_t mapping;
	131	};
	132
	133	#define BNX2_MAX_CID 0x2000
	134
	135	struct cnic_dma {
	136	int num_pages;
	137	void **pg_arr;
	138	dma_addr_t *pg_map_arr;
	139	int pgtbl_size;
	140	u32 *pgtbl;
	141	dma_addr_t pgtbl_map;
	142	};
	143
	144	struct cnic_id_tbl {
	145	spinlock_t lock;
	146	u32 start;
	147	u32 max;
	148	u32 next;
	149	unsigned long *table;
	150	};
	151
	152	#define CNIC_KWQ16_DATA_SIZE 128
	153
	154	struct kwqe_16_data {
	155	u8 data[CNIC_KWQ16_DATA_SIZE];
	156	};
	157
	158	struct cnic_iscsi {
	159	struct cnic_dma task_array_info;
	160	struct cnic_dma r2tq_info;
	161	struct cnic_dma hq_info;
	162	};
	163
	164	struct cnic_context {
	165	u32 cid;
	166	struct kwqe_16_data *kwqe_data;
	167	dma_addr_t kwqe_data_mapping;
	168	wait_queue_head_t waitq;
	169	int wait_cond;
	170	unsigned long timestamp;
6e0dda0c MC	171	unsigned long ctx_flags;
6e0dda0c MC	172	#define CTX_FL_OFFLD_START 0
fdf24086	173	#define CTX_FL_DELETE_WAIT 1
a4636960 MC	174	u8 ulp_proto_id;
	175	union {
	176	struct cnic_iscsi *iscsi;
	177	} proto;
	178	};
	179
e6c28894 MC	180	struct kcq_info {
	181	struct cnic_dma dma;
	182	struct kcqe **kcq;
	183
	184	u16 *hw_prod_idx_ptr;
	185	u16 sw_prod_idx;
	186	u16 *status_idx_ptr;
	187	u32 io_addr;
	188	};
	189
523224a3 DK	190	struct iro {
	191	u32 base;
	192	u16 m1;
	193	u16 m2;
	194	u16 m3;
	195	u16 size;
	196	};
	197
cd801536 MC	198	struct cnic_uio_dev {
	199	struct uio_info cnic_uinfo;
	200	u32 uio_dev;
	201
	202	int l2_ring_size;
	203	void *l2_ring;
	204	dma_addr_t l2_ring_map;
	205
	206	int l2_buf_size;
	207	void *l2_buf;
	208	dma_addr_t l2_buf_map;
	209
	210	struct cnic_dev *dev;
	211	struct pci_dev *pdev;
	212	struct list_head list;
	213	};
	214
a4636960 MC	215	struct cnic_local {
	216
	217	spinlock_t cnic_ulp_lock;
	218	void *ulp_handle[MAX_CNIC_ULP_TYPE];
	219	unsigned long ulp_flags[MAX_CNIC_ULP_TYPE];
	220	#define ULP_F_INIT 0
	221	#define ULP_F_START 1
681dbd71	222	#define ULP_F_CALL_PENDING 2
a4636960 MC	223	struct cnic_ulp_ops *ulp_ops[MAX_CNIC_ULP_TYPE];
a4636960 MC	224
1f1332a3 MC	225	unsigned long cnic_local_flags;
1f1332a3 MC	226	#define CNIC_LCL_FL_KWQ_INIT 0x0
48f753d2	227	#define CNIC_LCL_FL_L2_WAIT 0x1
541a7810	228	#define CNIC_LCL_FL_RINGS_INITED 0x2
a4636960 MC	229
	230	struct cnic_dev *dev;
	231
	232	struct cnic_eth_dev *ethdev;
	233
cd801536	234	struct cnic_uio_dev *udev;
a4636960	235
cd801536	236	int l2_rx_ring_size;
a4636960 MC	237	int l2_single_buf_size;
	238
	239	u16 *rx_cons_ptr;
	240	u16 *tx_cons_ptr;
	241	u16 rx_cons;
	242	u16 tx_cons;
	243
523224a3 DK	244	struct iro *iro_arr;
	245	#define IRO (((struct cnic_local *) dev->cnic_priv)->iro_arr)
	246
a4636960 MC	247	struct cnic_dma kwq_info;
	248	struct kwqe **kwq;
	249
	250	struct cnic_dma kwq_16_data_info;
	251
	252	u16 max_kwq_idx;
	253
	254	u16 kwq_prod_idx;
	255	u32 kwq_io_addr;
	256
	257	u16 *kwq_con_idx_ptr;
	258	u16 kwq_con_idx;
	259
e6c28894	260	struct kcq_info kcq1;
a4636960	261
a4dde3ab MC	262	union {
	263	void *gen;
	264	struct status_block_msix *bnx2;
523224a3 DK	265	struct host_hc_status_block_e1x *bnx2x_e1x;
	266	/* index values - which counter to update */
	267	#define SM_RX_ID 0
	268	#define SM_TX_ID 1
a4dde3ab MC	269	} status_blk;
a4dde3ab MC	270
523224a3	271	struct host_sp_status_block *bnx2x_def_status_blk;
a4636960 MC	272
a4636960 MC	273	u32 status_blk_num;
523224a3	274	u32 bnx2x_igu_sb_id;
a4636960 MC	275	u32 int_num;
	276	u32 last_status_idx;
	277	struct tasklet_struct cnic_irq_task;
	278
	279	struct kcqe *completed_kcq[MAX_COMPLETED_KCQE];
	280
	281	struct cnic_sock *csk_tbl;
	282	struct cnic_id_tbl csk_port_tbl;
	283
	284	struct cnic_dma conn_buf_info;
	285	struct cnic_dma gbl_buf_info;
	286
	287	struct cnic_iscsi *iscsi_tbl;
	288	struct cnic_context *ctx_tbl;
	289	struct cnic_id_tbl cid_tbl;
a4636960	290	atomic_t iscsi_conn;
520efdf4 MC	291	u32 iscsi_start_cid;
	292
	293	u32 max_cid_space;
a4636960 MC	294
	295	/* per connection parameters */
	296	int num_iscsi_tasks;
	297	int num_ccells;
	298	int task_array_size;
	299	int r2tq_size;
	300	int hq_size;
	301	int num_cqs;
	302
fdf24086 MC	303	struct delayed_work delete_task;
fdf24086 MC	304
a4636960 MC	305	struct cnic_ctx *ctx_arr;
	306	int ctx_blks;
	307	int ctx_blk_size;
e2513065	308	unsigned long ctx_align;
a4636960 MC	309	int cids_per_blk;
	310
	311	u32 chip_id;
	312	int func;
1420398d	313	u32 pfid;
a4636960 MC	314	u32 shmem_base;
a4636960 MC	315
a4636960 MC	316	struct cnic_ops *cnic_ops;
	317	int (start_hw)(struct cnic_dev );
	318	void (stop_hw)(struct cnic_dev );
	319	void (setup_pgtbl)(struct cnic_dev ,
	320	struct cnic_dma *);
	321	int (alloc_resc)(struct cnic_dev );
	322	void (free_resc)(struct cnic_dev );
	323	int (start_cm)(struct cnic_dev );
	324	void (stop_cm)(struct cnic_dev );
	325	void (enable_int)(struct cnic_dev );
	326	void (disable_int_sync)(struct cnic_dev );
	327	void (ack_int)(struct cnic_dev );
	328	void (close_conn)(struct cnic_sock , u32 opcode);
	329	u16 (*next_idx)(u16);
	330	u16 (*hw_idx)(u16);
	331	};
	332
	333	struct bnx2x_bd_chain_next {
	334	u32 addr_lo;
	335	u32 addr_hi;
	336	u8 reserved[8];
	337	};
	338
e2513065 MC	339	#define ISCSI_DEFAULT_MAX_OUTSTANDING_R2T (1)
e2513065 MC	340
a4636960 MC	341	#define ISCSI_RAMROD_CMD_ID_UPDATE_CONN (ISCSI_KCQE_OPCODE_UPDATE_CONN)
	342	#define ISCSI_RAMROD_CMD_ID_INIT (ISCSI_KCQE_OPCODE_INIT)
	343
	344	#define CDU_REGION_NUMBER_XCM_AG 2
	345	#define CDU_REGION_NUMBER_UCM_AG 4
	346
e2513065 MC	347	#define CDU_VALID_DATA(_cid, _region, _type) \
	348	(((_cid) << 8) \| (((_region)&0xf)<<4) \| (((_type)&0xf)))
	349
	350	#define CDU_CRC8(_cid, _region, _type) \
	351	(calc_crc8(CDU_VALID_DATA(_cid, _region, _type), 0xff))
	352
	353	#define CDU_RSRVD_VALUE_TYPE_A(_cid, _region, _type) \
	354	(0x80 \| ((CDU_CRC8(_cid, _region, _type)) & 0x7f))
	355
	356	#define BNX2X_CONTEXT_MEM_SIZE 1024
	357	#define BNX2X_FCOE_CID 16
	358
	359	/* iSCSI client IDs are 17, 19, 21, 23 */
	360	#define BNX2X_ISCSI_BASE_CL_ID 17
	361	#define BNX2X_ISCSI_CL_ID(vn) (BNX2X_ISCSI_BASE_CL_ID + ((vn) << 1))
	362
	363	#define BNX2X_ISCSI_L2_CID 17
	364	#define BNX2X_ISCSI_START_CID 18
	365	#define BNX2X_ISCSI_NUM_CONNECTIONS 128
	366	#define BNX2X_ISCSI_TASK_CONTEXT_SIZE 128
	367	#define BNX2X_ISCSI_MAX_PENDING_R2TS 4
	368	#define BNX2X_ISCSI_R2TQE_SIZE 8
	369	#define BNX2X_ISCSI_HQ_BD_SIZE 64
	370	#define BNX2X_ISCSI_CONN_BUF_SIZE 64
	371	#define BNX2X_ISCSI_GLB_BUF_SIZE 64
	372	#define BNX2X_ISCSI_PBL_NOT_CACHED 0xff
	373	#define BNX2X_ISCSI_PDU_HEADER_NOT_CACHED 0xff
ceb7e1c7	374
ee87a82a	375	#define BNX2X_CHIP_NUM_57710 0x164e
e2513065 MC	376	#define BNX2X_CHIP_NUM_57711 0x164f
e2513065 MC	377	#define BNX2X_CHIP_NUM_57711E 0x1650
ee87a82a MC	378	#define BNX2X_CHIP_NUM_57712 0x1662
	379	#define BNX2X_CHIP_NUM_57712E 0x1663
	380	#define BNX2X_CHIP_NUM_57713 0x1651
	381	#define BNX2X_CHIP_NUM_57713E 0x1652
	382
e2513065	383	#define BNX2X_CHIP_NUM(x) (x >> 16)
ee87a82a MC	384	#define BNX2X_CHIP_IS_57710(x) \
ee87a82a MC	385	(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57710)
e2513065 MC	386	#define BNX2X_CHIP_IS_57711(x) \
	387	(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711)
	388	#define BNX2X_CHIP_IS_57711E(x) \
	389	(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57711E)
	390	#define BNX2X_CHIP_IS_E1H(x) \
	391	(BNX2X_CHIP_IS_57711(x) \|\| BNX2X_CHIP_IS_57711E(x))
ee87a82a MC	392	#define BNX2X_CHIP_IS_57712(x) \
	393	(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57712)
	394	#define BNX2X_CHIP_IS_57712E(x) \
	395	(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57712E)
	396	#define BNX2X_CHIP_IS_57713(x) \
	397	(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57713)
	398	#define BNX2X_CHIP_IS_57713E(x) \
	399	(BNX2X_CHIP_NUM(x) == BNX2X_CHIP_NUM_57713E)
	400	#define BNX2X_CHIP_IS_E2(x) \
	401	(BNX2X_CHIP_IS_57712(x) \|\| BNX2X_CHIP_IS_57712E(x) \|\| \
	402	BNX2X_CHIP_IS_57713(x) \|\| BNX2X_CHIP_IS_57713E(x))
	403
e2513065 MC	404	#define IS_E1H_OFFSET BNX2X_CHIP_IS_E1H(cp->chip_id)
	405
	406	#define BNX2X_RX_DESC_CNT (BCM_PAGE_SIZE / sizeof(struct eth_rx_bd))
	407	#define BNX2X_MAX_RX_DESC_CNT (BNX2X_RX_DESC_CNT - 2)
	408	#define BNX2X_RCQ_DESC_CNT (BCM_PAGE_SIZE / sizeof(union eth_rx_cqe))
	409	#define BNX2X_MAX_RCQ_DESC_CNT (BNX2X_RCQ_DESC_CNT - 1)
	410
48f753d2 MC	411	#define BNX2X_NEXT_RCQE(x) (((x) & BNX2X_MAX_RCQ_DESC_CNT) == \
	412	(BNX2X_MAX_RCQ_DESC_CNT - 1)) ? \
	413	((x) + 2) : ((x) + 1)
	414
523224a3	415	#define BNX2X_DEF_SB_ID HC_SP_SB_ID
e2513065	416
523224a3	417	#define BNX2X_SHMEM_MF_BLK_OFFSET 0x7e4
e2513065 MC	418
	419	#define BNX2X_SHMEM_ADDR(base, field) (base + \
	420	offsetof(struct shmem_region, field))
	421
523224a3 DK	422	#define BNX2X_SHMEM2_ADDR(base, field) (base + \
	423	offsetof(struct shmem2_region, field))
	424
	425	#define BNX2X_SHMEM2_HAS(base, field) \
	426	((base) && \
	427	(CNIC_RD(dev, BNX2X_SHMEM2_ADDR(base, size)) > \
	428	offsetof(struct shmem2_region, field)))
	429
	430	#define CNIC_PORT(cp) ((cp)->pfid & 1)
e2513065	431	#define CNIC_FUNC(cp) ((cp)->func)
ee87a82a MC	432	#define CNIC_PATH(cp) (!BNX2X_CHIP_IS_E2(cp->chip_id) ? 0 :\
ee87a82a MC	433	(CNIC_FUNC(cp) & 1))
523224a3	434	#define CNIC_E1HVN(cp) ((cp)->pfid >> 1)
e2513065	435
523224a3	436	#define BNX2X_HW_CID(cp, x) ((CNIC_PORT(cp) << 23) \| \
ceb7e1c7 MC	437	(CNIC_E1HVN(cp) << 17) \| (x))
	438
	439	#define BNX2X_SW_CID(x) (x & 0x1ffff)
	440
523224a3 DK	441	#define BNX2X_CL_QZONE_ID(cp, cli) \
	442	(cli + (CNIC_PORT(cp) * ETH_MAX_RX_CLIENTS_E1H))
	443
	444	#define TCP_TSTORM_OOO_DROP_AND_PROC_ACK (0<<4)
a4636960 MC	445	#endif
a4636960 MC	446