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cd5f6346 KP |
1 | /* |
2 | * linux/drivers/mtd/onenand/onenand_base.c | |
3 | * | |
4 | * Copyright (C) 2005 Samsung Electronics | |
5 | * Kyungmin Park <kyungmin.park@samsung.com> | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License version 2 as | |
9 | * published by the Free Software Foundation. | |
10 | */ | |
11 | ||
12 | #include <linux/kernel.h> | |
13 | #include <linux/module.h> | |
14 | #include <linux/init.h> | |
015953d7 AM |
15 | #include <linux/sched.h> |
16 | #include <linux/jiffies.h> | |
cd5f6346 KP |
17 | #include <linux/mtd/mtd.h> |
18 | #include <linux/mtd/onenand.h> | |
19 | #include <linux/mtd/partitions.h> | |
20 | ||
21 | #include <asm/io.h> | |
22 | ||
23 | /** | |
24 | * onenand_oob_64 - oob info for large (2KB) page | |
25 | */ | |
26 | static struct nand_oobinfo onenand_oob_64 = { | |
27 | .useecc = MTD_NANDECC_AUTOPLACE, | |
28 | .eccbytes = 20, | |
29 | .eccpos = { | |
30 | 8, 9, 10, 11, 12, | |
31 | 24, 25, 26, 27, 28, | |
32 | 40, 41, 42, 43, 44, | |
33 | 56, 57, 58, 59, 60, | |
34 | }, | |
35 | .oobfree = { | |
36 | {2, 3}, {14, 2}, {18, 3}, {30, 2}, | |
d9777f1c JL |
37 | {34, 3}, {46, 2}, {50, 3}, {62, 2} |
38 | } | |
cd5f6346 KP |
39 | }; |
40 | ||
41 | /** | |
42 | * onenand_oob_32 - oob info for middle (1KB) page | |
43 | */ | |
44 | static struct nand_oobinfo onenand_oob_32 = { | |
45 | .useecc = MTD_NANDECC_AUTOPLACE, | |
46 | .eccbytes = 10, | |
47 | .eccpos = { | |
48 | 8, 9, 10, 11, 12, | |
49 | 24, 25, 26, 27, 28, | |
50 | }, | |
51 | .oobfree = { {2, 3}, {14, 2}, {18, 3}, {30, 2} } | |
52 | }; | |
53 | ||
54 | static const unsigned char ffchars[] = { | |
55 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
56 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 16 */ | |
57 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
58 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 32 */ | |
59 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
60 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 48 */ | |
61 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, | |
62 | 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, /* 64 */ | |
63 | }; | |
64 | ||
65 | /** | |
66 | * onenand_readw - [OneNAND Interface] Read OneNAND register | |
67 | * @param addr address to read | |
68 | * | |
69 | * Read OneNAND register | |
70 | */ | |
71 | static unsigned short onenand_readw(void __iomem *addr) | |
72 | { | |
73 | return readw(addr); | |
74 | } | |
75 | ||
76 | /** | |
77 | * onenand_writew - [OneNAND Interface] Write OneNAND register with value | |
78 | * @param value value to write | |
79 | * @param addr address to write | |
80 | * | |
81 | * Write OneNAND register with value | |
82 | */ | |
83 | static void onenand_writew(unsigned short value, void __iomem *addr) | |
84 | { | |
85 | writew(value, addr); | |
86 | } | |
87 | ||
88 | /** | |
89 | * onenand_block_address - [DEFAULT] Get block address | |
83a36838 | 90 | * @param this onenand chip data structure |
cd5f6346 KP |
91 | * @param block the block |
92 | * @return translated block address if DDP, otherwise same | |
93 | * | |
94 | * Setup Start Address 1 Register (F100h) | |
95 | */ | |
83a36838 | 96 | static int onenand_block_address(struct onenand_chip *this, int block) |
cd5f6346 | 97 | { |
83a36838 | 98 | if (this->device_id & ONENAND_DEVICE_IS_DDP) { |
cd5f6346 | 99 | /* Device Flash Core select, NAND Flash Block Address */ |
83a36838 | 100 | int dfs = 0; |
cd5f6346 | 101 | |
83a36838 | 102 | if (block & this->density_mask) |
cd5f6346 KP |
103 | dfs = 1; |
104 | ||
83a36838 KP |
105 | return (dfs << ONENAND_DDP_SHIFT) | |
106 | (block & (this->density_mask - 1)); | |
cd5f6346 KP |
107 | } |
108 | ||
109 | return block; | |
110 | } | |
111 | ||
112 | /** | |
113 | * onenand_bufferram_address - [DEFAULT] Get bufferram address | |
83a36838 | 114 | * @param this onenand chip data structure |
cd5f6346 KP |
115 | * @param block the block |
116 | * @return set DBS value if DDP, otherwise 0 | |
117 | * | |
118 | * Setup Start Address 2 Register (F101h) for DDP | |
119 | */ | |
83a36838 | 120 | static int onenand_bufferram_address(struct onenand_chip *this, int block) |
cd5f6346 | 121 | { |
83a36838 | 122 | if (this->device_id & ONENAND_DEVICE_IS_DDP) { |
cd5f6346 | 123 | /* Device BufferRAM Select */ |
83a36838 | 124 | int dbs = 0; |
cd5f6346 | 125 | |
83a36838 | 126 | if (block & this->density_mask) |
cd5f6346 KP |
127 | dbs = 1; |
128 | ||
129 | return (dbs << ONENAND_DDP_SHIFT); | |
130 | } | |
131 | ||
132 | return 0; | |
133 | } | |
134 | ||
135 | /** | |
136 | * onenand_page_address - [DEFAULT] Get page address | |
137 | * @param page the page address | |
138 | * @param sector the sector address | |
139 | * @return combined page and sector address | |
140 | * | |
141 | * Setup Start Address 8 Register (F107h) | |
142 | */ | |
143 | static int onenand_page_address(int page, int sector) | |
144 | { | |
145 | /* Flash Page Address, Flash Sector Address */ | |
146 | int fpa, fsa; | |
147 | ||
148 | fpa = page & ONENAND_FPA_MASK; | |
149 | fsa = sector & ONENAND_FSA_MASK; | |
150 | ||
151 | return ((fpa << ONENAND_FPA_SHIFT) | fsa); | |
152 | } | |
153 | ||
154 | /** | |
155 | * onenand_buffer_address - [DEFAULT] Get buffer address | |
156 | * @param dataram1 DataRAM index | |
157 | * @param sectors the sector address | |
158 | * @param count the number of sectors | |
159 | * @return the start buffer value | |
160 | * | |
161 | * Setup Start Buffer Register (F200h) | |
162 | */ | |
163 | static int onenand_buffer_address(int dataram1, int sectors, int count) | |
164 | { | |
165 | int bsa, bsc; | |
166 | ||
167 | /* BufferRAM Sector Address */ | |
168 | bsa = sectors & ONENAND_BSA_MASK; | |
169 | ||
170 | if (dataram1) | |
171 | bsa |= ONENAND_BSA_DATARAM1; /* DataRAM1 */ | |
172 | else | |
173 | bsa |= ONENAND_BSA_DATARAM0; /* DataRAM0 */ | |
174 | ||
175 | /* BufferRAM Sector Count */ | |
176 | bsc = count & ONENAND_BSC_MASK; | |
177 | ||
178 | return ((bsa << ONENAND_BSA_SHIFT) | bsc); | |
179 | } | |
180 | ||
181 | /** | |
182 | * onenand_command - [DEFAULT] Send command to OneNAND device | |
183 | * @param mtd MTD device structure | |
184 | * @param cmd the command to be sent | |
185 | * @param addr offset to read from or write to | |
186 | * @param len number of bytes to read or write | |
187 | * | |
188 | * Send command to OneNAND device. This function is used for middle/large page | |
189 | * devices (1KB/2KB Bytes per page) | |
190 | */ | |
191 | static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t len) | |
192 | { | |
193 | struct onenand_chip *this = mtd->priv; | |
194 | int value, readcmd = 0; | |
195 | int block, page; | |
196 | /* Now we use page size operation */ | |
197 | int sectors = 4, count = 4; | |
198 | ||
199 | /* Address translation */ | |
200 | switch (cmd) { | |
201 | case ONENAND_CMD_UNLOCK: | |
202 | case ONENAND_CMD_LOCK: | |
203 | case ONENAND_CMD_LOCK_TIGHT: | |
204 | block = -1; | |
205 | page = -1; | |
206 | break; | |
207 | ||
208 | case ONENAND_CMD_ERASE: | |
209 | case ONENAND_CMD_BUFFERRAM: | |
210 | block = (int) (addr >> this->erase_shift); | |
211 | page = -1; | |
212 | break; | |
213 | ||
214 | default: | |
215 | block = (int) (addr >> this->erase_shift); | |
216 | page = (int) (addr >> this->page_shift); | |
217 | page &= this->page_mask; | |
218 | break; | |
219 | } | |
220 | ||
221 | /* NOTE: The setting order of the registers is very important! */ | |
222 | if (cmd == ONENAND_CMD_BUFFERRAM) { | |
223 | /* Select DataRAM for DDP */ | |
83a36838 | 224 | value = onenand_bufferram_address(this, block); |
cd5f6346 KP |
225 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); |
226 | ||
227 | /* Switch to the next data buffer */ | |
228 | ONENAND_SET_NEXT_BUFFERRAM(this); | |
229 | ||
230 | return 0; | |
231 | } | |
232 | ||
233 | if (block != -1) { | |
234 | /* Write 'DFS, FBA' of Flash */ | |
83a36838 | 235 | value = onenand_block_address(this, block); |
cd5f6346 | 236 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); |
3cecf69e KP |
237 | |
238 | if (cmd == ONENAND_CMD_ERASE) { | |
239 | /* Select DataRAM for DDP */ | |
240 | value = onenand_bufferram_address(this, block); | |
241 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); | |
242 | } | |
cd5f6346 KP |
243 | } |
244 | ||
245 | if (page != -1) { | |
246 | int dataram; | |
247 | ||
248 | switch (cmd) { | |
249 | case ONENAND_CMD_READ: | |
250 | case ONENAND_CMD_READOOB: | |
251 | dataram = ONENAND_SET_NEXT_BUFFERRAM(this); | |
252 | readcmd = 1; | |
253 | break; | |
254 | ||
255 | default: | |
256 | dataram = ONENAND_CURRENT_BUFFERRAM(this); | |
257 | break; | |
258 | } | |
259 | ||
260 | /* Write 'FPA, FSA' of Flash */ | |
261 | value = onenand_page_address(page, sectors); | |
262 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS8); | |
263 | ||
264 | /* Write 'BSA, BSC' of DataRAM */ | |
265 | value = onenand_buffer_address(dataram, sectors, count); | |
266 | this->write_word(value, this->base + ONENAND_REG_START_BUFFER); | |
d5c5e78a | 267 | |
cd5f6346 KP |
268 | if (readcmd) { |
269 | /* Select DataRAM for DDP */ | |
83a36838 | 270 | value = onenand_bufferram_address(this, block); |
cd5f6346 KP |
271 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); |
272 | } | |
273 | } | |
274 | ||
275 | /* Interrupt clear */ | |
276 | this->write_word(ONENAND_INT_CLEAR, this->base + ONENAND_REG_INTERRUPT); | |
277 | ||
278 | /* Write command */ | |
279 | this->write_word(cmd, this->base + ONENAND_REG_COMMAND); | |
280 | ||
281 | return 0; | |
282 | } | |
283 | ||
284 | /** | |
285 | * onenand_wait - [DEFAULT] wait until the command is done | |
286 | * @param mtd MTD device structure | |
287 | * @param state state to select the max. timeout value | |
288 | * | |
289 | * Wait for command done. This applies to all OneNAND command | |
290 | * Read can take up to 30us, erase up to 2ms and program up to 350us | |
291 | * according to general OneNAND specs | |
292 | */ | |
293 | static int onenand_wait(struct mtd_info *mtd, int state) | |
294 | { | |
295 | struct onenand_chip * this = mtd->priv; | |
296 | unsigned long timeout; | |
297 | unsigned int flags = ONENAND_INT_MASTER; | |
298 | unsigned int interrupt = 0; | |
299 | unsigned int ctrl, ecc; | |
300 | ||
301 | /* The 20 msec is enough */ | |
302 | timeout = jiffies + msecs_to_jiffies(20); | |
303 | while (time_before(jiffies, timeout)) { | |
304 | interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); | |
305 | ||
306 | if (interrupt & flags) | |
307 | break; | |
308 | ||
309 | if (state != FL_READING) | |
310 | cond_resched(); | |
628bee65 | 311 | touch_softlockup_watchdog(); |
cd5f6346 KP |
312 | } |
313 | /* To get correct interrupt status in timeout case */ | |
314 | interrupt = this->read_word(this->base + ONENAND_REG_INTERRUPT); | |
315 | ||
316 | ctrl = this->read_word(this->base + ONENAND_REG_CTRL_STATUS); | |
317 | ||
318 | if (ctrl & ONENAND_CTRL_ERROR) { | |
cdc00130 KP |
319 | /* It maybe occur at initial bad block */ |
320 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: controller error = 0x%04x\n", ctrl); | |
321 | /* Clear other interrupt bits for preventing ECC error */ | |
322 | interrupt &= ONENAND_INT_MASTER; | |
cd5f6346 KP |
323 | } |
324 | ||
325 | if (ctrl & ONENAND_CTRL_LOCK) { | |
cdc00130 KP |
326 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: it's locked error = 0x%04x\n", ctrl); |
327 | return -EACCES; | |
cd5f6346 KP |
328 | } |
329 | ||
330 | if (interrupt & ONENAND_INT_READ) { | |
331 | ecc = this->read_word(this->base + ONENAND_REG_ECC_STATUS); | |
332 | if (ecc & ONENAND_ECC_2BIT_ALL) { | |
cdc00130 | 333 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_wait: ECC error = 0x%04x\n", ecc); |
cd5f6346 KP |
334 | return -EBADMSG; |
335 | } | |
336 | } | |
337 | ||
338 | return 0; | |
339 | } | |
340 | ||
341 | /** | |
342 | * onenand_bufferram_offset - [DEFAULT] BufferRAM offset | |
343 | * @param mtd MTD data structure | |
344 | * @param area BufferRAM area | |
345 | * @return offset given area | |
346 | * | |
347 | * Return BufferRAM offset given area | |
348 | */ | |
349 | static inline int onenand_bufferram_offset(struct mtd_info *mtd, int area) | |
350 | { | |
351 | struct onenand_chip *this = mtd->priv; | |
352 | ||
353 | if (ONENAND_CURRENT_BUFFERRAM(this)) { | |
354 | if (area == ONENAND_DATARAM) | |
355 | return mtd->oobblock; | |
356 | if (area == ONENAND_SPARERAM) | |
357 | return mtd->oobsize; | |
358 | } | |
359 | ||
360 | return 0; | |
361 | } | |
362 | ||
363 | /** | |
364 | * onenand_read_bufferram - [OneNAND Interface] Read the bufferram area | |
365 | * @param mtd MTD data structure | |
366 | * @param area BufferRAM area | |
367 | * @param buffer the databuffer to put/get data | |
368 | * @param offset offset to read from or write to | |
369 | * @param count number of bytes to read/write | |
370 | * | |
371 | * Read the BufferRAM area | |
372 | */ | |
373 | static int onenand_read_bufferram(struct mtd_info *mtd, int area, | |
374 | unsigned char *buffer, int offset, size_t count) | |
375 | { | |
376 | struct onenand_chip *this = mtd->priv; | |
377 | void __iomem *bufferram; | |
378 | ||
379 | bufferram = this->base + area; | |
380 | ||
381 | bufferram += onenand_bufferram_offset(mtd, area); | |
382 | ||
9c01f87d KP |
383 | if (ONENAND_CHECK_BYTE_ACCESS(count)) { |
384 | unsigned short word; | |
385 | ||
386 | /* Align with word(16-bit) size */ | |
387 | count--; | |
388 | ||
389 | /* Read word and save byte */ | |
390 | word = this->read_word(bufferram + offset + count); | |
391 | buffer[count] = (word & 0xff); | |
392 | } | |
393 | ||
cd5f6346 KP |
394 | memcpy(buffer, bufferram + offset, count); |
395 | ||
396 | return 0; | |
397 | } | |
398 | ||
52b0eea7 KP |
399 | /** |
400 | * onenand_sync_read_bufferram - [OneNAND Interface] Read the bufferram area with Sync. Burst mode | |
401 | * @param mtd MTD data structure | |
402 | * @param area BufferRAM area | |
403 | * @param buffer the databuffer to put/get data | |
404 | * @param offset offset to read from or write to | |
405 | * @param count number of bytes to read/write | |
406 | * | |
407 | * Read the BufferRAM area with Sync. Burst Mode | |
408 | */ | |
409 | static int onenand_sync_read_bufferram(struct mtd_info *mtd, int area, | |
410 | unsigned char *buffer, int offset, size_t count) | |
411 | { | |
412 | struct onenand_chip *this = mtd->priv; | |
413 | void __iomem *bufferram; | |
414 | ||
415 | bufferram = this->base + area; | |
416 | ||
417 | bufferram += onenand_bufferram_offset(mtd, area); | |
418 | ||
419 | this->mmcontrol(mtd, ONENAND_SYS_CFG1_SYNC_READ); | |
420 | ||
9c01f87d KP |
421 | if (ONENAND_CHECK_BYTE_ACCESS(count)) { |
422 | unsigned short word; | |
423 | ||
424 | /* Align with word(16-bit) size */ | |
425 | count--; | |
426 | ||
427 | /* Read word and save byte */ | |
428 | word = this->read_word(bufferram + offset + count); | |
429 | buffer[count] = (word & 0xff); | |
430 | } | |
431 | ||
52b0eea7 KP |
432 | memcpy(buffer, bufferram + offset, count); |
433 | ||
434 | this->mmcontrol(mtd, 0); | |
435 | ||
436 | return 0; | |
437 | } | |
438 | ||
cd5f6346 KP |
439 | /** |
440 | * onenand_write_bufferram - [OneNAND Interface] Write the bufferram area | |
441 | * @param mtd MTD data structure | |
442 | * @param area BufferRAM area | |
443 | * @param buffer the databuffer to put/get data | |
444 | * @param offset offset to read from or write to | |
445 | * @param count number of bytes to read/write | |
446 | * | |
447 | * Write the BufferRAM area | |
448 | */ | |
449 | static int onenand_write_bufferram(struct mtd_info *mtd, int area, | |
450 | const unsigned char *buffer, int offset, size_t count) | |
451 | { | |
452 | struct onenand_chip *this = mtd->priv; | |
453 | void __iomem *bufferram; | |
454 | ||
455 | bufferram = this->base + area; | |
456 | ||
457 | bufferram += onenand_bufferram_offset(mtd, area); | |
458 | ||
9c01f87d KP |
459 | if (ONENAND_CHECK_BYTE_ACCESS(count)) { |
460 | unsigned short word; | |
461 | int byte_offset; | |
462 | ||
463 | /* Align with word(16-bit) size */ | |
464 | count--; | |
465 | ||
466 | /* Calculate byte access offset */ | |
467 | byte_offset = offset + count; | |
468 | ||
469 | /* Read word and save byte */ | |
470 | word = this->read_word(bufferram + byte_offset); | |
471 | word = (word & ~0xff) | buffer[count]; | |
472 | this->write_word(word, bufferram + byte_offset); | |
473 | } | |
474 | ||
cd5f6346 KP |
475 | memcpy(bufferram + offset, buffer, count); |
476 | ||
477 | return 0; | |
478 | } | |
479 | ||
480 | /** | |
481 | * onenand_check_bufferram - [GENERIC] Check BufferRAM information | |
482 | * @param mtd MTD data structure | |
483 | * @param addr address to check | |
d5c5e78a | 484 | * @return 1 if there are valid data, otherwise 0 |
cd5f6346 KP |
485 | * |
486 | * Check bufferram if there is data we required | |
487 | */ | |
488 | static int onenand_check_bufferram(struct mtd_info *mtd, loff_t addr) | |
489 | { | |
490 | struct onenand_chip *this = mtd->priv; | |
491 | int block, page; | |
492 | int i; | |
d5c5e78a | 493 | |
cd5f6346 KP |
494 | block = (int) (addr >> this->erase_shift); |
495 | page = (int) (addr >> this->page_shift); | |
496 | page &= this->page_mask; | |
497 | ||
498 | i = ONENAND_CURRENT_BUFFERRAM(this); | |
499 | ||
500 | /* Is there valid data? */ | |
501 | if (this->bufferram[i].block == block && | |
502 | this->bufferram[i].page == page && | |
503 | this->bufferram[i].valid) | |
504 | return 1; | |
505 | ||
506 | return 0; | |
507 | } | |
508 | ||
509 | /** | |
510 | * onenand_update_bufferram - [GENERIC] Update BufferRAM information | |
511 | * @param mtd MTD data structure | |
512 | * @param addr address to update | |
513 | * @param valid valid flag | |
514 | * | |
515 | * Update BufferRAM information | |
516 | */ | |
517 | static int onenand_update_bufferram(struct mtd_info *mtd, loff_t addr, | |
518 | int valid) | |
519 | { | |
520 | struct onenand_chip *this = mtd->priv; | |
521 | int block, page; | |
522 | int i; | |
d5c5e78a | 523 | |
cd5f6346 KP |
524 | block = (int) (addr >> this->erase_shift); |
525 | page = (int) (addr >> this->page_shift); | |
526 | page &= this->page_mask; | |
527 | ||
528 | /* Invalidate BufferRAM */ | |
529 | for (i = 0; i < MAX_BUFFERRAM; i++) { | |
530 | if (this->bufferram[i].block == block && | |
531 | this->bufferram[i].page == page) | |
532 | this->bufferram[i].valid = 0; | |
533 | } | |
534 | ||
535 | /* Update BufferRAM */ | |
536 | i = ONENAND_CURRENT_BUFFERRAM(this); | |
537 | this->bufferram[i].block = block; | |
538 | this->bufferram[i].page = page; | |
539 | this->bufferram[i].valid = valid; | |
540 | ||
541 | return 0; | |
542 | } | |
543 | ||
544 | /** | |
545 | * onenand_get_device - [GENERIC] Get chip for selected access | |
546 | * @param mtd MTD device structure | |
547 | * @param new_state the state which is requested | |
548 | * | |
549 | * Get the device and lock it for exclusive access | |
550 | */ | |
a41371eb | 551 | static int onenand_get_device(struct mtd_info *mtd, int new_state) |
cd5f6346 KP |
552 | { |
553 | struct onenand_chip *this = mtd->priv; | |
554 | DECLARE_WAITQUEUE(wait, current); | |
555 | ||
556 | /* | |
557 | * Grab the lock and see if the device is available | |
558 | */ | |
559 | while (1) { | |
560 | spin_lock(&this->chip_lock); | |
561 | if (this->state == FL_READY) { | |
562 | this->state = new_state; | |
563 | spin_unlock(&this->chip_lock); | |
564 | break; | |
565 | } | |
a41371eb KP |
566 | if (new_state == FL_PM_SUSPENDED) { |
567 | spin_unlock(&this->chip_lock); | |
568 | return (this->state == FL_PM_SUSPENDED) ? 0 : -EAGAIN; | |
569 | } | |
cd5f6346 KP |
570 | set_current_state(TASK_UNINTERRUPTIBLE); |
571 | add_wait_queue(&this->wq, &wait); | |
572 | spin_unlock(&this->chip_lock); | |
573 | schedule(); | |
574 | remove_wait_queue(&this->wq, &wait); | |
575 | } | |
a41371eb KP |
576 | |
577 | return 0; | |
cd5f6346 KP |
578 | } |
579 | ||
580 | /** | |
581 | * onenand_release_device - [GENERIC] release chip | |
582 | * @param mtd MTD device structure | |
583 | * | |
584 | * Deselect, release chip lock and wake up anyone waiting on the device | |
585 | */ | |
586 | static void onenand_release_device(struct mtd_info *mtd) | |
587 | { | |
588 | struct onenand_chip *this = mtd->priv; | |
589 | ||
590 | /* Release the chip */ | |
591 | spin_lock(&this->chip_lock); | |
592 | this->state = FL_READY; | |
593 | wake_up(&this->wq); | |
594 | spin_unlock(&this->chip_lock); | |
595 | } | |
596 | ||
597 | /** | |
598 | * onenand_read_ecc - [MTD Interface] Read data with ECC | |
599 | * @param mtd MTD device structure | |
600 | * @param from offset to read from | |
601 | * @param len number of bytes to read | |
602 | * @param retlen pointer to variable to store the number of read bytes | |
603 | * @param buf the databuffer to put data | |
604 | * @param oob_buf filesystem supplied oob data buffer | |
605 | * @param oobsel oob selection structure | |
606 | * | |
607 | * OneNAND read with ECC | |
608 | */ | |
609 | static int onenand_read_ecc(struct mtd_info *mtd, loff_t from, size_t len, | |
610 | size_t *retlen, u_char *buf, | |
611 | u_char *oob_buf, struct nand_oobinfo *oobsel) | |
612 | { | |
613 | struct onenand_chip *this = mtd->priv; | |
614 | int read = 0, column; | |
615 | int thislen; | |
616 | int ret = 0; | |
617 | ||
618 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len); | |
619 | ||
620 | /* Do not allow reads past end of device */ | |
621 | if ((from + len) > mtd->size) { | |
622 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_ecc: Attempt read beyond end of device\n"); | |
623 | *retlen = 0; | |
624 | return -EINVAL; | |
625 | } | |
626 | ||
627 | /* Grab the lock and see if the device is available */ | |
628 | onenand_get_device(mtd, FL_READING); | |
629 | ||
630 | /* TODO handling oob */ | |
631 | ||
632 | while (read < len) { | |
633 | thislen = min_t(int, mtd->oobblock, len - read); | |
634 | ||
635 | column = from & (mtd->oobblock - 1); | |
636 | if (column + thislen > mtd->oobblock) | |
637 | thislen = mtd->oobblock - column; | |
638 | ||
639 | if (!onenand_check_bufferram(mtd, from)) { | |
640 | this->command(mtd, ONENAND_CMD_READ, from, mtd->oobblock); | |
641 | ||
642 | ret = this->wait(mtd, FL_READING); | |
643 | /* First copy data and check return value for ECC handling */ | |
644 | onenand_update_bufferram(mtd, from, 1); | |
645 | } | |
646 | ||
647 | this->read_bufferram(mtd, ONENAND_DATARAM, buf, column, thislen); | |
648 | ||
649 | read += thislen; | |
650 | ||
651 | if (read == len) | |
652 | break; | |
653 | ||
654 | if (ret) { | |
655 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_ecc: read failed = %d\n", ret); | |
656 | goto out; | |
657 | } | |
658 | ||
659 | from += thislen; | |
660 | buf += thislen; | |
661 | } | |
662 | ||
663 | out: | |
664 | /* Deselect and wake up anyone waiting on the device */ | |
665 | onenand_release_device(mtd); | |
666 | ||
667 | /* | |
668 | * Return success, if no ECC failures, else -EBADMSG | |
669 | * fs driver will take care of that, because | |
670 | * retlen == desired len and result == -EBADMSG | |
671 | */ | |
672 | *retlen = read; | |
673 | return ret; | |
674 | } | |
675 | ||
676 | /** | |
677 | * onenand_read - [MTD Interface] MTD compability function for onenand_read_ecc | |
678 | * @param mtd MTD device structure | |
679 | * @param from offset to read from | |
680 | * @param len number of bytes to read | |
681 | * @param retlen pointer to variable to store the number of read bytes | |
682 | * @param buf the databuffer to put data | |
683 | * | |
684 | * This function simply calls onenand_read_ecc with oob buffer and oobsel = NULL | |
685 | */ | |
686 | static int onenand_read(struct mtd_info *mtd, loff_t from, size_t len, | |
687 | size_t *retlen, u_char *buf) | |
688 | { | |
689 | return onenand_read_ecc(mtd, from, len, retlen, buf, NULL, NULL); | |
690 | } | |
691 | ||
692 | /** | |
693 | * onenand_read_oob - [MTD Interface] OneNAND read out-of-band | |
694 | * @param mtd MTD device structure | |
695 | * @param from offset to read from | |
696 | * @param len number of bytes to read | |
697 | * @param retlen pointer to variable to store the number of read bytes | |
698 | * @param buf the databuffer to put data | |
699 | * | |
700 | * OneNAND read out-of-band data from the spare area | |
701 | */ | |
702 | static int onenand_read_oob(struct mtd_info *mtd, loff_t from, size_t len, | |
703 | size_t *retlen, u_char *buf) | |
704 | { | |
705 | struct onenand_chip *this = mtd->priv; | |
706 | int read = 0, thislen, column; | |
707 | int ret = 0; | |
708 | ||
709 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len); | |
710 | ||
711 | /* Initialize return length value */ | |
712 | *retlen = 0; | |
713 | ||
714 | /* Do not allow reads past end of device */ | |
715 | if (unlikely((from + len) > mtd->size)) { | |
716 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: Attempt read beyond end of device\n"); | |
717 | return -EINVAL; | |
718 | } | |
719 | ||
720 | /* Grab the lock and see if the device is available */ | |
721 | onenand_get_device(mtd, FL_READING); | |
722 | ||
723 | column = from & (mtd->oobsize - 1); | |
724 | ||
725 | while (read < len) { | |
726 | thislen = mtd->oobsize - column; | |
727 | thislen = min_t(int, thislen, len); | |
728 | ||
729 | this->command(mtd, ONENAND_CMD_READOOB, from, mtd->oobsize); | |
730 | ||
731 | onenand_update_bufferram(mtd, from, 0); | |
732 | ||
733 | ret = this->wait(mtd, FL_READING); | |
734 | /* First copy data and check return value for ECC handling */ | |
735 | ||
736 | this->read_bufferram(mtd, ONENAND_SPARERAM, buf, column, thislen); | |
737 | ||
738 | read += thislen; | |
739 | ||
740 | if (read == len) | |
741 | break; | |
742 | ||
743 | if (ret) { | |
744 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_read_oob: read failed = %d\n", ret); | |
745 | goto out; | |
746 | } | |
747 | ||
748 | buf += thislen; | |
749 | ||
750 | /* Read more? */ | |
751 | if (read < len) { | |
752 | /* Page size */ | |
753 | from += mtd->oobblock; | |
754 | column = 0; | |
755 | } | |
756 | } | |
757 | ||
758 | out: | |
759 | /* Deselect and wake up anyone waiting on the device */ | |
760 | onenand_release_device(mtd); | |
761 | ||
762 | *retlen = read; | |
763 | return ret; | |
764 | } | |
765 | ||
766 | #ifdef CONFIG_MTD_ONENAND_VERIFY_WRITE | |
8e6ec690 KP |
767 | /** |
768 | * onenand_verify_oob - [GENERIC] verify the oob contents after a write | |
769 | * @param mtd MTD device structure | |
770 | * @param buf the databuffer to verify | |
771 | * @param to offset to read from | |
772 | * @param len number of bytes to read and compare | |
773 | * | |
774 | */ | |
775 | static int onenand_verify_oob(struct mtd_info *mtd, const u_char *buf, loff_t to, int len) | |
776 | { | |
777 | struct onenand_chip *this = mtd->priv; | |
778 | char *readp = this->page_buf; | |
779 | int column = to & (mtd->oobsize - 1); | |
780 | int status, i; | |
781 | ||
782 | this->command(mtd, ONENAND_CMD_READOOB, to, mtd->oobsize); | |
783 | onenand_update_bufferram(mtd, to, 0); | |
784 | status = this->wait(mtd, FL_READING); | |
785 | if (status) | |
786 | return status; | |
787 | ||
788 | this->read_bufferram(mtd, ONENAND_SPARERAM, readp, column, len); | |
789 | ||
790 | for(i = 0; i < len; i++) | |
791 | if (buf[i] != 0xFF && buf[i] != readp[i]) | |
792 | return -EBADMSG; | |
793 | ||
794 | return 0; | |
795 | } | |
796 | ||
cd5f6346 KP |
797 | /** |
798 | * onenand_verify_page - [GENERIC] verify the chip contents after a write | |
799 | * @param mtd MTD device structure | |
800 | * @param buf the databuffer to verify | |
cd5f6346 KP |
801 | * |
802 | * Check DataRAM area directly | |
803 | */ | |
d36d63d4 | 804 | static int onenand_verify_page(struct mtd_info *mtd, u_char *buf, loff_t addr) |
cd5f6346 KP |
805 | { |
806 | struct onenand_chip *this = mtd->priv; | |
807 | void __iomem *dataram0, *dataram1; | |
808 | int ret = 0; | |
809 | ||
810 | this->command(mtd, ONENAND_CMD_READ, addr, mtd->oobblock); | |
811 | ||
812 | ret = this->wait(mtd, FL_READING); | |
813 | if (ret) | |
814 | return ret; | |
815 | ||
816 | onenand_update_bufferram(mtd, addr, 1); | |
817 | ||
818 | /* Check, if the two dataram areas are same */ | |
819 | dataram0 = this->base + ONENAND_DATARAM; | |
820 | dataram1 = dataram0 + mtd->oobblock; | |
821 | ||
822 | if (memcmp(dataram0, dataram1, mtd->oobblock)) | |
823 | return -EBADMSG; | |
d5c5e78a | 824 | |
cd5f6346 KP |
825 | return 0; |
826 | } | |
827 | #else | |
828 | #define onenand_verify_page(...) (0) | |
8e6ec690 | 829 | #define onenand_verify_oob(...) (0) |
cd5f6346 KP |
830 | #endif |
831 | ||
832 | #define NOTALIGNED(x) ((x & (mtd->oobblock - 1)) != 0) | |
833 | ||
834 | /** | |
835 | * onenand_write_ecc - [MTD Interface] OneNAND write with ECC | |
836 | * @param mtd MTD device structure | |
837 | * @param to offset to write to | |
838 | * @param len number of bytes to write | |
839 | * @param retlen pointer to variable to store the number of written bytes | |
840 | * @param buf the data to write | |
841 | * @param eccbuf filesystem supplied oob data buffer | |
842 | * @param oobsel oob selection structure | |
843 | * | |
844 | * OneNAND write with ECC | |
845 | */ | |
846 | static int onenand_write_ecc(struct mtd_info *mtd, loff_t to, size_t len, | |
847 | size_t *retlen, const u_char *buf, | |
848 | u_char *eccbuf, struct nand_oobinfo *oobsel) | |
849 | { | |
850 | struct onenand_chip *this = mtd->priv; | |
851 | int written = 0; | |
852 | int ret = 0; | |
853 | ||
854 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len); | |
855 | ||
856 | /* Initialize retlen, in case of early exit */ | |
857 | *retlen = 0; | |
858 | ||
859 | /* Do not allow writes past end of device */ | |
860 | if (unlikely((to + len) > mtd->size)) { | |
861 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt write to past end of device\n"); | |
862 | return -EINVAL; | |
863 | } | |
864 | ||
865 | /* Reject writes, which are not page aligned */ | |
866 | if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(len))) { | |
867 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: Attempt to write not page aligned data\n"); | |
868 | return -EINVAL; | |
869 | } | |
870 | ||
871 | /* Grab the lock and see if the device is available */ | |
872 | onenand_get_device(mtd, FL_WRITING); | |
873 | ||
874 | /* Loop until all data write */ | |
875 | while (written < len) { | |
876 | int thislen = min_t(int, mtd->oobblock, len - written); | |
877 | ||
878 | this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock); | |
879 | ||
880 | this->write_bufferram(mtd, ONENAND_DATARAM, buf, 0, thislen); | |
881 | this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize); | |
882 | ||
883 | this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock); | |
884 | ||
885 | onenand_update_bufferram(mtd, to, 1); | |
886 | ||
887 | ret = this->wait(mtd, FL_WRITING); | |
888 | if (ret) { | |
889 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: write filaed %d\n", ret); | |
890 | goto out; | |
891 | } | |
892 | ||
893 | written += thislen; | |
894 | ||
895 | /* Only check verify write turn on */ | |
d36d63d4 | 896 | ret = onenand_verify_page(mtd, (u_char *) buf, to); |
cd5f6346 KP |
897 | if (ret) { |
898 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_ecc: verify failed %d\n", ret); | |
899 | goto out; | |
900 | } | |
901 | ||
902 | if (written == len) | |
903 | break; | |
904 | ||
905 | to += thislen; | |
906 | buf += thislen; | |
907 | } | |
908 | ||
909 | out: | |
910 | /* Deselect and wake up anyone waiting on the device */ | |
911 | onenand_release_device(mtd); | |
912 | ||
913 | *retlen = written; | |
d5c5e78a | 914 | |
cd5f6346 KP |
915 | return ret; |
916 | } | |
917 | ||
918 | /** | |
919 | * onenand_write - [MTD Interface] compability function for onenand_write_ecc | |
920 | * @param mtd MTD device structure | |
921 | * @param to offset to write to | |
922 | * @param len number of bytes to write | |
923 | * @param retlen pointer to variable to store the number of written bytes | |
924 | * @param buf the data to write | |
925 | * | |
926 | * This function simply calls onenand_write_ecc | |
927 | * with oob buffer and oobsel = NULL | |
928 | */ | |
929 | static int onenand_write(struct mtd_info *mtd, loff_t to, size_t len, | |
930 | size_t *retlen, const u_char *buf) | |
931 | { | |
932 | return onenand_write_ecc(mtd, to, len, retlen, buf, NULL, NULL); | |
933 | } | |
934 | ||
935 | /** | |
936 | * onenand_write_oob - [MTD Interface] OneNAND write out-of-band | |
937 | * @param mtd MTD device structure | |
938 | * @param to offset to write to | |
939 | * @param len number of bytes to write | |
940 | * @param retlen pointer to variable to store the number of written bytes | |
941 | * @param buf the data to write | |
942 | * | |
943 | * OneNAND write out-of-band | |
944 | */ | |
945 | static int onenand_write_oob(struct mtd_info *mtd, loff_t to, size_t len, | |
946 | size_t *retlen, const u_char *buf) | |
947 | { | |
948 | struct onenand_chip *this = mtd->priv; | |
8e6ec690 | 949 | int column, ret = 0; |
cd5f6346 KP |
950 | int written = 0; |
951 | ||
952 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len); | |
953 | ||
954 | /* Initialize retlen, in case of early exit */ | |
955 | *retlen = 0; | |
956 | ||
957 | /* Do not allow writes past end of device */ | |
958 | if (unlikely((to + len) > mtd->size)) { | |
959 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: Attempt write to past end of device\n"); | |
960 | return -EINVAL; | |
961 | } | |
962 | ||
963 | /* Grab the lock and see if the device is available */ | |
964 | onenand_get_device(mtd, FL_WRITING); | |
965 | ||
966 | /* Loop until all data write */ | |
967 | while (written < len) { | |
968 | int thislen = min_t(int, mtd->oobsize, len - written); | |
969 | ||
970 | column = to & (mtd->oobsize - 1); | |
971 | ||
972 | this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobsize); | |
973 | ||
34c10609 KP |
974 | /* We send data to spare ram with oobsize |
975 | * to prevent byte access */ | |
976 | memset(this->page_buf, 0xff, mtd->oobsize); | |
977 | memcpy(this->page_buf + column, buf, thislen); | |
978 | this->write_bufferram(mtd, ONENAND_SPARERAM, this->page_buf, 0, mtd->oobsize); | |
cd5f6346 KP |
979 | |
980 | this->command(mtd, ONENAND_CMD_PROGOOB, to, mtd->oobsize); | |
981 | ||
982 | onenand_update_bufferram(mtd, to, 0); | |
983 | ||
8e6ec690 KP |
984 | ret = this->wait(mtd, FL_WRITING); |
985 | if (ret) { | |
986 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: write filaed %d\n", ret); | |
987 | goto out; | |
988 | } | |
989 | ||
990 | ret = onenand_verify_oob(mtd, buf, to, thislen); | |
991 | if (ret) { | |
992 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_write_oob: verify failed %d\n", ret); | |
cd5f6346 | 993 | goto out; |
8e6ec690 | 994 | } |
cd5f6346 KP |
995 | |
996 | written += thislen; | |
997 | ||
998 | if (written == len) | |
999 | break; | |
1000 | ||
1001 | to += thislen; | |
1002 | buf += thislen; | |
1003 | } | |
1004 | ||
1005 | out: | |
1006 | /* Deselect and wake up anyone waiting on the device */ | |
1007 | onenand_release_device(mtd); | |
1008 | ||
1009 | *retlen = written; | |
d5c5e78a | 1010 | |
8e6ec690 | 1011 | return ret; |
cd5f6346 KP |
1012 | } |
1013 | ||
1014 | /** | |
1015 | * onenand_writev_ecc - [MTD Interface] write with iovec with ecc | |
1016 | * @param mtd MTD device structure | |
1017 | * @param vecs the iovectors to write | |
1018 | * @param count number of vectors | |
1019 | * @param to offset to write to | |
1020 | * @param retlen pointer to variable to store the number of written bytes | |
1021 | * @param eccbuf filesystem supplied oob data buffer | |
1022 | * @param oobsel oob selection structure | |
1023 | * | |
1024 | * OneNAND write with iovec with ecc | |
1025 | */ | |
1026 | static int onenand_writev_ecc(struct mtd_info *mtd, const struct kvec *vecs, | |
1027 | unsigned long count, loff_t to, size_t *retlen, | |
1028 | u_char *eccbuf, struct nand_oobinfo *oobsel) | |
1029 | { | |
1030 | struct onenand_chip *this = mtd->priv; | |
532a37cf | 1031 | unsigned char *pbuf; |
cd5f6346 KP |
1032 | size_t total_len, len; |
1033 | int i, written = 0; | |
1034 | int ret = 0; | |
1035 | ||
1036 | /* Preset written len for early exit */ | |
1037 | *retlen = 0; | |
1038 | ||
1039 | /* Calculate total length of data */ | |
1040 | total_len = 0; | |
1041 | for (i = 0; i < count; i++) | |
1042 | total_len += vecs[i].iov_len; | |
1043 | ||
1044 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_writev_ecc: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count); | |
1045 | ||
1046 | /* Do not allow write past end of the device */ | |
1047 | if (unlikely((to + total_len) > mtd->size)) { | |
1048 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: Attempted write past end of device\n"); | |
1049 | return -EINVAL; | |
1050 | } | |
1051 | ||
1052 | /* Reject writes, which are not page aligned */ | |
1053 | if (unlikely(NOTALIGNED(to)) || unlikely(NOTALIGNED(total_len))) { | |
1054 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: Attempt to write not page aligned data\n"); | |
1055 | return -EINVAL; | |
1056 | } | |
1057 | ||
1058 | /* Grab the lock and see if the device is available */ | |
1059 | onenand_get_device(mtd, FL_WRITING); | |
1060 | ||
1061 | /* TODO handling oob */ | |
d5c5e78a | 1062 | |
cd5f6346 KP |
1063 | /* Loop until all keve's data has been written */ |
1064 | len = 0; | |
1065 | while (count) { | |
532a37cf | 1066 | pbuf = this->page_buf; |
d5c5e78a | 1067 | /* |
cd5f6346 KP |
1068 | * If the given tuple is >= pagesize then |
1069 | * write it out from the iov | |
1070 | */ | |
1071 | if ((vecs->iov_len - len) >= mtd->oobblock) { | |
1072 | pbuf = vecs->iov_base + len; | |
1073 | ||
1074 | len += mtd->oobblock; | |
1075 | ||
1076 | /* Check, if we have to switch to the next tuple */ | |
1077 | if (len >= (int) vecs->iov_len) { | |
1078 | vecs++; | |
1079 | len = 0; | |
1080 | count--; | |
1081 | } | |
1082 | } else { | |
1083 | int cnt = 0, thislen; | |
1084 | while (cnt < mtd->oobblock) { | |
1085 | thislen = min_t(int, mtd->oobblock - cnt, vecs->iov_len - len); | |
532a37cf | 1086 | memcpy(this->page_buf + cnt, vecs->iov_base + len, thislen); |
cd5f6346 KP |
1087 | cnt += thislen; |
1088 | len += thislen; | |
1089 | ||
1090 | /* Check, if we have to switch to the next tuple */ | |
1091 | if (len >= (int) vecs->iov_len) { | |
1092 | vecs++; | |
1093 | len = 0; | |
1094 | count--; | |
1095 | } | |
1096 | } | |
1097 | } | |
1098 | ||
1099 | this->command(mtd, ONENAND_CMD_BUFFERRAM, to, mtd->oobblock); | |
1100 | ||
1101 | this->write_bufferram(mtd, ONENAND_DATARAM, pbuf, 0, mtd->oobblock); | |
1102 | this->write_bufferram(mtd, ONENAND_SPARERAM, ffchars, 0, mtd->oobsize); | |
1103 | ||
1104 | this->command(mtd, ONENAND_CMD_PROG, to, mtd->oobblock); | |
1105 | ||
1106 | onenand_update_bufferram(mtd, to, 1); | |
1107 | ||
1108 | ret = this->wait(mtd, FL_WRITING); | |
1109 | if (ret) { | |
1110 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: write failed %d\n", ret); | |
1111 | goto out; | |
1112 | } | |
1113 | ||
1114 | ||
1115 | /* Only check verify write turn on */ | |
d36d63d4 | 1116 | ret = onenand_verify_page(mtd, (u_char *) pbuf, to); |
cd5f6346 KP |
1117 | if (ret) { |
1118 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_writev_ecc: verify failed %d\n", ret); | |
1119 | goto out; | |
1120 | } | |
1121 | ||
1122 | written += mtd->oobblock; | |
1123 | ||
1124 | to += mtd->oobblock; | |
1125 | } | |
1126 | ||
1127 | out: | |
1128 | /* Deselect and wakt up anyone waiting on the device */ | |
1129 | onenand_release_device(mtd); | |
1130 | ||
1131 | *retlen = written; | |
1132 | ||
1133 | return 0; | |
1134 | } | |
1135 | ||
1136 | /** | |
1137 | * onenand_writev - [MTD Interface] compabilty function for onenand_writev_ecc | |
1138 | * @param mtd MTD device structure | |
1139 | * @param vecs the iovectors to write | |
1140 | * @param count number of vectors | |
1141 | * @param to offset to write to | |
1142 | * @param retlen pointer to variable to store the number of written bytes | |
1143 | * | |
1144 | * OneNAND write with kvec. This just calls the ecc function | |
1145 | */ | |
1146 | static int onenand_writev(struct mtd_info *mtd, const struct kvec *vecs, | |
1147 | unsigned long count, loff_t to, size_t *retlen) | |
1148 | { | |
1149 | return onenand_writev_ecc(mtd, vecs, count, to, retlen, NULL, NULL); | |
1150 | } | |
1151 | ||
cdc00130 KP |
1152 | /** |
1153 | * onenand_block_checkbad - [GENERIC] Check if a block is marked bad | |
1154 | * @param mtd MTD device structure | |
1155 | * @param ofs offset from device start | |
1156 | * @param getchip 0, if the chip is already selected | |
1157 | * @param allowbbt 1, if its allowed to access the bbt area | |
1158 | * | |
1159 | * Check, if the block is bad. Either by reading the bad block table or | |
1160 | * calling of the scan function. | |
1161 | */ | |
1162 | static int onenand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt) | |
1163 | { | |
1164 | struct onenand_chip *this = mtd->priv; | |
1165 | struct bbm_info *bbm = this->bbm; | |
1166 | ||
1167 | /* Return info from the table */ | |
1168 | return bbm->isbad_bbt(mtd, ofs, allowbbt); | |
1169 | } | |
1170 | ||
cd5f6346 KP |
1171 | /** |
1172 | * onenand_erase - [MTD Interface] erase block(s) | |
1173 | * @param mtd MTD device structure | |
1174 | * @param instr erase instruction | |
1175 | * | |
1176 | * Erase one ore more blocks | |
1177 | */ | |
1178 | static int onenand_erase(struct mtd_info *mtd, struct erase_info *instr) | |
1179 | { | |
1180 | struct onenand_chip *this = mtd->priv; | |
1181 | unsigned int block_size; | |
1182 | loff_t addr; | |
1183 | int len; | |
1184 | int ret = 0; | |
1185 | ||
1186 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len); | |
1187 | ||
1188 | block_size = (1 << this->erase_shift); | |
1189 | ||
1190 | /* Start address must align on block boundary */ | |
1191 | if (unlikely(instr->addr & (block_size - 1))) { | |
1192 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Unaligned address\n"); | |
1193 | return -EINVAL; | |
1194 | } | |
1195 | ||
1196 | /* Length must align on block boundary */ | |
1197 | if (unlikely(instr->len & (block_size - 1))) { | |
1198 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Length not block aligned\n"); | |
1199 | return -EINVAL; | |
1200 | } | |
1201 | ||
1202 | /* Do not allow erase past end of device */ | |
1203 | if (unlikely((instr->len + instr->addr) > mtd->size)) { | |
1204 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Erase past end of device\n"); | |
1205 | return -EINVAL; | |
1206 | } | |
1207 | ||
1208 | instr->fail_addr = 0xffffffff; | |
1209 | ||
1210 | /* Grab the lock and see if the device is available */ | |
1211 | onenand_get_device(mtd, FL_ERASING); | |
1212 | ||
1213 | /* Loop throught the pages */ | |
1214 | len = instr->len; | |
1215 | addr = instr->addr; | |
1216 | ||
1217 | instr->state = MTD_ERASING; | |
1218 | ||
1219 | while (len) { | |
1220 | ||
cdc00130 KP |
1221 | /* Check if we have a bad block, we do not erase bad blocks */ |
1222 | if (onenand_block_checkbad(mtd, addr, 0, 0)) { | |
1223 | printk (KERN_WARNING "onenand_erase: attempt to erase a bad block at addr 0x%08x\n", (unsigned int) addr); | |
1224 | instr->state = MTD_ERASE_FAILED; | |
1225 | goto erase_exit; | |
1226 | } | |
cd5f6346 KP |
1227 | |
1228 | this->command(mtd, ONENAND_CMD_ERASE, addr, block_size); | |
1229 | ||
1230 | ret = this->wait(mtd, FL_ERASING); | |
1231 | /* Check, if it is write protected */ | |
1232 | if (ret) { | |
1233 | if (ret == -EPERM) | |
1234 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Device is write protected!!!\n"); | |
1235 | else | |
1236 | DEBUG(MTD_DEBUG_LEVEL0, "onenand_erase: Failed erase, block %d\n", (unsigned) (addr >> this->erase_shift)); | |
1237 | instr->state = MTD_ERASE_FAILED; | |
1238 | instr->fail_addr = addr; | |
1239 | goto erase_exit; | |
1240 | } | |
1241 | ||
1242 | len -= block_size; | |
1243 | addr += block_size; | |
1244 | } | |
1245 | ||
1246 | instr->state = MTD_ERASE_DONE; | |
1247 | ||
1248 | erase_exit: | |
1249 | ||
1250 | ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; | |
1251 | /* Do call back function */ | |
1252 | if (!ret) | |
1253 | mtd_erase_callback(instr); | |
1254 | ||
1255 | /* Deselect and wake up anyone waiting on the device */ | |
1256 | onenand_release_device(mtd); | |
1257 | ||
1258 | return ret; | |
1259 | } | |
1260 | ||
1261 | /** | |
1262 | * onenand_sync - [MTD Interface] sync | |
1263 | * @param mtd MTD device structure | |
1264 | * | |
1265 | * Sync is actually a wait for chip ready function | |
1266 | */ | |
1267 | static void onenand_sync(struct mtd_info *mtd) | |
1268 | { | |
1269 | DEBUG(MTD_DEBUG_LEVEL3, "onenand_sync: called\n"); | |
1270 | ||
1271 | /* Grab the lock and see if the device is available */ | |
1272 | onenand_get_device(mtd, FL_SYNCING); | |
1273 | ||
1274 | /* Release it and go back */ | |
1275 | onenand_release_device(mtd); | |
1276 | } | |
1277 | ||
cdc00130 | 1278 | |
cd5f6346 KP |
1279 | /** |
1280 | * onenand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad | |
1281 | * @param mtd MTD device structure | |
1282 | * @param ofs offset relative to mtd start | |
cdc00130 KP |
1283 | * |
1284 | * Check whether the block is bad | |
cd5f6346 KP |
1285 | */ |
1286 | static int onenand_block_isbad(struct mtd_info *mtd, loff_t ofs) | |
1287 | { | |
cdc00130 KP |
1288 | /* Check for invalid offset */ |
1289 | if (ofs > mtd->size) | |
1290 | return -EINVAL; | |
1291 | ||
1292 | return onenand_block_checkbad(mtd, ofs, 1, 0); | |
1293 | } | |
1294 | ||
1295 | /** | |
1296 | * onenand_default_block_markbad - [DEFAULT] mark a block bad | |
1297 | * @param mtd MTD device structure | |
1298 | * @param ofs offset from device start | |
1299 | * | |
1300 | * This is the default implementation, which can be overridden by | |
1301 | * a hardware specific driver. | |
1302 | */ | |
1303 | static int onenand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) | |
1304 | { | |
1305 | struct onenand_chip *this = mtd->priv; | |
1306 | struct bbm_info *bbm = this->bbm; | |
1307 | u_char buf[2] = {0, 0}; | |
1308 | size_t retlen; | |
1309 | int block; | |
1310 | ||
1311 | /* Get block number */ | |
1312 | block = ((int) ofs) >> bbm->bbt_erase_shift; | |
1313 | if (bbm->bbt) | |
1314 | bbm->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1); | |
1315 | ||
1316 | /* We write two bytes, so we dont have to mess with 16 bit access */ | |
1317 | ofs += mtd->oobsize + (bbm->badblockpos & ~0x01); | |
1318 | return mtd->write_oob(mtd, ofs , 2, &retlen, buf); | |
cd5f6346 KP |
1319 | } |
1320 | ||
1321 | /** | |
1322 | * onenand_block_markbad - [MTD Interface] Mark the block at the given offset as bad | |
1323 | * @param mtd MTD device structure | |
1324 | * @param ofs offset relative to mtd start | |
cdc00130 KP |
1325 | * |
1326 | * Mark the block as bad | |
cd5f6346 KP |
1327 | */ |
1328 | static int onenand_block_markbad(struct mtd_info *mtd, loff_t ofs) | |
1329 | { | |
cdc00130 KP |
1330 | struct onenand_chip *this = mtd->priv; |
1331 | int ret; | |
1332 | ||
1333 | ret = onenand_block_isbad(mtd, ofs); | |
1334 | if (ret) { | |
1335 | /* If it was bad already, return success and do nothing */ | |
1336 | if (ret > 0) | |
1337 | return 0; | |
1338 | return ret; | |
1339 | } | |
1340 | ||
1341 | return this->block_markbad(mtd, ofs); | |
cd5f6346 KP |
1342 | } |
1343 | ||
1344 | /** | |
1345 | * onenand_unlock - [MTD Interface] Unlock block(s) | |
1346 | * @param mtd MTD device structure | |
1347 | * @param ofs offset relative to mtd start | |
1348 | * @param len number of bytes to unlock | |
1349 | * | |
1350 | * Unlock one or more blocks | |
1351 | */ | |
1352 | static int onenand_unlock(struct mtd_info *mtd, loff_t ofs, size_t len) | |
1353 | { | |
1354 | struct onenand_chip *this = mtd->priv; | |
1355 | int start, end, block, value, status; | |
1356 | ||
1357 | start = ofs >> this->erase_shift; | |
1358 | end = len >> this->erase_shift; | |
1359 | ||
1360 | /* Continuous lock scheme */ | |
1361 | if (this->options & ONENAND_CONT_LOCK) { | |
1362 | /* Set start block address */ | |
1363 | this->write_word(start, this->base + ONENAND_REG_START_BLOCK_ADDRESS); | |
1364 | /* Set end block address */ | |
1365 | this->write_word(end - 1, this->base + ONENAND_REG_END_BLOCK_ADDRESS); | |
1366 | /* Write unlock command */ | |
1367 | this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0); | |
1368 | ||
1369 | /* There's no return value */ | |
1370 | this->wait(mtd, FL_UNLOCKING); | |
1371 | ||
1372 | /* Sanity check */ | |
1373 | while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) | |
1374 | & ONENAND_CTRL_ONGO) | |
1375 | continue; | |
1376 | ||
1377 | /* Check lock status */ | |
1378 | status = this->read_word(this->base + ONENAND_REG_WP_STATUS); | |
1379 | if (!(status & ONENAND_WP_US)) | |
1380 | printk(KERN_ERR "wp status = 0x%x\n", status); | |
1381 | ||
1382 | return 0; | |
1383 | } | |
1384 | ||
1385 | /* Block lock scheme */ | |
1386 | for (block = start; block < end; block++) { | |
20ba89a3 KP |
1387 | /* Set block address */ |
1388 | value = onenand_block_address(this, block); | |
1389 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS1); | |
1390 | /* Select DataRAM for DDP */ | |
1391 | value = onenand_bufferram_address(this, block); | |
1392 | this->write_word(value, this->base + ONENAND_REG_START_ADDRESS2); | |
cd5f6346 KP |
1393 | /* Set start block address */ |
1394 | this->write_word(block, this->base + ONENAND_REG_START_BLOCK_ADDRESS); | |
1395 | /* Write unlock command */ | |
1396 | this->command(mtd, ONENAND_CMD_UNLOCK, 0, 0); | |
1397 | ||
1398 | /* There's no return value */ | |
1399 | this->wait(mtd, FL_UNLOCKING); | |
1400 | ||
1401 | /* Sanity check */ | |
1402 | while (this->read_word(this->base + ONENAND_REG_CTRL_STATUS) | |
1403 | & ONENAND_CTRL_ONGO) | |
1404 | continue; | |
1405 | ||
cd5f6346 KP |
1406 | /* Check lock status */ |
1407 | status = this->read_word(this->base + ONENAND_REG_WP_STATUS); | |
1408 | if (!(status & ONENAND_WP_US)) | |
1409 | printk(KERN_ERR "block = %d, wp status = 0x%x\n", block, status); | |
1410 | } | |
d5c5e78a | 1411 | |
cd5f6346 KP |
1412 | return 0; |
1413 | } | |
1414 | ||
1415 | /** | |
1416 | * onenand_print_device_info - Print device ID | |
1417 | * @param device device ID | |
1418 | * | |
1419 | * Print device ID | |
1420 | */ | |
1421 | static void onenand_print_device_info(int device) | |
1422 | { | |
1423 | int vcc, demuxed, ddp, density; | |
1424 | ||
1425 | vcc = device & ONENAND_DEVICE_VCC_MASK; | |
1426 | demuxed = device & ONENAND_DEVICE_IS_DEMUX; | |
1427 | ddp = device & ONENAND_DEVICE_IS_DDP; | |
1428 | density = device >> ONENAND_DEVICE_DENSITY_SHIFT; | |
1429 | printk(KERN_INFO "%sOneNAND%s %dMB %sV 16-bit (0x%02x)\n", | |
1430 | demuxed ? "" : "Muxed ", | |
1431 | ddp ? "(DDP)" : "", | |
1432 | (16 << density), | |
1433 | vcc ? "2.65/3.3" : "1.8", | |
1434 | device); | |
1435 | } | |
1436 | ||
1437 | static const struct onenand_manufacturers onenand_manuf_ids[] = { | |
1438 | {ONENAND_MFR_SAMSUNG, "Samsung"}, | |
cd5f6346 KP |
1439 | }; |
1440 | ||
1441 | /** | |
1442 | * onenand_check_maf - Check manufacturer ID | |
1443 | * @param manuf manufacturer ID | |
1444 | * | |
1445 | * Check manufacturer ID | |
1446 | */ | |
1447 | static int onenand_check_maf(int manuf) | |
1448 | { | |
37b1cc39 KP |
1449 | int size = ARRAY_SIZE(onenand_manuf_ids); |
1450 | char *name; | |
cd5f6346 KP |
1451 | int i; |
1452 | ||
37b1cc39 | 1453 | for (i = 0; i < size; i++) |
cd5f6346 KP |
1454 | if (manuf == onenand_manuf_ids[i].id) |
1455 | break; | |
cd5f6346 | 1456 | |
37b1cc39 KP |
1457 | if (i < size) |
1458 | name = onenand_manuf_ids[i].name; | |
1459 | else | |
1460 | name = "Unknown"; | |
1461 | ||
1462 | printk(KERN_DEBUG "OneNAND Manufacturer: %s (0x%0x)\n", name, manuf); | |
cd5f6346 | 1463 | |
37b1cc39 | 1464 | return (i == size); |
cd5f6346 KP |
1465 | } |
1466 | ||
1467 | /** | |
1468 | * onenand_probe - [OneNAND Interface] Probe the OneNAND device | |
1469 | * @param mtd MTD device structure | |
1470 | * | |
1471 | * OneNAND detection method: | |
1472 | * Compare the the values from command with ones from register | |
1473 | */ | |
1474 | static int onenand_probe(struct mtd_info *mtd) | |
1475 | { | |
1476 | struct onenand_chip *this = mtd->priv; | |
1477 | int bram_maf_id, bram_dev_id, maf_id, dev_id; | |
1478 | int version_id; | |
1479 | int density; | |
1480 | ||
1481 | /* Send the command for reading device ID from BootRAM */ | |
1482 | this->write_word(ONENAND_CMD_READID, this->base + ONENAND_BOOTRAM); | |
1483 | ||
1484 | /* Read manufacturer and device IDs from BootRAM */ | |
1485 | bram_maf_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x0); | |
1486 | bram_dev_id = this->read_word(this->base + ONENAND_BOOTRAM + 0x2); | |
1487 | ||
1488 | /* Check manufacturer ID */ | |
1489 | if (onenand_check_maf(bram_maf_id)) | |
1490 | return -ENXIO; | |
1491 | ||
1492 | /* Reset OneNAND to read default register values */ | |
1493 | this->write_word(ONENAND_CMD_RESET, this->base + ONENAND_BOOTRAM); | |
1494 | ||
1495 | /* Read manufacturer and device IDs from Register */ | |
1496 | maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); | |
1497 | dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); | |
1498 | ||
1499 | /* Check OneNAND device */ | |
1500 | if (maf_id != bram_maf_id || dev_id != bram_dev_id) | |
1501 | return -ENXIO; | |
1502 | ||
1503 | /* Flash device information */ | |
1504 | onenand_print_device_info(dev_id); | |
1505 | this->device_id = dev_id; | |
1506 | ||
1507 | density = dev_id >> ONENAND_DEVICE_DENSITY_SHIFT; | |
1508 | this->chipsize = (16 << density) << 20; | |
83a36838 KP |
1509 | /* Set density mask. it is used for DDP */ |
1510 | this->density_mask = (1 << (density + 6)); | |
cd5f6346 KP |
1511 | |
1512 | /* OneNAND page size & block size */ | |
1513 | /* The data buffer size is equal to page size */ | |
1514 | mtd->oobblock = this->read_word(this->base + ONENAND_REG_DATA_BUFFER_SIZE); | |
1515 | mtd->oobsize = mtd->oobblock >> 5; | |
1516 | /* Pagers per block is always 64 in OneNAND */ | |
1517 | mtd->erasesize = mtd->oobblock << 6; | |
1518 | ||
1519 | this->erase_shift = ffs(mtd->erasesize) - 1; | |
1520 | this->page_shift = ffs(mtd->oobblock) - 1; | |
1521 | this->ppb_shift = (this->erase_shift - this->page_shift); | |
1522 | this->page_mask = (mtd->erasesize / mtd->oobblock) - 1; | |
1523 | ||
1524 | /* REVIST: Multichip handling */ | |
1525 | ||
1526 | mtd->size = this->chipsize; | |
1527 | ||
1528 | /* Version ID */ | |
1529 | version_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); | |
1530 | printk(KERN_DEBUG "OneNAND version = 0x%04x\n", version_id); | |
1531 | ||
1532 | /* Lock scheme */ | |
1533 | if (density <= ONENAND_DEVICE_DENSITY_512Mb && | |
1534 | !(version_id >> ONENAND_VERSION_PROCESS_SHIFT)) { | |
1535 | printk(KERN_INFO "Lock scheme is Continues Lock\n"); | |
1536 | this->options |= ONENAND_CONT_LOCK; | |
1537 | } | |
d5c5e78a | 1538 | |
cd5f6346 KP |
1539 | return 0; |
1540 | } | |
1541 | ||
a41371eb KP |
1542 | /** |
1543 | * onenand_suspend - [MTD Interface] Suspend the OneNAND flash | |
1544 | * @param mtd MTD device structure | |
1545 | */ | |
1546 | static int onenand_suspend(struct mtd_info *mtd) | |
1547 | { | |
1548 | return onenand_get_device(mtd, FL_PM_SUSPENDED); | |
1549 | } | |
1550 | ||
1551 | /** | |
1552 | * onenand_resume - [MTD Interface] Resume the OneNAND flash | |
1553 | * @param mtd MTD device structure | |
1554 | */ | |
1555 | static void onenand_resume(struct mtd_info *mtd) | |
1556 | { | |
1557 | struct onenand_chip *this = mtd->priv; | |
1558 | ||
1559 | if (this->state == FL_PM_SUSPENDED) | |
1560 | onenand_release_device(mtd); | |
1561 | else | |
1562 | printk(KERN_ERR "resume() called for the chip which is not" | |
1563 | "in suspended state\n"); | |
1564 | } | |
1565 | ||
cd5f6346 KP |
1566 | |
1567 | /** | |
1568 | * onenand_scan - [OneNAND Interface] Scan for the OneNAND device | |
1569 | * @param mtd MTD device structure | |
1570 | * @param maxchips Number of chips to scan for | |
1571 | * | |
1572 | * This fills out all the not initialized function pointers | |
1573 | * with the defaults. | |
1574 | * The flash ID is read and the mtd/chip structures are | |
1575 | * filled with the appropriate values. | |
1576 | */ | |
1577 | int onenand_scan(struct mtd_info *mtd, int maxchips) | |
1578 | { | |
1579 | struct onenand_chip *this = mtd->priv; | |
1580 | ||
1581 | if (!this->read_word) | |
1582 | this->read_word = onenand_readw; | |
1583 | if (!this->write_word) | |
1584 | this->write_word = onenand_writew; | |
1585 | ||
1586 | if (!this->command) | |
1587 | this->command = onenand_command; | |
1588 | if (!this->wait) | |
1589 | this->wait = onenand_wait; | |
1590 | ||
1591 | if (!this->read_bufferram) | |
1592 | this->read_bufferram = onenand_read_bufferram; | |
1593 | if (!this->write_bufferram) | |
1594 | this->write_bufferram = onenand_write_bufferram; | |
1595 | ||
cdc00130 KP |
1596 | if (!this->block_markbad) |
1597 | this->block_markbad = onenand_default_block_markbad; | |
1598 | if (!this->scan_bbt) | |
1599 | this->scan_bbt = onenand_default_bbt; | |
1600 | ||
cd5f6346 KP |
1601 | if (onenand_probe(mtd)) |
1602 | return -ENXIO; | |
1603 | ||
52b0eea7 KP |
1604 | /* Set Sync. Burst Read after probing */ |
1605 | if (this->mmcontrol) { | |
1606 | printk(KERN_INFO "OneNAND Sync. Burst Read support\n"); | |
1607 | this->read_bufferram = onenand_sync_read_bufferram; | |
1608 | } | |
1609 | ||
532a37cf KP |
1610 | /* Allocate buffers, if necessary */ |
1611 | if (!this->page_buf) { | |
1612 | size_t len; | |
1613 | len = mtd->oobblock + mtd->oobsize; | |
1614 | this->page_buf = kmalloc(len, GFP_KERNEL); | |
1615 | if (!this->page_buf) { | |
1616 | printk(KERN_ERR "onenand_scan(): Can't allocate page_buf\n"); | |
1617 | return -ENOMEM; | |
1618 | } | |
1619 | this->options |= ONENAND_PAGEBUF_ALLOC; | |
1620 | } | |
1621 | ||
cd5f6346 KP |
1622 | this->state = FL_READY; |
1623 | init_waitqueue_head(&this->wq); | |
1624 | spin_lock_init(&this->chip_lock); | |
1625 | ||
1626 | switch (mtd->oobsize) { | |
1627 | case 64: | |
1628 | this->autooob = &onenand_oob_64; | |
1629 | break; | |
1630 | ||
1631 | case 32: | |
1632 | this->autooob = &onenand_oob_32; | |
1633 | break; | |
1634 | ||
1635 | default: | |
1636 | printk(KERN_WARNING "No OOB scheme defined for oobsize %d\n", | |
1637 | mtd->oobsize); | |
1638 | /* To prevent kernel oops */ | |
1639 | this->autooob = &onenand_oob_32; | |
1640 | break; | |
1641 | } | |
1642 | ||
1643 | memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo)); | |
d5c5e78a | 1644 | |
cd5f6346 KP |
1645 | /* Fill in remaining MTD driver data */ |
1646 | mtd->type = MTD_NANDFLASH; | |
1647 | mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC; | |
1648 | mtd->ecctype = MTD_ECC_SW; | |
1649 | mtd->erase = onenand_erase; | |
1650 | mtd->point = NULL; | |
1651 | mtd->unpoint = NULL; | |
1652 | mtd->read = onenand_read; | |
1653 | mtd->write = onenand_write; | |
1654 | mtd->read_ecc = onenand_read_ecc; | |
1655 | mtd->write_ecc = onenand_write_ecc; | |
1656 | mtd->read_oob = onenand_read_oob; | |
1657 | mtd->write_oob = onenand_write_oob; | |
1658 | mtd->readv = NULL; | |
1659 | mtd->readv_ecc = NULL; | |
1660 | mtd->writev = onenand_writev; | |
1661 | mtd->writev_ecc = onenand_writev_ecc; | |
1662 | mtd->sync = onenand_sync; | |
1663 | mtd->lock = NULL; | |
1664 | mtd->unlock = onenand_unlock; | |
a41371eb KP |
1665 | mtd->suspend = onenand_suspend; |
1666 | mtd->resume = onenand_resume; | |
cd5f6346 KP |
1667 | mtd->block_isbad = onenand_block_isbad; |
1668 | mtd->block_markbad = onenand_block_markbad; | |
1669 | mtd->owner = THIS_MODULE; | |
1670 | ||
1671 | /* Unlock whole block */ | |
1672 | mtd->unlock(mtd, 0x0, this->chipsize); | |
1673 | ||
cdc00130 | 1674 | return this->scan_bbt(mtd); |
cd5f6346 KP |
1675 | } |
1676 | ||
1677 | /** | |
1678 | * onenand_release - [OneNAND Interface] Free resources held by the OneNAND device | |
1679 | * @param mtd MTD device structure | |
1680 | */ | |
1681 | void onenand_release(struct mtd_info *mtd) | |
1682 | { | |
532a37cf KP |
1683 | struct onenand_chip *this = mtd->priv; |
1684 | ||
cd5f6346 KP |
1685 | #ifdef CONFIG_MTD_PARTITIONS |
1686 | /* Deregister partitions */ | |
1687 | del_mtd_partitions (mtd); | |
1688 | #endif | |
1689 | /* Deregister the device */ | |
1690 | del_mtd_device (mtd); | |
532a37cf KP |
1691 | |
1692 | /* Free bad block table memory, if allocated */ | |
1693 | if (this->bbm) | |
1694 | kfree(this->bbm); | |
1695 | /* Buffer allocated by onenand_scan */ | |
1696 | if (this->options & ONENAND_PAGEBUF_ALLOC) | |
1697 | kfree(this->page_buf); | |
cd5f6346 KP |
1698 | } |
1699 | ||
1700 | EXPORT_SYMBOL_GPL(onenand_scan); | |
1701 | EXPORT_SYMBOL_GPL(onenand_release); | |
1702 | ||
1703 | MODULE_LICENSE("GPL"); | |
1704 | MODULE_AUTHOR("Kyungmin Park <kyungmin.park@samsung.com>"); | |
1705 | MODULE_DESCRIPTION("Generic OneNAND flash driver code"); |