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[MTD] Platform RAM Driver
[net-next-2.6.git] / drivers / mtd / nand / nand_base.c
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1da177e4
LT
1/*
2 * drivers/mtd/nand.c
3 *
4 * Overview:
5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
8 *
9 * Additional technical information is available on
10 * http://www.linux-mtd.infradead.org/tech/nand.html
11 *
12 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
13 * 2002 Thomas Gleixner (tglx@linutronix.de)
14 *
15 * 02-08-2004 tglx: support for strange chips, which cannot auto increment
16 * pages on read / read_oob
17 *
18 * 03-17-2004 tglx: Check ready before auto increment check. Simon Bayes
19 * pointed this out, as he marked an auto increment capable chip
20 * as NOAUTOINCR in the board driver.
21 * Make reads over block boundaries work too
22 *
23 * 04-14-2004 tglx: first working version for 2k page size chips
24 *
25 * 05-19-2004 tglx: Basic support for Renesas AG-AND chips
26 *
27 * 09-24-2004 tglx: add support for hardware controllers (e.g. ECC) shared
28 * among multiple independend devices. Suggestions and initial patch
29 * from Ben Dooks <ben-mtd@fluff.org>
30 *
30f464b7
DM
31 * 12-05-2004 dmarlin: add workaround for Renesas AG-AND chips "disturb" issue.
32 * Basically, any block not rewritten may lose data when surrounding blocks
33 * are rewritten many times. JFFS2 ensures this doesn't happen for blocks
34 * it uses, but the Bad Block Table(s) may not be rewritten. To ensure they
35 * do not lose data, force them to be rewritten when some of the surrounding
36 * blocks are erased. Rather than tracking a specific nearby block (which
37 * could itself go bad), use a page address 'mask' to select several blocks
38 * in the same area, and rewrite the BBT when any of them are erased.
39 *
40 * 01-03-2005 dmarlin: added support for the device recovery command sequence for Renesas
41 * AG-AND chips. If there was a sudden loss of power during an erase operation,
42 * a "device recovery" operation must be performed when power is restored
43 * to ensure correct operation.
44 *
1da177e4
LT
45 * Credits:
46 * David Woodhouse for adding multichip support
47 *
48 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
49 * rework for 2K page size chips
50 *
51 * TODO:
52 * Enable cached programming for 2k page size chips
53 * Check, if mtd->ecctype should be set to MTD_ECC_HW
54 * if we have HW ecc support.
55 * The AG-AND chips have nice features for speed improvement,
56 * which are not supported yet. Read / program 4 pages in one go.
57 *
a4ab4c5d 58 * $Id: nand_base.c,v 1.129 2005/01/23 18:30:50 dmarlin Exp $
1da177e4
LT
59 *
60 * This program is free software; you can redistribute it and/or modify
61 * it under the terms of the GNU General Public License version 2 as
62 * published by the Free Software Foundation.
63 *
64 */
65
66#include <linux/delay.h>
67#include <linux/errno.h>
68#include <linux/sched.h>
69#include <linux/slab.h>
70#include <linux/types.h>
71#include <linux/mtd/mtd.h>
72#include <linux/mtd/nand.h>
73#include <linux/mtd/nand_ecc.h>
74#include <linux/mtd/compatmac.h>
75#include <linux/interrupt.h>
76#include <linux/bitops.h>
77#include <asm/io.h>
78
79#ifdef CONFIG_MTD_PARTITIONS
80#include <linux/mtd/partitions.h>
81#endif
82
83/* Define default oob placement schemes for large and small page devices */
84static struct nand_oobinfo nand_oob_8 = {
85 .useecc = MTD_NANDECC_AUTOPLACE,
86 .eccbytes = 3,
87 .eccpos = {0, 1, 2},
88 .oobfree = { {3, 2}, {6, 2} }
89};
90
91static struct nand_oobinfo nand_oob_16 = {
92 .useecc = MTD_NANDECC_AUTOPLACE,
93 .eccbytes = 6,
94 .eccpos = {0, 1, 2, 3, 6, 7},
95 .oobfree = { {8, 8} }
96};
97
98static struct nand_oobinfo nand_oob_64 = {
99 .useecc = MTD_NANDECC_AUTOPLACE,
100 .eccbytes = 24,
101 .eccpos = {
102 40, 41, 42, 43, 44, 45, 46, 47,
103 48, 49, 50, 51, 52, 53, 54, 55,
104 56, 57, 58, 59, 60, 61, 62, 63},
105 .oobfree = { {2, 38} }
106};
107
108/* This is used for padding purposes in nand_write_oob */
109static u_char ffchars[] = {
110 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
111 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
112 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
113 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
114 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
115 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
116 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
117 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
118};
119
120/*
121 * NAND low-level MTD interface functions
122 */
123static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len);
124static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len);
125static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len);
126
127static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
128static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
129 size_t * retlen, u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
130static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
131static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf);
132static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
133 size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
134static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char *buf);
135static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs,
136 unsigned long count, loff_t to, size_t * retlen);
137static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs,
138 unsigned long count, loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
139static int nand_erase (struct mtd_info *mtd, struct erase_info *instr);
140static void nand_sync (struct mtd_info *mtd);
141
142/* Some internal functions */
143static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page, u_char *oob_buf,
144 struct nand_oobinfo *oobsel, int mode);
145#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
146static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
147 u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode);
148#else
149#define nand_verify_pages(...) (0)
150#endif
151
152static void nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state);
153
154/**
155 * nand_release_device - [GENERIC] release chip
156 * @mtd: MTD device structure
157 *
158 * Deselect, release chip lock and wake up anyone waiting on the device
159 */
160static void nand_release_device (struct mtd_info *mtd)
161{
162 struct nand_chip *this = mtd->priv;
163
164 /* De-select the NAND device */
165 this->select_chip(mtd, -1);
166 /* Do we have a hardware controller ? */
167 if (this->controller) {
168 spin_lock(&this->controller->lock);
169 this->controller->active = NULL;
170 spin_unlock(&this->controller->lock);
171 }
172 /* Release the chip */
173 spin_lock (&this->chip_lock);
174 this->state = FL_READY;
175 wake_up (&this->wq);
176 spin_unlock (&this->chip_lock);
177}
178
179/**
180 * nand_read_byte - [DEFAULT] read one byte from the chip
181 * @mtd: MTD device structure
182 *
183 * Default read function for 8bit buswith
184 */
185static u_char nand_read_byte(struct mtd_info *mtd)
186{
187 struct nand_chip *this = mtd->priv;
188 return readb(this->IO_ADDR_R);
189}
190
191/**
192 * nand_write_byte - [DEFAULT] write one byte to the chip
193 * @mtd: MTD device structure
194 * @byte: pointer to data byte to write
195 *
196 * Default write function for 8it buswith
197 */
198static void nand_write_byte(struct mtd_info *mtd, u_char byte)
199{
200 struct nand_chip *this = mtd->priv;
201 writeb(byte, this->IO_ADDR_W);
202}
203
204/**
205 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
206 * @mtd: MTD device structure
207 *
208 * Default read function for 16bit buswith with
209 * endianess conversion
210 */
211static u_char nand_read_byte16(struct mtd_info *mtd)
212{
213 struct nand_chip *this = mtd->priv;
214 return (u_char) cpu_to_le16(readw(this->IO_ADDR_R));
215}
216
217/**
218 * nand_write_byte16 - [DEFAULT] write one byte endianess aware to the chip
219 * @mtd: MTD device structure
220 * @byte: pointer to data byte to write
221 *
222 * Default write function for 16bit buswith with
223 * endianess conversion
224 */
225static void nand_write_byte16(struct mtd_info *mtd, u_char byte)
226{
227 struct nand_chip *this = mtd->priv;
228 writew(le16_to_cpu((u16) byte), this->IO_ADDR_W);
229}
230
231/**
232 * nand_read_word - [DEFAULT] read one word from the chip
233 * @mtd: MTD device structure
234 *
235 * Default read function for 16bit buswith without
236 * endianess conversion
237 */
238static u16 nand_read_word(struct mtd_info *mtd)
239{
240 struct nand_chip *this = mtd->priv;
241 return readw(this->IO_ADDR_R);
242}
243
244/**
245 * nand_write_word - [DEFAULT] write one word to the chip
246 * @mtd: MTD device structure
247 * @word: data word to write
248 *
249 * Default write function for 16bit buswith without
250 * endianess conversion
251 */
252static void nand_write_word(struct mtd_info *mtd, u16 word)
253{
254 struct nand_chip *this = mtd->priv;
255 writew(word, this->IO_ADDR_W);
256}
257
258/**
259 * nand_select_chip - [DEFAULT] control CE line
260 * @mtd: MTD device structure
261 * @chip: chipnumber to select, -1 for deselect
262 *
263 * Default select function for 1 chip devices.
264 */
265static void nand_select_chip(struct mtd_info *mtd, int chip)
266{
267 struct nand_chip *this = mtd->priv;
268 switch(chip) {
269 case -1:
270 this->hwcontrol(mtd, NAND_CTL_CLRNCE);
271 break;
272 case 0:
273 this->hwcontrol(mtd, NAND_CTL_SETNCE);
274 break;
275
276 default:
277 BUG();
278 }
279}
280
281/**
282 * nand_write_buf - [DEFAULT] write buffer to chip
283 * @mtd: MTD device structure
284 * @buf: data buffer
285 * @len: number of bytes to write
286 *
287 * Default write function for 8bit buswith
288 */
289static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
290{
291 int i;
292 struct nand_chip *this = mtd->priv;
293
294 for (i=0; i<len; i++)
295 writeb(buf[i], this->IO_ADDR_W);
296}
297
298/**
299 * nand_read_buf - [DEFAULT] read chip data into buffer
300 * @mtd: MTD device structure
301 * @buf: buffer to store date
302 * @len: number of bytes to read
303 *
304 * Default read function for 8bit buswith
305 */
306static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
307{
308 int i;
309 struct nand_chip *this = mtd->priv;
310
311 for (i=0; i<len; i++)
312 buf[i] = readb(this->IO_ADDR_R);
313}
314
315/**
316 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
317 * @mtd: MTD device structure
318 * @buf: buffer containing the data to compare
319 * @len: number of bytes to compare
320 *
321 * Default verify function for 8bit buswith
322 */
323static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
324{
325 int i;
326 struct nand_chip *this = mtd->priv;
327
328 for (i=0; i<len; i++)
329 if (buf[i] != readb(this->IO_ADDR_R))
330 return -EFAULT;
331
332 return 0;
333}
334
335/**
336 * nand_write_buf16 - [DEFAULT] write buffer to chip
337 * @mtd: MTD device structure
338 * @buf: data buffer
339 * @len: number of bytes to write
340 *
341 * Default write function for 16bit buswith
342 */
343static void nand_write_buf16(struct mtd_info *mtd, const u_char *buf, int len)
344{
345 int i;
346 struct nand_chip *this = mtd->priv;
347 u16 *p = (u16 *) buf;
348 len >>= 1;
349
350 for (i=0; i<len; i++)
351 writew(p[i], this->IO_ADDR_W);
352
353}
354
355/**
356 * nand_read_buf16 - [DEFAULT] read chip data into buffer
357 * @mtd: MTD device structure
358 * @buf: buffer to store date
359 * @len: number of bytes to read
360 *
361 * Default read function for 16bit buswith
362 */
363static void nand_read_buf16(struct mtd_info *mtd, u_char *buf, int len)
364{
365 int i;
366 struct nand_chip *this = mtd->priv;
367 u16 *p = (u16 *) buf;
368 len >>= 1;
369
370 for (i=0; i<len; i++)
371 p[i] = readw(this->IO_ADDR_R);
372}
373
374/**
375 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
376 * @mtd: MTD device structure
377 * @buf: buffer containing the data to compare
378 * @len: number of bytes to compare
379 *
380 * Default verify function for 16bit buswith
381 */
382static int nand_verify_buf16(struct mtd_info *mtd, const u_char *buf, int len)
383{
384 int i;
385 struct nand_chip *this = mtd->priv;
386 u16 *p = (u16 *) buf;
387 len >>= 1;
388
389 for (i=0; i<len; i++)
390 if (p[i] != readw(this->IO_ADDR_R))
391 return -EFAULT;
392
393 return 0;
394}
395
396/**
397 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
398 * @mtd: MTD device structure
399 * @ofs: offset from device start
400 * @getchip: 0, if the chip is already selected
401 *
402 * Check, if the block is bad.
403 */
404static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
405{
406 int page, chipnr, res = 0;
407 struct nand_chip *this = mtd->priv;
408 u16 bad;
409
410 if (getchip) {
411 page = (int)(ofs >> this->page_shift);
412 chipnr = (int)(ofs >> this->chip_shift);
413
414 /* Grab the lock and see if the device is available */
415 nand_get_device (this, mtd, FL_READING);
416
417 /* Select the NAND device */
418 this->select_chip(mtd, chipnr);
419 } else
420 page = (int) ofs;
421
422 if (this->options & NAND_BUSWIDTH_16) {
423 this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos & 0xFE, page & this->pagemask);
424 bad = cpu_to_le16(this->read_word(mtd));
425 if (this->badblockpos & 0x1)
426 bad >>= 1;
427 if ((bad & 0xFF) != 0xff)
428 res = 1;
429 } else {
430 this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos, page & this->pagemask);
431 if (this->read_byte(mtd) != 0xff)
432 res = 1;
433 }
434
435 if (getchip) {
436 /* Deselect and wake up anyone waiting on the device */
437 nand_release_device(mtd);
438 }
439
440 return res;
441}
442
443/**
444 * nand_default_block_markbad - [DEFAULT] mark a block bad
445 * @mtd: MTD device structure
446 * @ofs: offset from device start
447 *
448 * This is the default implementation, which can be overridden by
449 * a hardware specific driver.
450*/
451static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
452{
453 struct nand_chip *this = mtd->priv;
454 u_char buf[2] = {0, 0};
455 size_t retlen;
456 int block;
457
458 /* Get block number */
459 block = ((int) ofs) >> this->bbt_erase_shift;
460 this->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
461
462 /* Do we have a flash based bad block table ? */
463 if (this->options & NAND_USE_FLASH_BBT)
464 return nand_update_bbt (mtd, ofs);
465
466 /* We write two bytes, so we dont have to mess with 16 bit access */
467 ofs += mtd->oobsize + (this->badblockpos & ~0x01);
468 return nand_write_oob (mtd, ofs , 2, &retlen, buf);
469}
470
471/**
472 * nand_check_wp - [GENERIC] check if the chip is write protected
473 * @mtd: MTD device structure
474 * Check, if the device is write protected
475 *
476 * The function expects, that the device is already selected
477 */
478static int nand_check_wp (struct mtd_info *mtd)
479{
480 struct nand_chip *this = mtd->priv;
481 /* Check the WP bit */
482 this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
a4ab4c5d 483 return (this->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
1da177e4
LT
484}
485
486/**
487 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
488 * @mtd: MTD device structure
489 * @ofs: offset from device start
490 * @getchip: 0, if the chip is already selected
491 * @allowbbt: 1, if its allowed to access the bbt area
492 *
493 * Check, if the block is bad. Either by reading the bad block table or
494 * calling of the scan function.
495 */
496static int nand_block_checkbad (struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
497{
498 struct nand_chip *this = mtd->priv;
499
500 if (!this->bbt)
501 return this->block_bad(mtd, ofs, getchip);
502
503 /* Return info from the table */
504 return nand_isbad_bbt (mtd, ofs, allowbbt);
505}
506
507/**
508 * nand_command - [DEFAULT] Send command to NAND device
509 * @mtd: MTD device structure
510 * @command: the command to be sent
511 * @column: the column address for this command, -1 if none
512 * @page_addr: the page address for this command, -1 if none
513 *
514 * Send command to NAND device. This function is used for small page
515 * devices (256/512 Bytes per page)
516 */
517static void nand_command (struct mtd_info *mtd, unsigned command, int column, int page_addr)
518{
519 register struct nand_chip *this = mtd->priv;
520
521 /* Begin command latch cycle */
522 this->hwcontrol(mtd, NAND_CTL_SETCLE);
523 /*
524 * Write out the command to the device.
525 */
526 if (command == NAND_CMD_SEQIN) {
527 int readcmd;
528
529 if (column >= mtd->oobblock) {
530 /* OOB area */
531 column -= mtd->oobblock;
532 readcmd = NAND_CMD_READOOB;
533 } else if (column < 256) {
534 /* First 256 bytes --> READ0 */
535 readcmd = NAND_CMD_READ0;
536 } else {
537 column -= 256;
538 readcmd = NAND_CMD_READ1;
539 }
540 this->write_byte(mtd, readcmd);
541 }
542 this->write_byte(mtd, command);
543
544 /* Set ALE and clear CLE to start address cycle */
545 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
546
547 if (column != -1 || page_addr != -1) {
548 this->hwcontrol(mtd, NAND_CTL_SETALE);
549
550 /* Serially input address */
551 if (column != -1) {
552 /* Adjust columns for 16 bit buswidth */
553 if (this->options & NAND_BUSWIDTH_16)
554 column >>= 1;
555 this->write_byte(mtd, column);
556 }
557 if (page_addr != -1) {
558 this->write_byte(mtd, (unsigned char) (page_addr & 0xff));
559 this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff));
560 /* One more address cycle for devices > 32MiB */
561 if (this->chipsize > (32 << 20))
562 this->write_byte(mtd, (unsigned char) ((page_addr >> 16) & 0x0f));
563 }
564 /* Latch in address */
565 this->hwcontrol(mtd, NAND_CTL_CLRALE);
566 }
567
568 /*
569 * program and erase have their own busy handlers
570 * status and sequential in needs no delay
571 */
572 switch (command) {
573
574 case NAND_CMD_PAGEPROG:
575 case NAND_CMD_ERASE1:
576 case NAND_CMD_ERASE2:
577 case NAND_CMD_SEQIN:
578 case NAND_CMD_STATUS:
579 return;
580
581 case NAND_CMD_RESET:
582 if (this->dev_ready)
583 break;
584 udelay(this->chip_delay);
585 this->hwcontrol(mtd, NAND_CTL_SETCLE);
586 this->write_byte(mtd, NAND_CMD_STATUS);
587 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
a4ab4c5d 588 while ( !(this->read_byte(mtd) & NAND_STATUS_READY));
1da177e4
LT
589 return;
590
591 /* This applies to read commands */
592 default:
593 /*
594 * If we don't have access to the busy pin, we apply the given
595 * command delay
596 */
597 if (!this->dev_ready) {
598 udelay (this->chip_delay);
599 return;
600 }
601 }
602
603 /* Apply this short delay always to ensure that we do wait tWB in
604 * any case on any machine. */
605 ndelay (100);
606 /* wait until command is processed */
607 while (!this->dev_ready(mtd));
608}
609
610/**
611 * nand_command_lp - [DEFAULT] Send command to NAND large page device
612 * @mtd: MTD device structure
613 * @command: the command to be sent
614 * @column: the column address for this command, -1 if none
615 * @page_addr: the page address for this command, -1 if none
616 *
617 * Send command to NAND device. This is the version for the new large page devices
618 * We dont have the seperate regions as we have in the small page devices.
619 * We must emulate NAND_CMD_READOOB to keep the code compatible.
620 *
621 */
622static void nand_command_lp (struct mtd_info *mtd, unsigned command, int column, int page_addr)
623{
624 register struct nand_chip *this = mtd->priv;
625
626 /* Emulate NAND_CMD_READOOB */
627 if (command == NAND_CMD_READOOB) {
628 column += mtd->oobblock;
629 command = NAND_CMD_READ0;
630 }
631
632
633 /* Begin command latch cycle */
634 this->hwcontrol(mtd, NAND_CTL_SETCLE);
635 /* Write out the command to the device. */
30f464b7 636 this->write_byte(mtd, (command & 0xff));
1da177e4
LT
637 /* End command latch cycle */
638 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
639
640 if (column != -1 || page_addr != -1) {
641 this->hwcontrol(mtd, NAND_CTL_SETALE);
642
643 /* Serially input address */
644 if (column != -1) {
645 /* Adjust columns for 16 bit buswidth */
646 if (this->options & NAND_BUSWIDTH_16)
647 column >>= 1;
648 this->write_byte(mtd, column & 0xff);
649 this->write_byte(mtd, column >> 8);
650 }
651 if (page_addr != -1) {
652 this->write_byte(mtd, (unsigned char) (page_addr & 0xff));
653 this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff));
654 /* One more address cycle for devices > 128MiB */
655 if (this->chipsize > (128 << 20))
656 this->write_byte(mtd, (unsigned char) ((page_addr >> 16) & 0xff));
657 }
658 /* Latch in address */
659 this->hwcontrol(mtd, NAND_CTL_CLRALE);
660 }
661
662 /*
663 * program and erase have their own busy handlers
30f464b7
DM
664 * status, sequential in, and deplete1 need no delay
665 */
1da177e4
LT
666 switch (command) {
667
668 case NAND_CMD_CACHEDPROG:
669 case NAND_CMD_PAGEPROG:
670 case NAND_CMD_ERASE1:
671 case NAND_CMD_ERASE2:
672 case NAND_CMD_SEQIN:
673 case NAND_CMD_STATUS:
30f464b7 674 case NAND_CMD_DEPLETE1:
1da177e4
LT
675 return;
676
30f464b7
DM
677 /*
678 * read error status commands require only a short delay
679 */
680 case NAND_CMD_STATUS_ERROR:
681 case NAND_CMD_STATUS_ERROR0:
682 case NAND_CMD_STATUS_ERROR1:
683 case NAND_CMD_STATUS_ERROR2:
684 case NAND_CMD_STATUS_ERROR3:
685 udelay(this->chip_delay);
686 return;
1da177e4
LT
687
688 case NAND_CMD_RESET:
689 if (this->dev_ready)
690 break;
691 udelay(this->chip_delay);
692 this->hwcontrol(mtd, NAND_CTL_SETCLE);
693 this->write_byte(mtd, NAND_CMD_STATUS);
694 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
a4ab4c5d 695 while ( !(this->read_byte(mtd) & NAND_STATUS_READY));
1da177e4
LT
696 return;
697
698 case NAND_CMD_READ0:
699 /* Begin command latch cycle */
700 this->hwcontrol(mtd, NAND_CTL_SETCLE);
701 /* Write out the start read command */
702 this->write_byte(mtd, NAND_CMD_READSTART);
703 /* End command latch cycle */
704 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
705 /* Fall through into ready check */
706
707 /* This applies to read commands */
708 default:
709 /*
710 * If we don't have access to the busy pin, we apply the given
711 * command delay
712 */
713 if (!this->dev_ready) {
714 udelay (this->chip_delay);
715 return;
716 }
717 }
718
719 /* Apply this short delay always to ensure that we do wait tWB in
720 * any case on any machine. */
721 ndelay (100);
722 /* wait until command is processed */
723 while (!this->dev_ready(mtd));
724}
725
726/**
727 * nand_get_device - [GENERIC] Get chip for selected access
728 * @this: the nand chip descriptor
729 * @mtd: MTD device structure
730 * @new_state: the state which is requested
731 *
732 * Get the device and lock it for exclusive access
733 */
734static void nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state)
735{
736 struct nand_chip *active = this;
737
738 DECLARE_WAITQUEUE (wait, current);
739
740 /*
741 * Grab the lock and see if the device is available
742 */
743retry:
744 /* Hardware controller shared among independend devices */
745 if (this->controller) {
746 spin_lock (&this->controller->lock);
747 if (this->controller->active)
748 active = this->controller->active;
749 else
750 this->controller->active = this;
751 spin_unlock (&this->controller->lock);
752 }
753
754 if (active == this) {
755 spin_lock (&this->chip_lock);
756 if (this->state == FL_READY) {
757 this->state = new_state;
758 spin_unlock (&this->chip_lock);
759 return;
760 }
761 }
762 set_current_state (TASK_UNINTERRUPTIBLE);
763 add_wait_queue (&active->wq, &wait);
764 spin_unlock (&active->chip_lock);
765 schedule ();
766 remove_wait_queue (&active->wq, &wait);
767 goto retry;
768}
769
770/**
771 * nand_wait - [DEFAULT] wait until the command is done
772 * @mtd: MTD device structure
773 * @this: NAND chip structure
774 * @state: state to select the max. timeout value
775 *
776 * Wait for command done. This applies to erase and program only
777 * Erase can take up to 400ms and program up to 20ms according to
778 * general NAND and SmartMedia specs
779 *
780*/
781static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
782{
783
784 unsigned long timeo = jiffies;
785 int status;
786
787 if (state == FL_ERASING)
788 timeo += (HZ * 400) / 1000;
789 else
790 timeo += (HZ * 20) / 1000;
791
792 /* Apply this short delay always to ensure that we do wait tWB in
793 * any case on any machine. */
794 ndelay (100);
795
796 if ((state == FL_ERASING) && (this->options & NAND_IS_AND))
797 this->cmdfunc (mtd, NAND_CMD_STATUS_MULTI, -1, -1);
798 else
799 this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
800
801 while (time_before(jiffies, timeo)) {
802 /* Check, if we were interrupted */
803 if (this->state != state)
804 return 0;
805
806 if (this->dev_ready) {
807 if (this->dev_ready(mtd))
808 break;
809 } else {
810 if (this->read_byte(mtd) & NAND_STATUS_READY)
811 break;
812 }
15266bb7 813 msleep(1);
1da177e4
LT
814 }
815 status = (int) this->read_byte(mtd);
816 return status;
817}
818
819/**
820 * nand_write_page - [GENERIC] write one page
821 * @mtd: MTD device structure
822 * @this: NAND chip structure
823 * @page: startpage inside the chip, must be called with (page & this->pagemask)
824 * @oob_buf: out of band data buffer
825 * @oobsel: out of band selecttion structre
826 * @cached: 1 = enable cached programming if supported by chip
827 *
828 * Nand_page_program function is used for write and writev !
829 * This function will always program a full page of data
830 * If you call it with a non page aligned buffer, you're lost :)
831 *
832 * Cached programming is not supported yet.
833 */
834static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page,
835 u_char *oob_buf, struct nand_oobinfo *oobsel, int cached)
836{
837 int i, status;
838 u_char ecc_code[32];
839 int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
840 int *oob_config = oobsel->eccpos;
841 int datidx = 0, eccidx = 0, eccsteps = this->eccsteps;
842 int eccbytes = 0;
843
844 /* FIXME: Enable cached programming */
845 cached = 0;
846
847 /* Send command to begin auto page programming */
848 this->cmdfunc (mtd, NAND_CMD_SEQIN, 0x00, page);
849
850 /* Write out complete page of data, take care of eccmode */
851 switch (eccmode) {
852 /* No ecc, write all */
853 case NAND_ECC_NONE:
854 printk (KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n");
855 this->write_buf(mtd, this->data_poi, mtd->oobblock);
856 break;
857
858 /* Software ecc 3/256, write all */
859 case NAND_ECC_SOFT:
860 for (; eccsteps; eccsteps--) {
861 this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code);
862 for (i = 0; i < 3; i++, eccidx++)
863 oob_buf[oob_config[eccidx]] = ecc_code[i];
864 datidx += this->eccsize;
865 }
866 this->write_buf(mtd, this->data_poi, mtd->oobblock);
867 break;
868 default:
869 eccbytes = this->eccbytes;
870 for (; eccsteps; eccsteps--) {
871 /* enable hardware ecc logic for write */
872 this->enable_hwecc(mtd, NAND_ECC_WRITE);
873 this->write_buf(mtd, &this->data_poi[datidx], this->eccsize);
874 this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code);
875 for (i = 0; i < eccbytes; i++, eccidx++)
876 oob_buf[oob_config[eccidx]] = ecc_code[i];
877 /* If the hardware ecc provides syndromes then
878 * the ecc code must be written immidiately after
879 * the data bytes (words) */
880 if (this->options & NAND_HWECC_SYNDROME)
881 this->write_buf(mtd, ecc_code, eccbytes);
882 datidx += this->eccsize;
883 }
884 break;
885 }
886
887 /* Write out OOB data */
888 if (this->options & NAND_HWECC_SYNDROME)
889 this->write_buf(mtd, &oob_buf[oobsel->eccbytes], mtd->oobsize - oobsel->eccbytes);
890 else
891 this->write_buf(mtd, oob_buf, mtd->oobsize);
892
893 /* Send command to actually program the data */
894 this->cmdfunc (mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1);
895
896 if (!cached) {
897 /* call wait ready function */
898 status = this->waitfunc (mtd, this, FL_WRITING);
899 /* See if device thinks it succeeded */
a4ab4c5d 900 if (status & NAND_STATUS_FAIL) {
1da177e4
LT
901 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page);
902 return -EIO;
903 }
904 } else {
905 /* FIXME: Implement cached programming ! */
906 /* wait until cache is ready*/
907 // status = this->waitfunc (mtd, this, FL_CACHEDRPG);
908 }
909 return 0;
910}
911
912#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
913/**
914 * nand_verify_pages - [GENERIC] verify the chip contents after a write
915 * @mtd: MTD device structure
916 * @this: NAND chip structure
917 * @page: startpage inside the chip, must be called with (page & this->pagemask)
918 * @numpages: number of pages to verify
919 * @oob_buf: out of band data buffer
920 * @oobsel: out of band selecttion structre
921 * @chipnr: number of the current chip
922 * @oobmode: 1 = full buffer verify, 0 = ecc only
923 *
924 * The NAND device assumes that it is always writing to a cleanly erased page.
925 * Hence, it performs its internal write verification only on bits that
926 * transitioned from 1 to 0. The device does NOT verify the whole page on a
927 * byte by byte basis. It is possible that the page was not completely erased
928 * or the page is becoming unusable due to wear. The read with ECC would catch
929 * the error later when the ECC page check fails, but we would rather catch
930 * it early in the page write stage. Better to write no data than invalid data.
931 */
932static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
933 u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode)
934{
935 int i, j, datidx = 0, oobofs = 0, res = -EIO;
936 int eccsteps = this->eccsteps;
937 int hweccbytes;
938 u_char oobdata[64];
939
940 hweccbytes = (this->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0;
941
942 /* Send command to read back the first page */
943 this->cmdfunc (mtd, NAND_CMD_READ0, 0, page);
944
945 for(;;) {
946 for (j = 0; j < eccsteps; j++) {
947 /* Loop through and verify the data */
948 if (this->verify_buf(mtd, &this->data_poi[datidx], mtd->eccsize)) {
949 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
950 goto out;
951 }
952 datidx += mtd->eccsize;
953 /* Have we a hw generator layout ? */
954 if (!hweccbytes)
955 continue;
956 if (this->verify_buf(mtd, &this->oob_buf[oobofs], hweccbytes)) {
957 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
958 goto out;
959 }
960 oobofs += hweccbytes;
961 }
962
963 /* check, if we must compare all data or if we just have to
964 * compare the ecc bytes
965 */
966 if (oobmode) {
967 if (this->verify_buf(mtd, &oob_buf[oobofs], mtd->oobsize - hweccbytes * eccsteps)) {
968 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
969 goto out;
970 }
971 } else {
972 /* Read always, else autoincrement fails */
973 this->read_buf(mtd, oobdata, mtd->oobsize - hweccbytes * eccsteps);
974
975 if (oobsel->useecc != MTD_NANDECC_OFF && !hweccbytes) {
976 int ecccnt = oobsel->eccbytes;
977
978 for (i = 0; i < ecccnt; i++) {
979 int idx = oobsel->eccpos[i];
980 if (oobdata[idx] != oob_buf[oobofs + idx] ) {
981 DEBUG (MTD_DEBUG_LEVEL0,
982 "%s: Failed ECC write "
983 "verify, page 0x%08x, " "%6i bytes were succesful\n", __FUNCTION__, page, i);
984 goto out;
985 }
986 }
987 }
988 }
989 oobofs += mtd->oobsize - hweccbytes * eccsteps;
990 page++;
991 numpages--;
992
993 /* Apply delay or wait for ready/busy pin
994 * Do this before the AUTOINCR check, so no problems
995 * arise if a chip which does auto increment
996 * is marked as NOAUTOINCR by the board driver.
997 * Do this also before returning, so the chip is
998 * ready for the next command.
999 */
1000 if (!this->dev_ready)
1001 udelay (this->chip_delay);
1002 else
1003 while (!this->dev_ready(mtd));
1004
1005 /* All done, return happy */
1006 if (!numpages)
1007 return 0;
1008
1009
1010 /* Check, if the chip supports auto page increment */
1011 if (!NAND_CANAUTOINCR(this))
1012 this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
1013 }
1014 /*
1015 * Terminate the read command. We come here in case of an error
1016 * So we must issue a reset command.
1017 */
1018out:
1019 this->cmdfunc (mtd, NAND_CMD_RESET, -1, -1);
1020 return res;
1021}
1022#endif
1023
1024/**
1025 * nand_read - [MTD Interface] MTD compability function for nand_read_ecc
1026 * @mtd: MTD device structure
1027 * @from: offset to read from
1028 * @len: number of bytes to read
1029 * @retlen: pointer to variable to store the number of read bytes
1030 * @buf: the databuffer to put data
1031 *
1032 * This function simply calls nand_read_ecc with oob buffer and oobsel = NULL
1033*/
1034static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
1035{
1036 return nand_read_ecc (mtd, from, len, retlen, buf, NULL, NULL);
1037}
1038
1039
1040/**
1041 * nand_read_ecc - [MTD Interface] Read data with ECC
1042 * @mtd: MTD device structure
1043 * @from: offset to read from
1044 * @len: number of bytes to read
1045 * @retlen: pointer to variable to store the number of read bytes
1046 * @buf: the databuffer to put data
1047 * @oob_buf: filesystem supplied oob data buffer
1048 * @oobsel: oob selection structure
1049 *
1050 * NAND read with ECC
1051 */
1052static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1053 size_t * retlen, u_char * buf, u_char * oob_buf, struct nand_oobinfo *oobsel)
1054{
1055 int i, j, col, realpage, page, end, ecc, chipnr, sndcmd = 1;
1056 int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0;
1057 struct nand_chip *this = mtd->priv;
1058 u_char *data_poi, *oob_data = oob_buf;
1059 u_char ecc_calc[32];
1060 u_char ecc_code[32];
1061 int eccmode, eccsteps;
1062 int *oob_config, datidx;
1063 int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
1064 int eccbytes;
1065 int compareecc = 1;
1066 int oobreadlen;
1067
1068
1069 DEBUG (MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
1070
1071 /* Do not allow reads past end of device */
1072 if ((from + len) > mtd->size) {
1073 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n");
1074 *retlen = 0;
1075 return -EINVAL;
1076 }
1077
1078 /* Grab the lock and see if the device is available */
30f464b7 1079 nand_get_device (this, mtd, FL_READING);
1da177e4
LT
1080
1081 /* use userspace supplied oobinfo, if zero */
1082 if (oobsel == NULL)
1083 oobsel = &mtd->oobinfo;
1084
1085 /* Autoplace of oob data ? Use the default placement scheme */
1086 if (oobsel->useecc == MTD_NANDECC_AUTOPLACE)
1087 oobsel = this->autooob;
1088
1089 eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
1090 oob_config = oobsel->eccpos;
1091
1092 /* Select the NAND device */
1093 chipnr = (int)(from >> this->chip_shift);
1094 this->select_chip(mtd, chipnr);
1095
1096 /* First we calculate the starting page */
1097 realpage = (int) (from >> this->page_shift);
1098 page = realpage & this->pagemask;
1099
1100 /* Get raw starting column */
1101 col = from & (mtd->oobblock - 1);
1102
1103 end = mtd->oobblock;
1104 ecc = this->eccsize;
1105 eccbytes = this->eccbytes;
1106
1107 if ((eccmode == NAND_ECC_NONE) || (this->options & NAND_HWECC_SYNDROME))
1108 compareecc = 0;
1109
1110 oobreadlen = mtd->oobsize;
1111 if (this->options & NAND_HWECC_SYNDROME)
1112 oobreadlen -= oobsel->eccbytes;
1113
1114 /* Loop until all data read */
1115 while (read < len) {
1116
1117 int aligned = (!col && (len - read) >= end);
1118 /*
1119 * If the read is not page aligned, we have to read into data buffer
1120 * due to ecc, else we read into return buffer direct
1121 */
1122 if (aligned)
1123 data_poi = &buf[read];
1124 else
1125 data_poi = this->data_buf;
1126
1127 /* Check, if we have this page in the buffer
1128 *
1129 * FIXME: Make it work when we must provide oob data too,
1130 * check the usage of data_buf oob field
1131 */
1132 if (realpage == this->pagebuf && !oob_buf) {
1133 /* aligned read ? */
1134 if (aligned)
1135 memcpy (data_poi, this->data_buf, end);
1136 goto readdata;
1137 }
1138
1139 /* Check, if we must send the read command */
1140 if (sndcmd) {
1141 this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
1142 sndcmd = 0;
1143 }
1144
1145 /* get oob area, if we have no oob buffer from fs-driver */
1146 if (!oob_buf || oobsel->useecc == MTD_NANDECC_AUTOPLACE)
1147 oob_data = &this->data_buf[end];
1148
1149 eccsteps = this->eccsteps;
1150
1151 switch (eccmode) {
1152 case NAND_ECC_NONE: { /* No ECC, Read in a page */
1153 static unsigned long lastwhinge = 0;
1154 if ((lastwhinge / HZ) != (jiffies / HZ)) {
1155 printk (KERN_WARNING "Reading data from NAND FLASH without ECC is not recommended\n");
1156 lastwhinge = jiffies;
1157 }
1158 this->read_buf(mtd, data_poi, end);
1159 break;
1160 }
1161
1162 case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */
1163 this->read_buf(mtd, data_poi, end);
1164 for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=3, datidx += ecc)
1165 this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
1166 break;
1167
1168 default:
1169 for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=eccbytes, datidx += ecc) {
1170 this->enable_hwecc(mtd, NAND_ECC_READ);
1171 this->read_buf(mtd, &data_poi[datidx], ecc);
1172
1173 /* HW ecc with syndrome calculation must read the
1174 * syndrome from flash immidiately after the data */
1175 if (!compareecc) {
1176 /* Some hw ecc generators need to know when the
1177 * syndrome is read from flash */
1178 this->enable_hwecc(mtd, NAND_ECC_READSYN);
1179 this->read_buf(mtd, &oob_data[i], eccbytes);
1180 /* We calc error correction directly, it checks the hw
1181 * generator for an error, reads back the syndrome and
1182 * does the error correction on the fly */
1183 if (this->correct_data(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]) == -1) {
1184 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: "
1185 "Failed ECC read, page 0x%08x on chip %d\n", page, chipnr);
1186 ecc_failed++;
1187 }
1188 } else {
1189 this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
1190 }
1191 }
1192 break;
1193 }
1194
1195 /* read oobdata */
1196 this->read_buf(mtd, &oob_data[mtd->oobsize - oobreadlen], oobreadlen);
1197
1198 /* Skip ECC check, if not requested (ECC_NONE or HW_ECC with syndromes) */
1199 if (!compareecc)
1200 goto readoob;
1201
1202 /* Pick the ECC bytes out of the oob data */
1203 for (j = 0; j < oobsel->eccbytes; j++)
1204 ecc_code[j] = oob_data[oob_config[j]];
1205
1206 /* correct data, if neccecary */
1207 for (i = 0, j = 0, datidx = 0; i < this->eccsteps; i++, datidx += ecc) {
1208 ecc_status = this->correct_data(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]);
1209
1210 /* Get next chunk of ecc bytes */
1211 j += eccbytes;
1212
1213 /* Check, if we have a fs supplied oob-buffer,
1214 * This is the legacy mode. Used by YAFFS1
1215 * Should go away some day
1216 */
1217 if (oob_buf && oobsel->useecc == MTD_NANDECC_PLACE) {
1218 int *p = (int *)(&oob_data[mtd->oobsize]);
1219 p[i] = ecc_status;
1220 }
1221
1222 if (ecc_status == -1) {
1223 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
1224 ecc_failed++;
1225 }
1226 }
1227
1228 readoob:
1229 /* check, if we have a fs supplied oob-buffer */
1230 if (oob_buf) {
1231 /* without autoplace. Legacy mode used by YAFFS1 */
1232 switch(oobsel->useecc) {
1233 case MTD_NANDECC_AUTOPLACE:
1234 /* Walk through the autoplace chunks */
1235 for (i = 0, j = 0; j < mtd->oobavail; i++) {
1236 int from = oobsel->oobfree[i][0];
1237 int num = oobsel->oobfree[i][1];
1238 memcpy(&oob_buf[oob], &oob_data[from], num);
1239 j+= num;
1240 }
1241 oob += mtd->oobavail;
1242 break;
1243 case MTD_NANDECC_PLACE:
1244 /* YAFFS1 legacy mode */
1245 oob_data += this->eccsteps * sizeof (int);
1246 default:
1247 oob_data += mtd->oobsize;
1248 }
1249 }
1250 readdata:
1251 /* Partial page read, transfer data into fs buffer */
1252 if (!aligned) {
1253 for (j = col; j < end && read < len; j++)
1254 buf[read++] = data_poi[j];
1255 this->pagebuf = realpage;
1256 } else
1257 read += mtd->oobblock;
1258
1259 /* Apply delay or wait for ready/busy pin
1260 * Do this before the AUTOINCR check, so no problems
1261 * arise if a chip which does auto increment
1262 * is marked as NOAUTOINCR by the board driver.
1263 */
1264 if (!this->dev_ready)
1265 udelay (this->chip_delay);
1266 else
1267 while (!this->dev_ready(mtd));
1268
1269 if (read == len)
1270 break;
1271
1272 /* For subsequent reads align to page boundary. */
1273 col = 0;
1274 /* Increment page address */
1275 realpage++;
1276
1277 page = realpage & this->pagemask;
1278 /* Check, if we cross a chip boundary */
1279 if (!page) {
1280 chipnr++;
1281 this->select_chip(mtd, -1);
1282 this->select_chip(mtd, chipnr);
1283 }
1284 /* Check, if the chip supports auto page increment
1285 * or if we have hit a block boundary.
1286 */
1287 if (!NAND_CANAUTOINCR(this) || !(page & blockcheck))
1288 sndcmd = 1;
1289 }
1290
1291 /* Deselect and wake up anyone waiting on the device */
1292 nand_release_device(mtd);
1293
1294 /*
1295 * Return success, if no ECC failures, else -EBADMSG
1296 * fs driver will take care of that, because
1297 * retlen == desired len and result == -EBADMSG
1298 */
1299 *retlen = read;
1300 return ecc_failed ? -EBADMSG : 0;
1301}
1302
1303/**
1304 * nand_read_oob - [MTD Interface] NAND read out-of-band
1305 * @mtd: MTD device structure
1306 * @from: offset to read from
1307 * @len: number of bytes to read
1308 * @retlen: pointer to variable to store the number of read bytes
1309 * @buf: the databuffer to put data
1310 *
1311 * NAND read out-of-band data from the spare area
1312 */
1313static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
1314{
1315 int i, col, page, chipnr;
1316 struct nand_chip *this = mtd->priv;
1317 int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
1318
1319 DEBUG (MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
1320
1321 /* Shift to get page */
1322 page = (int)(from >> this->page_shift);
1323 chipnr = (int)(from >> this->chip_shift);
1324
1325 /* Mask to get column */
1326 col = from & (mtd->oobsize - 1);
1327
1328 /* Initialize return length value */
1329 *retlen = 0;
1330
1331 /* Do not allow reads past end of device */
1332 if ((from + len) > mtd->size) {
1333 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n");
1334 *retlen = 0;
1335 return -EINVAL;
1336 }
1337
1338 /* Grab the lock and see if the device is available */
1339 nand_get_device (this, mtd , FL_READING);
1340
1341 /* Select the NAND device */
1342 this->select_chip(mtd, chipnr);
1343
1344 /* Send the read command */
1345 this->cmdfunc (mtd, NAND_CMD_READOOB, col, page & this->pagemask);
1346 /*
1347 * Read the data, if we read more than one page
1348 * oob data, let the device transfer the data !
1349 */
1350 i = 0;
1351 while (i < len) {
1352 int thislen = mtd->oobsize - col;
1353 thislen = min_t(int, thislen, len);
1354 this->read_buf(mtd, &buf[i], thislen);
1355 i += thislen;
1356
1357 /* Apply delay or wait for ready/busy pin
1358 * Do this before the AUTOINCR check, so no problems
1359 * arise if a chip which does auto increment
1360 * is marked as NOAUTOINCR by the board driver.
1361 */
1362 if (!this->dev_ready)
1363 udelay (this->chip_delay);
1364 else
1365 while (!this->dev_ready(mtd));
1366
1367 /* Read more ? */
1368 if (i < len) {
1369 page++;
1370 col = 0;
1371
1372 /* Check, if we cross a chip boundary */
1373 if (!(page & this->pagemask)) {
1374 chipnr++;
1375 this->select_chip(mtd, -1);
1376 this->select_chip(mtd, chipnr);
1377 }
1378
1379 /* Check, if the chip supports auto page increment
1380 * or if we have hit a block boundary.
1381 */
1382 if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) {
1383 /* For subsequent page reads set offset to 0 */
1384 this->cmdfunc (mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask);
1385 }
1386 }
1387 }
1388
1389 /* Deselect and wake up anyone waiting on the device */
1390 nand_release_device(mtd);
1391
1392 /* Return happy */
1393 *retlen = len;
1394 return 0;
1395}
1396
1397/**
1398 * nand_read_raw - [GENERIC] Read raw data including oob into buffer
1399 * @mtd: MTD device structure
1400 * @buf: temporary buffer
1401 * @from: offset to read from
1402 * @len: number of bytes to read
1403 * @ooblen: number of oob data bytes to read
1404 *
1405 * Read raw data including oob into buffer
1406 */
1407int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen)
1408{
1409 struct nand_chip *this = mtd->priv;
1410 int page = (int) (from >> this->page_shift);
1411 int chip = (int) (from >> this->chip_shift);
1412 int sndcmd = 1;
1413 int cnt = 0;
1414 int pagesize = mtd->oobblock + mtd->oobsize;
1415 int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
1416
1417 /* Do not allow reads past end of device */
1418 if ((from + len) > mtd->size) {
1419 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt read beyond end of device\n");
1420 return -EINVAL;
1421 }
1422
1423 /* Grab the lock and see if the device is available */
1424 nand_get_device (this, mtd , FL_READING);
1425
1426 this->select_chip (mtd, chip);
1427
1428 /* Add requested oob length */
1429 len += ooblen;
1430
1431 while (len) {
1432 if (sndcmd)
1433 this->cmdfunc (mtd, NAND_CMD_READ0, 0, page & this->pagemask);
1434 sndcmd = 0;
1435
1436 this->read_buf (mtd, &buf[cnt], pagesize);
1437
1438 len -= pagesize;
1439 cnt += pagesize;
1440 page++;
1441
1442 if (!this->dev_ready)
1443 udelay (this->chip_delay);
1444 else
1445 while (!this->dev_ready(mtd));
1446
1447 /* Check, if the chip supports auto page increment */
1448 if (!NAND_CANAUTOINCR(this) || !(page & blockcheck))
1449 sndcmd = 1;
1450 }
1451
1452 /* Deselect and wake up anyone waiting on the device */
1453 nand_release_device(mtd);
1454 return 0;
1455}
1456
1457
1458/**
1459 * nand_prepare_oobbuf - [GENERIC] Prepare the out of band buffer
1460 * @mtd: MTD device structure
1461 * @fsbuf: buffer given by fs driver
1462 * @oobsel: out of band selection structre
1463 * @autoplace: 1 = place given buffer into the oob bytes
1464 * @numpages: number of pages to prepare
1465 *
1466 * Return:
1467 * 1. Filesystem buffer available and autoplacement is off,
1468 * return filesystem buffer
1469 * 2. No filesystem buffer or autoplace is off, return internal
1470 * buffer
1471 * 3. Filesystem buffer is given and autoplace selected
1472 * put data from fs buffer into internal buffer and
1473 * retrun internal buffer
1474 *
1475 * Note: The internal buffer is filled with 0xff. This must
1476 * be done only once, when no autoplacement happens
1477 * Autoplacement sets the buffer dirty flag, which
1478 * forces the 0xff fill before using the buffer again.
1479 *
1480*/
1481static u_char * nand_prepare_oobbuf (struct mtd_info *mtd, u_char *fsbuf, struct nand_oobinfo *oobsel,
1482 int autoplace, int numpages)
1483{
1484 struct nand_chip *this = mtd->priv;
1485 int i, len, ofs;
1486
1487 /* Zero copy fs supplied buffer */
1488 if (fsbuf && !autoplace)
1489 return fsbuf;
1490
1491 /* Check, if the buffer must be filled with ff again */
1492 if (this->oobdirty) {
1493 memset (this->oob_buf, 0xff,
1494 mtd->oobsize << (this->phys_erase_shift - this->page_shift));
1495 this->oobdirty = 0;
1496 }
1497
1498 /* If we have no autoplacement or no fs buffer use the internal one */
1499 if (!autoplace || !fsbuf)
1500 return this->oob_buf;
1501
1502 /* Walk through the pages and place the data */
1503 this->oobdirty = 1;
1504 ofs = 0;
1505 while (numpages--) {
1506 for (i = 0, len = 0; len < mtd->oobavail; i++) {
1507 int to = ofs + oobsel->oobfree[i][0];
1508 int num = oobsel->oobfree[i][1];
1509 memcpy (&this->oob_buf[to], fsbuf, num);
1510 len += num;
1511 fsbuf += num;
1512 }
1513 ofs += mtd->oobavail;
1514 }
1515 return this->oob_buf;
1516}
1517
1518#define NOTALIGNED(x) (x & (mtd->oobblock-1)) != 0
1519
1520/**
1521 * nand_write - [MTD Interface] compability function for nand_write_ecc
1522 * @mtd: MTD device structure
1523 * @to: offset to write to
1524 * @len: number of bytes to write
1525 * @retlen: pointer to variable to store the number of written bytes
1526 * @buf: the data to write
1527 *
1528 * This function simply calls nand_write_ecc with oob buffer and oobsel = NULL
1529 *
1530*/
1531static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
1532{
1533 return (nand_write_ecc (mtd, to, len, retlen, buf, NULL, NULL));
1534}
1535
1536/**
1537 * nand_write_ecc - [MTD Interface] NAND write with ECC
1538 * @mtd: MTD device structure
1539 * @to: offset to write to
1540 * @len: number of bytes to write
1541 * @retlen: pointer to variable to store the number of written bytes
1542 * @buf: the data to write
1543 * @eccbuf: filesystem supplied oob data buffer
1544 * @oobsel: oob selection structure
1545 *
1546 * NAND write with ECC
1547 */
1548static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
1549 size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel)
1550{
1551 int startpage, page, ret = -EIO, oob = 0, written = 0, chipnr;
1552 int autoplace = 0, numpages, totalpages;
1553 struct nand_chip *this = mtd->priv;
1554 u_char *oobbuf, *bufstart;
1555 int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
1556
1557 DEBUG (MTD_DEBUG_LEVEL3, "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1558
1559 /* Initialize retlen, in case of early exit */
1560 *retlen = 0;
1561
1562 /* Do not allow write past end of device */
1563 if ((to + len) > mtd->size) {
1564 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: Attempt to write past end of page\n");
1565 return -EINVAL;
1566 }
1567
1568 /* reject writes, which are not page aligned */
1569 if (NOTALIGNED (to) || NOTALIGNED(len)) {
1570 printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
1571 return -EINVAL;
1572 }
1573
1574 /* Grab the lock and see if the device is available */
1575 nand_get_device (this, mtd, FL_WRITING);
1576
1577 /* Calculate chipnr */
1578 chipnr = (int)(to >> this->chip_shift);
1579 /* Select the NAND device */
1580 this->select_chip(mtd, chipnr);
1581
1582 /* Check, if it is write protected */
1583 if (nand_check_wp(mtd))
1584 goto out;
1585
1586 /* if oobsel is NULL, use chip defaults */
1587 if (oobsel == NULL)
1588 oobsel = &mtd->oobinfo;
1589
1590 /* Autoplace of oob data ? Use the default placement scheme */
1591 if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
1592 oobsel = this->autooob;
1593 autoplace = 1;
1594 }
1595
1596 /* Setup variables and oob buffer */
1597 totalpages = len >> this->page_shift;
1598 page = (int) (to >> this->page_shift);
1599 /* Invalidate the page cache, if we write to the cached page */
1600 if (page <= this->pagebuf && this->pagebuf < (page + totalpages))
1601 this->pagebuf = -1;
1602
1603 /* Set it relative to chip */
1604 page &= this->pagemask;
1605 startpage = page;
1606 /* Calc number of pages we can write in one go */
1607 numpages = min (ppblock - (startpage & (ppblock - 1)), totalpages);
1608 oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel, autoplace, numpages);
1609 bufstart = (u_char *)buf;
1610
1611 /* Loop until all data is written */
1612 while (written < len) {
1613
1614 this->data_poi = (u_char*) &buf[written];
1615 /* Write one page. If this is the last page to write
1616 * or the last page in this block, then use the
1617 * real pageprogram command, else select cached programming
1618 * if supported by the chip.
1619 */
1620 ret = nand_write_page (mtd, this, page, &oobbuf[oob], oobsel, (--numpages > 0));
1621 if (ret) {
1622 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: write_page failed %d\n", ret);
1623 goto out;
1624 }
1625 /* Next oob page */
1626 oob += mtd->oobsize;
1627 /* Update written bytes count */
1628 written += mtd->oobblock;
1629 if (written == len)
1630 goto cmp;
1631
1632 /* Increment page address */
1633 page++;
1634
1635 /* Have we hit a block boundary ? Then we have to verify and
1636 * if verify is ok, we have to setup the oob buffer for
1637 * the next pages.
1638 */
1639 if (!(page & (ppblock - 1))){
1640 int ofs;
1641 this->data_poi = bufstart;
1642 ret = nand_verify_pages (mtd, this, startpage,
1643 page - startpage,
1644 oobbuf, oobsel, chipnr, (eccbuf != NULL));
1645 if (ret) {
1646 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
1647 goto out;
1648 }
1649 *retlen = written;
1650
1651 ofs = autoplace ? mtd->oobavail : mtd->oobsize;
1652 if (eccbuf)
1653 eccbuf += (page - startpage) * ofs;
1654 totalpages -= page - startpage;
1655 numpages = min (totalpages, ppblock);
1656 page &= this->pagemask;
1657 startpage = page;
1658 oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel,
1659 autoplace, numpages);
1660 /* Check, if we cross a chip boundary */
1661 if (!page) {
1662 chipnr++;
1663 this->select_chip(mtd, -1);
1664 this->select_chip(mtd, chipnr);
1665 }
1666 }
1667 }
1668 /* Verify the remaining pages */
1669cmp:
1670 this->data_poi = bufstart;
1671 ret = nand_verify_pages (mtd, this, startpage, totalpages,
1672 oobbuf, oobsel, chipnr, (eccbuf != NULL));
1673 if (!ret)
1674 *retlen = written;
1675 else
1676 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
1677
1678out:
1679 /* Deselect and wake up anyone waiting on the device */
1680 nand_release_device(mtd);
1681
1682 return ret;
1683}
1684
1685
1686/**
1687 * nand_write_oob - [MTD Interface] NAND write out-of-band
1688 * @mtd: MTD device structure
1689 * @to: offset to write to
1690 * @len: number of bytes to write
1691 * @retlen: pointer to variable to store the number of written bytes
1692 * @buf: the data to write
1693 *
1694 * NAND write out-of-band
1695 */
1696static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
1697{
1698 int column, page, status, ret = -EIO, chipnr;
1699 struct nand_chip *this = mtd->priv;
1700
1701 DEBUG (MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1702
1703 /* Shift to get page */
1704 page = (int) (to >> this->page_shift);
1705 chipnr = (int) (to >> this->chip_shift);
1706
1707 /* Mask to get column */
1708 column = to & (mtd->oobsize - 1);
1709
1710 /* Initialize return length value */
1711 *retlen = 0;
1712
1713 /* Do not allow write past end of page */
1714 if ((column + len) > mtd->oobsize) {
1715 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n");
1716 return -EINVAL;
1717 }
1718
1719 /* Grab the lock and see if the device is available */
1720 nand_get_device (this, mtd, FL_WRITING);
1721
1722 /* Select the NAND device */
1723 this->select_chip(mtd, chipnr);
1724
1725 /* Reset the chip. Some chips (like the Toshiba TC5832DC found
1726 in one of my DiskOnChip 2000 test units) will clear the whole
1727 data page too if we don't do this. I have no clue why, but
1728 I seem to have 'fixed' it in the doc2000 driver in
1729 August 1999. dwmw2. */
1730 this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
1731
1732 /* Check, if it is write protected */
1733 if (nand_check_wp(mtd))
1734 goto out;
1735
1736 /* Invalidate the page cache, if we write to the cached page */
1737 if (page == this->pagebuf)
1738 this->pagebuf = -1;
1739
1740 if (NAND_MUST_PAD(this)) {
1741 /* Write out desired data */
1742 this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock, page & this->pagemask);
1743 /* prepad 0xff for partial programming */
1744 this->write_buf(mtd, ffchars, column);
1745 /* write data */
1746 this->write_buf(mtd, buf, len);
1747 /* postpad 0xff for partial programming */
1748 this->write_buf(mtd, ffchars, mtd->oobsize - (len+column));
1749 } else {
1750 /* Write out desired data */
1751 this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock + column, page & this->pagemask);
1752 /* write data */
1753 this->write_buf(mtd, buf, len);
1754 }
1755 /* Send command to program the OOB data */
1756 this->cmdfunc (mtd, NAND_CMD_PAGEPROG, -1, -1);
1757
1758 status = this->waitfunc (mtd, this, FL_WRITING);
1759
1760 /* See if device thinks it succeeded */
a4ab4c5d 1761 if (status & NAND_STATUS_FAIL) {
1da177e4
LT
1762 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page);
1763 ret = -EIO;
1764 goto out;
1765 }
1766 /* Return happy */
1767 *retlen = len;
1768
1769#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1770 /* Send command to read back the data */
1771 this->cmdfunc (mtd, NAND_CMD_READOOB, column, page & this->pagemask);
1772
1773 if (this->verify_buf(mtd, buf, len)) {
1774 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page);
1775 ret = -EIO;
1776 goto out;
1777 }
1778#endif
1779 ret = 0;
1780out:
1781 /* Deselect and wake up anyone waiting on the device */
1782 nand_release_device(mtd);
1783
1784 return ret;
1785}
1786
1787
1788/**
1789 * nand_writev - [MTD Interface] compabilty function for nand_writev_ecc
1790 * @mtd: MTD device structure
1791 * @vecs: the iovectors to write
1792 * @count: number of vectors
1793 * @to: offset to write to
1794 * @retlen: pointer to variable to store the number of written bytes
1795 *
1796 * NAND write with kvec. This just calls the ecc function
1797 */
1798static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
1799 loff_t to, size_t * retlen)
1800{
1801 return (nand_writev_ecc (mtd, vecs, count, to, retlen, NULL, NULL));
1802}
1803
1804/**
1805 * nand_writev_ecc - [MTD Interface] write with iovec with ecc
1806 * @mtd: MTD device structure
1807 * @vecs: the iovectors to write
1808 * @count: number of vectors
1809 * @to: offset to write to
1810 * @retlen: pointer to variable to store the number of written bytes
1811 * @eccbuf: filesystem supplied oob data buffer
1812 * @oobsel: oob selection structure
1813 *
1814 * NAND write with iovec with ecc
1815 */
1816static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
1817 loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel)
1818{
1819 int i, page, len, total_len, ret = -EIO, written = 0, chipnr;
1820 int oob, numpages, autoplace = 0, startpage;
1821 struct nand_chip *this = mtd->priv;
1822 int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
1823 u_char *oobbuf, *bufstart;
1824
1825 /* Preset written len for early exit */
1826 *retlen = 0;
1827
1828 /* Calculate total length of data */
1829 total_len = 0;
1830 for (i = 0; i < count; i++)
1831 total_len += (int) vecs[i].iov_len;
1832
1833 DEBUG (MTD_DEBUG_LEVEL3,
1834 "nand_writev: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);
1835
1836 /* Do not allow write past end of page */
1837 if ((to + total_len) > mtd->size) {
1838 DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Attempted write past end of device\n");
1839 return -EINVAL;
1840 }
1841
1842 /* reject writes, which are not page aligned */
1843 if (NOTALIGNED (to) || NOTALIGNED(total_len)) {
1844 printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
1845 return -EINVAL;
1846 }
1847
1848 /* Grab the lock and see if the device is available */
1849 nand_get_device (this, mtd, FL_WRITING);
1850
1851 /* Get the current chip-nr */
1852 chipnr = (int) (to >> this->chip_shift);
1853 /* Select the NAND device */
1854 this->select_chip(mtd, chipnr);
1855
1856 /* Check, if it is write protected */
1857 if (nand_check_wp(mtd))
1858 goto out;
1859
1860 /* if oobsel is NULL, use chip defaults */
1861 if (oobsel == NULL)
1862 oobsel = &mtd->oobinfo;
1863
1864 /* Autoplace of oob data ? Use the default placement scheme */
1865 if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
1866 oobsel = this->autooob;
1867 autoplace = 1;
1868 }
1869
1870 /* Setup start page */
1871 page = (int) (to >> this->page_shift);
1872 /* Invalidate the page cache, if we write to the cached page */
1873 if (page <= this->pagebuf && this->pagebuf < ((to + total_len) >> this->page_shift))
1874 this->pagebuf = -1;
1875
1876 startpage = page & this->pagemask;
1877
1878 /* Loop until all kvec' data has been written */
1879 len = 0;
1880 while (count) {
1881 /* If the given tuple is >= pagesize then
1882 * write it out from the iov
1883 */
1884 if ((vecs->iov_len - len) >= mtd->oobblock) {
1885 /* Calc number of pages we can write
1886 * out of this iov in one go */
1887 numpages = (vecs->iov_len - len) >> this->page_shift;
1888 /* Do not cross block boundaries */
1889 numpages = min (ppblock - (startpage & (ppblock - 1)), numpages);
1890 oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages);
1891 bufstart = (u_char *)vecs->iov_base;
1892 bufstart += len;
1893 this->data_poi = bufstart;
1894 oob = 0;
1895 for (i = 1; i <= numpages; i++) {
1896 /* Write one page. If this is the last page to write
1897 * then use the real pageprogram command, else select
1898 * cached programming if supported by the chip.
1899 */
1900 ret = nand_write_page (mtd, this, page & this->pagemask,
1901 &oobbuf[oob], oobsel, i != numpages);
1902 if (ret)
1903 goto out;
1904 this->data_poi += mtd->oobblock;
1905 len += mtd->oobblock;
1906 oob += mtd->oobsize;
1907 page++;
1908 }
1909 /* Check, if we have to switch to the next tuple */
1910 if (len >= (int) vecs->iov_len) {
1911 vecs++;
1912 len = 0;
1913 count--;
1914 }
1915 } else {
1916 /* We must use the internal buffer, read data out of each
1917 * tuple until we have a full page to write
1918 */
1919 int cnt = 0;
1920 while (cnt < mtd->oobblock) {
1921 if (vecs->iov_base != NULL && vecs->iov_len)
1922 this->data_buf[cnt++] = ((u_char *) vecs->iov_base)[len++];
1923 /* Check, if we have to switch to the next tuple */
1924 if (len >= (int) vecs->iov_len) {
1925 vecs++;
1926 len = 0;
1927 count--;
1928 }
1929 }
1930 this->pagebuf = page;
1931 this->data_poi = this->data_buf;
1932 bufstart = this->data_poi;
1933 numpages = 1;
1934 oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages);
1935 ret = nand_write_page (mtd, this, page & this->pagemask,
1936 oobbuf, oobsel, 0);
1937 if (ret)
1938 goto out;
1939 page++;
1940 }
1941
1942 this->data_poi = bufstart;
1943 ret = nand_verify_pages (mtd, this, startpage, numpages, oobbuf, oobsel, chipnr, 0);
1944 if (ret)
1945 goto out;
1946
1947 written += mtd->oobblock * numpages;
1948 /* All done ? */
1949 if (!count)
1950 break;
1951
1952 startpage = page & this->pagemask;
1953 /* Check, if we cross a chip boundary */
1954 if (!startpage) {
1955 chipnr++;
1956 this->select_chip(mtd, -1);
1957 this->select_chip(mtd, chipnr);
1958 }
1959 }
1960 ret = 0;
1961out:
1962 /* Deselect and wake up anyone waiting on the device */
1963 nand_release_device(mtd);
1964
1965 *retlen = written;
1966 return ret;
1967}
1968
1969/**
1970 * single_erease_cmd - [GENERIC] NAND standard block erase command function
1971 * @mtd: MTD device structure
1972 * @page: the page address of the block which will be erased
1973 *
1974 * Standard erase command for NAND chips
1975 */
1976static void single_erase_cmd (struct mtd_info *mtd, int page)
1977{
1978 struct nand_chip *this = mtd->priv;
1979 /* Send commands to erase a block */
1980 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
1981 this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
1982}
1983
1984/**
1985 * multi_erease_cmd - [GENERIC] AND specific block erase command function
1986 * @mtd: MTD device structure
1987 * @page: the page address of the block which will be erased
1988 *
1989 * AND multi block erase command function
1990 * Erase 4 consecutive blocks
1991 */
1992static void multi_erase_cmd (struct mtd_info *mtd, int page)
1993{
1994 struct nand_chip *this = mtd->priv;
1995 /* Send commands to erase a block */
1996 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
1997 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
1998 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
1999 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
2000 this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
2001}
2002
2003/**
2004 * nand_erase - [MTD Interface] erase block(s)
2005 * @mtd: MTD device structure
2006 * @instr: erase instruction
2007 *
2008 * Erase one ore more blocks
2009 */
2010static int nand_erase (struct mtd_info *mtd, struct erase_info *instr)
2011{
2012 return nand_erase_nand (mtd, instr, 0);
2013}
2014
30f464b7 2015#define BBT_PAGE_MASK 0xffffff3f
1da177e4
LT
2016/**
2017 * nand_erase_intern - [NAND Interface] erase block(s)
2018 * @mtd: MTD device structure
2019 * @instr: erase instruction
2020 * @allowbbt: allow erasing the bbt area
2021 *
2022 * Erase one ore more blocks
2023 */
2024int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt)
2025{
2026 int page, len, status, pages_per_block, ret, chipnr;
2027 struct nand_chip *this = mtd->priv;
30f464b7
DM
2028 int rewrite_bbt[NAND_MAX_CHIPS]={0}; /* flags to indicate the page, if bbt needs to be rewritten. */
2029 unsigned int bbt_masked_page; /* bbt mask to compare to page being erased. */
2030 /* It is used to see if the current page is in the same */
2031 /* 256 block group and the same bank as the bbt. */
1da177e4
LT
2032
2033 DEBUG (MTD_DEBUG_LEVEL3,
2034 "nand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
2035
2036 /* Start address must align on block boundary */
2037 if (instr->addr & ((1 << this->phys_erase_shift) - 1)) {
2038 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
2039 return -EINVAL;
2040 }
2041
2042 /* Length must align on block boundary */
2043 if (instr->len & ((1 << this->phys_erase_shift) - 1)) {
2044 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n");
2045 return -EINVAL;
2046 }
2047
2048 /* Do not allow erase past end of device */
2049 if ((instr->len + instr->addr) > mtd->size) {
2050 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n");
2051 return -EINVAL;
2052 }
2053
2054 instr->fail_addr = 0xffffffff;
2055
2056 /* Grab the lock and see if the device is available */
2057 nand_get_device (this, mtd, FL_ERASING);
2058
2059 /* Shift to get first page */
2060 page = (int) (instr->addr >> this->page_shift);
2061 chipnr = (int) (instr->addr >> this->chip_shift);
2062
2063 /* Calculate pages in each block */
2064 pages_per_block = 1 << (this->phys_erase_shift - this->page_shift);
2065
2066 /* Select the NAND device */
2067 this->select_chip(mtd, chipnr);
2068
2069 /* Check the WP bit */
2070 /* Check, if it is write protected */
2071 if (nand_check_wp(mtd)) {
2072 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n");
2073 instr->state = MTD_ERASE_FAILED;
2074 goto erase_exit;
2075 }
2076
30f464b7
DM
2077 /* if BBT requires refresh, set the BBT page mask to see if the BBT should be rewritten */
2078 if (this->options & BBT_AUTO_REFRESH) {
2079 bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
2080 } else {
2081 bbt_masked_page = 0xffffffff; /* should not match anything */
2082 }
2083
1da177e4
LT
2084 /* Loop through the pages */
2085 len = instr->len;
2086
2087 instr->state = MTD_ERASING;
2088
2089 while (len) {
2090 /* Check if we have a bad block, we do not erase bad blocks ! */
2091 if (nand_block_checkbad(mtd, ((loff_t) page) << this->page_shift, 0, allowbbt)) {
2092 printk (KERN_WARNING "nand_erase: attempt to erase a bad block at page 0x%08x\n", page);
2093 instr->state = MTD_ERASE_FAILED;
2094 goto erase_exit;
2095 }
2096
2097 /* Invalidate the page cache, if we erase the block which contains
2098 the current cached page */
2099 if (page <= this->pagebuf && this->pagebuf < (page + pages_per_block))
2100 this->pagebuf = -1;
2101
2102 this->erase_cmd (mtd, page & this->pagemask);
2103
2104 status = this->waitfunc (mtd, this, FL_ERASING);
2105
2106 /* See if block erase succeeded */
a4ab4c5d 2107 if (status & NAND_STATUS_FAIL) {
1da177e4
LT
2108 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page);
2109 instr->state = MTD_ERASE_FAILED;
2110 instr->fail_addr = (page << this->page_shift);
2111 goto erase_exit;
2112 }
30f464b7
DM
2113
2114 /* if BBT requires refresh, set the BBT rewrite flag to the page being erased */
2115 if (this->options & BBT_AUTO_REFRESH) {
2116 if (((page & BBT_PAGE_MASK) == bbt_masked_page) &&
2117 (page != this->bbt_td->pages[chipnr])) {
2118 rewrite_bbt[chipnr] = (page << this->page_shift);
2119 }
2120 }
1da177e4
LT
2121
2122 /* Increment page address and decrement length */
2123 len -= (1 << this->phys_erase_shift);
2124 page += pages_per_block;
2125
2126 /* Check, if we cross a chip boundary */
2127 if (len && !(page & this->pagemask)) {
2128 chipnr++;
2129 this->select_chip(mtd, -1);
2130 this->select_chip(mtd, chipnr);
30f464b7
DM
2131
2132 /* if BBT requires refresh and BBT-PERCHIP,
2133 * set the BBT page mask to see if this BBT should be rewritten */
2134 if ((this->options & BBT_AUTO_REFRESH) && (this->bbt_td->options & NAND_BBT_PERCHIP)) {
2135 bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
2136 }
2137
1da177e4
LT
2138 }
2139 }
2140 instr->state = MTD_ERASE_DONE;
2141
2142erase_exit:
2143
2144 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
2145 /* Do call back function */
2146 if (!ret)
2147 mtd_erase_callback(instr);
2148
2149 /* Deselect and wake up anyone waiting on the device */
2150 nand_release_device(mtd);
2151
30f464b7
DM
2152 /* if BBT requires refresh and erase was successful, rewrite any selected bad block tables */
2153 if ((this->options & BBT_AUTO_REFRESH) && (!ret)) {
2154 for (chipnr = 0; chipnr < this->numchips; chipnr++) {
2155 if (rewrite_bbt[chipnr]) {
2156 /* update the BBT for chip */
2157 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt (%d:0x%0x 0x%0x)\n",
2158 chipnr, rewrite_bbt[chipnr], this->bbt_td->pages[chipnr]);
2159 nand_update_bbt (mtd, rewrite_bbt[chipnr]);
2160 }
2161 }
2162 }
2163
1da177e4
LT
2164 /* Return more or less happy */
2165 return ret;
2166}
2167
2168/**
2169 * nand_sync - [MTD Interface] sync
2170 * @mtd: MTD device structure
2171 *
2172 * Sync is actually a wait for chip ready function
2173 */
2174static void nand_sync (struct mtd_info *mtd)
2175{
2176 struct nand_chip *this = mtd->priv;
2177
2178 DEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n");
2179
2180 /* Grab the lock and see if the device is available */
2181 nand_get_device (this, mtd, FL_SYNCING);
2182 /* Release it and go back */
2183 nand_release_device (mtd);
2184}
2185
2186
2187/**
2188 * nand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
2189 * @mtd: MTD device structure
2190 * @ofs: offset relative to mtd start
2191 */
2192static int nand_block_isbad (struct mtd_info *mtd, loff_t ofs)
2193{
2194 /* Check for invalid offset */
2195 if (ofs > mtd->size)
2196 return -EINVAL;
2197
2198 return nand_block_checkbad (mtd, ofs, 1, 0);
2199}
2200
2201/**
2202 * nand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
2203 * @mtd: MTD device structure
2204 * @ofs: offset relative to mtd start
2205 */
2206static int nand_block_markbad (struct mtd_info *mtd, loff_t ofs)
2207{
2208 struct nand_chip *this = mtd->priv;
2209 int ret;
2210
2211 if ((ret = nand_block_isbad(mtd, ofs))) {
2212 /* If it was bad already, return success and do nothing. */
2213 if (ret > 0)
2214 return 0;
2215 return ret;
2216 }
2217
2218 return this->block_markbad(mtd, ofs);
2219}
2220
2221/**
2222 * nand_scan - [NAND Interface] Scan for the NAND device
2223 * @mtd: MTD device structure
2224 * @maxchips: Number of chips to scan for
2225 *
2226 * This fills out all the not initialized function pointers
2227 * with the defaults.
2228 * The flash ID is read and the mtd/chip structures are
2229 * filled with the appropriate values. Buffers are allocated if
2230 * they are not provided by the board driver
2231 *
2232 */
2233int nand_scan (struct mtd_info *mtd, int maxchips)
2234{
2235 int i, j, nand_maf_id, nand_dev_id, busw;
2236 struct nand_chip *this = mtd->priv;
2237
2238 /* Get buswidth to select the correct functions*/
2239 busw = this->options & NAND_BUSWIDTH_16;
2240
2241 /* check for proper chip_delay setup, set 20us if not */
2242 if (!this->chip_delay)
2243 this->chip_delay = 20;
2244
2245 /* check, if a user supplied command function given */
2246 if (this->cmdfunc == NULL)
2247 this->cmdfunc = nand_command;
2248
2249 /* check, if a user supplied wait function given */
2250 if (this->waitfunc == NULL)
2251 this->waitfunc = nand_wait;
2252
2253 if (!this->select_chip)
2254 this->select_chip = nand_select_chip;
2255 if (!this->write_byte)
2256 this->write_byte = busw ? nand_write_byte16 : nand_write_byte;
2257 if (!this->read_byte)
2258 this->read_byte = busw ? nand_read_byte16 : nand_read_byte;
2259 if (!this->write_word)
2260 this->write_word = nand_write_word;
2261 if (!this->read_word)
2262 this->read_word = nand_read_word;
2263 if (!this->block_bad)
2264 this->block_bad = nand_block_bad;
2265 if (!this->block_markbad)
2266 this->block_markbad = nand_default_block_markbad;
2267 if (!this->write_buf)
2268 this->write_buf = busw ? nand_write_buf16 : nand_write_buf;
2269 if (!this->read_buf)
2270 this->read_buf = busw ? nand_read_buf16 : nand_read_buf;
2271 if (!this->verify_buf)
2272 this->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;
2273 if (!this->scan_bbt)
2274 this->scan_bbt = nand_default_bbt;
2275
2276 /* Select the device */
2277 this->select_chip(mtd, 0);
2278
2279 /* Send the command for reading device ID */
2280 this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
2281
2282 /* Read manufacturer and device IDs */
2283 nand_maf_id = this->read_byte(mtd);
2284 nand_dev_id = this->read_byte(mtd);
2285
2286 /* Print and store flash device information */
2287 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
2288
2289 if (nand_dev_id != nand_flash_ids[i].id)
2290 continue;
2291
2292 if (!mtd->name) mtd->name = nand_flash_ids[i].name;
2293 this->chipsize = nand_flash_ids[i].chipsize << 20;
2294
2295 /* New devices have all the information in additional id bytes */
2296 if (!nand_flash_ids[i].pagesize) {
2297 int extid;
2298 /* The 3rd id byte contains non relevant data ATM */
2299 extid = this->read_byte(mtd);
2300 /* The 4th id byte is the important one */
2301 extid = this->read_byte(mtd);
2302 /* Calc pagesize */
2303 mtd->oobblock = 1024 << (extid & 0x3);
2304 extid >>= 2;
2305 /* Calc oobsize */
2306 mtd->oobsize = (8 << (extid & 0x03)) * (mtd->oobblock / 512);
2307 extid >>= 2;
2308 /* Calc blocksize. Blocksize is multiples of 64KiB */
2309 mtd->erasesize = (64 * 1024) << (extid & 0x03);
2310 extid >>= 2;
2311 /* Get buswidth information */
2312 busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
2313
2314 } else {
2315 /* Old devices have this data hardcoded in the
2316 * device id table */
2317 mtd->erasesize = nand_flash_ids[i].erasesize;
2318 mtd->oobblock = nand_flash_ids[i].pagesize;
2319 mtd->oobsize = mtd->oobblock / 32;
2320 busw = nand_flash_ids[i].options & NAND_BUSWIDTH_16;
2321 }
2322
2323 /* Check, if buswidth is correct. Hardware drivers should set
2324 * this correct ! */
2325 if (busw != (this->options & NAND_BUSWIDTH_16)) {
2326 printk (KERN_INFO "NAND device: Manufacturer ID:"
2327 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
2328 nand_manuf_ids[i].name , mtd->name);
2329 printk (KERN_WARNING
2330 "NAND bus width %d instead %d bit\n",
2331 (this->options & NAND_BUSWIDTH_16) ? 16 : 8,
2332 busw ? 16 : 8);
2333 this->select_chip(mtd, -1);
2334 return 1;
2335 }
2336
2337 /* Calculate the address shift from the page size */
2338 this->page_shift = ffs(mtd->oobblock) - 1;
2339 this->bbt_erase_shift = this->phys_erase_shift = ffs(mtd->erasesize) - 1;
2340 this->chip_shift = ffs(this->chipsize) - 1;
2341
2342 /* Set the bad block position */
2343 this->badblockpos = mtd->oobblock > 512 ?
2344 NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
2345
2346 /* Get chip options, preserve non chip based options */
2347 this->options &= ~NAND_CHIPOPTIONS_MSK;
2348 this->options |= nand_flash_ids[i].options & NAND_CHIPOPTIONS_MSK;
2349 /* Set this as a default. Board drivers can override it, if neccecary */
2350 this->options |= NAND_NO_AUTOINCR;
2351 /* Check if this is a not a samsung device. Do not clear the options
2352 * for chips which are not having an extended id.
2353 */
2354 if (nand_maf_id != NAND_MFR_SAMSUNG && !nand_flash_ids[i].pagesize)
2355 this->options &= ~NAND_SAMSUNG_LP_OPTIONS;
2356
2357 /* Check for AND chips with 4 page planes */
2358 if (this->options & NAND_4PAGE_ARRAY)
2359 this->erase_cmd = multi_erase_cmd;
2360 else
2361 this->erase_cmd = single_erase_cmd;
2362
2363 /* Do not replace user supplied command function ! */
2364 if (mtd->oobblock > 512 && this->cmdfunc == nand_command)
2365 this->cmdfunc = nand_command_lp;
2366
2367 /* Try to identify manufacturer */
2368 for (j = 0; nand_manuf_ids[j].id != 0x0; j++) {
2369 if (nand_manuf_ids[j].id == nand_maf_id)
2370 break;
2371 }
2372 printk (KERN_INFO "NAND device: Manufacturer ID:"
2373 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
2374 nand_manuf_ids[j].name , nand_flash_ids[i].name);
2375 break;
2376 }
2377
2378 if (!nand_flash_ids[i].name) {
2379 printk (KERN_WARNING "No NAND device found!!!\n");
2380 this->select_chip(mtd, -1);
2381 return 1;
2382 }
2383
2384 for (i=1; i < maxchips; i++) {
2385 this->select_chip(mtd, i);
2386
2387 /* Send the command for reading device ID */
2388 this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
2389
2390 /* Read manufacturer and device IDs */
2391 if (nand_maf_id != this->read_byte(mtd) ||
2392 nand_dev_id != this->read_byte(mtd))
2393 break;
2394 }
2395 if (i > 1)
2396 printk(KERN_INFO "%d NAND chips detected\n", i);
2397
2398 /* Allocate buffers, if neccecary */
2399 if (!this->oob_buf) {
2400 size_t len;
2401 len = mtd->oobsize << (this->phys_erase_shift - this->page_shift);
2402 this->oob_buf = kmalloc (len, GFP_KERNEL);
2403 if (!this->oob_buf) {
2404 printk (KERN_ERR "nand_scan(): Cannot allocate oob_buf\n");
2405 return -ENOMEM;
2406 }
2407 this->options |= NAND_OOBBUF_ALLOC;
2408 }
2409
2410 if (!this->data_buf) {
2411 size_t len;
2412 len = mtd->oobblock + mtd->oobsize;
2413 this->data_buf = kmalloc (len, GFP_KERNEL);
2414 if (!this->data_buf) {
2415 if (this->options & NAND_OOBBUF_ALLOC)
2416 kfree (this->oob_buf);
2417 printk (KERN_ERR "nand_scan(): Cannot allocate data_buf\n");
2418 return -ENOMEM;
2419 }
2420 this->options |= NAND_DATABUF_ALLOC;
2421 }
2422
2423 /* Store the number of chips and calc total size for mtd */
2424 this->numchips = i;
2425 mtd->size = i * this->chipsize;
2426 /* Convert chipsize to number of pages per chip -1. */
2427 this->pagemask = (this->chipsize >> this->page_shift) - 1;
2428 /* Preset the internal oob buffer */
2429 memset(this->oob_buf, 0xff, mtd->oobsize << (this->phys_erase_shift - this->page_shift));
2430
2431 /* If no default placement scheme is given, select an
2432 * appropriate one */
2433 if (!this->autooob) {
2434 /* Select the appropriate default oob placement scheme for
2435 * placement agnostic filesystems */
2436 switch (mtd->oobsize) {
2437 case 8:
2438 this->autooob = &nand_oob_8;
2439 break;
2440 case 16:
2441 this->autooob = &nand_oob_16;
2442 break;
2443 case 64:
2444 this->autooob = &nand_oob_64;
2445 break;
2446 default:
2447 printk (KERN_WARNING "No oob scheme defined for oobsize %d\n",
2448 mtd->oobsize);
2449 BUG();
2450 }
2451 }
2452
2453 /* The number of bytes available for the filesystem to place fs dependend
2454 * oob data */
2455 if (this->options & NAND_BUSWIDTH_16) {
2456 mtd->oobavail = mtd->oobsize - (this->autooob->eccbytes + 2);
2457 if (this->autooob->eccbytes & 0x01)
2458 mtd->oobavail--;
2459 } else
2460 mtd->oobavail = mtd->oobsize - (this->autooob->eccbytes + 1);
2461
2462 /*
2463 * check ECC mode, default to software
2464 * if 3byte/512byte hardware ECC is selected and we have 256 byte pagesize
2465 * fallback to software ECC
2466 */
2467 this->eccsize = 256; /* set default eccsize */
2468 this->eccbytes = 3;
2469
2470 switch (this->eccmode) {
2471 case NAND_ECC_HW12_2048:
2472 if (mtd->oobblock < 2048) {
2473 printk(KERN_WARNING "2048 byte HW ECC not possible on %d byte page size, fallback to SW ECC\n",
2474 mtd->oobblock);
2475 this->eccmode = NAND_ECC_SOFT;
2476 this->calculate_ecc = nand_calculate_ecc;
2477 this->correct_data = nand_correct_data;
2478 } else
2479 this->eccsize = 2048;
2480 break;
2481
2482 case NAND_ECC_HW3_512:
2483 case NAND_ECC_HW6_512:
2484 case NAND_ECC_HW8_512:
2485 if (mtd->oobblock == 256) {
2486 printk (KERN_WARNING "512 byte HW ECC not possible on 256 Byte pagesize, fallback to SW ECC \n");
2487 this->eccmode = NAND_ECC_SOFT;
2488 this->calculate_ecc = nand_calculate_ecc;
2489 this->correct_data = nand_correct_data;
2490 } else
2491 this->eccsize = 512; /* set eccsize to 512 */
2492 break;
2493
2494 case NAND_ECC_HW3_256:
2495 break;
2496
2497 case NAND_ECC_NONE:
2498 printk (KERN_WARNING "NAND_ECC_NONE selected by board driver. This is not recommended !!\n");
2499 this->eccmode = NAND_ECC_NONE;
2500 break;
2501
2502 case NAND_ECC_SOFT:
2503 this->calculate_ecc = nand_calculate_ecc;
2504 this->correct_data = nand_correct_data;
2505 break;
2506
2507 default:
2508 printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
2509 BUG();
2510 }
2511
2512 /* Check hardware ecc function availability and adjust number of ecc bytes per
2513 * calculation step
2514 */
2515 switch (this->eccmode) {
2516 case NAND_ECC_HW12_2048:
2517 this->eccbytes += 4;
2518 case NAND_ECC_HW8_512:
2519 this->eccbytes += 2;
2520 case NAND_ECC_HW6_512:
2521 this->eccbytes += 3;
2522 case NAND_ECC_HW3_512:
2523 case NAND_ECC_HW3_256:
2524 if (this->calculate_ecc && this->correct_data && this->enable_hwecc)
2525 break;
2526 printk (KERN_WARNING "No ECC functions supplied, Hardware ECC not possible\n");
2527 BUG();
2528 }
2529
2530 mtd->eccsize = this->eccsize;
2531
2532 /* Set the number of read / write steps for one page to ensure ECC generation */
2533 switch (this->eccmode) {
2534 case NAND_ECC_HW12_2048:
2535 this->eccsteps = mtd->oobblock / 2048;
2536 break;
2537 case NAND_ECC_HW3_512:
2538 case NAND_ECC_HW6_512:
2539 case NAND_ECC_HW8_512:
2540 this->eccsteps = mtd->oobblock / 512;
2541 break;
2542 case NAND_ECC_HW3_256:
2543 case NAND_ECC_SOFT:
2544 this->eccsteps = mtd->oobblock / 256;
2545 break;
2546
2547 case NAND_ECC_NONE:
2548 this->eccsteps = 1;
2549 break;
2550 }
2551
2552 /* Initialize state, waitqueue and spinlock */
2553 this->state = FL_READY;
2554 init_waitqueue_head (&this->wq);
2555 spin_lock_init (&this->chip_lock);
2556
2557 /* De-select the device */
2558 this->select_chip(mtd, -1);
2559
2560 /* Invalidate the pagebuffer reference */
2561 this->pagebuf = -1;
2562
2563 /* Fill in remaining MTD driver data */
2564 mtd->type = MTD_NANDFLASH;
2565 mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
2566 mtd->ecctype = MTD_ECC_SW;
2567 mtd->erase = nand_erase;
2568 mtd->point = NULL;
2569 mtd->unpoint = NULL;
2570 mtd->read = nand_read;
2571 mtd->write = nand_write;
2572 mtd->read_ecc = nand_read_ecc;
2573 mtd->write_ecc = nand_write_ecc;
2574 mtd->read_oob = nand_read_oob;
2575 mtd->write_oob = nand_write_oob;
2576 mtd->readv = NULL;
2577 mtd->writev = nand_writev;
2578 mtd->writev_ecc = nand_writev_ecc;
2579 mtd->sync = nand_sync;
2580 mtd->lock = NULL;
2581 mtd->unlock = NULL;
2582 mtd->suspend = NULL;
2583 mtd->resume = NULL;
2584 mtd->block_isbad = nand_block_isbad;
2585 mtd->block_markbad = nand_block_markbad;
2586
2587 /* and make the autooob the default one */
2588 memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
2589
2590 mtd->owner = THIS_MODULE;
2591
2592 /* Build bad block table */
2593 return this->scan_bbt (mtd);
2594}
2595
2596/**
2597 * nand_release - [NAND Interface] Free resources held by the NAND device
2598 * @mtd: MTD device structure
2599*/
2600void nand_release (struct mtd_info *mtd)
2601{
2602 struct nand_chip *this = mtd->priv;
2603
2604#ifdef CONFIG_MTD_PARTITIONS
2605 /* Deregister partitions */
2606 del_mtd_partitions (mtd);
2607#endif
2608 /* Deregister the device */
2609 del_mtd_device (mtd);
2610
2611 /* Free bad block table memory, if allocated */
2612 if (this->bbt)
2613 kfree (this->bbt);
2614 /* Buffer allocated by nand_scan ? */
2615 if (this->options & NAND_OOBBUF_ALLOC)
2616 kfree (this->oob_buf);
2617 /* Buffer allocated by nand_scan ? */
2618 if (this->options & NAND_DATABUF_ALLOC)
2619 kfree (this->data_buf);
2620}
2621
2622EXPORT_SYMBOL (nand_scan);
2623EXPORT_SYMBOL (nand_release);
2624
2625MODULE_LICENSE ("GPL");
2626MODULE_AUTHOR ("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
2627MODULE_DESCRIPTION ("Generic NAND flash driver code");