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[JFFS2] Use a single config option for write buffer support
[net-next-2.6.git] / drivers / mtd / nand / nand_base.c
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1da177e4
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1/*
2 * drivers/mtd/nand.c
3 *
4 * Overview:
5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
8 *
9 * Additional technical information is available on
10 * http://www.linux-mtd.infradead.org/tech/nand.html
11 *
12 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
13 * 2002 Thomas Gleixner (tglx@linutronix.de)
14 *
15 * 02-08-2004 tglx: support for strange chips, which cannot auto increment
16 * pages on read / read_oob
17 *
18 * 03-17-2004 tglx: Check ready before auto increment check. Simon Bayes
19 * pointed this out, as he marked an auto increment capable chip
20 * as NOAUTOINCR in the board driver.
21 * Make reads over block boundaries work too
22 *
23 * 04-14-2004 tglx: first working version for 2k page size chips
24 *
25 * 05-19-2004 tglx: Basic support for Renesas AG-AND chips
26 *
27 * 09-24-2004 tglx: add support for hardware controllers (e.g. ECC) shared
28 * among multiple independend devices. Suggestions and initial patch
29 * from Ben Dooks <ben-mtd@fluff.org>
30 *
30f464b7
DM
31 * 12-05-2004 dmarlin: add workaround for Renesas AG-AND chips "disturb" issue.
32 * Basically, any block not rewritten may lose data when surrounding blocks
33 * are rewritten many times. JFFS2 ensures this doesn't happen for blocks
34 * it uses, but the Bad Block Table(s) may not be rewritten. To ensure they
35 * do not lose data, force them to be rewritten when some of the surrounding
36 * blocks are erased. Rather than tracking a specific nearby block (which
37 * could itself go bad), use a page address 'mask' to select several blocks
38 * in the same area, and rewrite the BBT when any of them are erased.
39 *
40 * 01-03-2005 dmarlin: added support for the device recovery command sequence for Renesas
41 * AG-AND chips. If there was a sudden loss of power during an erase operation,
42 * a "device recovery" operation must be performed when power is restored
43 * to ensure correct operation.
44 *
068e3c0a
DM
45 * 01-20-2005 dmarlin: added support for optional hardware specific callback routine to
46 * perform extra error status checks on erase and write failures. This required
47 * adding a wrapper function for nand_read_ecc.
48 *
1da177e4
LT
49 * Credits:
50 * David Woodhouse for adding multichip support
51 *
52 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
53 * rework for 2K page size chips
54 *
55 * TODO:
56 * Enable cached programming for 2k page size chips
57 * Check, if mtd->ecctype should be set to MTD_ECC_HW
58 * if we have HW ecc support.
59 * The AG-AND chips have nice features for speed improvement,
60 * which are not supported yet. Read / program 4 pages in one go.
61 *
068e3c0a 62 * $Id: nand_base.c,v 1.130 2005/01/24 03:07:43 dmarlin Exp $
1da177e4
LT
63 *
64 * This program is free software; you can redistribute it and/or modify
65 * it under the terms of the GNU General Public License version 2 as
66 * published by the Free Software Foundation.
67 *
68 */
69
70#include <linux/delay.h>
71#include <linux/errno.h>
72#include <linux/sched.h>
73#include <linux/slab.h>
74#include <linux/types.h>
75#include <linux/mtd/mtd.h>
76#include <linux/mtd/nand.h>
77#include <linux/mtd/nand_ecc.h>
78#include <linux/mtd/compatmac.h>
79#include <linux/interrupt.h>
80#include <linux/bitops.h>
81#include <asm/io.h>
82
83#ifdef CONFIG_MTD_PARTITIONS
84#include <linux/mtd/partitions.h>
85#endif
86
87/* Define default oob placement schemes for large and small page devices */
88static struct nand_oobinfo nand_oob_8 = {
89 .useecc = MTD_NANDECC_AUTOPLACE,
90 .eccbytes = 3,
91 .eccpos = {0, 1, 2},
92 .oobfree = { {3, 2}, {6, 2} }
93};
94
95static struct nand_oobinfo nand_oob_16 = {
96 .useecc = MTD_NANDECC_AUTOPLACE,
97 .eccbytes = 6,
98 .eccpos = {0, 1, 2, 3, 6, 7},
99 .oobfree = { {8, 8} }
100};
101
102static struct nand_oobinfo nand_oob_64 = {
103 .useecc = MTD_NANDECC_AUTOPLACE,
104 .eccbytes = 24,
105 .eccpos = {
106 40, 41, 42, 43, 44, 45, 46, 47,
107 48, 49, 50, 51, 52, 53, 54, 55,
108 56, 57, 58, 59, 60, 61, 62, 63},
109 .oobfree = { {2, 38} }
110};
111
112/* This is used for padding purposes in nand_write_oob */
113static u_char ffchars[] = {
114 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
115 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
116 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
117 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
118 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
119 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
120 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
121 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
122};
123
124/*
125 * NAND low-level MTD interface functions
126 */
127static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len);
128static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len);
129static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len);
130
131static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
132static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
133 size_t * retlen, u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
134static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf);
135static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf);
136static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
137 size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel);
138static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char *buf);
139static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs,
140 unsigned long count, loff_t to, size_t * retlen);
141static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs,
142 unsigned long count, loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel);
143static int nand_erase (struct mtd_info *mtd, struct erase_info *instr);
144static void nand_sync (struct mtd_info *mtd);
145
146/* Some internal functions */
147static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page, u_char *oob_buf,
148 struct nand_oobinfo *oobsel, int mode);
149#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
150static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
151 u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode);
152#else
153#define nand_verify_pages(...) (0)
154#endif
155
156static void nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state);
157
158/**
159 * nand_release_device - [GENERIC] release chip
160 * @mtd: MTD device structure
161 *
162 * Deselect, release chip lock and wake up anyone waiting on the device
163 */
164static void nand_release_device (struct mtd_info *mtd)
165{
166 struct nand_chip *this = mtd->priv;
167
168 /* De-select the NAND device */
169 this->select_chip(mtd, -1);
170 /* Do we have a hardware controller ? */
171 if (this->controller) {
172 spin_lock(&this->controller->lock);
173 this->controller->active = NULL;
174 spin_unlock(&this->controller->lock);
175 }
176 /* Release the chip */
177 spin_lock (&this->chip_lock);
178 this->state = FL_READY;
179 wake_up (&this->wq);
180 spin_unlock (&this->chip_lock);
181}
182
183/**
184 * nand_read_byte - [DEFAULT] read one byte from the chip
185 * @mtd: MTD device structure
186 *
187 * Default read function for 8bit buswith
188 */
189static u_char nand_read_byte(struct mtd_info *mtd)
190{
191 struct nand_chip *this = mtd->priv;
192 return readb(this->IO_ADDR_R);
193}
194
195/**
196 * nand_write_byte - [DEFAULT] write one byte to the chip
197 * @mtd: MTD device structure
198 * @byte: pointer to data byte to write
199 *
200 * Default write function for 8it buswith
201 */
202static void nand_write_byte(struct mtd_info *mtd, u_char byte)
203{
204 struct nand_chip *this = mtd->priv;
205 writeb(byte, this->IO_ADDR_W);
206}
207
208/**
209 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
210 * @mtd: MTD device structure
211 *
212 * Default read function for 16bit buswith with
213 * endianess conversion
214 */
215static u_char nand_read_byte16(struct mtd_info *mtd)
216{
217 struct nand_chip *this = mtd->priv;
218 return (u_char) cpu_to_le16(readw(this->IO_ADDR_R));
219}
220
221/**
222 * nand_write_byte16 - [DEFAULT] write one byte endianess aware to the chip
223 * @mtd: MTD device structure
224 * @byte: pointer to data byte to write
225 *
226 * Default write function for 16bit buswith with
227 * endianess conversion
228 */
229static void nand_write_byte16(struct mtd_info *mtd, u_char byte)
230{
231 struct nand_chip *this = mtd->priv;
232 writew(le16_to_cpu((u16) byte), this->IO_ADDR_W);
233}
234
235/**
236 * nand_read_word - [DEFAULT] read one word from the chip
237 * @mtd: MTD device structure
238 *
239 * Default read function for 16bit buswith without
240 * endianess conversion
241 */
242static u16 nand_read_word(struct mtd_info *mtd)
243{
244 struct nand_chip *this = mtd->priv;
245 return readw(this->IO_ADDR_R);
246}
247
248/**
249 * nand_write_word - [DEFAULT] write one word to the chip
250 * @mtd: MTD device structure
251 * @word: data word to write
252 *
253 * Default write function for 16bit buswith without
254 * endianess conversion
255 */
256static void nand_write_word(struct mtd_info *mtd, u16 word)
257{
258 struct nand_chip *this = mtd->priv;
259 writew(word, this->IO_ADDR_W);
260}
261
262/**
263 * nand_select_chip - [DEFAULT] control CE line
264 * @mtd: MTD device structure
265 * @chip: chipnumber to select, -1 for deselect
266 *
267 * Default select function for 1 chip devices.
268 */
269static void nand_select_chip(struct mtd_info *mtd, int chip)
270{
271 struct nand_chip *this = mtd->priv;
272 switch(chip) {
273 case -1:
274 this->hwcontrol(mtd, NAND_CTL_CLRNCE);
275 break;
276 case 0:
277 this->hwcontrol(mtd, NAND_CTL_SETNCE);
278 break;
279
280 default:
281 BUG();
282 }
283}
284
285/**
286 * nand_write_buf - [DEFAULT] write buffer to chip
287 * @mtd: MTD device structure
288 * @buf: data buffer
289 * @len: number of bytes to write
290 *
291 * Default write function for 8bit buswith
292 */
293static void nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
294{
295 int i;
296 struct nand_chip *this = mtd->priv;
297
298 for (i=0; i<len; i++)
299 writeb(buf[i], this->IO_ADDR_W);
300}
301
302/**
303 * nand_read_buf - [DEFAULT] read chip data into buffer
304 * @mtd: MTD device structure
305 * @buf: buffer to store date
306 * @len: number of bytes to read
307 *
308 * Default read function for 8bit buswith
309 */
310static void nand_read_buf(struct mtd_info *mtd, u_char *buf, int len)
311{
312 int i;
313 struct nand_chip *this = mtd->priv;
314
315 for (i=0; i<len; i++)
316 buf[i] = readb(this->IO_ADDR_R);
317}
318
319/**
320 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
321 * @mtd: MTD device structure
322 * @buf: buffer containing the data to compare
323 * @len: number of bytes to compare
324 *
325 * Default verify function for 8bit buswith
326 */
327static int nand_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
328{
329 int i;
330 struct nand_chip *this = mtd->priv;
331
332 for (i=0; i<len; i++)
333 if (buf[i] != readb(this->IO_ADDR_R))
334 return -EFAULT;
335
336 return 0;
337}
338
339/**
340 * nand_write_buf16 - [DEFAULT] write buffer to chip
341 * @mtd: MTD device structure
342 * @buf: data buffer
343 * @len: number of bytes to write
344 *
345 * Default write function for 16bit buswith
346 */
347static void nand_write_buf16(struct mtd_info *mtd, const u_char *buf, int len)
348{
349 int i;
350 struct nand_chip *this = mtd->priv;
351 u16 *p = (u16 *) buf;
352 len >>= 1;
353
354 for (i=0; i<len; i++)
355 writew(p[i], this->IO_ADDR_W);
356
357}
358
359/**
360 * nand_read_buf16 - [DEFAULT] read chip data into buffer
361 * @mtd: MTD device structure
362 * @buf: buffer to store date
363 * @len: number of bytes to read
364 *
365 * Default read function for 16bit buswith
366 */
367static void nand_read_buf16(struct mtd_info *mtd, u_char *buf, int len)
368{
369 int i;
370 struct nand_chip *this = mtd->priv;
371 u16 *p = (u16 *) buf;
372 len >>= 1;
373
374 for (i=0; i<len; i++)
375 p[i] = readw(this->IO_ADDR_R);
376}
377
378/**
379 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
380 * @mtd: MTD device structure
381 * @buf: buffer containing the data to compare
382 * @len: number of bytes to compare
383 *
384 * Default verify function for 16bit buswith
385 */
386static int nand_verify_buf16(struct mtd_info *mtd, const u_char *buf, int len)
387{
388 int i;
389 struct nand_chip *this = mtd->priv;
390 u16 *p = (u16 *) buf;
391 len >>= 1;
392
393 for (i=0; i<len; i++)
394 if (p[i] != readw(this->IO_ADDR_R))
395 return -EFAULT;
396
397 return 0;
398}
399
400/**
401 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
402 * @mtd: MTD device structure
403 * @ofs: offset from device start
404 * @getchip: 0, if the chip is already selected
405 *
406 * Check, if the block is bad.
407 */
408static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip)
409{
410 int page, chipnr, res = 0;
411 struct nand_chip *this = mtd->priv;
412 u16 bad;
413
414 if (getchip) {
415 page = (int)(ofs >> this->page_shift);
416 chipnr = (int)(ofs >> this->chip_shift);
417
418 /* Grab the lock and see if the device is available */
419 nand_get_device (this, mtd, FL_READING);
420
421 /* Select the NAND device */
422 this->select_chip(mtd, chipnr);
423 } else
424 page = (int) ofs;
425
426 if (this->options & NAND_BUSWIDTH_16) {
427 this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos & 0xFE, page & this->pagemask);
428 bad = cpu_to_le16(this->read_word(mtd));
429 if (this->badblockpos & 0x1)
430 bad >>= 1;
431 if ((bad & 0xFF) != 0xff)
432 res = 1;
433 } else {
434 this->cmdfunc (mtd, NAND_CMD_READOOB, this->badblockpos, page & this->pagemask);
435 if (this->read_byte(mtd) != 0xff)
436 res = 1;
437 }
438
439 if (getchip) {
440 /* Deselect and wake up anyone waiting on the device */
441 nand_release_device(mtd);
442 }
443
444 return res;
445}
446
447/**
448 * nand_default_block_markbad - [DEFAULT] mark a block bad
449 * @mtd: MTD device structure
450 * @ofs: offset from device start
451 *
452 * This is the default implementation, which can be overridden by
453 * a hardware specific driver.
454*/
455static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs)
456{
457 struct nand_chip *this = mtd->priv;
458 u_char buf[2] = {0, 0};
459 size_t retlen;
460 int block;
461
462 /* Get block number */
463 block = ((int) ofs) >> this->bbt_erase_shift;
464 this->bbt[block >> 2] |= 0x01 << ((block & 0x03) << 1);
465
466 /* Do we have a flash based bad block table ? */
467 if (this->options & NAND_USE_FLASH_BBT)
468 return nand_update_bbt (mtd, ofs);
469
470 /* We write two bytes, so we dont have to mess with 16 bit access */
471 ofs += mtd->oobsize + (this->badblockpos & ~0x01);
472 return nand_write_oob (mtd, ofs , 2, &retlen, buf);
473}
474
475/**
476 * nand_check_wp - [GENERIC] check if the chip is write protected
477 * @mtd: MTD device structure
478 * Check, if the device is write protected
479 *
480 * The function expects, that the device is already selected
481 */
482static int nand_check_wp (struct mtd_info *mtd)
483{
484 struct nand_chip *this = mtd->priv;
485 /* Check the WP bit */
486 this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
a4ab4c5d 487 return (this->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1;
1da177e4
LT
488}
489
490/**
491 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
492 * @mtd: MTD device structure
493 * @ofs: offset from device start
494 * @getchip: 0, if the chip is already selected
495 * @allowbbt: 1, if its allowed to access the bbt area
496 *
497 * Check, if the block is bad. Either by reading the bad block table or
498 * calling of the scan function.
499 */
500static int nand_block_checkbad (struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt)
501{
502 struct nand_chip *this = mtd->priv;
503
504 if (!this->bbt)
505 return this->block_bad(mtd, ofs, getchip);
506
507 /* Return info from the table */
508 return nand_isbad_bbt (mtd, ofs, allowbbt);
509}
510
511/**
512 * nand_command - [DEFAULT] Send command to NAND device
513 * @mtd: MTD device structure
514 * @command: the command to be sent
515 * @column: the column address for this command, -1 if none
516 * @page_addr: the page address for this command, -1 if none
517 *
518 * Send command to NAND device. This function is used for small page
519 * devices (256/512 Bytes per page)
520 */
521static void nand_command (struct mtd_info *mtd, unsigned command, int column, int page_addr)
522{
523 register struct nand_chip *this = mtd->priv;
524
525 /* Begin command latch cycle */
526 this->hwcontrol(mtd, NAND_CTL_SETCLE);
527 /*
528 * Write out the command to the device.
529 */
530 if (command == NAND_CMD_SEQIN) {
531 int readcmd;
532
533 if (column >= mtd->oobblock) {
534 /* OOB area */
535 column -= mtd->oobblock;
536 readcmd = NAND_CMD_READOOB;
537 } else if (column < 256) {
538 /* First 256 bytes --> READ0 */
539 readcmd = NAND_CMD_READ0;
540 } else {
541 column -= 256;
542 readcmd = NAND_CMD_READ1;
543 }
544 this->write_byte(mtd, readcmd);
545 }
546 this->write_byte(mtd, command);
547
548 /* Set ALE and clear CLE to start address cycle */
549 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
550
551 if (column != -1 || page_addr != -1) {
552 this->hwcontrol(mtd, NAND_CTL_SETALE);
553
554 /* Serially input address */
555 if (column != -1) {
556 /* Adjust columns for 16 bit buswidth */
557 if (this->options & NAND_BUSWIDTH_16)
558 column >>= 1;
559 this->write_byte(mtd, column);
560 }
561 if (page_addr != -1) {
562 this->write_byte(mtd, (unsigned char) (page_addr & 0xff));
563 this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff));
564 /* One more address cycle for devices > 32MiB */
565 if (this->chipsize > (32 << 20))
566 this->write_byte(mtd, (unsigned char) ((page_addr >> 16) & 0x0f));
567 }
568 /* Latch in address */
569 this->hwcontrol(mtd, NAND_CTL_CLRALE);
570 }
571
572 /*
573 * program and erase have their own busy handlers
574 * status and sequential in needs no delay
575 */
576 switch (command) {
577
578 case NAND_CMD_PAGEPROG:
579 case NAND_CMD_ERASE1:
580 case NAND_CMD_ERASE2:
581 case NAND_CMD_SEQIN:
582 case NAND_CMD_STATUS:
583 return;
584
585 case NAND_CMD_RESET:
586 if (this->dev_ready)
587 break;
588 udelay(this->chip_delay);
589 this->hwcontrol(mtd, NAND_CTL_SETCLE);
590 this->write_byte(mtd, NAND_CMD_STATUS);
591 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
a4ab4c5d 592 while ( !(this->read_byte(mtd) & NAND_STATUS_READY));
1da177e4
LT
593 return;
594
595 /* This applies to read commands */
596 default:
597 /*
598 * If we don't have access to the busy pin, we apply the given
599 * command delay
600 */
601 if (!this->dev_ready) {
602 udelay (this->chip_delay);
603 return;
604 }
605 }
606
607 /* Apply this short delay always to ensure that we do wait tWB in
608 * any case on any machine. */
609 ndelay (100);
610 /* wait until command is processed */
611 while (!this->dev_ready(mtd));
612}
613
614/**
615 * nand_command_lp - [DEFAULT] Send command to NAND large page device
616 * @mtd: MTD device structure
617 * @command: the command to be sent
618 * @column: the column address for this command, -1 if none
619 * @page_addr: the page address for this command, -1 if none
620 *
621 * Send command to NAND device. This is the version for the new large page devices
622 * We dont have the seperate regions as we have in the small page devices.
623 * We must emulate NAND_CMD_READOOB to keep the code compatible.
624 *
625 */
626static void nand_command_lp (struct mtd_info *mtd, unsigned command, int column, int page_addr)
627{
628 register struct nand_chip *this = mtd->priv;
629
630 /* Emulate NAND_CMD_READOOB */
631 if (command == NAND_CMD_READOOB) {
632 column += mtd->oobblock;
633 command = NAND_CMD_READ0;
634 }
635
636
637 /* Begin command latch cycle */
638 this->hwcontrol(mtd, NAND_CTL_SETCLE);
639 /* Write out the command to the device. */
30f464b7 640 this->write_byte(mtd, (command & 0xff));
1da177e4
LT
641 /* End command latch cycle */
642 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
643
644 if (column != -1 || page_addr != -1) {
645 this->hwcontrol(mtd, NAND_CTL_SETALE);
646
647 /* Serially input address */
648 if (column != -1) {
649 /* Adjust columns for 16 bit buswidth */
650 if (this->options & NAND_BUSWIDTH_16)
651 column >>= 1;
652 this->write_byte(mtd, column & 0xff);
653 this->write_byte(mtd, column >> 8);
654 }
655 if (page_addr != -1) {
656 this->write_byte(mtd, (unsigned char) (page_addr & 0xff));
657 this->write_byte(mtd, (unsigned char) ((page_addr >> 8) & 0xff));
658 /* One more address cycle for devices > 128MiB */
659 if (this->chipsize > (128 << 20))
660 this->write_byte(mtd, (unsigned char) ((page_addr >> 16) & 0xff));
661 }
662 /* Latch in address */
663 this->hwcontrol(mtd, NAND_CTL_CLRALE);
664 }
665
666 /*
667 * program and erase have their own busy handlers
30f464b7
DM
668 * status, sequential in, and deplete1 need no delay
669 */
1da177e4
LT
670 switch (command) {
671
672 case NAND_CMD_CACHEDPROG:
673 case NAND_CMD_PAGEPROG:
674 case NAND_CMD_ERASE1:
675 case NAND_CMD_ERASE2:
676 case NAND_CMD_SEQIN:
677 case NAND_CMD_STATUS:
30f464b7 678 case NAND_CMD_DEPLETE1:
1da177e4
LT
679 return;
680
30f464b7
DM
681 /*
682 * read error status commands require only a short delay
683 */
684 case NAND_CMD_STATUS_ERROR:
685 case NAND_CMD_STATUS_ERROR0:
686 case NAND_CMD_STATUS_ERROR1:
687 case NAND_CMD_STATUS_ERROR2:
688 case NAND_CMD_STATUS_ERROR3:
689 udelay(this->chip_delay);
690 return;
1da177e4
LT
691
692 case NAND_CMD_RESET:
693 if (this->dev_ready)
694 break;
695 udelay(this->chip_delay);
696 this->hwcontrol(mtd, NAND_CTL_SETCLE);
697 this->write_byte(mtd, NAND_CMD_STATUS);
698 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
a4ab4c5d 699 while ( !(this->read_byte(mtd) & NAND_STATUS_READY));
1da177e4
LT
700 return;
701
702 case NAND_CMD_READ0:
703 /* Begin command latch cycle */
704 this->hwcontrol(mtd, NAND_CTL_SETCLE);
705 /* Write out the start read command */
706 this->write_byte(mtd, NAND_CMD_READSTART);
707 /* End command latch cycle */
708 this->hwcontrol(mtd, NAND_CTL_CLRCLE);
709 /* Fall through into ready check */
710
711 /* This applies to read commands */
712 default:
713 /*
714 * If we don't have access to the busy pin, we apply the given
715 * command delay
716 */
717 if (!this->dev_ready) {
718 udelay (this->chip_delay);
719 return;
720 }
721 }
722
723 /* Apply this short delay always to ensure that we do wait tWB in
724 * any case on any machine. */
725 ndelay (100);
726 /* wait until command is processed */
727 while (!this->dev_ready(mtd));
728}
729
730/**
731 * nand_get_device - [GENERIC] Get chip for selected access
732 * @this: the nand chip descriptor
733 * @mtd: MTD device structure
734 * @new_state: the state which is requested
735 *
736 * Get the device and lock it for exclusive access
737 */
738static void nand_get_device (struct nand_chip *this, struct mtd_info *mtd, int new_state)
739{
740 struct nand_chip *active = this;
741
742 DECLARE_WAITQUEUE (wait, current);
743
744 /*
745 * Grab the lock and see if the device is available
746 */
747retry:
748 /* Hardware controller shared among independend devices */
749 if (this->controller) {
750 spin_lock (&this->controller->lock);
751 if (this->controller->active)
752 active = this->controller->active;
753 else
754 this->controller->active = this;
755 spin_unlock (&this->controller->lock);
756 }
757
758 if (active == this) {
759 spin_lock (&this->chip_lock);
760 if (this->state == FL_READY) {
761 this->state = new_state;
762 spin_unlock (&this->chip_lock);
763 return;
764 }
765 }
766 set_current_state (TASK_UNINTERRUPTIBLE);
767 add_wait_queue (&active->wq, &wait);
768 spin_unlock (&active->chip_lock);
769 schedule ();
770 remove_wait_queue (&active->wq, &wait);
771 goto retry;
772}
773
774/**
775 * nand_wait - [DEFAULT] wait until the command is done
776 * @mtd: MTD device structure
777 * @this: NAND chip structure
778 * @state: state to select the max. timeout value
779 *
780 * Wait for command done. This applies to erase and program only
781 * Erase can take up to 400ms and program up to 20ms according to
782 * general NAND and SmartMedia specs
783 *
784*/
785static int nand_wait(struct mtd_info *mtd, struct nand_chip *this, int state)
786{
787
788 unsigned long timeo = jiffies;
789 int status;
790
791 if (state == FL_ERASING)
792 timeo += (HZ * 400) / 1000;
793 else
794 timeo += (HZ * 20) / 1000;
795
796 /* Apply this short delay always to ensure that we do wait tWB in
797 * any case on any machine. */
798 ndelay (100);
799
800 if ((state == FL_ERASING) && (this->options & NAND_IS_AND))
801 this->cmdfunc (mtd, NAND_CMD_STATUS_MULTI, -1, -1);
802 else
803 this->cmdfunc (mtd, NAND_CMD_STATUS, -1, -1);
804
805 while (time_before(jiffies, timeo)) {
806 /* Check, if we were interrupted */
807 if (this->state != state)
808 return 0;
809
810 if (this->dev_ready) {
811 if (this->dev_ready(mtd))
812 break;
813 } else {
814 if (this->read_byte(mtd) & NAND_STATUS_READY)
815 break;
816 }
15266bb7 817 msleep(1);
1da177e4
LT
818 }
819 status = (int) this->read_byte(mtd);
820 return status;
821}
822
823/**
824 * nand_write_page - [GENERIC] write one page
825 * @mtd: MTD device structure
826 * @this: NAND chip structure
827 * @page: startpage inside the chip, must be called with (page & this->pagemask)
828 * @oob_buf: out of band data buffer
829 * @oobsel: out of band selecttion structre
830 * @cached: 1 = enable cached programming if supported by chip
831 *
832 * Nand_page_program function is used for write and writev !
833 * This function will always program a full page of data
834 * If you call it with a non page aligned buffer, you're lost :)
835 *
836 * Cached programming is not supported yet.
837 */
838static int nand_write_page (struct mtd_info *mtd, struct nand_chip *this, int page,
839 u_char *oob_buf, struct nand_oobinfo *oobsel, int cached)
840{
841 int i, status;
842 u_char ecc_code[32];
843 int eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
844 int *oob_config = oobsel->eccpos;
845 int datidx = 0, eccidx = 0, eccsteps = this->eccsteps;
846 int eccbytes = 0;
847
848 /* FIXME: Enable cached programming */
849 cached = 0;
850
851 /* Send command to begin auto page programming */
852 this->cmdfunc (mtd, NAND_CMD_SEQIN, 0x00, page);
853
854 /* Write out complete page of data, take care of eccmode */
855 switch (eccmode) {
856 /* No ecc, write all */
857 case NAND_ECC_NONE:
858 printk (KERN_WARNING "Writing data without ECC to NAND-FLASH is not recommended\n");
859 this->write_buf(mtd, this->data_poi, mtd->oobblock);
860 break;
861
862 /* Software ecc 3/256, write all */
863 case NAND_ECC_SOFT:
864 for (; eccsteps; eccsteps--) {
865 this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code);
866 for (i = 0; i < 3; i++, eccidx++)
867 oob_buf[oob_config[eccidx]] = ecc_code[i];
868 datidx += this->eccsize;
869 }
870 this->write_buf(mtd, this->data_poi, mtd->oobblock);
871 break;
872 default:
873 eccbytes = this->eccbytes;
874 for (; eccsteps; eccsteps--) {
875 /* enable hardware ecc logic for write */
876 this->enable_hwecc(mtd, NAND_ECC_WRITE);
877 this->write_buf(mtd, &this->data_poi[datidx], this->eccsize);
878 this->calculate_ecc(mtd, &this->data_poi[datidx], ecc_code);
879 for (i = 0; i < eccbytes; i++, eccidx++)
880 oob_buf[oob_config[eccidx]] = ecc_code[i];
881 /* If the hardware ecc provides syndromes then
882 * the ecc code must be written immidiately after
883 * the data bytes (words) */
884 if (this->options & NAND_HWECC_SYNDROME)
885 this->write_buf(mtd, ecc_code, eccbytes);
886 datidx += this->eccsize;
887 }
888 break;
889 }
890
891 /* Write out OOB data */
892 if (this->options & NAND_HWECC_SYNDROME)
893 this->write_buf(mtd, &oob_buf[oobsel->eccbytes], mtd->oobsize - oobsel->eccbytes);
894 else
895 this->write_buf(mtd, oob_buf, mtd->oobsize);
896
897 /* Send command to actually program the data */
898 this->cmdfunc (mtd, cached ? NAND_CMD_CACHEDPROG : NAND_CMD_PAGEPROG, -1, -1);
899
900 if (!cached) {
901 /* call wait ready function */
902 status = this->waitfunc (mtd, this, FL_WRITING);
068e3c0a
DM
903
904 /* See if operation failed and additional status checks are available */
905 if ((status & NAND_STATUS_FAIL) && (this->errstat)) {
906 status = this->errstat(mtd, this, FL_WRITING, status, page);
907 }
908
1da177e4 909 /* See if device thinks it succeeded */
a4ab4c5d 910 if (status & NAND_STATUS_FAIL) {
1da177e4
LT
911 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write, page 0x%08x, ", __FUNCTION__, page);
912 return -EIO;
913 }
914 } else {
915 /* FIXME: Implement cached programming ! */
916 /* wait until cache is ready*/
917 // status = this->waitfunc (mtd, this, FL_CACHEDRPG);
918 }
919 return 0;
920}
921
922#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
923/**
924 * nand_verify_pages - [GENERIC] verify the chip contents after a write
925 * @mtd: MTD device structure
926 * @this: NAND chip structure
927 * @page: startpage inside the chip, must be called with (page & this->pagemask)
928 * @numpages: number of pages to verify
929 * @oob_buf: out of band data buffer
930 * @oobsel: out of band selecttion structre
931 * @chipnr: number of the current chip
932 * @oobmode: 1 = full buffer verify, 0 = ecc only
933 *
934 * The NAND device assumes that it is always writing to a cleanly erased page.
935 * Hence, it performs its internal write verification only on bits that
936 * transitioned from 1 to 0. The device does NOT verify the whole page on a
937 * byte by byte basis. It is possible that the page was not completely erased
938 * or the page is becoming unusable due to wear. The read with ECC would catch
939 * the error later when the ECC page check fails, but we would rather catch
940 * it early in the page write stage. Better to write no data than invalid data.
941 */
942static int nand_verify_pages (struct mtd_info *mtd, struct nand_chip *this, int page, int numpages,
943 u_char *oob_buf, struct nand_oobinfo *oobsel, int chipnr, int oobmode)
944{
945 int i, j, datidx = 0, oobofs = 0, res = -EIO;
946 int eccsteps = this->eccsteps;
947 int hweccbytes;
948 u_char oobdata[64];
949
950 hweccbytes = (this->options & NAND_HWECC_SYNDROME) ? (oobsel->eccbytes / eccsteps) : 0;
951
952 /* Send command to read back the first page */
953 this->cmdfunc (mtd, NAND_CMD_READ0, 0, page);
954
955 for(;;) {
956 for (j = 0; j < eccsteps; j++) {
957 /* Loop through and verify the data */
958 if (this->verify_buf(mtd, &this->data_poi[datidx], mtd->eccsize)) {
959 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
960 goto out;
961 }
962 datidx += mtd->eccsize;
963 /* Have we a hw generator layout ? */
964 if (!hweccbytes)
965 continue;
966 if (this->verify_buf(mtd, &this->oob_buf[oobofs], hweccbytes)) {
967 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
968 goto out;
969 }
970 oobofs += hweccbytes;
971 }
972
973 /* check, if we must compare all data or if we just have to
974 * compare the ecc bytes
975 */
976 if (oobmode) {
977 if (this->verify_buf(mtd, &oob_buf[oobofs], mtd->oobsize - hweccbytes * eccsteps)) {
978 DEBUG (MTD_DEBUG_LEVEL0, "%s: " "Failed write verify, page 0x%08x ", __FUNCTION__, page);
979 goto out;
980 }
981 } else {
982 /* Read always, else autoincrement fails */
983 this->read_buf(mtd, oobdata, mtd->oobsize - hweccbytes * eccsteps);
984
985 if (oobsel->useecc != MTD_NANDECC_OFF && !hweccbytes) {
986 int ecccnt = oobsel->eccbytes;
987
988 for (i = 0; i < ecccnt; i++) {
989 int idx = oobsel->eccpos[i];
990 if (oobdata[idx] != oob_buf[oobofs + idx] ) {
991 DEBUG (MTD_DEBUG_LEVEL0,
992 "%s: Failed ECC write "
993 "verify, page 0x%08x, " "%6i bytes were succesful\n", __FUNCTION__, page, i);
994 goto out;
995 }
996 }
997 }
998 }
999 oobofs += mtd->oobsize - hweccbytes * eccsteps;
1000 page++;
1001 numpages--;
1002
1003 /* Apply delay or wait for ready/busy pin
1004 * Do this before the AUTOINCR check, so no problems
1005 * arise if a chip which does auto increment
1006 * is marked as NOAUTOINCR by the board driver.
1007 * Do this also before returning, so the chip is
1008 * ready for the next command.
1009 */
1010 if (!this->dev_ready)
1011 udelay (this->chip_delay);
1012 else
1013 while (!this->dev_ready(mtd));
1014
1015 /* All done, return happy */
1016 if (!numpages)
1017 return 0;
1018
1019
1020 /* Check, if the chip supports auto page increment */
1021 if (!NAND_CANAUTOINCR(this))
1022 this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
1023 }
1024 /*
1025 * Terminate the read command. We come here in case of an error
1026 * So we must issue a reset command.
1027 */
1028out:
1029 this->cmdfunc (mtd, NAND_CMD_RESET, -1, -1);
1030 return res;
1031}
1032#endif
1033
1034/**
068e3c0a 1035 * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
1da177e4
LT
1036 * @mtd: MTD device structure
1037 * @from: offset to read from
1038 * @len: number of bytes to read
1039 * @retlen: pointer to variable to store the number of read bytes
1040 * @buf: the databuffer to put data
1041 *
068e3c0a
DM
1042 * This function simply calls nand_do_read_ecc with oob buffer and oobsel = NULL
1043 * and flags = 0xff
1044 */
1da177e4
LT
1045static int nand_read (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
1046{
068e3c0a 1047 return nand_do_read_ecc (mtd, from, len, retlen, buf, NULL, NULL, 0xff);
1da177e4
LT
1048}
1049
1050
1051/**
068e3c0a 1052 * nand_read_ecc - [MTD Interface] MTD compability function for nand_do_read_ecc
1da177e4
LT
1053 * @mtd: MTD device structure
1054 * @from: offset to read from
1055 * @len: number of bytes to read
1056 * @retlen: pointer to variable to store the number of read bytes
1057 * @buf: the databuffer to put data
1058 * @oob_buf: filesystem supplied oob data buffer
1059 * @oobsel: oob selection structure
1060 *
068e3c0a 1061 * This function simply calls nand_do_read_ecc with flags = 0xff
1da177e4
LT
1062 */
1063static int nand_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1064 size_t * retlen, u_char * buf, u_char * oob_buf, struct nand_oobinfo *oobsel)
068e3c0a
DM
1065{
1066 return nand_do_read_ecc(mtd, from, len, retlen, buf, oob_buf, oobsel, 0xff);
1067}
1068
1069
1070/**
1071 * nand_do_read_ecc - [MTD Interface] Read data with ECC
1072 * @mtd: MTD device structure
1073 * @from: offset to read from
1074 * @len: number of bytes to read
1075 * @retlen: pointer to variable to store the number of read bytes
1076 * @buf: the databuffer to put data
1077 * @oob_buf: filesystem supplied oob data buffer
1078 * @oobsel: oob selection structure
1079 * @flags: flag to indicate if nand_get_device/nand_release_device should be preformed
1080 * and how many corrected error bits are acceptable:
1081 * bits 0..7 - number of tolerable errors
1082 * bit 8 - 0 == do not get/release chip, 1 == get/release chip
1083 *
1084 * NAND read with ECC
1085 */
1086int nand_do_read_ecc (struct mtd_info *mtd, loff_t from, size_t len,
1087 size_t * retlen, u_char * buf, u_char * oob_buf,
1088 struct nand_oobinfo *oobsel, int flags)
1da177e4
LT
1089{
1090 int i, j, col, realpage, page, end, ecc, chipnr, sndcmd = 1;
1091 int read = 0, oob = 0, ecc_status = 0, ecc_failed = 0;
1092 struct nand_chip *this = mtd->priv;
1093 u_char *data_poi, *oob_data = oob_buf;
1094 u_char ecc_calc[32];
1095 u_char ecc_code[32];
1096 int eccmode, eccsteps;
1097 int *oob_config, datidx;
1098 int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
1099 int eccbytes;
1100 int compareecc = 1;
1101 int oobreadlen;
1102
1103
1104 DEBUG (MTD_DEBUG_LEVEL3, "nand_read_ecc: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
1105
1106 /* Do not allow reads past end of device */
1107 if ((from + len) > mtd->size) {
1108 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: Attempt read beyond end of device\n");
1109 *retlen = 0;
1110 return -EINVAL;
1111 }
1112
1113 /* Grab the lock and see if the device is available */
068e3c0a
DM
1114 if (flags & NAND_GET_DEVICE)
1115 nand_get_device (this, mtd, FL_READING);
1da177e4
LT
1116
1117 /* use userspace supplied oobinfo, if zero */
1118 if (oobsel == NULL)
1119 oobsel = &mtd->oobinfo;
1120
1121 /* Autoplace of oob data ? Use the default placement scheme */
1122 if (oobsel->useecc == MTD_NANDECC_AUTOPLACE)
1123 oobsel = this->autooob;
1124
1125 eccmode = oobsel->useecc ? this->eccmode : NAND_ECC_NONE;
1126 oob_config = oobsel->eccpos;
1127
1128 /* Select the NAND device */
1129 chipnr = (int)(from >> this->chip_shift);
1130 this->select_chip(mtd, chipnr);
1131
1132 /* First we calculate the starting page */
1133 realpage = (int) (from >> this->page_shift);
1134 page = realpage & this->pagemask;
1135
1136 /* Get raw starting column */
1137 col = from & (mtd->oobblock - 1);
1138
1139 end = mtd->oobblock;
1140 ecc = this->eccsize;
1141 eccbytes = this->eccbytes;
1142
1143 if ((eccmode == NAND_ECC_NONE) || (this->options & NAND_HWECC_SYNDROME))
1144 compareecc = 0;
1145
1146 oobreadlen = mtd->oobsize;
1147 if (this->options & NAND_HWECC_SYNDROME)
1148 oobreadlen -= oobsel->eccbytes;
1149
1150 /* Loop until all data read */
1151 while (read < len) {
1152
1153 int aligned = (!col && (len - read) >= end);
1154 /*
1155 * If the read is not page aligned, we have to read into data buffer
1156 * due to ecc, else we read into return buffer direct
1157 */
1158 if (aligned)
1159 data_poi = &buf[read];
1160 else
1161 data_poi = this->data_buf;
1162
1163 /* Check, if we have this page in the buffer
1164 *
1165 * FIXME: Make it work when we must provide oob data too,
1166 * check the usage of data_buf oob field
1167 */
1168 if (realpage == this->pagebuf && !oob_buf) {
1169 /* aligned read ? */
1170 if (aligned)
1171 memcpy (data_poi, this->data_buf, end);
1172 goto readdata;
1173 }
1174
1175 /* Check, if we must send the read command */
1176 if (sndcmd) {
1177 this->cmdfunc (mtd, NAND_CMD_READ0, 0x00, page);
1178 sndcmd = 0;
1179 }
1180
1181 /* get oob area, if we have no oob buffer from fs-driver */
1182 if (!oob_buf || oobsel->useecc == MTD_NANDECC_AUTOPLACE)
1183 oob_data = &this->data_buf[end];
1184
1185 eccsteps = this->eccsteps;
1186
1187 switch (eccmode) {
1188 case NAND_ECC_NONE: { /* No ECC, Read in a page */
1189 static unsigned long lastwhinge = 0;
1190 if ((lastwhinge / HZ) != (jiffies / HZ)) {
1191 printk (KERN_WARNING "Reading data from NAND FLASH without ECC is not recommended\n");
1192 lastwhinge = jiffies;
1193 }
1194 this->read_buf(mtd, data_poi, end);
1195 break;
1196 }
1197
1198 case NAND_ECC_SOFT: /* Software ECC 3/256: Read in a page + oob data */
1199 this->read_buf(mtd, data_poi, end);
1200 for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=3, datidx += ecc)
1201 this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
1202 break;
1203
1204 default:
1205 for (i = 0, datidx = 0; eccsteps; eccsteps--, i+=eccbytes, datidx += ecc) {
1206 this->enable_hwecc(mtd, NAND_ECC_READ);
1207 this->read_buf(mtd, &data_poi[datidx], ecc);
1208
1209 /* HW ecc with syndrome calculation must read the
1210 * syndrome from flash immidiately after the data */
1211 if (!compareecc) {
1212 /* Some hw ecc generators need to know when the
1213 * syndrome is read from flash */
1214 this->enable_hwecc(mtd, NAND_ECC_READSYN);
1215 this->read_buf(mtd, &oob_data[i], eccbytes);
1216 /* We calc error correction directly, it checks the hw
1217 * generator for an error, reads back the syndrome and
1218 * does the error correction on the fly */
068e3c0a
DM
1219 ecc_status = this->correct_data(mtd, &data_poi[datidx], &oob_data[i], &ecc_code[i]);
1220 if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
1da177e4
LT
1221 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: "
1222 "Failed ECC read, page 0x%08x on chip %d\n", page, chipnr);
1223 ecc_failed++;
1224 }
1225 } else {
1226 this->calculate_ecc(mtd, &data_poi[datidx], &ecc_calc[i]);
1227 }
1228 }
1229 break;
1230 }
1231
1232 /* read oobdata */
1233 this->read_buf(mtd, &oob_data[mtd->oobsize - oobreadlen], oobreadlen);
1234
1235 /* Skip ECC check, if not requested (ECC_NONE or HW_ECC with syndromes) */
1236 if (!compareecc)
1237 goto readoob;
1238
1239 /* Pick the ECC bytes out of the oob data */
1240 for (j = 0; j < oobsel->eccbytes; j++)
1241 ecc_code[j] = oob_data[oob_config[j]];
1242
1243 /* correct data, if neccecary */
1244 for (i = 0, j = 0, datidx = 0; i < this->eccsteps; i++, datidx += ecc) {
1245 ecc_status = this->correct_data(mtd, &data_poi[datidx], &ecc_code[j], &ecc_calc[j]);
1246
1247 /* Get next chunk of ecc bytes */
1248 j += eccbytes;
1249
1250 /* Check, if we have a fs supplied oob-buffer,
1251 * This is the legacy mode. Used by YAFFS1
1252 * Should go away some day
1253 */
1254 if (oob_buf && oobsel->useecc == MTD_NANDECC_PLACE) {
1255 int *p = (int *)(&oob_data[mtd->oobsize]);
1256 p[i] = ecc_status;
1257 }
1258
068e3c0a 1259 if ((ecc_status == -1) || (ecc_status > (flags && 0xff))) {
1da177e4
LT
1260 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_ecc: " "Failed ECC read, page 0x%08x\n", page);
1261 ecc_failed++;
1262 }
1263 }
1264
1265 readoob:
1266 /* check, if we have a fs supplied oob-buffer */
1267 if (oob_buf) {
1268 /* without autoplace. Legacy mode used by YAFFS1 */
1269 switch(oobsel->useecc) {
1270 case MTD_NANDECC_AUTOPLACE:
1271 /* Walk through the autoplace chunks */
1272 for (i = 0, j = 0; j < mtd->oobavail; i++) {
1273 int from = oobsel->oobfree[i][0];
1274 int num = oobsel->oobfree[i][1];
1275 memcpy(&oob_buf[oob], &oob_data[from], num);
1276 j+= num;
1277 }
1278 oob += mtd->oobavail;
1279 break;
1280 case MTD_NANDECC_PLACE:
1281 /* YAFFS1 legacy mode */
1282 oob_data += this->eccsteps * sizeof (int);
1283 default:
1284 oob_data += mtd->oobsize;
1285 }
1286 }
1287 readdata:
1288 /* Partial page read, transfer data into fs buffer */
1289 if (!aligned) {
1290 for (j = col; j < end && read < len; j++)
1291 buf[read++] = data_poi[j];
1292 this->pagebuf = realpage;
1293 } else
1294 read += mtd->oobblock;
1295
1296 /* Apply delay or wait for ready/busy pin
1297 * Do this before the AUTOINCR check, so no problems
1298 * arise if a chip which does auto increment
1299 * is marked as NOAUTOINCR by the board driver.
1300 */
1301 if (!this->dev_ready)
1302 udelay (this->chip_delay);
1303 else
1304 while (!this->dev_ready(mtd));
1305
1306 if (read == len)
1307 break;
1308
1309 /* For subsequent reads align to page boundary. */
1310 col = 0;
1311 /* Increment page address */
1312 realpage++;
1313
1314 page = realpage & this->pagemask;
1315 /* Check, if we cross a chip boundary */
1316 if (!page) {
1317 chipnr++;
1318 this->select_chip(mtd, -1);
1319 this->select_chip(mtd, chipnr);
1320 }
1321 /* Check, if the chip supports auto page increment
1322 * or if we have hit a block boundary.
1323 */
1324 if (!NAND_CANAUTOINCR(this) || !(page & blockcheck))
1325 sndcmd = 1;
1326 }
1327
1328 /* Deselect and wake up anyone waiting on the device */
068e3c0a
DM
1329 if (flags & NAND_GET_DEVICE)
1330 nand_release_device(mtd);
1da177e4
LT
1331
1332 /*
1333 * Return success, if no ECC failures, else -EBADMSG
1334 * fs driver will take care of that, because
1335 * retlen == desired len and result == -EBADMSG
1336 */
1337 *retlen = read;
1338 return ecc_failed ? -EBADMSG : 0;
1339}
1340
1341/**
1342 * nand_read_oob - [MTD Interface] NAND read out-of-band
1343 * @mtd: MTD device structure
1344 * @from: offset to read from
1345 * @len: number of bytes to read
1346 * @retlen: pointer to variable to store the number of read bytes
1347 * @buf: the databuffer to put data
1348 *
1349 * NAND read out-of-band data from the spare area
1350 */
1351static int nand_read_oob (struct mtd_info *mtd, loff_t from, size_t len, size_t * retlen, u_char * buf)
1352{
1353 int i, col, page, chipnr;
1354 struct nand_chip *this = mtd->priv;
1355 int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
1356
1357 DEBUG (MTD_DEBUG_LEVEL3, "nand_read_oob: from = 0x%08x, len = %i\n", (unsigned int) from, (int) len);
1358
1359 /* Shift to get page */
1360 page = (int)(from >> this->page_shift);
1361 chipnr = (int)(from >> this->chip_shift);
1362
1363 /* Mask to get column */
1364 col = from & (mtd->oobsize - 1);
1365
1366 /* Initialize return length value */
1367 *retlen = 0;
1368
1369 /* Do not allow reads past end of device */
1370 if ((from + len) > mtd->size) {
1371 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_oob: Attempt read beyond end of device\n");
1372 *retlen = 0;
1373 return -EINVAL;
1374 }
1375
1376 /* Grab the lock and see if the device is available */
1377 nand_get_device (this, mtd , FL_READING);
1378
1379 /* Select the NAND device */
1380 this->select_chip(mtd, chipnr);
1381
1382 /* Send the read command */
1383 this->cmdfunc (mtd, NAND_CMD_READOOB, col, page & this->pagemask);
1384 /*
1385 * Read the data, if we read more than one page
1386 * oob data, let the device transfer the data !
1387 */
1388 i = 0;
1389 while (i < len) {
1390 int thislen = mtd->oobsize - col;
1391 thislen = min_t(int, thislen, len);
1392 this->read_buf(mtd, &buf[i], thislen);
1393 i += thislen;
1394
1395 /* Apply delay or wait for ready/busy pin
1396 * Do this before the AUTOINCR check, so no problems
1397 * arise if a chip which does auto increment
1398 * is marked as NOAUTOINCR by the board driver.
1399 */
1400 if (!this->dev_ready)
1401 udelay (this->chip_delay);
1402 else
1403 while (!this->dev_ready(mtd));
1404
1405 /* Read more ? */
1406 if (i < len) {
1407 page++;
1408 col = 0;
1409
1410 /* Check, if we cross a chip boundary */
1411 if (!(page & this->pagemask)) {
1412 chipnr++;
1413 this->select_chip(mtd, -1);
1414 this->select_chip(mtd, chipnr);
1415 }
1416
1417 /* Check, if the chip supports auto page increment
1418 * or if we have hit a block boundary.
1419 */
1420 if (!NAND_CANAUTOINCR(this) || !(page & blockcheck)) {
1421 /* For subsequent page reads set offset to 0 */
1422 this->cmdfunc (mtd, NAND_CMD_READOOB, 0x0, page & this->pagemask);
1423 }
1424 }
1425 }
1426
1427 /* Deselect and wake up anyone waiting on the device */
1428 nand_release_device(mtd);
1429
1430 /* Return happy */
1431 *retlen = len;
1432 return 0;
1433}
1434
1435/**
1436 * nand_read_raw - [GENERIC] Read raw data including oob into buffer
1437 * @mtd: MTD device structure
1438 * @buf: temporary buffer
1439 * @from: offset to read from
1440 * @len: number of bytes to read
1441 * @ooblen: number of oob data bytes to read
1442 *
1443 * Read raw data including oob into buffer
1444 */
1445int nand_read_raw (struct mtd_info *mtd, uint8_t *buf, loff_t from, size_t len, size_t ooblen)
1446{
1447 struct nand_chip *this = mtd->priv;
1448 int page = (int) (from >> this->page_shift);
1449 int chip = (int) (from >> this->chip_shift);
1450 int sndcmd = 1;
1451 int cnt = 0;
1452 int pagesize = mtd->oobblock + mtd->oobsize;
1453 int blockcheck = (1 << (this->phys_erase_shift - this->page_shift)) - 1;
1454
1455 /* Do not allow reads past end of device */
1456 if ((from + len) > mtd->size) {
1457 DEBUG (MTD_DEBUG_LEVEL0, "nand_read_raw: Attempt read beyond end of device\n");
1458 return -EINVAL;
1459 }
1460
1461 /* Grab the lock and see if the device is available */
1462 nand_get_device (this, mtd , FL_READING);
1463
1464 this->select_chip (mtd, chip);
1465
1466 /* Add requested oob length */
1467 len += ooblen;
1468
1469 while (len) {
1470 if (sndcmd)
1471 this->cmdfunc (mtd, NAND_CMD_READ0, 0, page & this->pagemask);
1472 sndcmd = 0;
1473
1474 this->read_buf (mtd, &buf[cnt], pagesize);
1475
1476 len -= pagesize;
1477 cnt += pagesize;
1478 page++;
1479
1480 if (!this->dev_ready)
1481 udelay (this->chip_delay);
1482 else
1483 while (!this->dev_ready(mtd));
1484
1485 /* Check, if the chip supports auto page increment */
1486 if (!NAND_CANAUTOINCR(this) || !(page & blockcheck))
1487 sndcmd = 1;
1488 }
1489
1490 /* Deselect and wake up anyone waiting on the device */
1491 nand_release_device(mtd);
1492 return 0;
1493}
1494
1495
1496/**
1497 * nand_prepare_oobbuf - [GENERIC] Prepare the out of band buffer
1498 * @mtd: MTD device structure
1499 * @fsbuf: buffer given by fs driver
1500 * @oobsel: out of band selection structre
1501 * @autoplace: 1 = place given buffer into the oob bytes
1502 * @numpages: number of pages to prepare
1503 *
1504 * Return:
1505 * 1. Filesystem buffer available and autoplacement is off,
1506 * return filesystem buffer
1507 * 2. No filesystem buffer or autoplace is off, return internal
1508 * buffer
1509 * 3. Filesystem buffer is given and autoplace selected
1510 * put data from fs buffer into internal buffer and
1511 * retrun internal buffer
1512 *
1513 * Note: The internal buffer is filled with 0xff. This must
1514 * be done only once, when no autoplacement happens
1515 * Autoplacement sets the buffer dirty flag, which
1516 * forces the 0xff fill before using the buffer again.
1517 *
1518*/
1519static u_char * nand_prepare_oobbuf (struct mtd_info *mtd, u_char *fsbuf, struct nand_oobinfo *oobsel,
1520 int autoplace, int numpages)
1521{
1522 struct nand_chip *this = mtd->priv;
1523 int i, len, ofs;
1524
1525 /* Zero copy fs supplied buffer */
1526 if (fsbuf && !autoplace)
1527 return fsbuf;
1528
1529 /* Check, if the buffer must be filled with ff again */
1530 if (this->oobdirty) {
1531 memset (this->oob_buf, 0xff,
1532 mtd->oobsize << (this->phys_erase_shift - this->page_shift));
1533 this->oobdirty = 0;
1534 }
1535
1536 /* If we have no autoplacement or no fs buffer use the internal one */
1537 if (!autoplace || !fsbuf)
1538 return this->oob_buf;
1539
1540 /* Walk through the pages and place the data */
1541 this->oobdirty = 1;
1542 ofs = 0;
1543 while (numpages--) {
1544 for (i = 0, len = 0; len < mtd->oobavail; i++) {
1545 int to = ofs + oobsel->oobfree[i][0];
1546 int num = oobsel->oobfree[i][1];
1547 memcpy (&this->oob_buf[to], fsbuf, num);
1548 len += num;
1549 fsbuf += num;
1550 }
1551 ofs += mtd->oobavail;
1552 }
1553 return this->oob_buf;
1554}
1555
1556#define NOTALIGNED(x) (x & (mtd->oobblock-1)) != 0
1557
1558/**
1559 * nand_write - [MTD Interface] compability function for nand_write_ecc
1560 * @mtd: MTD device structure
1561 * @to: offset to write to
1562 * @len: number of bytes to write
1563 * @retlen: pointer to variable to store the number of written bytes
1564 * @buf: the data to write
1565 *
1566 * This function simply calls nand_write_ecc with oob buffer and oobsel = NULL
1567 *
1568*/
1569static int nand_write (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
1570{
1571 return (nand_write_ecc (mtd, to, len, retlen, buf, NULL, NULL));
1572}
1573
1574/**
1575 * nand_write_ecc - [MTD Interface] NAND write with ECC
1576 * @mtd: MTD device structure
1577 * @to: offset to write to
1578 * @len: number of bytes to write
1579 * @retlen: pointer to variable to store the number of written bytes
1580 * @buf: the data to write
1581 * @eccbuf: filesystem supplied oob data buffer
1582 * @oobsel: oob selection structure
1583 *
1584 * NAND write with ECC
1585 */
1586static int nand_write_ecc (struct mtd_info *mtd, loff_t to, size_t len,
1587 size_t * retlen, const u_char * buf, u_char * eccbuf, struct nand_oobinfo *oobsel)
1588{
1589 int startpage, page, ret = -EIO, oob = 0, written = 0, chipnr;
1590 int autoplace = 0, numpages, totalpages;
1591 struct nand_chip *this = mtd->priv;
1592 u_char *oobbuf, *bufstart;
1593 int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
1594
1595 DEBUG (MTD_DEBUG_LEVEL3, "nand_write_ecc: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1596
1597 /* Initialize retlen, in case of early exit */
1598 *retlen = 0;
1599
1600 /* Do not allow write past end of device */
1601 if ((to + len) > mtd->size) {
1602 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: Attempt to write past end of page\n");
1603 return -EINVAL;
1604 }
1605
1606 /* reject writes, which are not page aligned */
1607 if (NOTALIGNED (to) || NOTALIGNED(len)) {
1608 printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
1609 return -EINVAL;
1610 }
1611
1612 /* Grab the lock and see if the device is available */
1613 nand_get_device (this, mtd, FL_WRITING);
1614
1615 /* Calculate chipnr */
1616 chipnr = (int)(to >> this->chip_shift);
1617 /* Select the NAND device */
1618 this->select_chip(mtd, chipnr);
1619
1620 /* Check, if it is write protected */
1621 if (nand_check_wp(mtd))
1622 goto out;
1623
1624 /* if oobsel is NULL, use chip defaults */
1625 if (oobsel == NULL)
1626 oobsel = &mtd->oobinfo;
1627
1628 /* Autoplace of oob data ? Use the default placement scheme */
1629 if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
1630 oobsel = this->autooob;
1631 autoplace = 1;
1632 }
1633
1634 /* Setup variables and oob buffer */
1635 totalpages = len >> this->page_shift;
1636 page = (int) (to >> this->page_shift);
1637 /* Invalidate the page cache, if we write to the cached page */
1638 if (page <= this->pagebuf && this->pagebuf < (page + totalpages))
1639 this->pagebuf = -1;
1640
1641 /* Set it relative to chip */
1642 page &= this->pagemask;
1643 startpage = page;
1644 /* Calc number of pages we can write in one go */
1645 numpages = min (ppblock - (startpage & (ppblock - 1)), totalpages);
1646 oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel, autoplace, numpages);
1647 bufstart = (u_char *)buf;
1648
1649 /* Loop until all data is written */
1650 while (written < len) {
1651
1652 this->data_poi = (u_char*) &buf[written];
1653 /* Write one page. If this is the last page to write
1654 * or the last page in this block, then use the
1655 * real pageprogram command, else select cached programming
1656 * if supported by the chip.
1657 */
1658 ret = nand_write_page (mtd, this, page, &oobbuf[oob], oobsel, (--numpages > 0));
1659 if (ret) {
1660 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: write_page failed %d\n", ret);
1661 goto out;
1662 }
1663 /* Next oob page */
1664 oob += mtd->oobsize;
1665 /* Update written bytes count */
1666 written += mtd->oobblock;
1667 if (written == len)
1668 goto cmp;
1669
1670 /* Increment page address */
1671 page++;
1672
1673 /* Have we hit a block boundary ? Then we have to verify and
1674 * if verify is ok, we have to setup the oob buffer for
1675 * the next pages.
1676 */
1677 if (!(page & (ppblock - 1))){
1678 int ofs;
1679 this->data_poi = bufstart;
1680 ret = nand_verify_pages (mtd, this, startpage,
1681 page - startpage,
1682 oobbuf, oobsel, chipnr, (eccbuf != NULL));
1683 if (ret) {
1684 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
1685 goto out;
1686 }
1687 *retlen = written;
1688
1689 ofs = autoplace ? mtd->oobavail : mtd->oobsize;
1690 if (eccbuf)
1691 eccbuf += (page - startpage) * ofs;
1692 totalpages -= page - startpage;
1693 numpages = min (totalpages, ppblock);
1694 page &= this->pagemask;
1695 startpage = page;
1696 oobbuf = nand_prepare_oobbuf (mtd, eccbuf, oobsel,
1697 autoplace, numpages);
1698 /* Check, if we cross a chip boundary */
1699 if (!page) {
1700 chipnr++;
1701 this->select_chip(mtd, -1);
1702 this->select_chip(mtd, chipnr);
1703 }
1704 }
1705 }
1706 /* Verify the remaining pages */
1707cmp:
1708 this->data_poi = bufstart;
1709 ret = nand_verify_pages (mtd, this, startpage, totalpages,
1710 oobbuf, oobsel, chipnr, (eccbuf != NULL));
1711 if (!ret)
1712 *retlen = written;
1713 else
1714 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_ecc: verify_pages failed %d\n", ret);
1715
1716out:
1717 /* Deselect and wake up anyone waiting on the device */
1718 nand_release_device(mtd);
1719
1720 return ret;
1721}
1722
1723
1724/**
1725 * nand_write_oob - [MTD Interface] NAND write out-of-band
1726 * @mtd: MTD device structure
1727 * @to: offset to write to
1728 * @len: number of bytes to write
1729 * @retlen: pointer to variable to store the number of written bytes
1730 * @buf: the data to write
1731 *
1732 * NAND write out-of-band
1733 */
1734static int nand_write_oob (struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf)
1735{
1736 int column, page, status, ret = -EIO, chipnr;
1737 struct nand_chip *this = mtd->priv;
1738
1739 DEBUG (MTD_DEBUG_LEVEL3, "nand_write_oob: to = 0x%08x, len = %i\n", (unsigned int) to, (int) len);
1740
1741 /* Shift to get page */
1742 page = (int) (to >> this->page_shift);
1743 chipnr = (int) (to >> this->chip_shift);
1744
1745 /* Mask to get column */
1746 column = to & (mtd->oobsize - 1);
1747
1748 /* Initialize return length value */
1749 *retlen = 0;
1750
1751 /* Do not allow write past end of page */
1752 if ((column + len) > mtd->oobsize) {
1753 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: Attempt to write past end of page\n");
1754 return -EINVAL;
1755 }
1756
1757 /* Grab the lock and see if the device is available */
1758 nand_get_device (this, mtd, FL_WRITING);
1759
1760 /* Select the NAND device */
1761 this->select_chip(mtd, chipnr);
1762
1763 /* Reset the chip. Some chips (like the Toshiba TC5832DC found
1764 in one of my DiskOnChip 2000 test units) will clear the whole
1765 data page too if we don't do this. I have no clue why, but
1766 I seem to have 'fixed' it in the doc2000 driver in
1767 August 1999. dwmw2. */
1768 this->cmdfunc(mtd, NAND_CMD_RESET, -1, -1);
1769
1770 /* Check, if it is write protected */
1771 if (nand_check_wp(mtd))
1772 goto out;
1773
1774 /* Invalidate the page cache, if we write to the cached page */
1775 if (page == this->pagebuf)
1776 this->pagebuf = -1;
1777
1778 if (NAND_MUST_PAD(this)) {
1779 /* Write out desired data */
1780 this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock, page & this->pagemask);
1781 /* prepad 0xff for partial programming */
1782 this->write_buf(mtd, ffchars, column);
1783 /* write data */
1784 this->write_buf(mtd, buf, len);
1785 /* postpad 0xff for partial programming */
1786 this->write_buf(mtd, ffchars, mtd->oobsize - (len+column));
1787 } else {
1788 /* Write out desired data */
1789 this->cmdfunc (mtd, NAND_CMD_SEQIN, mtd->oobblock + column, page & this->pagemask);
1790 /* write data */
1791 this->write_buf(mtd, buf, len);
1792 }
1793 /* Send command to program the OOB data */
1794 this->cmdfunc (mtd, NAND_CMD_PAGEPROG, -1, -1);
1795
1796 status = this->waitfunc (mtd, this, FL_WRITING);
1797
1798 /* See if device thinks it succeeded */
a4ab4c5d 1799 if (status & NAND_STATUS_FAIL) {
1da177e4
LT
1800 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write, page 0x%08x\n", page);
1801 ret = -EIO;
1802 goto out;
1803 }
1804 /* Return happy */
1805 *retlen = len;
1806
1807#ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1808 /* Send command to read back the data */
1809 this->cmdfunc (mtd, NAND_CMD_READOOB, column, page & this->pagemask);
1810
1811 if (this->verify_buf(mtd, buf, len)) {
1812 DEBUG (MTD_DEBUG_LEVEL0, "nand_write_oob: " "Failed write verify, page 0x%08x\n", page);
1813 ret = -EIO;
1814 goto out;
1815 }
1816#endif
1817 ret = 0;
1818out:
1819 /* Deselect and wake up anyone waiting on the device */
1820 nand_release_device(mtd);
1821
1822 return ret;
1823}
1824
1825
1826/**
1827 * nand_writev - [MTD Interface] compabilty function for nand_writev_ecc
1828 * @mtd: MTD device structure
1829 * @vecs: the iovectors to write
1830 * @count: number of vectors
1831 * @to: offset to write to
1832 * @retlen: pointer to variable to store the number of written bytes
1833 *
1834 * NAND write with kvec. This just calls the ecc function
1835 */
1836static int nand_writev (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
1837 loff_t to, size_t * retlen)
1838{
1839 return (nand_writev_ecc (mtd, vecs, count, to, retlen, NULL, NULL));
1840}
1841
1842/**
1843 * nand_writev_ecc - [MTD Interface] write with iovec with ecc
1844 * @mtd: MTD device structure
1845 * @vecs: the iovectors to write
1846 * @count: number of vectors
1847 * @to: offset to write to
1848 * @retlen: pointer to variable to store the number of written bytes
1849 * @eccbuf: filesystem supplied oob data buffer
1850 * @oobsel: oob selection structure
1851 *
1852 * NAND write with iovec with ecc
1853 */
1854static int nand_writev_ecc (struct mtd_info *mtd, const struct kvec *vecs, unsigned long count,
1855 loff_t to, size_t * retlen, u_char *eccbuf, struct nand_oobinfo *oobsel)
1856{
1857 int i, page, len, total_len, ret = -EIO, written = 0, chipnr;
1858 int oob, numpages, autoplace = 0, startpage;
1859 struct nand_chip *this = mtd->priv;
1860 int ppblock = (1 << (this->phys_erase_shift - this->page_shift));
1861 u_char *oobbuf, *bufstart;
1862
1863 /* Preset written len for early exit */
1864 *retlen = 0;
1865
1866 /* Calculate total length of data */
1867 total_len = 0;
1868 for (i = 0; i < count; i++)
1869 total_len += (int) vecs[i].iov_len;
1870
1871 DEBUG (MTD_DEBUG_LEVEL3,
1872 "nand_writev: to = 0x%08x, len = %i, count = %ld\n", (unsigned int) to, (unsigned int) total_len, count);
1873
1874 /* Do not allow write past end of page */
1875 if ((to + total_len) > mtd->size) {
1876 DEBUG (MTD_DEBUG_LEVEL0, "nand_writev: Attempted write past end of device\n");
1877 return -EINVAL;
1878 }
1879
1880 /* reject writes, which are not page aligned */
1881 if (NOTALIGNED (to) || NOTALIGNED(total_len)) {
1882 printk (KERN_NOTICE "nand_write_ecc: Attempt to write not page aligned data\n");
1883 return -EINVAL;
1884 }
1885
1886 /* Grab the lock and see if the device is available */
1887 nand_get_device (this, mtd, FL_WRITING);
1888
1889 /* Get the current chip-nr */
1890 chipnr = (int) (to >> this->chip_shift);
1891 /* Select the NAND device */
1892 this->select_chip(mtd, chipnr);
1893
1894 /* Check, if it is write protected */
1895 if (nand_check_wp(mtd))
1896 goto out;
1897
1898 /* if oobsel is NULL, use chip defaults */
1899 if (oobsel == NULL)
1900 oobsel = &mtd->oobinfo;
1901
1902 /* Autoplace of oob data ? Use the default placement scheme */
1903 if (oobsel->useecc == MTD_NANDECC_AUTOPLACE) {
1904 oobsel = this->autooob;
1905 autoplace = 1;
1906 }
1907
1908 /* Setup start page */
1909 page = (int) (to >> this->page_shift);
1910 /* Invalidate the page cache, if we write to the cached page */
1911 if (page <= this->pagebuf && this->pagebuf < ((to + total_len) >> this->page_shift))
1912 this->pagebuf = -1;
1913
1914 startpage = page & this->pagemask;
1915
1916 /* Loop until all kvec' data has been written */
1917 len = 0;
1918 while (count) {
1919 /* If the given tuple is >= pagesize then
1920 * write it out from the iov
1921 */
1922 if ((vecs->iov_len - len) >= mtd->oobblock) {
1923 /* Calc number of pages we can write
1924 * out of this iov in one go */
1925 numpages = (vecs->iov_len - len) >> this->page_shift;
1926 /* Do not cross block boundaries */
1927 numpages = min (ppblock - (startpage & (ppblock - 1)), numpages);
1928 oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages);
1929 bufstart = (u_char *)vecs->iov_base;
1930 bufstart += len;
1931 this->data_poi = bufstart;
1932 oob = 0;
1933 for (i = 1; i <= numpages; i++) {
1934 /* Write one page. If this is the last page to write
1935 * then use the real pageprogram command, else select
1936 * cached programming if supported by the chip.
1937 */
1938 ret = nand_write_page (mtd, this, page & this->pagemask,
1939 &oobbuf[oob], oobsel, i != numpages);
1940 if (ret)
1941 goto out;
1942 this->data_poi += mtd->oobblock;
1943 len += mtd->oobblock;
1944 oob += mtd->oobsize;
1945 page++;
1946 }
1947 /* Check, if we have to switch to the next tuple */
1948 if (len >= (int) vecs->iov_len) {
1949 vecs++;
1950 len = 0;
1951 count--;
1952 }
1953 } else {
1954 /* We must use the internal buffer, read data out of each
1955 * tuple until we have a full page to write
1956 */
1957 int cnt = 0;
1958 while (cnt < mtd->oobblock) {
1959 if (vecs->iov_base != NULL && vecs->iov_len)
1960 this->data_buf[cnt++] = ((u_char *) vecs->iov_base)[len++];
1961 /* Check, if we have to switch to the next tuple */
1962 if (len >= (int) vecs->iov_len) {
1963 vecs++;
1964 len = 0;
1965 count--;
1966 }
1967 }
1968 this->pagebuf = page;
1969 this->data_poi = this->data_buf;
1970 bufstart = this->data_poi;
1971 numpages = 1;
1972 oobbuf = nand_prepare_oobbuf (mtd, NULL, oobsel, autoplace, numpages);
1973 ret = nand_write_page (mtd, this, page & this->pagemask,
1974 oobbuf, oobsel, 0);
1975 if (ret)
1976 goto out;
1977 page++;
1978 }
1979
1980 this->data_poi = bufstart;
1981 ret = nand_verify_pages (mtd, this, startpage, numpages, oobbuf, oobsel, chipnr, 0);
1982 if (ret)
1983 goto out;
1984
1985 written += mtd->oobblock * numpages;
1986 /* All done ? */
1987 if (!count)
1988 break;
1989
1990 startpage = page & this->pagemask;
1991 /* Check, if we cross a chip boundary */
1992 if (!startpage) {
1993 chipnr++;
1994 this->select_chip(mtd, -1);
1995 this->select_chip(mtd, chipnr);
1996 }
1997 }
1998 ret = 0;
1999out:
2000 /* Deselect and wake up anyone waiting on the device */
2001 nand_release_device(mtd);
2002
2003 *retlen = written;
2004 return ret;
2005}
2006
2007/**
2008 * single_erease_cmd - [GENERIC] NAND standard block erase command function
2009 * @mtd: MTD device structure
2010 * @page: the page address of the block which will be erased
2011 *
2012 * Standard erase command for NAND chips
2013 */
2014static void single_erase_cmd (struct mtd_info *mtd, int page)
2015{
2016 struct nand_chip *this = mtd->priv;
2017 /* Send commands to erase a block */
2018 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
2019 this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
2020}
2021
2022/**
2023 * multi_erease_cmd - [GENERIC] AND specific block erase command function
2024 * @mtd: MTD device structure
2025 * @page: the page address of the block which will be erased
2026 *
2027 * AND multi block erase command function
2028 * Erase 4 consecutive blocks
2029 */
2030static void multi_erase_cmd (struct mtd_info *mtd, int page)
2031{
2032 struct nand_chip *this = mtd->priv;
2033 /* Send commands to erase a block */
2034 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
2035 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
2036 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page++);
2037 this->cmdfunc (mtd, NAND_CMD_ERASE1, -1, page);
2038 this->cmdfunc (mtd, NAND_CMD_ERASE2, -1, -1);
2039}
2040
2041/**
2042 * nand_erase - [MTD Interface] erase block(s)
2043 * @mtd: MTD device structure
2044 * @instr: erase instruction
2045 *
2046 * Erase one ore more blocks
2047 */
2048static int nand_erase (struct mtd_info *mtd, struct erase_info *instr)
2049{
2050 return nand_erase_nand (mtd, instr, 0);
2051}
2052
30f464b7 2053#define BBT_PAGE_MASK 0xffffff3f
1da177e4
LT
2054/**
2055 * nand_erase_intern - [NAND Interface] erase block(s)
2056 * @mtd: MTD device structure
2057 * @instr: erase instruction
2058 * @allowbbt: allow erasing the bbt area
2059 *
2060 * Erase one ore more blocks
2061 */
2062int nand_erase_nand (struct mtd_info *mtd, struct erase_info *instr, int allowbbt)
2063{
2064 int page, len, status, pages_per_block, ret, chipnr;
2065 struct nand_chip *this = mtd->priv;
30f464b7
DM
2066 int rewrite_bbt[NAND_MAX_CHIPS]={0}; /* flags to indicate the page, if bbt needs to be rewritten. */
2067 unsigned int bbt_masked_page; /* bbt mask to compare to page being erased. */
2068 /* It is used to see if the current page is in the same */
2069 /* 256 block group and the same bank as the bbt. */
1da177e4
LT
2070
2071 DEBUG (MTD_DEBUG_LEVEL3,
2072 "nand_erase: start = 0x%08x, len = %i\n", (unsigned int) instr->addr, (unsigned int) instr->len);
2073
2074 /* Start address must align on block boundary */
2075 if (instr->addr & ((1 << this->phys_erase_shift) - 1)) {
2076 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Unaligned address\n");
2077 return -EINVAL;
2078 }
2079
2080 /* Length must align on block boundary */
2081 if (instr->len & ((1 << this->phys_erase_shift) - 1)) {
2082 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Length not block aligned\n");
2083 return -EINVAL;
2084 }
2085
2086 /* Do not allow erase past end of device */
2087 if ((instr->len + instr->addr) > mtd->size) {
2088 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Erase past end of device\n");
2089 return -EINVAL;
2090 }
2091
2092 instr->fail_addr = 0xffffffff;
2093
2094 /* Grab the lock and see if the device is available */
2095 nand_get_device (this, mtd, FL_ERASING);
2096
2097 /* Shift to get first page */
2098 page = (int) (instr->addr >> this->page_shift);
2099 chipnr = (int) (instr->addr >> this->chip_shift);
2100
2101 /* Calculate pages in each block */
2102 pages_per_block = 1 << (this->phys_erase_shift - this->page_shift);
2103
2104 /* Select the NAND device */
2105 this->select_chip(mtd, chipnr);
2106
2107 /* Check the WP bit */
2108 /* Check, if it is write protected */
2109 if (nand_check_wp(mtd)) {
2110 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: Device is write protected!!!\n");
2111 instr->state = MTD_ERASE_FAILED;
2112 goto erase_exit;
2113 }
2114
30f464b7
DM
2115 /* if BBT requires refresh, set the BBT page mask to see if the BBT should be rewritten */
2116 if (this->options & BBT_AUTO_REFRESH) {
2117 bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
2118 } else {
2119 bbt_masked_page = 0xffffffff; /* should not match anything */
2120 }
2121
1da177e4
LT
2122 /* Loop through the pages */
2123 len = instr->len;
2124
2125 instr->state = MTD_ERASING;
2126
2127 while (len) {
2128 /* Check if we have a bad block, we do not erase bad blocks ! */
2129 if (nand_block_checkbad(mtd, ((loff_t) page) << this->page_shift, 0, allowbbt)) {
2130 printk (KERN_WARNING "nand_erase: attempt to erase a bad block at page 0x%08x\n", page);
2131 instr->state = MTD_ERASE_FAILED;
2132 goto erase_exit;
2133 }
2134
2135 /* Invalidate the page cache, if we erase the block which contains
2136 the current cached page */
2137 if (page <= this->pagebuf && this->pagebuf < (page + pages_per_block))
2138 this->pagebuf = -1;
2139
2140 this->erase_cmd (mtd, page & this->pagemask);
2141
2142 status = this->waitfunc (mtd, this, FL_ERASING);
2143
068e3c0a
DM
2144 /* See if operation failed and additional status checks are available */
2145 if ((status & NAND_STATUS_FAIL) && (this->errstat)) {
2146 status = this->errstat(mtd, this, FL_ERASING, status, page);
2147 }
2148
1da177e4 2149 /* See if block erase succeeded */
a4ab4c5d 2150 if (status & NAND_STATUS_FAIL) {
1da177e4
LT
2151 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase: " "Failed erase, page 0x%08x\n", page);
2152 instr->state = MTD_ERASE_FAILED;
2153 instr->fail_addr = (page << this->page_shift);
2154 goto erase_exit;
2155 }
30f464b7
DM
2156
2157 /* if BBT requires refresh, set the BBT rewrite flag to the page being erased */
2158 if (this->options & BBT_AUTO_REFRESH) {
2159 if (((page & BBT_PAGE_MASK) == bbt_masked_page) &&
2160 (page != this->bbt_td->pages[chipnr])) {
2161 rewrite_bbt[chipnr] = (page << this->page_shift);
2162 }
2163 }
1da177e4
LT
2164
2165 /* Increment page address and decrement length */
2166 len -= (1 << this->phys_erase_shift);
2167 page += pages_per_block;
2168
2169 /* Check, if we cross a chip boundary */
2170 if (len && !(page & this->pagemask)) {
2171 chipnr++;
2172 this->select_chip(mtd, -1);
2173 this->select_chip(mtd, chipnr);
30f464b7
DM
2174
2175 /* if BBT requires refresh and BBT-PERCHIP,
2176 * set the BBT page mask to see if this BBT should be rewritten */
2177 if ((this->options & BBT_AUTO_REFRESH) && (this->bbt_td->options & NAND_BBT_PERCHIP)) {
2178 bbt_masked_page = this->bbt_td->pages[chipnr] & BBT_PAGE_MASK;
2179 }
2180
1da177e4
LT
2181 }
2182 }
2183 instr->state = MTD_ERASE_DONE;
2184
2185erase_exit:
2186
2187 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO;
2188 /* Do call back function */
2189 if (!ret)
2190 mtd_erase_callback(instr);
2191
2192 /* Deselect and wake up anyone waiting on the device */
2193 nand_release_device(mtd);
2194
30f464b7
DM
2195 /* if BBT requires refresh and erase was successful, rewrite any selected bad block tables */
2196 if ((this->options & BBT_AUTO_REFRESH) && (!ret)) {
2197 for (chipnr = 0; chipnr < this->numchips; chipnr++) {
2198 if (rewrite_bbt[chipnr]) {
2199 /* update the BBT for chip */
2200 DEBUG (MTD_DEBUG_LEVEL0, "nand_erase_nand: nand_update_bbt (%d:0x%0x 0x%0x)\n",
2201 chipnr, rewrite_bbt[chipnr], this->bbt_td->pages[chipnr]);
2202 nand_update_bbt (mtd, rewrite_bbt[chipnr]);
2203 }
2204 }
2205 }
2206
1da177e4
LT
2207 /* Return more or less happy */
2208 return ret;
2209}
2210
2211/**
2212 * nand_sync - [MTD Interface] sync
2213 * @mtd: MTD device structure
2214 *
2215 * Sync is actually a wait for chip ready function
2216 */
2217static void nand_sync (struct mtd_info *mtd)
2218{
2219 struct nand_chip *this = mtd->priv;
2220
2221 DEBUG (MTD_DEBUG_LEVEL3, "nand_sync: called\n");
2222
2223 /* Grab the lock and see if the device is available */
2224 nand_get_device (this, mtd, FL_SYNCING);
2225 /* Release it and go back */
2226 nand_release_device (mtd);
2227}
2228
2229
2230/**
2231 * nand_block_isbad - [MTD Interface] Check whether the block at the given offset is bad
2232 * @mtd: MTD device structure
2233 * @ofs: offset relative to mtd start
2234 */
2235static int nand_block_isbad (struct mtd_info *mtd, loff_t ofs)
2236{
2237 /* Check for invalid offset */
2238 if (ofs > mtd->size)
2239 return -EINVAL;
2240
2241 return nand_block_checkbad (mtd, ofs, 1, 0);
2242}
2243
2244/**
2245 * nand_block_markbad - [MTD Interface] Mark the block at the given offset as bad
2246 * @mtd: MTD device structure
2247 * @ofs: offset relative to mtd start
2248 */
2249static int nand_block_markbad (struct mtd_info *mtd, loff_t ofs)
2250{
2251 struct nand_chip *this = mtd->priv;
2252 int ret;
2253
2254 if ((ret = nand_block_isbad(mtd, ofs))) {
2255 /* If it was bad already, return success and do nothing. */
2256 if (ret > 0)
2257 return 0;
2258 return ret;
2259 }
2260
2261 return this->block_markbad(mtd, ofs);
2262}
2263
2264/**
2265 * nand_scan - [NAND Interface] Scan for the NAND device
2266 * @mtd: MTD device structure
2267 * @maxchips: Number of chips to scan for
2268 *
2269 * This fills out all the not initialized function pointers
2270 * with the defaults.
2271 * The flash ID is read and the mtd/chip structures are
2272 * filled with the appropriate values. Buffers are allocated if
2273 * they are not provided by the board driver
2274 *
2275 */
2276int nand_scan (struct mtd_info *mtd, int maxchips)
2277{
2278 int i, j, nand_maf_id, nand_dev_id, busw;
2279 struct nand_chip *this = mtd->priv;
2280
2281 /* Get buswidth to select the correct functions*/
2282 busw = this->options & NAND_BUSWIDTH_16;
2283
2284 /* check for proper chip_delay setup, set 20us if not */
2285 if (!this->chip_delay)
2286 this->chip_delay = 20;
2287
2288 /* check, if a user supplied command function given */
2289 if (this->cmdfunc == NULL)
2290 this->cmdfunc = nand_command;
2291
2292 /* check, if a user supplied wait function given */
2293 if (this->waitfunc == NULL)
2294 this->waitfunc = nand_wait;
2295
2296 if (!this->select_chip)
2297 this->select_chip = nand_select_chip;
2298 if (!this->write_byte)
2299 this->write_byte = busw ? nand_write_byte16 : nand_write_byte;
2300 if (!this->read_byte)
2301 this->read_byte = busw ? nand_read_byte16 : nand_read_byte;
2302 if (!this->write_word)
2303 this->write_word = nand_write_word;
2304 if (!this->read_word)
2305 this->read_word = nand_read_word;
2306 if (!this->block_bad)
2307 this->block_bad = nand_block_bad;
2308 if (!this->block_markbad)
2309 this->block_markbad = nand_default_block_markbad;
2310 if (!this->write_buf)
2311 this->write_buf = busw ? nand_write_buf16 : nand_write_buf;
2312 if (!this->read_buf)
2313 this->read_buf = busw ? nand_read_buf16 : nand_read_buf;
2314 if (!this->verify_buf)
2315 this->verify_buf = busw ? nand_verify_buf16 : nand_verify_buf;
2316 if (!this->scan_bbt)
2317 this->scan_bbt = nand_default_bbt;
2318
2319 /* Select the device */
2320 this->select_chip(mtd, 0);
2321
2322 /* Send the command for reading device ID */
2323 this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
2324
2325 /* Read manufacturer and device IDs */
2326 nand_maf_id = this->read_byte(mtd);
2327 nand_dev_id = this->read_byte(mtd);
2328
2329 /* Print and store flash device information */
2330 for (i = 0; nand_flash_ids[i].name != NULL; i++) {
2331
2332 if (nand_dev_id != nand_flash_ids[i].id)
2333 continue;
2334
2335 if (!mtd->name) mtd->name = nand_flash_ids[i].name;
2336 this->chipsize = nand_flash_ids[i].chipsize << 20;
2337
2338 /* New devices have all the information in additional id bytes */
2339 if (!nand_flash_ids[i].pagesize) {
2340 int extid;
2341 /* The 3rd id byte contains non relevant data ATM */
2342 extid = this->read_byte(mtd);
2343 /* The 4th id byte is the important one */
2344 extid = this->read_byte(mtd);
2345 /* Calc pagesize */
2346 mtd->oobblock = 1024 << (extid & 0x3);
2347 extid >>= 2;
2348 /* Calc oobsize */
2349 mtd->oobsize = (8 << (extid & 0x03)) * (mtd->oobblock / 512);
2350 extid >>= 2;
2351 /* Calc blocksize. Blocksize is multiples of 64KiB */
2352 mtd->erasesize = (64 * 1024) << (extid & 0x03);
2353 extid >>= 2;
2354 /* Get buswidth information */
2355 busw = (extid & 0x01) ? NAND_BUSWIDTH_16 : 0;
2356
2357 } else {
2358 /* Old devices have this data hardcoded in the
2359 * device id table */
2360 mtd->erasesize = nand_flash_ids[i].erasesize;
2361 mtd->oobblock = nand_flash_ids[i].pagesize;
2362 mtd->oobsize = mtd->oobblock / 32;
2363 busw = nand_flash_ids[i].options & NAND_BUSWIDTH_16;
2364 }
2365
2366 /* Check, if buswidth is correct. Hardware drivers should set
2367 * this correct ! */
2368 if (busw != (this->options & NAND_BUSWIDTH_16)) {
2369 printk (KERN_INFO "NAND device: Manufacturer ID:"
2370 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
2371 nand_manuf_ids[i].name , mtd->name);
2372 printk (KERN_WARNING
2373 "NAND bus width %d instead %d bit\n",
2374 (this->options & NAND_BUSWIDTH_16) ? 16 : 8,
2375 busw ? 16 : 8);
2376 this->select_chip(mtd, -1);
2377 return 1;
2378 }
2379
2380 /* Calculate the address shift from the page size */
2381 this->page_shift = ffs(mtd->oobblock) - 1;
2382 this->bbt_erase_shift = this->phys_erase_shift = ffs(mtd->erasesize) - 1;
2383 this->chip_shift = ffs(this->chipsize) - 1;
2384
2385 /* Set the bad block position */
2386 this->badblockpos = mtd->oobblock > 512 ?
2387 NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS;
2388
2389 /* Get chip options, preserve non chip based options */
2390 this->options &= ~NAND_CHIPOPTIONS_MSK;
2391 this->options |= nand_flash_ids[i].options & NAND_CHIPOPTIONS_MSK;
2392 /* Set this as a default. Board drivers can override it, if neccecary */
2393 this->options |= NAND_NO_AUTOINCR;
2394 /* Check if this is a not a samsung device. Do not clear the options
2395 * for chips which are not having an extended id.
2396 */
2397 if (nand_maf_id != NAND_MFR_SAMSUNG && !nand_flash_ids[i].pagesize)
2398 this->options &= ~NAND_SAMSUNG_LP_OPTIONS;
2399
2400 /* Check for AND chips with 4 page planes */
2401 if (this->options & NAND_4PAGE_ARRAY)
2402 this->erase_cmd = multi_erase_cmd;
2403 else
2404 this->erase_cmd = single_erase_cmd;
2405
2406 /* Do not replace user supplied command function ! */
2407 if (mtd->oobblock > 512 && this->cmdfunc == nand_command)
2408 this->cmdfunc = nand_command_lp;
2409
2410 /* Try to identify manufacturer */
2411 for (j = 0; nand_manuf_ids[j].id != 0x0; j++) {
2412 if (nand_manuf_ids[j].id == nand_maf_id)
2413 break;
2414 }
2415 printk (KERN_INFO "NAND device: Manufacturer ID:"
2416 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", nand_maf_id, nand_dev_id,
2417 nand_manuf_ids[j].name , nand_flash_ids[i].name);
2418 break;
2419 }
2420
2421 if (!nand_flash_ids[i].name) {
2422 printk (KERN_WARNING "No NAND device found!!!\n");
2423 this->select_chip(mtd, -1);
2424 return 1;
2425 }
2426
2427 for (i=1; i < maxchips; i++) {
2428 this->select_chip(mtd, i);
2429
2430 /* Send the command for reading device ID */
2431 this->cmdfunc (mtd, NAND_CMD_READID, 0x00, -1);
2432
2433 /* Read manufacturer and device IDs */
2434 if (nand_maf_id != this->read_byte(mtd) ||
2435 nand_dev_id != this->read_byte(mtd))
2436 break;
2437 }
2438 if (i > 1)
2439 printk(KERN_INFO "%d NAND chips detected\n", i);
2440
2441 /* Allocate buffers, if neccecary */
2442 if (!this->oob_buf) {
2443 size_t len;
2444 len = mtd->oobsize << (this->phys_erase_shift - this->page_shift);
2445 this->oob_buf = kmalloc (len, GFP_KERNEL);
2446 if (!this->oob_buf) {
2447 printk (KERN_ERR "nand_scan(): Cannot allocate oob_buf\n");
2448 return -ENOMEM;
2449 }
2450 this->options |= NAND_OOBBUF_ALLOC;
2451 }
2452
2453 if (!this->data_buf) {
2454 size_t len;
2455 len = mtd->oobblock + mtd->oobsize;
2456 this->data_buf = kmalloc (len, GFP_KERNEL);
2457 if (!this->data_buf) {
2458 if (this->options & NAND_OOBBUF_ALLOC)
2459 kfree (this->oob_buf);
2460 printk (KERN_ERR "nand_scan(): Cannot allocate data_buf\n");
2461 return -ENOMEM;
2462 }
2463 this->options |= NAND_DATABUF_ALLOC;
2464 }
2465
2466 /* Store the number of chips and calc total size for mtd */
2467 this->numchips = i;
2468 mtd->size = i * this->chipsize;
2469 /* Convert chipsize to number of pages per chip -1. */
2470 this->pagemask = (this->chipsize >> this->page_shift) - 1;
2471 /* Preset the internal oob buffer */
2472 memset(this->oob_buf, 0xff, mtd->oobsize << (this->phys_erase_shift - this->page_shift));
2473
2474 /* If no default placement scheme is given, select an
2475 * appropriate one */
2476 if (!this->autooob) {
2477 /* Select the appropriate default oob placement scheme for
2478 * placement agnostic filesystems */
2479 switch (mtd->oobsize) {
2480 case 8:
2481 this->autooob = &nand_oob_8;
2482 break;
2483 case 16:
2484 this->autooob = &nand_oob_16;
2485 break;
2486 case 64:
2487 this->autooob = &nand_oob_64;
2488 break;
2489 default:
2490 printk (KERN_WARNING "No oob scheme defined for oobsize %d\n",
2491 mtd->oobsize);
2492 BUG();
2493 }
2494 }
2495
2496 /* The number of bytes available for the filesystem to place fs dependend
2497 * oob data */
2498 if (this->options & NAND_BUSWIDTH_16) {
2499 mtd->oobavail = mtd->oobsize - (this->autooob->eccbytes + 2);
2500 if (this->autooob->eccbytes & 0x01)
2501 mtd->oobavail--;
2502 } else
2503 mtd->oobavail = mtd->oobsize - (this->autooob->eccbytes + 1);
2504
2505 /*
2506 * check ECC mode, default to software
2507 * if 3byte/512byte hardware ECC is selected and we have 256 byte pagesize
2508 * fallback to software ECC
2509 */
2510 this->eccsize = 256; /* set default eccsize */
2511 this->eccbytes = 3;
2512
2513 switch (this->eccmode) {
2514 case NAND_ECC_HW12_2048:
2515 if (mtd->oobblock < 2048) {
2516 printk(KERN_WARNING "2048 byte HW ECC not possible on %d byte page size, fallback to SW ECC\n",
2517 mtd->oobblock);
2518 this->eccmode = NAND_ECC_SOFT;
2519 this->calculate_ecc = nand_calculate_ecc;
2520 this->correct_data = nand_correct_data;
2521 } else
2522 this->eccsize = 2048;
2523 break;
2524
2525 case NAND_ECC_HW3_512:
2526 case NAND_ECC_HW6_512:
2527 case NAND_ECC_HW8_512:
2528 if (mtd->oobblock == 256) {
2529 printk (KERN_WARNING "512 byte HW ECC not possible on 256 Byte pagesize, fallback to SW ECC \n");
2530 this->eccmode = NAND_ECC_SOFT;
2531 this->calculate_ecc = nand_calculate_ecc;
2532 this->correct_data = nand_correct_data;
2533 } else
2534 this->eccsize = 512; /* set eccsize to 512 */
2535 break;
2536
2537 case NAND_ECC_HW3_256:
2538 break;
2539
2540 case NAND_ECC_NONE:
2541 printk (KERN_WARNING "NAND_ECC_NONE selected by board driver. This is not recommended !!\n");
2542 this->eccmode = NAND_ECC_NONE;
2543 break;
2544
2545 case NAND_ECC_SOFT:
2546 this->calculate_ecc = nand_calculate_ecc;
2547 this->correct_data = nand_correct_data;
2548 break;
2549
2550 default:
2551 printk (KERN_WARNING "Invalid NAND_ECC_MODE %d\n", this->eccmode);
2552 BUG();
2553 }
2554
2555 /* Check hardware ecc function availability and adjust number of ecc bytes per
2556 * calculation step
2557 */
2558 switch (this->eccmode) {
2559 case NAND_ECC_HW12_2048:
2560 this->eccbytes += 4;
2561 case NAND_ECC_HW8_512:
2562 this->eccbytes += 2;
2563 case NAND_ECC_HW6_512:
2564 this->eccbytes += 3;
2565 case NAND_ECC_HW3_512:
2566 case NAND_ECC_HW3_256:
2567 if (this->calculate_ecc && this->correct_data && this->enable_hwecc)
2568 break;
2569 printk (KERN_WARNING "No ECC functions supplied, Hardware ECC not possible\n");
2570 BUG();
2571 }
2572
2573 mtd->eccsize = this->eccsize;
2574
2575 /* Set the number of read / write steps for one page to ensure ECC generation */
2576 switch (this->eccmode) {
2577 case NAND_ECC_HW12_2048:
2578 this->eccsteps = mtd->oobblock / 2048;
2579 break;
2580 case NAND_ECC_HW3_512:
2581 case NAND_ECC_HW6_512:
2582 case NAND_ECC_HW8_512:
2583 this->eccsteps = mtd->oobblock / 512;
2584 break;
2585 case NAND_ECC_HW3_256:
2586 case NAND_ECC_SOFT:
2587 this->eccsteps = mtd->oobblock / 256;
2588 break;
2589
2590 case NAND_ECC_NONE:
2591 this->eccsteps = 1;
2592 break;
2593 }
2594
2595 /* Initialize state, waitqueue and spinlock */
2596 this->state = FL_READY;
2597 init_waitqueue_head (&this->wq);
2598 spin_lock_init (&this->chip_lock);
2599
2600 /* De-select the device */
2601 this->select_chip(mtd, -1);
2602
2603 /* Invalidate the pagebuffer reference */
2604 this->pagebuf = -1;
2605
2606 /* Fill in remaining MTD driver data */
2607 mtd->type = MTD_NANDFLASH;
2608 mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
2609 mtd->ecctype = MTD_ECC_SW;
2610 mtd->erase = nand_erase;
2611 mtd->point = NULL;
2612 mtd->unpoint = NULL;
2613 mtd->read = nand_read;
2614 mtd->write = nand_write;
2615 mtd->read_ecc = nand_read_ecc;
2616 mtd->write_ecc = nand_write_ecc;
2617 mtd->read_oob = nand_read_oob;
2618 mtd->write_oob = nand_write_oob;
2619 mtd->readv = NULL;
2620 mtd->writev = nand_writev;
2621 mtd->writev_ecc = nand_writev_ecc;
2622 mtd->sync = nand_sync;
2623 mtd->lock = NULL;
2624 mtd->unlock = NULL;
2625 mtd->suspend = NULL;
2626 mtd->resume = NULL;
2627 mtd->block_isbad = nand_block_isbad;
2628 mtd->block_markbad = nand_block_markbad;
2629
2630 /* and make the autooob the default one */
2631 memcpy(&mtd->oobinfo, this->autooob, sizeof(mtd->oobinfo));
2632
2633 mtd->owner = THIS_MODULE;
2634
2635 /* Build bad block table */
2636 return this->scan_bbt (mtd);
2637}
2638
2639/**
2640 * nand_release - [NAND Interface] Free resources held by the NAND device
2641 * @mtd: MTD device structure
2642*/
2643void nand_release (struct mtd_info *mtd)
2644{
2645 struct nand_chip *this = mtd->priv;
2646
2647#ifdef CONFIG_MTD_PARTITIONS
2648 /* Deregister partitions */
2649 del_mtd_partitions (mtd);
2650#endif
2651 /* Deregister the device */
2652 del_mtd_device (mtd);
2653
2654 /* Free bad block table memory, if allocated */
2655 if (this->bbt)
2656 kfree (this->bbt);
2657 /* Buffer allocated by nand_scan ? */
2658 if (this->options & NAND_OOBBUF_ALLOC)
2659 kfree (this->oob_buf);
2660 /* Buffer allocated by nand_scan ? */
2661 if (this->options & NAND_DATABUF_ALLOC)
2662 kfree (this->data_buf);
2663}
2664
2665EXPORT_SYMBOL (nand_scan);
2666EXPORT_SYMBOL (nand_release);
2667
2668MODULE_LICENSE ("GPL");
2669MODULE_AUTHOR ("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
2670MODULE_DESCRIPTION ("Generic NAND flash driver code");