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include cleanup: Update gfp.h and slab.h includes to prepare for breaking implicit...
[net-next-2.6.git] / drivers / mmc / host / wbsd.c
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1da177e4 1/*
70f10482 2 * linux/drivers/mmc/host/wbsd.c - Winbond W83L51xD SD/MMC driver
1da177e4 3 *
14d836e7 4 * Copyright (C) 2004-2007 Pierre Ossman, All Rights Reserved.
1da177e4
LT
5 *
6 * This program is free software; you can redistribute it and/or modify
643f720c
PO
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or (at
9 * your option) any later version.
1da177e4
LT
10 *
11 *
12 * Warning!
13 *
14 * Changes to the FIFO system should be done with extreme care since
15 * the hardware is full of bugs related to the FIFO. Known issues are:
16 *
17 * - FIFO size field in FSR is always zero.
18 *
19 * - FIFO interrupts tend not to work as they should. Interrupts are
20 * triggered only for full/empty events, not for threshold values.
21 *
22 * - On APIC systems the FIFO empty interrupt is sometimes lost.
23 */
24
1da177e4
LT
25#include <linux/module.h>
26#include <linux/moduleparam.h>
27#include <linux/init.h>
28#include <linux/ioport.h>
d052d1be 29#include <linux/platform_device.h>
1da177e4 30#include <linux/interrupt.h>
85bcc130 31#include <linux/dma-mapping.h>
1da177e4 32#include <linux/delay.h>
85bcc130 33#include <linux/pnp.h>
1da177e4
LT
34#include <linux/highmem.h>
35#include <linux/mmc/host.h>
bd6dee6f 36#include <linux/scatterlist.h>
5a0e3ad6 37#include <linux/slab.h>
1da177e4
LT
38
39#include <asm/io.h>
40#include <asm/dma.h>
1da177e4
LT
41
42#include "wbsd.h"
43
44#define DRIVER_NAME "wbsd"
1da177e4 45
1da177e4 46#define DBG(x...) \
c6563178 47 pr_debug(DRIVER_NAME ": " x)
1da177e4 48#define DBGF(f, x...) \
c6563178 49 pr_debug(DRIVER_NAME " [%s()]: " f, __func__ , ##x)
1da177e4 50
85bcc130
PO
51/*
52 * Device resources
53 */
54
55#ifdef CONFIG_PNP
56
57static const struct pnp_device_id pnp_dev_table[] = {
58 { "WEC0517", 0 },
59 { "WEC0518", 0 },
60 { "", 0 },
61};
62
63MODULE_DEVICE_TABLE(pnp, pnp_dev_table);
64
65#endif /* CONFIG_PNP */
66
3eee0d03
AB
67static const int config_ports[] = { 0x2E, 0x4E };
68static const int unlock_codes[] = { 0x83, 0x87 };
69
70static const int valid_ids[] = {
71 0x7112,
9eeebd22 72};
3eee0d03 73
85bcc130 74#ifdef CONFIG_PNP
9eeebd22 75static unsigned int param_nopnp = 0;
85bcc130 76#else
9eeebd22 77static const unsigned int param_nopnp = 1;
85bcc130 78#endif
9eeebd22
TW
79static unsigned int param_io = 0x248;
80static unsigned int param_irq = 6;
81static int param_dma = 2;
85bcc130 82
1da177e4
LT
83/*
84 * Basic functions
85 */
86
cfa7f521 87static inline void wbsd_unlock_config(struct wbsd_host *host)
1da177e4 88{
85bcc130 89 BUG_ON(host->config == 0);
fecf92ba 90
1da177e4
LT
91 outb(host->unlock_code, host->config);
92 outb(host->unlock_code, host->config);
93}
94
cfa7f521 95static inline void wbsd_lock_config(struct wbsd_host *host)
1da177e4 96{
85bcc130 97 BUG_ON(host->config == 0);
fecf92ba 98
1da177e4
LT
99 outb(LOCK_CODE, host->config);
100}
101
cfa7f521 102static inline void wbsd_write_config(struct wbsd_host *host, u8 reg, u8 value)
1da177e4 103{
85bcc130 104 BUG_ON(host->config == 0);
fecf92ba 105
1da177e4
LT
106 outb(reg, host->config);
107 outb(value, host->config + 1);
108}
109
cfa7f521 110static inline u8 wbsd_read_config(struct wbsd_host *host, u8 reg)
1da177e4 111{
85bcc130 112 BUG_ON(host->config == 0);
fecf92ba 113
1da177e4
LT
114 outb(reg, host->config);
115 return inb(host->config + 1);
116}
117
cfa7f521 118static inline void wbsd_write_index(struct wbsd_host *host, u8 index, u8 value)
1da177e4
LT
119{
120 outb(index, host->base + WBSD_IDXR);
121 outb(value, host->base + WBSD_DATAR);
122}
123
cfa7f521 124static inline u8 wbsd_read_index(struct wbsd_host *host, u8 index)
1da177e4
LT
125{
126 outb(index, host->base + WBSD_IDXR);
127 return inb(host->base + WBSD_DATAR);
128}
129
130/*
131 * Common routines
132 */
133
cfa7f521 134static void wbsd_init_device(struct wbsd_host *host)
1da177e4
LT
135{
136 u8 setup, ier;
fecf92ba 137
1da177e4
LT
138 /*
139 * Reset chip (SD/MMC part) and fifo.
140 */
141 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
142 setup |= WBSD_FIFO_RESET | WBSD_SOFT_RESET;
143 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 144
85bcc130
PO
145 /*
146 * Set DAT3 to input
147 */
148 setup &= ~WBSD_DAT3_H;
149 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
150 host->flags &= ~WBSD_FIGNORE_DETECT;
fecf92ba 151
1da177e4
LT
152 /*
153 * Read back default clock.
154 */
155 host->clk = wbsd_read_index(host, WBSD_IDX_CLK);
156
157 /*
158 * Power down port.
159 */
160 outb(WBSD_POWER_N, host->base + WBSD_CSR);
fecf92ba 161
1da177e4
LT
162 /*
163 * Set maximum timeout.
164 */
165 wbsd_write_index(host, WBSD_IDX_TAAC, 0x7F);
fecf92ba 166
85bcc130
PO
167 /*
168 * Test for card presence
169 */
170 if (inb(host->base + WBSD_CSR) & WBSD_CARDPRESENT)
171 host->flags |= WBSD_FCARD_PRESENT;
172 else
173 host->flags &= ~WBSD_FCARD_PRESENT;
fecf92ba 174
1da177e4
LT
175 /*
176 * Enable interesting interrupts.
177 */
178 ier = 0;
179 ier |= WBSD_EINT_CARD;
180 ier |= WBSD_EINT_FIFO_THRE;
1da177e4 181 ier |= WBSD_EINT_CRC;
5721dbf2 182 ier |= WBSD_EINT_TIMEOUT;
1da177e4
LT
183 ier |= WBSD_EINT_TC;
184
185 outb(ier, host->base + WBSD_EIR);
186
187 /*
188 * Clear interrupts.
189 */
190 inb(host->base + WBSD_ISR);
191}
192
cfa7f521 193static void wbsd_reset(struct wbsd_host *host)
1da177e4
LT
194{
195 u8 setup;
fecf92ba 196
d191634f 197 printk(KERN_ERR "%s: Resetting chip\n", mmc_hostname(host->mmc));
fecf92ba 198
1da177e4
LT
199 /*
200 * Soft reset of chip (SD/MMC part).
201 */
202 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
203 setup |= WBSD_SOFT_RESET;
204 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
205}
206
cfa7f521 207static void wbsd_request_end(struct wbsd_host *host, struct mmc_request *mrq)
1da177e4
LT
208{
209 unsigned long dmaflags;
fecf92ba 210
cfa7f521 211 if (host->dma >= 0) {
1da177e4
LT
212 /*
213 * Release ISA DMA controller.
214 */
215 dmaflags = claim_dma_lock();
216 disable_dma(host->dma);
217 clear_dma_ff(host->dma);
218 release_dma_lock(dmaflags);
219
220 /*
221 * Disable DMA on host.
222 */
223 wbsd_write_index(host, WBSD_IDX_DMA, 0);
224 }
fecf92ba 225
1da177e4
LT
226 host->mrq = NULL;
227
228 /*
229 * MMC layer might call back into the driver so first unlock.
230 */
231 spin_unlock(&host->lock);
232 mmc_request_done(host->mmc, mrq);
233 spin_lock(&host->lock);
234}
235
236/*
237 * Scatter/gather functions
238 */
239
cfa7f521 240static inline void wbsd_init_sg(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
241{
242 /*
243 * Get info. about SG list from data structure.
244 */
245 host->cur_sg = data->sg;
246 host->num_sg = data->sg_len;
247
248 host->offset = 0;
249 host->remain = host->cur_sg->length;
250}
251
cfa7f521 252static inline int wbsd_next_sg(struct wbsd_host *host)
1da177e4
LT
253{
254 /*
255 * Skip to next SG entry.
256 */
257 host->cur_sg++;
258 host->num_sg--;
259
260 /*
261 * Any entries left?
262 */
cfa7f521
PO
263 if (host->num_sg > 0) {
264 host->offset = 0;
265 host->remain = host->cur_sg->length;
266 }
fecf92ba 267
1da177e4
LT
268 return host->num_sg;
269}
270
4a0ddbd2 271static inline char *wbsd_sg_to_buffer(struct wbsd_host *host)
1da177e4 272{
45711f1a 273 return sg_virt(host->cur_sg);
1da177e4
LT
274}
275
cfa7f521 276static inline void wbsd_sg_to_dma(struct wbsd_host *host, struct mmc_data *data)
1da177e4 277{
14d836e7 278 unsigned int len, i;
cfa7f521
PO
279 struct scatterlist *sg;
280 char *dmabuf = host->dma_buffer;
281 char *sgbuf;
fecf92ba 282
1da177e4
LT
283 sg = data->sg;
284 len = data->sg_len;
fecf92ba 285
cfa7f521 286 for (i = 0; i < len; i++) {
45711f1a 287 sgbuf = sg_virt(&sg[i]);
14d836e7 288 memcpy(dmabuf, sgbuf, sg[i].length);
1da177e4 289 dmabuf += sg[i].length;
1da177e4 290 }
1da177e4
LT
291}
292
cfa7f521 293static inline void wbsd_dma_to_sg(struct wbsd_host *host, struct mmc_data *data)
1da177e4 294{
14d836e7 295 unsigned int len, i;
cfa7f521
PO
296 struct scatterlist *sg;
297 char *dmabuf = host->dma_buffer;
298 char *sgbuf;
fecf92ba 299
1da177e4
LT
300 sg = data->sg;
301 len = data->sg_len;
fecf92ba 302
cfa7f521 303 for (i = 0; i < len; i++) {
45711f1a 304 sgbuf = sg_virt(&sg[i]);
14d836e7 305 memcpy(sgbuf, dmabuf, sg[i].length);
1da177e4 306 dmabuf += sg[i].length;
1da177e4 307 }
1da177e4
LT
308}
309
310/*
311 * Command handling
312 */
fecf92ba 313
cfa7f521
PO
314static inline void wbsd_get_short_reply(struct wbsd_host *host,
315 struct mmc_command *cmd)
1da177e4
LT
316{
317 /*
318 * Correct response type?
319 */
cfa7f521 320 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_SHORT) {
17b0429d 321 cmd->error = -EILSEQ;
1da177e4
LT
322 return;
323 }
fecf92ba 324
cfa7f521
PO
325 cmd->resp[0] = wbsd_read_index(host, WBSD_IDX_RESP12) << 24;
326 cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP13) << 16;
327 cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP14) << 8;
328 cmd->resp[0] |= wbsd_read_index(host, WBSD_IDX_RESP15) << 0;
329 cmd->resp[1] = wbsd_read_index(host, WBSD_IDX_RESP16) << 24;
1da177e4
LT
330}
331
cfa7f521
PO
332static inline void wbsd_get_long_reply(struct wbsd_host *host,
333 struct mmc_command *cmd)
1da177e4
LT
334{
335 int i;
fecf92ba 336
1da177e4
LT
337 /*
338 * Correct response type?
339 */
cfa7f521 340 if (wbsd_read_index(host, WBSD_IDX_RSPLEN) != WBSD_RSP_LONG) {
17b0429d 341 cmd->error = -EILSEQ;
1da177e4
LT
342 return;
343 }
fecf92ba 344
cfa7f521 345 for (i = 0; i < 4; i++) {
1da177e4
LT
346 cmd->resp[i] =
347 wbsd_read_index(host, WBSD_IDX_RESP1 + i * 4) << 24;
348 cmd->resp[i] |=
349 wbsd_read_index(host, WBSD_IDX_RESP2 + i * 4) << 16;
350 cmd->resp[i] |=
351 wbsd_read_index(host, WBSD_IDX_RESP3 + i * 4) << 8;
352 cmd->resp[i] |=
353 wbsd_read_index(host, WBSD_IDX_RESP4 + i * 4) << 0;
354 }
355}
356
cfa7f521 357static void wbsd_send_command(struct wbsd_host *host, struct mmc_command *cmd)
1da177e4
LT
358{
359 int i;
360 u8 status, isr;
fecf92ba 361
1da177e4
LT
362 /*
363 * Clear accumulated ISR. The interrupt routine
364 * will fill this one with events that occur during
365 * transfer.
366 */
367 host->isr = 0;
fecf92ba 368
1da177e4
LT
369 /*
370 * Send the command (CRC calculated by host).
371 */
372 outb(cmd->opcode, host->base + WBSD_CMDR);
cfa7f521 373 for (i = 3; i >= 0; i--)
1da177e4 374 outb((cmd->arg >> (i * 8)) & 0xff, host->base + WBSD_CMDR);
fecf92ba 375
17b0429d 376 cmd->error = 0;
fecf92ba 377
1da177e4
LT
378 /*
379 * Wait for the request to complete.
380 */
381 do {
382 status = wbsd_read_index(host, WBSD_IDX_STATUS);
383 } while (status & WBSD_CARDTRAFFIC);
384
385 /*
386 * Do we expect a reply?
387 */
e9225176 388 if (cmd->flags & MMC_RSP_PRESENT) {
1da177e4
LT
389 /*
390 * Read back status.
391 */
392 isr = host->isr;
fecf92ba 393
1da177e4
LT
394 /* Card removed? */
395 if (isr & WBSD_INT_CARD)
17b0429d 396 cmd->error = -ENOMEDIUM;
1da177e4
LT
397 /* Timeout? */
398 else if (isr & WBSD_INT_TIMEOUT)
17b0429d 399 cmd->error = -ETIMEDOUT;
1da177e4
LT
400 /* CRC? */
401 else if ((cmd->flags & MMC_RSP_CRC) && (isr & WBSD_INT_CRC))
17b0429d 402 cmd->error = -EILSEQ;
1da177e4 403 /* All ok */
cfa7f521 404 else {
e9225176 405 if (cmd->flags & MMC_RSP_136)
1da177e4 406 wbsd_get_long_reply(host, cmd);
e9225176
RK
407 else
408 wbsd_get_short_reply(host, cmd);
1da177e4
LT
409 }
410 }
1da177e4
LT
411}
412
413/*
414 * Data functions
415 */
416
cfa7f521 417static void wbsd_empty_fifo(struct wbsd_host *host)
1da177e4 418{
cfa7f521
PO
419 struct mmc_data *data = host->mrq->cmd->data;
420 char *buffer;
1da177e4 421 int i, fsr, fifo;
fecf92ba 422
1da177e4
LT
423 /*
424 * Handle excessive data.
425 */
14d836e7 426 if (host->num_sg == 0)
1da177e4 427 return;
fecf92ba 428
4a0ddbd2 429 buffer = wbsd_sg_to_buffer(host) + host->offset;
1da177e4
LT
430
431 /*
432 * Drain the fifo. This has a tendency to loop longer
433 * than the FIFO length (usually one block).
434 */
cfa7f521 435 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_EMPTY)) {
1da177e4
LT
436 /*
437 * The size field in the FSR is broken so we have to
438 * do some guessing.
fecf92ba 439 */
1da177e4
LT
440 if (fsr & WBSD_FIFO_FULL)
441 fifo = 16;
442 else if (fsr & WBSD_FIFO_FUTHRE)
443 fifo = 8;
444 else
445 fifo = 1;
fecf92ba 446
cfa7f521 447 for (i = 0; i < fifo; i++) {
1da177e4
LT
448 *buffer = inb(host->base + WBSD_DFR);
449 buffer++;
450 host->offset++;
451 host->remain--;
452
453 data->bytes_xfered++;
fecf92ba 454
1da177e4
LT
455 /*
456 * End of scatter list entry?
457 */
cfa7f521 458 if (host->remain == 0) {
1da177e4
LT
459 /*
460 * Get next entry. Check if last.
461 */
14d836e7 462 if (!wbsd_next_sg(host))
1da177e4 463 return;
fecf92ba 464
4a0ddbd2 465 buffer = wbsd_sg_to_buffer(host);
1da177e4
LT
466 }
467 }
468 }
fecf92ba 469
1da177e4
LT
470 /*
471 * This is a very dirty hack to solve a
472 * hardware problem. The chip doesn't trigger
473 * FIFO threshold interrupts properly.
474 */
14d836e7 475 if ((data->blocks * data->blksz - data->bytes_xfered) < 16)
1da177e4
LT
476 tasklet_schedule(&host->fifo_tasklet);
477}
478
cfa7f521 479static void wbsd_fill_fifo(struct wbsd_host *host)
1da177e4 480{
cfa7f521
PO
481 struct mmc_data *data = host->mrq->cmd->data;
482 char *buffer;
1da177e4 483 int i, fsr, fifo;
fecf92ba 484
1da177e4
LT
485 /*
486 * Check that we aren't being called after the
487 * entire buffer has been transfered.
488 */
14d836e7 489 if (host->num_sg == 0)
1da177e4
LT
490 return;
491
4a0ddbd2 492 buffer = wbsd_sg_to_buffer(host) + host->offset;
1da177e4
LT
493
494 /*
495 * Fill the fifo. This has a tendency to loop longer
496 * than the FIFO length (usually one block).
497 */
cfa7f521 498 while (!((fsr = inb(host->base + WBSD_FSR)) & WBSD_FIFO_FULL)) {
1da177e4
LT
499 /*
500 * The size field in the FSR is broken so we have to
501 * do some guessing.
fecf92ba 502 */
1da177e4
LT
503 if (fsr & WBSD_FIFO_EMPTY)
504 fifo = 0;
505 else if (fsr & WBSD_FIFO_EMTHRE)
506 fifo = 8;
507 else
508 fifo = 15;
509
cfa7f521 510 for (i = 16; i > fifo; i--) {
1da177e4
LT
511 outb(*buffer, host->base + WBSD_DFR);
512 buffer++;
513 host->offset++;
514 host->remain--;
fecf92ba 515
1da177e4 516 data->bytes_xfered++;
fecf92ba 517
1da177e4
LT
518 /*
519 * End of scatter list entry?
520 */
cfa7f521 521 if (host->remain == 0) {
1da177e4
LT
522 /*
523 * Get next entry. Check if last.
524 */
14d836e7 525 if (!wbsd_next_sg(host))
1da177e4 526 return;
fecf92ba 527
4a0ddbd2 528 buffer = wbsd_sg_to_buffer(host);
1da177e4
LT
529 }
530 }
531 }
fecf92ba 532
85bcc130
PO
533 /*
534 * The controller stops sending interrupts for
535 * 'FIFO empty' under certain conditions. So we
536 * need to be a bit more pro-active.
537 */
538 tasklet_schedule(&host->fifo_tasklet);
1da177e4
LT
539}
540
cfa7f521 541static void wbsd_prepare_data(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
542{
543 u16 blksize;
544 u8 setup;
545 unsigned long dmaflags;
14d836e7 546 unsigned int size;
1da177e4 547
1da177e4
LT
548 /*
549 * Calculate size.
550 */
14d836e7 551 size = data->blocks * data->blksz;
1da177e4
LT
552
553 /*
554 * Check timeout values for overflow.
555 * (Yes, some cards cause this value to overflow).
556 */
557 if (data->timeout_ns > 127000000)
558 wbsd_write_index(host, WBSD_IDX_TAAC, 127);
cfa7f521
PO
559 else {
560 wbsd_write_index(host, WBSD_IDX_TAAC,
561 data->timeout_ns / 1000000);
562 }
fecf92ba 563
1da177e4
LT
564 if (data->timeout_clks > 255)
565 wbsd_write_index(host, WBSD_IDX_NSAC, 255);
566 else
567 wbsd_write_index(host, WBSD_IDX_NSAC, data->timeout_clks);
fecf92ba 568
1da177e4
LT
569 /*
570 * Inform the chip of how large blocks will be
571 * sent. It needs this to determine when to
572 * calculate CRC.
573 *
574 * Space for CRC must be included in the size.
65ae2118 575 * Two bytes are needed for each data line.
1da177e4 576 */
cfa7f521 577 if (host->bus_width == MMC_BUS_WIDTH_1) {
2c171bf1 578 blksize = data->blksz + 2;
65ae2118
PO
579
580 wbsd_write_index(host, WBSD_IDX_PBSMSB, (blksize >> 4) & 0xF0);
581 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
cfa7f521 582 } else if (host->bus_width == MMC_BUS_WIDTH_4) {
2c171bf1 583 blksize = data->blksz + 2 * 4;
fecf92ba 584
cfa7f521
PO
585 wbsd_write_index(host, WBSD_IDX_PBSMSB,
586 ((blksize >> 4) & 0xF0) | WBSD_DATA_WIDTH);
65ae2118 587 wbsd_write_index(host, WBSD_IDX_PBSLSB, blksize & 0xFF);
cfa7f521 588 } else {
17b0429d 589 data->error = -EINVAL;
65ae2118
PO
590 return;
591 }
1da177e4
LT
592
593 /*
594 * Clear the FIFO. This is needed even for DMA
595 * transfers since the chip still uses the FIFO
596 * internally.
597 */
598 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
599 setup |= WBSD_FIFO_RESET;
600 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 601
1da177e4
LT
602 /*
603 * DMA transfer?
604 */
cfa7f521 605 if (host->dma >= 0) {
1da177e4
LT
606 /*
607 * The buffer for DMA is only 64 kB.
608 */
14d836e7
AD
609 BUG_ON(size > 0x10000);
610 if (size > 0x10000) {
17b0429d 611 data->error = -EINVAL;
1da177e4
LT
612 return;
613 }
fecf92ba 614
1da177e4
LT
615 /*
616 * Transfer data from the SG list to
617 * the DMA buffer.
618 */
619 if (data->flags & MMC_DATA_WRITE)
620 wbsd_sg_to_dma(host, data);
fecf92ba 621
1da177e4
LT
622 /*
623 * Initialise the ISA DMA controller.
fecf92ba 624 */
1da177e4
LT
625 dmaflags = claim_dma_lock();
626 disable_dma(host->dma);
627 clear_dma_ff(host->dma);
628 if (data->flags & MMC_DATA_READ)
629 set_dma_mode(host->dma, DMA_MODE_READ & ~0x40);
630 else
631 set_dma_mode(host->dma, DMA_MODE_WRITE & ~0x40);
632 set_dma_addr(host->dma, host->dma_addr);
14d836e7 633 set_dma_count(host->dma, size);
1da177e4
LT
634
635 enable_dma(host->dma);
636 release_dma_lock(dmaflags);
637
638 /*
639 * Enable DMA on the host.
640 */
641 wbsd_write_index(host, WBSD_IDX_DMA, WBSD_DMA_ENABLE);
cfa7f521 642 } else {
1da177e4
LT
643 /*
644 * This flag is used to keep printk
645 * output to a minimum.
646 */
647 host->firsterr = 1;
fecf92ba 648
1da177e4
LT
649 /*
650 * Initialise the SG list.
651 */
652 wbsd_init_sg(host, data);
fecf92ba 653
1da177e4
LT
654 /*
655 * Turn off DMA.
656 */
657 wbsd_write_index(host, WBSD_IDX_DMA, 0);
fecf92ba 658
1da177e4
LT
659 /*
660 * Set up FIFO threshold levels (and fill
661 * buffer if doing a write).
662 */
cfa7f521 663 if (data->flags & MMC_DATA_READ) {
1da177e4
LT
664 wbsd_write_index(host, WBSD_IDX_FIFOEN,
665 WBSD_FIFOEN_FULL | 8);
cfa7f521 666 } else {
1da177e4
LT
667 wbsd_write_index(host, WBSD_IDX_FIFOEN,
668 WBSD_FIFOEN_EMPTY | 8);
669 wbsd_fill_fifo(host);
670 }
fecf92ba
PO
671 }
672
17b0429d 673 data->error = 0;
1da177e4
LT
674}
675
cfa7f521 676static void wbsd_finish_data(struct wbsd_host *host, struct mmc_data *data)
1da177e4
LT
677{
678 unsigned long dmaflags;
679 int count;
680 u8 status;
fecf92ba 681
1da177e4
LT
682 WARN_ON(host->mrq == NULL);
683
684 /*
685 * Send a stop command if needed.
686 */
687 if (data->stop)
688 wbsd_send_command(host, data->stop);
689
690 /*
691 * Wait for the controller to leave data
692 * transfer state.
693 */
cfa7f521 694 do {
1da177e4
LT
695 status = wbsd_read_index(host, WBSD_IDX_STATUS);
696 } while (status & (WBSD_BLOCK_READ | WBSD_BLOCK_WRITE));
fecf92ba 697
1da177e4
LT
698 /*
699 * DMA transfer?
700 */
cfa7f521 701 if (host->dma >= 0) {
1da177e4
LT
702 /*
703 * Disable DMA on the host.
704 */
705 wbsd_write_index(host, WBSD_IDX_DMA, 0);
fecf92ba 706
1da177e4
LT
707 /*
708 * Turn of ISA DMA controller.
709 */
710 dmaflags = claim_dma_lock();
711 disable_dma(host->dma);
712 clear_dma_ff(host->dma);
713 count = get_dma_residue(host->dma);
714 release_dma_lock(dmaflags);
fecf92ba 715
14d836e7
AD
716 data->bytes_xfered = host->mrq->data->blocks *
717 host->mrq->data->blksz - count;
718 data->bytes_xfered -= data->bytes_xfered % data->blksz;
719
1da177e4
LT
720 /*
721 * Any leftover data?
722 */
cfa7f521 723 if (count) {
d191634f
PO
724 printk(KERN_ERR "%s: Incomplete DMA transfer. "
725 "%d bytes left.\n",
726 mmc_hostname(host->mmc), count);
fecf92ba 727
17b0429d
PO
728 if (!data->error)
729 data->error = -EIO;
cfa7f521 730 } else {
1da177e4
LT
731 /*
732 * Transfer data from DMA buffer to
733 * SG list.
734 */
735 if (data->flags & MMC_DATA_READ)
736 wbsd_dma_to_sg(host, data);
14d836e7 737 }
fecf92ba 738
17b0429d 739 if (data->error) {
14d836e7
AD
740 if (data->bytes_xfered)
741 data->bytes_xfered -= data->blksz;
1da177e4
LT
742 }
743 }
fecf92ba 744
1da177e4
LT
745 wbsd_request_end(host, host->mrq);
746}
747
85bcc130
PO
748/*****************************************************************************\
749 * *
750 * MMC layer callbacks *
751 * *
752\*****************************************************************************/
1da177e4 753
cfa7f521 754static void wbsd_request(struct mmc_host *mmc, struct mmc_request *mrq)
1da177e4 755{
cfa7f521
PO
756 struct wbsd_host *host = mmc_priv(mmc);
757 struct mmc_command *cmd;
1da177e4
LT
758
759 /*
760 * Disable tasklets to avoid a deadlock.
761 */
762 spin_lock_bh(&host->lock);
763
764 BUG_ON(host->mrq != NULL);
765
766 cmd = mrq->cmd;
767
768 host->mrq = mrq;
fecf92ba 769
1da177e4 770 /*
17b0429d 771 * Check that there is actually a card in the slot.
1da177e4 772 */
cfa7f521 773 if (!(host->flags & WBSD_FCARD_PRESENT)) {
17b0429d 774 cmd->error = -ENOMEDIUM;
1da177e4
LT
775 goto done;
776 }
777
cfa7f521 778 if (cmd->data) {
5ba593a9
PO
779 /*
780 * The hardware is so delightfully stupid that it has a list
781 * of "data" commands. If a command isn't on this list, it'll
782 * just go back to the idle state and won't send any data
783 * interrupts.
784 */
785 switch (cmd->opcode) {
786 case 11:
787 case 17:
788 case 18:
789 case 20:
790 case 24:
791 case 25:
792 case 26:
793 case 27:
794 case 30:
795 case 42:
796 case 56:
797 break;
798
799 /* ACMDs. We don't keep track of state, so we just treat them
800 * like any other command. */
801 case 51:
802 break;
803
804 default:
805#ifdef CONFIG_MMC_DEBUG
806 printk(KERN_WARNING "%s: Data command %d is not "
807 "supported by this controller.\n",
808 mmc_hostname(host->mmc), cmd->opcode);
809#endif
17b0429d 810 cmd->error = -EINVAL;
5ba593a9
PO
811
812 goto done;
813 };
b2670b1c 814 }
5ba593a9 815
b2670b1c
PO
816 /*
817 * Does the request include data?
818 */
819 if (cmd->data) {
820 wbsd_prepare_data(host, cmd->data);
821
17b0429d 822 if (cmd->data->error)
b2670b1c
PO
823 goto done;
824 }
825
826 wbsd_send_command(host, cmd);
827
828 /*
829 * If this is a data transfer the request
830 * will be finished after the data has
831 * transfered.
832 */
17b0429d 833 if (cmd->data && !cmd->error) {
1da177e4
LT
834 /*
835 * Dirty fix for hardware bug.
836 */
837 if (host->dma == -1)
838 tasklet_schedule(&host->fifo_tasklet);
839
840 spin_unlock_bh(&host->lock);
841
842 return;
843 }
fecf92ba 844
1da177e4
LT
845done:
846 wbsd_request_end(host, mrq);
847
848 spin_unlock_bh(&host->lock);
849}
850
cfa7f521 851static void wbsd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1da177e4 852{
cfa7f521 853 struct wbsd_host *host = mmc_priv(mmc);
1da177e4 854 u8 clk, setup, pwr;
fecf92ba 855
1da177e4
LT
856 spin_lock_bh(&host->lock);
857
858 /*
859 * Reset the chip on each power off.
860 * Should clear out any weird states.
861 */
862 if (ios->power_mode == MMC_POWER_OFF)
863 wbsd_init_device(host);
fecf92ba 864
1da177e4
LT
865 if (ios->clock >= 24000000)
866 clk = WBSD_CLK_24M;
867 else if (ios->clock >= 16000000)
868 clk = WBSD_CLK_16M;
869 else if (ios->clock >= 12000000)
870 clk = WBSD_CLK_12M;
871 else
872 clk = WBSD_CLK_375K;
873
874 /*
875 * Only write to the clock register when
876 * there is an actual change.
877 */
cfa7f521 878 if (clk != host->clk) {
1da177e4
LT
879 wbsd_write_index(host, WBSD_IDX_CLK, clk);
880 host->clk = clk;
881 }
882
85bcc130
PO
883 /*
884 * Power up card.
885 */
cfa7f521 886 if (ios->power_mode != MMC_POWER_OFF) {
1da177e4
LT
887 pwr = inb(host->base + WBSD_CSR);
888 pwr &= ~WBSD_POWER_N;
889 outb(pwr, host->base + WBSD_CSR);
1da177e4
LT
890 }
891
85bcc130
PO
892 /*
893 * MMC cards need to have pin 1 high during init.
85bcc130 894 * It wreaks havoc with the card detection though so
1656fa57 895 * that needs to be disabled.
85bcc130
PO
896 */
897 setup = wbsd_read_index(host, WBSD_IDX_SETUP);
cfa7f521 898 if (ios->chip_select == MMC_CS_HIGH) {
65ae2118 899 BUG_ON(ios->bus_width != MMC_BUS_WIDTH_1);
85bcc130
PO
900 setup |= WBSD_DAT3_H;
901 host->flags |= WBSD_FIGNORE_DETECT;
cfa7f521
PO
902 } else {
903 if (setup & WBSD_DAT3_H) {
19c1f3ca 904 setup &= ~WBSD_DAT3_H;
1656fa57 905
19c1f3ca
PO
906 /*
907 * We cannot resume card detection immediatly
908 * because of capacitance and delays in the chip.
909 */
cfa7f521 910 mod_timer(&host->ignore_timer, jiffies + HZ / 100);
19c1f3ca 911 }
85bcc130
PO
912 }
913 wbsd_write_index(host, WBSD_IDX_SETUP, setup);
fecf92ba 914
65ae2118
PO
915 /*
916 * Store bus width for later. Will be used when
917 * setting up the data transfer.
918 */
919 host->bus_width = ios->bus_width;
920
1da177e4
LT
921 spin_unlock_bh(&host->lock);
922}
923
cfa7f521 924static int wbsd_get_ro(struct mmc_host *mmc)
65ae2118 925{
cfa7f521 926 struct wbsd_host *host = mmc_priv(mmc);
65ae2118
PO
927 u8 csr;
928
929 spin_lock_bh(&host->lock);
930
931 csr = inb(host->base + WBSD_CSR);
932 csr |= WBSD_MSLED;
933 outb(csr, host->base + WBSD_CSR);
934
935 mdelay(1);
936
937 csr = inb(host->base + WBSD_CSR);
938 csr &= ~WBSD_MSLED;
939 outb(csr, host->base + WBSD_CSR);
940
941 spin_unlock_bh(&host->lock);
942
08f80bb5 943 return !!(csr & WBSD_WRPT);
65ae2118
PO
944}
945
ab7aefd0 946static const struct mmc_host_ops wbsd_ops = {
85bcc130
PO
947 .request = wbsd_request,
948 .set_ios = wbsd_set_ios,
65ae2118 949 .get_ro = wbsd_get_ro,
85bcc130
PO
950};
951
952/*****************************************************************************\
953 * *
954 * Interrupt handling *
955 * *
956\*****************************************************************************/
957
1656fa57
PO
958/*
959 * Helper function to reset detection ignore
960 */
961
962static void wbsd_reset_ignore(unsigned long data)
963{
cfa7f521 964 struct wbsd_host *host = (struct wbsd_host *)data;
1656fa57
PO
965
966 BUG_ON(host == NULL);
967
968 DBG("Resetting card detection ignore\n");
969
970 spin_lock_bh(&host->lock);
971
972 host->flags &= ~WBSD_FIGNORE_DETECT;
973
974 /*
975 * Card status might have changed during the
976 * blackout.
977 */
978 tasklet_schedule(&host->card_tasklet);
979
980 spin_unlock_bh(&host->lock);
981}
982
1da177e4
LT
983/*
984 * Tasklets
985 */
986
cfa7f521 987static inline struct mmc_data *wbsd_get_data(struct wbsd_host *host)
1da177e4
LT
988{
989 WARN_ON(!host->mrq);
990 if (!host->mrq)
991 return NULL;
992
993 WARN_ON(!host->mrq->cmd);
994 if (!host->mrq->cmd)
995 return NULL;
996
997 WARN_ON(!host->mrq->cmd->data);
998 if (!host->mrq->cmd->data)
999 return NULL;
fecf92ba 1000
1da177e4
LT
1001 return host->mrq->cmd->data;
1002}
1003
1004static void wbsd_tasklet_card(unsigned long param)
1005{
cfa7f521 1006 struct wbsd_host *host = (struct wbsd_host *)param;
1da177e4 1007 u8 csr;
210ce2a7 1008 int delay = -1;
fecf92ba 1009
1da177e4 1010 spin_lock(&host->lock);
fecf92ba 1011
cfa7f521 1012 if (host->flags & WBSD_FIGNORE_DETECT) {
85bcc130
PO
1013 spin_unlock(&host->lock);
1014 return;
1015 }
fecf92ba 1016
1da177e4
LT
1017 csr = inb(host->base + WBSD_CSR);
1018 WARN_ON(csr == 0xff);
fecf92ba 1019
cfa7f521
PO
1020 if (csr & WBSD_CARDPRESENT) {
1021 if (!(host->flags & WBSD_FCARD_PRESENT)) {
85bcc130
PO
1022 DBG("Card inserted\n");
1023 host->flags |= WBSD_FCARD_PRESENT;
fecf92ba 1024
210ce2a7 1025 delay = 500;
85bcc130 1026 }
cfa7f521 1027 } else if (host->flags & WBSD_FCARD_PRESENT) {
1da177e4 1028 DBG("Card removed\n");
85bcc130 1029 host->flags &= ~WBSD_FCARD_PRESENT;
fecf92ba 1030
cfa7f521 1031 if (host->mrq) {
d191634f
PO
1032 printk(KERN_ERR "%s: Card removed during transfer!\n",
1033 mmc_hostname(host->mmc));
1da177e4 1034 wbsd_reset(host);
fecf92ba 1035
17b0429d 1036 host->mrq->cmd->error = -ENOMEDIUM;
1da177e4
LT
1037 tasklet_schedule(&host->finish_tasklet);
1038 }
fecf92ba 1039
210ce2a7 1040 delay = 0;
6e6293dd 1041 }
210ce2a7
PO
1042
1043 /*
1044 * Unlock first since we might get a call back.
1045 */
1046
1047 spin_unlock(&host->lock);
1048
1049 if (delay != -1)
1050 mmc_detect_change(host->mmc, msecs_to_jiffies(delay));
1da177e4
LT
1051}
1052
1053static void wbsd_tasklet_fifo(unsigned long param)
1054{
cfa7f521
PO
1055 struct wbsd_host *host = (struct wbsd_host *)param;
1056 struct mmc_data *data;
fecf92ba 1057
1da177e4 1058 spin_lock(&host->lock);
fecf92ba 1059
1da177e4
LT
1060 if (!host->mrq)
1061 goto end;
fecf92ba 1062
1da177e4
LT
1063 data = wbsd_get_data(host);
1064 if (!data)
1065 goto end;
1066
1067 if (data->flags & MMC_DATA_WRITE)
1068 wbsd_fill_fifo(host);
1069 else
1070 wbsd_empty_fifo(host);
1071
1072 /*
1073 * Done?
1074 */
14d836e7 1075 if (host->num_sg == 0) {
1da177e4
LT
1076 wbsd_write_index(host, WBSD_IDX_FIFOEN, 0);
1077 tasklet_schedule(&host->finish_tasklet);
1078 }
1079
fecf92ba 1080end:
1da177e4
LT
1081 spin_unlock(&host->lock);
1082}
1083
1084static void wbsd_tasklet_crc(unsigned long param)
1085{
cfa7f521
PO
1086 struct wbsd_host *host = (struct wbsd_host *)param;
1087 struct mmc_data *data;
fecf92ba 1088
1da177e4 1089 spin_lock(&host->lock);
fecf92ba 1090
1da177e4
LT
1091 if (!host->mrq)
1092 goto end;
fecf92ba 1093
1da177e4
LT
1094 data = wbsd_get_data(host);
1095 if (!data)
1096 goto end;
fecf92ba 1097
1da177e4
LT
1098 DBGF("CRC error\n");
1099
17b0429d 1100 data->error = -EILSEQ;
fecf92ba 1101
1da177e4
LT
1102 tasklet_schedule(&host->finish_tasklet);
1103
fecf92ba 1104end:
1da177e4
LT
1105 spin_unlock(&host->lock);
1106}
1107
1108static void wbsd_tasklet_timeout(unsigned long param)
1109{
cfa7f521
PO
1110 struct wbsd_host *host = (struct wbsd_host *)param;
1111 struct mmc_data *data;
fecf92ba 1112
1da177e4 1113 spin_lock(&host->lock);
fecf92ba 1114
1da177e4
LT
1115 if (!host->mrq)
1116 goto end;
fecf92ba 1117
1da177e4
LT
1118 data = wbsd_get_data(host);
1119 if (!data)
1120 goto end;
fecf92ba 1121
1da177e4
LT
1122 DBGF("Timeout\n");
1123
17b0429d 1124 data->error = -ETIMEDOUT;
fecf92ba 1125
1da177e4
LT
1126 tasklet_schedule(&host->finish_tasklet);
1127
fecf92ba 1128end:
1da177e4
LT
1129 spin_unlock(&host->lock);
1130}
1131
1132static void wbsd_tasklet_finish(unsigned long param)
1133{
cfa7f521
PO
1134 struct wbsd_host *host = (struct wbsd_host *)param;
1135 struct mmc_data *data;
fecf92ba 1136
1da177e4 1137 spin_lock(&host->lock);
fecf92ba 1138
1da177e4
LT
1139 WARN_ON(!host->mrq);
1140 if (!host->mrq)
1141 goto end;
fecf92ba 1142
1da177e4
LT
1143 data = wbsd_get_data(host);
1144 if (!data)
1145 goto end;
1146
1147 wbsd_finish_data(host, data);
fecf92ba
PO
1148
1149end:
1da177e4
LT
1150 spin_unlock(&host->lock);
1151}
1152
1da177e4
LT
1153/*
1154 * Interrupt handling
1155 */
1156
7d12e780 1157static irqreturn_t wbsd_irq(int irq, void *dev_id)
1da177e4 1158{
cfa7f521 1159 struct wbsd_host *host = dev_id;
1da177e4 1160 int isr;
fecf92ba 1161
1da177e4
LT
1162 isr = inb(host->base + WBSD_ISR);
1163
1164 /*
1165 * Was it actually our hardware that caused the interrupt?
1166 */
1167 if (isr == 0xff || isr == 0x00)
1168 return IRQ_NONE;
fecf92ba 1169
1da177e4
LT
1170 host->isr |= isr;
1171
1172 /*
1173 * Schedule tasklets as needed.
1174 */
1175 if (isr & WBSD_INT_CARD)
1176 tasklet_schedule(&host->card_tasklet);
1177 if (isr & WBSD_INT_FIFO_THRE)
1178 tasklet_schedule(&host->fifo_tasklet);
1179 if (isr & WBSD_INT_CRC)
1180 tasklet_hi_schedule(&host->crc_tasklet);
1181 if (isr & WBSD_INT_TIMEOUT)
1182 tasklet_hi_schedule(&host->timeout_tasklet);
1da177e4
LT
1183 if (isr & WBSD_INT_TC)
1184 tasklet_schedule(&host->finish_tasklet);
fecf92ba 1185
1da177e4
LT
1186 return IRQ_HANDLED;
1187}
1188
85bcc130
PO
1189/*****************************************************************************\
1190 * *
1191 * Device initialisation and shutdown *
1192 * *
1193\*****************************************************************************/
1194
1da177e4 1195/*
85bcc130 1196 * Allocate/free MMC structure.
1da177e4
LT
1197 */
1198
cfa7f521 1199static int __devinit wbsd_alloc_mmc(struct device *dev)
85bcc130 1200{
cfa7f521
PO
1201 struct mmc_host *mmc;
1202 struct wbsd_host *host;
fecf92ba 1203
85bcc130
PO
1204 /*
1205 * Allocate MMC structure.
1206 */
1207 mmc = mmc_alloc_host(sizeof(struct wbsd_host), dev);
1208 if (!mmc)
1209 return -ENOMEM;
fecf92ba 1210
85bcc130
PO
1211 host = mmc_priv(mmc);
1212 host->mmc = mmc;
1213
1214 host->dma = -1;
1215
1216 /*
1217 * Set host parameters.
1218 */
1219 mmc->ops = &wbsd_ops;
1220 mmc->f_min = 375000;
1221 mmc->f_max = 24000000;
cfa7f521 1222 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
23af6039 1223 mmc->caps = MMC_CAP_4_BIT_DATA;
fecf92ba 1224
85bcc130 1225 spin_lock_init(&host->lock);
fecf92ba 1226
6e6293dd 1227 /*
1656fa57 1228 * Set up timers
6e6293dd 1229 */
1656fa57
PO
1230 init_timer(&host->ignore_timer);
1231 host->ignore_timer.data = (unsigned long)host;
1232 host->ignore_timer.function = wbsd_reset_ignore;
fecf92ba 1233
85bcc130
PO
1234 /*
1235 * Maximum number of segments. Worst case is one sector per segment
1236 * so this will be 64kB/512.
1237 */
1238 mmc->max_hw_segs = 128;
1239 mmc->max_phys_segs = 128;
fecf92ba 1240
85bcc130 1241 /*
55db890a 1242 * Maximum request size. Also limited by 64KiB buffer.
85bcc130 1243 */
55db890a 1244 mmc->max_req_size = 65536;
fecf92ba 1245
85bcc130
PO
1246 /*
1247 * Maximum segment size. Could be one segment with the maximum number
55db890a 1248 * of bytes.
85bcc130 1249 */
55db890a 1250 mmc->max_seg_size = mmc->max_req_size;
fecf92ba 1251
fe4a3c7a
PO
1252 /*
1253 * Maximum block size. We have 12 bits (= 4095) but have to subtract
1254 * space for CRC. So the maximum is 4095 - 4*2 = 4087.
1255 */
1256 mmc->max_blk_size = 4087;
1257
55db890a
PO
1258 /*
1259 * Maximum block count. There is no real limit so the maximum
1260 * request size will be the only restriction.
1261 */
1262 mmc->max_blk_count = mmc->max_req_size;
1263
85bcc130 1264 dev_set_drvdata(dev, mmc);
fecf92ba 1265
85bcc130
PO
1266 return 0;
1267}
1268
b3627bb1 1269static void wbsd_free_mmc(struct device *dev)
85bcc130 1270{
cfa7f521
PO
1271 struct mmc_host *mmc;
1272 struct wbsd_host *host;
fecf92ba 1273
85bcc130
PO
1274 mmc = dev_get_drvdata(dev);
1275 if (!mmc)
1276 return;
fecf92ba 1277
6e6293dd
PO
1278 host = mmc_priv(mmc);
1279 BUG_ON(host == NULL);
fecf92ba 1280
1656fa57 1281 del_timer_sync(&host->ignore_timer);
fecf92ba 1282
85bcc130 1283 mmc_free_host(mmc);
fecf92ba 1284
85bcc130
PO
1285 dev_set_drvdata(dev, NULL);
1286}
1287
1288/*
1289 * Scan for known chip id:s
1290 */
1291
cfa7f521 1292static int __devinit wbsd_scan(struct wbsd_host *host)
1da177e4
LT
1293{
1294 int i, j, k;
1295 int id;
fecf92ba 1296
1da177e4
LT
1297 /*
1298 * Iterate through all ports, all codes to
1299 * find hardware that is in our known list.
1300 */
63648fb5 1301 for (i = 0; i < ARRAY_SIZE(config_ports); i++) {
1da177e4
LT
1302 if (!request_region(config_ports[i], 2, DRIVER_NAME))
1303 continue;
fecf92ba 1304
63648fb5 1305 for (j = 0; j < ARRAY_SIZE(unlock_codes); j++) {
1da177e4 1306 id = 0xFFFF;
fecf92ba 1307
19c1f3ca
PO
1308 host->config = config_ports[i];
1309 host->unlock_code = unlock_codes[j];
1310
1311 wbsd_unlock_config(host);
fecf92ba 1312
1da177e4
LT
1313 outb(WBSD_CONF_ID_HI, config_ports[i]);
1314 id = inb(config_ports[i] + 1) << 8;
1315
1316 outb(WBSD_CONF_ID_LO, config_ports[i]);
1317 id |= inb(config_ports[i] + 1);
fecf92ba 1318
19c1f3ca
PO
1319 wbsd_lock_config(host);
1320
63648fb5 1321 for (k = 0; k < ARRAY_SIZE(valid_ids); k++) {
cfa7f521 1322 if (id == valid_ids[k]) {
1da177e4 1323 host->chip_id = id;
fecf92ba 1324
1da177e4
LT
1325 return 0;
1326 }
1327 }
fecf92ba 1328
cfa7f521 1329 if (id != 0xFFFF) {
1da177e4
LT
1330 DBG("Unknown hardware (id %x) found at %x\n",
1331 id, config_ports[i]);
1332 }
1da177e4 1333 }
fecf92ba 1334
1da177e4
LT
1335 release_region(config_ports[i], 2);
1336 }
fecf92ba 1337
19c1f3ca
PO
1338 host->config = 0;
1339 host->unlock_code = 0;
1340
1da177e4
LT
1341 return -ENODEV;
1342}
1343
85bcc130
PO
1344/*
1345 * Allocate/free io port ranges
1346 */
1347
cfa7f521 1348static int __devinit wbsd_request_region(struct wbsd_host *host, int base)
1da177e4 1349{
916f3ac6 1350 if (base & 0x7)
1da177e4 1351 return -EINVAL;
fecf92ba 1352
85bcc130 1353 if (!request_region(base, 8, DRIVER_NAME))
1da177e4 1354 return -EIO;
fecf92ba 1355
916f3ac6 1356 host->base = base;
fecf92ba 1357
1da177e4
LT
1358 return 0;
1359}
1360
b3627bb1 1361static void wbsd_release_regions(struct wbsd_host *host)
1da177e4
LT
1362{
1363 if (host->base)
1364 release_region(host->base, 8);
fecf92ba 1365
85bcc130 1366 host->base = 0;
1da177e4
LT
1367
1368 if (host->config)
1369 release_region(host->config, 2);
fecf92ba 1370
85bcc130 1371 host->config = 0;
1da177e4
LT
1372}
1373
85bcc130
PO
1374/*
1375 * Allocate/free DMA port and buffer
1376 */
1377
cfa7f521 1378static void __devinit wbsd_request_dma(struct wbsd_host *host, int dma)
1da177e4 1379{
1da177e4
LT
1380 if (dma < 0)
1381 return;
fecf92ba 1382
1da177e4
LT
1383 if (request_dma(dma, DRIVER_NAME))
1384 goto err;
fecf92ba 1385
1da177e4
LT
1386 /*
1387 * We need to allocate a special buffer in
1388 * order for ISA to be able to DMA to it.
1389 */
85bcc130 1390 host->dma_buffer = kmalloc(WBSD_DMA_SIZE,
1da177e4
LT
1391 GFP_NOIO | GFP_DMA | __GFP_REPEAT | __GFP_NOWARN);
1392 if (!host->dma_buffer)
1393 goto free;
1394
1395 /*
1396 * Translate the address to a physical address.
1397 */
fcaf71fd 1398 host->dma_addr = dma_map_single(mmc_dev(host->mmc), host->dma_buffer,
85bcc130 1399 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
fecf92ba 1400
1da177e4
LT
1401 /*
1402 * ISA DMA must be aligned on a 64k basis.
1403 */
1404 if ((host->dma_addr & 0xffff) != 0)
1405 goto kfree;
1406 /*
1407 * ISA cannot access memory above 16 MB.
1408 */
1409 else if (host->dma_addr >= 0x1000000)
1410 goto kfree;
1411
1412 host->dma = dma;
fecf92ba 1413
1da177e4 1414 return;
fecf92ba 1415
1da177e4
LT
1416kfree:
1417 /*
1418 * If we've gotten here then there is some kind of alignment bug
1419 */
1420 BUG_ON(1);
fecf92ba 1421
fcaf71fd 1422 dma_unmap_single(mmc_dev(host->mmc), host->dma_addr,
cfa7f521 1423 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
97067d55 1424 host->dma_addr = 0;
fecf92ba 1425
1da177e4
LT
1426 kfree(host->dma_buffer);
1427 host->dma_buffer = NULL;
1428
1429free:
1430 free_dma(dma);
1431
1432err:
1433 printk(KERN_WARNING DRIVER_NAME ": Unable to allocate DMA %d. "
1434 "Falling back on FIFO.\n", dma);
1435}
1436
b3627bb1 1437static void wbsd_release_dma(struct wbsd_host *host)
85bcc130 1438{
cfa7f521 1439 if (host->dma_addr) {
fcaf71fd 1440 dma_unmap_single(mmc_dev(host->mmc), host->dma_addr,
cfa7f521
PO
1441 WBSD_DMA_SIZE, DMA_BIDIRECTIONAL);
1442 }
6044ec88 1443 kfree(host->dma_buffer);
85bcc130
PO
1444 if (host->dma >= 0)
1445 free_dma(host->dma);
fecf92ba 1446
85bcc130
PO
1447 host->dma = -1;
1448 host->dma_buffer = NULL;
97067d55 1449 host->dma_addr = 0;
85bcc130 1450}
1da177e4
LT
1451
1452/*
85bcc130 1453 * Allocate/free IRQ.
1da177e4
LT
1454 */
1455
cfa7f521 1456static int __devinit wbsd_request_irq(struct wbsd_host *host, int irq)
1da177e4 1457{
1da177e4 1458 int ret;
fecf92ba 1459
1da177e4 1460 /*
cef33400 1461 * Set up tasklets. Must be done before requesting interrupt.
1da177e4 1462 */
cfa7f521
PO
1463 tasklet_init(&host->card_tasklet, wbsd_tasklet_card,
1464 (unsigned long)host);
1465 tasklet_init(&host->fifo_tasklet, wbsd_tasklet_fifo,
1466 (unsigned long)host);
1467 tasklet_init(&host->crc_tasklet, wbsd_tasklet_crc,
1468 (unsigned long)host);
1469 tasklet_init(&host->timeout_tasklet, wbsd_tasklet_timeout,
1470 (unsigned long)host);
1471 tasklet_init(&host->finish_tasklet, wbsd_tasklet_finish,
1472 (unsigned long)host);
fecf92ba 1473
cef33400
CE
1474 /*
1475 * Allocate interrupt.
1476 */
1477 ret = request_irq(irq, wbsd_irq, IRQF_SHARED, DRIVER_NAME, host);
1478 if (ret)
1479 return ret;
1480
1481 host->irq = irq;
1482
85bcc130
PO
1483 return 0;
1484}
1da177e4 1485
b3627bb1 1486static void wbsd_release_irq(struct wbsd_host *host)
85bcc130
PO
1487{
1488 if (!host->irq)
1489 return;
1da177e4 1490
85bcc130 1491 free_irq(host->irq, host);
fecf92ba 1492
85bcc130 1493 host->irq = 0;
fecf92ba 1494
85bcc130
PO
1495 tasklet_kill(&host->card_tasklet);
1496 tasklet_kill(&host->fifo_tasklet);
1497 tasklet_kill(&host->crc_tasklet);
1498 tasklet_kill(&host->timeout_tasklet);
1499 tasklet_kill(&host->finish_tasklet);
85bcc130
PO
1500}
1501
1502/*
1503 * Allocate all resources for the host.
1504 */
1505
cfa7f521 1506static int __devinit wbsd_request_resources(struct wbsd_host *host,
85bcc130
PO
1507 int base, int irq, int dma)
1508{
1509 int ret;
fecf92ba 1510
1da177e4
LT
1511 /*
1512 * Allocate I/O ports.
1513 */
85bcc130 1514 ret = wbsd_request_region(host, base);
1da177e4 1515 if (ret)
85bcc130 1516 return ret;
1da177e4
LT
1517
1518 /*
85bcc130 1519 * Allocate interrupt.
1da177e4 1520 */
85bcc130
PO
1521 ret = wbsd_request_irq(host, irq);
1522 if (ret)
1523 return ret;
1524
1525 /*
1526 * Allocate DMA.
1527 */
1528 wbsd_request_dma(host, dma);
fecf92ba 1529
85bcc130
PO
1530 return 0;
1531}
1532
1533/*
1534 * Release all resources for the host.
1535 */
1536
b3627bb1 1537static void wbsd_release_resources(struct wbsd_host *host)
85bcc130
PO
1538{
1539 wbsd_release_dma(host);
1540 wbsd_release_irq(host);
1541 wbsd_release_regions(host);
1542}
1543
1544/*
1545 * Configure the resources the chip should use.
1546 */
1547
cfa7f521 1548static void wbsd_chip_config(struct wbsd_host *host)
85bcc130 1549{
19c1f3ca
PO
1550 wbsd_unlock_config(host);
1551
85bcc130
PO
1552 /*
1553 * Reset the chip.
fecf92ba 1554 */
85bcc130
PO
1555 wbsd_write_config(host, WBSD_CONF_SWRST, 1);
1556 wbsd_write_config(host, WBSD_CONF_SWRST, 0);
1da177e4
LT
1557
1558 /*
1559 * Select SD/MMC function.
1560 */
1561 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
fecf92ba 1562
1da177e4
LT
1563 /*
1564 * Set up card detection.
1565 */
85bcc130 1566 wbsd_write_config(host, WBSD_CONF_PINS, WBSD_PINS_DETECT_GP11);
fecf92ba 1567
1da177e4 1568 /*
85bcc130 1569 * Configure chip
1da177e4
LT
1570 */
1571 wbsd_write_config(host, WBSD_CONF_PORT_HI, host->base >> 8);
1572 wbsd_write_config(host, WBSD_CONF_PORT_LO, host->base & 0xff);
fecf92ba 1573
85bcc130 1574 wbsd_write_config(host, WBSD_CONF_IRQ, host->irq);
fecf92ba 1575
85bcc130
PO
1576 if (host->dma >= 0)
1577 wbsd_write_config(host, WBSD_CONF_DRQ, host->dma);
fecf92ba 1578
1da177e4 1579 /*
85bcc130 1580 * Enable and power up chip.
1da177e4 1581 */
85bcc130
PO
1582 wbsd_write_config(host, WBSD_CONF_ENABLE, 1);
1583 wbsd_write_config(host, WBSD_CONF_POWER, 0x20);
19c1f3ca
PO
1584
1585 wbsd_lock_config(host);
85bcc130
PO
1586}
1587
1588/*
1589 * Check that configured resources are correct.
1590 */
fecf92ba 1591
cfa7f521 1592static int wbsd_chip_validate(struct wbsd_host *host)
85bcc130
PO
1593{
1594 int base, irq, dma;
fecf92ba 1595
19c1f3ca
PO
1596 wbsd_unlock_config(host);
1597
1da177e4 1598 /*
85bcc130 1599 * Select SD/MMC function.
1da177e4 1600 */
85bcc130 1601 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
fecf92ba 1602
1da177e4 1603 /*
85bcc130 1604 * Read configuration.
1da177e4 1605 */
85bcc130
PO
1606 base = wbsd_read_config(host, WBSD_CONF_PORT_HI) << 8;
1607 base |= wbsd_read_config(host, WBSD_CONF_PORT_LO);
fecf92ba 1608
85bcc130 1609 irq = wbsd_read_config(host, WBSD_CONF_IRQ);
fecf92ba 1610
85bcc130 1611 dma = wbsd_read_config(host, WBSD_CONF_DRQ);
fecf92ba 1612
19c1f3ca
PO
1613 wbsd_lock_config(host);
1614
1da177e4 1615 /*
85bcc130 1616 * Validate against given configuration.
1da177e4 1617 */
85bcc130
PO
1618 if (base != host->base)
1619 return 0;
1620 if (irq != host->irq)
1621 return 0;
1622 if ((dma != host->dma) && (host->dma != -1))
1623 return 0;
fecf92ba 1624
85bcc130
PO
1625 return 1;
1626}
1627
19c1f3ca
PO
1628/*
1629 * Powers down the SD function
1630 */
1631
cfa7f521 1632static void wbsd_chip_poweroff(struct wbsd_host *host)
19c1f3ca
PO
1633{
1634 wbsd_unlock_config(host);
1635
1636 wbsd_write_config(host, WBSD_CONF_DEVICE, DEVICE_SD);
1637 wbsd_write_config(host, WBSD_CONF_ENABLE, 0);
1638
1639 wbsd_lock_config(host);
1640}
1641
85bcc130
PO
1642/*****************************************************************************\
1643 * *
1644 * Devices setup and shutdown *
1645 * *
1646\*****************************************************************************/
1647
cfa7f521 1648static int __devinit wbsd_init(struct device *dev, int base, int irq, int dma,
85bcc130
PO
1649 int pnp)
1650{
cfa7f521
PO
1651 struct wbsd_host *host = NULL;
1652 struct mmc_host *mmc = NULL;
85bcc130 1653 int ret;
fecf92ba 1654
85bcc130
PO
1655 ret = wbsd_alloc_mmc(dev);
1656 if (ret)
1657 return ret;
fecf92ba 1658
85bcc130
PO
1659 mmc = dev_get_drvdata(dev);
1660 host = mmc_priv(mmc);
fecf92ba 1661
1da177e4 1662 /*
85bcc130 1663 * Scan for hardware.
1da177e4 1664 */
85bcc130 1665 ret = wbsd_scan(host);
cfa7f521
PO
1666 if (ret) {
1667 if (pnp && (ret == -ENODEV)) {
85bcc130
PO
1668 printk(KERN_WARNING DRIVER_NAME
1669 ": Unable to confirm device presence. You may "
1670 "experience lock-ups.\n");
cfa7f521 1671 } else {
85bcc130
PO
1672 wbsd_free_mmc(dev);
1673 return ret;
1674 }
1675 }
fecf92ba 1676
1da177e4 1677 /*
85bcc130 1678 * Request resources.
1da177e4 1679 */
dd2c609c 1680 ret = wbsd_request_resources(host, base, irq, dma);
cfa7f521 1681 if (ret) {
85bcc130
PO
1682 wbsd_release_resources(host);
1683 wbsd_free_mmc(dev);
1684 return ret;
1685 }
fecf92ba 1686
1da177e4 1687 /*
85bcc130 1688 * See if chip needs to be configured.
1da177e4 1689 */
cfa7f521
PO
1690 if (pnp) {
1691 if ((host->config != 0) && !wbsd_chip_validate(host)) {
85bcc130
PO
1692 printk(KERN_WARNING DRIVER_NAME
1693 ": PnP active but chip not configured! "
1694 "You probably have a buggy BIOS. "
1695 "Configuring chip manually.\n");
1696 wbsd_chip_config(host);
1697 }
cfa7f521 1698 } else
85bcc130 1699 wbsd_chip_config(host);
fecf92ba 1700
1da177e4
LT
1701 /*
1702 * Power Management stuff. No idea how this works.
1703 * Not tested.
1704 */
1705#ifdef CONFIG_PM
cfa7f521 1706 if (host->config) {
19c1f3ca 1707 wbsd_unlock_config(host);
85bcc130 1708 wbsd_write_config(host, WBSD_CONF_PME, 0xA0);
19c1f3ca
PO
1709 wbsd_lock_config(host);
1710 }
1da177e4 1711#endif
85bcc130
PO
1712 /*
1713 * Allow device to initialise itself properly.
1714 */
1715 mdelay(5);
1da177e4
LT
1716
1717 /*
1718 * Reset the chip into a known state.
1719 */
1720 wbsd_init_device(host);
fecf92ba 1721
1da177e4
LT
1722 mmc_add_host(mmc);
1723
d366b643 1724 printk(KERN_INFO "%s: W83L51xD", mmc_hostname(mmc));
85bcc130
PO
1725 if (host->chip_id != 0)
1726 printk(" id %x", (int)host->chip_id);
1727 printk(" at 0x%x irq %d", (int)host->base, (int)host->irq);
1728 if (host->dma >= 0)
1729 printk(" dma %d", (int)host->dma);
1730 else
1731 printk(" FIFO");
1732 if (pnp)
1733 printk(" PnP");
1734 printk("\n");
1da177e4
LT
1735
1736 return 0;
1da177e4
LT
1737}
1738
cfa7f521 1739static void __devexit wbsd_shutdown(struct device *dev, int pnp)
1da177e4 1740{
cfa7f521
PO
1741 struct mmc_host *mmc = dev_get_drvdata(dev);
1742 struct wbsd_host *host;
fecf92ba 1743
1da177e4 1744 if (!mmc)
85bcc130 1745 return;
1da177e4
LT
1746
1747 host = mmc_priv(mmc);
fecf92ba 1748
1da177e4
LT
1749 mmc_remove_host(mmc);
1750
19c1f3ca
PO
1751 /*
1752 * Power down the SD/MMC function.
1753 */
85bcc130 1754 if (!pnp)
19c1f3ca 1755 wbsd_chip_poweroff(host);
fecf92ba 1756
85bcc130 1757 wbsd_release_resources(host);
fecf92ba 1758
85bcc130
PO
1759 wbsd_free_mmc(dev);
1760}
1da177e4 1761
85bcc130
PO
1762/*
1763 * Non-PnP
1764 */
1765
cfa7f521 1766static int __devinit wbsd_probe(struct platform_device *dev)
85bcc130 1767{
dd2c609c 1768 /* Use the module parameters for resources */
9eeebd22 1769 return wbsd_init(&dev->dev, param_io, param_irq, param_dma, 0);
85bcc130
PO
1770}
1771
cfa7f521 1772static int __devexit wbsd_remove(struct platform_device *dev)
85bcc130 1773{
3ae5eaec 1774 wbsd_shutdown(&dev->dev, 0);
85bcc130
PO
1775
1776 return 0;
1777}
1778
1779/*
1780 * PnP
1781 */
1782
1783#ifdef CONFIG_PNP
1784
1785static int __devinit
cfa7f521 1786wbsd_pnp_probe(struct pnp_dev *pnpdev, const struct pnp_device_id *dev_id)
85bcc130
PO
1787{
1788 int io, irq, dma;
fecf92ba 1789
85bcc130
PO
1790 /*
1791 * Get resources from PnP layer.
1792 */
1793 io = pnp_port_start(pnpdev, 0);
1794 irq = pnp_irq(pnpdev, 0);
1795 if (pnp_dma_valid(pnpdev, 0))
1796 dma = pnp_dma(pnpdev, 0);
1797 else
1798 dma = -1;
fecf92ba 1799
85bcc130 1800 DBGF("PnP resources: port %3x irq %d dma %d\n", io, irq, dma);
fecf92ba 1801
85bcc130
PO
1802 return wbsd_init(&pnpdev->dev, io, irq, dma, 1);
1803}
1da177e4 1804
cfa7f521 1805static void __devexit wbsd_pnp_remove(struct pnp_dev *dev)
85bcc130
PO
1806{
1807 wbsd_shutdown(&dev->dev, 1);
1da177e4
LT
1808}
1809
85bcc130
PO
1810#endif /* CONFIG_PNP */
1811
1da177e4
LT
1812/*
1813 * Power management
1814 */
1815
1816#ifdef CONFIG_PM
19c1f3ca 1817
5e68d95d
PO
1818static int wbsd_suspend(struct wbsd_host *host, pm_message_t state)
1819{
1820 BUG_ON(host == NULL);
1821
1822 return mmc_suspend_host(host->mmc, state);
1823}
1824
1825static int wbsd_resume(struct wbsd_host *host)
1826{
1827 BUG_ON(host == NULL);
1828
1829 wbsd_init_device(host);
1830
1831 return mmc_resume_host(host->mmc);
1832}
1833
cfa7f521
PO
1834static int wbsd_platform_suspend(struct platform_device *dev,
1835 pm_message_t state)
1da177e4 1836{
3ae5eaec 1837 struct mmc_host *mmc = platform_get_drvdata(dev);
19c1f3ca
PO
1838 struct wbsd_host *host;
1839 int ret;
1840
5e68d95d 1841 if (mmc == NULL)
19c1f3ca
PO
1842 return 0;
1843
5e68d95d 1844 DBGF("Suspending...\n");
19c1f3ca
PO
1845
1846 host = mmc_priv(mmc);
1847
5e68d95d
PO
1848 ret = wbsd_suspend(host, state);
1849 if (ret)
1850 return ret;
1851
19c1f3ca 1852 wbsd_chip_poweroff(host);
1da177e4
LT
1853
1854 return 0;
1855}
1856
5e68d95d 1857static int wbsd_platform_resume(struct platform_device *dev)
1da177e4 1858{
3ae5eaec 1859 struct mmc_host *mmc = platform_get_drvdata(dev);
19c1f3ca 1860 struct wbsd_host *host;
1da177e4 1861
5e68d95d 1862 if (mmc == NULL)
19c1f3ca
PO
1863 return 0;
1864
5e68d95d 1865 DBGF("Resuming...\n");
19c1f3ca
PO
1866
1867 host = mmc_priv(mmc);
1868
1869 wbsd_chip_config(host);
1870
1871 /*
1872 * Allow device to initialise itself properly.
1873 */
1874 mdelay(5);
1875
5e68d95d
PO
1876 return wbsd_resume(host);
1877}
1878
1879#ifdef CONFIG_PNP
1880
1881static int wbsd_pnp_suspend(struct pnp_dev *pnp_dev, pm_message_t state)
1882{
1883 struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev);
1884 struct wbsd_host *host;
1885
1886 if (mmc == NULL)
1887 return 0;
19c1f3ca 1888
5e68d95d
PO
1889 DBGF("Suspending...\n");
1890
1891 host = mmc_priv(mmc);
1892
1893 return wbsd_suspend(host, state);
1da177e4 1894}
19c1f3ca 1895
5e68d95d
PO
1896static int wbsd_pnp_resume(struct pnp_dev *pnp_dev)
1897{
1898 struct mmc_host *mmc = dev_get_drvdata(&pnp_dev->dev);
1899 struct wbsd_host *host;
1900
1901 if (mmc == NULL)
1902 return 0;
1903
1904 DBGF("Resuming...\n");
1905
1906 host = mmc_priv(mmc);
1907
1908 /*
1909 * See if chip needs to be configured.
1910 */
cfa7f521
PO
1911 if (host->config != 0) {
1912 if (!wbsd_chip_validate(host)) {
5e68d95d
PO
1913 printk(KERN_WARNING DRIVER_NAME
1914 ": PnP active but chip not configured! "
1915 "You probably have a buggy BIOS. "
1916 "Configuring chip manually.\n");
1917 wbsd_chip_config(host);
1918 }
1919 }
1920
1921 /*
1922 * Allow device to initialise itself properly.
1923 */
1924 mdelay(5);
1925
1926 return wbsd_resume(host);
1927}
1928
1929#endif /* CONFIG_PNP */
1930
19c1f3ca
PO
1931#else /* CONFIG_PM */
1932
5e68d95d
PO
1933#define wbsd_platform_suspend NULL
1934#define wbsd_platform_resume NULL
1935
1936#define wbsd_pnp_suspend NULL
1937#define wbsd_pnp_resume NULL
19c1f3ca
PO
1938
1939#endif /* CONFIG_PM */
1da177e4 1940
85bcc130 1941static struct platform_device *wbsd_device;
1da177e4 1942
3ae5eaec 1943static struct platform_driver wbsd_driver = {
1da177e4 1944 .probe = wbsd_probe,
93968d75 1945 .remove = __devexit_p(wbsd_remove),
fecf92ba 1946
5e68d95d
PO
1947 .suspend = wbsd_platform_suspend,
1948 .resume = wbsd_platform_resume,
3ae5eaec
RK
1949 .driver = {
1950 .name = DRIVER_NAME,
bc65c724 1951 .owner = THIS_MODULE,
3ae5eaec 1952 },
1da177e4
LT
1953};
1954
85bcc130
PO
1955#ifdef CONFIG_PNP
1956
1957static struct pnp_driver wbsd_pnp_driver = {
1958 .name = DRIVER_NAME,
1959 .id_table = pnp_dev_table,
1960 .probe = wbsd_pnp_probe,
93968d75 1961 .remove = __devexit_p(wbsd_pnp_remove),
5e68d95d
PO
1962
1963 .suspend = wbsd_pnp_suspend,
1964 .resume = wbsd_pnp_resume,
85bcc130
PO
1965};
1966
1967#endif /* CONFIG_PNP */
1968
1da177e4
LT
1969/*
1970 * Module loading/unloading
1971 */
1972
1973static int __init wbsd_drv_init(void)
1974{
1975 int result;
fecf92ba 1976
1da177e4 1977 printk(KERN_INFO DRIVER_NAME
1615cc22 1978 ": Winbond W83L51xD SD/MMC card interface driver\n");
1da177e4 1979 printk(KERN_INFO DRIVER_NAME ": Copyright(c) Pierre Ossman\n");
1da177e4 1980
85bcc130
PO
1981#ifdef CONFIG_PNP
1982
9eeebd22 1983 if (!param_nopnp) {
85bcc130
PO
1984 result = pnp_register_driver(&wbsd_pnp_driver);
1985 if (result < 0)
1986 return result;
1987 }
fecf92ba
PO
1988#endif /* CONFIG_PNP */
1989
9eeebd22 1990 if (param_nopnp) {
3ae5eaec 1991 result = platform_driver_register(&wbsd_driver);
85bcc130
PO
1992 if (result < 0)
1993 return result;
1994
21500bb3 1995 wbsd_device = platform_device_alloc(DRIVER_NAME, -1);
cfa7f521 1996 if (!wbsd_device) {
21500bb3
DT
1997 platform_driver_unregister(&wbsd_driver);
1998 return -ENOMEM;
1999 }
2000
2001 result = platform_device_add(wbsd_device);
cfa7f521 2002 if (result) {
21500bb3
DT
2003 platform_device_put(wbsd_device);
2004 platform_driver_unregister(&wbsd_driver);
2005 return result;
2006 }
85bcc130 2007 }
1da177e4
LT
2008
2009 return 0;
2010}
2011
2012static void __exit wbsd_drv_exit(void)
2013{
85bcc130
PO
2014#ifdef CONFIG_PNP
2015
9eeebd22 2016 if (!param_nopnp)
85bcc130 2017 pnp_unregister_driver(&wbsd_pnp_driver);
fecf92ba
PO
2018
2019#endif /* CONFIG_PNP */
85bcc130 2020
9eeebd22 2021 if (param_nopnp) {
85bcc130 2022 platform_device_unregister(wbsd_device);
fecf92ba 2023
3ae5eaec 2024 platform_driver_unregister(&wbsd_driver);
85bcc130 2025 }
1da177e4
LT
2026
2027 DBG("unloaded\n");
2028}
2029
2030module_init(wbsd_drv_init);
2031module_exit(wbsd_drv_exit);
85bcc130 2032#ifdef CONFIG_PNP
9eeebd22 2033module_param_named(nopnp, param_nopnp, uint, 0444);
85bcc130 2034#endif
9eeebd22
TW
2035module_param_named(io, param_io, uint, 0444);
2036module_param_named(irq, param_irq, uint, 0444);
2037module_param_named(dma, param_dma, int, 0444);
1da177e4
LT
2038
2039MODULE_LICENSE("GPL");
32710e8f 2040MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1da177e4 2041MODULE_DESCRIPTION("Winbond W83L51xD SD/MMC card interface driver");
1da177e4 2042
85bcc130
PO
2043#ifdef CONFIG_PNP
2044MODULE_PARM_DESC(nopnp, "Scan for device instead of relying on PNP. (default 0)");
2045#endif
1da177e4
LT
2046MODULE_PARM_DESC(io, "I/O base to allocate. Must be 8 byte aligned. (default 0x248)");
2047MODULE_PARM_DESC(irq, "IRQ to allocate. (default 6)");
2048MODULE_PARM_DESC(dma, "DMA channel to allocate. -1 for no DMA. (default 2)");