[net-next-2.6.git] / drivers / misc / sgi-gru / grufile.c

/*
 * SN Platform GRU Driver
 *
 *              FILE OPERATIONS & DRIVER INITIALIZATION
 *
 * This file supports the user system call for file open, close, mmap, etc.
 * This also incudes the driver initialization code.
 *
 *  Copyright (c) 2008 Silicon Graphics, Inc.  All Rights Reserved.
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/mm.h>
#include <linux/io.h>
#include <linux/smp_lock.h>
#include <linux/spinlock.h>
#include <linux/device.h>
#include <linux/miscdevice.h>
#include <linux/interrupt.h>
#include <linux/proc_fs.h>
#include <linux/uaccess.h>
#include "gru.h"
#include "grulib.h"
#include "grutables.h"

#if defined CONFIG_X86_64
#include <asm/genapic.h>
#include <asm/irq.h>
#define IS_UV()		is_uv_system()
#elif defined CONFIG_IA64
#include <asm/system.h>
#include <asm/sn/simulator.h>
/* temp support for running on hardware simulator */
#define IS_UV()		IS_MEDUSA() || ia64_platform_is("uv")
#else
#define IS_UV()		0
#endif

#include <asm/uv/uv_hub.h>
#include <asm/uv/uv_mmrs.h>

struct gru_blade_state *gru_base[GRU_MAX_BLADES] __read_mostly;
unsigned long gru_start_paddr, gru_end_paddr __read_mostly;
struct gru_stats_s gru_stats;

/* Guaranteed user available resources on each node */
static int max_user_cbrs, max_user_dsr_bytes;

static struct file_operations gru_fops;
static struct miscdevice gru_miscdev;


/*
 * gru_vma_close
 *
 * Called when unmapping a device mapping. Frees all gru resources
 * and tables belonging to the vma.
 */
static void gru_vma_close(struct vm_area_struct *vma)
{
	struct gru_vma_data *vdata;
	struct gru_thread_state *gts;
	struct list_head *entry, *next;

	if (!vma->vm_private_data)
		return;

	vdata = vma->vm_private_data;
	vma->vm_private_data = NULL;
	gru_dbg(grudev, "vma %p, file %p, vdata %p\n", vma, vma->vm_file,
				vdata);
	list_for_each_safe(entry, next, &vdata->vd_head) {
		gts =
		    list_entry(entry, struct gru_thread_state, ts_next);
		list_del(&gts->ts_next);
		mutex_lock(&gts->ts_ctxlock);
		if (gts->ts_gru)
			gru_unload_context(gts, 0);
		mutex_unlock(&gts->ts_ctxlock);
		gts_drop(gts);
	}
	kfree(vdata);
	STAT(vdata_free);
}

/*
 * gru_file_mmap
 *
 * Called when mmaping the device.  Initializes the vma with a fault handler
 * and private data structure necessary to allocate, track, and free the
 * underlying pages.
 */
static int gru_file_mmap(struct file *file, struct vm_area_struct *vma)
{
	if ((vma->vm_flags & (VM_SHARED | VM_WRITE)) != (VM_SHARED | VM_WRITE))
		return -EPERM;

	if (vma->vm_start & (GRU_GSEG_PAGESIZE - 1) ||
			vma->vm_end & (GRU_GSEG_PAGESIZE - 1))
		return -EINVAL;

	vma->vm_flags |=
	    (VM_IO | VM_DONTCOPY | VM_LOCKED | VM_DONTEXPAND | VM_PFNMAP |
			VM_RESERVED);
	vma->vm_page_prot = PAGE_SHARED;
	vma->vm_ops = &gru_vm_ops;

	vma->vm_private_data = gru_alloc_vma_data(vma, 0);
	if (!vma->vm_private_data)
		return -ENOMEM;

	gru_dbg(grudev, "file %p, vaddr 0x%lx, vma %p, vdata %p\n",
		file, vma->vm_start, vma, vma->vm_private_data);
	return 0;
}

/*
 * Create a new GRU context
 */
static int gru_create_new_context(unsigned long arg)
{
	struct gru_create_context_req req;
	struct vm_area_struct *vma;
	struct gru_vma_data *vdata;
	int ret = -EINVAL;


	if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
		return -EFAULT;

	if (req.data_segment_bytes == 0 ||
				req.data_segment_bytes > max_user_dsr_bytes)
		return -EINVAL;
	if (!req.control_blocks || !req.maximum_thread_count ||
				req.control_blocks > max_user_cbrs)
		return -EINVAL;

	if (!(req.options & GRU_OPT_MISS_MASK))
		req.options |= GRU_OPT_MISS_FMM_INTR;

	down_write(&current->mm->mmap_sem);
	vma = gru_find_vma(req.gseg);
	if (vma) {
		vdata = vma->vm_private_data;
		vdata->vd_user_options = req.options;
		vdata->vd_dsr_au_count =
		    GRU_DS_BYTES_TO_AU(req.data_segment_bytes);
		vdata->vd_cbr_au_count = GRU_CB_COUNT_TO_AU(req.control_blocks);
		ret = 0;
	}
	up_write(&current->mm->mmap_sem);

	return ret;
}

/*
 * Get GRU configuration info (temp - for emulator testing)
 */
static long gru_get_config_info(unsigned long arg)
{
	struct gru_config_info info;
	int nodesperblade;

	if (num_online_nodes() > 1 &&
			(uv_node_to_blade_id(1) == uv_node_to_blade_id(0)))
		nodesperblade = 2;
	else
		nodesperblade = 1;
	info.cpus = num_online_cpus();
	info.nodes = num_online_nodes();
	info.blades = info.nodes / nodesperblade;
	info.chiplets = GRU_CHIPLETS_PER_BLADE * info.blades;

	if (copy_to_user((void __user *)arg, &info, sizeof(info)))
		return -EFAULT;
	return 0;
}

/*
 * Get GRU chiplet status
 */
static long gru_get_chiplet_status(unsigned long arg)
{
	struct gru_state *gru;
	struct gru_chiplet_info info;

	if (copy_from_user(&info, (void __user *)arg, sizeof(info)))
		return -EFAULT;

	if (info.node == -1)
		info.node = numa_node_id();
	if (info.node >= num_possible_nodes() ||
			info.chiplet >= GRU_CHIPLETS_PER_HUB ||
			info.node < 0 || info.chiplet < 0)
		return -EINVAL;

	info.blade = uv_node_to_blade_id(info.node);
	gru = get_gru(info.blade, info.chiplet);

	info.total_dsr_bytes = GRU_NUM_DSR_BYTES;
	info.total_cbr = GRU_NUM_CB;
	info.total_user_dsr_bytes = GRU_NUM_DSR_BYTES -
		gru->gs_reserved_dsr_bytes;
	info.total_user_cbr = GRU_NUM_CB - gru->gs_reserved_cbrs;
	info.free_user_dsr_bytes = hweight64(gru->gs_dsr_map) *
			GRU_DSR_AU_BYTES;
	info.free_user_cbr = hweight64(gru->gs_cbr_map) * GRU_CBR_AU_SIZE;

	if (copy_to_user((void __user *)arg, &info, sizeof(info)))
		return -EFAULT;
	return 0;
}

/*
 * gru_file_unlocked_ioctl
 *
 * Called to update file attributes via IOCTL calls.
 */
static long gru_file_unlocked_ioctl(struct file *file, unsigned int req,
				    unsigned long arg)
{
	int err = -EBADRQC;

	gru_dbg(grudev, "file %p\n", file);

	switch (req) {
	case GRU_CREATE_CONTEXT:
		err = gru_create_new_context(arg);
		break;
	case GRU_SET_TASK_SLICE:
		err = gru_set_task_slice(arg);
		break;
	case GRU_USER_GET_EXCEPTION_DETAIL:
		err = gru_get_exception_detail(arg);
		break;
	case GRU_USER_UNLOAD_CONTEXT:
		err = gru_user_unload_context(arg);
		break;
	case GRU_GET_CHIPLET_STATUS:
		err = gru_get_chiplet_status(arg);
		break;
	case GRU_USER_FLUSH_TLB:
		err = gru_user_flush_tlb(arg);
		break;
	case GRU_USER_CALL_OS:
		err = gru_handle_user_call_os(arg);
		break;
	case GRU_GET_CONFIG_INFO:
		err = gru_get_config_info(arg);
		break;
	}
	return err;
}

/*
 * Called at init time to build tables for all GRUs that are present in the
 * system.
 */
static void gru_init_chiplet(struct gru_state *gru, unsigned long paddr,
			     void *vaddr, int nid, int bid, int grunum)
{
	spin_lock_init(&gru->gs_lock);
	spin_lock_init(&gru->gs_asid_lock);
	gru->gs_gru_base_paddr = paddr;
	gru->gs_gru_base_vaddr = vaddr;
	gru->gs_gid = bid * GRU_CHIPLETS_PER_BLADE + grunum;
	gru->gs_blade = gru_base[bid];
	gru->gs_blade_id = bid;
	gru->gs_cbr_map = (GRU_CBR_AU == 64) ? ~0 : (1UL << GRU_CBR_AU) - 1;
	gru->gs_dsr_map = (1UL << GRU_DSR_AU) - 1;
	gru_tgh_flush_init(gru);
	gru_dbg(grudev, "bid %d, nid %d, gru %x, vaddr %p (0x%lx)\n",
		bid, nid, gru->gs_gid, gru->gs_gru_base_vaddr,
		gru->gs_gru_base_paddr);
	gru_kservices_init(gru);
}

static int gru_init_tables(unsigned long gru_base_paddr, void *gru_base_vaddr)
{
	int pnode, nid, bid, chip;
	int cbrs, dsrbytes, n;
	int order = get_order(sizeof(struct gru_blade_state));
	struct page *page;
	struct gru_state *gru;
	unsigned long paddr;
	void *vaddr;

	max_user_cbrs = GRU_NUM_CB;
	max_user_dsr_bytes = GRU_NUM_DSR_BYTES;
	for_each_online_node(nid) {
		bid = uv_node_to_blade_id(nid);
		pnode = uv_node_to_pnode(nid);
		if (gru_base[bid])
			continue;
		page = alloc_pages_node(nid, GFP_KERNEL, order);
		if (!page)
			goto fail;
		gru_base[bid] = page_address(page);
		memset(gru_base[bid], 0, sizeof(struct gru_blade_state));
		gru_base[bid]->bs_lru_gru = &gru_base[bid]->bs_grus[0];
		spin_lock_init(&gru_base[bid]->bs_lock);

		dsrbytes = 0;
		cbrs = 0;
		for (gru = gru_base[bid]->bs_grus, chip = 0;
		     		chip < GRU_CHIPLETS_PER_BLADE;
				chip++, gru++) {
			paddr = gru_chiplet_paddr(gru_base_paddr, pnode, chip);
			vaddr = gru_chiplet_vaddr(gru_base_vaddr, pnode, chip);
			gru_init_chiplet(gru, paddr, vaddr, bid, nid, chip);
			n = hweight64(gru->gs_cbr_map) * GRU_CBR_AU_SIZE;
			cbrs = max(cbrs, n);
			n = hweight64(gru->gs_dsr_map) * GRU_DSR_AU_BYTES;
			dsrbytes = max(dsrbytes, n);
		}
		max_user_cbrs = min(max_user_cbrs, cbrs);
		max_user_dsr_bytes = min(max_user_dsr_bytes, dsrbytes);
	}

	return 0;

fail:
	for (nid--; nid >= 0; nid--)
		free_pages((unsigned long)gru_base[nid], order);
	return -ENOMEM;
}

#ifdef CONFIG_IA64

static int get_base_irq(void)
{
	return IRQ_GRU;
}

#elif defined CONFIG_X86_64

static void noop(unsigned int irq)
{
}

static struct irq_chip gru_chip = {
	.name		= "gru",
	.mask		= noop,
	.unmask		= noop,
	.ack		= noop,
};

static int get_base_irq(void)
{
	set_irq_chip(IRQ_GRU, &gru_chip);
	set_irq_chip(IRQ_GRU + 1, &gru_chip);
	return IRQ_GRU;
}
#endif

/*
 * gru_init
 *
 * Called at boot or module load time to initialize the GRUs.
 */
static int __init gru_init(void)
{
	int ret, irq, chip;
	char id[10];
	void *gru_start_vaddr;

	if (!IS_UV())
		return 0;

#if defined CONFIG_IA64
	gru_start_paddr = 0xd000000000UL; /* ZZZZZZZZZZZZZZZZZZZ fixme */
#else
	gru_start_paddr = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR) &
				0x7fffffffffffUL;

#endif
	gru_start_vaddr = __va(gru_start_paddr);
	gru_end_paddr = gru_start_paddr + MAX_NUMNODES * GRU_SIZE;
	printk(KERN_INFO "GRU space: 0x%lx - 0x%lx\n",
	       gru_start_paddr, gru_end_paddr);
	irq = get_base_irq();
	for (chip = 0; chip < GRU_CHIPLETS_PER_BLADE; chip++) {
		ret = request_irq(irq + chip, gru_intr, 0, id, NULL);
		if (ret) {
			printk(KERN_ERR "%s: request_irq failed\n",
			       GRU_DRIVER_ID_STR);
			goto exit1;
		}
	}

	ret = misc_register(&gru_miscdev);
	if (ret) {
		printk(KERN_ERR "%s: misc_register failed\n",
		       GRU_DRIVER_ID_STR);
		goto exit1;
	}

	ret = gru_proc_init();
	if (ret) {
		printk(KERN_ERR "%s: proc init failed\n", GRU_DRIVER_ID_STR);
		goto exit2;
	}

	ret = gru_init_tables(gru_start_paddr, gru_start_vaddr);
	if (ret) {
		printk(KERN_ERR "%s: init tables failed\n", GRU_DRIVER_ID_STR);
		goto exit3;
	}

	printk(KERN_INFO "%s: v%s\n", GRU_DRIVER_ID_STR,
	       GRU_DRIVER_VERSION_STR);
	return 0;

exit3:
	gru_proc_exit();
exit2:
	misc_deregister(&gru_miscdev);
exit1:
	for (--chip; chip >= 0; chip--)
		free_irq(irq + chip, NULL);
	return ret;

}

static void __exit gru_exit(void)
{
	int i, bid;
	int order = get_order(sizeof(struct gru_state) *
			      GRU_CHIPLETS_PER_BLADE);

	if (!IS_UV())
		return;

	for (i = 0; i < GRU_CHIPLETS_PER_BLADE; i++)
		free_irq(IRQ_GRU + i, NULL);

	for (bid = 0; bid < GRU_MAX_BLADES; bid++)
		free_pages((unsigned long)gru_base[bid], order);

	misc_deregister(&gru_miscdev);
	gru_proc_exit();
}

static struct file_operations gru_fops = {
	.owner		= THIS_MODULE,
	.unlocked_ioctl	= gru_file_unlocked_ioctl,
	.mmap		= gru_file_mmap,
};

static struct miscdevice gru_miscdev = {
	.minor		= MISC_DYNAMIC_MINOR,
	.name		= "gru",
	.fops		= &gru_fops,
};

struct vm_operations_struct gru_vm_ops = {
	.close		= gru_vma_close,
	.fault		= gru_fault,
};

module_init(gru_init);
module_exit(gru_exit);

module_param(gru_options, ulong, 0644);
MODULE_PARM_DESC(gru_options, "Various debug options");

MODULE_AUTHOR("Silicon Graphics, Inc.");
MODULE_LICENSE("GPL");
MODULE_DESCRIPTION(GRU_DRIVER_ID_STR GRU_DRIVER_VERSION_STR);
MODULE_VERSION(GRU_DRIVER_VERSION_STR);
Commit	Line	Data
78cf1de4 JS	1	/*
	2	* SN Platform GRU Driver
	3	*
	4	* FILE OPERATIONS & DRIVER INITIALIZATION
	5	*
	6	* This file supports the user system call for file open, close, mmap, etc.
	7	* This also incudes the driver initialization code.
	8	*
	9	* Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
	10	*
	11	* This program is free software; you can redistribute it and/or modify
	12	* it under the terms of the GNU General Public License as published by
	13	* the Free Software Foundation; either version 2 of the License, or
	14	* (at your option) any later version.
	15	*
	16	* This program is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with this program; if not, write to the Free Software
	23	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	24	*/
	25
	26	#include <linux/module.h>
	27	#include <linux/kernel.h>
	28	#include <linux/errno.h>
	29	#include <linux/slab.h>
	30	#include <linux/mm.h>
	31	#include <linux/io.h>
	32	#include <linux/smp_lock.h>
	33	#include <linux/spinlock.h>
	34	#include <linux/device.h>
	35	#include <linux/miscdevice.h>
	36	#include <linux/interrupt.h>
	37	#include <linux/proc_fs.h>
	38	#include <linux/uaccess.h>
	39	#include "gru.h"
	40	#include "grulib.h"
	41	#include "grutables.h"
	42
	43	#if defined CONFIG_X86_64
	44	#include <asm/genapic.h>
	45	#include <asm/irq.h>
	46	#define IS_UV() is_uv_system()
	47	#elif defined CONFIG_IA64
	48	#include <asm/system.h>
	49	#include <asm/sn/simulator.h>
	50	/* temp support for running on hardware simulator */
	51	#define IS_UV() IS_MEDUSA() \|\| ia64_platform_is("uv")
	52	#else
	53	#define IS_UV() 0
	54	#endif
	55
	56	#include <asm/uv/uv_hub.h>
	57	#include <asm/uv/uv_mmrs.h>
	58
	59	struct gru_blade_state *gru_base[GRU_MAX_BLADES] __read_mostly;
	60	unsigned long gru_start_paddr, gru_end_paddr __read_mostly;
	61	struct gru_stats_s gru_stats;
	62
	63	/* Guaranteed user available resources on each node */
	64	static int max_user_cbrs, max_user_dsr_bytes;
65
66	static struct file_operations gru_fops;
67	static struct miscdevice gru_miscdev;
68
69
70	/*
71	* gru_vma_close
72	*
73	* Called when unmapping a device mapping. Frees all gru resources
74	* and tables belonging to the vma.
75	*/
76	static void gru_vma_close(struct vm_area_struct *vma)
77	{
78	struct gru_vma_data *vdata;
79	struct gru_thread_state *gts;
80	struct list_head entry, next;
81
82	if (!vma->vm_private_data)
83	return;
84
85	vdata = vma->vm_private_data;
86	vma->vm_private_data = NULL;
87	gru_dbg(grudev, "vma %p, file %p, vdata %p\n", vma, vma->vm_file,
88	vdata);
89	list_for_each_safe(entry, next, &vdata->vd_head) {
90	gts =
91	list_entry(entry, struct gru_thread_state, ts_next);
92	list_del(&gts->ts_next);
93	mutex_lock(&gts->ts_ctxlock);
94	if (gts->ts_gru)
95	gru_unload_context(gts, 0);
96	mutex_unlock(&gts->ts_ctxlock);
97	gts_drop(gts);
98	}
99	kfree(vdata);
100	STAT(vdata_free);
101	}
102
103	/*
104	* gru_file_mmap
105	*
106	* Called when mmaping the device. Initializes the vma with a fault handler
107	* and private data structure necessary to allocate, track, and free the
108	* underlying pages.
109	*/
110	static int gru_file_mmap(struct file file, struct vm_area_struct vma)
111	{
112	if ((vma->vm_flags & (VM_SHARED \| VM_WRITE)) != (VM_SHARED \| VM_WRITE))
113	return -EPERM;
114
9ca8e40c JS	115	if (vma->vm_start & (GRU_GSEG_PAGESIZE - 1) \|\|
	116	vma->vm_end & (GRU_GSEG_PAGESIZE - 1))
	117	return -EINVAL;
	118
78cf1de4 JS	119	vma->vm_flags \|=
	120	(VM_IO \| VM_DONTCOPY \| VM_LOCKED \| VM_DONTEXPAND \| VM_PFNMAP \|
	121	VM_RESERVED);
	122	vma->vm_page_prot = PAGE_SHARED;
	123	vma->vm_ops = &gru_vm_ops;
	124
	125	vma->vm_private_data = gru_alloc_vma_data(vma, 0);
	126	if (!vma->vm_private_data)
	127	return -ENOMEM;
	128
	129	gru_dbg(grudev, "file %p, vaddr 0x%lx, vma %p, vdata %p\n",
	130	file, vma->vm_start, vma, vma->vm_private_data);
	131	return 0;
	132	}
	133
	134	/*
	135	* Create a new GRU context
	136	*/
	137	static int gru_create_new_context(unsigned long arg)
	138	{
	139	struct gru_create_context_req req;
	140	struct vm_area_struct *vma;
	141	struct gru_vma_data *vdata;
	142	int ret = -EINVAL;
	143
	144
	145	if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
	146	return -EFAULT;
	147
	148	if (req.data_segment_bytes == 0 \|\|
	149	req.data_segment_bytes > max_user_dsr_bytes)
	150	return -EINVAL;
	151	if (!req.control_blocks \|\| !req.maximum_thread_count \|\|
	152	req.control_blocks > max_user_cbrs)
	153	return -EINVAL;
	154
	155	if (!(req.options & GRU_OPT_MISS_MASK))
	156	req.options \|= GRU_OPT_MISS_FMM_INTR;
	157
	158	down_write(&current->mm->mmap_sem);
	159	vma = gru_find_vma(req.gseg);
	160	if (vma) {
	161	vdata = vma->vm_private_data;
	162	vdata->vd_user_options = req.options;
	163	vdata->vd_dsr_au_count =
	164	GRU_DS_BYTES_TO_AU(req.data_segment_bytes);
	165	vdata->vd_cbr_au_count = GRU_CB_COUNT_TO_AU(req.control_blocks);
	166	ret = 0;
	167	}
	168	up_write(&current->mm->mmap_sem);
	169
	170	return ret;
	171	}
	172
	173	/*
	174	* Get GRU configuration info (temp - for emulator testing)
	175	*/
	176	static long gru_get_config_info(unsigned long arg)
	177	{
	178	struct gru_config_info info;
	179	int nodesperblade;
	180
	181	if (num_online_nodes() > 1 &&
	182	(uv_node_to_blade_id(1) == uv_node_to_blade_id(0)))
183	nodesperblade = 2;
184	else
185	nodesperblade = 1;
186	info.cpus = num_online_cpus();
187	info.nodes = num_online_nodes();
188	info.blades = info.nodes / nodesperblade;
189	info.chiplets = GRU_CHIPLETS_PER_BLADE * info.blades;
190
191	if (copy_to_user((void __user *)arg, &info, sizeof(info)))
192	return -EFAULT;
193	return 0;
194	}
195
196	/*
197	* Get GRU chiplet status
198	*/
199	static long gru_get_chiplet_status(unsigned long arg)
200	{
201	struct gru_state *gru;
202	struct gru_chiplet_info info;
203
204	if (copy_from_user(&info, (void __user *)arg, sizeof(info)))
205	return -EFAULT;
206
207	if (info.node == -1)
208	info.node = numa_node_id();
209	if (info.node >= num_possible_nodes() \|\|
210	info.chiplet >= GRU_CHIPLETS_PER_HUB \|\|
211	info.node < 0 \|\| info.chiplet < 0)
212	return -EINVAL;
213
214	info.blade = uv_node_to_blade_id(info.node);
215	gru = get_gru(info.blade, info.chiplet);
216
217	info.total_dsr_bytes = GRU_NUM_DSR_BYTES;
218	info.total_cbr = GRU_NUM_CB;
219	info.total_user_dsr_bytes = GRU_NUM_DSR_BYTES -
220	gru->gs_reserved_dsr_bytes;
221	info.total_user_cbr = GRU_NUM_CB - gru->gs_reserved_cbrs;
222	info.free_user_dsr_bytes = hweight64(gru->gs_dsr_map) *
223	GRU_DSR_AU_BYTES;
224	info.free_user_cbr = hweight64(gru->gs_cbr_map) * GRU_CBR_AU_SIZE;
225
226	if (copy_to_user((void __user *)arg, &info, sizeof(info)))
227	return -EFAULT;
228	return 0;
229	}
230
231	/*
232	* gru_file_unlocked_ioctl
233	*
234	* Called to update file attributes via IOCTL calls.
235	*/
236	static long gru_file_unlocked_ioctl(struct file *file, unsigned int req,
237	unsigned long arg)
238	{
239	int err = -EBADRQC;
240
241	gru_dbg(grudev, "file %p\n", file);
242
243	switch (req) {
244	case GRU_CREATE_CONTEXT:
245	err = gru_create_new_context(arg);
246	break;
247	case GRU_SET_TASK_SLICE:
248	err = gru_set_task_slice(arg);
249	break;
250	case GRU_USER_GET_EXCEPTION_DETAIL:
251	err = gru_get_exception_detail(arg);
252	break;
253	case GRU_USER_UNLOAD_CONTEXT:
254	err = gru_user_unload_context(arg);
255	break;
256	case GRU_GET_CHIPLET_STATUS:
257	err = gru_get_chiplet_status(arg);
258	break;
259	case GRU_USER_FLUSH_TLB:
260	err = gru_user_flush_tlb(arg);
261	break;
262	case GRU_USER_CALL_OS:
263	err = gru_handle_user_call_os(arg);
264	break;
265	case GRU_GET_CONFIG_INFO:
266	err = gru_get_config_info(arg);
267	break;
268	}
269	return err;
270	}
271
272	/*
273	* Called at init time to build tables for all GRUs that are present in the
274	* system.
275	*/
276	static void gru_init_chiplet(struct gru_state *gru, unsigned long paddr,
277	void *vaddr, int nid, int bid, int grunum)
278	{
279	spin_lock_init(&gru->gs_lock);
280	spin_lock_init(&gru->gs_asid_lock);
281	gru->gs_gru_base_paddr = paddr;
282	gru->gs_gru_base_vaddr = vaddr;
283	gru->gs_gid = bid * GRU_CHIPLETS_PER_BLADE + grunum;
284	gru->gs_blade = gru_base[bid];
285	gru->gs_blade_id = bid;
286	gru->gs_cbr_map = (GRU_CBR_AU == 64) ? ~0 : (1UL << GRU_CBR_AU) - 1;
287	gru->gs_dsr_map = (1UL << GRU_DSR_AU) - 1;
288	gru_tgh_flush_init(gru);
289	gru_dbg(grudev, "bid %d, nid %d, gru %x, vaddr %p (0x%lx)\n",
290	bid, nid, gru->gs_gid, gru->gs_gru_base_vaddr,
291	gru->gs_gru_base_paddr);
292	gru_kservices_init(gru);
293	}
294
295	static int gru_init_tables(unsigned long gru_base_paddr, void *gru_base_vaddr)
296	{
297	int pnode, nid, bid, chip;
298	int cbrs, dsrbytes, n;
299	int order = get_order(sizeof(struct gru_blade_state));
300	struct page *page;
301	struct gru_state *gru;
302	unsigned long paddr;
303	void *vaddr;
304
305	max_user_cbrs = GRU_NUM_CB;
306	max_user_dsr_bytes = GRU_NUM_DSR_BYTES;
307	for_each_online_node(nid) {
308	bid = uv_node_to_blade_id(nid);
309	pnode = uv_node_to_pnode(nid);
310	if (gru_base[bid])
311	continue;
312	page = alloc_pages_node(nid, GFP_KERNEL, order);
313	if (!page)
314	goto fail;
315	gru_base[bid] = page_address(page);
316	memset(gru_base[bid], 0, sizeof(struct gru_blade_state));
317	gru_base[bid]->bs_lru_gru = &gru_base[bid]->bs_grus[0];
318	spin_lock_init(&gru_base[bid]->bs_lock);
319
320	dsrbytes = 0;
321	cbrs = 0;
322	for (gru = gru_base[bid]->bs_grus, chip = 0;
323	chip < GRU_CHIPLETS_PER_BLADE;
324	chip++, gru++) {
325	paddr = gru_chiplet_paddr(gru_base_paddr, pnode, chip);
326	vaddr = gru_chiplet_vaddr(gru_base_vaddr, pnode, chip);
327	gru_init_chiplet(gru, paddr, vaddr, bid, nid, chip);
328	n = hweight64(gru->gs_cbr_map) * GRU_CBR_AU_SIZE;
329	cbrs = max(cbrs, n);
330	n = hweight64(gru->gs_dsr_map) * GRU_DSR_AU_BYTES;
331	dsrbytes = max(dsrbytes, n);
332	}
333	max_user_cbrs = min(max_user_cbrs, cbrs);
334	max_user_dsr_bytes = min(max_user_dsr_bytes, dsrbytes);
335	}
336
337	return 0;
338
339	fail:
340	for (nid--; nid >= 0; nid--)
341	free_pages((unsigned long)gru_base[nid], order);
342	return -ENOMEM;
343	}
344
345	#ifdef CONFIG_IA64
346
347	static int get_base_irq(void)
348	{
349	return IRQ_GRU;
350	}
351
352	#elif defined CONFIG_X86_64
353
354	static void noop(unsigned int irq)
355	{
356	}
357
358	static struct irq_chip gru_chip = {
359	.name = "gru",
360	.mask = noop,
361	.unmask = noop,
362	.ack = noop,
363	};
364
365	static int get_base_irq(void)
366	{
367	set_irq_chip(IRQ_GRU, &gru_chip);
368	set_irq_chip(IRQ_GRU + 1, &gru_chip);
369	return IRQ_GRU;
370	}
371	#endif
372
373	/*
374	* gru_init
375	*
376	* Called at boot or module load time to initialize the GRUs.
377	*/
378	static int __init gru_init(void)
379	{
380	int ret, irq, chip;
381	char id[10];
382	void *gru_start_vaddr;
383
384	if (!IS_UV())
385	return 0;
386
387	#if defined CONFIG_IA64
388	gru_start_paddr = 0xd000000000UL; /* ZZZZZZZZZZZZZZZZZZZ fixme */
389	#else
390	gru_start_paddr = uv_read_local_mmr(UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR) &
391	0x7fffffffffffUL;
392
393	#endif
394	gru_start_vaddr = __va(gru_start_paddr);
395	gru_end_paddr = gru_start_paddr + MAX_NUMNODES * GRU_SIZE;
396	printk(KERN_INFO "GRU space: 0x%lx - 0x%lx\n",
397	gru_start_paddr, gru_end_paddr);
398	irq = get_base_irq();
399	for (chip = 0; chip < GRU_CHIPLETS_PER_BLADE; chip++) {
400	ret = request_irq(irq + chip, gru_intr, 0, id, NULL);
401	if (ret) {
402	printk(KERN_ERR "%s: request_irq failed\n",
403	GRU_DRIVER_ID_STR);
404	goto exit1;
405	}
406	}
407
408	ret = misc_register(&gru_miscdev);
409	if (ret) {
410	printk(KERN_ERR "%s: misc_register failed\n",
411	GRU_DRIVER_ID_STR);
412	goto exit1;
413	}
414
415	ret = gru_proc_init();
416	if (ret) {
417	printk(KERN_ERR "%s: proc init failed\n", GRU_DRIVER_ID_STR);
418	goto exit2;
419	}
420
421	ret = gru_init_tables(gru_start_paddr, gru_start_vaddr);
422	if (ret) {
423	printk(KERN_ERR "%s: init tables failed\n", GRU_DRIVER_ID_STR);
424	goto exit3;
425	}
426
427	printk(KERN_INFO "%s: v%s\n", GRU_DRIVER_ID_STR,
428	GRU_DRIVER_VERSION_STR);
429	return 0;
430
431	exit3:
432	gru_proc_exit();
433	exit2:
434	misc_deregister(&gru_miscdev);
435	exit1:
436	for (--chip; chip >= 0; chip--)
437	free_irq(irq + chip, NULL);
438	return ret;
439
440	}
441
442	static void __exit gru_exit(void)
443	{
444	int i, bid;
445	int order = get_order(sizeof(struct gru_state) *
446	GRU_CHIPLETS_PER_BLADE);
447
8275d102 RH	448	if (!IS_UV())
	449	return;
	450
78cf1de4 JS	451	for (i = 0; i < GRU_CHIPLETS_PER_BLADE; i++)
	452	free_irq(IRQ_GRU + i, NULL);
	453
	454	for (bid = 0; bid < GRU_MAX_BLADES; bid++)
	455	free_pages((unsigned long)gru_base[bid], order);
	456
	457	misc_deregister(&gru_miscdev);
	458	gru_proc_exit();
	459	}
	460
	461	static struct file_operations gru_fops = {
	462	.owner = THIS_MODULE,
	463	.unlocked_ioctl = gru_file_unlocked_ioctl,
	464	.mmap = gru_file_mmap,
	465	};
	466
	467	static struct miscdevice gru_miscdev = {
	468	.minor = MISC_DYNAMIC_MINOR,
	469	.name = "gru",
	470	.fops = &gru_fops,
	471	};
	472
	473	struct vm_operations_struct gru_vm_ops = {
	474	.close = gru_vma_close,
	475	.fault = gru_fault,
	476	};
	477
	478	module_init(gru_init);
	479	module_exit(gru_exit);
	480
9ca8e40c JS	481	module_param(gru_options, ulong, 0644);
9ca8e40c JS	482	MODULE_PARM_DESC(gru_options, "Various debug options");
78cf1de4 JS	483
	484	MODULE_AUTHOR("Silicon Graphics, Inc.");
	485	MODULE_LICENSE("GPL");
	486	MODULE_DESCRIPTION(GRU_DRIVER_ID_STR GRU_DRIVER_VERSION_STR);
	487	MODULE_VERSION(GRU_DRIVER_VERSION_STR);
	488