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Commit | Line | Data |
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1f192015 IM |
1 | /* |
2 | * | |
3 | * Toshiba T7L66XB core mfd support | |
4 | * | |
5 | * Copyright (c) 2005, 2007, 2008 Ian Molton | |
6 | * Copyright (c) 2008 Dmitry Baryshkov | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
12 | * T7L66 features: | |
13 | * | |
14 | * Supported in this driver: | |
15 | * SD/MMC | |
16 | * SM/NAND flash controller | |
17 | * | |
18 | * As yet not supported | |
19 | * GPIO interface (on NAND pins) | |
20 | * Serial interface | |
21 | * TFT 'interface converter' | |
22 | * PCMCIA interface logic | |
23 | */ | |
24 | ||
25 | #include <linux/kernel.h> | |
26 | #include <linux/module.h> | |
7acb706c | 27 | #include <linux/err.h> |
1f192015 IM |
28 | #include <linux/io.h> |
29 | #include <linux/irq.h> | |
7acb706c | 30 | #include <linux/clk.h> |
1f192015 IM |
31 | #include <linux/platform_device.h> |
32 | #include <linux/mfd/core.h> | |
33 | #include <linux/mfd/tmio.h> | |
34 | #include <linux/mfd/t7l66xb.h> | |
35 | ||
36 | enum { | |
37 | T7L66XB_CELL_NAND, | |
38 | T7L66XB_CELL_MMC, | |
39 | }; | |
40 | ||
41 | #define SCR_REVID 0x08 /* b Revision ID */ | |
42 | #define SCR_IMR 0x42 /* b Interrupt Mask */ | |
43 | #define SCR_DEV_CTL 0xe0 /* b Device control */ | |
44 | #define SCR_ISR 0xe1 /* b Interrupt Status */ | |
45 | #define SCR_GPO_OC 0xf0 /* b GPO output control */ | |
46 | #define SCR_GPO_OS 0xf1 /* b GPO output enable */ | |
47 | #define SCR_GPI_S 0xf2 /* w GPI status */ | |
48 | #define SCR_APDC 0xf8 /* b Active pullup down ctrl */ | |
49 | ||
50 | #define SCR_DEV_CTL_USB BIT(0) /* USB enable */ | |
51 | #define SCR_DEV_CTL_MMC BIT(1) /* MMC enable */ | |
52 | ||
53 | /*--------------------------------------------------------------------------*/ | |
54 | ||
55 | struct t7l66xb { | |
56 | void __iomem *scr; | |
57 | /* Lock to protect registers requiring read/modify/write ops. */ | |
58 | spinlock_t lock; | |
59 | ||
60 | struct resource rscr; | |
7acb706c IM |
61 | struct clk *clk48m; |
62 | struct clk *clk32k; | |
1f192015 IM |
63 | int irq; |
64 | int irq_base; | |
65 | }; | |
66 | ||
67 | /*--------------------------------------------------------------------------*/ | |
68 | ||
69 | static int t7l66xb_mmc_enable(struct platform_device *mmc) | |
70 | { | |
71 | struct platform_device *dev = to_platform_device(mmc->dev.parent); | |
1f192015 IM |
72 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
73 | unsigned long flags; | |
74 | u8 dev_ctl; | |
75 | ||
7acb706c | 76 | clk_enable(t7l66xb->clk32k); |
1f192015 IM |
77 | |
78 | spin_lock_irqsave(&t7l66xb->lock, flags); | |
79 | ||
80 | dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL); | |
81 | dev_ctl |= SCR_DEV_CTL_MMC; | |
82 | tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL); | |
83 | ||
84 | spin_unlock_irqrestore(&t7l66xb->lock, flags); | |
85 | ||
86 | return 0; | |
87 | } | |
88 | ||
89 | static int t7l66xb_mmc_disable(struct platform_device *mmc) | |
90 | { | |
91 | struct platform_device *dev = to_platform_device(mmc->dev.parent); | |
1f192015 IM |
92 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
93 | unsigned long flags; | |
94 | u8 dev_ctl; | |
95 | ||
96 | spin_lock_irqsave(&t7l66xb->lock, flags); | |
97 | ||
98 | dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL); | |
99 | dev_ctl &= ~SCR_DEV_CTL_MMC; | |
100 | tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL); | |
101 | ||
102 | spin_unlock_irqrestore(&t7l66xb->lock, flags); | |
103 | ||
7acb706c | 104 | clk_disable(t7l66xb->clk32k); |
1f192015 IM |
105 | |
106 | return 0; | |
107 | } | |
108 | ||
109 | /*--------------------------------------------------------------------------*/ | |
110 | ||
3446d4bb | 111 | static const struct resource t7l66xb_mmc_resources[] = { |
1f192015 IM |
112 | { |
113 | .start = 0x800, | |
114 | .end = 0x9ff, | |
115 | .flags = IORESOURCE_MEM, | |
116 | }, | |
117 | { | |
118 | .start = 0x200, | |
119 | .end = 0x2ff, | |
120 | .flags = IORESOURCE_MEM, | |
121 | }, | |
122 | { | |
123 | .start = IRQ_T7L66XB_MMC, | |
124 | .end = IRQ_T7L66XB_MMC, | |
125 | .flags = IORESOURCE_IRQ, | |
126 | }, | |
127 | }; | |
128 | ||
3446d4bb | 129 | static const struct resource t7l66xb_nand_resources[] = { |
1f192015 IM |
130 | { |
131 | .start = 0xc00, | |
132 | .end = 0xc07, | |
133 | .flags = IORESOURCE_MEM, | |
134 | }, | |
135 | { | |
136 | .start = 0x0100, | |
137 | .end = 0x01ff, | |
138 | .flags = IORESOURCE_MEM, | |
139 | }, | |
140 | { | |
141 | .start = IRQ_T7L66XB_NAND, | |
142 | .end = IRQ_T7L66XB_NAND, | |
143 | .flags = IORESOURCE_IRQ, | |
144 | }, | |
145 | }; | |
146 | ||
147 | static struct mfd_cell t7l66xb_cells[] = { | |
148 | [T7L66XB_CELL_MMC] = { | |
149 | .name = "tmio-mmc", | |
150 | .enable = t7l66xb_mmc_enable, | |
151 | .disable = t7l66xb_mmc_disable, | |
152 | .num_resources = ARRAY_SIZE(t7l66xb_mmc_resources), | |
153 | .resources = t7l66xb_mmc_resources, | |
154 | }, | |
155 | [T7L66XB_CELL_NAND] = { | |
156 | .name = "tmio-nand", | |
157 | .num_resources = ARRAY_SIZE(t7l66xb_nand_resources), | |
158 | .resources = t7l66xb_nand_resources, | |
159 | }, | |
160 | }; | |
161 | ||
162 | /*--------------------------------------------------------------------------*/ | |
163 | ||
164 | /* Handle the T7L66XB interrupt mux */ | |
165 | static void t7l66xb_irq(unsigned int irq, struct irq_desc *desc) | |
166 | { | |
167 | struct t7l66xb *t7l66xb = get_irq_data(irq); | |
168 | unsigned int isr; | |
169 | unsigned int i, irq_base; | |
170 | ||
171 | irq_base = t7l66xb->irq_base; | |
172 | ||
173 | while ((isr = tmio_ioread8(t7l66xb->scr + SCR_ISR) & | |
174 | ~tmio_ioread8(t7l66xb->scr + SCR_IMR))) | |
175 | for (i = 0; i < T7L66XB_NR_IRQS; i++) | |
176 | if (isr & (1 << i)) | |
177 | generic_handle_irq(irq_base + i); | |
178 | } | |
179 | ||
180 | static void t7l66xb_irq_mask(unsigned int irq) | |
181 | { | |
182 | struct t7l66xb *t7l66xb = get_irq_chip_data(irq); | |
183 | unsigned long flags; | |
184 | u8 imr; | |
185 | ||
186 | spin_lock_irqsave(&t7l66xb->lock, flags); | |
187 | imr = tmio_ioread8(t7l66xb->scr + SCR_IMR); | |
188 | imr |= 1 << (irq - t7l66xb->irq_base); | |
189 | tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR); | |
190 | spin_unlock_irqrestore(&t7l66xb->lock, flags); | |
191 | } | |
192 | ||
193 | static void t7l66xb_irq_unmask(unsigned int irq) | |
194 | { | |
195 | struct t7l66xb *t7l66xb = get_irq_chip_data(irq); | |
196 | unsigned long flags; | |
197 | u8 imr; | |
198 | ||
199 | spin_lock_irqsave(&t7l66xb->lock, flags); | |
200 | imr = tmio_ioread8(t7l66xb->scr + SCR_IMR); | |
201 | imr &= ~(1 << (irq - t7l66xb->irq_base)); | |
202 | tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR); | |
203 | spin_unlock_irqrestore(&t7l66xb->lock, flags); | |
204 | } | |
205 | ||
206 | static struct irq_chip t7l66xb_chip = { | |
207 | .name = "t7l66xb", | |
208 | .ack = t7l66xb_irq_mask, | |
209 | .mask = t7l66xb_irq_mask, | |
210 | .unmask = t7l66xb_irq_unmask, | |
211 | }; | |
212 | ||
213 | /*--------------------------------------------------------------------------*/ | |
214 | ||
215 | /* Install the IRQ handler */ | |
216 | static void t7l66xb_attach_irq(struct platform_device *dev) | |
217 | { | |
218 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); | |
219 | unsigned int irq, irq_base; | |
220 | ||
221 | irq_base = t7l66xb->irq_base; | |
222 | ||
223 | for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) { | |
224 | set_irq_chip(irq, &t7l66xb_chip); | |
225 | set_irq_chip_data(irq, t7l66xb); | |
226 | set_irq_handler(irq, handle_level_irq); | |
227 | #ifdef CONFIG_ARM | |
228 | set_irq_flags(irq, IRQF_VALID | IRQF_PROBE); | |
229 | #endif | |
230 | } | |
231 | ||
232 | set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING); | |
233 | set_irq_data(t7l66xb->irq, t7l66xb); | |
234 | set_irq_chained_handler(t7l66xb->irq, t7l66xb_irq); | |
235 | } | |
236 | ||
237 | static void t7l66xb_detach_irq(struct platform_device *dev) | |
238 | { | |
239 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); | |
240 | unsigned int irq, irq_base; | |
241 | ||
242 | irq_base = t7l66xb->irq_base; | |
243 | ||
244 | set_irq_chained_handler(t7l66xb->irq, NULL); | |
245 | set_irq_data(t7l66xb->irq, NULL); | |
246 | ||
247 | for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) { | |
248 | #ifdef CONFIG_ARM | |
249 | set_irq_flags(irq, 0); | |
250 | #endif | |
251 | set_irq_chip(irq, NULL); | |
252 | set_irq_chip_data(irq, NULL); | |
253 | } | |
254 | } | |
255 | ||
256 | /*--------------------------------------------------------------------------*/ | |
257 | ||
258 | #ifdef CONFIG_PM | |
259 | static int t7l66xb_suspend(struct platform_device *dev, pm_message_t state) | |
260 | { | |
7acb706c | 261 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
1f192015 IM |
262 | struct t7l66xb_platform_data *pdata = dev->dev.platform_data; |
263 | ||
264 | if (pdata && pdata->suspend) | |
265 | pdata->suspend(dev); | |
7acb706c | 266 | clk_disable(t7l66xb->clk48m); |
1f192015 IM |
267 | |
268 | return 0; | |
269 | } | |
270 | ||
271 | static int t7l66xb_resume(struct platform_device *dev) | |
272 | { | |
7acb706c | 273 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); |
1f192015 IM |
274 | struct t7l66xb_platform_data *pdata = dev->dev.platform_data; |
275 | ||
7acb706c | 276 | clk_enable(t7l66xb->clk48m); |
1f192015 IM |
277 | if (pdata && pdata->resume) |
278 | pdata->resume(dev); | |
279 | ||
280 | return 0; | |
281 | } | |
282 | #else | |
283 | #define t7l66xb_suspend NULL | |
284 | #define t7l66xb_resume NULL | |
285 | #endif | |
286 | ||
287 | /*--------------------------------------------------------------------------*/ | |
288 | ||
289 | static int t7l66xb_probe(struct platform_device *dev) | |
290 | { | |
291 | struct t7l66xb_platform_data *pdata = dev->dev.platform_data; | |
292 | struct t7l66xb *t7l66xb; | |
293 | struct resource *iomem, *rscr; | |
294 | int ret; | |
295 | ||
296 | iomem = platform_get_resource(dev, IORESOURCE_MEM, 0); | |
297 | if (!iomem) | |
298 | return -EINVAL; | |
299 | ||
300 | t7l66xb = kzalloc(sizeof *t7l66xb, GFP_KERNEL); | |
301 | if (!t7l66xb) | |
302 | return -ENOMEM; | |
303 | ||
304 | spin_lock_init(&t7l66xb->lock); | |
305 | ||
306 | platform_set_drvdata(dev, t7l66xb); | |
307 | ||
308 | ret = platform_get_irq(dev, 0); | |
309 | if (ret >= 0) | |
310 | t7l66xb->irq = ret; | |
311 | else | |
312 | goto err_noirq; | |
313 | ||
314 | t7l66xb->irq_base = pdata->irq_base; | |
315 | ||
7acb706c IM |
316 | t7l66xb->clk32k = clk_get(&dev->dev, "CLK_CK32K"); |
317 | if (IS_ERR(t7l66xb->clk32k)) { | |
318 | ret = PTR_ERR(t7l66xb->clk32k); | |
319 | goto err_clk32k_get; | |
320 | } | |
321 | ||
322 | t7l66xb->clk48m = clk_get(&dev->dev, "CLK_CK48M"); | |
323 | if (IS_ERR(t7l66xb->clk48m)) { | |
324 | ret = PTR_ERR(t7l66xb->clk48m); | |
325 | clk_put(t7l66xb->clk32k); | |
326 | goto err_clk48m_get; | |
327 | } | |
328 | ||
1f192015 IM |
329 | rscr = &t7l66xb->rscr; |
330 | rscr->name = "t7l66xb-core"; | |
331 | rscr->start = iomem->start; | |
332 | rscr->end = iomem->start + 0xff; | |
333 | rscr->flags = IORESOURCE_MEM; | |
334 | ||
335 | ret = request_resource(iomem, rscr); | |
336 | if (ret) | |
337 | goto err_request_scr; | |
338 | ||
339 | t7l66xb->scr = ioremap(rscr->start, rscr->end - rscr->start + 1); | |
340 | if (!t7l66xb->scr) { | |
341 | ret = -ENOMEM; | |
342 | goto err_ioremap; | |
343 | } | |
344 | ||
7acb706c IM |
345 | clk_enable(t7l66xb->clk48m); |
346 | ||
1f192015 IM |
347 | if (pdata && pdata->enable) |
348 | pdata->enable(dev); | |
349 | ||
350 | /* Mask all interrupts */ | |
351 | tmio_iowrite8(0xbf, t7l66xb->scr + SCR_IMR); | |
352 | ||
353 | printk(KERN_INFO "%s rev %d @ 0x%08lx, irq %d\n", | |
354 | dev->name, tmio_ioread8(t7l66xb->scr + SCR_REVID), | |
355 | (unsigned long)iomem->start, t7l66xb->irq); | |
356 | ||
357 | t7l66xb_attach_irq(dev); | |
358 | ||
359 | t7l66xb_cells[T7L66XB_CELL_NAND].driver_data = pdata->nand_data; | |
56bf2bda SO |
360 | t7l66xb_cells[T7L66XB_CELL_NAND].platform_data = |
361 | &t7l66xb_cells[T7L66XB_CELL_NAND]; | |
362 | t7l66xb_cells[T7L66XB_CELL_NAND].data_size = | |
363 | sizeof(t7l66xb_cells[T7L66XB_CELL_NAND]); | |
1f192015 | 364 | |
8a4fbe01 IM |
365 | t7l66xb_cells[T7L66XB_CELL_MMC].platform_data = |
366 | &t7l66xb_cells[T7L66XB_CELL_MMC]; | |
367 | t7l66xb_cells[T7L66XB_CELL_MMC].data_size = | |
368 | sizeof(t7l66xb_cells[T7L66XB_CELL_MMC]); | |
369 | ||
56bf2bda SO |
370 | ret = mfd_add_devices(&dev->dev, dev->id, |
371 | t7l66xb_cells, ARRAY_SIZE(t7l66xb_cells), | |
372 | iomem, t7l66xb->irq_base); | |
1f192015 IM |
373 | |
374 | if (!ret) | |
375 | return 0; | |
376 | ||
377 | t7l66xb_detach_irq(dev); | |
378 | iounmap(t7l66xb->scr); | |
379 | err_ioremap: | |
380 | release_resource(&t7l66xb->rscr); | |
1f192015 IM |
381 | err_request_scr: |
382 | kfree(t7l66xb); | |
7acb706c IM |
383 | clk_put(t7l66xb->clk48m); |
384 | err_clk48m_get: | |
385 | clk_put(t7l66xb->clk32k); | |
386 | err_clk32k_get: | |
387 | err_noirq: | |
1f192015 IM |
388 | return ret; |
389 | } | |
390 | ||
391 | static int t7l66xb_remove(struct platform_device *dev) | |
392 | { | |
393 | struct t7l66xb_platform_data *pdata = dev->dev.platform_data; | |
394 | struct t7l66xb *t7l66xb = platform_get_drvdata(dev); | |
395 | int ret; | |
396 | ||
397 | ret = pdata->disable(dev); | |
7acb706c IM |
398 | clk_disable(t7l66xb->clk48m); |
399 | clk_put(t7l66xb->clk48m); | |
1f192015 IM |
400 | t7l66xb_detach_irq(dev); |
401 | iounmap(t7l66xb->scr); | |
402 | release_resource(&t7l66xb->rscr); | |
56bf2bda | 403 | mfd_remove_devices(&dev->dev); |
1f192015 IM |
404 | platform_set_drvdata(dev, NULL); |
405 | kfree(t7l66xb); | |
406 | ||
407 | return ret; | |
408 | ||
409 | } | |
410 | ||
411 | static struct platform_driver t7l66xb_platform_driver = { | |
412 | .driver = { | |
413 | .name = "t7l66xb", | |
414 | .owner = THIS_MODULE, | |
415 | }, | |
416 | .suspend = t7l66xb_suspend, | |
417 | .resume = t7l66xb_resume, | |
418 | .probe = t7l66xb_probe, | |
419 | .remove = t7l66xb_remove, | |
420 | }; | |
421 | ||
422 | /*--------------------------------------------------------------------------*/ | |
423 | ||
424 | static int __init t7l66xb_init(void) | |
425 | { | |
426 | int retval = 0; | |
427 | ||
428 | retval = platform_driver_register(&t7l66xb_platform_driver); | |
429 | return retval; | |
430 | } | |
431 | ||
432 | static void __exit t7l66xb_exit(void) | |
433 | { | |
434 | platform_driver_unregister(&t7l66xb_platform_driver); | |
435 | } | |
436 | ||
437 | module_init(t7l66xb_init); | |
438 | module_exit(t7l66xb_exit); | |
439 | ||
440 | MODULE_DESCRIPTION("Toshiba T7L66XB core driver"); | |
441 | MODULE_LICENSE("GPL v2"); | |
442 | MODULE_AUTHOR("Ian Molton"); | |
443 | MODULE_ALIAS("platform:t7l66xb"); |