]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/media/video/s5p-fimc/fimc-core.c
git://bbs.cooldavid.org / net-next-2.6.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
V4L/DVB: uvcvideo: Restrict frame rates for Chicony CNF7129 webcam
[net-next-2.6.git] / drivers / media / video / s5p-fimc / fimc-core.c
CommitLineData
5fd8f738
SN		 1/*
2 * S5P camera interface (video postprocessor) driver
3 *
4 * Copyright (c) 2010 Samsung Electronics
5 *
6 * Sylwester Nawrocki, <s.nawrocki@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published
10 * by the Free Software Foundation, either version 2 of the License,
11 * or (at your option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/version.h>
17#include <linux/types.h>
18#include <linux/errno.h>
19#include <linux/bug.h>
20#include <linux/interrupt.h>
21#include <linux/device.h>
22#include <linux/platform_device.h>
23#include <linux/list.h>
24#include <linux/io.h>
25#include <linux/slab.h>
26#include <linux/clk.h>
27#include <media/v4l2-ioctl.h>
28#include <media/videobuf-dma-contig.h>
29
30#include "fimc-core.h"
31
32static char *fimc_clock_name[NUM_FIMC_CLOCKS] = { "sclk_fimc", "fimc" };
33
34static struct fimc_fmt fimc_formats[] = {
35 {
36 .name = "RGB565",
37 .fourcc = V4L2_PIX_FMT_RGB565X,
38 .depth = 16,
39 .color = S5P_FIMC_RGB565,
40 .buff_cnt = 1,
41 .planes_cnt = 1
42 }, {
43 .name = "BGR666",
44 .fourcc = V4L2_PIX_FMT_BGR666,
45 .depth = 32,
46 .color = S5P_FIMC_RGB666,
47 .buff_cnt = 1,
48 .planes_cnt = 1
49 }, {
50 .name = "XRGB-8-8-8-8, 24 bpp",
51 .fourcc = V4L2_PIX_FMT_RGB24,
52 .depth = 32,
53 .color = S5P_FIMC_RGB888,
54 .buff_cnt = 1,
55 .planes_cnt = 1
56 }, {
57 .name = "YUV 4:2:2 packed, YCbYCr",
58 .fourcc = V4L2_PIX_FMT_YUYV,
59 .depth = 16,
60 .color = S5P_FIMC_YCBYCR422,
61 .buff_cnt = 1,
62 .planes_cnt = 1
63 }, {
64 .name = "YUV 4:2:2 packed, CbYCrY",
65 .fourcc = V4L2_PIX_FMT_UYVY,
66 .depth = 16,
67 .color = S5P_FIMC_CBYCRY422,
68 .buff_cnt = 1,
69 .planes_cnt = 1
70 }, {
71 .name = "YUV 4:2:2 packed, CrYCbY",
72 .fourcc = V4L2_PIX_FMT_VYUY,
73 .depth = 16,
74 .color = S5P_FIMC_CRYCBY422,
75 .buff_cnt = 1,
76 .planes_cnt = 1
77 }, {
78 .name = "YUV 4:2:2 packed, YCrYCb",
79 .fourcc = V4L2_PIX_FMT_YVYU,
80 .depth = 16,
81 .color = S5P_FIMC_YCRYCB422,
82 .buff_cnt = 1,
83 .planes_cnt = 1
84 }, {
85 .name = "YUV 4:2:2 planar, Y/Cb/Cr",
86 .fourcc = V4L2_PIX_FMT_YUV422P,
87 .depth = 12,
88 .color = S5P_FIMC_YCBCR422,
89 .buff_cnt = 1,
90 .planes_cnt = 3
91 }, {
92 .name = "YUV 4:2:2 planar, Y/CbCr",
93 .fourcc = V4L2_PIX_FMT_NV16,
94 .depth = 16,
95 .color = S5P_FIMC_YCBCR422,
96 .buff_cnt = 1,
97 .planes_cnt = 2
98 }, {
99 .name = "YUV 4:2:2 planar, Y/CrCb",
100 .fourcc = V4L2_PIX_FMT_NV61,
101 .depth = 16,
102 .color = S5P_FIMC_RGB565,
103 .buff_cnt = 1,
104 .planes_cnt = 2
105 }, {
106 .name = "YUV 4:2:0 planar, YCbCr",
107 .fourcc = V4L2_PIX_FMT_YUV420,
108 .depth = 12,
109 .color = S5P_FIMC_YCBCR420,
110 .buff_cnt = 1,
111 .planes_cnt = 3
112 }, {
113 .name = "YUV 4:2:0 planar, Y/CbCr",
114 .fourcc = V4L2_PIX_FMT_NV12,
115 .depth = 12,
116 .color = S5P_FIMC_YCBCR420,
117 .buff_cnt = 1,
118 .planes_cnt = 2
119 }
120 };
121
122static struct v4l2_queryctrl fimc_ctrls[] = {
123 {
124 .id = V4L2_CID_HFLIP,
125 .type = V4L2_CTRL_TYPE_BOOLEAN,
126 .name = "Horizontal flip",
127 .minimum = 0,
128 .maximum = 1,
129 .default_value = 0,
130 },
131 {
132 .id = V4L2_CID_VFLIP,
133 .type = V4L2_CTRL_TYPE_BOOLEAN,
134 .name = "Vertical flip",
135 .minimum = 0,
136 .maximum = 1,
137 .default_value = 0,
138 },
139 {
140 .id = V4L2_CID_ROTATE,
141 .type = V4L2_CTRL_TYPE_INTEGER,
142 .name = "Rotation (CCW)",
143 .minimum = 0,
144 .maximum = 270,
145 .step = 90,
146 .default_value = 0,
147 },
148};
149
150
151static struct v4l2_queryctrl *get_ctrl(int id)
152{
153 int i;
154
155 for (i = 0; i < ARRAY_SIZE(fimc_ctrls); ++i)
156 if (id == fimc_ctrls[i].id)
157 return &fimc_ctrls[i];
158 return NULL;
159}
160
161static int fimc_check_scaler_ratio(struct v4l2_rect *r, struct fimc_frame *f)
162{
163 if (r->width > f->width) {
164 if (f->width > (r->width * SCALER_MAX_HRATIO))
165 return -EINVAL;
166 } else {
167 if ((f->width * SCALER_MAX_HRATIO) < r->width)
168 return -EINVAL;
169 }
170
171 if (r->height > f->height) {
172 if (f->height > (r->height * SCALER_MAX_VRATIO))
173 return -EINVAL;
174 } else {
175 if ((f->height * SCALER_MAX_VRATIO) < r->height)
176 return -EINVAL;
177 }
178
179 return 0;
180}
181
182static int fimc_get_scaler_factor(u32 src, u32 tar, u32 *ratio, u32 *shift)
183{
184 if (src >= tar * 64) {
185 return -EINVAL;
186 } else if (src >= tar * 32) {
187 *ratio = 32;
188 *shift = 5;
189 } else if (src >= tar * 16) {
190 *ratio = 16;
191 *shift = 4;
192 } else if (src >= tar * 8) {
193 *ratio = 8;
194 *shift = 3;
195 } else if (src >= tar * 4) {
196 *ratio = 4;
197 *shift = 2;
198 } else if (src >= tar * 2) {
199 *ratio = 2;
200 *shift = 1;
201 } else {
202 *ratio = 1;
203 *shift = 0;
204 }
205
206 return 0;
207}
208
209static int fimc_set_scaler_info(struct fimc_ctx *ctx)
210{
211 struct fimc_scaler *sc = &ctx->scaler;
212 struct fimc_frame *s_frame = &ctx->s_frame;
213 struct fimc_frame *d_frame = &ctx->d_frame;
214 int tx, ty, sx, sy;
215 int ret;
216
217 tx = d_frame->width;
218 ty = d_frame->height;
219 if (tx <= 0 || ty <= 0) {
220 v4l2_err(&ctx->fimc_dev->m2m.v4l2_dev,
221 "invalid target size: %d x %d", tx, ty);
222 return -EINVAL;
223 }
224
225 sx = s_frame->width;
226 sy = s_frame->height;
227 if (sx <= 0 || sy <= 0) {
228 err("invalid source size: %d x %d", sx, sy);
229 return -EINVAL;
230 }
231
232 sc->real_width = sx;
233 sc->real_height = sy;
234 dbg("sx= %d, sy= %d, tx= %d, ty= %d", sx, sy, tx, ty);
235
236 ret = fimc_get_scaler_factor(sx, tx, &sc->pre_hratio, &sc->hfactor);
237 if (ret)
238 return ret;
239
240 ret = fimc_get_scaler_factor(sy, ty, &sc->pre_vratio, &sc->vfactor);
241 if (ret)
242 return ret;
243
244 sc->pre_dst_width = sx / sc->pre_hratio;
245 sc->pre_dst_height = sy / sc->pre_vratio;
246
247 sc->main_hratio = (sx << 8) / (tx << sc->hfactor);
248 sc->main_vratio = (sy << 8) / (ty << sc->vfactor);
249
250 sc->scaleup_h = (tx >= sx) ? 1 : 0;
251 sc->scaleup_v = (ty >= sy) ? 1 : 0;
252
253 /* check to see if input and output size/format differ */
254 if (s_frame->fmt->color == d_frame->fmt->color
255 && s_frame->width == d_frame->width
256 && s_frame->height == d_frame->height)
257 sc->copy_mode = 1;
258 else
259 sc->copy_mode = 0;
260
261 return 0;
262}
263
264
265static irqreturn_t fimc_isr(int irq, void *priv)
266{
267 struct fimc_vid_buffer *src_buf, *dst_buf;
268 struct fimc_dev *fimc = (struct fimc_dev *)priv;
269 struct fimc_ctx *ctx;
270
271 BUG_ON(!fimc);
272 fimc_hw_clear_irq(fimc);
273
274 spin_lock(&fimc->slock);
275
276 if (test_and_clear_bit(ST_M2M_PEND, &fimc->state)) {
277 ctx = v4l2_m2m_get_curr_priv(fimc->m2m.m2m_dev);
278 if (!ctx || !ctx->m2m_ctx)
279 goto isr_unlock;
280 src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
281 dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
282 if (src_buf && dst_buf) {
283 spin_lock(&fimc->irqlock);
284 src_buf->vb.state = dst_buf->vb.state = VIDEOBUF_DONE;
285 wake_up(&src_buf->vb.done);
286 wake_up(&dst_buf->vb.done);
287 spin_unlock(&fimc->irqlock);
288 v4l2_m2m_job_finish(fimc->m2m.m2m_dev, ctx->m2m_ctx);
289 }
290 }
291
292isr_unlock:
293 spin_unlock(&fimc->slock);
294 return IRQ_HANDLED;
295}
296
297/* The color format (planes_cnt, buff_cnt) must be already configured. */
298static int fimc_prepare_addr(struct fimc_ctx *ctx,
299 struct fimc_vid_buffer *buf, enum v4l2_buf_type type)
300{
301 struct fimc_frame *frame;
302 struct fimc_addr *paddr;
303 u32 pix_size;
304 int ret = 0;
305
03e30ca5
PO		 306 frame = ctx_m2m_get_frame(ctx, type);
307 if (IS_ERR(frame))
308 return PTR_ERR(frame);
5fd8f738
SN		 309 paddr = &frame->paddr;
310
311 if (!buf)
312 return -EINVAL;
313
314 pix_size = frame->width * frame->height;
315
316 dbg("buff_cnt= %d, planes_cnt= %d, frame->size= %d, pix_size= %d",
317 frame->fmt->buff_cnt, frame->fmt->planes_cnt,
318 frame->size, pix_size);
319
320 if (frame->fmt->buff_cnt == 1) {
321 paddr->y = videobuf_to_dma_contig(&buf->vb);
322 switch (frame->fmt->planes_cnt) {
323 case 1:
324 paddr->cb = 0;
325 paddr->cr = 0;
326 break;
327 case 2:
328 /* decompose Y into Y/Cb */
329 paddr->cb = (u32)(paddr->y + pix_size);
330 paddr->cr = 0;
331 break;
332 case 3:
333 paddr->cb = (u32)(paddr->y + pix_size);
334 /* decompose Y into Y/Cb/Cr */
335 if (S5P_FIMC_YCBCR420 == frame->fmt->color)
336 paddr->cr = (u32)(paddr->cb
337 + (pix_size >> 2));
338 else /* 422 */
339 paddr->cr = (u32)(paddr->cb
340 + (pix_size >> 1));
341 break;
342 default:
343 return -EINVAL;
344 }
345 }
346
347 dbg("PHYS_ADDR: type= %d, y= 0x%X cb= 0x%X cr= 0x%X ret= %d",
348 type, paddr->y, paddr->cb, paddr->cr, ret);
349
350 return ret;
351}
352
353/* Set order for 1 and 2 plane YCBCR 4:2:2 formats. */
354static void fimc_set_yuv_order(struct fimc_ctx *ctx)
355{
356 /* The one only mode supported in SoC. */
357 ctx->in_order_2p = S5P_FIMC_LSB_CRCB;
358 ctx->out_order_2p = S5P_FIMC_LSB_CRCB;
359
360 /* Set order for 1 plane input formats. */
361 switch (ctx->s_frame.fmt->color) {
362 case S5P_FIMC_YCRYCB422:
363 ctx->in_order_1p = S5P_FIMC_IN_YCRYCB;
364 break;
365 case S5P_FIMC_CBYCRY422:
366 ctx->in_order_1p = S5P_FIMC_IN_CBYCRY;
367 break;
368 case S5P_FIMC_CRYCBY422:
369 ctx->in_order_1p = S5P_FIMC_IN_CRYCBY;
370 break;
371 case S5P_FIMC_YCBYCR422:
372 default:
373 ctx->in_order_1p = S5P_FIMC_IN_YCBYCR;
374 break;
375 }
376 dbg("ctx->in_order_1p= %d", ctx->in_order_1p);
377
378 switch (ctx->d_frame.fmt->color) {
379 case S5P_FIMC_YCRYCB422:
380 ctx->out_order_1p = S5P_FIMC_OUT_YCRYCB;
381 break;
382 case S5P_FIMC_CBYCRY422:
383 ctx->out_order_1p = S5P_FIMC_OUT_CBYCRY;
384 break;
385 case S5P_FIMC_CRYCBY422:
386 ctx->out_order_1p = S5P_FIMC_OUT_CRYCBY;
387 break;
388 case S5P_FIMC_YCBYCR422:
389 default:
390 ctx->out_order_1p = S5P_FIMC_OUT_YCBYCR;
391 break;
392 }
393 dbg("ctx->out_order_1p= %d", ctx->out_order_1p);
394}
395
396/**
397 * fimc_prepare_config - check dimensions, operation and color mode
398 * and pre-calculate offset and the scaling coefficients.
399 *
400 * @ctx: hardware context information
401 * @flags: flags indicating which parameters to check/update
402 *
403 * Return: 0 if dimensions are valid or non zero otherwise.
404 */
405static int fimc_prepare_config(struct fimc_ctx *ctx, u32 flags)
406{
407 struct fimc_frame *s_frame, *d_frame;
408 struct fimc_vid_buffer *buf = NULL;
409 struct samsung_fimc_variant *variant = ctx->fimc_dev->variant;
410 int ret = 0;
411
412 s_frame = &ctx->s_frame;
413 d_frame = &ctx->d_frame;
414
415 if (flags & FIMC_PARAMS) {
416 if ((ctx->out_path == FIMC_DMA) &&
417 (ctx->rotation == 90 || ctx->rotation == 270)) {
418 swap(d_frame->f_width, d_frame->f_height);
419 swap(d_frame->width, d_frame->height);
420 }
421
422 /* Prepare the output offset ratios for scaler. */
423 d_frame->dma_offset.y_h = d_frame->offs_h;
424 if (!variant->pix_hoff)
425 d_frame->dma_offset.y_h *= (d_frame->fmt->depth >> 3);
426
427 d_frame->dma_offset.y_v = d_frame->offs_v;
428
429 d_frame->dma_offset.cb_h = d_frame->offs_h;
430 d_frame->dma_offset.cb_v = d_frame->offs_v;
431
432 d_frame->dma_offset.cr_h = d_frame->offs_h;
433 d_frame->dma_offset.cr_v = d_frame->offs_v;
434
435 if (!variant->pix_hoff && d_frame->fmt->planes_cnt == 3) {
436 d_frame->dma_offset.cb_h >>= 1;
437 d_frame->dma_offset.cb_v >>= 1;
438 d_frame->dma_offset.cr_h >>= 1;
439 d_frame->dma_offset.cr_v >>= 1;
440 }
441
442 dbg("out offset: color= %d, y_h= %d, y_v= %d",
443 d_frame->fmt->color,
444 d_frame->dma_offset.y_h, d_frame->dma_offset.y_v);
445
446 /* Prepare the input offset ratios for scaler. */
447 s_frame->dma_offset.y_h = s_frame->offs_h;
448 if (!variant->pix_hoff)
449 s_frame->dma_offset.y_h *= (s_frame->fmt->depth >> 3);
450 s_frame->dma_offset.y_v = s_frame->offs_v;
451
452 s_frame->dma_offset.cb_h = s_frame->offs_h;
453 s_frame->dma_offset.cb_v = s_frame->offs_v;
454
455 s_frame->dma_offset.cr_h = s_frame->offs_h;
456 s_frame->dma_offset.cr_v = s_frame->offs_v;
457
458 if (!variant->pix_hoff && s_frame->fmt->planes_cnt == 3) {
459 s_frame->dma_offset.cb_h >>= 1;
460 s_frame->dma_offset.cb_v >>= 1;
461 s_frame->dma_offset.cr_h >>= 1;
462 s_frame->dma_offset.cr_v >>= 1;
463 }
464
465 dbg("in offset: color= %d, y_h= %d, y_v= %d",
466 s_frame->fmt->color, s_frame->dma_offset.y_h,
467 s_frame->dma_offset.y_v);
468
469 fimc_set_yuv_order(ctx);
470
471 /* Check against the scaler ratio. */
472 if (s_frame->height > (SCALER_MAX_VRATIO * d_frame->height) ||
473 s_frame->width > (SCALER_MAX_HRATIO * d_frame->width)) {
474 err("out of scaler range");
475 return -EINVAL;
476 }
477 }
478
479 /* Input DMA mode is not allowed when the scaler is disabled. */
480 ctx->scaler.enabled = 1;
481
482 if (flags & FIMC_SRC_ADDR) {
483 buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
484 ret = fimc_prepare_addr(ctx, buf,
485 V4L2_BUF_TYPE_VIDEO_OUTPUT);
486 if (ret)
487 return ret;
488 }
489
490 if (flags & FIMC_DST_ADDR) {
491 buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
492 ret = fimc_prepare_addr(ctx, buf,
493 V4L2_BUF_TYPE_VIDEO_CAPTURE);
494 }
495
496 return ret;
497}
498
499static void fimc_dma_run(void *priv)
500{
501 struct fimc_ctx *ctx = priv;
502 struct fimc_dev *fimc;
503 unsigned long flags;
504 u32 ret;
505
506 if (WARN(!ctx, "null hardware context"))
507 return;
508
509 fimc = ctx->fimc_dev;
510
511 spin_lock_irqsave(&ctx->slock, flags);
512 set_bit(ST_M2M_PEND, &fimc->state);
513
514 ctx->state |= (FIMC_SRC_ADDR | FIMC_DST_ADDR);
515 ret = fimc_prepare_config(ctx, ctx->state);
516 if (ret) {
517 err("general configuration error");
518 goto dma_unlock;
519 }
520
521 if (fimc->m2m.ctx != ctx)
522 ctx->state |= FIMC_PARAMS;
523
524 fimc_hw_set_input_addr(fimc, &ctx->s_frame.paddr);
525
526 if (ctx->state & FIMC_PARAMS) {
527 fimc_hw_set_input_path(ctx);
528 fimc_hw_set_in_dma(ctx);
529 if (fimc_set_scaler_info(ctx)) {
530 err("scaler configuration error");
531 goto dma_unlock;
532 }
533 fimc_hw_set_prescaler(ctx);
534 fimc_hw_set_scaler(ctx);
535 fimc_hw_set_target_format(ctx);
536 fimc_hw_set_rotation(ctx);
537 fimc_hw_set_effect(ctx);
538 }
539
540 fimc_hw_set_output_path(ctx);
541 if (ctx->state & (FIMC_DST_ADDR | FIMC_PARAMS))
542 fimc_hw_set_output_addr(fimc, &ctx->d_frame.paddr);
543
544 if (ctx->state & FIMC_PARAMS)
545 fimc_hw_set_out_dma(ctx);
546
547 if (ctx->scaler.enabled)
548 fimc_hw_start_scaler(fimc);
549 fimc_hw_en_capture(ctx);
550
551 ctx->state = 0;
552 fimc_hw_start_in_dma(fimc);
553
554 fimc->m2m.ctx = ctx;
555
556dma_unlock:
557 spin_unlock_irqrestore(&ctx->slock, flags);
558}
559
03e30ca5
PO		 560static void fimc_job_abort(void *priv)
561{
562 /* Nothing done in job_abort. */
563}
5fd8f738
SN		 564
565static void fimc_buf_release(struct videobuf_queue *vq,
566 struct videobuf_buffer *vb)
567{
568 videobuf_dma_contig_free(vq, vb);
569 vb->state = VIDEOBUF_NEEDS_INIT;
570}
571
572static int fimc_buf_setup(struct videobuf_queue *vq, unsigned int *count,
573 unsigned int *size)
574{
575 struct fimc_ctx *ctx = vq->priv_data;
576 struct fimc_frame *frame;
577
03e30ca5
PO		 578 frame = ctx_m2m_get_frame(ctx, vq->type);
579 if (IS_ERR(frame))
580 return PTR_ERR(frame);
5fd8f738
SN		 581
582 *size = (frame->width * frame->height * frame->fmt->depth) >> 3;
583 if (0 == *count)
584 *count = 1;
585 return 0;
586}
587
588static int fimc_buf_prepare(struct videobuf_queue *vq,
589 struct videobuf_buffer *vb, enum v4l2_field field)
590{
591 struct fimc_ctx *ctx = vq->priv_data;
592 struct v4l2_device *v4l2_dev = &ctx->fimc_dev->m2m.v4l2_dev;
593 struct fimc_frame *frame;
594 int ret;
595
03e30ca5
PO		 596 frame = ctx_m2m_get_frame(ctx, vq->type);
597 if (IS_ERR(frame))
598 return PTR_ERR(frame);
5fd8f738
SN		 599
600 if (vb->baddr) {
601 if (vb->bsize < frame->size) {
602 v4l2_err(v4l2_dev,
603 "User-provided buffer too small (%d < %d)\n",
604 vb->bsize, frame->size);
605 WARN_ON(1);
606 return -EINVAL;
607 }
608 } else if (vb->state != VIDEOBUF_NEEDS_INIT
609 && vb->bsize < frame->size) {
610 return -EINVAL;
611 }
612
613 vb->width = frame->width;
614 vb->height = frame->height;
615 vb->bytesperline = (frame->width * frame->fmt->depth) >> 3;
616 vb->size = frame->size;
617 vb->field = field;
618
619 if (VIDEOBUF_NEEDS_INIT == vb->state) {
620 ret = videobuf_iolock(vq, vb, NULL);
621 if (ret) {
622 v4l2_err(v4l2_dev, "Iolock failed\n");
623 fimc_buf_release(vq, vb);
624 return ret;
625 }
626 }
627 vb->state = VIDEOBUF_PREPARED;
628
629 return 0;
630}
631
632static void fimc_buf_queue(struct videobuf_queue *vq,
633 struct videobuf_buffer *vb)
634{
635 struct fimc_ctx *ctx = vq->priv_data;
636 v4l2_m2m_buf_queue(ctx->m2m_ctx, vq, vb);
637}
638
03e30ca5 639static struct videobuf_queue_ops fimc_qops = {
5fd8f738
SN		 640 .buf_setup = fimc_buf_setup,
641 .buf_prepare = fimc_buf_prepare,
642 .buf_queue = fimc_buf_queue,
643 .buf_release = fimc_buf_release,
644};
645
646static int fimc_m2m_querycap(struct file *file, void *priv,
647 struct v4l2_capability *cap)
648{
649 struct fimc_ctx *ctx = file->private_data;
650 struct fimc_dev *fimc = ctx->fimc_dev;
651
652 strncpy(cap->driver, fimc->pdev->name, sizeof(cap->driver) - 1);
653 strncpy(cap->card, fimc->pdev->name, sizeof(cap->card) - 1);
654 cap->bus_info[0] = 0;
655 cap->version = KERNEL_VERSION(1, 0, 0);
656 cap->capabilities = V4L2_CAP_STREAMING |
657 V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT;
658
659 return 0;
660}
661
662static int fimc_m2m_enum_fmt(struct file *file, void *priv,
663 struct v4l2_fmtdesc *f)
664{
665 struct fimc_fmt *fmt;
666
667 if (f->index >= ARRAY_SIZE(fimc_formats))
668 return -EINVAL;
669
670 fmt = &fimc_formats[f->index];
671 strncpy(f->description, fmt->name, sizeof(f->description) - 1);
672 f->pixelformat = fmt->fourcc;
673 return 0;
674}
675
676static int fimc_m2m_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
677{
678 struct fimc_ctx *ctx = priv;
679 struct fimc_frame *frame;
680
03e30ca5
PO		 681 frame = ctx_m2m_get_frame(ctx, f->type);
682 if (IS_ERR(frame))
683 return PTR_ERR(frame);
5fd8f738
SN		 684
685 f->fmt.pix.width = frame->width;
686 f->fmt.pix.height = frame->height;
687 f->fmt.pix.field = V4L2_FIELD_NONE;
688 f->fmt.pix.pixelformat = frame->fmt->fourcc;
689
690 return 0;
691}
692
693static struct fimc_fmt *find_format(struct v4l2_format *f)
694{
695 struct fimc_fmt *fmt;
696 unsigned int i;
697
698 for (i = 0; i < ARRAY_SIZE(fimc_formats); ++i) {
699 fmt = &fimc_formats[i];
700 if (fmt->fourcc == f->fmt.pix.pixelformat)
701 break;
702 }
703 if (i == ARRAY_SIZE(fimc_formats))
704 return NULL;
705
706 return fmt;
707}
708
709static int fimc_m2m_try_fmt(struct file *file, void *priv,
710 struct v4l2_format *f)
711{
712 struct fimc_fmt *fmt;
713 u32 max_width, max_height, mod_x, mod_y;
714 struct fimc_ctx *ctx = priv;
715 struct fimc_dev *fimc = ctx->fimc_dev;
716 struct v4l2_pix_format *pix = &f->fmt.pix;
717 struct samsung_fimc_variant *variant = fimc->variant;
718
719 fmt = find_format(f);
720 if (!fmt) {
721 v4l2_err(&fimc->m2m.v4l2_dev,
722 "Fourcc format (0x%X) invalid.\n", pix->pixelformat);
723 return -EINVAL;
724 }
725
726 if (pix->field == V4L2_FIELD_ANY)
727 pix->field = V4L2_FIELD_NONE;
728 else if (V4L2_FIELD_NONE != pix->field)
729 return -EINVAL;
730
731 if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
732 max_width = variant->scaler_dis_w;
733 max_height = variant->scaler_dis_w;
734 mod_x = variant->min_inp_pixsize;
735 mod_y = variant->min_inp_pixsize;
736 } else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
737 max_width = variant->out_rot_dis_w;
738 max_height = variant->out_rot_dis_w;
739 mod_x = variant->min_out_pixsize;
740 mod_y = variant->min_out_pixsize;
741 } else {
742 err("Wrong stream type (%d)", f->type);
743 return -EINVAL;
744 }
745
746 dbg("max_w= %d, max_h= %d", max_width, max_height);
747
748 if (pix->height > max_height)
749 pix->height = max_height;
750 if (pix->width > max_width)
751 pix->width = max_width;
752
753 if (tiled_fmt(fmt)) {
754 mod_x = 64; /* 64x32 tile */
755 mod_y = 32;
756 }
757
758 dbg("mod_x= 0x%X, mod_y= 0x%X", mod_x, mod_y);
759
760 pix->width = (pix->width == 0) ? mod_x : ALIGN(pix->width, mod_x);
761 pix->height = (pix->height == 0) ? mod_y : ALIGN(pix->height, mod_y);
762
763 if (pix->bytesperline == 0 ||
764 pix->bytesperline * 8 / fmt->depth > pix->width)
765 pix->bytesperline = (pix->width * fmt->depth) >> 3;
766
767 if (pix->sizeimage == 0)
768 pix->sizeimage = pix->height * pix->bytesperline;
769
770 dbg("pix->bytesperline= %d, fmt->depth= %d",
771 pix->bytesperline, fmt->depth);
772
773 return 0;
774}
775
776
777static int fimc_m2m_s_fmt(struct file *file, void *priv, struct v4l2_format *f)
778{
779 struct fimc_ctx *ctx = priv;
780 struct v4l2_device *v4l2_dev = &ctx->fimc_dev->m2m.v4l2_dev;
781 struct videobuf_queue *src_vq, *dst_vq;
782 struct fimc_frame *frame;
783 struct v4l2_pix_format *pix;
784 unsigned long flags;
785 int ret = 0;
786
787 BUG_ON(!ctx);
788
789 ret = fimc_m2m_try_fmt(file, priv, f);
790 if (ret)
791 return ret;
792
793 mutex_lock(&ctx->fimc_dev->lock);
794
795 src_vq = v4l2_m2m_get_src_vq(ctx->m2m_ctx);
796 dst_vq = v4l2_m2m_get_dst_vq(ctx->m2m_ctx);
797
798 mutex_lock(&src_vq->vb_lock);
799 mutex_lock(&dst_vq->vb_lock);
800
801 if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
802 if (videobuf_queue_is_busy(src_vq)) {
803 v4l2_err(v4l2_dev, "%s queue busy\n", __func__);
804 ret = -EBUSY;
805 goto s_fmt_out;
806 }
807 frame = &ctx->s_frame;
808 spin_lock_irqsave(&ctx->slock, flags);
809 ctx->state |= FIMC_SRC_FMT;
810 spin_unlock_irqrestore(&ctx->slock, flags);
811
812 } else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
813 if (videobuf_queue_is_busy(dst_vq)) {
814 v4l2_err(v4l2_dev, "%s queue busy\n", __func__);
815 ret = -EBUSY;
816 goto s_fmt_out;
817 }
818 frame = &ctx->d_frame;
819 spin_lock_irqsave(&ctx->slock, flags);
820 ctx->state |= FIMC_DST_FMT;
821 spin_unlock_irqrestore(&ctx->slock, flags);
822 } else {
823 v4l2_err(&ctx->fimc_dev->m2m.v4l2_dev,
824 "Wrong buffer/video queue type (%d)\n", f->type);
590a58d1
DC		 825 ret = -EINVAL;
826 goto s_fmt_out;
5fd8f738
SN		 827 }
828
829 pix = &f->fmt.pix;
830 frame->fmt = find_format(f);
831 if (!frame->fmt) {
832 ret = -EINVAL;
833 goto s_fmt_out;
834 }
835
836 frame->f_width = pix->bytesperline * 8 / frame->fmt->depth;
837 frame->f_height = pix->sizeimage/pix->bytesperline;
838 frame->width = pix->width;
839 frame->height = pix->height;
840 frame->o_width = pix->width;
841 frame->o_height = pix->height;
842 frame->offs_h = 0;
843 frame->offs_v = 0;
844 frame->size = (pix->width * pix->height * frame->fmt->depth) >> 3;
845 src_vq->field = dst_vq->field = pix->field;
846 spin_lock_irqsave(&ctx->slock, flags);
847 ctx->state |= FIMC_PARAMS;
848 spin_unlock_irqrestore(&ctx->slock, flags);
849
850 dbg("f_width= %d, f_height= %d", frame->f_width, frame->f_height);
851
852s_fmt_out:
853 mutex_unlock(&dst_vq->vb_lock);
854 mutex_unlock(&src_vq->vb_lock);
855 mutex_unlock(&ctx->fimc_dev->lock);
856 return ret;
857}
858
859static int fimc_m2m_reqbufs(struct file *file, void *priv,
860 struct v4l2_requestbuffers *reqbufs)
861{
862 struct fimc_ctx *ctx = priv;
863 return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
864}
865
866static int fimc_m2m_querybuf(struct file *file, void *priv,
867 struct v4l2_buffer *buf)
868{
869 struct fimc_ctx *ctx = priv;
870 return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
871}
872
873static int fimc_m2m_qbuf(struct file *file, void *priv,
874 struct v4l2_buffer *buf)
875{
876 struct fimc_ctx *ctx = priv;
877
878 return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
879}
880
881static int fimc_m2m_dqbuf(struct file *file, void *priv,
882 struct v4l2_buffer *buf)
883{
884 struct fimc_ctx *ctx = priv;
885 return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
886}
887
888static int fimc_m2m_streamon(struct file *file, void *priv,
889 enum v4l2_buf_type type)
890{
891 struct fimc_ctx *ctx = priv;
892 return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
893}
894
895static int fimc_m2m_streamoff(struct file *file, void *priv,
896 enum v4l2_buf_type type)
897{
898 struct fimc_ctx *ctx = priv;
899 return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
900}
901
902int fimc_m2m_queryctrl(struct file *file, void *priv,
903 struct v4l2_queryctrl *qc)
904{
905 struct v4l2_queryctrl *c;
906 c = get_ctrl(qc->id);
907 if (!c)
908 return -EINVAL;
909 *qc = *c;
910 return 0;
911}
912
913int fimc_m2m_g_ctrl(struct file *file, void *priv,
914 struct v4l2_control *ctrl)
915{
916 struct fimc_ctx *ctx = priv;
917
918 switch (ctrl->id) {
919 case V4L2_CID_HFLIP:
920 ctrl->value = (FLIP_X_AXIS & ctx->flip) ? 1 : 0;
921 break;
922 case V4L2_CID_VFLIP:
923 ctrl->value = (FLIP_Y_AXIS & ctx->flip) ? 1 : 0;
924 break;
925 case V4L2_CID_ROTATE:
926 ctrl->value = ctx->rotation;
927 break;
928 default:
929 v4l2_err(&ctx->fimc_dev->m2m.v4l2_dev, "Invalid control\n");
930 return -EINVAL;
931 }
932 dbg("ctrl->value= %d", ctrl->value);
933 return 0;
934}
935
936static int check_ctrl_val(struct fimc_ctx *ctx,
937 struct v4l2_control *ctrl)
938{
939 struct v4l2_queryctrl *c;
940 c = get_ctrl(ctrl->id);
941 if (!c)
942 return -EINVAL;
943
944 if (ctrl->value < c->minimum || ctrl->value > c->maximum
945 || (c->step != 0 && ctrl->value % c->step != 0)) {
946 v4l2_err(&ctx->fimc_dev->m2m.v4l2_dev,
947 "Invalid control value\n");
948 return -ERANGE;
949 }
950
951 return 0;
952}
953
954int fimc_m2m_s_ctrl(struct file *file, void *priv,
955 struct v4l2_control *ctrl)
956{
957 struct fimc_ctx *ctx = priv;
958 struct samsung_fimc_variant *variant = ctx->fimc_dev->variant;
959 unsigned long flags;
960 int ret = 0;
961
962 ret = check_ctrl_val(ctx, ctrl);
963 if (ret)
964 return ret;
965
966 switch (ctrl->id) {
967 case V4L2_CID_HFLIP:
968 if (ctx->rotation != 0)
969 return 0;
970 if (ctrl->value)
971 ctx->flip |= FLIP_X_AXIS;
972 else
973 ctx->flip &= ~FLIP_X_AXIS;
974 break;
975
976 case V4L2_CID_VFLIP:
977 if (ctx->rotation != 0)
978 return 0;
979 if (ctrl->value)
980 ctx->flip |= FLIP_Y_AXIS;
981 else
982 ctx->flip &= ~FLIP_Y_AXIS;
983 break;
984
985 case V4L2_CID_ROTATE:
986 if (ctrl->value == 90 || ctrl->value == 270) {
987 if (ctx->out_path == FIMC_LCDFIFO &&
988 !variant->has_inp_rot) {
989 return -EINVAL;
990 } else if (ctx->in_path == FIMC_DMA &&
991 !variant->has_out_rot) {
992 return -EINVAL;
993 }
994 }
995 ctx->rotation = ctrl->value;
996 if (ctrl->value == 180)
997 ctx->flip = FLIP_XY_AXIS;
998 break;
999
1000 default:
1001 v4l2_err(&ctx->fimc_dev->m2m.v4l2_dev, "Invalid control\n");
1002 return -EINVAL;
1003 }
1004 spin_lock_irqsave(&ctx->slock, flags);
1005 ctx->state |= FIMC_PARAMS;
1006 spin_unlock_irqrestore(&ctx->slock, flags);
1007 return 0;
1008}
1009
1010
1011static int fimc_m2m_cropcap(struct file *file, void *fh,
1012 struct v4l2_cropcap *cr)
1013{
1014 struct fimc_frame *frame;
1015 struct fimc_ctx *ctx = fh;
1016
03e30ca5
PO		 1017 frame = ctx_m2m_get_frame(ctx, cr->type);
1018 if (IS_ERR(frame))
1019 return PTR_ERR(frame);
5fd8f738
SN		 1020
1021 cr->bounds.left = 0;
1022 cr->bounds.top = 0;
1023 cr->bounds.width = frame->f_width;
1024 cr->bounds.height = frame->f_height;
1025 cr->defrect.left = frame->offs_h;
1026 cr->defrect.top = frame->offs_v;
1027 cr->defrect.width = frame->o_width;
1028 cr->defrect.height = frame->o_height;
1029 return 0;
1030}
1031
1032static int fimc_m2m_g_crop(struct file *file, void *fh, struct v4l2_crop *cr)
1033{
1034 struct fimc_frame *frame;
1035 struct fimc_ctx *ctx = file->private_data;
1036
03e30ca5
PO		 1037 frame = ctx_m2m_get_frame(ctx, cr->type);
1038 if (IS_ERR(frame))
1039 return PTR_ERR(frame);
5fd8f738
SN		 1040
1041 cr->c.left = frame->offs_h;
1042 cr->c.top = frame->offs_v;
1043 cr->c.width = frame->width;
1044 cr->c.height = frame->height;
1045
1046 return 0;
1047}
1048
1049static int fimc_m2m_s_crop(struct file *file, void *fh, struct v4l2_crop *cr)
1050{
1051 struct fimc_ctx *ctx = file->private_data;
1052 struct fimc_dev *fimc = ctx->fimc_dev;
1053 unsigned long flags;
1054 struct fimc_frame *f;
1055 u32 min_size;
1056 int ret = 0;
1057
1058 if (cr->c.top < 0 || cr->c.left < 0) {
1059 v4l2_err(&fimc->m2m.v4l2_dev,
1060 "doesn't support negative values for top & left\n");
1061 return -EINVAL;
1062 }
1063
1064 if (cr->c.width <= 0 || cr->c.height <= 0) {
1065 v4l2_err(&fimc->m2m.v4l2_dev,
1066 "crop width and height must be greater than 0\n");
1067 return -EINVAL;
1068 }
1069
03e30ca5
PO		 1070 f = ctx_m2m_get_frame(ctx, cr->type);
1071 if (IS_ERR(f))
1072 return PTR_ERR(f);
5fd8f738
SN		 1073
1074 /* Adjust to required pixel boundary. */
1075 min_size = (cr->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) ?
1076 fimc->variant->min_inp_pixsize : fimc->variant->min_out_pixsize;
1077
1078 cr->c.width = round_down(cr->c.width, min_size);
1079 cr->c.height = round_down(cr->c.height, min_size);
1080 cr->c.left = round_down(cr->c.left + 1, min_size);
1081 cr->c.top = round_down(cr->c.top + 1, min_size);
1082
1083 if ((cr->c.left + cr->c.width > f->o_width)
1084 || (cr->c.top + cr->c.height > f->o_height)) {
1085 v4l2_err(&fimc->m2m.v4l2_dev, "Error in S_CROP params\n");
1086 return -EINVAL;
1087 }
1088
1089 spin_lock_irqsave(&ctx->slock, flags);
1090 if ((ctx->state & FIMC_SRC_FMT) && (ctx->state & FIMC_DST_FMT)) {
1091 /* Check for the pixel scaling ratio when cropping input img. */
1092 if (cr->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
1093 ret = fimc_check_scaler_ratio(&cr->c, &ctx->d_frame);
1094 else if (cr->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
1095 ret = fimc_check_scaler_ratio(&cr->c, &ctx->s_frame);
1096
1097 if (ret) {
1098 spin_unlock_irqrestore(&ctx->slock, flags);
1099 v4l2_err(&fimc->m2m.v4l2_dev, "Out of scaler range");
1100 return -EINVAL;
1101 }
1102 }
1103 ctx->state |= FIMC_PARAMS;
1104 spin_unlock_irqrestore(&ctx->slock, flags);
1105
1106 f->offs_h = cr->c.left;
1107 f->offs_v = cr->c.top;
1108 f->width = cr->c.width;
1109 f->height = cr->c.height;
1110 return 0;
1111}
1112
1113static const struct v4l2_ioctl_ops fimc_m2m_ioctl_ops = {
1114 .vidioc_querycap = fimc_m2m_querycap,
1115
1116 .vidioc_enum_fmt_vid_cap = fimc_m2m_enum_fmt,
1117 .vidioc_enum_fmt_vid_out = fimc_m2m_enum_fmt,
1118
1119 .vidioc_g_fmt_vid_cap = fimc_m2m_g_fmt,
1120 .vidioc_g_fmt_vid_out = fimc_m2m_g_fmt,
1121
1122 .vidioc_try_fmt_vid_cap = fimc_m2m_try_fmt,
1123 .vidioc_try_fmt_vid_out = fimc_m2m_try_fmt,
1124
1125 .vidioc_s_fmt_vid_cap = fimc_m2m_s_fmt,
1126 .vidioc_s_fmt_vid_out = fimc_m2m_s_fmt,
1127
1128 .vidioc_reqbufs = fimc_m2m_reqbufs,
1129 .vidioc_querybuf = fimc_m2m_querybuf,
1130
1131 .vidioc_qbuf = fimc_m2m_qbuf,
1132 .vidioc_dqbuf = fimc_m2m_dqbuf,
1133
1134 .vidioc_streamon = fimc_m2m_streamon,
1135 .vidioc_streamoff = fimc_m2m_streamoff,
1136
1137 .vidioc_queryctrl = fimc_m2m_queryctrl,
1138 .vidioc_g_ctrl = fimc_m2m_g_ctrl,
1139 .vidioc_s_ctrl = fimc_m2m_s_ctrl,
1140
1141 .vidioc_g_crop = fimc_m2m_g_crop,
1142 .vidioc_s_crop = fimc_m2m_s_crop,
1143 .vidioc_cropcap = fimc_m2m_cropcap
1144
1145};
1146
1147static void queue_init(void *priv, struct videobuf_queue *vq,
1148 enum v4l2_buf_type type)
1149{
1150 struct fimc_ctx *ctx = priv;
1151 struct fimc_dev *fimc = ctx->fimc_dev;
1152
1153 videobuf_queue_dma_contig_init(vq, &fimc_qops,
1154 fimc->m2m.v4l2_dev.dev,
1155 &fimc->irqlock, type, V4L2_FIELD_NONE,
1156 sizeof(struct fimc_vid_buffer), priv);
1157}
1158
1159static int fimc_m2m_open(struct file *file)
1160{
1161 struct fimc_dev *fimc = video_drvdata(file);
1162 struct fimc_ctx *ctx = NULL;
1163 int err = 0;
1164
1165 mutex_lock(&fimc->lock);
1166 fimc->m2m.refcnt++;
1167 set_bit(ST_OUTDMA_RUN, &fimc->state);
1168 mutex_unlock(&fimc->lock);
1169
1170
1171 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
1172 if (!ctx)
1173 return -ENOMEM;
1174
1175 file->private_data = ctx;
1176 ctx->fimc_dev = fimc;
1177 /* default format */
1178 ctx->s_frame.fmt = &fimc_formats[0];
1179 ctx->d_frame.fmt = &fimc_formats[0];
1180 /* per user process device context initialization */
1181 ctx->state = 0;
1182 ctx->flags = 0;
1183 ctx->effect.type = S5P_FIMC_EFFECT_ORIGINAL;
1184 ctx->in_path = FIMC_DMA;
1185 ctx->out_path = FIMC_DMA;
1186 spin_lock_init(&ctx->slock);
1187
1188 ctx->m2m_ctx = v4l2_m2m_ctx_init(ctx, fimc->m2m.m2m_dev, queue_init);
1189 if (IS_ERR(ctx->m2m_ctx)) {
1190 err = PTR_ERR(ctx->m2m_ctx);
1191 kfree(ctx);
1192 }
1193 return err;
1194}
1195
1196static int fimc_m2m_release(struct file *file)
1197{
1198 struct fimc_ctx *ctx = file->private_data;
1199 struct fimc_dev *fimc = ctx->fimc_dev;
1200
1201 v4l2_m2m_ctx_release(ctx->m2m_ctx);
1202 kfree(ctx);
1203 mutex_lock(&fimc->lock);
1204 if (--fimc->m2m.refcnt <= 0)
1205 clear_bit(ST_OUTDMA_RUN, &fimc->state);
1206 mutex_unlock(&fimc->lock);
1207 return 0;
1208}
1209
1210static unsigned int fimc_m2m_poll(struct file *file,
1211 struct poll_table_struct *wait)
1212{
1213 struct fimc_ctx *ctx = file->private_data;
1214 return v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
1215}
1216
1217
1218static int fimc_m2m_mmap(struct file *file, struct vm_area_struct *vma)
1219{
1220 struct fimc_ctx *ctx = file->private_data;
1221 return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
1222}
1223
1224static const struct v4l2_file_operations fimc_m2m_fops = {
1225 .owner = THIS_MODULE,
1226 .open = fimc_m2m_open,
1227 .release = fimc_m2m_release,
1228 .poll = fimc_m2m_poll,
1229 .ioctl = video_ioctl2,
1230 .mmap = fimc_m2m_mmap,
1231};
1232
1233static struct v4l2_m2m_ops m2m_ops = {
1234 .device_run = fimc_dma_run,
1235 .job_abort = fimc_job_abort,
1236};
1237
1238
1239static int fimc_register_m2m_device(struct fimc_dev *fimc)
1240{
1241 struct video_device *vfd;
1242 struct platform_device *pdev;
1243 struct v4l2_device *v4l2_dev;
1244 int ret = 0;
1245
1246 if (!fimc)
1247 return -ENODEV;
1248
1249 pdev = fimc->pdev;
1250 v4l2_dev = &fimc->m2m.v4l2_dev;
1251
1252 /* set name if it is empty */
1253 if (!v4l2_dev->name[0])
1254 snprintf(v4l2_dev->name, sizeof(v4l2_dev->name),
1255 "%s.m2m", dev_name(&pdev->dev));
1256
1257 ret = v4l2_device_register(&pdev->dev, v4l2_dev);
1258 if (ret)
1259 return ret;;
1260
1261 vfd = video_device_alloc();
1262 if (!vfd) {
1263 v4l2_err(v4l2_dev, "Failed to allocate video device\n");
1264 goto err_m2m_r1;
1265 }
1266
1267 vfd->fops = &fimc_m2m_fops;
1268 vfd->ioctl_ops = &fimc_m2m_ioctl_ops;
1269 vfd->minor = -1;
1270 vfd->release = video_device_release;
1271
1272 snprintf(vfd->name, sizeof(vfd->name), "%s:m2m", dev_name(&pdev->dev));
1273
1274 video_set_drvdata(vfd, fimc);
1275 platform_set_drvdata(pdev, fimc);
1276
1277 fimc->m2m.vfd = vfd;
1278 fimc->m2m.m2m_dev = v4l2_m2m_init(&m2m_ops);
1279 if (IS_ERR(fimc->m2m.m2m_dev)) {
1280 v4l2_err(v4l2_dev, "failed to initialize v4l2-m2m device\n");
1281 ret = PTR_ERR(fimc->m2m.m2m_dev);
1282 goto err_m2m_r2;
1283 }
1284
1285 ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
1286 if (ret) {
1287 v4l2_err(v4l2_dev,
1288 "%s(): failed to register video device\n", __func__);
1289 goto err_m2m_r3;
1290 }
1291 v4l2_info(v4l2_dev,
1292 "FIMC m2m driver registered as /dev/video%d\n", vfd->num);
1293
1294 return 0;
1295
1296err_m2m_r3:
1297 v4l2_m2m_release(fimc->m2m.m2m_dev);
1298err_m2m_r2:
1299 video_device_release(fimc->m2m.vfd);
1300err_m2m_r1:
1301 v4l2_device_unregister(v4l2_dev);
1302
1303 return ret;
1304}
1305
1306static void fimc_unregister_m2m_device(struct fimc_dev *fimc)
1307{
1308 if (fimc) {
1309 v4l2_m2m_release(fimc->m2m.m2m_dev);
1310 video_unregister_device(fimc->m2m.vfd);
1311 video_device_release(fimc->m2m.vfd);
1312 v4l2_device_unregister(&fimc->m2m.v4l2_dev);
1313 }
1314}
1315
1316static void fimc_clk_release(struct fimc_dev *fimc)
1317{
1318 int i;
1319 for (i = 0; i < NUM_FIMC_CLOCKS; i++) {
1320 if (fimc->clock[i]) {
1321 clk_disable(fimc->clock[i]);
1322 clk_put(fimc->clock[i]);
1323 }
1324 }
1325}
1326
1327static int fimc_clk_get(struct fimc_dev *fimc)
1328{
1329 int i;
1330 for (i = 0; i < NUM_FIMC_CLOCKS; i++) {
1331 fimc->clock[i] = clk_get(&fimc->pdev->dev, fimc_clock_name[i]);
1332 if (IS_ERR(fimc->clock[i])) {
1333 dev_err(&fimc->pdev->dev,
1334 "failed to get fimc clock: %s\n",
1335 fimc_clock_name[i]);
1336 return -ENXIO;
1337 }
1338 clk_enable(fimc->clock[i]);
1339 }
1340 return 0;
1341}
1342
1343static int fimc_probe(struct platform_device *pdev)
1344{
1345 struct fimc_dev *fimc;
1346 struct resource *res;
1347 struct samsung_fimc_driverdata *drv_data;
1348 int ret = 0;
1349
1350 dev_dbg(&pdev->dev, "%s():\n", __func__);
1351
1352 drv_data = (struct samsung_fimc_driverdata *)
1353 platform_get_device_id(pdev)->driver_data;
1354
1355 if (pdev->id >= drv_data->devs_cnt) {
1356 dev_err(&pdev->dev, "Invalid platform device id: %d\n",
1357 pdev->id);
1358 return -EINVAL;
1359 }
1360
1361 fimc = kzalloc(sizeof(struct fimc_dev), GFP_KERNEL);
1362 if (!fimc)
1363 return -ENOMEM;
1364
1365 fimc->id = pdev->id;
1366 fimc->variant = drv_data->variant[fimc->id];
1367 fimc->pdev = pdev;
1368 fimc->state = ST_IDLE;
1369
1370 spin_lock_init(&fimc->irqlock);
1371 spin_lock_init(&fimc->slock);
1372
1373 mutex_init(&fimc->lock);
1374
1375 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1376 if (!res) {
1377 dev_err(&pdev->dev, "failed to find the registers\n");
1378 ret = -ENOENT;
1379 goto err_info;
1380 }
1381
1382 fimc->regs_res = request_mem_region(res->start, resource_size(res),
1383 dev_name(&pdev->dev));
1384 if (!fimc->regs_res) {
1385 dev_err(&pdev->dev, "failed to obtain register region\n");
1386 ret = -ENOENT;
1387 goto err_info;
1388 }
1389
1390 fimc->regs = ioremap(res->start, resource_size(res));
1391 if (!fimc->regs) {
1392 dev_err(&pdev->dev, "failed to map registers\n");
1393 ret = -ENXIO;
1394 goto err_req_region;
1395 }
1396
1397 ret = fimc_clk_get(fimc);
1398 if (ret)
1399 goto err_regs_unmap;
1400
1401 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1402 if (!res) {
1403 dev_err(&pdev->dev, "failed to get IRQ resource\n");
1404 ret = -ENXIO;
1405 goto err_clk;
1406 }
1407 fimc->irq = res->start;
1408
1409 fimc_hw_reset(fimc);
1410
1411 ret = request_irq(fimc->irq, fimc_isr, 0, pdev->name, fimc);
1412 if (ret) {
1413 dev_err(&pdev->dev, "failed to install irq (%d)\n", ret);
1414 goto err_clk;
1415 }
1416
1417 fimc->work_queue = create_workqueue(dev_name(&fimc->pdev->dev));
1418 if (!fimc->work_queue)
1419 goto err_irq;
1420
1421 ret = fimc_register_m2m_device(fimc);
1422 if (ret)
1423 goto err_wq;
1424
1425 fimc_hw_en_lastirq(fimc, true);
1426
1427 dev_dbg(&pdev->dev, "%s(): fimc-%d registered successfully\n",
1428 __func__, fimc->id);
1429
1430 return 0;
1431
1432err_wq:
1433 destroy_workqueue(fimc->work_queue);
1434err_irq:
1435 free_irq(fimc->irq, fimc);
1436err_clk:
1437 fimc_clk_release(fimc);
1438err_regs_unmap:
1439 iounmap(fimc->regs);
1440err_req_region:
1441 release_resource(fimc->regs_res);
1442 kfree(fimc->regs_res);
1443err_info:
1444 kfree(fimc);
1445 dev_err(&pdev->dev, "failed to install\n");
1446 return ret;
1447}
1448
1449static int __devexit fimc_remove(struct platform_device *pdev)
1450{
1451 struct fimc_dev *fimc =
1452 (struct fimc_dev *)platform_get_drvdata(pdev);
1453
1454 v4l2_info(&fimc->m2m.v4l2_dev, "Removing %s\n", pdev->name);
1455
1456 free_irq(fimc->irq, fimc);
1457
1458 fimc_hw_reset(fimc);
1459
1460 fimc_unregister_m2m_device(fimc);
1461 fimc_clk_release(fimc);
1462 iounmap(fimc->regs);
1463 release_resource(fimc->regs_res);
1464 kfree(fimc->regs_res);
1465 kfree(fimc);
1466 return 0;
1467}
1468
1469static struct samsung_fimc_variant fimc01_variant_s5p = {
1470 .has_inp_rot = 1,
1471 .has_out_rot = 1,
1472 .min_inp_pixsize = 16,
1473 .min_out_pixsize = 16,
1474
1475 .scaler_en_w = 3264,
1476 .scaler_dis_w = 8192,
1477 .in_rot_en_h = 1920,
1478 .in_rot_dis_w = 8192,
1479 .out_rot_en_w = 1920,
1480 .out_rot_dis_w = 4224,
1481};
1482
1483static struct samsung_fimc_variant fimc2_variant_s5p = {
1484 .min_inp_pixsize = 16,
1485 .min_out_pixsize = 16,
1486
1487 .scaler_en_w = 4224,
1488 .scaler_dis_w = 8192,
1489 .in_rot_en_h = 1920,
1490 .in_rot_dis_w = 8192,
1491 .out_rot_en_w = 1920,
1492 .out_rot_dis_w = 4224,
1493};
1494
1495static struct samsung_fimc_variant fimc01_variant_s5pv210 = {
1496 .has_inp_rot = 1,
1497 .has_out_rot = 1,
1498 .min_inp_pixsize = 16,
1499 .min_out_pixsize = 32,
1500
1501 .scaler_en_w = 4224,
1502 .scaler_dis_w = 8192,
1503 .in_rot_en_h = 1920,
1504 .in_rot_dis_w = 8192,
1505 .out_rot_en_w = 1920,
1506 .out_rot_dis_w = 4224,
1507};
1508
1509static struct samsung_fimc_variant fimc2_variant_s5pv210 = {
1510 .min_inp_pixsize = 16,
1511 .min_out_pixsize = 32,
1512
1513 .scaler_en_w = 1920,
1514 .scaler_dis_w = 8192,
1515 .in_rot_en_h = 1280,
1516 .in_rot_dis_w = 8192,
1517 .out_rot_en_w = 1280,
1518 .out_rot_dis_w = 1920,
1519};
1520
1521static struct samsung_fimc_driverdata fimc_drvdata_s5p = {
1522 .variant = {
1523 [0] = &fimc01_variant_s5p,
1524 [1] = &fimc01_variant_s5p,
1525 [2] = &fimc2_variant_s5p,
1526 },
1527 .devs_cnt = 3
1528};
1529
1530static struct samsung_fimc_driverdata fimc_drvdata_s5pv210 = {
1531 .variant = {
1532 [0] = &fimc01_variant_s5pv210,
1533 [1] = &fimc01_variant_s5pv210,
1534 [2] = &fimc2_variant_s5pv210,
1535 },
1536 .devs_cnt = 3
1537};
1538
1539static struct platform_device_id fimc_driver_ids[] = {
1540 {
1541 .name = "s5p-fimc",
1542 .driver_data = (unsigned long)&fimc_drvdata_s5p,
1543 }, {
1544 .name = "s5pv210-fimc",
1545 .driver_data = (unsigned long)&fimc_drvdata_s5pv210,
1546 },
1547 {},
1548};
1549MODULE_DEVICE_TABLE(platform, fimc_driver_ids);
1550
1551static struct platform_driver fimc_driver = {
1552 .probe = fimc_probe,
1553 .remove = __devexit_p(fimc_remove),
1554 .id_table = fimc_driver_ids,
1555 .driver = {
1556 .name = MODULE_NAME,
1557 .owner = THIS_MODULE,
1558 }
1559};
1560
1561static char banner[] __initdata = KERN_INFO
1562 "S5PC Camera Interface V4L2 Driver, (c) 2010 Samsung Electronics\n";
1563
1564static int __init fimc_init(void)
1565{
1566 u32 ret;
1567 printk(banner);
1568
1569 ret = platform_driver_register(&fimc_driver);
1570 if (ret) {
1571 printk(KERN_ERR "FIMC platform driver register failed\n");
1572 return -1;
1573 }
1574 return 0;
1575}
1576
1577static void __exit fimc_exit(void)
1578{
1579 platform_driver_unregister(&fimc_driver);
1580}
1581
1582module_init(fimc_init);
1583module_exit(fimc_exit);
1584
1585MODULE_AUTHOR("Sylwester Nawrocki, s.nawrocki@samsung.com");
1586MODULE_DESCRIPTION("S3C/S5P FIMC (video postprocessor) driver");
1587MODULE_LICENSE("GPL");
Clone of davem's net-next-2.6 tree