[net-next-2.6.git] / drivers / media / video / cx18 / cx18-i2c.c

/*
 *  cx18 I2C functions
 *
 *  Derived from ivtv-i2c.c
 *
 *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
 *  Copyright (C) 2008  Andy Walls <awalls@md.metrocast.net>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
 *  02111-1307  USA
 */

#include "cx18-driver.h"
#include "cx18-io.h"
#include "cx18-cards.h"
#include "cx18-gpio.h"
#include "cx18-i2c.h"
#include "cx18-irq.h"

#define CX18_REG_I2C_1_WR   0xf15000
#define CX18_REG_I2C_1_RD   0xf15008
#define CX18_REG_I2C_2_WR   0xf25100
#define CX18_REG_I2C_2_RD   0xf25108

#define SETSCL_BIT      0x0001
#define SETSDL_BIT      0x0002
#define GETSCL_BIT      0x0004
#define GETSDL_BIT      0x0008

#define CX18_CS5345_I2C_ADDR		0x4c
#define CX18_Z8F0811_IR_TX_I2C_ADDR	0x70
#define CX18_Z8F0811_IR_RX_I2C_ADDR	0x71

/* This array should match the CX18_HW_ defines */
static const u8 hw_addrs[] = {
	0,				/* CX18_HW_TUNER */
	0,				/* CX18_HW_TVEEPROM */
	CX18_CS5345_I2C_ADDR,		/* CX18_HW_CS5345 */
	0,				/* CX18_HW_DVB */
	0,				/* CX18_HW_418_AV */
	0,				/* CX18_HW_GPIO_MUX */
	0,				/* CX18_HW_GPIO_RESET_CTRL */
	CX18_Z8F0811_IR_TX_I2C_ADDR,	/* CX18_HW_Z8F0811_IR_TX_HAUP */
	CX18_Z8F0811_IR_RX_I2C_ADDR,	/* CX18_HW_Z8F0811_IR_RX_HAUP */
};

/* This array should match the CX18_HW_ defines */
/* This might well become a card-specific array */
static const u8 hw_bus[] = {
	1,	/* CX18_HW_TUNER */
	0,	/* CX18_HW_TVEEPROM */
	0,	/* CX18_HW_CS5345 */
	0,	/* CX18_HW_DVB */
	0,	/* CX18_HW_418_AV */
	0,	/* CX18_HW_GPIO_MUX */
	0,	/* CX18_HW_GPIO_RESET_CTRL */
	0,	/* CX18_HW_Z8F0811_IR_TX_HAUP */
	0,	/* CX18_HW_Z8F0811_IR_RX_HAUP */
};

/* This array should match the CX18_HW_ defines */
static const char * const hw_modules[] = {
	"tuner",	/* CX18_HW_TUNER */
	NULL,		/* CX18_HW_TVEEPROM */
	"cs5345",	/* CX18_HW_CS5345 */
	NULL,		/* CX18_HW_DVB */
	NULL,		/* CX18_HW_418_AV */
	NULL,		/* CX18_HW_GPIO_MUX */
	NULL,		/* CX18_HW_GPIO_RESET_CTRL */
	NULL,		/* CX18_HW_Z8F0811_IR_TX_HAUP */
	NULL,		/* CX18_HW_Z8F0811_IR_RX_HAUP */
};

/* This array should match the CX18_HW_ defines */
static const char * const hw_devicenames[] = {
	"tuner",
	"tveeprom",
	"cs5345",
	"cx23418_DTV",
	"cx23418_AV",
	"gpio_mux",
	"gpio_reset_ctrl",
	"ir_tx_z8f0811_haup",
	"ir_rx_z8f0811_haup",
};

static int cx18_i2c_new_ir(struct cx18 *cx, struct i2c_adapter *adap, u32 hw,
			   const char *type, u8 addr)
{
	struct i2c_board_info info;
	struct IR_i2c_init_data *init_data = &cx->ir_i2c_init_data;
	unsigned short addr_list[2] = { addr, I2C_CLIENT_END };

	memset(&info, 0, sizeof(struct i2c_board_info));
	strlcpy(info.type, type, I2C_NAME_SIZE);

	/* Our default information for ir-kbd-i2c.c to use */
	switch (hw) {
	case CX18_HW_Z8F0811_IR_RX_HAUP:
		init_data->ir_codes = RC_MAP_HAUPPAUGE_NEW;
		init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
		init_data->type = IR_TYPE_RC5;
		init_data->name = cx->card_name;
		info.platform_data = init_data;
		break;
	}

	return i2c_new_probed_device(adap, &info, addr_list) == NULL ? -1 : 0;
}

int cx18_i2c_register(struct cx18 *cx, unsigned idx)
{
	struct v4l2_subdev *sd;
	int bus = hw_bus[idx];
	struct i2c_adapter *adap = &cx->i2c_adap[bus];
	const char *mod = hw_modules[idx];
	const char *type = hw_devicenames[idx];
	u32 hw = 1 << idx;

	if (idx >= ARRAY_SIZE(hw_addrs))
		return -1;

	if (hw == CX18_HW_TUNER) {
		/* special tuner group handling */
		sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
				adap, mod, type, 0, cx->card_i2c->radio);
		if (sd != NULL)
			sd->grp_id = hw;
		sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
				adap, mod, type, 0, cx->card_i2c->demod);
		if (sd != NULL)
			sd->grp_id = hw;
		sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
				adap, mod, type, 0, cx->card_i2c->tv);
		if (sd != NULL)
			sd->grp_id = hw;
		return sd != NULL ? 0 : -1;
	}

	if (hw & CX18_HW_IR_ANY)
		return cx18_i2c_new_ir(cx, adap, hw, type, hw_addrs[idx]);

	/* Is it not an I2C device or one we do not wish to register? */
	if (!hw_addrs[idx])
		return -1;

	/* It's an I2C device other than an analog tuner or IR chip */
	sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, mod, type, hw_addrs[idx], NULL);
	if (sd != NULL)
		sd->grp_id = hw;
	return sd != NULL ? 0 : -1;
}

/* Find the first member of the subdev group id in hw */
struct v4l2_subdev *cx18_find_hw(struct cx18 *cx, u32 hw)
{
	struct v4l2_subdev *result = NULL;
	struct v4l2_subdev *sd;

	spin_lock(&cx->v4l2_dev.lock);
	v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
		if (sd->grp_id == hw) {
			result = sd;
			break;
		}
	}
	spin_unlock(&cx->v4l2_dev.lock);
	return result;
}

static void cx18_setscl(void *data, int state)
{
	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
	u32 r = cx18_read_reg(cx, addr);

	if (state)
		cx18_write_reg(cx, r | SETSCL_BIT, addr);
	else
		cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
}

static void cx18_setsda(void *data, int state)
{
	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
	u32 r = cx18_read_reg(cx, addr);

	if (state)
		cx18_write_reg(cx, r | SETSDL_BIT, addr);
	else
		cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
}

static int cx18_getscl(void *data)
{
	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;

	return cx18_read_reg(cx, addr) & GETSCL_BIT;
}

static int cx18_getsda(void *data)
{
	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;

	return cx18_read_reg(cx, addr) & GETSDL_BIT;
}

/* template for i2c-bit-algo */
static struct i2c_adapter cx18_i2c_adap_template = {
	.name = "cx18 i2c driver",
	.algo = NULL,                   /* set by i2c-algo-bit */
	.algo_data = NULL,              /* filled from template */
	.owner = THIS_MODULE,
};

#define CX18_SCL_PERIOD (10) /* usecs. 10 usec is period for a 100 KHz clock */
#define CX18_ALGO_BIT_TIMEOUT (2) /* seconds */

static struct i2c_algo_bit_data cx18_i2c_algo_template = {
	.setsda		= cx18_setsda,
	.setscl		= cx18_setscl,
	.getsda		= cx18_getsda,
	.getscl		= cx18_getscl,
	.udelay		= CX18_SCL_PERIOD/2,       /* 1/2 clock period in usec*/
	.timeout	= CX18_ALGO_BIT_TIMEOUT*HZ /* jiffies */
};

/* init + register i2c algo-bit adapter */
int init_cx18_i2c(struct cx18 *cx)
{
	int i, err;
	CX18_DEBUG_I2C("i2c init\n");

	for (i = 0; i < 2; i++) {
		/* Setup algorithm for adapter */
		memcpy(&cx->i2c_algo[i], &cx18_i2c_algo_template,
			sizeof(struct i2c_algo_bit_data));
		cx->i2c_algo_cb_data[i].cx = cx;
		cx->i2c_algo_cb_data[i].bus_index = i;
		cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];

		/* Setup adapter */
		memcpy(&cx->i2c_adap[i], &cx18_i2c_adap_template,
			sizeof(struct i2c_adapter));
		cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
		sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
				" #%d-%d", cx->instance, i);
		i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
		cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
	}

	if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
		/* Reset/Unreset I2C hardware block */
		/* Clock select 220MHz */
		cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
					  0x00000000, 0x10001000);
		/* Clock Enable */
		cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
					  0x00001000, 0x10001000);
	}
	/* courtesy of Steven Toth <stoth@hauppauge.com> */
	cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
	mdelay(10);
	cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
	mdelay(10);
	cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
	mdelay(10);

	/* Set to edge-triggered intrs. */
	cx18_write_reg(cx, 0x00c00000, 0xc730c8);
	/* Clear any stale intrs */
	cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
		       ~(HW2_I2C1_INT|HW2_I2C2_INT), HW2_I2C1_INT|HW2_I2C2_INT);

	/* Hw I2C1 Clock Freq ~100kHz */
	cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
	cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
	cx18_setsda(&cx->i2c_algo_cb_data[0], 1);

	/* Hw I2C2 Clock Freq ~100kHz */
	cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
	cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
	cx18_setsda(&cx->i2c_algo_cb_data[1], 1);

	cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
		     core, reset, (u32) CX18_GPIO_RESET_I2C);

	err = i2c_bit_add_bus(&cx->i2c_adap[0]);
	if (err)
		goto err;
	err = i2c_bit_add_bus(&cx->i2c_adap[1]);
	if (err)
		goto err_del_bus_0;
	return 0;

 err_del_bus_0:
	i2c_del_adapter(&cx->i2c_adap[0]);
 err:
	return err;
}

void exit_cx18_i2c(struct cx18 *cx)
{
	int i;
	CX18_DEBUG_I2C("i2c exit\n");
	cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
							CX18_REG_I2C_1_WR);
	cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
							CX18_REG_I2C_2_WR);

	for (i = 0; i < 2; i++) {
		i2c_del_adapter(&cx->i2c_adap[i]);
	}
}

/*
   Hauppauge HVR1600 should have:
   32 cx24227
   98 unknown
   a0 eeprom
   c2 tuner
   e? zilog ir
   */
Commit	Line	Data
1c1e45d1 HV	1	/*
	2	* cx18 I2C functions
	3	*
	4	* Derived from ivtv-i2c.c
	5	*
	6	* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
6afdeaf8	7	* Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
1c1e45d1 HV	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
	22	* 02111-1307 USA
	23	*/
	24
	25	#include "cx18-driver.h"
b1526421	26	#include "cx18-io.h"
1c1e45d1 HV	27	#include "cx18-cards.h"
1c1e45d1 HV	28	#include "cx18-gpio.h"
50510993	29	#include "cx18-i2c.h"
ced07371	30	#include "cx18-irq.h"
1c1e45d1	31
1c1e45d1 HV	32	#define CX18_REG_I2C_1_WR 0xf15000
	33	#define CX18_REG_I2C_1_RD 0xf15008
	34	#define CX18_REG_I2C_2_WR 0xf25100
	35	#define CX18_REG_I2C_2_RD 0xf25108
	36
	37	#define SETSCL_BIT 0x0001
	38	#define SETSDL_BIT 0x0002
	39	#define GETSCL_BIT 0x0004
	40	#define GETSDL_BIT 0x0008
	41
1c1e45d1	42	#define CX18_CS5345_I2C_ADDR 0x4c
8ca95568 AW	43	#define CX18_Z8F0811_IR_TX_I2C_ADDR 0x70
8ca95568 AW	44	#define CX18_Z8F0811_IR_RX_I2C_ADDR 0x71
1c1e45d1	45
1c1e45d1 HV	46	/* This array should match the CX18_HW_ defines */
1c1e45d1 HV	47	static const u8 hw_addrs[] = {
8ca95568 AW	48	0, /* CX18_HW_TUNER */
	49	0, /* CX18_HW_TVEEPROM */
	50	CX18_CS5345_I2C_ADDR, /* CX18_HW_CS5345 */
	51	0, /* CX18_HW_DVB */
	52	0, /* CX18_HW_418_AV */
	53	0, /* CX18_HW_GPIO_MUX */
	54	0, /* CX18_HW_GPIO_RESET_CTRL */
	55	CX18_Z8F0811_IR_TX_I2C_ADDR, /* CX18_HW_Z8F0811_IR_TX_HAUP */
	56	CX18_Z8F0811_IR_RX_I2C_ADDR, /* CX18_HW_Z8F0811_IR_RX_HAUP */
1c1e45d1 HV	57	};
	58
	59	/* This array should match the CX18_HW_ defines */
	60	/* This might well become a card-specific array */
	61	static const u8 hw_bus[] = {
ff2a2001 AW	62	1, /* CX18_HW_TUNER */
	63	0, /* CX18_HW_TVEEPROM */
	64	0, /* CX18_HW_CS5345 */
	65	0, /* CX18_HW_DVB */
	66	0, /* CX18_HW_418_AV */
eefe1010 AW	67	0, /* CX18_HW_GPIO_MUX */
eefe1010 AW	68	0, /* CX18_HW_GPIO_RESET_CTRL */
8ca95568 AW	69	0, /* CX18_HW_Z8F0811_IR_TX_HAUP */
8ca95568 AW	70	0, /* CX18_HW_Z8F0811_IR_RX_HAUP */
ff2a2001 AW	71	};
	72
	73	/* This array should match the CX18_HW_ defines */
	74	static const char * const hw_modules[] = {
	75	"tuner", /* CX18_HW_TUNER */
	76	NULL, /* CX18_HW_TVEEPROM */
	77	"cs5345", /* CX18_HW_CS5345 */
	78	NULL, /* CX18_HW_DVB */
	79	NULL, /* CX18_HW_418_AV */
eefe1010 AW	80	NULL, /* CX18_HW_GPIO_MUX */
eefe1010 AW	81	NULL, /* CX18_HW_GPIO_RESET_CTRL */
8ca95568 AW	82	NULL, /* CX18_HW_Z8F0811_IR_TX_HAUP */
8ca95568 AW	83	NULL, /* CX18_HW_Z8F0811_IR_RX_HAUP */
1c1e45d1 HV	84	};
	85
	86	/* This array should match the CX18_HW_ defines */
af294867	87	static const char * const hw_devicenames[] = {
1c1e45d1 HV	88	"tuner",
	89	"tveeprom",
	90	"cs5345",
ff2a2001 AW	91	"cx23418_DTV",
ff2a2001 AW	92	"cx23418_AV",
eefe1010 AW	93	"gpio_mux",
eefe1010 AW	94	"gpio_reset_ctrl",
8ca95568 AW	95	"ir_tx_z8f0811_haup",
8ca95568 AW	96	"ir_rx_z8f0811_haup",
1c1e45d1 HV	97	};
1c1e45d1 HV	98
83526190 AW	99	static int cx18_i2c_new_ir(struct cx18 cx, struct i2c_adapter adap, u32 hw,
83526190 AW	100	const char *type, u8 addr)
8ca95568 AW	101	{
8ca95568 AW	102	struct i2c_board_info info;
83526190	103	struct IR_i2c_init_data *init_data = &cx->ir_i2c_init_data;
8ca95568 AW	104	unsigned short addr_list[2] = { addr, I2C_CLIENT_END };
	105
	106	memset(&info, 0, sizeof(struct i2c_board_info));
	107	strlcpy(info.type, type, I2C_NAME_SIZE);
	108
	109	/* Our default information for ir-kbd-i2c.c to use */
	110	switch (hw) {
	111	case CX18_HW_Z8F0811_IR_RX_HAUP:
02858eed	112	init_data->ir_codes = RC_MAP_HAUPPAUGE_NEW;
83526190 AW	113	init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
	114	init_data->type = IR_TYPE_RC5;
	115	init_data->name = cx->card_name;
	116	info.platform_data = init_data;
8ca95568 AW	117	break;
	118	}
	119
	120	return i2c_new_probed_device(adap, &info, addr_list) == NULL ? -1 : 0;
	121	}
	122
1c1e45d1 HV	123	int cx18_i2c_register(struct cx18 *cx, unsigned idx)
1c1e45d1 HV	124	{
ff2a2001 AW	125	struct v4l2_subdev *sd;
	126	int bus = hw_bus[idx];
	127	struct i2c_adapter *adap = &cx->i2c_adap[bus];
	128	const char *mod = hw_modules[idx];
	129	const char *type = hw_devicenames[idx];
	130	u32 hw = 1 << idx;
	131
	132	if (idx >= ARRAY_SIZE(hw_addrs))
1c1e45d1	133	return -1;
1c1e45d1	134
ff2a2001 AW	135	if (hw == CX18_HW_TUNER) {
ff2a2001 AW	136	/* special tuner group handling */
53dacb15 HV	137	sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
53dacb15 HV	138	adap, mod, type, 0, cx->card_i2c->radio);
ff2a2001 AW	139	if (sd != NULL)
ff2a2001 AW	140	sd->grp_id = hw;
53dacb15 HV	141	sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
53dacb15 HV	142	adap, mod, type, 0, cx->card_i2c->demod);
ff2a2001 AW	143	if (sd != NULL)
ff2a2001 AW	144	sd->grp_id = hw;
53dacb15 HV	145	sd = v4l2_i2c_new_subdev(&cx->v4l2_dev,
53dacb15 HV	146	adap, mod, type, 0, cx->card_i2c->tv);
ff2a2001 AW	147	if (sd != NULL)
	148	sd->grp_id = hw;
	149	return sd != NULL ? 0 : -1;
1c1e45d1 HV	150	}
1c1e45d1 HV	151
83526190 AW	152	if (hw & CX18_HW_IR_ANY)
83526190 AW	153	return cx18_i2c_new_ir(cx, adap, hw, type, hw_addrs[idx]);
8ca95568	154
ff2a2001 AW	155	/* Is it not an I2C device or one we do not wish to register? */
	156	if (!hw_addrs[idx])
	157	return -1;
1c1e45d1	158
8ca95568	159	/* It's an I2C device other than an analog tuner or IR chip */
53dacb15	160	sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, mod, type, hw_addrs[idx], NULL);
ff2a2001 AW	161	if (sd != NULL)
	162	sd->grp_id = hw;
	163	return sd != NULL ? 0 : -1;
1c1e45d1 HV	164	}
1c1e45d1 HV	165
ff2a2001 AW	166	/* Find the first member of the subdev group id in hw */
ff2a2001 AW	167	struct v4l2_subdev cx18_find_hw(struct cx18 cx, u32 hw)
1c1e45d1	168	{
ff2a2001 AW	169	struct v4l2_subdev *result = NULL;
ff2a2001 AW	170	struct v4l2_subdev *sd;
1c1e45d1	171
ff2a2001 AW	172	spin_lock(&cx->v4l2_dev.lock);
	173	v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
	174	if (sd->grp_id == hw) {
	175	result = sd;
1c1e45d1 HV	176	break;
	177	}
	178	}
ff2a2001 AW	179	spin_unlock(&cx->v4l2_dev.lock);
ff2a2001 AW	180	return result;
1c1e45d1 HV	181	}
	182
	183	static void cx18_setscl(void *data, int state)
	184	{
	185	struct cx18 cx = ((struct cx18_i2c_algo_callback_data )data)->cx;
	186	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	187	u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
b1526421	188	u32 r = cx18_read_reg(cx, addr);
1c1e45d1 HV	189
1c1e45d1 HV	190	if (state)
3f75c616	191	cx18_write_reg(cx, r \| SETSCL_BIT, addr);
1c1e45d1	192	else
3f75c616	193	cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
1c1e45d1 HV	194	}
	195
	196	static void cx18_setsda(void *data, int state)
	197	{
	198	struct cx18 cx = ((struct cx18_i2c_algo_callback_data )data)->cx;
	199	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	200	u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
b1526421	201	u32 r = cx18_read_reg(cx, addr);
1c1e45d1 HV	202
1c1e45d1 HV	203	if (state)
3f75c616	204	cx18_write_reg(cx, r \| SETSDL_BIT, addr);
1c1e45d1	205	else
3f75c616	206	cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
1c1e45d1 HV	207	}
	208
	209	static int cx18_getscl(void *data)
	210	{
	211	struct cx18 cx = ((struct cx18_i2c_algo_callback_data )data)->cx;
	212	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	213	u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
	214
b1526421	215	return cx18_read_reg(cx, addr) & GETSCL_BIT;
1c1e45d1 HV	216	}
	217
	218	static int cx18_getsda(void *data)
	219	{
	220	struct cx18 cx = ((struct cx18_i2c_algo_callback_data )data)->cx;
	221	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	222	u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
	223
b1526421	224	return cx18_read_reg(cx, addr) & GETSDL_BIT;
1c1e45d1 HV	225	}
	226
	227	/* template for i2c-bit-algo */
	228	static struct i2c_adapter cx18_i2c_adap_template = {
	229	.name = "cx18 i2c driver",
1c1e45d1 HV	230	.algo = NULL, /* set by i2c-algo-bit */
1c1e45d1 HV	231	.algo_data = NULL, /* filled from template */
1c1e45d1 HV	232	.owner = THIS_MODULE,
	233	};
	234
	235	#define CX18_SCL_PERIOD (10) /* usecs. 10 usec is period for a 100 KHz clock */
	236	#define CX18_ALGO_BIT_TIMEOUT (2) /* seconds */
	237
	238	static struct i2c_algo_bit_data cx18_i2c_algo_template = {
	239	.setsda = cx18_setsda,
	240	.setscl = cx18_setscl,
	241	.getsda = cx18_getsda,
	242	.getscl = cx18_getscl,
	243	.udelay = CX18_SCL_PERIOD/2, /* 1/2 clock period in usec*/
	244	.timeout = CX18_ALGO_BIT_TIMEOUTHZ / jiffies */
	245	};
	246
1c1e45d1 HV	247	/* init + register i2c algo-bit adapter */
	248	int init_cx18_i2c(struct cx18 *cx)
	249	{
272aa396	250	int i, err;
1c1e45d1 HV	251	CX18_DEBUG_I2C("i2c init\n");
	252
	253	for (i = 0; i < 2; i++) {
ff2a2001	254	/* Setup algorithm for adapter */
1c1e45d1 HV	255	memcpy(&cx->i2c_algo[i], &cx18_i2c_algo_template,
	256	sizeof(struct i2c_algo_bit_data));
	257	cx->i2c_algo_cb_data[i].cx = cx;
	258	cx->i2c_algo_cb_data[i].bus_index = i;
	259	cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];
1c1e45d1	260
ff2a2001 AW	261	/* Setup adapter */
	262	memcpy(&cx->i2c_adap[i], &cx18_i2c_adap_template,
	263	sizeof(struct i2c_adapter));
	264	cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
1c1e45d1	265	sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
5811cf99	266	" #%d-%d", cx->instance, i);
ff2a2001	267	i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
3d05913d	268	cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
1c1e45d1 HV	269	}
1c1e45d1 HV	270
b1526421	271	if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
1c1e45d1	272	/* Reset/Unreset I2C hardware block */
b1526421	273	/* Clock select 220MHz */
ced07371 AW	274	cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
ced07371 AW	275	0x00000000, 0x10001000);
b1526421	276	/* Clock Enable */
ced07371 AW	277	cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
ced07371 AW	278	0x00001000, 0x10001000);
1c1e45d1 HV	279	}
1c1e45d1 HV	280	/* courtesy of Steven Toth <stoth@hauppauge.com> */
ced07371	281	cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
1c1e45d1	282	mdelay(10);
ced07371	283	cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
1c1e45d1	284	mdelay(10);
ced07371	285	cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
53ad02ef	286	mdelay(10);
1c1e45d1	287
b1526421	288	/* Set to edge-triggered intrs. */
ced07371	289	cx18_write_reg(cx, 0x00c00000, 0xc730c8);
b1526421	290	/* Clear any stale intrs */
ced07371 AW	291	cx18_write_reg_expect(cx, HW2_I2C1_INT\|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
ced07371 AW	292	~(HW2_I2C1_INT\|HW2_I2C2_INT), HW2_I2C1_INT\|HW2_I2C2_INT);
1c1e45d1 HV	293
1c1e45d1 HV	294	/* Hw I2C1 Clock Freq ~100kHz */
3f75c616	295	cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
1c1e45d1 HV	296	cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
	297	cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
	298
	299	/* Hw I2C2 Clock Freq ~100kHz */
3f75c616	300	cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
1c1e45d1 HV	301	cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
	302	cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
	303
eefe1010 AW	304	cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
eefe1010 AW	305	core, reset, (u32) CX18_GPIO_RESET_I2C);
1f09e8a2	306
272aa396 JD	307	err = i2c_bit_add_bus(&cx->i2c_adap[0]);
	308	if (err)
	309	goto err;
	310	err = i2c_bit_add_bus(&cx->i2c_adap[1]);
	311	if (err)
	312	goto err_del_bus_0;
	313	return 0;
	314
	315	err_del_bus_0:
	316	i2c_del_adapter(&cx->i2c_adap[0]);
	317	err:
	318	return err;
1c1e45d1 HV	319	}
	320
	321	void exit_cx18_i2c(struct cx18 *cx)
	322	{
	323	int i;
	324	CX18_DEBUG_I2C("i2c exit\n");
b1526421 AW	325	cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) \| 4,
	326	CX18_REG_I2C_1_WR);
	327	cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) \| 4,
	328	CX18_REG_I2C_2_WR);
1c1e45d1 HV	329
	330	for (i = 0; i < 2; i++) {
	331	i2c_del_adapter(&cx->i2c_adap[i]);
	332	}
	333	}
	334
	335	/*
	336	Hauppauge HVR1600 should have:
	337	32 cx24227
	338	98 unknown
	339	a0 eeprom
	340	c2 tuner
	341	e? zilog ir
	342	*/