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1c1e45d1 HV |
1 | /* |
2 | * cx18 driver internal defines and structures | |
3 | * | |
4 | * Derived from ivtv-driver.h | |
5 | * | |
6 | * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> | |
1ed9dcc8 | 7 | * Copyright (C) 2008 Andy Walls <awalls@radix.net> |
1c1e45d1 HV |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA | |
22 | * 02111-1307 USA | |
23 | */ | |
24 | ||
25 | #ifndef CX18_DRIVER_H | |
26 | #define CX18_DRIVER_H | |
27 | ||
28 | #include <linux/version.h> | |
29 | #include <linux/module.h> | |
30 | #include <linux/moduleparam.h> | |
31 | #include <linux/init.h> | |
32 | #include <linux/delay.h> | |
33 | #include <linux/sched.h> | |
34 | #include <linux/fs.h> | |
35 | #include <linux/pci.h> | |
36 | #include <linux/interrupt.h> | |
37 | #include <linux/spinlock.h> | |
38 | #include <linux/i2c.h> | |
39 | #include <linux/i2c-algo-bit.h> | |
40 | #include <linux/list.h> | |
41 | #include <linux/unistd.h> | |
1c1e45d1 HV |
42 | #include <linux/pagemap.h> |
43 | #include <linux/workqueue.h> | |
44 | #include <linux/mutex.h> | |
1a651a00 | 45 | #include <asm/byteorder.h> |
1c1e45d1 HV |
46 | |
47 | #include <linux/dvb/video.h> | |
48 | #include <linux/dvb/audio.h> | |
49 | #include <media/v4l2-common.h> | |
35ea11ff | 50 | #include <media/v4l2-ioctl.h> |
888cdb07 | 51 | #include <media/v4l2-device.h> |
1c1e45d1 | 52 | #include <media/tuner.h> |
83526190 | 53 | #include <media/ir-kbd-i2c.h> |
1c1e45d1 HV |
54 | #include "cx18-mailbox.h" |
55 | #include "cx18-av-core.h" | |
56 | #include "cx23418.h" | |
57 | ||
58 | /* DVB */ | |
59 | #include "demux.h" | |
60 | #include "dmxdev.h" | |
61 | #include "dvb_demux.h" | |
62 | #include "dvb_frontend.h" | |
63 | #include "dvb_net.h" | |
64 | #include "dvbdev.h" | |
65 | ||
66 | #ifndef CONFIG_PCI | |
67 | # error "This driver requires kernel PCI support." | |
68 | #endif | |
69 | ||
70 | #define CX18_MEM_OFFSET 0x00000000 | |
71 | #define CX18_MEM_SIZE 0x04000000 | |
72 | #define CX18_REG_OFFSET 0x02000000 | |
73 | ||
74 | /* Maximum cx18 driver instances. */ | |
75 | #define CX18_MAX_CARDS 32 | |
76 | ||
77 | /* Supported cards */ | |
78 | #define CX18_CARD_HVR_1600_ESMT 0 /* Hauppauge HVR 1600 (ESMT memory) */ | |
79 | #define CX18_CARD_HVR_1600_SAMSUNG 1 /* Hauppauge HVR 1600 (Samsung memory) */ | |
80 | #define CX18_CARD_COMPRO_H900 2 /* Compro VideoMate H900 */ | |
81 | #define CX18_CARD_YUAN_MPC718 3 /* Yuan MPC718 */ | |
03c28085 | 82 | #define CX18_CARD_CNXT_RAPTOR_PAL 4 /* Conexant Raptor PAL */ |
9eee4fb6 | 83 | #define CX18_CARD_TOSHIBA_QOSMIO_DVBT 5 /* Toshiba Qosmio Interal DVB-T/Analog*/ |
9d5af862 AW |
84 | #define CX18_CARD_LEADTEK_PVR2100 6 /* Leadtek WinFast PVR2100 */ |
85 | #define CX18_CARD_LEADTEK_DVR3100H 7 /* Leadtek WinFast DVR3100 H */ | |
86 | #define CX18_CARD_LAST 7 | |
1c1e45d1 HV |
87 | |
88 | #define CX18_ENC_STREAM_TYPE_MPG 0 | |
89 | #define CX18_ENC_STREAM_TYPE_TS 1 | |
90 | #define CX18_ENC_STREAM_TYPE_YUV 2 | |
91 | #define CX18_ENC_STREAM_TYPE_VBI 3 | |
92 | #define CX18_ENC_STREAM_TYPE_PCM 4 | |
93 | #define CX18_ENC_STREAM_TYPE_IDX 5 | |
94 | #define CX18_ENC_STREAM_TYPE_RAD 6 | |
95 | #define CX18_MAX_STREAMS 7 | |
96 | ||
97 | /* system vendor and device IDs */ | |
98 | #define PCI_VENDOR_ID_CX 0x14f1 | |
99 | #define PCI_DEVICE_ID_CX23418 0x5b7a | |
100 | ||
101 | /* subsystem vendor ID */ | |
102 | #define CX18_PCI_ID_HAUPPAUGE 0x0070 | |
103 | #define CX18_PCI_ID_COMPRO 0x185b | |
104 | #define CX18_PCI_ID_YUAN 0x12ab | |
03c28085 | 105 | #define CX18_PCI_ID_CONEXANT 0x14f1 |
9eee4fb6 AW |
106 | #define CX18_PCI_ID_TOSHIBA 0x1179 |
107 | #define CX18_PCI_ID_LEADTEK 0x107D | |
1c1e45d1 HV |
108 | |
109 | /* ======================================================================== */ | |
110 | /* ========================== START USER SETTABLE DMA VARIABLES =========== */ | |
111 | /* ======================================================================== */ | |
112 | ||
113 | /* DMA Buffers, Default size in MB allocated */ | |
114 | #define CX18_DEFAULT_ENC_TS_BUFFERS 1 | |
115 | #define CX18_DEFAULT_ENC_MPG_BUFFERS 2 | |
116 | #define CX18_DEFAULT_ENC_IDX_BUFFERS 1 | |
117 | #define CX18_DEFAULT_ENC_YUV_BUFFERS 2 | |
118 | #define CX18_DEFAULT_ENC_VBI_BUFFERS 1 | |
119 | #define CX18_DEFAULT_ENC_PCM_BUFFERS 1 | |
120 | ||
6ecd86dc | 121 | /* Maximum firmware DMA buffers per stream */ |
0ef02892 | 122 | #define CX18_MAX_FW_MDLS_PER_STREAM 63 |
6ecd86dc | 123 | |
22dce188 AW |
124 | /* YUV buffer sizes in bytes to ensure integer # of frames per buffer */ |
125 | #define CX18_UNIT_ENC_YUV_BUFSIZE (720 * 32 * 3 / 2) /* bytes */ | |
126 | #define CX18_625_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 576/32) | |
127 | #define CX18_525_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 480/32) | |
128 | ||
efc0b127 AW |
129 | /* IDX buffer size should be a multiple of the index entry size from the chip */ |
130 | struct cx18_enc_idx_entry { | |
131 | __le32 length; | |
132 | __le32 offset_low; | |
133 | __le32 offset_high; | |
134 | __le32 flags; | |
135 | __le32 pts_low; | |
136 | __le32 pts_high; | |
137 | } __attribute__ ((packed)); | |
138 | #define CX18_UNIT_ENC_IDX_BUFSIZE \ | |
139 | (sizeof(struct cx18_enc_idx_entry) * V4L2_ENC_IDX_ENTRIES) | |
140 | ||
6ecd86dc AW |
141 | /* DMA buffer, default size in kB allocated */ |
142 | #define CX18_DEFAULT_ENC_TS_BUFSIZE 32 | |
143 | #define CX18_DEFAULT_ENC_MPG_BUFSIZE 32 | |
efc0b127 | 144 | #define CX18_DEFAULT_ENC_IDX_BUFSIZE (CX18_UNIT_ENC_IDX_BUFSIZE * 1 / 1024 + 1) |
22dce188 | 145 | #define CX18_DEFAULT_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 3 / 1024 + 1) |
6ecd86dc AW |
146 | #define CX18_DEFAULT_ENC_PCM_BUFSIZE 4 |
147 | ||
1c1e45d1 HV |
148 | /* i2c stuff */ |
149 | #define I2C_CLIENTS_MAX 16 | |
150 | ||
151 | /* debugging */ | |
152 | ||
153 | /* Flag to turn on high volume debugging */ | |
154 | #define CX18_DBGFLG_WARN (1 << 0) | |
155 | #define CX18_DBGFLG_INFO (1 << 1) | |
156 | #define CX18_DBGFLG_API (1 << 2) | |
157 | #define CX18_DBGFLG_DMA (1 << 3) | |
158 | #define CX18_DBGFLG_IOCTL (1 << 4) | |
159 | #define CX18_DBGFLG_FILE (1 << 5) | |
160 | #define CX18_DBGFLG_I2C (1 << 6) | |
161 | #define CX18_DBGFLG_IRQ (1 << 7) | |
162 | /* Flag to turn on high volume debugging */ | |
163 | #define CX18_DBGFLG_HIGHVOL (1 << 8) | |
164 | ||
5811cf99 | 165 | /* NOTE: extra space before comma in 'fmt , ## args' is required for |
1c1e45d1 HV |
166 | gcc-2.95, otherwise it won't compile. */ |
167 | #define CX18_DEBUG(x, type, fmt, args...) \ | |
168 | do { \ | |
169 | if ((x) & cx18_debug) \ | |
5811cf99 | 170 | v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \ |
1c1e45d1 HV |
171 | } while (0) |
172 | #define CX18_DEBUG_WARN(fmt, args...) CX18_DEBUG(CX18_DBGFLG_WARN, "warning", fmt , ## args) | |
173 | #define CX18_DEBUG_INFO(fmt, args...) CX18_DEBUG(CX18_DBGFLG_INFO, "info", fmt , ## args) | |
174 | #define CX18_DEBUG_API(fmt, args...) CX18_DEBUG(CX18_DBGFLG_API, "api", fmt , ## args) | |
175 | #define CX18_DEBUG_DMA(fmt, args...) CX18_DEBUG(CX18_DBGFLG_DMA, "dma", fmt , ## args) | |
176 | #define CX18_DEBUG_IOCTL(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args) | |
177 | #define CX18_DEBUG_FILE(fmt, args...) CX18_DEBUG(CX18_DBGFLG_FILE, "file", fmt , ## args) | |
178 | #define CX18_DEBUG_I2C(fmt, args...) CX18_DEBUG(CX18_DBGFLG_I2C, "i2c", fmt , ## args) | |
179 | #define CX18_DEBUG_IRQ(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IRQ, "irq", fmt , ## args) | |
180 | ||
181 | #define CX18_DEBUG_HIGH_VOL(x, type, fmt, args...) \ | |
182 | do { \ | |
183 | if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \ | |
5811cf99 | 184 | v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \ |
1c1e45d1 HV |
185 | } while (0) |
186 | #define CX18_DEBUG_HI_WARN(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_WARN, "warning", fmt , ## args) | |
187 | #define CX18_DEBUG_HI_INFO(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_INFO, "info", fmt , ## args) | |
188 | #define CX18_DEBUG_HI_API(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_API, "api", fmt , ## args) | |
189 | #define CX18_DEBUG_HI_DMA(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_DMA, "dma", fmt , ## args) | |
190 | #define CX18_DEBUG_HI_IOCTL(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args) | |
191 | #define CX18_DEBUG_HI_FILE(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_FILE, "file", fmt , ## args) | |
192 | #define CX18_DEBUG_HI_I2C(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_I2C, "i2c", fmt , ## args) | |
193 | #define CX18_DEBUG_HI_IRQ(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IRQ, "irq", fmt , ## args) | |
194 | ||
195 | /* Standard kernel messages */ | |
5811cf99 AW |
196 | #define CX18_ERR(fmt, args...) v4l2_err(&cx->v4l2_dev, fmt , ## args) |
197 | #define CX18_WARN(fmt, args...) v4l2_warn(&cx->v4l2_dev, fmt , ## args) | |
198 | #define CX18_INFO(fmt, args...) v4l2_info(&cx->v4l2_dev, fmt , ## args) | |
1c1e45d1 | 199 | |
6246d4e1 AW |
200 | /* Messages for internal subdevs to use */ |
201 | #define CX18_DEBUG_DEV(x, dev, type, fmt, args...) \ | |
202 | do { \ | |
203 | if ((x) & cx18_debug) \ | |
204 | v4l2_info(dev, " " type ": " fmt , ## args); \ | |
205 | } while (0) | |
206 | #define CX18_DEBUG_WARN_DEV(dev, fmt, args...) \ | |
207 | CX18_DEBUG_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args) | |
208 | #define CX18_DEBUG_INFO_DEV(dev, fmt, args...) \ | |
209 | CX18_DEBUG_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args) | |
210 | #define CX18_DEBUG_API_DEV(dev, fmt, args...) \ | |
211 | CX18_DEBUG_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args) | |
212 | #define CX18_DEBUG_DMA_DEV(dev, fmt, args...) \ | |
213 | CX18_DEBUG_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args) | |
214 | #define CX18_DEBUG_IOCTL_DEV(dev, fmt, args...) \ | |
215 | CX18_DEBUG_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args) | |
216 | #define CX18_DEBUG_FILE_DEV(dev, fmt, args...) \ | |
217 | CX18_DEBUG_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args) | |
218 | #define CX18_DEBUG_I2C_DEV(dev, fmt, args...) \ | |
219 | CX18_DEBUG_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args) | |
220 | #define CX18_DEBUG_IRQ_DEV(dev, fmt, args...) \ | |
221 | CX18_DEBUG_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args) | |
222 | ||
223 | #define CX18_DEBUG_HIGH_VOL_DEV(x, dev, type, fmt, args...) \ | |
224 | do { \ | |
225 | if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \ | |
226 | v4l2_info(dev, " " type ": " fmt , ## args); \ | |
227 | } while (0) | |
228 | #define CX18_DEBUG_HI_WARN_DEV(dev, fmt, args...) \ | |
229 | CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args) | |
230 | #define CX18_DEBUG_HI_INFO_DEV(dev, fmt, args...) \ | |
231 | CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args) | |
232 | #define CX18_DEBUG_HI_API_DEV(dev, fmt, args...) \ | |
233 | CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args) | |
234 | #define CX18_DEBUG_HI_DMA_DEV(dev, fmt, args...) \ | |
235 | CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args) | |
236 | #define CX18_DEBUG_HI_IOCTL_DEV(dev, fmt, args...) \ | |
237 | CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args) | |
238 | #define CX18_DEBUG_HI_FILE_DEV(dev, fmt, args...) \ | |
239 | CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args) | |
240 | #define CX18_DEBUG_HI_I2C_DEV(dev, fmt, args...) \ | |
241 | CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args) | |
242 | #define CX18_DEBUG_HI_IRQ_DEV(dev, fmt, args...) \ | |
243 | CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args) | |
244 | ||
245 | #define CX18_ERR_DEV(dev, fmt, args...) v4l2_err(dev, fmt , ## args) | |
246 | #define CX18_WARN_DEV(dev, fmt, args...) v4l2_warn(dev, fmt , ## args) | |
247 | #define CX18_INFO_DEV(dev, fmt, args...) v4l2_info(dev, fmt , ## args) | |
248 | ||
1c1e45d1 HV |
249 | extern int cx18_debug; |
250 | ||
1c1e45d1 HV |
251 | struct cx18_options { |
252 | int megabytes[CX18_MAX_STREAMS]; /* Size in megabytes of each stream */ | |
253 | int cardtype; /* force card type on load */ | |
254 | int tuner; /* set tuner on load */ | |
255 | int radio; /* enable/disable radio */ | |
256 | }; | |
257 | ||
52fcb3ec AW |
258 | /* per-mdl bit flags */ |
259 | #define CX18_F_M_NEED_SWAP 0 /* mdl buffer data must be endianess swapped */ | |
1c1e45d1 HV |
260 | |
261 | /* per-stream, s_flags */ | |
262 | #define CX18_F_S_CLAIMED 3 /* this stream is claimed */ | |
263 | #define CX18_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */ | |
264 | #define CX18_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */ | |
265 | #define CX18_F_S_STREAMOFF 7 /* signal end of stream EOS */ | |
266 | #define CX18_F_S_APPL_IO 8 /* this stream is used read/written by an application */ | |
87116159 | 267 | #define CX18_F_S_STOPPING 9 /* telling the fw to stop capturing */ |
1c1e45d1 HV |
268 | |
269 | /* per-cx18, i_flags */ | |
1d6782bd AW |
270 | #define CX18_F_I_LOADED_FW 0 /* Loaded firmware 1st time */ |
271 | #define CX18_F_I_EOS 4 /* End of encoder stream */ | |
272 | #define CX18_F_I_RADIO_USER 5 /* radio tuner is selected */ | |
273 | #define CX18_F_I_ENC_PAUSED 13 /* the encoder is paused */ | |
1d6782bd AW |
274 | #define CX18_F_I_INITED 21 /* set after first open */ |
275 | #define CX18_F_I_FAILED 22 /* set if first open failed */ | |
1c1e45d1 HV |
276 | |
277 | /* These are the VBI types as they appear in the embedded VBI private packets. */ | |
278 | #define CX18_SLICED_TYPE_TELETEXT_B (1) | |
279 | #define CX18_SLICED_TYPE_CAPTION_525 (4) | |
280 | #define CX18_SLICED_TYPE_WSS_625 (5) | |
281 | #define CX18_SLICED_TYPE_VPS (7) | |
282 | ||
82acdc84 AW |
283 | /** |
284 | * list_entry_is_past_end - check if a previous loop cursor is off list end | |
285 | * @pos: the type * previously used as a loop cursor. | |
286 | * @head: the head for your list. | |
287 | * @member: the name of the list_struct within the struct. | |
288 | * | |
289 | * Check if the entry's list_head is the head of the list, thus it's not a | |
290 | * real entry but was the loop cursor that walked past the end | |
291 | */ | |
292 | #define list_entry_is_past_end(pos, head, member) \ | |
293 | (&pos->member == (head)) | |
294 | ||
1c1e45d1 HV |
295 | struct cx18_buffer { |
296 | struct list_head list; | |
297 | dma_addr_t dma_handle; | |
1c1e45d1 HV |
298 | char *buf; |
299 | ||
300 | u32 bytesused; | |
301 | u32 readpos; | |
302 | }; | |
303 | ||
52fcb3ec AW |
304 | struct cx18_mdl { |
305 | struct list_head list; | |
306 | u32 id; /* index into cx->scb->cpu_mdl[] of 1st cx18_mdl_ent */ | |
307 | ||
308 | unsigned int skipped; | |
309 | unsigned long m_flags; | |
310 | ||
311 | struct list_head buf_list; | |
312 | struct cx18_buffer *curr_buf; /* current buffer in list for reading */ | |
313 | ||
314 | u32 bytesused; | |
315 | u32 readpos; | |
316 | }; | |
317 | ||
1c1e45d1 HV |
318 | struct cx18_queue { |
319 | struct list_head list; | |
c37b11bf | 320 | atomic_t depth; |
1c1e45d1 | 321 | u32 bytesused; |
40c5520f | 322 | spinlock_t lock; |
1c1e45d1 HV |
323 | }; |
324 | ||
325 | struct cx18_dvb { | |
326 | struct dmx_frontend hw_frontend; | |
327 | struct dmx_frontend mem_frontend; | |
328 | struct dmxdev dmxdev; | |
329 | struct dvb_adapter dvb_adapter; | |
330 | struct dvb_demux demux; | |
331 | struct dvb_frontend *fe; | |
332 | struct dvb_net dvbnet; | |
333 | int enabled; | |
334 | int feeding; | |
1c1e45d1 | 335 | struct mutex feedlock; |
1c1e45d1 HV |
336 | }; |
337 | ||
338 | struct cx18; /* forward reference */ | |
339 | struct cx18_scb; /* forward reference */ | |
340 | ||
72a4f808 | 341 | |
ee2d64f5 | 342 | #define CX18_MAX_MDL_ACKS 2 |
deed75ed | 343 | #define CX18_MAX_IN_WORK_ORDERS (CX18_MAX_FW_MDLS_PER_STREAM + 7) |
0ef02892 | 344 | /* CPU_DE_RELEASE_MDL can burst CX18_MAX_FW_MDLS_PER_STREAM orders in a group */ |
ee2d64f5 | 345 | |
72a4f808 AW |
346 | #define CX18_F_EWO_MB_STALE_UPON_RECEIPT 0x1 |
347 | #define CX18_F_EWO_MB_STALE_WHILE_PROC 0x2 | |
348 | #define CX18_F_EWO_MB_STALE \ | |
349 | (CX18_F_EWO_MB_STALE_UPON_RECEIPT | CX18_F_EWO_MB_STALE_WHILE_PROC) | |
350 | ||
deed75ed | 351 | struct cx18_in_work_order { |
ee2d64f5 AW |
352 | struct work_struct work; |
353 | atomic_t pending; | |
354 | struct cx18 *cx; | |
72a4f808 | 355 | unsigned long flags; |
ee2d64f5 AW |
356 | int rpu; |
357 | struct cx18_mailbox mb; | |
358 | struct cx18_mdl_ack mdl_ack[CX18_MAX_MDL_ACKS]; | |
359 | char *str; | |
360 | }; | |
361 | ||
d3c5e707 AW |
362 | #define CX18_INVALID_TASK_HANDLE 0xffffffff |
363 | ||
1c1e45d1 HV |
364 | struct cx18_stream { |
365 | /* These first four fields are always set, even if the stream | |
366 | is not actually created. */ | |
3d05913d | 367 | struct video_device *video_dev; /* NULL when stream not created */ |
1c1e45d1 HV |
368 | struct cx18 *cx; /* for ease of use */ |
369 | const char *name; /* name of the stream */ | |
370 | int type; /* stream type */ | |
371 | u32 handle; /* task handle */ | |
fa655dda | 372 | unsigned int mdl_base_idx; |
1c1e45d1 HV |
373 | |
374 | u32 id; | |
1c1e45d1 HV |
375 | unsigned long s_flags; /* status flags, see above */ |
376 | int dma; /* can be PCI_DMA_TODEVICE, | |
377 | PCI_DMA_FROMDEVICE or | |
378 | PCI_DMA_NONE */ | |
1c1e45d1 HV |
379 | wait_queue_head_t waitq; |
380 | ||
52fcb3ec AW |
381 | /* Buffers */ |
382 | struct list_head buf_pool; /* buffers not attached to an MDL */ | |
383 | u32 buffers; /* total buffers owned by this stream */ | |
384 | u32 buf_size; /* size in bytes of a single buffer */ | |
385 | ||
386 | /* MDL sizes - all stream MDLs are the same size */ | |
387 | u32 bufs_per_mdl; | |
388 | u32 mdl_size; /* total bytes in all buffers in a mdl */ | |
1c1e45d1 | 389 | |
52fcb3ec AW |
390 | /* MDL Queues */ |
391 | struct cx18_queue q_free; /* free - in rotation, not committed */ | |
392 | struct cx18_queue q_busy; /* busy - in use by firmware */ | |
393 | struct cx18_queue q_full; /* full - data for user apps */ | |
394 | struct cx18_queue q_idle; /* idle - not in rotation */ | |
1c1e45d1 | 395 | |
21a278b8 AW |
396 | struct work_struct out_work_order; |
397 | ||
1c1e45d1 HV |
398 | /* DVB / Digital Transport */ |
399 | struct cx18_dvb dvb; | |
400 | }; | |
401 | ||
402 | struct cx18_open_id { | |
403 | u32 open_id; | |
404 | int type; | |
405 | enum v4l2_priority prio; | |
406 | struct cx18 *cx; | |
407 | }; | |
408 | ||
409 | /* forward declaration of struct defined in cx18-cards.h */ | |
410 | struct cx18_card; | |
411 | ||
302df970 AW |
412 | /* |
413 | * A note about "sliced" VBI data as implemented in this driver: | |
414 | * | |
415 | * Currently we collect the sliced VBI in the form of Ancillary Data | |
416 | * packets, inserted by the AV core decoder/digitizer/slicer in the | |
417 | * horizontal blanking region of the VBI lines, in "raw" mode as far as | |
418 | * the Encoder is concerned. We don't ever tell the Encoder itself | |
419 | * to provide sliced VBI. (AV Core: sliced mode - Encoder: raw mode) | |
420 | * | |
421 | * We then process the ancillary data ourselves to send the sliced data | |
422 | * to the user application directly or build up MPEG-2 private stream 1 | |
423 | * packets to splice into (only!) MPEG-2 PS streams for the user app. | |
424 | * | |
425 | * (That's how ivtv essentially does it.) | |
426 | * | |
427 | * The Encoder should be able to extract certain sliced VBI data for | |
428 | * us and provide it in a separate stream or splice it into any type of | |
429 | * MPEG PS or TS stream, but this isn't implemented yet. | |
430 | */ | |
431 | ||
432 | /* | |
433 | * Number of "raw" VBI samples per horizontal line we tell the Encoder to | |
434 | * grab from the decoder/digitizer/slicer output for raw or sliced VBI. | |
435 | * It depends on the pixel clock and the horiz rate: | |
436 | * | |
437 | * (1/Fh)*(2*Fp) = Samples/line | |
438 | * = 4 bytes EAV + Anc data in hblank + 4 bytes SAV + active samples | |
439 | * | |
440 | * Sliced VBI data is sent as ancillary data during horizontal blanking | |
441 | * Raw VBI is sent as active video samples during vertcal blanking | |
442 | * | |
443 | * We use a BT.656 pxiel clock of 13.5 MHz and a BT.656 active line | |
444 | * length of 720 pixels @ 4:2:2 sampling. Thus... | |
445 | * | |
446 | * For systems that use a 15.734 kHz horizontal rate, such as | |
447 | * NTSC-M, PAL-M, PAL-60, and other 60 Hz/525 line systems, we have: | |
448 | * | |
449 | * (1/15.734 kHz) * 2 * 13.5 MHz = 1716 samples/line = | |
450 | * 4 bytes SAV + 268 bytes anc data + 4 bytes SAV + 1440 active samples | |
451 | * | |
452 | * For systems that use a 15.625 kHz horizontal rate, such as | |
453 | * PAL-B/G/H, PAL-I, SECAM-L and other 50 Hz/625 line systems, we have: | |
454 | * | |
455 | * (1/15.625 kHz) * 2 * 13.5 MHz = 1728 samples/line = | |
456 | * 4 bytes SAV + 280 bytes anc data + 4 bytes SAV + 1440 active samples | |
457 | */ | |
458 | static const u32 vbi_active_samples = 1444; /* 4 byte SAV + 720 Y + 720 U/V */ | |
459 | static const u32 vbi_hblank_samples_60Hz = 272; /* 4 byte EAV + 268 anc/fill */ | |
460 | static const u32 vbi_hblank_samples_50Hz = 284; /* 4 byte EAV + 280 anc/fill */ | |
1c1e45d1 HV |
461 | |
462 | #define CX18_VBI_FRAMES 32 | |
463 | ||
1c1e45d1 | 464 | struct vbi_info { |
302df970 | 465 | /* Current state of v4l2 VBI settings for this device */ |
1c1e45d1 | 466 | struct v4l2_format in; |
302df970 AW |
467 | struct v4l2_sliced_vbi_format *sliced_in; /* pointer to in.fmt.sliced */ |
468 | u32 count; /* Count of VBI data lines: 60 Hz: 12 or 50 Hz: 18 */ | |
469 | u32 start[2]; /* First VBI data line per field: 10 & 273 or 6 & 318 */ | |
1c1e45d1 | 470 | |
302df970 | 471 | u32 frame; /* Count of VBI buffers/frames received from Encoder */ |
1c1e45d1 | 472 | |
302df970 AW |
473 | /* |
474 | * Vars for creation and insertion of MPEG Private Stream 1 packets | |
475 | * of sliced VBI data into an MPEG PS | |
476 | */ | |
1c1e45d1 | 477 | |
302df970 AW |
478 | /* Boolean: create and insert Private Stream 1 packets into the PS */ |
479 | int insert_mpeg; | |
480 | ||
481 | /* | |
482 | * Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines. | |
483 | * Used in cx18-vbi.c only for collecting sliced data, and as a source | |
484 | * during conversion of sliced VBI data into MPEG Priv Stream 1 packets. | |
485 | * We don't need to save state here, but the array may have been a bit | |
486 | * too big (2304 bytes) to alloc from the stack. | |
487 | */ | |
488 | struct v4l2_sliced_vbi_data sliced_data[36]; | |
1c1e45d1 | 489 | |
302df970 AW |
490 | /* |
491 | * A ring buffer of driver-generated MPEG-2 PS | |
492 | * Program Pack/Private Stream 1 packets for sliced VBI data insertion | |
493 | * into the MPEG PS stream. | |
494 | * | |
495 | * In each sliced_mpeg_data[] buffer is: | |
496 | * 16 byte MPEG-2 PS Program Pack Header | |
497 | * 16 byte MPEG-2 Private Stream 1 PES Header | |
498 | * 4 byte magic number: "itv0" or "ITV0" | |
499 | * 4 byte first field line mask, if "itv0" | |
500 | * 4 byte second field line mask, if "itv0" | |
501 | * 36 lines, if "ITV0"; or <36 lines, if "itv0"; of sliced VBI data | |
502 | * | |
503 | * Each line in the payload is | |
504 | * 1 byte line header derived from the SDID (WSS, CC, VPS, etc.) | |
505 | * 42 bytes of line data | |
506 | * | |
507 | * That's a maximum 1552 bytes of payload in the Private Stream 1 packet | |
508 | * which is the payload size a PVR-350 (CX23415) MPEG decoder will | |
509 | * accept for VBI data. So, including the headers, it's a maximum 1584 | |
510 | * bytes total. | |
511 | */ | |
512 | #define CX18_SLICED_MPEG_DATA_MAXSZ 1584 | |
513 | /* copy_vbi_buf() needs 8 temp bytes on the end for the worst case */ | |
514 | #define CX18_SLICED_MPEG_DATA_BUFSZ (CX18_SLICED_MPEG_DATA_MAXSZ+8) | |
1c1e45d1 HV |
515 | u8 *sliced_mpeg_data[CX18_VBI_FRAMES]; |
516 | u32 sliced_mpeg_size[CX18_VBI_FRAMES]; | |
302df970 AW |
517 | |
518 | /* Count of Program Pack/Program Stream 1 packets inserted into PS */ | |
1c1e45d1 HV |
519 | u32 inserted_frame; |
520 | ||
302df970 | 521 | /* |
52fcb3ec | 522 | * A dummy driver stream transfer mdl & buffer with a copy of the next |
302df970 AW |
523 | * sliced_mpeg_data[] buffer for output to userland apps. |
524 | * Only used in cx18-fileops.c, but its state needs to persist at times. | |
525 | */ | |
52fcb3ec | 526 | struct cx18_mdl sliced_mpeg_mdl; |
302df970 | 527 | struct cx18_buffer sliced_mpeg_buf; |
1c1e45d1 HV |
528 | }; |
529 | ||
530 | /* Per cx23418, per I2C bus private algo callback data */ | |
531 | struct cx18_i2c_algo_callback_data { | |
532 | struct cx18 *cx; | |
533 | int bus_index; /* 0 or 1 for the cx23418's 1st or 2nd I2C bus */ | |
534 | }; | |
535 | ||
f7823f8f | 536 | #define CX18_MAX_MMIO_WR_RETRIES 10 |
330c6ec8 | 537 | |
1c1e45d1 HV |
538 | /* Struct to hold info about cx18 cards */ |
539 | struct cx18 { | |
5811cf99 | 540 | int instance; |
3d05913d | 541 | struct pci_dev *pci_dev; |
888cdb07 | 542 | struct v4l2_device v4l2_dev; |
ff2a2001 | 543 | struct v4l2_subdev *sd_av; /* A/V decoder/digitizer sub-device */ |
eefe1010 | 544 | struct v4l2_subdev *sd_extmux; /* External multiplexer sub-dev */ |
888cdb07 | 545 | |
1c1e45d1 HV |
546 | const struct cx18_card *card; /* card information */ |
547 | const char *card_name; /* full name of the card */ | |
548 | const struct cx18_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */ | |
549 | u8 is_50hz; | |
550 | u8 is_60hz; | |
1c1e45d1 HV |
551 | u8 nof_inputs; /* number of video inputs */ |
552 | u8 nof_audio_inputs; /* number of audio inputs */ | |
1c1e45d1 HV |
553 | u32 v4l2_cap; /* V4L2 capabilities of card */ |
554 | u32 hw_flags; /* Hardware description of the board */ | |
fa655dda | 555 | unsigned int free_mdl_idx; |
72c2d6d3 AW |
556 | struct cx18_scb __iomem *scb; /* pointer to SCB */ |
557 | struct mutex epu2apu_mb_lock; /* protect driver to chip mailbox in SCB*/ | |
558 | struct mutex epu2cpu_mb_lock; /* protect driver to chip mailbox in SCB*/ | |
559 | ||
1c1e45d1 HV |
560 | struct cx18_av_state av_state; |
561 | ||
562 | /* codec settings */ | |
563 | struct cx2341x_mpeg_params params; | |
564 | u32 filter_mode; | |
565 | u32 temporal_strength; | |
566 | u32 spatial_strength; | |
567 | ||
568 | /* dualwatch */ | |
569 | unsigned long dualwatch_jiffies; | |
0d82fe80 | 570 | u32 dualwatch_stereo_mode; |
1c1e45d1 | 571 | |
1c1e45d1 HV |
572 | struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */ |
573 | struct cx18_options options; /* User options */ | |
6ecd86dc | 574 | int stream_buffers[CX18_MAX_STREAMS]; /* # of buffers for each stream */ |
1c1e45d1 HV |
575 | int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */ |
576 | struct cx18_stream streams[CX18_MAX_STREAMS]; /* Stream data */ | |
9722c8f9 | 577 | struct snd_cx18_card *alsa; /* ALSA interface for PCM capture stream */ |
1c1e45d1 | 578 | unsigned long i_flags; /* global cx18 flags */ |
31554ae5 HV |
579 | atomic_t ana_capturing; /* count number of active analog capture streams */ |
580 | atomic_t tot_capturing; /* total count number of active capture streams */ | |
1c1e45d1 HV |
581 | int search_pack_header; |
582 | ||
1c1e45d1 HV |
583 | int open_id; /* incremented each time an open occurs, used as |
584 | unique ID. Starts at 1, so 0 can be used as | |
585 | uninitialized value in the stream->id. */ | |
586 | ||
587 | u32 base_addr; | |
588 | struct v4l2_prio_state prio; | |
589 | ||
590 | u8 card_rev; | |
591 | void __iomem *enc_mem, *reg_mem; | |
592 | ||
593 | struct vbi_info vbi; | |
594 | ||
1c1e45d1 HV |
595 | u64 mpg_data_received; |
596 | u64 vbi_data_inserted; | |
597 | ||
598 | wait_queue_head_t mb_apu_waitq; | |
599 | wait_queue_head_t mb_cpu_waitq; | |
1c1e45d1 HV |
600 | wait_queue_head_t cap_w; |
601 | /* when the current DMA is finished this queue is woken up */ | |
602 | wait_queue_head_t dma_waitq; | |
603 | ||
d6c7e5f8 AW |
604 | u32 sw1_irq_mask; |
605 | u32 sw2_irq_mask; | |
606 | u32 hw2_irq_mask; | |
607 | ||
deed75ed AW |
608 | struct workqueue_struct *in_work_queue; |
609 | char in_workq_name[11]; /* "cx18-NN-in" */ | |
610 | struct cx18_in_work_order in_work_order[CX18_MAX_IN_WORK_ORDERS]; | |
ee2d64f5 | 611 | char epu_debug_str[256]; /* CX18_EPU_DEBUG is rare: use shared space */ |
1d6782bd | 612 | |
87116159 AW |
613 | struct workqueue_struct *out_work_queue; |
614 | char out_workq_name[12]; /* "cx18-NN-out" */ | |
87116159 | 615 | |
1c1e45d1 HV |
616 | /* i2c */ |
617 | struct i2c_adapter i2c_adap[2]; | |
618 | struct i2c_algo_bit_data i2c_algo[2]; | |
619 | struct cx18_i2c_algo_callback_data i2c_algo_cb_data[2]; | |
1c1e45d1 | 620 | |
83526190 AW |
621 | struct IR_i2c_init_data ir_i2c_init_data; |
622 | ||
ba60bc67 HV |
623 | /* gpio */ |
624 | u32 gpio_dir; | |
625 | u32 gpio_val; | |
8abdd00d | 626 | struct mutex gpio_lock; |
eefe1010 AW |
627 | struct v4l2_subdev sd_gpiomux; |
628 | struct v4l2_subdev sd_resetctrl; | |
ba60bc67 | 629 | |
1c1e45d1 HV |
630 | /* v4l2 and User settings */ |
631 | ||
632 | /* codec settings */ | |
633 | u32 audio_input; | |
634 | u32 active_input; | |
1c1e45d1 HV |
635 | v4l2_std_id std; |
636 | v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */ | |
637 | }; | |
638 | ||
5811cf99 AW |
639 | static inline struct cx18 *to_cx18(struct v4l2_device *v4l2_dev) |
640 | { | |
641 | return container_of(v4l2_dev, struct cx18, v4l2_dev); | |
642 | } | |
643 | ||
1c1e45d1 | 644 | /* Globals */ |
1c1e45d1 | 645 | extern int cx18_first_minor; |
1c1e45d1 HV |
646 | |
647 | /*==============Prototypes==================*/ | |
648 | ||
649 | /* Return non-zero if a signal is pending */ | |
650 | int cx18_msleep_timeout(unsigned int msecs, int intr); | |
651 | ||
1c1e45d1 HV |
652 | /* Read Hauppauge eeprom */ |
653 | struct tveeprom; /* forward reference */ | |
654 | void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv); | |
655 | ||
656 | /* First-open initialization: load firmware, etc. */ | |
657 | int cx18_init_on_first_open(struct cx18 *cx); | |
658 | ||
dd073434 AW |
659 | /* Test if the current VBI mode is raw (1) or sliced (0) */ |
660 | static inline int cx18_raw_vbi(const struct cx18 *cx) | |
661 | { | |
662 | return cx->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE; | |
663 | } | |
664 | ||
ff2a2001 AW |
665 | /* Call the specified callback for all subdevs with a grp_id bit matching the |
666 | * mask in hw (if 0, then match them all). Ignore any errors. */ | |
667 | #define cx18_call_hw(cx, hw, o, f, args...) \ | |
668 | __v4l2_device_call_subdevs(&(cx)->v4l2_dev, \ | |
669 | !(hw) || (sd->grp_id & (hw)), o, f , ##args) | |
670 | ||
671 | #define cx18_call_all(cx, o, f, args...) cx18_call_hw(cx, 0, o, f , ##args) | |
672 | ||
673 | /* Call the specified callback for all subdevs with a grp_id bit matching the | |
674 | * mask in hw (if 0, then match them all). If the callback returns an error | |
675 | * other than 0 or -ENOIOCTLCMD, then return with that error code. */ | |
676 | #define cx18_call_hw_err(cx, hw, o, f, args...) \ | |
677 | __v4l2_device_call_subdevs_until_err( \ | |
678 | &(cx)->v4l2_dev, !(hw) || (sd->grp_id & (hw)), o, f , ##args) | |
679 | ||
680 | #define cx18_call_all_err(cx, o, f, args...) \ | |
681 | cx18_call_hw_err(cx, 0, o, f , ##args) | |
682 | ||
1c1e45d1 | 683 | #endif /* CX18_DRIVER_H */ |