[net-next-2.6.git] / drivers / media / dvb / frontends / cx22702.c

/*
    Conexant 22702 DVB OFDM demodulator driver

    based on:
	Alps TDMB7 DVB OFDM demodulator driver

    Copyright (C) 2001-2002 Convergence Integrated Media GmbH
	  Holger Waechtler <holger@convergence.de>

    Copyright (C) 2004 Steven Toth <stoth@linuxtv.org>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.

*/

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include "dvb_frontend.h"
#include "cx22702.h"

struct cx22702_state {

	struct i2c_adapter *i2c;

	/* configuration settings */
	const struct cx22702_config *config;

	struct dvb_frontend frontend;

	/* previous uncorrected block counter */
	u8 prevUCBlocks;
};

static int debug;
module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Enable verbose debug messages");

#define dprintk	if (debug) printk

/* Register values to initialise the demod */
static u8 init_tab[] = {
	0x00, 0x00, /* Stop aquisition */
	0x0B, 0x06,
	0x09, 0x01,
	0x0D, 0x41,
	0x16, 0x32,
	0x20, 0x0A,
	0x21, 0x17,
	0x24, 0x3e,
	0x26, 0xff,
	0x27, 0x10,
	0x28, 0x00,
	0x29, 0x00,
	0x2a, 0x10,
	0x2b, 0x00,
	0x2c, 0x10,
	0x2d, 0x00,
	0x48, 0xd4,
	0x49, 0x56,
	0x6b, 0x1e,
	0xc8, 0x02,
	0xf9, 0x00,
	0xfa, 0x00,
	0xfb, 0x00,
	0xfc, 0x00,
	0xfd, 0x00,
};

static int cx22702_writereg(struct cx22702_state *state, u8 reg, u8 data)
{
	int ret;
	u8 buf[] = { reg, data };
	struct i2c_msg msg = {
		.addr = state->config->demod_address, .flags = 0,
			.buf = buf, .len = 2 };

	ret = i2c_transfer(state->i2c, &msg, 1);

	if (unlikely(ret != 1)) {
		printk(KERN_ERR
			"%s: error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
			__func__, reg, data, ret);
		return -1;
	}

	return 0;
}

static u8 cx22702_readreg(struct cx22702_state *state, u8 reg)
{
	int ret;
	u8 data;

	struct i2c_msg msg[] = {
		{ .addr = state->config->demod_address, .flags = 0,
			.buf = &reg, .len = 1 },
		{ .addr = state->config->demod_address, .flags = I2C_M_RD,
			.buf = &data, .len = 1 } };

	ret = i2c_transfer(state->i2c, msg, 2);

	if (unlikely(ret != 2)) {
		printk(KERN_ERR "%s: error (reg == 0x%02x, ret == %i)\n",
			__func__, reg, ret);
		return 0;
	}

	return data;
}

static int cx22702_set_inversion(struct cx22702_state *state, int inversion)
{
	u8 val;

	switch (inversion) {
	case INVERSION_AUTO:
		return -EOPNOTSUPP;
	case INVERSION_ON:
		val = cx22702_readreg(state, 0x0C);
		return cx22702_writereg(state, 0x0C, val | 0x01);
	case INVERSION_OFF:
		val = cx22702_readreg(state, 0x0C);
		return cx22702_writereg(state, 0x0C, val & 0xfe);
	default:
		return -EINVAL;
	}

}

/* Retrieve the demod settings */
static int cx22702_get_tps(struct cx22702_state *state,
	struct dvb_ofdm_parameters *p)
{
	u8 val;

	/* Make sure the TPS regs are valid */
	if (!(cx22702_readreg(state, 0x0A) & 0x20))
		return -EAGAIN;

	val = cx22702_readreg(state, 0x01);
	switch ((val & 0x18) >> 3) {
	case 0:
		p->constellation = QPSK;
		break;
	case 1:
		p->constellation = QAM_16;
		break;
	case 2:
		p->constellation = QAM_64;
		break;
	}
	switch (val & 0x07) {
	case 0:
		p->hierarchy_information = HIERARCHY_NONE;
		break;
	case 1:
		p->hierarchy_information = HIERARCHY_1;
		break;
	case 2:
		p->hierarchy_information = HIERARCHY_2;
		break;
	case 3:
		p->hierarchy_information = HIERARCHY_4;
		break;
	}


	val = cx22702_readreg(state, 0x02);
	switch ((val & 0x38) >> 3) {
	case 0:
		p->code_rate_HP = FEC_1_2;
		break;
	case 1:
		p->code_rate_HP = FEC_2_3;
		break;
	case 2:
		p->code_rate_HP = FEC_3_4;
		break;
	case 3:
		p->code_rate_HP = FEC_5_6;
		break;
	case 4:
		p->code_rate_HP = FEC_7_8;
		break;
	}
	switch (val & 0x07) {
	case 0:
		p->code_rate_LP = FEC_1_2;
		break;
	case 1:
		p->code_rate_LP = FEC_2_3;
		break;
	case 2:
		p->code_rate_LP = FEC_3_4;
		break;
	case 3:
		p->code_rate_LP = FEC_5_6;
		break;
	case 4:
		p->code_rate_LP = FEC_7_8;
		break;
	}

	val = cx22702_readreg(state, 0x03);
	switch ((val & 0x0c) >> 2) {
	case 0:
		p->guard_interval = GUARD_INTERVAL_1_32;
		break;
	case 1:
		p->guard_interval = GUARD_INTERVAL_1_16;
		break;
	case 2:
		p->guard_interval = GUARD_INTERVAL_1_8;
		break;
	case 3:
		p->guard_interval = GUARD_INTERVAL_1_4;
		break;
	}
	switch (val & 0x03) {
	case 0:
		p->transmission_mode = TRANSMISSION_MODE_2K;
		break;
	case 1:
		p->transmission_mode = TRANSMISSION_MODE_8K;
		break;
	}

	return 0;
}

static int cx22702_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
{
	struct cx22702_state *state = fe->demodulator_priv;
	dprintk("%s(%d)\n", __func__, enable);
	if (enable)
		return cx22702_writereg(state, 0x0D,
			cx22702_readreg(state, 0x0D) & 0xfe);
	else
		return cx22702_writereg(state, 0x0D,
			cx22702_readreg(state, 0x0D) | 1);
}

/* Talk to the demod, set the FEC, GUARD, QAM settings etc */
static int cx22702_set_tps(struct dvb_frontend *fe,
	struct dvb_frontend_parameters *p)
{
	u8 val;
	struct cx22702_state *state = fe->demodulator_priv;

	if (fe->ops.tuner_ops.set_params) {
		fe->ops.tuner_ops.set_params(fe, p);
		if (fe->ops.i2c_gate_ctrl)
			fe->ops.i2c_gate_ctrl(fe, 0);
	}

	/* set inversion */
	cx22702_set_inversion(state, p->inversion);

	/* set bandwidth */
	switch (p->u.ofdm.bandwidth) {
	case BANDWIDTH_6_MHZ:
		cx22702_writereg(state, 0x0C,
			(cx22702_readreg(state, 0x0C) & 0xcf) | 0x20);
		break;
	case BANDWIDTH_7_MHZ:
		cx22702_writereg(state, 0x0C,
			(cx22702_readreg(state, 0x0C) & 0xcf) | 0x10);
		break;
	case BANDWIDTH_8_MHZ:
		cx22702_writereg(state, 0x0C,
			cx22702_readreg(state, 0x0C) & 0xcf);
		break;
	default:
		dprintk("%s: invalid bandwidth\n", __func__);
		return -EINVAL;
	}

	p->u.ofdm.code_rate_LP = FEC_AUTO; /* temp hack as manual not working */

	/* use auto configuration? */
	if ((p->u.ofdm.hierarchy_information == HIERARCHY_AUTO) ||
	   (p->u.ofdm.constellation == QAM_AUTO) ||
	   (p->u.ofdm.code_rate_HP == FEC_AUTO) ||
	   (p->u.ofdm.code_rate_LP == FEC_AUTO) ||
	   (p->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO) ||
	   (p->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO)) {

		/* TPS Source - use hardware driven values */
		cx22702_writereg(state, 0x06, 0x10);
		cx22702_writereg(state, 0x07, 0x9);
		cx22702_writereg(state, 0x08, 0xC1);
		cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B)
			& 0xfc);
		cx22702_writereg(state, 0x0C,
			(cx22702_readreg(state, 0x0C) & 0xBF) | 0x40);
		cx22702_writereg(state, 0x00, 0x01); /* Begin aquisition */
		dprintk("%s: Autodetecting\n", __func__);
		return 0;
	}

	/* manually programmed values */
	val = 0;
	switch (p->u.ofdm.constellation) {
	case QPSK:
		val = (val & 0xe7);
		break;
	case QAM_16:
		val = (val & 0xe7) | 0x08;
		break;
	case QAM_64:
		val = (val & 0xe7) | 0x10;
		break;
	default:
		dprintk("%s: invalid constellation\n", __func__);
		return -EINVAL;
	}
	switch (p->u.ofdm.hierarchy_information) {
	case HIERARCHY_NONE:
		val = (val & 0xf8);
		break;
	case HIERARCHY_1:
		val = (val & 0xf8) | 1;
		break;
	case HIERARCHY_2:
		val = (val & 0xf8) | 2;
		break;
	case HIERARCHY_4:
		val = (val & 0xf8) | 3;
		break;
	default:
		dprintk("%s: invalid hierarchy\n", __func__);
		return -EINVAL;
	}
	cx22702_writereg(state, 0x06, val);

	val = 0;
	switch (p->u.ofdm.code_rate_HP) {
	case FEC_NONE:
	case FEC_1_2:
		val = (val & 0xc7);
		break;
	case FEC_2_3:
		val = (val & 0xc7) | 0x08;
		break;
	case FEC_3_4:
		val = (val & 0xc7) | 0x10;
		break;
	case FEC_5_6:
		val = (val & 0xc7) | 0x18;
		break;
	case FEC_7_8:
		val = (val & 0xc7) | 0x20;
		break;
	default:
		dprintk("%s: invalid code_rate_HP\n", __func__);
		return -EINVAL;
	}
	switch (p->u.ofdm.code_rate_LP) {
	case FEC_NONE:
	case FEC_1_2:
		val = (val & 0xf8);
		break;
	case FEC_2_3:
		val = (val & 0xf8) | 1;
		break;
	case FEC_3_4:
		val = (val & 0xf8) | 2;
		break;
	case FEC_5_6:
		val = (val & 0xf8) | 3;
		break;
	case FEC_7_8:
		val = (val & 0xf8) | 4;
		break;
	default:
		dprintk("%s: invalid code_rate_LP\n", __func__);
		return -EINVAL;
	}
	cx22702_writereg(state, 0x07, val);

	val = 0;
	switch (p->u.ofdm.guard_interval) {
	case GUARD_INTERVAL_1_32:
		val = (val & 0xf3);
		break;
	case GUARD_INTERVAL_1_16:
		val = (val & 0xf3) | 0x04;
		break;
	case GUARD_INTERVAL_1_8:
		val = (val & 0xf3) | 0x08;
		break;
	case GUARD_INTERVAL_1_4:
		val = (val & 0xf3) | 0x0c;
		break;
	default:
		dprintk("%s: invalid guard_interval\n", __func__);
		return -EINVAL;
	}
	switch (p->u.ofdm.transmission_mode) {
	case TRANSMISSION_MODE_2K:
		val = (val & 0xfc);
		break;
	case TRANSMISSION_MODE_8K:
		val = (val & 0xfc) | 1;
		break;
	default:
		dprintk("%s: invalid transmission_mode\n", __func__);
		return -EINVAL;
	}
	cx22702_writereg(state, 0x08, val);
	cx22702_writereg(state, 0x0B,
		(cx22702_readreg(state, 0x0B) & 0xfc) | 0x02);
	cx22702_writereg(state, 0x0C,
		(cx22702_readreg(state, 0x0C) & 0xBF) | 0x40);

	/* Begin channel aquisition */
	cx22702_writereg(state, 0x00, 0x01);

	return 0;
}

/* Reset the demod hardware and reset all of the configuration registers
   to a default state. */
static int cx22702_init(struct dvb_frontend *fe)
{
	int i;
	struct cx22702_state *state = fe->demodulator_priv;

	cx22702_writereg(state, 0x00, 0x02);

	msleep(10);

	for (i = 0; i < ARRAY_SIZE(init_tab); i += 2)
		cx22702_writereg(state, init_tab[i], init_tab[i + 1]);

	cx22702_writereg(state, 0xf8, (state->config->output_mode << 1)
		& 0x02);

	cx22702_i2c_gate_ctrl(fe, 0);

	return 0;
}

static int cx22702_read_status(struct dvb_frontend *fe, fe_status_t *status)
{
	struct cx22702_state *state = fe->demodulator_priv;
	u8 reg0A;
	u8 reg23;

	*status = 0;

	reg0A = cx22702_readreg(state, 0x0A);
	reg23 = cx22702_readreg(state, 0x23);

	dprintk("%s: status demod=0x%02x agc=0x%02x\n"
		, __func__, reg0A, reg23);

	if (reg0A & 0x10) {
		*status |= FE_HAS_LOCK;
		*status |= FE_HAS_VITERBI;
		*status |= FE_HAS_SYNC;
	}

	if (reg0A & 0x20)
		*status |= FE_HAS_CARRIER;

	if (reg23 < 0xf0)
		*status |= FE_HAS_SIGNAL;

	return 0;
}

static int cx22702_read_ber(struct dvb_frontend *fe, u32 *ber)
{
	struct cx22702_state *state = fe->demodulator_priv;

	if (cx22702_readreg(state, 0xE4) & 0x02) {
		/* Realtime statistics */
		*ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
			| (cx22702_readreg(state, 0xDF) & 0x7F);
	} else {
		/* Averagtine statistics */
		*ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
			| cx22702_readreg(state, 0xDF);
	}

	return 0;
}

static int cx22702_read_signal_strength(struct dvb_frontend *fe,
	u16 *signal_strength)
{
	struct cx22702_state *state = fe->demodulator_priv;

	u16 rs_ber;
	rs_ber = cx22702_readreg(state, 0x23);
	*signal_strength = (rs_ber << 8) | rs_ber;

	return 0;
}

static int cx22702_read_snr(struct dvb_frontend *fe, u16 *snr)
{
	struct cx22702_state *state = fe->demodulator_priv;

	u16 rs_ber;
	if (cx22702_readreg(state, 0xE4) & 0x02) {
		/* Realtime statistics */
		rs_ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
			| (cx22702_readreg(state, 0xDF) & 0x7F);
	} else {
		/* Averagine statistics */
		rs_ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 8
			| cx22702_readreg(state, 0xDF);
	}
	*snr = ~rs_ber;

	return 0;
}

static int cx22702_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
{
	struct cx22702_state *state = fe->demodulator_priv;

	u8 _ucblocks;

	/* RS Uncorrectable Packet Count then reset */
	_ucblocks = cx22702_readreg(state, 0xE3);
	if (state->prevUCBlocks < _ucblocks)
		*ucblocks = (_ucblocks - state->prevUCBlocks);
	else
		*ucblocks = state->prevUCBlocks - _ucblocks;
	state->prevUCBlocks = _ucblocks;

	return 0;
}

static int cx22702_get_frontend(struct dvb_frontend *fe,
	struct dvb_frontend_parameters *p)
{
	struct cx22702_state *state = fe->demodulator_priv;

	u8 reg0C = cx22702_readreg(state, 0x0C);

	p->inversion = reg0C & 0x1 ? INVERSION_ON : INVERSION_OFF;
	return cx22702_get_tps(state, &p->u.ofdm);
}

static int cx22702_get_tune_settings(struct dvb_frontend *fe,
	struct dvb_frontend_tune_settings *tune)
{
	tune->min_delay_ms = 1000;
	return 0;
}

static void cx22702_release(struct dvb_frontend *fe)
{
	struct cx22702_state *state = fe->demodulator_priv;
	kfree(state);
}

static struct dvb_frontend_ops cx22702_ops;

struct dvb_frontend *cx22702_attach(const struct cx22702_config *config,
	struct i2c_adapter *i2c)
{
	struct cx22702_state *state = NULL;

	/* allocate memory for the internal state */
	state = kzalloc(sizeof(struct cx22702_state), GFP_KERNEL);
	if (state == NULL)
		goto error;

	/* setup the state */
	state->config = config;
	state->i2c = i2c;

	/* check if the demod is there */
	if (cx22702_readreg(state, 0x1f) != 0x3)
		goto error;

	/* create dvb_frontend */
	memcpy(&state->frontend.ops, &cx22702_ops,
		sizeof(struct dvb_frontend_ops));
	state->frontend.demodulator_priv = state;
	return &state->frontend;

error:
	kfree(state);
	return NULL;
}
EXPORT_SYMBOL(cx22702_attach);

static struct dvb_frontend_ops cx22702_ops = {

	.info = {
		.name			= "Conexant CX22702 DVB-T",
		.type			= FE_OFDM,
		.frequency_min		= 177000000,
		.frequency_max		= 858000000,
		.frequency_stepsize	= 166666,
		.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
		FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
		FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
		FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
		FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
	},

	.release = cx22702_release,

	.init = cx22702_init,
	.i2c_gate_ctrl = cx22702_i2c_gate_ctrl,

	.set_frontend = cx22702_set_tps,
	.get_frontend = cx22702_get_frontend,
	.get_tune_settings = cx22702_get_tune_settings,

	.read_status = cx22702_read_status,
	.read_ber = cx22702_read_ber,
	.read_signal_strength = cx22702_read_signal_strength,
	.read_snr = cx22702_read_snr,
	.read_ucblocks = cx22702_read_ucblocks,
};

MODULE_DESCRIPTION("Conexant CX22702 DVB-T Demodulator driver");
MODULE_AUTHOR("Steven Toth");
MODULE_LICENSE("GPL");
Commit	Line	Data
1da177e4 LT	1	/*
	2	Conexant 22702 DVB OFDM demodulator driver
	3
	4	based on:
9101e622	5	Alps TDMB7 DVB OFDM demodulator driver
1da177e4 LT	6
	7	Copyright (C) 2001-2002 Convergence Integrated Media GmbH
	8	Holger Waechtler <holger@convergence.de>
	9
6d897616	10	Copyright (C) 2004 Steven Toth <stoth@linuxtv.org>
1da177e4 LT	11
	12	This program is free software; you can redistribute it and/or modify
	13	it under the terms of the GNU General Public License as published by
	14	the Free Software Foundation; either version 2 of the License, or
	15	(at your option) any later version.
	16
	17	This program is distributed in the hope that it will be useful,
	18	but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	GNU General Public License for more details.
	21
	22	You should have received a copy of the GNU General Public License
	23	along with this program; if not, write to the Free Software
	24	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	25
	26	*/
	27
	28	#include <linux/kernel.h>
	29	#include <linux/init.h>
	30	#include <linux/module.h>
	31	#include <linux/string.h>
	32	#include <linux/slab.h>
	33	#include <linux/delay.h>
	34	#include "dvb_frontend.h"
	35	#include "cx22702.h"
	36
1da177e4 LT	37	struct cx22702_state {
1da177e4 LT	38
4e3599a5	39	struct i2c_adapter *i2c;
1da177e4	40
1da177e4	41	/* configuration settings */
4e3599a5	42	const struct cx22702_config *config;
1da177e4 LT	43
	44	struct dvb_frontend frontend;
	45
	46	/* previous uncorrected block counter */
	47	u8 prevUCBlocks;
	48	};
	49
ff699e6b	50	static int debug;
4e3599a5 ST	51	module_param(debug, int, 0644);
	52	MODULE_PARM_DESC(debug, "Enable verbose debug messages");
	53
1da177e4 LT	54	#define dprintk if (debug) printk
	55
	56	/* Register values to initialise the demod */
4e3599a5	57	static u8 init_tab[] = {
1da177e4 LT	58	0x00, 0x00, /* Stop aquisition */
	59	0x0B, 0x06,
	60	0x09, 0x01,
	61	0x0D, 0x41,
	62	0x16, 0x32,
	63	0x20, 0x0A,
	64	0x21, 0x17,
	65	0x24, 0x3e,
	66	0x26, 0xff,
	67	0x27, 0x10,
	68	0x28, 0x00,
	69	0x29, 0x00,
	70	0x2a, 0x10,
	71	0x2b, 0x00,
	72	0x2c, 0x10,
	73	0x2d, 0x00,
	74	0x48, 0xd4,
	75	0x49, 0x56,
	76	0x6b, 0x1e,
	77	0xc8, 0x02,
1da177e4 LT	78	0xf9, 0x00,
	79	0xfa, 0x00,
	80	0xfb, 0x00,
	81	0xfc, 0x00,
	82	0xfd, 0x00,
	83	};
	84
4e3599a5	85	static int cx22702_writereg(struct cx22702_state *state, u8 reg, u8 data)
1da177e4 LT	86	{
1da177e4 LT	87	int ret;
4e3599a5 ST	88	u8 buf[] = { reg, data };
	89	struct i2c_msg msg = {
	90	.addr = state->config->demod_address, .flags = 0,
	91	.buf = buf, .len = 2 };
1da177e4 LT	92
	93	ret = i2c_transfer(state->i2c, &msg, 1);
	94
24764107	95	if (unlikely(ret != 1)) {
4e3599a5 ST	96	printk(KERN_ERR
4e3599a5 ST	97	"%s: error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
271ddbf7	98	__func__, reg, data, ret);
24764107 JD	99	return -1;
24764107 JD	100	}
1da177e4	101
24764107	102	return 0;
1da177e4 LT	103	}
1da177e4 LT	104
4e3599a5	105	static u8 cx22702_readreg(struct cx22702_state *state, u8 reg)
1da177e4 LT	106	{
1da177e4 LT	107	int ret;
24764107	108	u8 data;
1da177e4	109
4e3599a5 ST	110	struct i2c_msg msg[] = {
4e3599a5 ST	111	{ .addr = state->config->demod_address, .flags = 0,
24764107	112	.buf = &reg, .len = 1 },
4e3599a5	113	{ .addr = state->config->demod_address, .flags = I2C_M_RD,
24764107	114	.buf = &data, .len = 1 } };
1da177e4 LT	115
	116	ret = i2c_transfer(state->i2c, msg, 2);
	117
24764107 JD	118	if (unlikely(ret != 2)) {
	119	printk(KERN_ERR "%s: error (reg == 0x%02x, ret == %i)\n",
	120	__func__, reg, ret);
	121	return 0;
	122	}
1da177e4	123
24764107	124	return data;
1da177e4 LT	125	}
1da177e4 LT	126
4e3599a5	127	static int cx22702_set_inversion(struct cx22702_state *state, int inversion)
1da177e4 LT	128	{
	129	u8 val;
	130
	131	switch (inversion) {
4e3599a5 ST	132	case INVERSION_AUTO:
	133	return -EOPNOTSUPP;
	134	case INVERSION_ON:
	135	val = cx22702_readreg(state, 0x0C);
	136	return cx22702_writereg(state, 0x0C, val \| 0x01);
	137	case INVERSION_OFF:
	138	val = cx22702_readreg(state, 0x0C);
	139	return cx22702_writereg(state, 0x0C, val & 0xfe);
	140	default:
	141	return -EINVAL;
1da177e4 LT	142	}
	143
	144	}
	145
	146	/* Retrieve the demod settings */
4e3599a5 ST	147	static int cx22702_get_tps(struct cx22702_state *state,
4e3599a5 ST	148	struct dvb_ofdm_parameters *p)
1da177e4 LT	149	{
	150	u8 val;
	151
	152	/* Make sure the TPS regs are valid */
	153	if (!(cx22702_readreg(state, 0x0A) & 0x20))
	154	return -EAGAIN;
	155
4e3599a5 ST	156	val = cx22702_readreg(state, 0x01);
	157	switch ((val & 0x18) >> 3) {
	158	case 0:
	159	p->constellation = QPSK;
	160	break;
	161	case 1:
	162	p->constellation = QAM_16;
	163	break;
	164	case 2:
	165	p->constellation = QAM_64;
	166	break;
1da177e4	167	}
4e3599a5 ST	168	switch (val & 0x07) {
	169	case 0:
	170	p->hierarchy_information = HIERARCHY_NONE;
	171	break;
	172	case 1:
	173	p->hierarchy_information = HIERARCHY_1;
	174	break;
	175	case 2:
	176	p->hierarchy_information = HIERARCHY_2;
	177	break;
	178	case 3:
	179	p->hierarchy_information = HIERARCHY_4;
	180	break;
1da177e4 LT	181	}
	182
	183
4e3599a5 ST	184	val = cx22702_readreg(state, 0x02);
	185	switch ((val & 0x38) >> 3) {
	186	case 0:
	187	p->code_rate_HP = FEC_1_2;
	188	break;
	189	case 1:
	190	p->code_rate_HP = FEC_2_3;
	191	break;
	192	case 2:
	193	p->code_rate_HP = FEC_3_4;
	194	break;
	195	case 3:
	196	p->code_rate_HP = FEC_5_6;
	197	break;
	198	case 4:
	199	p->code_rate_HP = FEC_7_8;
	200	break;
1da177e4	201	}
4e3599a5 ST	202	switch (val & 0x07) {
	203	case 0:
	204	p->code_rate_LP = FEC_1_2;
	205	break;
	206	case 1:
	207	p->code_rate_LP = FEC_2_3;
	208	break;
	209	case 2:
	210	p->code_rate_LP = FEC_3_4;
	211	break;
	212	case 3:
	213	p->code_rate_LP = FEC_5_6;
	214	break;
	215	case 4:
	216	p->code_rate_LP = FEC_7_8;
	217	break;
1da177e4 LT	218	}
1da177e4 LT	219
4e3599a5 ST	220	val = cx22702_readreg(state, 0x03);
	221	switch ((val & 0x0c) >> 2) {
	222	case 0:
	223	p->guard_interval = GUARD_INTERVAL_1_32;
	224	break;
	225	case 1:
	226	p->guard_interval = GUARD_INTERVAL_1_16;
	227	break;
	228	case 2:
	229	p->guard_interval = GUARD_INTERVAL_1_8;
	230	break;
	231	case 3:
	232	p->guard_interval = GUARD_INTERVAL_1_4;
	233	break;
1da177e4	234	}
4e3599a5 ST	235	switch (val & 0x03) {
	236	case 0:
	237	p->transmission_mode = TRANSMISSION_MODE_2K;
	238	break;
	239	case 1:
	240	p->transmission_mode = TRANSMISSION_MODE_8K;
	241	break;
1da177e4 LT	242	}
	243
	244	return 0;
	245	}
	246
4e3599a5	247	static int cx22702_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
611900c1	248	{
4e3599a5 ST	249	struct cx22702_state *state = fe->demodulator_priv;
4e3599a5 ST	250	dprintk("%s(%d)\n", __func__, enable);
611900c1	251	if (enable)
4e3599a5 ST	252	return cx22702_writereg(state, 0x0D,
4e3599a5 ST	253	cx22702_readreg(state, 0x0D) & 0xfe);
611900c1	254	else
4e3599a5 ST	255	return cx22702_writereg(state, 0x0D,
4e3599a5 ST	256	cx22702_readreg(state, 0x0D) \| 1);
611900c1 ST	257	}
611900c1 ST	258
1da177e4	259	/* Talk to the demod, set the FEC, GUARD, QAM settings etc */
4e3599a5 ST	260	static int cx22702_set_tps(struct dvb_frontend *fe,
4e3599a5 ST	261	struct dvb_frontend_parameters *p)
1da177e4 LT	262	{
1da177e4 LT	263	u8 val;
4e3599a5	264	struct cx22702_state *state = fe->demodulator_priv;
1da177e4	265
dea74869 PB	266	if (fe->ops.tuner_ops.set_params) {
dea74869 PB	267	fe->ops.tuner_ops.set_params(fe, p);
4e3599a5 ST	268	if (fe->ops.i2c_gate_ctrl)
4e3599a5 ST	269	fe->ops.i2c_gate_ctrl(fe, 0);
9990d744	270	}
1da177e4 LT	271
1da177e4 LT	272	/* set inversion */
4e3599a5	273	cx22702_set_inversion(state, p->inversion);
1da177e4 LT	274
1da177e4 LT	275	/* set bandwidth */
4e3599a5	276	switch (p->u.ofdm.bandwidth) {
1da177e4	277	case BANDWIDTH_6_MHZ:
4e3599a5 ST	278	cx22702_writereg(state, 0x0C,
4e3599a5 ST	279	(cx22702_readreg(state, 0x0C) & 0xcf) \| 0x20);
1da177e4 LT	280	break;
1da177e4 LT	281	case BANDWIDTH_7_MHZ:
4e3599a5 ST	282	cx22702_writereg(state, 0x0C,
4e3599a5 ST	283	(cx22702_readreg(state, 0x0C) & 0xcf) \| 0x10);
1da177e4 LT	284	break;
1da177e4 LT	285	case BANDWIDTH_8_MHZ:
4e3599a5 ST	286	cx22702_writereg(state, 0x0C,
4e3599a5 ST	287	cx22702_readreg(state, 0x0C) & 0xcf);
1da177e4 LT	288	break;
1da177e4 LT	289	default:
4e3599a5	290	dprintk("%s: invalid bandwidth\n", __func__);
1da177e4 LT	291	return -EINVAL;
	292	}
	293
4e3599a5	294	p->u.ofdm.code_rate_LP = FEC_AUTO; /* temp hack as manual not working */
1da177e4 LT	295
1da177e4 LT	296	/* use auto configuration? */
4e3599a5 ST	297	if ((p->u.ofdm.hierarchy_information == HIERARCHY_AUTO) \|\|
	298	(p->u.ofdm.constellation == QAM_AUTO) \|\|
	299	(p->u.ofdm.code_rate_HP == FEC_AUTO) \|\|
	300	(p->u.ofdm.code_rate_LP == FEC_AUTO) \|\|
	301	(p->u.ofdm.guard_interval == GUARD_INTERVAL_AUTO) \|\|
	302	(p->u.ofdm.transmission_mode == TRANSMISSION_MODE_AUTO)) {
1da177e4 LT	303
	304	/* TPS Source - use hardware driven values */
	305	cx22702_writereg(state, 0x06, 0x10);
	306	cx22702_writereg(state, 0x07, 0x9);
	307	cx22702_writereg(state, 0x08, 0xC1);
4e3599a5 ST	308	cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B)
	309	& 0xfc);
	310	cx22702_writereg(state, 0x0C,
	311	(cx22702_readreg(state, 0x0C) & 0xBF) \| 0x40);
1da177e4	312	cx22702_writereg(state, 0x00, 0x01); /* Begin aquisition */
4e3599a5	313	dprintk("%s: Autodetecting\n", __func__);
1da177e4 LT	314	return 0;
	315	}
	316
	317	/* manually programmed values */
4e3599a5 ST	318	val = 0;
	319	switch (p->u.ofdm.constellation) {
	320	case QPSK:
	321	val = (val & 0xe7);
	322	break;
	323	case QAM_16:
	324	val = (val & 0xe7) \| 0x08;
	325	break;
	326	case QAM_64:
	327	val = (val & 0xe7) \| 0x10;
	328	break;
	329	default:
	330	dprintk("%s: invalid constellation\n", __func__);
	331	return -EINVAL;
1da177e4	332	}
4e3599a5 ST	333	switch (p->u.ofdm.hierarchy_information) {
	334	case HIERARCHY_NONE:
	335	val = (val & 0xf8);
	336	break;
	337	case HIERARCHY_1:
	338	val = (val & 0xf8) \| 1;
	339	break;
	340	case HIERARCHY_2:
	341	val = (val & 0xf8) \| 2;
	342	break;
	343	case HIERARCHY_4:
	344	val = (val & 0xf8) \| 3;
	345	break;
	346	default:
	347	dprintk("%s: invalid hierarchy\n", __func__);
	348	return -EINVAL;
1da177e4	349	}
4e3599a5 ST	350	cx22702_writereg(state, 0x06, val);
	351
	352	val = 0;
	353	switch (p->u.ofdm.code_rate_HP) {
	354	case FEC_NONE:
	355	case FEC_1_2:
	356	val = (val & 0xc7);
	357	break;
	358	case FEC_2_3:
	359	val = (val & 0xc7) \| 0x08;
	360	break;
	361	case FEC_3_4:
	362	val = (val & 0xc7) \| 0x10;
	363	break;
	364	case FEC_5_6:
	365	val = (val & 0xc7) \| 0x18;
	366	break;
	367	case FEC_7_8:
	368	val = (val & 0xc7) \| 0x20;
	369	break;
	370	default:
	371	dprintk("%s: invalid code_rate_HP\n", __func__);
	372	return -EINVAL;
1da177e4	373	}
4e3599a5 ST	374	switch (p->u.ofdm.code_rate_LP) {
	375	case FEC_NONE:
	376	case FEC_1_2:
	377	val = (val & 0xf8);
	378	break;
	379	case FEC_2_3:
	380	val = (val & 0xf8) \| 1;
	381	break;
	382	case FEC_3_4:
	383	val = (val & 0xf8) \| 2;
	384	break;
	385	case FEC_5_6:
	386	val = (val & 0xf8) \| 3;
	387	break;
	388	case FEC_7_8:
	389	val = (val & 0xf8) \| 4;
	390	break;
	391	default:
	392	dprintk("%s: invalid code_rate_LP\n", __func__);
	393	return -EINVAL;
1da177e4	394	}
4e3599a5 ST	395	cx22702_writereg(state, 0x07, val);
	396
	397	val = 0;
	398	switch (p->u.ofdm.guard_interval) {
	399	case GUARD_INTERVAL_1_32:
	400	val = (val & 0xf3);
	401	break;
	402	case GUARD_INTERVAL_1_16:
	403	val = (val & 0xf3) \| 0x04;
	404	break;
	405	case GUARD_INTERVAL_1_8:
	406	val = (val & 0xf3) \| 0x08;
	407	break;
	408	case GUARD_INTERVAL_1_4:
	409	val = (val & 0xf3) \| 0x0c;
	410	break;
	411	default:
	412	dprintk("%s: invalid guard_interval\n", __func__);
	413	return -EINVAL;
1da177e4	414	}
4e3599a5 ST	415	switch (p->u.ofdm.transmission_mode) {
	416	case TRANSMISSION_MODE_2K:
	417	val = (val & 0xfc);
	418	break;
	419	case TRANSMISSION_MODE_8K:
	420	val = (val & 0xfc) \| 1;
	421	break;
	422	default:
	423	dprintk("%s: invalid transmission_mode\n", __func__);
	424	return -EINVAL;
1da177e4 LT	425	}
1da177e4 LT	426	cx22702_writereg(state, 0x08, val);
4e3599a5 ST	427	cx22702_writereg(state, 0x0B,
	428	(cx22702_readreg(state, 0x0B) & 0xfc) \| 0x02);
	429	cx22702_writereg(state, 0x0C,
	430	(cx22702_readreg(state, 0x0C) & 0xBF) \| 0x40);
1da177e4 LT	431
	432	/* Begin channel aquisition */
	433	cx22702_writereg(state, 0x00, 0x01);
	434
	435	return 0;
	436	}
	437
	438	/* Reset the demod hardware and reset all of the configuration registers
	439	to a default state. */
4e3599a5	440	static int cx22702_init(struct dvb_frontend *fe)
1da177e4 LT	441	{
1da177e4 LT	442	int i;
4e3599a5	443	struct cx22702_state *state = fe->demodulator_priv;
1da177e4	444
4e3599a5	445	cx22702_writereg(state, 0x00, 0x02);
1da177e4 LT	446
	447	msleep(10);
	448
4e3599a5 ST	449	for (i = 0; i < ARRAY_SIZE(init_tab); i += 2)
4e3599a5 ST	450	cx22702_writereg(state, init_tab[i], init_tab[i + 1]);
1da177e4	451
4e3599a5 ST	452	cx22702_writereg(state, 0xf8, (state->config->output_mode << 1)
4e3599a5 ST	453	& 0x02);
1da177e4	454
611900c1	455	cx22702_i2c_gate_ctrl(fe, 0);
1da177e4 LT	456
	457	return 0;
	458	}
	459
4e3599a5	460	static int cx22702_read_status(struct dvb_frontend fe, fe_status_t status)
1da177e4	461	{
4e3599a5	462	struct cx22702_state *state = fe->demodulator_priv;
1da177e4 LT	463	u8 reg0A;
	464	u8 reg23;
	465
	466	*status = 0;
	467
4e3599a5 ST	468	reg0A = cx22702_readreg(state, 0x0A);
4e3599a5 ST	469	reg23 = cx22702_readreg(state, 0x23);
1da177e4	470
4e3599a5 ST	471	dprintk("%s: status demod=0x%02x agc=0x%02x\n"
4e3599a5 ST	472	, __func__, reg0A, reg23);
1da177e4	473
4e3599a5	474	if (reg0A & 0x10) {
1da177e4 LT	475	*status \|= FE_HAS_LOCK;
	476	*status \|= FE_HAS_VITERBI;
	477	*status \|= FE_HAS_SYNC;
	478	}
	479
4e3599a5	480	if (reg0A & 0x20)
1da177e4 LT	481	*status \|= FE_HAS_CARRIER;
1da177e4 LT	482
4e3599a5	483	if (reg23 < 0xf0)
1da177e4 LT	484	*status \|= FE_HAS_SIGNAL;
	485
	486	return 0;
	487	}
	488
4e3599a5	489	static int cx22702_read_ber(struct dvb_frontend fe, u32 ber)
1da177e4	490	{
4e3599a5	491	struct cx22702_state *state = fe->demodulator_priv;
1da177e4	492
4e3599a5	493	if (cx22702_readreg(state, 0xE4) & 0x02) {
1da177e4	494	/* Realtime statistics */
4e3599a5 ST	495	*ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
4e3599a5 ST	496	\| (cx22702_readreg(state, 0xDF) & 0x7F);
1da177e4 LT	497	} else {
1da177e4 LT	498	/* Averagtine statistics */
4e3599a5 ST	499	*ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
4e3599a5 ST	500	\| cx22702_readreg(state, 0xDF);
1da177e4 LT	501	}
	502
	503	return 0;
	504	}
	505
4e3599a5 ST	506	static int cx22702_read_signal_strength(struct dvb_frontend *fe,
4e3599a5 ST	507	u16 *signal_strength)
1da177e4	508	{
4e3599a5	509	struct cx22702_state *state = fe->demodulator_priv;
1da177e4	510
5b9a6f37	511	u16 rs_ber;
4e3599a5	512	rs_ber = cx22702_readreg(state, 0x23);
1e9dadbe	513	*signal_strength = (rs_ber << 8) \| rs_ber;
1da177e4 LT	514
	515	return 0;
	516	}
	517
4e3599a5	518	static int cx22702_read_snr(struct dvb_frontend fe, u16 snr)
1da177e4	519	{
4e3599a5	520	struct cx22702_state *state = fe->demodulator_priv;
1da177e4	521
5b9a6f37	522	u16 rs_ber;
4e3599a5	523	if (cx22702_readreg(state, 0xE4) & 0x02) {
1da177e4	524	/* Realtime statistics */
4e3599a5 ST	525	rs_ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 7
4e3599a5 ST	526	\| (cx22702_readreg(state, 0xDF) & 0x7F);
1da177e4 LT	527	} else {
1da177e4 LT	528	/* Averagine statistics */
4e3599a5 ST	529	rs_ber = (cx22702_readreg(state, 0xDE) & 0x7F) << 8
4e3599a5 ST	530	\| cx22702_readreg(state, 0xDF);
1da177e4 LT	531	}
	532	*snr = ~rs_ber;
	533
	534	return 0;
	535	}
	536
4e3599a5	537	static int cx22702_read_ucblocks(struct dvb_frontend fe, u32 ucblocks)
1da177e4	538	{
4e3599a5	539	struct cx22702_state *state = fe->demodulator_priv;
1da177e4 LT	540
	541	u8 _ucblocks;
	542
	543	/* RS Uncorrectable Packet Count then reset */
4e3599a5	544	_ucblocks = cx22702_readreg(state, 0xE3);
f46dbb05 PB	545	if (state->prevUCBlocks < _ucblocks)
	546	*ucblocks = (_ucblocks - state->prevUCBlocks);
	547	else
	548	*ucblocks = state->prevUCBlocks - _ucblocks;
1da177e4 LT	549	state->prevUCBlocks = _ucblocks;
	550
	551	return 0;
	552	}
	553
4e3599a5 ST	554	static int cx22702_get_frontend(struct dvb_frontend *fe,
4e3599a5 ST	555	struct dvb_frontend_parameters *p)
1da177e4	556	{
4e3599a5	557	struct cx22702_state *state = fe->demodulator_priv;
1da177e4	558
4e3599a5	559	u8 reg0C = cx22702_readreg(state, 0x0C);
1da177e4 LT	560
1da177e4 LT	561	p->inversion = reg0C & 0x1 ? INVERSION_ON : INVERSION_OFF;
4e3599a5	562	return cx22702_get_tps(state, &p->u.ofdm);
1da177e4 LT	563	}
1da177e4 LT	564
4e3599a5 ST	565	static int cx22702_get_tune_settings(struct dvb_frontend *fe,
4e3599a5 ST	566	struct dvb_frontend_tune_settings *tune)
f46dbb05 PB	567	{
	568	tune->min_delay_ms = 1000;
	569	return 0;
	570	}
	571
4e3599a5	572	static void cx22702_release(struct dvb_frontend *fe)
1da177e4	573	{
4e3599a5	574	struct cx22702_state *state = fe->demodulator_priv;
1da177e4 LT	575	kfree(state);
	576	}
	577
	578	static struct dvb_frontend_ops cx22702_ops;
	579
4e3599a5 ST	580	struct dvb_frontend cx22702_attach(const struct cx22702_config config,
4e3599a5 ST	581	struct i2c_adapter *i2c)
1da177e4	582	{
4e3599a5	583	struct cx22702_state *state = NULL;
1da177e4 LT	584
1da177e4 LT	585	/* allocate memory for the internal state */
084e24ac	586	state = kzalloc(sizeof(struct cx22702_state), GFP_KERNEL);
f46dbb05 PB	587	if (state == NULL)
f46dbb05 PB	588	goto error;
1da177e4 LT	589
	590	/* setup the state */
	591	state->config = config;
	592	state->i2c = i2c;
1da177e4 LT	593
1da177e4 LT	594	/* check if the demod is there */
f46dbb05 PB	595	if (cx22702_readreg(state, 0x1f) != 0x3)
f46dbb05 PB	596	goto error;
1da177e4 LT	597
1da177e4 LT	598	/* create dvb_frontend */
4e3599a5 ST	599	memcpy(&state->frontend.ops, &cx22702_ops,
4e3599a5 ST	600	sizeof(struct dvb_frontend_ops));
1da177e4 LT	601	state->frontend.demodulator_priv = state;
	602	return &state->frontend;
	603
	604	error:
	605	kfree(state);
	606	return NULL;
	607	}
4e3599a5	608	EXPORT_SYMBOL(cx22702_attach);
1da177e4 LT	609
	610	static struct dvb_frontend_ops cx22702_ops = {
	611
	612	.info = {
	613	.name = "Conexant CX22702 DVB-T",
	614	.type = FE_OFDM,
	615	.frequency_min = 177000000,
	616	.frequency_max = 858000000,
	617	.frequency_stepsize = 166666,
	618	.caps = FE_CAN_FEC_1_2 \| FE_CAN_FEC_2_3 \| FE_CAN_FEC_3_4 \|
	619	FE_CAN_FEC_5_6 \| FE_CAN_FEC_7_8 \| FE_CAN_FEC_AUTO \|
	620	FE_CAN_QPSK \| FE_CAN_QAM_16 \| FE_CAN_QAM_64 \| FE_CAN_QAM_AUTO \|
	621	FE_CAN_HIERARCHY_AUTO \| FE_CAN_GUARD_INTERVAL_AUTO \|
	622	FE_CAN_TRANSMISSION_MODE_AUTO \| FE_CAN_RECOVER
	623	},
	624
	625	.release = cx22702_release,
	626
	627	.init = cx22702_init,
02444222	628	.i2c_gate_ctrl = cx22702_i2c_gate_ctrl,
1da177e4 LT	629
	630	.set_frontend = cx22702_set_tps,
	631	.get_frontend = cx22702_get_frontend,
f46dbb05	632	.get_tune_settings = cx22702_get_tune_settings,
1da177e4 LT	633
	634	.read_status = cx22702_read_status,
	635	.read_ber = cx22702_read_ber,
	636	.read_signal_strength = cx22702_read_signal_strength,
	637	.read_snr = cx22702_read_snr,
	638	.read_ucblocks = cx22702_read_ucblocks,
	639	};
	640
1da177e4 LT	641	MODULE_DESCRIPTION("Conexant CX22702 DVB-T Demodulator driver");
	642	MODULE_AUTHOR("Steven Toth");
	643	MODULE_LICENSE("GPL");