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Input: ucb1400_ts - fix a misleading function name
[net-next-2.6.git] / drivers / input / touchscreen / ucb1400_ts.c
CommitLineData
f40219bf
NP
1/*
2 * Philips UCB1400 touchscreen driver
3 *
4 * Author: Nicolas Pitre
5 * Created: September 25, 2006
6 * Copyright: MontaVista Software, Inc.
7 *
d9105c2b
MV
8 * Spliting done by: Marek Vasut <marek.vasut@gmail.com>
9 * If something doesnt work and it worked before spliting, e-mail me,
10 * dont bother Nicolas please ;-)
11 *
f40219bf
NP
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 *
16 * This code is heavily based on ucb1x00-*.c copyrighted by Russell King
17 * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has
18 * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request.
19 */
20
21#include <linux/module.h>
f40219bf 22#include <linux/init.h>
f40219bf
NP
23#include <linux/completion.h>
24#include <linux/delay.h>
25#include <linux/input.h>
26#include <linux/device.h>
27#include <linux/interrupt.h>
28#include <linux/suspend.h>
29#include <linux/slab.h>
30#include <linux/kthread.h>
bff19b1d 31#include <linux/freezer.h>
d9105c2b 32#include <linux/ucb1400.h>
f40219bf
NP
33
34static int adcsync;
b5b16c52
CB
35static int ts_delay = 55; /* us */
36static int ts_delay_pressure; /* us */
f40219bf 37
f40219bf 38/* Switch to interrupt mode. */
d9105c2b 39static inline void ucb1400_ts_mode_int(struct snd_ac97 *ac97)
f40219bf 40{
d9105c2b 41 ucb1400_reg_write(ac97, UCB_TS_CR,
f40219bf
NP
42 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
43 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
44 UCB_TS_CR_MODE_INT);
45}
46
47/*
48 * Switch to pressure mode, and read pressure. We don't need to wait
49 * here, since both plates are being driven.
50 */
d9105c2b 51static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400_ts *ucb)
f40219bf 52{
d9105c2b 53 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
f40219bf
NP
54 UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
55 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
56 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
b5b16c52 57 udelay(ts_delay_pressure);
d9105c2b 58 return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync);
f40219bf
NP
59}
60
61/*
62 * Switch to X position mode and measure Y plate. We switch the plate
63 * configuration in pressure mode, then switch to position mode. This
64 * gives a faster response time. Even so, we need to wait about 55us
65 * for things to stabilise.
66 */
d9105c2b 67static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400_ts *ucb)
f40219bf 68{
d9105c2b 69 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
f40219bf
NP
70 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
71 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
d9105c2b 72 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
f40219bf
NP
73 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
74 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
d9105c2b 75 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
f40219bf
NP
76 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
77 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
78
b5b16c52 79 udelay(ts_delay);
f40219bf 80
d9105c2b 81 return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync);
f40219bf
NP
82}
83
84/*
85 * Switch to Y position mode and measure X plate. We switch the plate
86 * configuration in pressure mode, then switch to position mode. This
87 * gives a faster response time. Even so, we need to wait about 55us
88 * for things to stabilise.
89 */
d9105c2b 90static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400_ts *ucb)
f40219bf 91{
d9105c2b 92 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
f40219bf
NP
93 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
94 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
d9105c2b 95 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
f40219bf
NP
96 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
97 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
d9105c2b 98 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
f40219bf
NP
99 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
100 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
101
b5b16c52 102 udelay(ts_delay);
f40219bf 103
d9105c2b 104 return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPX, adcsync);
f40219bf
NP
105}
106
107/*
108 * Switch to X plate resistance mode. Set MX to ground, PX to
109 * supply. Measure current.
110 */
d9105c2b 111static inline unsigned int ucb1400_ts_read_xres(struct ucb1400_ts *ucb)
f40219bf 112{
d9105c2b 113 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
f40219bf
NP
114 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
115 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
d9105c2b 116 return ucb1400_adc_read(ucb->ac97, 0, adcsync);
f40219bf
NP
117}
118
119/*
120 * Switch to Y plate resistance mode. Set MY to ground, PY to
121 * supply. Measure current.
122 */
d9105c2b 123static inline unsigned int ucb1400_ts_read_yres(struct ucb1400_ts *ucb)
f40219bf 124{
d9105c2b 125 ucb1400_reg_write(ucb->ac97, UCB_TS_CR,
f40219bf
NP
126 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
127 UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
d9105c2b 128 return ucb1400_adc_read(ucb->ac97, 0, adcsync);
f40219bf
NP
129}
130
f9c22736 131static inline int ucb1400_ts_pen_up(struct snd_ac97 *ac97)
f40219bf 132{
d9105c2b 133 unsigned short val = ucb1400_reg_read(ac97, UCB_TS_CR);
f9c22736 134
d9105c2b 135 return val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW);
f40219bf
NP
136}
137
d9105c2b 138static inline void ucb1400_ts_irq_enable(struct snd_ac97 *ac97)
f40219bf 139{
d9105c2b
MV
140 ucb1400_reg_write(ac97, UCB_IE_CLEAR, UCB_IE_TSPX);
141 ucb1400_reg_write(ac97, UCB_IE_CLEAR, 0);
142 ucb1400_reg_write(ac97, UCB_IE_FAL, UCB_IE_TSPX);
f40219bf
NP
143}
144
d9105c2b 145static inline void ucb1400_ts_irq_disable(struct snd_ac97 *ac97)
f40219bf 146{
d9105c2b 147 ucb1400_reg_write(ac97, UCB_IE_FAL, 0);
f40219bf
NP
148}
149
150static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y)
151{
152 input_report_abs(idev, ABS_X, x);
153 input_report_abs(idev, ABS_Y, y);
154 input_report_abs(idev, ABS_PRESSURE, pressure);
cd2d64b1 155 input_report_key(idev, BTN_TOUCH, 1);
f40219bf
NP
156 input_sync(idev);
157}
158
159static void ucb1400_ts_event_release(struct input_dev *idev)
160{
161 input_report_abs(idev, ABS_PRESSURE, 0);
cd2d64b1 162 input_report_key(idev, BTN_TOUCH, 0);
f40219bf
NP
163 input_sync(idev);
164}
165
d9105c2b 166static void ucb1400_handle_pending_irq(struct ucb1400_ts *ucb)
f40219bf
NP
167{
168 unsigned int isr;
169
d9105c2b
MV
170 isr = ucb1400_reg_read(ucb->ac97, UCB_IE_STATUS);
171 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, isr);
172 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
f40219bf 173
d9105c2b
MV
174 if (isr & UCB_IE_TSPX) {
175 ucb1400_ts_irq_disable(ucb->ac97);
176 enable_irq(ucb->irq);
177 } else
f40219bf 178 printk(KERN_ERR "ucb1400: unexpected IE_STATUS = %#x\n", isr);
f40219bf
NP
179}
180
181static int ucb1400_ts_thread(void *_ucb)
182{
d9105c2b 183 struct ucb1400_ts *ucb = _ucb;
f40219bf
NP
184 struct task_struct *tsk = current;
185 int valid = 0;
c130bdba 186 struct sched_param param = { .sched_priority = 1 };
f40219bf 187
c130bdba 188 sched_setscheduler(tsk, SCHED_FIFO, &param);
f40219bf 189
83144186 190 set_freezable();
f40219bf
NP
191 while (!kthread_should_stop()) {
192 unsigned int x, y, p;
193 long timeout;
194
195 ucb->ts_restart = 0;
196
197 if (ucb->irq_pending) {
198 ucb->irq_pending = 0;
199 ucb1400_handle_pending_irq(ucb);
200 }
201
d9105c2b 202 ucb1400_adc_enable(ucb->ac97);
f40219bf
NP
203 x = ucb1400_ts_read_xpos(ucb);
204 y = ucb1400_ts_read_ypos(ucb);
205 p = ucb1400_ts_read_pressure(ucb);
d9105c2b 206 ucb1400_adc_disable(ucb->ac97);
f40219bf
NP
207
208 /* Switch back to interrupt mode. */
d9105c2b 209 ucb1400_ts_mode_int(ucb->ac97);
f40219bf
NP
210
211 msleep(10);
212
f9c22736 213 if (ucb1400_ts_pen_up(ucb->ac97)) {
d9105c2b 214 ucb1400_ts_irq_enable(ucb->ac97);
f40219bf
NP
215
216 /*
217 * If we spat out a valid sample set last time,
218 * spit out a "pen off" sample here.
219 */
220 if (valid) {
221 ucb1400_ts_event_release(ucb->ts_idev);
222 valid = 0;
223 }
224
225 timeout = MAX_SCHEDULE_TIMEOUT;
226 } else {
227 valid = 1;
228 ucb1400_ts_evt_add(ucb->ts_idev, p, x, y);
229 timeout = msecs_to_jiffies(10);
230 }
231
e42837bc 232 wait_event_freezable_timeout(ucb->ts_wait,
d9105c2b
MV
233 ucb->irq_pending || ucb->ts_restart ||
234 kthread_should_stop(), timeout);
f40219bf
NP
235 }
236
237 /* Send the "pen off" if we are stopping with the pen still active */
238 if (valid)
239 ucb1400_ts_event_release(ucb->ts_idev);
240
241 ucb->ts_task = NULL;
242 return 0;
243}
244
245/*
246 * A restriction with interrupts exists when using the ucb1400, as
247 * the codec read/write routines may sleep while waiting for codec
248 * access completion and uses semaphores for access control to the
249 * AC97 bus. A complete codec read cycle could take anywhere from
250 * 60 to 100uSec so we *definitely* don't want to spin inside the
251 * interrupt handler waiting for codec access. So, we handle the
252 * interrupt by scheduling a RT kernel thread to run in process
253 * context instead of interrupt context.
254 */
255static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid)
256{
d9105c2b 257 struct ucb1400_ts *ucb = devid;
f40219bf
NP
258
259 if (irqnr == ucb->irq) {
3deb649e 260 disable_irq_nosync(ucb->irq);
f40219bf
NP
261 ucb->irq_pending = 1;
262 wake_up(&ucb->ts_wait);
263 return IRQ_HANDLED;
264 }
265 return IRQ_NONE;
266}
267
268static int ucb1400_ts_open(struct input_dev *idev)
269{
d9105c2b 270 struct ucb1400_ts *ucb = input_get_drvdata(idev);
f40219bf
NP
271 int ret = 0;
272
273 BUG_ON(ucb->ts_task);
274
275 ucb->ts_task = kthread_run(ucb1400_ts_thread, ucb, "UCB1400_ts");
276 if (IS_ERR(ucb->ts_task)) {
277 ret = PTR_ERR(ucb->ts_task);
278 ucb->ts_task = NULL;
279 }
280
281 return ret;
282}
283
284static void ucb1400_ts_close(struct input_dev *idev)
285{
d9105c2b 286 struct ucb1400_ts *ucb = input_get_drvdata(idev);
f40219bf
NP
287
288 if (ucb->ts_task)
289 kthread_stop(ucb->ts_task);
290
d9105c2b
MV
291 ucb1400_ts_irq_disable(ucb->ac97);
292 ucb1400_reg_write(ucb->ac97, UCB_TS_CR, 0);
f40219bf 293}
f40219bf
NP
294
295#ifndef NO_IRQ
296#define NO_IRQ 0
297#endif
298
299/*
300 * Try to probe our interrupt, rather than relying on lots of
301 * hard-coded machine dependencies.
302 */
d9105c2b 303static int ucb1400_ts_detect_irq(struct ucb1400_ts *ucb)
f40219bf
NP
304{
305 unsigned long mask, timeout;
306
307 mask = probe_irq_on();
f40219bf
NP
308
309 /* Enable the ADC interrupt. */
d9105c2b
MV
310 ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, UCB_IE_ADC);
311 ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, UCB_IE_ADC);
312 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff);
313 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
f40219bf
NP
314
315 /* Cause an ADC interrupt. */
d9105c2b
MV
316 ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA);
317 ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START);
f40219bf
NP
318
319 /* Wait for the conversion to complete. */
320 timeout = jiffies + HZ/2;
d9105c2b
MV
321 while (!(ucb1400_reg_read(ucb->ac97, UCB_ADC_DATA) &
322 UCB_ADC_DAT_VALID)) {
f40219bf
NP
323 cpu_relax();
324 if (time_after(jiffies, timeout)) {
325 printk(KERN_ERR "ucb1400: timed out in IRQ probe\n");
326 probe_irq_off(mask);
327 return -ENODEV;
328 }
329 }
d9105c2b 330 ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, 0);
f40219bf
NP
331
332 /* Disable and clear interrupt. */
d9105c2b
MV
333 ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, 0);
334 ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, 0);
335 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff);
336 ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0);
f40219bf
NP
337
338 /* Read triggered interrupt. */
339 ucb->irq = probe_irq_off(mask);
340 if (ucb->irq < 0 || ucb->irq == NO_IRQ)
341 return -ENODEV;
342
343 return 0;
344}
345
d9105c2b 346static int ucb1400_ts_probe(struct platform_device *dev)
f40219bf 347{
d9105c2b
MV
348 int error, x_res, y_res;
349 struct ucb1400_ts *ucb = dev->dev.platform_data;
f40219bf 350
d9105c2b
MV
351 ucb->ts_idev = input_allocate_device();
352 if (!ucb->ts_idev) {
f40219bf 353 error = -ENOMEM;
d9105c2b 354 goto err;
f40219bf
NP
355 }
356
d9105c2b 357 error = ucb1400_ts_detect_irq(ucb);
f40219bf
NP
358 if (error) {
359 printk(KERN_ERR "UCB1400: IRQ probe failed\n");
360 goto err_free_devs;
361 }
362
d9105c2b
MV
363 init_waitqueue_head(&ucb->ts_wait);
364
f40219bf
NP
365 error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING,
366 "UCB1400", ucb);
367 if (error) {
368 printk(KERN_ERR "ucb1400: unable to grab irq%d: %d\n",
369 ucb->irq, error);
370 goto err_free_devs;
371 }
372 printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq);
373
d9105c2b 374 input_set_drvdata(ucb->ts_idev, ucb);
40b9b0b8 375
d9105c2b
MV
376 ucb->ts_idev->dev.parent = &dev->dev;
377 ucb->ts_idev->name = "UCB1400 touchscreen interface";
378 ucb->ts_idev->id.vendor = ucb1400_reg_read(ucb->ac97,
379 AC97_VENDOR_ID1);
380 ucb->ts_idev->id.product = ucb->id;
381 ucb->ts_idev->open = ucb1400_ts_open;
382 ucb->ts_idev->close = ucb1400_ts_close;
cd2d64b1
MR
383 ucb->ts_idev->evbit[0] = BIT_MASK(EV_ABS) | BIT_MASK(EV_KEY);
384 ucb->ts_idev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
f40219bf 385
d9105c2b 386 ucb1400_adc_enable(ucb->ac97);
f40219bf
NP
387 x_res = ucb1400_ts_read_xres(ucb);
388 y_res = ucb1400_ts_read_yres(ucb);
d9105c2b 389 ucb1400_adc_disable(ucb->ac97);
f40219bf
NP
390 printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res);
391
d9105c2b
MV
392 input_set_abs_params(ucb->ts_idev, ABS_X, 0, x_res, 0, 0);
393 input_set_abs_params(ucb->ts_idev, ABS_Y, 0, y_res, 0, 0);
394 input_set_abs_params(ucb->ts_idev, ABS_PRESSURE, 0, 0, 0, 0);
f40219bf 395
d9105c2b 396 error = input_register_device(ucb->ts_idev);
f40219bf
NP
397 if (error)
398 goto err_free_irq;
399
f40219bf
NP
400 return 0;
401
d9105c2b 402err_free_irq:
f40219bf 403 free_irq(ucb->irq, ucb);
d9105c2b
MV
404err_free_devs:
405 input_free_device(ucb->ts_idev);
406err:
f40219bf 407 return error;
d9105c2b 408
f40219bf
NP
409}
410
d9105c2b 411static int ucb1400_ts_remove(struct platform_device *dev)
f40219bf 412{
d9105c2b 413 struct ucb1400_ts *ucb = dev->dev.platform_data;
f40219bf
NP
414
415 free_irq(ucb->irq, ucb);
416 input_unregister_device(ucb->ts_idev);
f40219bf
NP
417 return 0;
418}
419
d9105c2b
MV
420#ifdef CONFIG_PM
421static int ucb1400_ts_resume(struct platform_device *dev)
422{
346a850e 423 struct ucb1400_ts *ucb = dev->dev.platform_data;
d9105c2b
MV
424
425 if (ucb->ts_task) {
426 /*
427 * Restart the TS thread to ensure the
428 * TS interrupt mode is set up again
429 * after sleep.
430 */
431 ucb->ts_restart = 1;
432 wake_up(&ucb->ts_wait);
433 }
434 return 0;
435}
436#else
437#define ucb1400_ts_resume NULL
438#endif
439
440static struct platform_driver ucb1400_ts_driver = {
441 .probe = ucb1400_ts_probe,
442 .remove = ucb1400_ts_remove,
443 .resume = ucb1400_ts_resume,
444 .driver = {
445 .name = "ucb1400_ts",
446 },
f40219bf
NP
447};
448
449static int __init ucb1400_ts_init(void)
450{
d9105c2b 451 return platform_driver_register(&ucb1400_ts_driver);
f40219bf
NP
452}
453
454static void __exit ucb1400_ts_exit(void)
455{
d9105c2b 456 platform_driver_unregister(&ucb1400_ts_driver);
f40219bf
NP
457}
458
b5b16c52
CB
459module_param(adcsync, bool, 0444);
460MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin.");
461
462module_param(ts_delay, int, 0444);
d9105c2b
MV
463MODULE_PARM_DESC(ts_delay, "Delay between panel setup and"
464 " position read. Default = 55us.");
b5b16c52
CB
465
466module_param(ts_delay_pressure, int, 0444);
467MODULE_PARM_DESC(ts_delay_pressure,
d9105c2b
MV
468 "delay between panel setup and pressure read."
469 " Default = 0us.");
f40219bf
NP
470
471module_init(ucb1400_ts_init);
472module_exit(ucb1400_ts_exit);
473
474MODULE_DESCRIPTION("Philips UCB1400 touchscreen driver");
475MODULE_LICENSE("GPL");