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IB/ipath: Fix SLID generation for RC/UC QPs when LMC > 0
[net-next-2.6.git] / drivers / infiniband / hw / ipath / ipath_rc.c
CommitLineData
97f9efbc 1/*
e7eacd36 2 * Copyright (c) 2006, 2007, 2008 QLogic Corporation. All rights reserved.
97f9efbc
BS
3 * Copyright (c) 2005, 2006 PathScale, Inc. All rights reserved.
4 *
5 * This software is available to you under a choice of one of two
6 * licenses. You may choose to be licensed under the terms of the GNU
7 * General Public License (GPL) Version 2, available from the file
8 * COPYING in the main directory of this source tree, or the
9 * OpenIB.org BSD license below:
10 *
11 * Redistribution and use in source and binary forms, with or
12 * without modification, are permitted provided that the following
13 * conditions are met:
14 *
15 * - Redistributions of source code must retain the above
16 * copyright notice, this list of conditions and the following
17 * disclaimer.
18 *
19 * - Redistributions in binary form must reproduce the above
20 * copyright notice, this list of conditions and the following
21 * disclaimer in the documentation and/or other materials
22 * provided with the distribution.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
25 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
26 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
27 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
28 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
29 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
30 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 * SOFTWARE.
32 */
33
d98b1937
RC
34#include <linux/io.h>
35
97f9efbc 36#include "ipath_verbs.h"
34b2aafe 37#include "ipath_kernel.h"
97f9efbc
BS
38
39/* cut down ridiculously long IB macro names */
40#define OP(x) IB_OPCODE_RC_##x
41
3859e39d
RC
42static u32 restart_sge(struct ipath_sge_state *ss, struct ipath_swqe *wqe,
43 u32 psn, u32 pmtu)
44{
45 u32 len;
46
47 len = ((psn - wqe->psn) & IPATH_PSN_MASK) * pmtu;
48 ss->sge = wqe->sg_list[0];
49 ss->sg_list = wqe->sg_list + 1;
50 ss->num_sge = wqe->wr.num_sge;
51 ipath_skip_sge(ss, len);
52 return wqe->length - len;
53}
54
97f9efbc
BS
55/**
56 * ipath_init_restart- initialize the qp->s_sge after a restart
57 * @qp: the QP who's SGE we're restarting
58 * @wqe: the work queue to initialize the QP's SGE from
59 *
12eef41f 60 * The QP s_lock should be held and interrupts disabled.
97f9efbc
BS
61 */
62static void ipath_init_restart(struct ipath_qp *qp, struct ipath_swqe *wqe)
63{
64 struct ipath_ibdev *dev;
97f9efbc 65
3859e39d
RC
66 qp->s_len = restart_sge(&qp->s_sge, wqe, qp->s_psn,
67 ib_mtu_enum_to_int(qp->path_mtu));
97f9efbc
BS
68 dev = to_idev(qp->ibqp.device);
69 spin_lock(&dev->pending_lock);
94b8d9f9 70 if (list_empty(&qp->timerwait))
97f9efbc
BS
71 list_add_tail(&qp->timerwait,
72 &dev->pending[dev->pending_index]);
73 spin_unlock(&dev->pending_lock);
74}
75
76/**
77 * ipath_make_rc_ack - construct a response packet (ACK, NAK, or RDMA read)
78 * @qp: a pointer to the QP
79 * @ohdr: a pointer to the IB header being constructed
80 * @pmtu: the path MTU
81 *
3859e39d
RC
82 * Return 1 if constructed; otherwise, return 0.
83 * Note that we are in the responder's side of the QP context.
97f9efbc
BS
84 * Note the QP s_lock must be held.
85 */
4ee97180
RC
86static int ipath_make_rc_ack(struct ipath_ibdev *dev, struct ipath_qp *qp,
87 struct ipath_other_headers *ohdr, u32 pmtu)
97f9efbc 88{
3859e39d 89 struct ipath_ack_entry *e;
97f9efbc
BS
90 u32 hwords;
91 u32 len;
92 u32 bth0;
3859e39d 93 u32 bth2;
97f9efbc 94
e509be89
RC
95 /* Don't send an ACK if we aren't supposed to. */
96 if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK))
97 goto bail;
98
97f9efbc
BS
99 /* header size in 32-bit words LRH+BTH = (8+12)/4. */
100 hwords = 5;
101
97f9efbc 102 switch (qp->s_ack_state) {
3859e39d
RC
103 case OP(RDMA_READ_RESPONSE_LAST):
104 case OP(RDMA_READ_RESPONSE_ONLY):
105 case OP(ATOMIC_ACKNOWLEDGE):
154257f3
RC
106 /*
107 * We can increment the tail pointer now that the last
108 * response has been sent instead of only being
109 * constructed.
110 */
111 if (++qp->s_tail_ack_queue > IPATH_MAX_RDMA_ATOMIC)
112 qp->s_tail_ack_queue = 0;
3859e39d 113 /* FALLTHROUGH */
154257f3 114 case OP(SEND_ONLY):
3859e39d
RC
115 case OP(ACKNOWLEDGE):
116 /* Check for no next entry in the queue. */
117 if (qp->r_head_ack_queue == qp->s_tail_ack_queue) {
118 if (qp->s_flags & IPATH_S_ACK_PENDING)
119 goto normal;
154257f3 120 qp->s_ack_state = OP(ACKNOWLEDGE);
3859e39d
RC
121 goto bail;
122 }
123
124 e = &qp->s_ack_queue[qp->s_tail_ack_queue];
125 if (e->opcode == OP(RDMA_READ_REQUEST)) {
126 /* Copy SGE state in case we need to resend */
127 qp->s_ack_rdma_sge = e->rdma_sge;
128 qp->s_cur_sge = &qp->s_ack_rdma_sge;
129 len = e->rdma_sge.sge.sge_length;
130 if (len > pmtu) {
131 len = pmtu;
132 qp->s_ack_state = OP(RDMA_READ_RESPONSE_FIRST);
d781b129 133 } else {
3859e39d 134 qp->s_ack_state = OP(RDMA_READ_RESPONSE_ONLY);
d781b129
RC
135 e->sent = 1;
136 }
3859e39d
RC
137 ohdr->u.aeth = ipath_compute_aeth(qp);
138 hwords++;
139 qp->s_ack_rdma_psn = e->psn;
140 bth2 = qp->s_ack_rdma_psn++ & IPATH_PSN_MASK;
141 } else {
142 /* COMPARE_SWAP or FETCH_ADD */
143 qp->s_cur_sge = NULL;
144 len = 0;
145 qp->s_ack_state = OP(ATOMIC_ACKNOWLEDGE);
146 ohdr->u.at.aeth = ipath_compute_aeth(qp);
147 ohdr->u.at.atomic_ack_eth[0] =
148 cpu_to_be32(e->atomic_data >> 32);
149 ohdr->u.at.atomic_ack_eth[1] =
150 cpu_to_be32(e->atomic_data);
151 hwords += sizeof(ohdr->u.at) / sizeof(u32);
152 bth2 = e->psn;
d781b129 153 e->sent = 1;
3859e39d 154 }
97f9efbc 155 bth0 = qp->s_ack_state << 24;
97f9efbc
BS
156 break;
157
158 case OP(RDMA_READ_RESPONSE_FIRST):
159 qp->s_ack_state = OP(RDMA_READ_RESPONSE_MIDDLE);
160 /* FALLTHROUGH */
161 case OP(RDMA_READ_RESPONSE_MIDDLE):
3859e39d 162 len = qp->s_ack_rdma_sge.sge.sge_length;
97f9efbc
BS
163 if (len > pmtu)
164 len = pmtu;
165 else {
166 ohdr->u.aeth = ipath_compute_aeth(qp);
167 hwords++;
168 qp->s_ack_state = OP(RDMA_READ_RESPONSE_LAST);
d781b129 169 qp->s_ack_queue[qp->s_tail_ack_queue].sent = 1;
97f9efbc 170 }
97f9efbc 171 bth0 = qp->s_ack_state << 24;
3859e39d 172 bth2 = qp->s_ack_rdma_psn++ & IPATH_PSN_MASK;
97f9efbc
BS
173 break;
174
175 default:
3859e39d 176 normal:
12eef41f 177 /*
3859e39d
RC
178 * Send a regular ACK.
179 * Set the s_ack_state so we wait until after sending
180 * the ACK before setting s_ack_state to ACKNOWLEDGE
181 * (see above).
12eef41f 182 */
154257f3 183 qp->s_ack_state = OP(SEND_ONLY);
3859e39d
RC
184 qp->s_flags &= ~IPATH_S_ACK_PENDING;
185 qp->s_cur_sge = NULL;
12eef41f 186 if (qp->s_nak_state)
3859e39d
RC
187 ohdr->u.aeth =
188 cpu_to_be32((qp->r_msn & IPATH_MSN_MASK) |
189 (qp->s_nak_state <<
190 IPATH_AETH_CREDIT_SHIFT));
12eef41f
BS
191 else
192 ohdr->u.aeth = ipath_compute_aeth(qp);
97f9efbc 193 hwords++;
3859e39d
RC
194 len = 0;
195 bth0 = OP(ACKNOWLEDGE) << 24;
196 bth2 = qp->s_ack_psn & IPATH_PSN_MASK;
97f9efbc
BS
197 }
198 qp->s_hdrwords = hwords;
97f9efbc 199 qp->s_cur_size = len;
4ee97180 200 ipath_make_ruc_header(dev, qp, ohdr, bth0, bth2);
3859e39d 201 return 1;
97f9efbc 202
12eef41f 203bail:
3859e39d 204 return 0;
97f9efbc
BS
205}
206
207/**
208 * ipath_make_rc_req - construct a request packet (SEND, RDMA r/w, ATOMIC)
209 * @qp: a pointer to the QP
97f9efbc
BS
210 *
211 * Return 1 if constructed; otherwise, return 0.
97f9efbc 212 */
4ee97180 213int ipath_make_rc_req(struct ipath_qp *qp)
97f9efbc
BS
214{
215 struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
4ee97180 216 struct ipath_other_headers *ohdr;
97f9efbc
BS
217 struct ipath_sge_state *ss;
218 struct ipath_swqe *wqe;
219 u32 hwords;
220 u32 len;
221 u32 bth0;
222 u32 bth2;
4ee97180 223 u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
97f9efbc 224 char newreq;
4ee97180
RC
225 unsigned long flags;
226 int ret = 0;
227
228 ohdr = &qp->s_hdr.u.oth;
229 if (qp->remote_ah_attr.ah_flags & IB_AH_GRH)
230 ohdr = &qp->s_hdr.u.l.oth;
231
232 /*
233 * The lock is needed to synchronize between the sending tasklet,
234 * the receive interrupt handler, and timeout resends.
235 */
236 spin_lock_irqsave(&qp->s_lock, flags);
97f9efbc 237
3859e39d
RC
238 /* Sending responses has higher priority over sending requests. */
239 if ((qp->r_head_ack_queue != qp->s_tail_ack_queue ||
240 (qp->s_flags & IPATH_S_ACK_PENDING) ||
154257f3 241 qp->s_ack_state != OP(ACKNOWLEDGE)) &&
4ee97180 242 ipath_make_rc_ack(dev, qp, ohdr, pmtu))
3859e39d
RC
243 goto done;
244
e509be89
RC
245 if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_SEND_OK)) {
246 if (!(ib_ipath_state_ops[qp->state] & IPATH_FLUSH_SEND))
247 goto bail;
248 /* We are in the error state, flush the work request. */
249 if (qp->s_last == qp->s_head)
250 goto bail;
251 /* If DMAs are in progress, we can't flush immediately. */
252 if (atomic_read(&qp->s_dma_busy)) {
253 qp->s_flags |= IPATH_S_WAIT_DMA;
254 goto bail;
255 }
256 wqe = get_swqe_ptr(qp, qp->s_last);
257 ipath_send_complete(qp, wqe, IB_WC_WR_FLUSH_ERR);
258 goto done;
259 }
97f9efbc 260
e509be89
RC
261 /* Leave BUSY set until RNR timeout. */
262 if (qp->s_rnr_timeout) {
263 qp->s_flags |= IPATH_S_WAITING;
3859e39d 264 goto bail;
6022943e
BS
265 }
266
97f9efbc
BS
267 /* header size in 32-bit words LRH+BTH = (8+12)/4. */
268 hwords = 5;
1dd6a1be 269 bth0 = 1 << 22; /* Set M bit */
97f9efbc
BS
270
271 /* Send a request. */
272 wqe = get_swqe_ptr(qp, qp->s_cur);
273 switch (qp->s_state) {
274 default:
e509be89
RC
275 if (!(ib_ipath_state_ops[qp->state] &
276 IPATH_PROCESS_NEXT_SEND_OK))
277 goto bail;
97f9efbc
BS
278 /*
279 * Resend an old request or start a new one.
280 *
281 * We keep track of the current SWQE so that
282 * we don't reset the "furthest progress" state
283 * if we need to back up.
284 */
285 newreq = 0;
286 if (qp->s_cur == qp->s_tail) {
287 /* Check if send work queue is empty. */
288 if (qp->s_tail == qp->s_head)
3859e39d
RC
289 goto bail;
290 /*
291 * If a fence is requested, wait for previous
292 * RDMA read and atomic operations to finish.
293 */
294 if ((wqe->wr.send_flags & IB_SEND_FENCE) &&
295 qp->s_num_rd_atomic) {
296 qp->s_flags |= IPATH_S_FENCE_PENDING;
297 goto bail;
298 }
6022943e 299 wqe->psn = qp->s_next_psn;
97f9efbc
BS
300 newreq = 1;
301 }
302 /*
303 * Note that we have to be careful not to modify the
304 * original work request since we may need to resend
305 * it.
306 */
13b18c86 307 len = wqe->length;
97f9efbc
BS
308 ss = &qp->s_sge;
309 bth2 = 0;
310 switch (wqe->wr.opcode) {
311 case IB_WR_SEND:
312 case IB_WR_SEND_WITH_IMM:
313 /* If no credit, return. */
314 if (qp->s_lsn != (u32) -1 &&
e509be89
RC
315 ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0) {
316 qp->s_flags |= IPATH_S_WAIT_SSN_CREDIT;
3859e39d 317 goto bail;
e509be89 318 }
97f9efbc
BS
319 wqe->lpsn = wqe->psn;
320 if (len > pmtu) {
321 wqe->lpsn += (len - 1) / pmtu;
322 qp->s_state = OP(SEND_FIRST);
323 len = pmtu;
324 break;
325 }
326 if (wqe->wr.opcode == IB_WR_SEND)
327 qp->s_state = OP(SEND_ONLY);
328 else {
329 qp->s_state = OP(SEND_ONLY_WITH_IMMEDIATE);
330 /* Immediate data comes after the BTH */
0f39cf3d 331 ohdr->u.imm_data = wqe->wr.ex.imm_data;
97f9efbc
BS
332 hwords += 1;
333 }
334 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
335 bth0 |= 1 << 23;
336 bth2 = 1 << 31; /* Request ACK. */
337 if (++qp->s_cur == qp->s_size)
338 qp->s_cur = 0;
339 break;
340
341 case IB_WR_RDMA_WRITE:
6700efdf 342 if (newreq && qp->s_lsn != (u32) -1)
97f9efbc
BS
343 qp->s_lsn++;
344 /* FALLTHROUGH */
345 case IB_WR_RDMA_WRITE_WITH_IMM:
346 /* If no credit, return. */
347 if (qp->s_lsn != (u32) -1 &&
e509be89
RC
348 ipath_cmp24(wqe->ssn, qp->s_lsn + 1) > 0) {
349 qp->s_flags |= IPATH_S_WAIT_SSN_CREDIT;
3859e39d 350 goto bail;
e509be89 351 }
97f9efbc
BS
352 ohdr->u.rc.reth.vaddr =
353 cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
354 ohdr->u.rc.reth.rkey =
355 cpu_to_be32(wqe->wr.wr.rdma.rkey);
356 ohdr->u.rc.reth.length = cpu_to_be32(len);
3859e39d 357 hwords += sizeof(struct ib_reth) / sizeof(u32);
97f9efbc
BS
358 wqe->lpsn = wqe->psn;
359 if (len > pmtu) {
360 wqe->lpsn += (len - 1) / pmtu;
361 qp->s_state = OP(RDMA_WRITE_FIRST);
362 len = pmtu;
363 break;
364 }
365 if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
366 qp->s_state = OP(RDMA_WRITE_ONLY);
367 else {
368 qp->s_state =
369 OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE);
6700efdf 370 /* Immediate data comes after RETH */
0f39cf3d 371 ohdr->u.rc.imm_data = wqe->wr.ex.imm_data;
97f9efbc
BS
372 hwords += 1;
373 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
374 bth0 |= 1 << 23;
375 }
376 bth2 = 1 << 31; /* Request ACK. */
377 if (++qp->s_cur == qp->s_size)
378 qp->s_cur = 0;
379 break;
380
381 case IB_WR_RDMA_READ:
3859e39d
RC
382 /*
383 * Don't allow more operations to be started
384 * than the QP limits allow.
385 */
97f9efbc 386 if (newreq) {
3859e39d
RC
387 if (qp->s_num_rd_atomic >=
388 qp->s_max_rd_atomic) {
389 qp->s_flags |= IPATH_S_RDMAR_PENDING;
390 goto bail;
391 }
392 qp->s_num_rd_atomic++;
6700efdf
BS
393 if (qp->s_lsn != (u32) -1)
394 qp->s_lsn++;
97f9efbc
BS
395 /*
396 * Adjust s_next_psn to count the
397 * expected number of responses.
398 */
399 if (len > pmtu)
400 qp->s_next_psn += (len - 1) / pmtu;
401 wqe->lpsn = qp->s_next_psn++;
402 }
3859e39d
RC
403 ohdr->u.rc.reth.vaddr =
404 cpu_to_be64(wqe->wr.wr.rdma.remote_addr);
405 ohdr->u.rc.reth.rkey =
406 cpu_to_be32(wqe->wr.wr.rdma.rkey);
407 ohdr->u.rc.reth.length = cpu_to_be32(len);
408 qp->s_state = OP(RDMA_READ_REQUEST);
409 hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
97f9efbc
BS
410 ss = NULL;
411 len = 0;
412 if (++qp->s_cur == qp->s_size)
413 qp->s_cur = 0;
414 break;
415
416 case IB_WR_ATOMIC_CMP_AND_SWP:
417 case IB_WR_ATOMIC_FETCH_AND_ADD:
3859e39d
RC
418 /*
419 * Don't allow more operations to be started
420 * than the QP limits allow.
421 */
97f9efbc 422 if (newreq) {
3859e39d
RC
423 if (qp->s_num_rd_atomic >=
424 qp->s_max_rd_atomic) {
425 qp->s_flags |= IPATH_S_RDMAR_PENDING;
426 goto bail;
427 }
428 qp->s_num_rd_atomic++;
6700efdf
BS
429 if (qp->s_lsn != (u32) -1)
430 qp->s_lsn++;
97f9efbc
BS
431 wqe->lpsn = wqe->psn;
432 }
3859e39d
RC
433 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP) {
434 qp->s_state = OP(COMPARE_SWAP);
435 ohdr->u.atomic_eth.swap_data = cpu_to_be64(
436 wqe->wr.wr.atomic.swap);
437 ohdr->u.atomic_eth.compare_data = cpu_to_be64(
438 wqe->wr.wr.atomic.compare_add);
439 } else {
440 qp->s_state = OP(FETCH_ADD);
441 ohdr->u.atomic_eth.swap_data = cpu_to_be64(
442 wqe->wr.wr.atomic.compare_add);
443 ohdr->u.atomic_eth.compare_data = 0;
444 }
445 ohdr->u.atomic_eth.vaddr[0] = cpu_to_be32(
446 wqe->wr.wr.atomic.remote_addr >> 32);
447 ohdr->u.atomic_eth.vaddr[1] = cpu_to_be32(
448 wqe->wr.wr.atomic.remote_addr);
449 ohdr->u.atomic_eth.rkey = cpu_to_be32(
450 wqe->wr.wr.atomic.rkey);
451 hwords += sizeof(struct ib_atomic_eth) / sizeof(u32);
97f9efbc
BS
452 ss = NULL;
453 len = 0;
3859e39d
RC
454 if (++qp->s_cur == qp->s_size)
455 qp->s_cur = 0;
97f9efbc
BS
456 break;
457
458 default:
3859e39d 459 goto bail;
97f9efbc 460 }
13b18c86
RC
461 qp->s_sge.sge = wqe->sg_list[0];
462 qp->s_sge.sg_list = wqe->sg_list + 1;
463 qp->s_sge.num_sge = wqe->wr.num_sge;
464 qp->s_len = wqe->length;
97f9efbc
BS
465 if (newreq) {
466 qp->s_tail++;
467 if (qp->s_tail >= qp->s_size)
468 qp->s_tail = 0;
469 }
13b18c86
RC
470 bth2 |= qp->s_psn & IPATH_PSN_MASK;
471 if (wqe->wr.opcode == IB_WR_RDMA_READ)
472 qp->s_psn = wqe->lpsn + 1;
473 else {
474 qp->s_psn++;
6f5c4074 475 if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
13b18c86
RC
476 qp->s_next_psn = qp->s_psn;
477 }
12eef41f
BS
478 /*
479 * Put the QP on the pending list so lost ACKs will cause
480 * a retry. More than one request can be pending so the
481 * QP may already be on the dev->pending list.
482 */
97f9efbc 483 spin_lock(&dev->pending_lock);
94b8d9f9 484 if (list_empty(&qp->timerwait))
97f9efbc
BS
485 list_add_tail(&qp->timerwait,
486 &dev->pending[dev->pending_index]);
487 spin_unlock(&dev->pending_lock);
488 break;
489
490 case OP(RDMA_READ_RESPONSE_FIRST):
491 /*
12eef41f
BS
492 * This case can only happen if a send is restarted.
493 * See ipath_restart_rc().
97f9efbc
BS
494 */
495 ipath_init_restart(qp, wqe);
496 /* FALLTHROUGH */
497 case OP(SEND_FIRST):
498 qp->s_state = OP(SEND_MIDDLE);
499 /* FALLTHROUGH */
500 case OP(SEND_MIDDLE):
27b678dd 501 bth2 = qp->s_psn++ & IPATH_PSN_MASK;
6f5c4074 502 if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
97f9efbc
BS
503 qp->s_next_psn = qp->s_psn;
504 ss = &qp->s_sge;
505 len = qp->s_len;
506 if (len > pmtu) {
97f9efbc
BS
507 len = pmtu;
508 break;
509 }
510 if (wqe->wr.opcode == IB_WR_SEND)
511 qp->s_state = OP(SEND_LAST);
512 else {
513 qp->s_state = OP(SEND_LAST_WITH_IMMEDIATE);
514 /* Immediate data comes after the BTH */
0f39cf3d 515 ohdr->u.imm_data = wqe->wr.ex.imm_data;
97f9efbc
BS
516 hwords += 1;
517 }
518 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
519 bth0 |= 1 << 23;
520 bth2 |= 1 << 31; /* Request ACK. */
521 qp->s_cur++;
522 if (qp->s_cur >= qp->s_size)
523 qp->s_cur = 0;
524 break;
525
526 case OP(RDMA_READ_RESPONSE_LAST):
527 /*
528 * This case can only happen if a RDMA write is restarted.
529 * See ipath_restart_rc().
530 */
531 ipath_init_restart(qp, wqe);
532 /* FALLTHROUGH */
533 case OP(RDMA_WRITE_FIRST):
534 qp->s_state = OP(RDMA_WRITE_MIDDLE);
535 /* FALLTHROUGH */
536 case OP(RDMA_WRITE_MIDDLE):
27b678dd 537 bth2 = qp->s_psn++ & IPATH_PSN_MASK;
6f5c4074 538 if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
97f9efbc
BS
539 qp->s_next_psn = qp->s_psn;
540 ss = &qp->s_sge;
541 len = qp->s_len;
542 if (len > pmtu) {
97f9efbc
BS
543 len = pmtu;
544 break;
545 }
546 if (wqe->wr.opcode == IB_WR_RDMA_WRITE)
547 qp->s_state = OP(RDMA_WRITE_LAST);
548 else {
549 qp->s_state = OP(RDMA_WRITE_LAST_WITH_IMMEDIATE);
550 /* Immediate data comes after the BTH */
0f39cf3d 551 ohdr->u.imm_data = wqe->wr.ex.imm_data;
97f9efbc
BS
552 hwords += 1;
553 if (wqe->wr.send_flags & IB_SEND_SOLICITED)
554 bth0 |= 1 << 23;
555 }
556 bth2 |= 1 << 31; /* Request ACK. */
557 qp->s_cur++;
558 if (qp->s_cur >= qp->s_size)
559 qp->s_cur = 0;
560 break;
561
562 case OP(RDMA_READ_RESPONSE_MIDDLE):
563 /*
564 * This case can only happen if a RDMA read is restarted.
565 * See ipath_restart_rc().
566 */
567 ipath_init_restart(qp, wqe);
27b678dd 568 len = ((qp->s_psn - wqe->psn) & IPATH_PSN_MASK) * pmtu;
97f9efbc
BS
569 ohdr->u.rc.reth.vaddr =
570 cpu_to_be64(wqe->wr.wr.rdma.remote_addr + len);
571 ohdr->u.rc.reth.rkey =
572 cpu_to_be32(wqe->wr.wr.rdma.rkey);
573 ohdr->u.rc.reth.length = cpu_to_be32(qp->s_len);
574 qp->s_state = OP(RDMA_READ_REQUEST);
3859e39d 575 hwords += sizeof(ohdr->u.rc.reth) / sizeof(u32);
27b678dd 576 bth2 = qp->s_psn++ & IPATH_PSN_MASK;
6f5c4074 577 if (ipath_cmp24(qp->s_psn, qp->s_next_psn) > 0)
97f9efbc
BS
578 qp->s_next_psn = qp->s_psn;
579 ss = NULL;
580 len = 0;
581 qp->s_cur++;
582 if (qp->s_cur == qp->s_size)
583 qp->s_cur = 0;
584 break;
97f9efbc 585 }
6022943e
BS
586 if (ipath_cmp24(qp->s_psn, qp->s_last_psn + IPATH_PSN_CREDIT - 1) >= 0)
587 bth2 |= 1 << 31; /* Request ACK. */
97f9efbc
BS
588 qp->s_len -= len;
589 qp->s_hdrwords = hwords;
590 qp->s_cur_sge = ss;
591 qp->s_cur_size = len;
4ee97180 592 ipath_make_ruc_header(dev, qp, ohdr, bth0 | (qp->s_state << 24), bth2);
3859e39d 593done:
4ee97180 594 ret = 1;
e509be89
RC
595 goto unlock;
596
3859e39d 597bail:
e509be89
RC
598 qp->s_flags &= ~IPATH_S_BUSY;
599unlock:
4ee97180
RC
600 spin_unlock_irqrestore(&qp->s_lock, flags);
601 return ret;
97f9efbc
BS
602}
603
97f9efbc 604/**
ddd4bb22
BS
605 * send_rc_ack - Construct an ACK packet and send it
606 * @qp: a pointer to the QP
97f9efbc 607 *
ddd4bb22
BS
608 * This is called from ipath_rc_rcv() and only uses the receive
609 * side QP state.
3859e39d
RC
610 * Note that RDMA reads and atomics are handled in the
611 * send side QP state and tasklet.
97f9efbc 612 */
97f9efbc
BS
613static void send_rc_ack(struct ipath_qp *qp)
614{
615 struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
d98b1937 616 struct ipath_devdata *dd;
97f9efbc
BS
617 u16 lrh0;
618 u32 bth0;
ddd4bb22 619 u32 hwords;
d98b1937 620 u32 __iomem *piobuf;
ddd4bb22 621 struct ipath_ib_header hdr;
97f9efbc 622 struct ipath_other_headers *ohdr;
35ff032e 623 unsigned long flags;
97f9efbc 624
d98b1937
RC
625 spin_lock_irqsave(&qp->s_lock, flags);
626
3859e39d 627 /* Don't send ACK or NAK if a RDMA read or atomic is pending. */
154257f3
RC
628 if (qp->r_head_ack_queue != qp->s_tail_ack_queue ||
629 (qp->s_flags & IPATH_S_ACK_PENDING) ||
630 qp->s_ack_state != OP(ACKNOWLEDGE))
3859e39d
RC
631 goto queue_ack;
632
d98b1937
RC
633 spin_unlock_irqrestore(&qp->s_lock, flags);
634
e509be89 635 /* Don't try to send ACKs if the link isn't ACTIVE */
d98b1937 636 dd = dev->dd;
e509be89
RC
637 if (!(dd->ipath_flags & IPATH_LINKACTIVE))
638 goto done;
639
d98b1937
RC
640 piobuf = ipath_getpiobuf(dd, 0, NULL);
641 if (!piobuf) {
642 /*
643 * We are out of PIO buffers at the moment.
644 * Pass responsibility for sending the ACK to the
645 * send tasklet so that when a PIO buffer becomes
646 * available, the ACK is sent ahead of other outgoing
647 * packets.
648 */
649 spin_lock_irqsave(&qp->s_lock, flags);
650 goto queue_ack;
651 }
652
97f9efbc 653 /* Construct the header. */
ddd4bb22 654 ohdr = &hdr.u.oth;
27b678dd 655 lrh0 = IPATH_LRH_BTH;
97f9efbc 656 /* header size in 32-bit words LRH+BTH+AETH = (8+12+4)/4. */
ddd4bb22 657 hwords = 6;
97f9efbc 658 if (unlikely(qp->remote_ah_attr.ah_flags & IB_AH_GRH)) {
ddd4bb22
BS
659 hwords += ipath_make_grh(dev, &hdr.u.l.grh,
660 &qp->remote_ah_attr.grh,
661 hwords, 0);
662 ohdr = &hdr.u.l.oth;
27b678dd 663 lrh0 = IPATH_LRH_GRH;
97f9efbc 664 }
12eef41f 665 /* read pkey_index w/o lock (its atomic) */
d98b1937 666 bth0 = ipath_get_pkey(dd, qp->s_pkey_index) |
1dd6a1be 667 (OP(ACKNOWLEDGE) << 24) | (1 << 22);
12eef41f 668 if (qp->r_nak_state)
27b678dd 669 ohdr->u.aeth = cpu_to_be32((qp->r_msn & IPATH_MSN_MASK) |
12eef41f 670 (qp->r_nak_state <<
27b678dd 671 IPATH_AETH_CREDIT_SHIFT));
12eef41f
BS
672 else
673 ohdr->u.aeth = ipath_compute_aeth(qp);
97f9efbc 674 lrh0 |= qp->remote_ah_attr.sl << 4;
ddd4bb22
BS
675 hdr.lrh[0] = cpu_to_be16(lrh0);
676 hdr.lrh[1] = cpu_to_be16(qp->remote_ah_attr.dlid);
677 hdr.lrh[2] = cpu_to_be16(hwords + SIZE_OF_CRC);
94035896
RC
678 hdr.lrh[3] = cpu_to_be16(dd->ipath_lid |
679 qp->remote_ah_attr.src_path_bits);
97f9efbc
BS
680 ohdr->bth[0] = cpu_to_be32(bth0);
681 ohdr->bth[1] = cpu_to_be32(qp->remote_qpn);
27b678dd 682 ohdr->bth[2] = cpu_to_be32(qp->r_ack_psn & IPATH_PSN_MASK);
97f9efbc 683
d98b1937 684 writeq(hwords + 1, piobuf);
3859e39d 685
d98b1937
RC
686 if (dd->ipath_flags & IPATH_PIO_FLUSH_WC) {
687 u32 *hdrp = (u32 *) &hdr;
688
689 ipath_flush_wc();
690 __iowrite32_copy(piobuf + 2, hdrp, hwords - 1);
691 ipath_flush_wc();
692 __raw_writel(hdrp[hwords - 1], piobuf + hwords + 1);
693 } else
694 __iowrite32_copy(piobuf + 2, (u32 *) &hdr, hwords);
695
696 ipath_flush_wc();
697
698 dev->n_unicast_xmit++;
699 goto done;
3859e39d
RC
700
701queue_ack:
e509be89
RC
702 if (ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK) {
703 dev->n_rc_qacks++;
704 qp->s_flags |= IPATH_S_ACK_PENDING;
705 qp->s_nak_state = qp->r_nak_state;
706 qp->s_ack_psn = qp->r_ack_psn;
707
708 /* Schedule the send tasklet. */
709 ipath_schedule_send(qp);
710 }
35ff032e 711 spin_unlock_irqrestore(&qp->s_lock, flags);
3859e39d
RC
712done:
713 return;
97f9efbc
BS
714}
715
6700efdf
BS
716/**
717 * reset_psn - reset the QP state to send starting from PSN
718 * @qp: the QP
719 * @psn: the packet sequence number to restart at
720 *
721 * This is called from ipath_rc_rcv() to process an incoming RC ACK
722 * for the given QP.
723 * Called at interrupt level with the QP s_lock held.
724 */
725static void reset_psn(struct ipath_qp *qp, u32 psn)
726{
727 u32 n = qp->s_last;
728 struct ipath_swqe *wqe = get_swqe_ptr(qp, n);
729 u32 opcode;
730
731 qp->s_cur = n;
732
733 /*
734 * If we are starting the request from the beginning,
735 * let the normal send code handle initialization.
736 */
737 if (ipath_cmp24(psn, wqe->psn) <= 0) {
738 qp->s_state = OP(SEND_LAST);
739 goto done;
740 }
741
742 /* Find the work request opcode corresponding to the given PSN. */
743 opcode = wqe->wr.opcode;
744 for (;;) {
745 int diff;
746
747 if (++n == qp->s_size)
748 n = 0;
749 if (n == qp->s_tail)
750 break;
751 wqe = get_swqe_ptr(qp, n);
752 diff = ipath_cmp24(psn, wqe->psn);
753 if (diff < 0)
754 break;
755 qp->s_cur = n;
756 /*
757 * If we are starting the request from the beginning,
758 * let the normal send code handle initialization.
759 */
760 if (diff == 0) {
761 qp->s_state = OP(SEND_LAST);
762 goto done;
763 }
764 opcode = wqe->wr.opcode;
765 }
766
767 /*
768 * Set the state to restart in the middle of a request.
769 * Don't change the s_sge, s_cur_sge, or s_cur_size.
e509be89 770 * See ipath_make_rc_req().
6700efdf
BS
771 */
772 switch (opcode) {
773 case IB_WR_SEND:
774 case IB_WR_SEND_WITH_IMM:
775 qp->s_state = OP(RDMA_READ_RESPONSE_FIRST);
776 break;
777
778 case IB_WR_RDMA_WRITE:
779 case IB_WR_RDMA_WRITE_WITH_IMM:
780 qp->s_state = OP(RDMA_READ_RESPONSE_LAST);
781 break;
782
783 case IB_WR_RDMA_READ:
784 qp->s_state = OP(RDMA_READ_RESPONSE_MIDDLE);
785 break;
786
787 default:
788 /*
789 * This case shouldn't happen since its only
790 * one PSN per req.
791 */
792 qp->s_state = OP(SEND_LAST);
793 }
794done:
795 qp->s_psn = psn;
796}
797
97f9efbc
BS
798/**
799 * ipath_restart_rc - back up requester to resend the last un-ACKed request
800 * @qp: the QP to restart
801 * @psn: packet sequence number for the request
802 * @wc: the work completion request
803 *
12eef41f 804 * The QP s_lock should be held and interrupts disabled.
97f9efbc 805 */
53dc1ca1 806void ipath_restart_rc(struct ipath_qp *qp, u32 psn)
97f9efbc
BS
807{
808 struct ipath_swqe *wqe = get_swqe_ptr(qp, qp->s_last);
809 struct ipath_ibdev *dev;
97f9efbc 810
97f9efbc 811 if (qp->s_retry == 0) {
53dc1ca1
RC
812 ipath_send_complete(qp, wqe, IB_WC_RETRY_EXC_ERR);
813 ipath_error_qp(qp, IB_WC_WR_FLUSH_ERR);
97f9efbc
BS
814 goto bail;
815 }
816 qp->s_retry--;
817
818 /*
819 * Remove the QP from the timeout queue.
820 * Note: it may already have been removed by ipath_ib_timer().
821 */
822 dev = to_idev(qp->ibqp.device);
823 spin_lock(&dev->pending_lock);
94b8d9f9
BS
824 if (!list_empty(&qp->timerwait))
825 list_del_init(&qp->timerwait);
53dc1ca1
RC
826 if (!list_empty(&qp->piowait))
827 list_del_init(&qp->piowait);
97f9efbc
BS
828 spin_unlock(&dev->pending_lock);
829
830 if (wqe->wr.opcode == IB_WR_RDMA_READ)
831 dev->n_rc_resends++;
832 else
6f5c4074 833 dev->n_rc_resends += (qp->s_psn - psn) & IPATH_PSN_MASK;
97f9efbc 834
6700efdf 835 reset_psn(qp, psn);
e509be89 836 ipath_schedule_send(qp);
97f9efbc
BS
837
838bail:
839 return;
840}
841
6022943e
BS
842static inline void update_last_psn(struct ipath_qp *qp, u32 psn)
843{
e509be89 844 qp->s_last_psn = psn;
6022943e
BS
845}
846
97f9efbc
BS
847/**
848 * do_rc_ack - process an incoming RC ACK
849 * @qp: the QP the ACK came in on
850 * @psn: the packet sequence number of the ACK
851 * @opcode: the opcode of the request that resulted in the ACK
852 *
6700efdf 853 * This is called from ipath_rc_rcv_resp() to process an incoming RC ACK
97f9efbc 854 * for the given QP.
12eef41f 855 * Called at interrupt level with the QP s_lock held and interrupts disabled.
97f9efbc
BS
856 * Returns 1 if OK, 0 if current operation should be aborted (NAK).
857 */
06ee1090
RC
858static int do_rc_ack(struct ipath_qp *qp, u32 aeth, u32 psn, int opcode,
859 u64 val)
97f9efbc
BS
860{
861 struct ipath_ibdev *dev = to_idev(qp->ibqp.device);
862 struct ib_wc wc;
53dc1ca1 863 enum ib_wc_status status;
97f9efbc
BS
864 struct ipath_swqe *wqe;
865 int ret = 0;
13b18c86 866 u32 ack_psn;
06ee1090 867 int diff;
97f9efbc
BS
868
869 /*
870 * Remove the QP from the timeout queue (or RNR timeout queue).
871 * If ipath_ib_timer() has already removed it,
872 * it's OK since we hold the QP s_lock and ipath_restart_rc()
873 * just won't find anything to restart if we ACK everything.
874 */
875 spin_lock(&dev->pending_lock);
94b8d9f9
BS
876 if (!list_empty(&qp->timerwait))
877 list_del_init(&qp->timerwait);
97f9efbc
BS
878 spin_unlock(&dev->pending_lock);
879
880 /*
881 * Note that NAKs implicitly ACK outstanding SEND and RDMA write
882 * requests and implicitly NAK RDMA read and atomic requests issued
883 * before the NAK'ed request. The MSN won't include the NAK'ed
884 * request but will include an ACK'ed request(s).
885 */
13b18c86
RC
886 ack_psn = psn;
887 if (aeth >> 29)
888 ack_psn--;
97f9efbc
BS
889 wqe = get_swqe_ptr(qp, qp->s_last);
890
97f9efbc
BS
891 /*
892 * The MSN might be for a later WQE than the PSN indicates so
893 * only complete WQEs that the PSN finishes.
894 */
06ee1090
RC
895 while ((diff = ipath_cmp24(ack_psn, wqe->lpsn)) >= 0) {
896 /*
897 * RDMA_READ_RESPONSE_ONLY is a special case since
898 * we want to generate completion events for everything
899 * before the RDMA read, copy the data, then generate
900 * the completion for the read.
901 */
902 if (wqe->wr.opcode == IB_WR_RDMA_READ &&
903 opcode == OP(RDMA_READ_RESPONSE_ONLY) &&
904 diff == 0) {
905 ret = 1;
906 goto bail;
907 }
97f9efbc
BS
908 /*
909 * If this request is a RDMA read or atomic, and the ACK is
910 * for a later operation, this ACK NAKs the RDMA read or
911 * atomic. In other words, only a RDMA_READ_LAST or ONLY
912 * can ACK a RDMA read and likewise for atomic ops. Note
913 * that the NAK case can only happen if relaxed ordering is
914 * used and requests are sent after an RDMA read or atomic
915 * is sent but before the response is received.
916 */
917 if ((wqe->wr.opcode == IB_WR_RDMA_READ &&
06ee1090 918 (opcode != OP(RDMA_READ_RESPONSE_LAST) || diff != 0)) ||
97f9efbc
BS
919 ((wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
920 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD) &&
06ee1090 921 (opcode != OP(ATOMIC_ACKNOWLEDGE) || diff != 0))) {
97f9efbc
BS
922 /*
923 * The last valid PSN seen is the previous
924 * request's.
925 */
6022943e 926 update_last_psn(qp, wqe->psn - 1);
97f9efbc 927 /* Retry this request. */
53dc1ca1 928 ipath_restart_rc(qp, wqe->psn);
97f9efbc
BS
929 /*
930 * No need to process the ACK/NAK since we are
931 * restarting an earlier request.
932 */
933 goto bail;
934 }
06ee1090
RC
935 if (wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
936 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)
937 *(u64 *) wqe->sg_list[0].vaddr = val;
3859e39d
RC
938 if (qp->s_num_rd_atomic &&
939 (wqe->wr.opcode == IB_WR_RDMA_READ ||
940 wqe->wr.opcode == IB_WR_ATOMIC_CMP_AND_SWP ||
941 wqe->wr.opcode == IB_WR_ATOMIC_FETCH_AND_ADD)) {
942 qp->s_num_rd_atomic--;
943 /* Restart sending task if fence is complete */
e509be89
RC
944 if (((qp->s_flags & IPATH_S_FENCE_PENDING) &&
945 !qp->s_num_rd_atomic) ||
946 qp->s_flags & IPATH_S_RDMAR_PENDING)
947 ipath_schedule_send(qp);
3859e39d 948 }
97f9efbc 949 /* Post a send completion queue entry if requested. */
3859e39d 950 if (!(qp->s_flags & IPATH_S_SIGNAL_REQ_WR) ||
97f9efbc 951 (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
53dc1ca1 952 memset(&wc, 0, sizeof wc);
97f9efbc
BS
953 wc.wr_id = wqe->wr.wr_id;
954 wc.status = IB_WC_SUCCESS;
955 wc.opcode = ib_ipath_wc_opcode[wqe->wr.opcode];
97f9efbc 956 wc.byte_len = wqe->length;
062dbb69 957 wc.qp = &qp->ibqp;
97f9efbc 958 wc.src_qp = qp->remote_qpn;
97f9efbc
BS
959 wc.slid = qp->remote_ah_attr.dlid;
960 wc.sl = qp->remote_ah_attr.sl;
97f9efbc
BS
961 ipath_cq_enter(to_icq(qp->ibqp.send_cq), &wc, 0);
962 }
963 qp->s_retry = qp->s_retry_cnt;
964 /*
965 * If we are completing a request which is in the process of
966 * being resent, we can stop resending it since we know the
967 * responder has already seen it.
968 */
969 if (qp->s_last == qp->s_cur) {
970 if (++qp->s_cur >= qp->s_size)
971 qp->s_cur = 0;
6f5c4074
RC
972 qp->s_last = qp->s_cur;
973 if (qp->s_last == qp->s_tail)
974 break;
97f9efbc
BS
975 wqe = get_swqe_ptr(qp, qp->s_cur);
976 qp->s_state = OP(SEND_LAST);
977 qp->s_psn = wqe->psn;
6f5c4074
RC
978 } else {
979 if (++qp->s_last >= qp->s_size)
980 qp->s_last = 0;
e509be89
RC
981 if (qp->state == IB_QPS_SQD && qp->s_last == qp->s_cur)
982 qp->s_draining = 0;
6f5c4074
RC
983 if (qp->s_last == qp->s_tail)
984 break;
985 wqe = get_swqe_ptr(qp, qp->s_last);
97f9efbc 986 }
97f9efbc
BS
987 }
988
989 switch (aeth >> 29) {
990 case 0: /* ACK */
991 dev->n_rc_acks++;
992 /* If this is a partial ACK, reset the retransmit timer. */
993 if (qp->s_last != qp->s_tail) {
994 spin_lock(&dev->pending_lock);
f4ad1bcc
RC
995 if (list_empty(&qp->timerwait))
996 list_add_tail(&qp->timerwait,
997 &dev->pending[dev->pending_index]);
97f9efbc 998 spin_unlock(&dev->pending_lock);
6f5c4074
RC
999 /*
1000 * If we get a partial ACK for a resent operation,
1001 * we can stop resending the earlier packets and
1002 * continue with the next packet the receiver wants.
1003 */
1004 if (ipath_cmp24(qp->s_psn, psn) <= 0) {
1005 reset_psn(qp, psn + 1);
e509be89 1006 ipath_schedule_send(qp);
6f5c4074
RC
1007 }
1008 } else if (ipath_cmp24(qp->s_psn, psn) <= 0) {
1009 qp->s_state = OP(SEND_LAST);
1010 qp->s_psn = psn + 1;
97f9efbc
BS
1011 }
1012 ipath_get_credit(qp, aeth);
1013 qp->s_rnr_retry = qp->s_rnr_retry_cnt;
1014 qp->s_retry = qp->s_retry_cnt;
6022943e 1015 update_last_psn(qp, psn);
97f9efbc
BS
1016 ret = 1;
1017 goto bail;
1018
1019 case 1: /* RNR NAK */
1020 dev->n_rnr_naks++;
6f5c4074
RC
1021 if (qp->s_last == qp->s_tail)
1022 goto bail;
97f9efbc 1023 if (qp->s_rnr_retry == 0) {
53dc1ca1 1024 status = IB_WC_RNR_RETRY_EXC_ERR;
97f9efbc
BS
1025 goto class_b;
1026 }
1027 if (qp->s_rnr_retry_cnt < 7)
1028 qp->s_rnr_retry--;
97f9efbc 1029
6700efdf 1030 /* The last valid PSN is the previous PSN. */
6022943e 1031 update_last_psn(qp, psn - 1);
97f9efbc 1032
6f5c4074
RC
1033 if (wqe->wr.opcode == IB_WR_RDMA_READ)
1034 dev->n_rc_resends++;
1035 else
1036 dev->n_rc_resends +=
1037 (qp->s_psn - psn) & IPATH_PSN_MASK;
97f9efbc 1038
6700efdf 1039 reset_psn(qp, psn);
97f9efbc
BS
1040
1041 qp->s_rnr_timeout =
27b678dd
BS
1042 ib_ipath_rnr_table[(aeth >> IPATH_AETH_CREDIT_SHIFT) &
1043 IPATH_AETH_CREDIT_MASK];
97f9efbc 1044 ipath_insert_rnr_queue(qp);
e509be89 1045 ipath_schedule_send(qp);
97f9efbc
BS
1046 goto bail;
1047
1048 case 3: /* NAK */
6f5c4074
RC
1049 if (qp->s_last == qp->s_tail)
1050 goto bail;
1051 /* The last valid PSN is the previous PSN. */
1052 update_last_psn(qp, psn - 1);
27b678dd
BS
1053 switch ((aeth >> IPATH_AETH_CREDIT_SHIFT) &
1054 IPATH_AETH_CREDIT_MASK) {
97f9efbc
BS
1055 case 0: /* PSN sequence error */
1056 dev->n_seq_naks++;
1057 /*
6f5c4074 1058 * Back up to the responder's expected PSN.
97f9efbc
BS
1059 * Note that we might get a NAK in the middle of an
1060 * RDMA READ response which terminates the RDMA
1061 * READ.
1062 */
53dc1ca1 1063 ipath_restart_rc(qp, psn);
97f9efbc
BS
1064 break;
1065
1066 case 1: /* Invalid Request */
53dc1ca1 1067 status = IB_WC_REM_INV_REQ_ERR;
97f9efbc
BS
1068 dev->n_other_naks++;
1069 goto class_b;
1070
1071 case 2: /* Remote Access Error */
53dc1ca1 1072 status = IB_WC_REM_ACCESS_ERR;
97f9efbc
BS
1073 dev->n_other_naks++;
1074 goto class_b;
1075
1076 case 3: /* Remote Operation Error */
53dc1ca1 1077 status = IB_WC_REM_OP_ERR;
97f9efbc
BS
1078 dev->n_other_naks++;
1079 class_b:
53dc1ca1
RC
1080 ipath_send_complete(qp, wqe, status);
1081 ipath_error_qp(qp, IB_WC_WR_FLUSH_ERR);
97f9efbc
BS
1082 break;
1083
1084 default:
1085 /* Ignore other reserved NAK error codes */
1086 goto reserved;
1087 }
1088 qp->s_rnr_retry = qp->s_rnr_retry_cnt;
1089 goto bail;
1090
1091 default: /* 2: reserved */
1092 reserved:
1093 /* Ignore reserved NAK codes. */
1094 goto bail;
1095 }
1096
1097bail:
1098 return ret;
1099}
1100
1101/**
1102 * ipath_rc_rcv_resp - process an incoming RC response packet
1103 * @dev: the device this packet came in on
1104 * @ohdr: the other headers for this packet
1105 * @data: the packet data
1106 * @tlen: the packet length
1107 * @qp: the QP for this packet
1108 * @opcode: the opcode for this packet
1109 * @psn: the packet sequence number for this packet
1110 * @hdrsize: the header length
1111 * @pmtu: the path MTU
1112 * @header_in_data: true if part of the header data is in the data buffer
1113 *
1114 * This is called from ipath_rc_rcv() to process an incoming RC response
1115 * packet for the given QP.
1116 * Called at interrupt level.
1117 */
1118static inline void ipath_rc_rcv_resp(struct ipath_ibdev *dev,
1119 struct ipath_other_headers *ohdr,
1120 void *data, u32 tlen,
1121 struct ipath_qp *qp,
1122 u32 opcode,
1123 u32 psn, u32 hdrsize, u32 pmtu,
1124 int header_in_data)
1125{
3859e39d 1126 struct ipath_swqe *wqe;
53dc1ca1 1127 enum ib_wc_status status;
97f9efbc 1128 unsigned long flags;
97f9efbc
BS
1129 int diff;
1130 u32 pad;
1131 u32 aeth;
06ee1090 1132 u64 val;
97f9efbc
BS
1133
1134 spin_lock_irqsave(&qp->s_lock, flags);
1135
e509be89
RC
1136 /* Double check we can process this now that we hold the s_lock. */
1137 if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK))
1138 goto ack_done;
1139
97f9efbc
BS
1140 /* Ignore invalid responses. */
1141 if (ipath_cmp24(psn, qp->s_next_psn) >= 0)
1142 goto ack_done;
1143
1144 /* Ignore duplicate responses. */
1145 diff = ipath_cmp24(psn, qp->s_last_psn);
1146 if (unlikely(diff <= 0)) {
1147 /* Update credits for "ghost" ACKs */
1148 if (diff == 0 && opcode == OP(ACKNOWLEDGE)) {
1149 if (!header_in_data)
1150 aeth = be32_to_cpu(ohdr->u.aeth);
1151 else {
1152 aeth = be32_to_cpu(((__be32 *) data)[0]);
1153 data += sizeof(__be32);
1154 }
1155 if ((aeth >> 29) == 0)
1156 ipath_get_credit(qp, aeth);
1157 }
1158 goto ack_done;
1159 }
1160
3859e39d
RC
1161 if (unlikely(qp->s_last == qp->s_tail))
1162 goto ack_done;
1163 wqe = get_swqe_ptr(qp, qp->s_last);
53dc1ca1 1164 status = IB_WC_SUCCESS;
3859e39d 1165
97f9efbc
BS
1166 switch (opcode) {
1167 case OP(ACKNOWLEDGE):
1168 case OP(ATOMIC_ACKNOWLEDGE):
1169 case OP(RDMA_READ_RESPONSE_FIRST):
1170 if (!header_in_data)
1171 aeth = be32_to_cpu(ohdr->u.aeth);
1172 else {
1173 aeth = be32_to_cpu(((__be32 *) data)[0]);
1174 data += sizeof(__be32);
1175 }
3859e39d 1176 if (opcode == OP(ATOMIC_ACKNOWLEDGE)) {
3859e39d
RC
1177 if (!header_in_data) {
1178 __be32 *p = ohdr->u.at.atomic_ack_eth;
1179
1180 val = ((u64) be32_to_cpu(p[0]) << 32) |
1181 be32_to_cpu(p[1]);
1182 } else
1183 val = be64_to_cpu(((__be64 *) data)[0]);
06ee1090
RC
1184 } else
1185 val = 0;
1186 if (!do_rc_ack(qp, aeth, psn, opcode, val) ||
97f9efbc
BS
1187 opcode != OP(RDMA_READ_RESPONSE_FIRST))
1188 goto ack_done;
1189 hdrsize += 4;
06ee1090 1190 wqe = get_swqe_ptr(qp, qp->s_last);
3859e39d 1191 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
dd5190b6 1192 goto ack_op_err;
74116f58 1193 qp->r_flags &= ~IPATH_R_RDMAR_SEQ;
97f9efbc 1194 /*
3859e39d
RC
1195 * If this is a response to a resent RDMA read, we
1196 * have to be careful to copy the data to the right
1197 * location.
97f9efbc 1198 */
3859e39d
RC
1199 qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
1200 wqe, psn, pmtu);
1201 goto read_middle;
97f9efbc
BS
1202
1203 case OP(RDMA_READ_RESPONSE_MIDDLE):
1204 /* no AETH, no ACK */
1205 if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
1206 dev->n_rdma_seq++;
74116f58
RC
1207 if (qp->r_flags & IPATH_R_RDMAR_SEQ)
1208 goto ack_done;
1209 qp->r_flags |= IPATH_R_RDMAR_SEQ;
53dc1ca1 1210 ipath_restart_rc(qp, qp->s_last_psn + 1);
97f9efbc
BS
1211 goto ack_done;
1212 }
3859e39d 1213 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
dd5190b6 1214 goto ack_op_err;
3859e39d 1215 read_middle:
7bbb15ea 1216 if (unlikely(tlen != (hdrsize + pmtu + 4)))
dd5190b6 1217 goto ack_len_err;
3859e39d 1218 if (unlikely(pmtu >= qp->s_rdma_read_len))
dd5190b6 1219 goto ack_len_err;
3859e39d 1220
7bbb15ea 1221 /* We got a response so update the timeout. */
7bbb15ea
BS
1222 spin_lock(&dev->pending_lock);
1223 if (qp->s_rnr_timeout == 0 && !list_empty(&qp->timerwait))
1224 list_move_tail(&qp->timerwait,
1225 &dev->pending[dev->pending_index]);
1226 spin_unlock(&dev->pending_lock);
450bb387
PML
1227
1228 if (opcode == OP(RDMA_READ_RESPONSE_MIDDLE))
1229 qp->s_retry = qp->s_retry_cnt;
1230
7bbb15ea 1231 /*
6700efdf
BS
1232 * Update the RDMA receive state but do the copy w/o
1233 * holding the locks and blocking interrupts.
7bbb15ea 1234 */
3859e39d 1235 qp->s_rdma_read_len -= pmtu;
6022943e 1236 update_last_psn(qp, psn);
7bbb15ea 1237 spin_unlock_irqrestore(&qp->s_lock, flags);
3859e39d 1238 ipath_copy_sge(&qp->s_rdma_read_sge, data, pmtu);
7bbb15ea 1239 goto bail;
97f9efbc 1240
3859e39d 1241 case OP(RDMA_READ_RESPONSE_ONLY):
06ee1090
RC
1242 if (!header_in_data)
1243 aeth = be32_to_cpu(ohdr->u.aeth);
1244 else
1245 aeth = be32_to_cpu(((__be32 *) data)[0]);
1246 if (!do_rc_ack(qp, aeth, psn, opcode, 0))
3859e39d 1247 goto ack_done;
dd5190b6
RC
1248 /* Get the number of bytes the message was padded by. */
1249 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
1250 /*
1251 * Check that the data size is >= 0 && <= pmtu.
1252 * Remember to account for the AETH header (4) and
1253 * ICRC (4).
1254 */
1255 if (unlikely(tlen < (hdrsize + pad + 8)))
1256 goto ack_len_err;
3859e39d
RC
1257 /*
1258 * If this is a response to a resent RDMA read, we
1259 * have to be careful to copy the data to the right
1260 * location.
3859e39d 1261 */
06ee1090 1262 wqe = get_swqe_ptr(qp, qp->s_last);
3859e39d
RC
1263 qp->s_rdma_read_len = restart_sge(&qp->s_rdma_read_sge,
1264 wqe, psn, pmtu);
1265 goto read_last;
1266
97f9efbc
BS
1267 case OP(RDMA_READ_RESPONSE_LAST):
1268 /* ACKs READ req. */
1269 if (unlikely(ipath_cmp24(psn, qp->s_last_psn + 1))) {
1270 dev->n_rdma_seq++;
74116f58
RC
1271 if (qp->r_flags & IPATH_R_RDMAR_SEQ)
1272 goto ack_done;
1273 qp->r_flags |= IPATH_R_RDMAR_SEQ;
53dc1ca1 1274 ipath_restart_rc(qp, qp->s_last_psn + 1);
97f9efbc
BS
1275 goto ack_done;
1276 }
3859e39d 1277 if (unlikely(wqe->wr.opcode != IB_WR_RDMA_READ))
dd5190b6
RC
1278 goto ack_op_err;
1279 /* Get the number of bytes the message was padded by. */
97f9efbc
BS
1280 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
1281 /*
1282 * Check that the data size is >= 1 && <= pmtu.
1283 * Remember to account for the AETH header (4) and
1284 * ICRC (4).
1285 */
dd5190b6
RC
1286 if (unlikely(tlen <= (hdrsize + pad + 8)))
1287 goto ack_len_err;
1288 read_last:
97f9efbc 1289 tlen -= hdrsize + pad + 8;
dd5190b6
RC
1290 if (unlikely(tlen != qp->s_rdma_read_len))
1291 goto ack_len_err;
97f9efbc
BS
1292 if (!header_in_data)
1293 aeth = be32_to_cpu(ohdr->u.aeth);
1294 else {
1295 aeth = be32_to_cpu(((__be32 *) data)[0]);
1296 data += sizeof(__be32);
1297 }
3859e39d 1298 ipath_copy_sge(&qp->s_rdma_read_sge, data, tlen);
06ee1090
RC
1299 (void) do_rc_ack(qp, aeth, psn,
1300 OP(RDMA_READ_RESPONSE_LAST), 0);
97f9efbc
BS
1301 goto ack_done;
1302 }
1303
dd5190b6 1304ack_op_err:
53dc1ca1 1305 status = IB_WC_LOC_QP_OP_ERR;
dd5190b6
RC
1306 goto ack_err;
1307
1308ack_len_err:
53dc1ca1 1309 status = IB_WC_LOC_LEN_ERR;
dd5190b6 1310ack_err:
53dc1ca1
RC
1311 ipath_send_complete(qp, wqe, status);
1312 ipath_error_qp(qp, IB_WC_WR_FLUSH_ERR);
1313ack_done:
6ed89b95 1314 spin_unlock_irqrestore(&qp->s_lock, flags);
97f9efbc
BS
1315bail:
1316 return;
1317}
1318
1319/**
1320 * ipath_rc_rcv_error - process an incoming duplicate or error RC packet
1321 * @dev: the device this packet came in on
1322 * @ohdr: the other headers for this packet
1323 * @data: the packet data
1324 * @qp: the QP for this packet
1325 * @opcode: the opcode for this packet
1326 * @psn: the packet sequence number for this packet
1327 * @diff: the difference between the PSN and the expected PSN
1328 * @header_in_data: true if part of the header data is in the data buffer
1329 *
1330 * This is called from ipath_rc_rcv() to process an unexpected
1331 * incoming RC packet for the given QP.
1332 * Called at interrupt level.
1333 * Return 1 if no more processing is needed; otherwise return 0 to
3859e39d 1334 * schedule a response to be sent.
97f9efbc
BS
1335 */
1336static inline int ipath_rc_rcv_error(struct ipath_ibdev *dev,
1337 struct ipath_other_headers *ohdr,
1338 void *data,
1339 struct ipath_qp *qp,
1340 u32 opcode,
1341 u32 psn,
1342 int diff,
1343 int header_in_data)
1344{
3859e39d
RC
1345 struct ipath_ack_entry *e;
1346 u8 i, prev;
1347 int old_req;
35ff032e 1348 unsigned long flags;
97f9efbc
BS
1349
1350 if (diff > 0) {
1351 /*
1352 * Packet sequence error.
1353 * A NAK will ACK earlier sends and RDMA writes.
3859e39d 1354 * Don't queue the NAK if we already sent one.
97f9efbc 1355 */
3859e39d 1356 if (!qp->r_nak_state) {
12eef41f
BS
1357 qp->r_nak_state = IB_NAK_PSN_ERROR;
1358 /* Use the expected PSN. */
1359 qp->r_ack_psn = qp->r_psn;
3859e39d 1360 goto send_ack;
97f9efbc 1361 }
3859e39d 1362 goto done;
97f9efbc
BS
1363 }
1364
1365 /*
1366 * Handle a duplicate request. Don't re-execute SEND, RDMA
1367 * write or atomic op. Don't NAK errors, just silently drop
1368 * the duplicate request. Note that r_sge, r_len, and
1369 * r_rcv_len may be in use so don't modify them.
1370 *
1371 * We are supposed to ACK the earliest duplicate PSN but we
1372 * can coalesce an outstanding duplicate ACK. We have to
1373 * send the earliest so that RDMA reads can be restarted at
1374 * the requester's expected PSN.
3859e39d
RC
1375 *
1376 * First, find where this duplicate PSN falls within the
1377 * ACKs previously sent.
97f9efbc 1378 */
3859e39d
RC
1379 psn &= IPATH_PSN_MASK;
1380 e = NULL;
1381 old_req = 1;
e509be89 1382
35ff032e 1383 spin_lock_irqsave(&qp->s_lock, flags);
e509be89
RC
1384 /* Double check we can process this now that we hold the s_lock. */
1385 if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK))
1386 goto unlock_done;
1387
3859e39d
RC
1388 for (i = qp->r_head_ack_queue; ; i = prev) {
1389 if (i == qp->s_tail_ack_queue)
1390 old_req = 0;
1391 if (i)
1392 prev = i - 1;
1393 else
1394 prev = IPATH_MAX_RDMA_ATOMIC;
1395 if (prev == qp->r_head_ack_queue) {
1396 e = NULL;
1397 break;
1398 }
1399 e = &qp->s_ack_queue[prev];
1400 if (!e->opcode) {
1401 e = NULL;
1402 break;
1403 }
06ee1090
RC
1404 if (ipath_cmp24(psn, e->psn) >= 0) {
1405 if (prev == qp->s_tail_ack_queue)
1406 old_req = 0;
3859e39d 1407 break;
06ee1090 1408 }
3859e39d
RC
1409 }
1410 switch (opcode) {
1411 case OP(RDMA_READ_REQUEST): {
1412 struct ib_reth *reth;
1413 u32 offset;
1414 u32 len;
1415
1416 /*
1417 * If we didn't find the RDMA read request in the ack queue,
1418 * or the send tasklet is already backed up to send an
1419 * earlier entry, we can ignore this request.
1420 */
1421 if (!e || e->opcode != OP(RDMA_READ_REQUEST) || old_req)
1422 goto unlock_done;
97f9efbc
BS
1423 /* RETH comes after BTH */
1424 if (!header_in_data)
1425 reth = &ohdr->u.rc.reth;
1426 else {
1427 reth = (struct ib_reth *)data;
1428 data += sizeof(*reth);
1429 }
12eef41f 1430 /*
3859e39d
RC
1431 * Address range must be a subset of the original
1432 * request and start on pmtu boundaries.
1433 * We reuse the old ack_queue slot since the requester
1434 * should not back up and request an earlier PSN for the
1435 * same request.
12eef41f 1436 */
3859e39d
RC
1437 offset = ((psn - e->psn) & IPATH_PSN_MASK) *
1438 ib_mtu_enum_to_int(qp->path_mtu);
1439 len = be32_to_cpu(reth->length);
1440 if (unlikely(offset + len > e->rdma_sge.sge.sge_length))
1441 goto unlock_done;
1442 if (len != 0) {
97f9efbc
BS
1443 u32 rkey = be32_to_cpu(reth->rkey);
1444 u64 vaddr = be64_to_cpu(reth->vaddr);
1445 int ok;
1446
3859e39d
RC
1447 ok = ipath_rkey_ok(qp, &e->rdma_sge,
1448 len, vaddr, rkey,
97f9efbc 1449 IB_ACCESS_REMOTE_READ);
3859e39d
RC
1450 if (unlikely(!ok))
1451 goto unlock_done;
97f9efbc 1452 } else {
3859e39d
RC
1453 e->rdma_sge.sg_list = NULL;
1454 e->rdma_sge.num_sge = 0;
1455 e->rdma_sge.sge.mr = NULL;
1456 e->rdma_sge.sge.vaddr = NULL;
1457 e->rdma_sge.sge.length = 0;
1458 e->rdma_sge.sge.sge_length = 0;
97f9efbc 1459 }
3859e39d
RC
1460 e->psn = psn;
1461 qp->s_ack_state = OP(ACKNOWLEDGE);
1462 qp->s_tail_ack_queue = prev;
1463 break;
12eef41f
BS
1464 }
1465
97f9efbc 1466 case OP(COMPARE_SWAP):
3859e39d 1467 case OP(FETCH_ADD): {
97f9efbc 1468 /*
3859e39d
RC
1469 * If we didn't find the atomic request in the ack queue
1470 * or the send tasklet is already backed up to send an
1471 * earlier entry, we can ignore this request.
97f9efbc 1472 */
3859e39d
RC
1473 if (!e || e->opcode != (u8) opcode || old_req)
1474 goto unlock_done;
1475 qp->s_ack_state = OP(ACKNOWLEDGE);
1476 qp->s_tail_ack_queue = prev;
1477 break;
1478 }
1479
1480 default:
1481 if (old_req)
1482 goto unlock_done;
1483 /*
1484 * Resend the most recent ACK if this request is
1485 * after all the previous RDMA reads and atomics.
1486 */
1487 if (i == qp->r_head_ack_queue) {
35ff032e 1488 spin_unlock_irqrestore(&qp->s_lock, flags);
3859e39d
RC
1489 qp->r_nak_state = 0;
1490 qp->r_ack_psn = qp->r_psn - 1;
1491 goto send_ack;
1492 }
4ee97180
RC
1493 /*
1494 * Try to send a simple ACK to work around a Mellanox bug
1495 * which doesn't accept a RDMA read response or atomic
1496 * response as an ACK for earlier SENDs or RDMA writes.
1497 */
1498 if (qp->r_head_ack_queue == qp->s_tail_ack_queue &&
1499 !(qp->s_flags & IPATH_S_ACK_PENDING) &&
1500 qp->s_ack_state == OP(ACKNOWLEDGE)) {
1501 spin_unlock_irqrestore(&qp->s_lock, flags);
1502 qp->r_nak_state = 0;
1503 qp->r_ack_psn = qp->s_ack_queue[i].psn - 1;
1504 goto send_ack;
1505 }
3859e39d
RC
1506 /*
1507 * Resend the RDMA read or atomic op which
1508 * ACKs this duplicate request.
1509 */
1510 qp->s_ack_state = OP(ACKNOWLEDGE);
1511 qp->s_tail_ack_queue = i;
97f9efbc
BS
1512 break;
1513 }
12eef41f 1514 qp->r_nak_state = 0;
e509be89 1515 ipath_schedule_send(qp);
97f9efbc 1516
3859e39d 1517unlock_done:
35ff032e 1518 spin_unlock_irqrestore(&qp->s_lock, flags);
97f9efbc
BS
1519done:
1520 return 1;
3859e39d
RC
1521
1522send_ack:
1523 return 0;
97f9efbc
BS
1524}
1525
53dc1ca1 1526void ipath_rc_error(struct ipath_qp *qp, enum ib_wc_status err)
8d0208cb 1527{
35ff032e 1528 unsigned long flags;
d42b01b5 1529 int lastwqe;
35ff032e
RC
1530
1531 spin_lock_irqsave(&qp->s_lock, flags);
d42b01b5 1532 lastwqe = ipath_error_qp(qp, err);
35ff032e 1533 spin_unlock_irqrestore(&qp->s_lock, flags);
d42b01b5
RC
1534
1535 if (lastwqe) {
1536 struct ib_event ev;
1537
1538 ev.device = qp->ibqp.device;
1539 ev.element.qp = &qp->ibqp;
1540 ev.event = IB_EVENT_QP_LAST_WQE_REACHED;
1541 qp->ibqp.event_handler(&ev, qp->ibqp.qp_context);
1542 }
8d0208cb
BS
1543}
1544
d781b129
RC
1545static inline void ipath_update_ack_queue(struct ipath_qp *qp, unsigned n)
1546{
d781b129
RC
1547 unsigned next;
1548
1549 next = n + 1;
1550 if (next > IPATH_MAX_RDMA_ATOMIC)
1551 next = 0;
d781b129
RC
1552 if (n == qp->s_tail_ack_queue) {
1553 qp->s_tail_ack_queue = next;
1554 qp->s_ack_state = OP(ACKNOWLEDGE);
1555 }
d781b129
RC
1556}
1557
97f9efbc
BS
1558/**
1559 * ipath_rc_rcv - process an incoming RC packet
1560 * @dev: the device this packet came in on
1561 * @hdr: the header of this packet
1562 * @has_grh: true if the header has a GRH
1563 * @data: the packet data
1564 * @tlen: the packet length
1565 * @qp: the QP for this packet
1566 *
1567 * This is called from ipath_qp_rcv() to process an incoming RC packet
1568 * for the given QP.
1569 * Called at interrupt level.
1570 */
1571void ipath_rc_rcv(struct ipath_ibdev *dev, struct ipath_ib_header *hdr,
1572 int has_grh, void *data, u32 tlen, struct ipath_qp *qp)
1573{
1574 struct ipath_other_headers *ohdr;
1575 u32 opcode;
1576 u32 hdrsize;
1577 u32 psn;
1578 u32 pad;
97f9efbc
BS
1579 struct ib_wc wc;
1580 u32 pmtu = ib_mtu_enum_to_int(qp->path_mtu);
1581 int diff;
1582 struct ib_reth *reth;
1583 int header_in_data;
e509be89 1584 unsigned long flags;
97f9efbc 1585
10aeb0e6
BS
1586 /* Validate the SLID. See Ch. 9.6.1.5 */
1587 if (unlikely(be16_to_cpu(hdr->lrh[3]) != qp->remote_ah_attr.dlid))
1588 goto done;
1589
97f9efbc
BS
1590 /* Check for GRH */
1591 if (!has_grh) {
1592 ohdr = &hdr->u.oth;
1593 hdrsize = 8 + 12; /* LRH + BTH */
1594 psn = be32_to_cpu(ohdr->bth[2]);
1595 header_in_data = 0;
1596 } else {
1597 ohdr = &hdr->u.l.oth;
1598 hdrsize = 8 + 40 + 12; /* LRH + GRH + BTH */
1599 /*
1600 * The header with GRH is 60 bytes and the core driver sets
1601 * the eager header buffer size to 56 bytes so the last 4
1602 * bytes of the BTH header (PSN) is in the data buffer.
1603 */
34b2aafe 1604 header_in_data = dev->dd->ipath_rcvhdrentsize == 16;
97f9efbc
BS
1605 if (header_in_data) {
1606 psn = be32_to_cpu(((__be32 *) data)[0]);
1607 data += sizeof(__be32);
1608 } else
1609 psn = be32_to_cpu(ohdr->bth[2]);
1610 }
97f9efbc
BS
1611
1612 /*
1613 * Process responses (ACKs) before anything else. Note that the
1614 * packet sequence number will be for something in the send work
1615 * queue rather than the expected receive packet sequence number.
1616 * In other words, this QP is the requester.
1617 */
ddd4bb22 1618 opcode = be32_to_cpu(ohdr->bth[0]) >> 24;
97f9efbc
BS
1619 if (opcode >= OP(RDMA_READ_RESPONSE_FIRST) &&
1620 opcode <= OP(ATOMIC_ACKNOWLEDGE)) {
1621 ipath_rc_rcv_resp(dev, ohdr, data, tlen, qp, opcode, psn,
1622 hdrsize, pmtu, header_in_data);
12eef41f 1623 goto done;
97f9efbc
BS
1624 }
1625
97f9efbc
BS
1626 /* Compute 24 bits worth of difference. */
1627 diff = ipath_cmp24(psn, qp->r_psn);
1628 if (unlikely(diff)) {
1629 if (ipath_rc_rcv_error(dev, ohdr, data, qp, opcode,
1630 psn, diff, header_in_data))
1631 goto done;
12eef41f 1632 goto send_ack;
97f9efbc
BS
1633 }
1634
1635 /* Check for opcode sequence errors. */
1636 switch (qp->r_state) {
1637 case OP(SEND_FIRST):
1638 case OP(SEND_MIDDLE):
1639 if (opcode == OP(SEND_MIDDLE) ||
1640 opcode == OP(SEND_LAST) ||
1641 opcode == OP(SEND_LAST_WITH_IMMEDIATE))
1642 break;
53dc1ca1 1643 goto nack_inv;
97f9efbc
BS
1644
1645 case OP(RDMA_WRITE_FIRST):
1646 case OP(RDMA_WRITE_MIDDLE):
1647 if (opcode == OP(RDMA_WRITE_MIDDLE) ||
1648 opcode == OP(RDMA_WRITE_LAST) ||
1649 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
1650 break;
1651 goto nack_inv;
1652
97f9efbc
BS
1653 default:
1654 if (opcode == OP(SEND_MIDDLE) ||
1655 opcode == OP(SEND_LAST) ||
1656 opcode == OP(SEND_LAST_WITH_IMMEDIATE) ||
1657 opcode == OP(RDMA_WRITE_MIDDLE) ||
1658 opcode == OP(RDMA_WRITE_LAST) ||
1659 opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE))
1660 goto nack_inv;
12eef41f
BS
1661 /*
1662 * Note that it is up to the requester to not send a new
1663 * RDMA read or atomic operation before receiving an ACK
1664 * for the previous operation.
1665 */
97f9efbc
BS
1666 break;
1667 }
1668
53dc1ca1 1669 memset(&wc, 0, sizeof wc);
97f9efbc
BS
1670
1671 /* OK, process the packet. */
1672 switch (opcode) {
1673 case OP(SEND_FIRST):
53dc1ca1
RC
1674 if (!ipath_get_rwqe(qp, 0))
1675 goto rnr_nak;
97f9efbc
BS
1676 qp->r_rcv_len = 0;
1677 /* FALLTHROUGH */
1678 case OP(SEND_MIDDLE):
1679 case OP(RDMA_WRITE_MIDDLE):
1680 send_middle:
1681 /* Check for invalid length PMTU or posted rwqe len. */
1682 if (unlikely(tlen != (hdrsize + pmtu + 4)))
1683 goto nack_inv;
1684 qp->r_rcv_len += pmtu;
1685 if (unlikely(qp->r_rcv_len > qp->r_len))
1686 goto nack_inv;
1687 ipath_copy_sge(&qp->r_sge, data, pmtu);
1688 break;
1689
1690 case OP(RDMA_WRITE_LAST_WITH_IMMEDIATE):
1691 /* consume RWQE */
1692 if (!ipath_get_rwqe(qp, 1))
1693 goto rnr_nak;
1694 goto send_last_imm;
1695
1696 case OP(SEND_ONLY):
1697 case OP(SEND_ONLY_WITH_IMMEDIATE):
1698 if (!ipath_get_rwqe(qp, 0))
1699 goto rnr_nak;
1700 qp->r_rcv_len = 0;
1701 if (opcode == OP(SEND_ONLY))
1702 goto send_last;
1703 /* FALLTHROUGH */
1704 case OP(SEND_LAST_WITH_IMMEDIATE):
1705 send_last_imm:
1706 if (header_in_data) {
00f7ec36 1707 wc.ex.imm_data = *(__be32 *) data;
97f9efbc
BS
1708 data += sizeof(__be32);
1709 } else {
1710 /* Immediate data comes after BTH */
00f7ec36 1711 wc.ex.imm_data = ohdr->u.imm_data;
97f9efbc
BS
1712 }
1713 hdrsize += 4;
1714 wc.wc_flags = IB_WC_WITH_IMM;
1715 /* FALLTHROUGH */
1716 case OP(SEND_LAST):
1717 case OP(RDMA_WRITE_LAST):
1718 send_last:
1719 /* Get the number of bytes the message was padded by. */
1720 pad = (be32_to_cpu(ohdr->bth[0]) >> 20) & 3;
1721 /* Check for invalid length. */
1722 /* XXX LAST len should be >= 1 */
1723 if (unlikely(tlen < (hdrsize + pad + 4)))
1724 goto nack_inv;
1725 /* Don't count the CRC. */
1726 tlen -= (hdrsize + pad + 4);
1727 wc.byte_len = tlen + qp->r_rcv_len;
1728 if (unlikely(wc.byte_len > qp->r_len))
1729 goto nack_inv;
1730 ipath_copy_sge(&qp->r_sge, data, tlen);
12eef41f 1731 qp->r_msn++;
e509be89 1732 if (!test_and_clear_bit(IPATH_R_WRID_VALID, &qp->r_aflags))
97f9efbc
BS
1733 break;
1734 wc.wr_id = qp->r_wr_id;
1735 wc.status = IB_WC_SUCCESS;
2bfc8e9e
RC
1736 if (opcode == OP(RDMA_WRITE_LAST_WITH_IMMEDIATE) ||
1737 opcode == OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE))
1738 wc.opcode = IB_WC_RECV_RDMA_WITH_IMM;
1739 else
1740 wc.opcode = IB_WC_RECV;
062dbb69 1741 wc.qp = &qp->ibqp;
97f9efbc 1742 wc.src_qp = qp->remote_qpn;
97f9efbc
BS
1743 wc.slid = qp->remote_ah_attr.dlid;
1744 wc.sl = qp->remote_ah_attr.sl;
97f9efbc
BS
1745 /* Signal completion event if the solicited bit is set. */
1746 ipath_cq_enter(to_icq(qp->ibqp.recv_cq), &wc,
1747 (ohdr->bth[0] &
1748 __constant_cpu_to_be32(1 << 23)) != 0);
1749 break;
1750
1751 case OP(RDMA_WRITE_FIRST):
1752 case OP(RDMA_WRITE_ONLY):
1753 case OP(RDMA_WRITE_ONLY_WITH_IMMEDIATE):
b506e1dc
RW
1754 if (unlikely(!(qp->qp_access_flags &
1755 IB_ACCESS_REMOTE_WRITE)))
1756 goto nack_inv;
97f9efbc
BS
1757 /* consume RWQE */
1758 /* RETH comes after BTH */
1759 if (!header_in_data)
1760 reth = &ohdr->u.rc.reth;
1761 else {
1762 reth = (struct ib_reth *)data;
1763 data += sizeof(*reth);
1764 }
1765 hdrsize += sizeof(*reth);
1766 qp->r_len = be32_to_cpu(reth->length);
1767 qp->r_rcv_len = 0;
1768 if (qp->r_len != 0) {
1769 u32 rkey = be32_to_cpu(reth->rkey);
1770 u64 vaddr = be64_to_cpu(reth->vaddr);
1771 int ok;
1772
1773 /* Check rkey & NAK */
6a553af2 1774 ok = ipath_rkey_ok(qp, &qp->r_sge,
97f9efbc
BS
1775 qp->r_len, vaddr, rkey,
1776 IB_ACCESS_REMOTE_WRITE);
12eef41f
BS
1777 if (unlikely(!ok))
1778 goto nack_acc;
97f9efbc
BS
1779 } else {
1780 qp->r_sge.sg_list = NULL;
1781 qp->r_sge.sge.mr = NULL;
1782 qp->r_sge.sge.vaddr = NULL;
1783 qp->r_sge.sge.length = 0;
1784 qp->r_sge.sge.sge_length = 0;
1785 }
97f9efbc
BS
1786 if (opcode == OP(RDMA_WRITE_FIRST))
1787 goto send_middle;
1788 else if (opcode == OP(RDMA_WRITE_ONLY))
1789 goto send_last;
1790 if (!ipath_get_rwqe(qp, 1))
1791 goto rnr_nak;
1792 goto send_last_imm;
1793
3859e39d
RC
1794 case OP(RDMA_READ_REQUEST): {
1795 struct ipath_ack_entry *e;
1796 u32 len;
1797 u8 next;
1798
b506e1dc
RW
1799 if (unlikely(!(qp->qp_access_flags &
1800 IB_ACCESS_REMOTE_READ)))
1801 goto nack_inv;
3859e39d
RC
1802 next = qp->r_head_ack_queue + 1;
1803 if (next > IPATH_MAX_RDMA_ATOMIC)
1804 next = 0;
e509be89
RC
1805 spin_lock_irqsave(&qp->s_lock, flags);
1806 /* Double check we can process this while holding the s_lock. */
1807 if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK))
1808 goto unlock;
d781b129
RC
1809 if (unlikely(next == qp->s_tail_ack_queue)) {
1810 if (!qp->s_ack_queue[next].sent)
e509be89 1811 goto nack_inv_unlck;
d781b129
RC
1812 ipath_update_ack_queue(qp, next);
1813 }
3859e39d 1814 e = &qp->s_ack_queue[qp->r_head_ack_queue];
97f9efbc
BS
1815 /* RETH comes after BTH */
1816 if (!header_in_data)
1817 reth = &ohdr->u.rc.reth;
1818 else {
1819 reth = (struct ib_reth *)data;
1820 data += sizeof(*reth);
1821 }
3859e39d
RC
1822 len = be32_to_cpu(reth->length);
1823 if (len) {
97f9efbc
BS
1824 u32 rkey = be32_to_cpu(reth->rkey);
1825 u64 vaddr = be64_to_cpu(reth->vaddr);
1826 int ok;
1827
1828 /* Check rkey & NAK */
3859e39d
RC
1829 ok = ipath_rkey_ok(qp, &e->rdma_sge, len, vaddr,
1830 rkey, IB_ACCESS_REMOTE_READ);
1831 if (unlikely(!ok))
e509be89 1832 goto nack_acc_unlck;
97f9efbc
BS
1833 /*
1834 * Update the next expected PSN. We add 1 later
1835 * below, so only add the remainder here.
1836 */
3859e39d
RC
1837 if (len > pmtu)
1838 qp->r_psn += (len - 1) / pmtu;
97f9efbc 1839 } else {
3859e39d
RC
1840 e->rdma_sge.sg_list = NULL;
1841 e->rdma_sge.num_sge = 0;
1842 e->rdma_sge.sge.mr = NULL;
1843 e->rdma_sge.sge.vaddr = NULL;
1844 e->rdma_sge.sge.length = 0;
1845 e->rdma_sge.sge.sge_length = 0;
97f9efbc 1846 }
3859e39d 1847 e->opcode = opcode;
d781b129 1848 e->sent = 0;
3859e39d 1849 e->psn = psn;
97f9efbc
BS
1850 /*
1851 * We need to increment the MSN here instead of when we
1852 * finish sending the result since a duplicate request would
1853 * increment it more than once.
1854 */
12eef41f 1855 qp->r_msn++;
97f9efbc
BS
1856 qp->r_psn++;
1857 qp->r_state = opcode;
12eef41f 1858 qp->r_nak_state = 0;
3859e39d 1859 qp->r_head_ack_queue = next;
12eef41f 1860
e509be89
RC
1861 /* Schedule the send tasklet. */
1862 ipath_schedule_send(qp);
12eef41f 1863
e509be89 1864 goto unlock;
3859e39d 1865 }
97f9efbc
BS
1866
1867 case OP(COMPARE_SWAP):
1868 case OP(FETCH_ADD): {
1869 struct ib_atomic_eth *ateth;
3859e39d 1870 struct ipath_ack_entry *e;
97f9efbc 1871 u64 vaddr;
3859e39d 1872 atomic64_t *maddr;
97f9efbc
BS
1873 u64 sdata;
1874 u32 rkey;
3859e39d 1875 u8 next;
97f9efbc 1876
3859e39d
RC
1877 if (unlikely(!(qp->qp_access_flags &
1878 IB_ACCESS_REMOTE_ATOMIC)))
b506e1dc 1879 goto nack_inv;
3859e39d
RC
1880 next = qp->r_head_ack_queue + 1;
1881 if (next > IPATH_MAX_RDMA_ATOMIC)
1882 next = 0;
e509be89
RC
1883 spin_lock_irqsave(&qp->s_lock, flags);
1884 /* Double check we can process this while holding the s_lock. */
1885 if (!(ib_ipath_state_ops[qp->state] & IPATH_PROCESS_RECV_OK))
1886 goto unlock;
d781b129
RC
1887 if (unlikely(next == qp->s_tail_ack_queue)) {
1888 if (!qp->s_ack_queue[next].sent)
e509be89 1889 goto nack_inv_unlck;
d781b129
RC
1890 ipath_update_ack_queue(qp, next);
1891 }
97f9efbc
BS
1892 if (!header_in_data)
1893 ateth = &ohdr->u.atomic_eth;
3859e39d 1894 else
97f9efbc 1895 ateth = (struct ib_atomic_eth *)data;
3859e39d
RC
1896 vaddr = ((u64) be32_to_cpu(ateth->vaddr[0]) << 32) |
1897 be32_to_cpu(ateth->vaddr[1]);
97f9efbc 1898 if (unlikely(vaddr & (sizeof(u64) - 1)))
e509be89 1899 goto nack_inv_unlck;
97f9efbc
BS
1900 rkey = be32_to_cpu(ateth->rkey);
1901 /* Check rkey & NAK */
6a553af2 1902 if (unlikely(!ipath_rkey_ok(qp, &qp->r_sge,
97f9efbc
BS
1903 sizeof(u64), vaddr, rkey,
1904 IB_ACCESS_REMOTE_ATOMIC)))
e509be89 1905 goto nack_acc_unlck;
97f9efbc 1906 /* Perform atomic OP and save result. */
3859e39d 1907 maddr = (atomic64_t *) qp->r_sge.sge.vaddr;
97f9efbc 1908 sdata = be64_to_cpu(ateth->swap_data);
3859e39d
RC
1909 e = &qp->s_ack_queue[qp->r_head_ack_queue];
1910 e->atomic_data = (opcode == OP(FETCH_ADD)) ?
1911 (u64) atomic64_add_return(sdata, maddr) - sdata :
1912 (u64) cmpxchg((u64 *) qp->r_sge.sge.vaddr,
1913 be64_to_cpu(ateth->compare_data),
1914 sdata);
1915 e->opcode = opcode;
d781b129 1916 e->sent = 0;
3859e39d 1917 e->psn = psn & IPATH_PSN_MASK;
12eef41f 1918 qp->r_msn++;
3859e39d
RC
1919 qp->r_psn++;
1920 qp->r_state = opcode;
1921 qp->r_nak_state = 0;
3859e39d
RC
1922 qp->r_head_ack_queue = next;
1923
e509be89
RC
1924 /* Schedule the send tasklet. */
1925 ipath_schedule_send(qp);
3859e39d 1926
e509be89 1927 goto unlock;
97f9efbc
BS
1928 }
1929
1930 default:
3859e39d
RC
1931 /* NAK unknown opcodes. */
1932 goto nack_inv;
97f9efbc
BS
1933 }
1934 qp->r_psn++;
1935 qp->r_state = opcode;
3859e39d 1936 qp->r_ack_psn = psn;
12eef41f 1937 qp->r_nak_state = 0;
97f9efbc 1938 /* Send an ACK if requested or required. */
3859e39d 1939 if (psn & (1 << 31))
12eef41f 1940 goto send_ack;
12eef41f 1941 goto done;
97f9efbc 1942
53dc1ca1
RC
1943rnr_nak:
1944 qp->r_nak_state = IB_RNR_NAK | qp->r_min_rnr_timer;
1945 qp->r_ack_psn = qp->r_psn;
1946 goto send_ack;
1947
e509be89
RC
1948nack_inv_unlck:
1949 spin_unlock_irqrestore(&qp->s_lock, flags);
53dc1ca1
RC
1950nack_inv:
1951 ipath_rc_error(qp, IB_WC_LOC_QP_OP_ERR);
1952 qp->r_nak_state = IB_NAK_INVALID_REQUEST;
1953 qp->r_ack_psn = qp->r_psn;
1954 goto send_ack;
1955
e509be89
RC
1956nack_acc_unlck:
1957 spin_unlock_irqrestore(&qp->s_lock, flags);
12eef41f 1958nack_acc:
53dc1ca1 1959 ipath_rc_error(qp, IB_WC_LOC_PROT_ERR);
3859e39d
RC
1960 qp->r_nak_state = IB_NAK_REMOTE_ACCESS_ERROR;
1961 qp->r_ack_psn = qp->r_psn;
12eef41f 1962send_ack:
3859e39d 1963 send_rc_ack(qp);
e509be89 1964 goto done;
97f9efbc 1965
e509be89
RC
1966unlock:
1967 spin_unlock_irqrestore(&qp->s_lock, flags);
12eef41f 1968done:
97f9efbc
BS
1969 return;
1970}