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hwmon: (w83795) Don't pre-read values we'll update later
[net-next-2.6.git] / drivers / hwmon / w83795.c
CommitLineData
792d376b
WS		 1/*
2 * w83795.c - Linux kernel driver for hardware monitoring
3 * Copyright (C) 2008 Nuvoton Technology Corp.
4 * Wei Song
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation - version 2.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
18 * 02110-1301 USA.
19 *
20 * Supports following chips:
21 *
22 * Chip #vin #fanin #pwm #temp #dts wchipid vendid i2c ISA
23 * w83795g 21 14 8 6 8 0x79 0x5ca3 yes no
24 * w83795adg 18 14 2 6 8 0x79 0x5ca3 yes no
25 */
26
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/init.h>
30#include <linux/slab.h>
31#include <linux/i2c.h>
32#include <linux/hwmon.h>
33#include <linux/hwmon-sysfs.h>
34#include <linux/err.h>
35#include <linux/mutex.h>
36#include <linux/delay.h>
37
38/* Addresses to scan */
86ef4d2f
JD		 39static const unsigned short normal_i2c[] = {
40 0x2c, 0x2d, 0x2e, 0x2f, I2C_CLIENT_END
41};
792d376b 42
792d376b
WS		 43
44static int reset;
45module_param(reset, bool, 0);
46MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
47
48
49#define W83795_REG_BANKSEL 0x00
50#define W83795_REG_VENDORID 0xfd
51#define W83795_REG_CHIPID 0xfe
52#define W83795_REG_DEVICEID 0xfb
2be381de 53#define W83795_REG_DEVICEID_A 0xff
792d376b
WS		 54
55#define W83795_REG_I2C_ADDR 0xfc
56#define W83795_REG_CONFIG 0x01
57#define W83795_REG_CONFIG_CONFIG48 0x04
80646b95 58#define W83795_REG_CONFIG_START 0x01
792d376b
WS		 59
60/* Multi-Function Pin Ctrl Registers */
61#define W83795_REG_VOLT_CTRL1 0x02
62#define W83795_REG_VOLT_CTRL2 0x03
63#define W83795_REG_TEMP_CTRL1 0x04
64#define W83795_REG_TEMP_CTRL2 0x05
65#define W83795_REG_FANIN_CTRL1 0x06
66#define W83795_REG_FANIN_CTRL2 0x07
67#define W83795_REG_VMIGB_CTRL 0x08
68
792d376b
WS		 69#define TEMP_READ 0
70#define TEMP_CRIT 1
71#define TEMP_CRIT_HYST 2
72#define TEMP_WARN 3
73#define TEMP_WARN_HYST 4
74/* only crit and crit_hyst affect real-time alarm status
75 * current crit crit_hyst warn warn_hyst */
86ef4d2f 76static const u16 W83795_REG_TEMP[][5] = {
792d376b
WS		 77 {0x21, 0x96, 0x97, 0x98, 0x99}, /* TD1/TR1 */
78 {0x22, 0x9a, 0x9b, 0x9c, 0x9d}, /* TD2/TR2 */
79 {0x23, 0x9e, 0x9f, 0xa0, 0xa1}, /* TD3/TR3 */
80 {0x24, 0xa2, 0xa3, 0xa4, 0xa5}, /* TD4/TR4 */
81 {0x1f, 0xa6, 0xa7, 0xa8, 0xa9}, /* TR5 */
82 {0x20, 0xaa, 0xab, 0xac, 0xad}, /* TR6 */
83};
84
85#define IN_READ 0
86#define IN_MAX 1
87#define IN_LOW 2
88static const u16 W83795_REG_IN[][3] = {
89 /* Current, HL, LL */
90 {0x10, 0x70, 0x71}, /* VSEN1 */
91 {0x11, 0x72, 0x73}, /* VSEN2 */
92 {0x12, 0x74, 0x75}, /* VSEN3 */
93 {0x13, 0x76, 0x77}, /* VSEN4 */
94 {0x14, 0x78, 0x79}, /* VSEN5 */
95 {0x15, 0x7a, 0x7b}, /* VSEN6 */
96 {0x16, 0x7c, 0x7d}, /* VSEN7 */
97 {0x17, 0x7e, 0x7f}, /* VSEN8 */
98 {0x18, 0x80, 0x81}, /* VSEN9 */
99 {0x19, 0x82, 0x83}, /* VSEN10 */
100 {0x1A, 0x84, 0x85}, /* VSEN11 */
101 {0x1B, 0x86, 0x87}, /* VTT */
102 {0x1C, 0x88, 0x89}, /* 3VDD */
103 {0x1D, 0x8a, 0x8b}, /* 3VSB */
104 {0x1E, 0x8c, 0x8d}, /* VBAT */
105 {0x1F, 0xa6, 0xa7}, /* VSEN12 */
106 {0x20, 0xaa, 0xab}, /* VSEN13 */
107 {0x21, 0x96, 0x97}, /* VSEN14 */
108 {0x22, 0x9a, 0x9b}, /* VSEN15 */
109 {0x23, 0x9e, 0x9f}, /* VSEN16 */
110 {0x24, 0xa2, 0xa3}, /* VSEN17 */
111};
112#define W83795_REG_VRLSB 0x3C
792d376b
WS		 113
114static const u8 W83795_REG_IN_HL_LSB[] = {
115 0x8e, /* VSEN1-4 */
116 0x90, /* VSEN5-8 */
117 0x92, /* VSEN9-11 */
118 0x94, /* VTT, 3VDD, 3VSB, 3VBAT */
119 0xa8, /* VSEN12 */
120 0xac, /* VSEN13 */
121 0x98, /* VSEN14 */
122 0x9c, /* VSEN15 */
123 0xa0, /* VSEN16 */
124 0xa4, /* VSEN17 */
125};
126
127#define IN_LSB_REG(index, type) \
128 (((type) == 1) ? W83795_REG_IN_HL_LSB[(index)] \
129 : (W83795_REG_IN_HL_LSB[(index)] + 1))
130
792d376b
WS		 131#define IN_LSB_SHIFT 0
132#define IN_LSB_IDX 1
133static const u8 IN_LSB_SHIFT_IDX[][2] = {
134 /* High/Low LSB shift, LSB No. */
135 {0x00, 0x00}, /* VSEN1 */
136 {0x02, 0x00}, /* VSEN2 */
137 {0x04, 0x00}, /* VSEN3 */
138 {0x06, 0x00}, /* VSEN4 */
139 {0x00, 0x01}, /* VSEN5 */
140 {0x02, 0x01}, /* VSEN6 */
141 {0x04, 0x01}, /* VSEN7 */
142 {0x06, 0x01}, /* VSEN8 */
143 {0x00, 0x02}, /* VSEN9 */
144 {0x02, 0x02}, /* VSEN10 */
145 {0x04, 0x02}, /* VSEN11 */
146 {0x00, 0x03}, /* VTT */
147 {0x02, 0x03}, /* 3VDD */
148 {0x04, 0x03}, /* 3VSB */
149 {0x06, 0x03}, /* VBAT */
150 {0x06, 0x04}, /* VSEN12 */
151 {0x06, 0x05}, /* VSEN13 */
152 {0x06, 0x06}, /* VSEN14 */
153 {0x06, 0x07}, /* VSEN15 */
154 {0x06, 0x08}, /* VSEN16 */
155 {0x06, 0x09}, /* VSEN17 */
156};
157
158
792d376b
WS		 159#define W83795_REG_FAN(index) (0x2E + (index))
160#define W83795_REG_FAN_MIN_HL(index) (0xB6 + (index))
161#define W83795_REG_FAN_MIN_LSB(index) (0xC4 + (index) / 2)
162#define W83795_REG_FAN_MIN_LSB_SHIFT(index) \
7eb8d508 163 (((index) & 1) ? 4 : 0)
792d376b
WS		 164
165#define W83795_REG_VID_CTRL 0x6A
166
792d376b
WS		 167#define W83795_REG_ALARM(index) (0x41 + (index))
168#define W83795_REG_BEEP(index) (0x50 + (index))
169
170#define W83795_REG_CLR_CHASSIS 0x4D
171
172
792d376b
WS		 173#define W83795_REG_FCMS1 0x201
174#define W83795_REG_FCMS2 0x208
175#define W83795_REG_TFMR(index) (0x202 + (index))
176#define W83795_REG_FOMC 0x20F
792d376b
WS		 177
178#define W83795_REG_TSS(index) (0x209 + (index))
179
180#define PWM_OUTPUT 0
181#define PWM_START 1
182#define PWM_NONSTOP 2
183#define PWM_STOP_TIME 3
01879a85 184#define PWM_FREQ 4
792d376b
WS		 185#define W83795_REG_PWM(index, nr) \
186 (((nr) == 0 ? 0x210 : \
187 (nr) == 1 ? 0x220 : \
188 (nr) == 2 ? 0x228 : \
189 (nr) == 3 ? 0x230 : 0x218) + (index))
190
792d376b
WS		 191#define W83795_REG_FTSH(index) (0x240 + (index) * 2)
192#define W83795_REG_FTSL(index) (0x241 + (index) * 2)
193#define W83795_REG_TFTS 0x250
194
195#define TEMP_PWM_TTTI 0
196#define TEMP_PWM_CTFS 1
197#define TEMP_PWM_HCT 2
198#define TEMP_PWM_HOT 3
199#define W83795_REG_TTTI(index) (0x260 + (index))
200#define W83795_REG_CTFS(index) (0x268 + (index))
201#define W83795_REG_HT(index) (0x270 + (index))
202
203#define SF4_TEMP 0
204#define SF4_PWM 1
205#define W83795_REG_SF4_TEMP(temp_num, index) \
206 (0x280 + 0x10 * (temp_num) + (index))
207#define W83795_REG_SF4_PWM(temp_num, index) \
208 (0x288 + 0x10 * (temp_num) + (index))
209
210#define W83795_REG_DTSC 0x301
211#define W83795_REG_DTSE 0x302
212#define W83795_REG_DTS(index) (0x26 + (index))
54891a3c 213#define W83795_REG_PECI_TBASE(index) (0x320 + (index))
792d376b
WS		 214
215#define DTS_CRIT 0
216#define DTS_CRIT_HYST 1
217#define DTS_WARN 2
218#define DTS_WARN_HYST 3
219#define W83795_REG_DTS_EXT(index) (0xB2 + (index))
220
221#define SETUP_PWM_DEFAULT 0
222#define SETUP_PWM_UPTIME 1
223#define SETUP_PWM_DOWNTIME 2
224#define W83795_REG_SETUP_PWM(index) (0x20C + (index))
225
226static inline u16 in_from_reg(u8 index, u16 val)
227{
49c7347a
JD		 228 /* 3VDD, 3VSB and VBAT: 6 mV/bit; other inputs: 2 mV/bit */
229 if (index >= 12 && index <= 14)
792d376b
WS		 230 return val * 6;
231 else
232 return val * 2;
233}
234
235static inline u16 in_to_reg(u8 index, u16 val)
236{
49c7347a 237 if (index >= 12 && index <= 14)
792d376b
WS		 238 return val / 6;
239 else
240 return val / 2;
241}
242
243static inline unsigned long fan_from_reg(u16 val)
244{
6c82b2f3 245 if ((val == 0xfff) || (val == 0))
792d376b
WS		 246 return 0;
247 return 1350000UL / val;
248}
249
250static inline u16 fan_to_reg(long rpm)
251{
252 if (rpm <= 0)
253 return 0x0fff;
254 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
255}
256
257static inline unsigned long time_from_reg(u8 reg)
258{
259 return reg * 100;
260}
261
262static inline u8 time_to_reg(unsigned long val)
263{
264 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
265}
266
267static inline long temp_from_reg(s8 reg)
268{
269 return reg * 1000;
270}
271
272static inline s8 temp_to_reg(long val, s8 min, s8 max)
273{
dd127f5c 274 return SENSORS_LIMIT(val / 1000, min, max);
792d376b
WS		 275}
276
01879a85
JD		 277static const u16 pwm_freq_cksel0[16] = {
278 1024, 512, 341, 256, 205, 171, 146, 128,
279 85, 64, 32, 16, 8, 4, 2, 1
280};
281
282static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
283{
284 unsigned long base_clock;
285
286 if (reg & 0x80) {
287 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
288 return base_clock / ((reg & 0x7f) + 1);
289 } else
290 return pwm_freq_cksel0[reg & 0x0f];
291}
292
293static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
294{
295 unsigned long base_clock;
296 u8 reg0, reg1;
297 unsigned long best0, best1;
298
299 /* Best fit for cksel = 0 */
300 for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
301 if (val > (pwm_freq_cksel0[reg0] +
302 pwm_freq_cksel0[reg0 + 1]) / 2)
303 break;
304 }
305 if (val < 375) /* cksel = 1 can't beat this */
306 return reg0;
307 best0 = pwm_freq_cksel0[reg0];
308
309 /* Best fit for cksel = 1 */
310 base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
311 reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
312 best1 = base_clock / reg1;
313 reg1 = 0x80 | (reg1 - 1);
314
315 /* Choose the closest one */
316 if (abs(val - best0) > abs(val - best1))
317 return reg1;
318 else
319 return reg0;
320}
792d376b
WS		 321
322enum chip_types {w83795g, w83795adg};
323
324struct w83795_data {
325 struct device *hwmon_dev;
326 struct mutex update_lock;
327 unsigned long last_updated; /* In jiffies */
328 enum chip_types chip_type;
329
330 u8 bank;
331
332 u32 has_in; /* Enable monitor VIN or not */
0e256018 333 u8 has_dyn_in; /* Only in2-0 can have this */
792d376b
WS		 334 u16 in[21][3]; /* Register value, read/high/low */
335 u8 in_lsb[10][3]; /* LSB Register value, high/low */
336 u8 has_gain; /* has gain: in17-20 * 8 */
337
338 u16 has_fan; /* Enable fan14-1 or not */
339 u16 fan[14]; /* Register value combine */
340 u16 fan_min[14]; /* Register value combine */
341
342 u8 has_temp; /* Enable monitor temp6-1 or not */
dd127f5c 343 s8 temp[6][5]; /* current, crit, crit_hyst, warn, warn_hyst */
792d376b 344 u8 temp_read_vrlsb[6];
39deb699 345 u8 temp_mode; /* Bit vector, 0 = TR, 1 = TD */
792d376b
WS		 346 u8 temp_src[3]; /* Register value */
347
348 u8 enable_dts; /* Enable PECI and SB-TSI,
349 * bit 0: =1 enable, =0 disable,
350 * bit 1: =1 AMD SB-TSI, =0 Intel PECI */
351 u8 has_dts; /* Enable monitor DTS temp */
dd127f5c 352 s8 dts[8]; /* Register value */
792d376b 353 u8 dts_read_vrlsb[8]; /* Register value */
dd127f5c 354 s8 dts_ext[4]; /* Register value */
792d376b
WS		 355
356 u8 has_pwm; /* 795g supports 8 pwm, 795adg only supports 2,
357 * no config register, only affected by chip
358 * type */
359 u8 pwm[8][5]; /* Register value, output, start, non stop, stop
01879a85
JD		 360 * time, freq */
361 u16 clkin; /* CLKIN frequency in kHz */
792d376b
WS		 362 u8 pwm_fcms[2]; /* Register value */
363 u8 pwm_tfmr[6]; /* Register value */
364 u8 pwm_fomc; /* Register value */
365
366 u16 target_speed[8]; /* Register value, target speed for speed
367 * cruise */
368 u8 tol_speed; /* tolerance of target speed */
369 u8 pwm_temp[6][4]; /* TTTI, CTFS, HCT, HOT */
370 u8 sf4_reg[6][2][7]; /* 6 temp, temp/dcpwm, 7 registers */
371
372 u8 setup_pwm[3]; /* Register value */
373
374 u8 alarms[6]; /* Register value */
375 u8 beeps[6]; /* Register value */
792d376b
WS		 376
377 char valid;
378};
379
380/*
381 * Hardware access
b2469f42 382 * We assume that nobdody can change the bank outside the driver.
792d376b
WS		 383 */
384
b2469f42
JD		 385/* Must be called with data->update_lock held, except during initialization */
386static int w83795_set_bank(struct i2c_client *client, u8 bank)
792d376b
WS		 387{
388 struct w83795_data *data = i2c_get_clientdata(client);
b2469f42
JD		 389 int err;
390
391 /* If the same bank is already set, nothing to do */
392 if ((data->bank & 0x07) == bank)
393 return 0;
394
395 /* Change to new bank, preserve all other bits */
396 bank |= data->bank & ~0x07;
397 err = i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL, bank);
398 if (err < 0) {
399 dev_err(&client->dev,
400 "Failed to set bank to %d, err %d\n",
401 (int)bank, err);
402 return err;
792d376b 403 }
b2469f42
JD		 404 data->bank = bank;
405
406 return 0;
792d376b
WS		 407}
408
409/* Must be called with data->update_lock held, except during initialization */
b2469f42 410static u8 w83795_read(struct i2c_client *client, u16 reg)
792d376b 411{
b2469f42
JD		 412 int err;
413
414 err = w83795_set_bank(client, reg >> 8);
415 if (err < 0)
416 return 0x00; /* Arbitrary */
417
418 err = i2c_smbus_read_byte_data(client, reg & 0xff);
419 if (err < 0) {
420 dev_err(&client->dev,
421 "Failed to read from register 0x%03x, err %d\n",
422 (int)reg, err);
423 return 0x00; /* Arbitrary */
792d376b 424 }
b2469f42
JD		 425 return err;
426}
792d376b 427
b2469f42
JD		 428/* Must be called with data->update_lock held, except during initialization */
429static int w83795_write(struct i2c_client *client, u16 reg, u8 value)
430{
431 int err;
432
433 err = w83795_set_bank(client, reg >> 8);
434 if (err < 0)
435 return err;
436
437 err = i2c_smbus_write_byte_data(client, reg & 0xff, value);
438 if (err < 0)
439 dev_err(&client->dev,
440 "Failed to write to register 0x%03x, err %d\n",
441 (int)reg, err);
442 return err;
792d376b
WS		 443}
444
445static struct w83795_data *w83795_update_device(struct device *dev)
446{
447 struct i2c_client *client = to_i2c_client(dev);
448 struct w83795_data *data = i2c_get_clientdata(client);
449 u16 tmp;
450 int i;
451
452 mutex_lock(&data->update_lock);
453
454 if (!(time_after(jiffies, data->last_updated + HZ * 2)
455 || !data->valid))
456 goto END;
457
458 /* Update the voltages value */
459 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
460 if (!(data->has_in & (1 << i)))
461 continue;
462 tmp = w83795_read(client, W83795_REG_IN[i][IN_READ]) << 2;
a654b9d4 463 tmp |= w83795_read(client, W83795_REG_VRLSB) >> 6;
792d376b
WS		 464 data->in[i][IN_READ] = tmp;
465 }
466
0e256018
JD		 467 /* in0-2 can have dynamic limits (W83795G only) */
468 if (data->has_dyn_in) {
469 u8 lsb_max = w83795_read(client, IN_LSB_REG(0, IN_MAX));
470 u8 lsb_low = w83795_read(client, IN_LSB_REG(0, IN_LOW));
471
472 for (i = 0; i < 3; i++) {
473 if (!(data->has_dyn_in & (1 << i)))
474 continue;
475 data->in[i][IN_MAX] =
476 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
477 data->in[i][IN_LOW] =
478 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
479 data->in_lsb[i][IN_MAX] = (lsb_max >> (2 * i)) & 0x03;
480 data->in_lsb[i][IN_LOW] = (lsb_low >> (2 * i)) & 0x03;
481 }
482 }
483
792d376b
WS		 484 /* Update fan */
485 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
486 if (!(data->has_fan & (1 << i)))
487 continue;
488 data->fan[i] = w83795_read(client, W83795_REG_FAN(i)) << 4;
489 data->fan[i] |=
6c82b2f3 490 (w83795_read(client, W83795_REG_VRLSB) >> 4) & 0x0F;
792d376b
WS		 491 }
492
493 /* Update temperature */
494 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
792d376b
WS		 495 data->temp[i][TEMP_READ] =
496 w83795_read(client, W83795_REG_TEMP[i][TEMP_READ]);
497 data->temp_read_vrlsb[i] =
498 w83795_read(client, W83795_REG_VRLSB);
499 }
500
501 /* Update dts temperature */
502 if (data->enable_dts != 0) {
503 for (i = 0; i < ARRAY_SIZE(data->dts); i++) {
504 if (!(data->has_dts & (1 << i)))
505 continue;
506 data->dts[i] =
507 w83795_read(client, W83795_REG_DTS(i));
508 data->dts_read_vrlsb[i] =
509 w83795_read(client, W83795_REG_VRLSB);
510 }
511 }
512
513 /* Update pwm output */
514 for (i = 0; i < data->has_pwm; i++) {
515 data->pwm[i][PWM_OUTPUT] =
516 w83795_read(client, W83795_REG_PWM(i, PWM_OUTPUT));
517 }
518
519 /* update alarm */
cd316df5 520 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
792d376b
WS		 521 data->alarms[i] = w83795_read(client, W83795_REG_ALARM(i));
522
523 data->last_updated = jiffies;
524 data->valid = 1;
525
526END:
527 mutex_unlock(&data->update_lock);
528 return data;
529}
530
531/*
532 * Sysfs attributes
533 */
534
535#define ALARM_STATUS 0
536#define BEEP_ENABLE 1
537static ssize_t
538show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
539{
540 struct w83795_data *data = w83795_update_device(dev);
541 struct sensor_device_attribute_2 *sensor_attr =
542 to_sensor_dev_attr_2(attr);
543 int nr = sensor_attr->nr;
544 int index = sensor_attr->index >> 3;
545 int bit = sensor_attr->index & 0x07;
546 u8 val;
547
548 if (ALARM_STATUS == nr) {
549 val = (data->alarms[index] >> (bit)) & 1;
550 } else { /* BEEP_ENABLE */
551 val = (data->beeps[index] >> (bit)) & 1;
552 }
553
554 return sprintf(buf, "%u\n", val);
555}
556
557static ssize_t
558store_beep(struct device *dev, struct device_attribute *attr,
559 const char *buf, size_t count)
560{
561 struct i2c_client *client = to_i2c_client(dev);
562 struct w83795_data *data = i2c_get_clientdata(client);
563 struct sensor_device_attribute_2 *sensor_attr =
564 to_sensor_dev_attr_2(attr);
565 int index = sensor_attr->index >> 3;
566 int shift = sensor_attr->index & 0x07;
567 u8 beep_bit = 1 << shift;
568 unsigned long val;
569
570 if (strict_strtoul(buf, 10, &val) < 0)
571 return -EINVAL;
572 if (val != 0 && val != 1)
573 return -EINVAL;
574
575 mutex_lock(&data->update_lock);
576 data->beeps[index] = w83795_read(client, W83795_REG_BEEP(index));
577 data->beeps[index] &= ~beep_bit;
578 data->beeps[index] |= val << shift;
579 w83795_write(client, W83795_REG_BEEP(index), data->beeps[index]);
580 mutex_unlock(&data->update_lock);
581
582 return count;
583}
584
792d376b
WS		 585/* Write any value to clear chassis alarm */
586static ssize_t
587store_chassis_clear(struct device *dev,
588 struct device_attribute *attr, const char *buf,
589 size_t count)
590{
591 struct i2c_client *client = to_i2c_client(dev);
592 struct w83795_data *data = i2c_get_clientdata(client);
593 u8 val;
594
595 mutex_lock(&data->update_lock);
596 val = w83795_read(client, W83795_REG_CLR_CHASSIS);
597 val |= 0x80;
598 w83795_write(client, W83795_REG_CLR_CHASSIS, val);
599 mutex_unlock(&data->update_lock);
600 return count;
601}
602
603#define FAN_INPUT 0
604#define FAN_MIN 1
605static ssize_t
606show_fan(struct device *dev, struct device_attribute *attr, char *buf)
607{
608 struct sensor_device_attribute_2 *sensor_attr =
609 to_sensor_dev_attr_2(attr);
610 int nr = sensor_attr->nr;
611 int index = sensor_attr->index;
612 struct w83795_data *data = w83795_update_device(dev);
613 u16 val;
614
615 if (FAN_INPUT == nr)
616 val = data->fan[index] & 0x0fff;
617 else
618 val = data->fan_min[index] & 0x0fff;
619
620 return sprintf(buf, "%lu\n", fan_from_reg(val));
621}
622
623static ssize_t
624store_fan_min(struct device *dev, struct device_attribute *attr,
625 const char *buf, size_t count)
626{
627 struct sensor_device_attribute_2 *sensor_attr =
628 to_sensor_dev_attr_2(attr);
629 int index = sensor_attr->index;
630 struct i2c_client *client = to_i2c_client(dev);
631 struct w83795_data *data = i2c_get_clientdata(client);
632 unsigned long val;
633
634 if (strict_strtoul(buf, 10, &val))
635 return -EINVAL;
636 val = fan_to_reg(val);
637
638 mutex_lock(&data->update_lock);
639 data->fan_min[index] = val;
640 w83795_write(client, W83795_REG_FAN_MIN_HL(index), (val >> 4) & 0xff);
641 val &= 0x0f;
7eb8d508 642 if (index & 1) {
792d376b
WS		 643 val <<= 4;
644 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
645 & 0x0f;
646 } else {
647 val |= w83795_read(client, W83795_REG_FAN_MIN_LSB(index))
648 & 0xf0;
649 }
650 w83795_write(client, W83795_REG_FAN_MIN_LSB(index), val & 0xff);
651 mutex_unlock(&data->update_lock);
652
653 return count;
654}
655
656static ssize_t
657show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
658{
659 struct w83795_data *data = w83795_update_device(dev);
660 struct sensor_device_attribute_2 *sensor_attr =
661 to_sensor_dev_attr_2(attr);
662 int nr = sensor_attr->nr;
663 int index = sensor_attr->index;
01879a85 664 unsigned int val;
792d376b
WS		 665
666 switch (nr) {
667 case PWM_STOP_TIME:
668 val = time_from_reg(data->pwm[index][nr]);
669 break;
01879a85
JD		 670 case PWM_FREQ:
671 val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
792d376b
WS		 672 break;
673 default:
674 val = data->pwm[index][nr];
675 break;
676 }
677
678 return sprintf(buf, "%u\n", val);
679}
680
681static ssize_t
682store_pwm(struct device *dev, struct device_attribute *attr,
683 const char *buf, size_t count)
684{
685 struct i2c_client *client = to_i2c_client(dev);
686 struct w83795_data *data = i2c_get_clientdata(client);
687 struct sensor_device_attribute_2 *sensor_attr =
688 to_sensor_dev_attr_2(attr);
689 int nr = sensor_attr->nr;
690 int index = sensor_attr->index;
691 unsigned long val;
792d376b
WS		 692
693 if (strict_strtoul(buf, 10, &val) < 0)
694 return -EINVAL;
695
696 mutex_lock(&data->update_lock);
697 switch (nr) {
698 case PWM_STOP_TIME:
699 val = time_to_reg(val);
700 break;
01879a85
JD		 701 case PWM_FREQ:
702 val = pwm_freq_to_reg(val, data->clkin);
792d376b
WS		 703 break;
704 default:
705 val = SENSORS_LIMIT(val, 0, 0xff);
706 break;
707 }
708 w83795_write(client, W83795_REG_PWM(index, nr), val);
01879a85 709 data->pwm[index][nr] = val;
792d376b
WS		 710 mutex_unlock(&data->update_lock);
711 return count;
792d376b
WS		 712}
713
714static ssize_t
715show_pwm_enable(struct device *dev, struct device_attribute *attr, char *buf)
716{
717 struct sensor_device_attribute_2 *sensor_attr =
718 to_sensor_dev_attr_2(attr);
719 struct i2c_client *client = to_i2c_client(dev);
720 struct w83795_data *data = i2c_get_clientdata(client);
721 int index = sensor_attr->index;
722 u8 tmp;
723
724 if (1 == (data->pwm_fcms[0] & (1 << index))) {
725 tmp = 2;
726 goto out;
727 }
728 for (tmp = 0; tmp < 6; tmp++) {
729 if (data->pwm_tfmr[tmp] & (1 << index)) {
730 tmp = 3;
731 goto out;
732 }
733 }
734 if (data->pwm_fomc & (1 << index))
735 tmp = 0;
736 else
737 tmp = 1;
738
739out:
740 return sprintf(buf, "%u\n", tmp);
741}
742
743static ssize_t
744store_pwm_enable(struct device *dev, struct device_attribute *attr,
745 const char *buf, size_t count)
746{
747 struct i2c_client *client = to_i2c_client(dev);
748 struct w83795_data *data = i2c_get_clientdata(client);
749 struct sensor_device_attribute_2 *sensor_attr =
750 to_sensor_dev_attr_2(attr);
751 int index = sensor_attr->index;
752 unsigned long val;
753 int i;
754
755 if (strict_strtoul(buf, 10, &val) < 0)
756 return -EINVAL;
757 if (val > 2)
758 return -EINVAL;
759
760 mutex_lock(&data->update_lock);
761 switch (val) {
762 case 0:
763 case 1:
764 data->pwm_fcms[0] &= ~(1 << index);
765 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
766 for (i = 0; i < 6; i++) {
767 data->pwm_tfmr[i] &= ~(1 << index);
768 w83795_write(client, W83795_REG_TFMR(i),
769 data->pwm_tfmr[i]);
770 }
771 data->pwm_fomc |= 1 << index;
772 data->pwm_fomc ^= val << index;
773 w83795_write(client, W83795_REG_FOMC, data->pwm_fomc);
774 break;
775 case 2:
776 data->pwm_fcms[0] |= (1 << index);
777 w83795_write(client, W83795_REG_FCMS1, data->pwm_fcms[0]);
778 break;
779 }
780 mutex_unlock(&data->update_lock);
781 return count;
792d376b
WS		 782}
783
784static ssize_t
785show_temp_src(struct device *dev, struct device_attribute *attr, char *buf)
786{
787 struct sensor_device_attribute_2 *sensor_attr =
788 to_sensor_dev_attr_2(attr);
789 struct i2c_client *client = to_i2c_client(dev);
790 struct w83795_data *data = i2c_get_clientdata(client);
791 int index = sensor_attr->index;
792 u8 val = index / 2;
793 u8 tmp = data->temp_src[val];
794
7eb8d508 795 if (index & 1)
792d376b
WS		 796 val = 4;
797 else
798 val = 0;
799 tmp >>= val;
800 tmp &= 0x0f;
801
802 return sprintf(buf, "%u\n", tmp);
803}
804
805static ssize_t
806store_temp_src(struct device *dev, struct device_attribute *attr,
807 const char *buf, size_t count)
808{
809 struct i2c_client *client = to_i2c_client(dev);
810 struct w83795_data *data = i2c_get_clientdata(client);
811 struct sensor_device_attribute_2 *sensor_attr =
812 to_sensor_dev_attr_2(attr);
813 int index = sensor_attr->index;
814 unsigned long tmp;
815 u8 val = index / 2;
816
817 if (strict_strtoul(buf, 10, &tmp) < 0)
818 return -EINVAL;
819 tmp = SENSORS_LIMIT(tmp, 0, 15);
820
821 mutex_lock(&data->update_lock);
7eb8d508 822 if (index & 1) {
792d376b
WS		 823 tmp <<= 4;
824 data->temp_src[val] &= 0x0f;
825 } else {
826 data->temp_src[val] &= 0xf0;
827 }
828 data->temp_src[val] |= tmp;
829 w83795_write(client, W83795_REG_TSS(val), data->temp_src[val]);
830 mutex_unlock(&data->update_lock);
831
832 return count;
833}
834
835#define TEMP_PWM_ENABLE 0
836#define TEMP_PWM_FAN_MAP 1
837static ssize_t
838show_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
839 char *buf)
840{
841 struct i2c_client *client = to_i2c_client(dev);
842 struct w83795_data *data = i2c_get_clientdata(client);
843 struct sensor_device_attribute_2 *sensor_attr =
844 to_sensor_dev_attr_2(attr);
845 int nr = sensor_attr->nr;
846 int index = sensor_attr->index;
847 u8 tmp = 0xff;
848
849 switch (nr) {
850 case TEMP_PWM_ENABLE:
851 tmp = (data->pwm_fcms[1] >> index) & 1;
852 if (tmp)
853 tmp = 4;
854 else
855 tmp = 3;
856 break;
857 case TEMP_PWM_FAN_MAP:
858 tmp = data->pwm_tfmr[index];
859 break;
860 }
861
862 return sprintf(buf, "%u\n", tmp);
863}
864
865static ssize_t
866store_temp_pwm_enable(struct device *dev, struct device_attribute *attr,
867 const char *buf, size_t count)
868{
869 struct i2c_client *client = to_i2c_client(dev);
870 struct w83795_data *data = i2c_get_clientdata(client);
871 struct sensor_device_attribute_2 *sensor_attr =
872 to_sensor_dev_attr_2(attr);
873 int nr = sensor_attr->nr;
874 int index = sensor_attr->index;
875 unsigned long tmp;
876
877 if (strict_strtoul(buf, 10, &tmp) < 0)
878 return -EINVAL;
879
880 switch (nr) {
881 case TEMP_PWM_ENABLE:
882 if ((tmp != 3) && (tmp != 4))
883 return -EINVAL;
884 tmp -= 3;
885 mutex_lock(&data->update_lock);
886 data->pwm_fcms[1] &= ~(1 << index);
887 data->pwm_fcms[1] |= tmp << index;
888 w83795_write(client, W83795_REG_FCMS2, data->pwm_fcms[1]);
889 mutex_unlock(&data->update_lock);
890 break;
891 case TEMP_PWM_FAN_MAP:
892 mutex_lock(&data->update_lock);
893 tmp = SENSORS_LIMIT(tmp, 0, 0xff);
894 w83795_write(client, W83795_REG_TFMR(index), tmp);
895 data->pwm_tfmr[index] = tmp;
896 mutex_unlock(&data->update_lock);
897 break;
898 }
899 return count;
900}
901
902#define FANIN_TARGET 0
903#define FANIN_TOL 1
904static ssize_t
905show_fanin(struct device *dev, struct device_attribute *attr, char *buf)
906{
907 struct i2c_client *client = to_i2c_client(dev);
908 struct w83795_data *data = i2c_get_clientdata(client);
909 struct sensor_device_attribute_2 *sensor_attr =
910 to_sensor_dev_attr_2(attr);
911 int nr = sensor_attr->nr;
912 int index = sensor_attr->index;
913 u16 tmp = 0;
914
915 switch (nr) {
916 case FANIN_TARGET:
917 tmp = fan_from_reg(data->target_speed[index]);
918 break;
919 case FANIN_TOL:
920 tmp = data->tol_speed;
921 break;
922 }
923
924 return sprintf(buf, "%u\n", tmp);
925}
926
927static ssize_t
928store_fanin(struct device *dev, struct device_attribute *attr,
929 const char *buf, size_t count)
930{
931 struct i2c_client *client = to_i2c_client(dev);
932 struct w83795_data *data = i2c_get_clientdata(client);
933 struct sensor_device_attribute_2 *sensor_attr =
934 to_sensor_dev_attr_2(attr);
935 int nr = sensor_attr->nr;
936 int index = sensor_attr->index;
937 unsigned long val;
938
939 if (strict_strtoul(buf, 10, &val) < 0)
940 return -EINVAL;
941
942 mutex_lock(&data->update_lock);
943 switch (nr) {
944 case FANIN_TARGET:
945 val = fan_to_reg(SENSORS_LIMIT(val, 0, 0xfff));
946 w83795_write(client, W83795_REG_FTSH(index), (val >> 4) & 0xff);
947 w83795_write(client, W83795_REG_FTSL(index), (val << 4) & 0xf0);
948 data->target_speed[index] = val;
949 break;
950 case FANIN_TOL:
951 val = SENSORS_LIMIT(val, 0, 0x3f);
952 w83795_write(client, W83795_REG_TFTS, val);
953 data->tol_speed = val;
954 break;
955 }
956 mutex_unlock(&data->update_lock);
957
958 return count;
959}
960
961
962static ssize_t
963show_temp_pwm(struct device *dev, struct device_attribute *attr, char *buf)
964{
965 struct i2c_client *client = to_i2c_client(dev);
966 struct w83795_data *data = i2c_get_clientdata(client);
967 struct sensor_device_attribute_2 *sensor_attr =
968 to_sensor_dev_attr_2(attr);
969 int nr = sensor_attr->nr;
970 int index = sensor_attr->index;
971 long tmp = temp_from_reg(data->pwm_temp[index][nr]);
972
973 return sprintf(buf, "%ld\n", tmp);
974}
975
976static ssize_t
977store_temp_pwm(struct device *dev, struct device_attribute *attr,
978 const char *buf, size_t count)
979{
980 struct i2c_client *client = to_i2c_client(dev);
981 struct w83795_data *data = i2c_get_clientdata(client);
982 struct sensor_device_attribute_2 *sensor_attr =
983 to_sensor_dev_attr_2(attr);
984 int nr = sensor_attr->nr;
985 int index = sensor_attr->index;
986 unsigned long val;
987 u8 tmp;
988
989 if (strict_strtoul(buf, 10, &val) < 0)
990 return -EINVAL;
991 val /= 1000;
992
993 mutex_lock(&data->update_lock);
994 switch (nr) {
995 case TEMP_PWM_TTTI:
996 val = SENSORS_LIMIT(val, 0, 0x7f);
997 w83795_write(client, W83795_REG_TTTI(index), val);
998 break;
999 case TEMP_PWM_CTFS:
1000 val = SENSORS_LIMIT(val, 0, 0x7f);
1001 w83795_write(client, W83795_REG_CTFS(index), val);
1002 break;
1003 case TEMP_PWM_HCT:
1004 val = SENSORS_LIMIT(val, 0, 0x0f);
1005 tmp = w83795_read(client, W83795_REG_HT(index));
1006 tmp &= 0x0f;
1007 tmp |= (val << 4) & 0xf0;
1008 w83795_write(client, W83795_REG_HT(index), tmp);
1009 break;
1010 case TEMP_PWM_HOT:
1011 val = SENSORS_LIMIT(val, 0, 0x0f);
1012 tmp = w83795_read(client, W83795_REG_HT(index));
1013 tmp &= 0xf0;
1014 tmp |= val & 0x0f;
1015 w83795_write(client, W83795_REG_HT(index), tmp);
1016 break;
1017 }
1018 data->pwm_temp[index][nr] = val;
1019 mutex_unlock(&data->update_lock);
1020
1021 return count;
1022}
1023
1024static ssize_t
1025show_sf4_pwm(struct device *dev, struct device_attribute *attr, char *buf)
1026{
1027 struct i2c_client *client = to_i2c_client(dev);
1028 struct w83795_data *data = i2c_get_clientdata(client);
1029 struct sensor_device_attribute_2 *sensor_attr =
1030 to_sensor_dev_attr_2(attr);
1031 int nr = sensor_attr->nr;
1032 int index = sensor_attr->index;
1033
1034 return sprintf(buf, "%u\n", data->sf4_reg[index][SF4_PWM][nr]);
1035}
1036
1037static ssize_t
1038store_sf4_pwm(struct device *dev, struct device_attribute *attr,
1039 const char *buf, size_t count)
1040{
1041 struct i2c_client *client = to_i2c_client(dev);
1042 struct w83795_data *data = i2c_get_clientdata(client);
1043 struct sensor_device_attribute_2 *sensor_attr =
1044 to_sensor_dev_attr_2(attr);
1045 int nr = sensor_attr->nr;
1046 int index = sensor_attr->index;
1047 unsigned long val;
1048
1049 if (strict_strtoul(buf, 10, &val) < 0)
1050 return -EINVAL;
1051
1052 mutex_lock(&data->update_lock);
1053 w83795_write(client, W83795_REG_SF4_PWM(index, nr), val);
1054 data->sf4_reg[index][SF4_PWM][nr] = val;
1055 mutex_unlock(&data->update_lock);
1056
1057 return count;
1058}
1059
1060static ssize_t
1061show_sf4_temp(struct device *dev, struct device_attribute *attr, char *buf)
1062{
1063 struct i2c_client *client = to_i2c_client(dev);
1064 struct w83795_data *data = i2c_get_clientdata(client);
1065 struct sensor_device_attribute_2 *sensor_attr =
1066 to_sensor_dev_attr_2(attr);
1067 int nr = sensor_attr->nr;
1068 int index = sensor_attr->index;
1069
1070 return sprintf(buf, "%u\n",
1071 (data->sf4_reg[index][SF4_TEMP][nr]) * 1000);
1072}
1073
1074static ssize_t
1075store_sf4_temp(struct device *dev, struct device_attribute *attr,
1076 const char *buf, size_t count)
1077{
1078 struct i2c_client *client = to_i2c_client(dev);
1079 struct w83795_data *data = i2c_get_clientdata(client);
1080 struct sensor_device_attribute_2 *sensor_attr =
1081 to_sensor_dev_attr_2(attr);
1082 int nr = sensor_attr->nr;
1083 int index = sensor_attr->index;
1084 unsigned long val;
1085
1086 if (strict_strtoul(buf, 10, &val) < 0)
1087 return -EINVAL;
1088 val /= 1000;
1089
1090 mutex_lock(&data->update_lock);
1091 w83795_write(client, W83795_REG_SF4_TEMP(index, nr), val);
1092 data->sf4_reg[index][SF4_TEMP][nr] = val;
1093 mutex_unlock(&data->update_lock);
1094
1095 return count;
1096}
1097
1098
1099static ssize_t
1100show_temp(struct device *dev, struct device_attribute *attr, char *buf)
1101{
1102 struct sensor_device_attribute_2 *sensor_attr =
1103 to_sensor_dev_attr_2(attr);
1104 int nr = sensor_attr->nr;
1105 int index = sensor_attr->index;
1106 struct w83795_data *data = w83795_update_device(dev);
dd127f5c 1107 long temp = temp_from_reg(data->temp[index][nr]);
792d376b
WS		 1108
1109 if (TEMP_READ == nr)
a654b9d4 1110 temp += (data->temp_read_vrlsb[index] >> 6) * 250;
792d376b
WS		 1111 return sprintf(buf, "%ld\n", temp);
1112}
1113
1114static ssize_t
1115store_temp(struct device *dev, struct device_attribute *attr,
1116 const char *buf, size_t count)
1117{
1118 struct sensor_device_attribute_2 *sensor_attr =
1119 to_sensor_dev_attr_2(attr);
1120 int nr = sensor_attr->nr;
1121 int index = sensor_attr->index;
1122 struct i2c_client *client = to_i2c_client(dev);
1123 struct w83795_data *data = i2c_get_clientdata(client);
1124 long tmp;
1125
1126 if (strict_strtol(buf, 10, &tmp) < 0)
1127 return -EINVAL;
1128
1129 mutex_lock(&data->update_lock);
1130 data->temp[index][nr] = temp_to_reg(tmp, -128, 127);
1131 w83795_write(client, W83795_REG_TEMP[index][nr], data->temp[index][nr]);
1132 mutex_unlock(&data->update_lock);
1133 return count;
1134}
1135
1136
1137static ssize_t
1138show_dts_mode(struct device *dev, struct device_attribute *attr, char *buf)
1139{
1140 struct i2c_client *client = to_i2c_client(dev);
1141 struct w83795_data *data = i2c_get_clientdata(client);
39deb699 1142 int tmp;
792d376b 1143
39deb699
JD		 1144 if (data->enable_dts & 2)
1145 tmp = 5;
1146 else
1147 tmp = 6;
792d376b
WS		 1148
1149 return sprintf(buf, "%d\n", tmp);
1150}
1151
1152static ssize_t
1153show_dts(struct device *dev, struct device_attribute *attr, char *buf)
1154{
1155 struct sensor_device_attribute_2 *sensor_attr =
1156 to_sensor_dev_attr_2(attr);
1157 int index = sensor_attr->index;
1158 struct w83795_data *data = w83795_update_device(dev);
dd127f5c 1159 long temp = temp_from_reg(data->dts[index]);
792d376b 1160
a654b9d4 1161 temp += (data->dts_read_vrlsb[index] >> 6) * 250;
792d376b
WS		 1162 return sprintf(buf, "%ld\n", temp);
1163}
1164
1165static ssize_t
1166show_dts_ext(struct device *dev, struct device_attribute *attr, char *buf)
1167{
1168 struct sensor_device_attribute_2 *sensor_attr =
1169 to_sensor_dev_attr_2(attr);
1170 int nr = sensor_attr->nr;
1171 struct i2c_client *client = to_i2c_client(dev);
1172 struct w83795_data *data = i2c_get_clientdata(client);
dd127f5c 1173 long temp = temp_from_reg(data->dts_ext[nr]);
792d376b 1174
792d376b
WS		 1175 return sprintf(buf, "%ld\n", temp);
1176}
1177
1178static ssize_t
1179store_dts_ext(struct device *dev, struct device_attribute *attr,
1180 const char *buf, size_t count)
1181{
1182 struct sensor_device_attribute_2 *sensor_attr =
1183 to_sensor_dev_attr_2(attr);
1184 int nr = sensor_attr->nr;
1185 struct i2c_client *client = to_i2c_client(dev);
1186 struct w83795_data *data = i2c_get_clientdata(client);
1187 long tmp;
1188
1189 if (strict_strtol(buf, 10, &tmp) < 0)
1190 return -EINVAL;
1191
1192 mutex_lock(&data->update_lock);
1193 data->dts_ext[nr] = temp_to_reg(tmp, -128, 127);
1194 w83795_write(client, W83795_REG_DTS_EXT(nr), data->dts_ext[nr]);
1195 mutex_unlock(&data->update_lock);
1196 return count;
1197}
1198
1199
792d376b
WS		 1200static ssize_t
1201show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
1202{
1203 struct i2c_client *client = to_i2c_client(dev);
1204 struct w83795_data *data = i2c_get_clientdata(client);
1205 struct sensor_device_attribute_2 *sensor_attr =
1206 to_sensor_dev_attr_2(attr);
1207 int index = sensor_attr->index;
39deb699 1208 int tmp;
792d376b 1209
39deb699
JD		 1210 if (data->temp_mode & (1 << index))
1211 tmp = 3; /* Thermal diode */
1212 else
1213 tmp = 4; /* Thermistor */
792d376b
WS		 1214
1215 return sprintf(buf, "%d\n", tmp);
1216}
1217
39deb699 1218/* Only for temp1-4 (temp5-6 can only be thermistor) */
792d376b
WS		 1219static ssize_t
1220store_temp_mode(struct device *dev, struct device_attribute *attr,
1221 const char *buf, size_t count)
1222{
1223 struct i2c_client *client = to_i2c_client(dev);
1224 struct w83795_data *data = i2c_get_clientdata(client);
1225 struct sensor_device_attribute_2 *sensor_attr =
1226 to_sensor_dev_attr_2(attr);
1227 int index = sensor_attr->index;
39deb699 1228 int reg_shift;
792d376b
WS		 1229 unsigned long val;
1230 u8 tmp;
792d376b
WS		 1231
1232 if (strict_strtoul(buf, 10, &val) < 0)
1233 return -EINVAL;
1234 if ((val != 4) && (val != 3))
1235 return -EINVAL;
792d376b
WS		 1236
1237 mutex_lock(&data->update_lock);
1238 if (val == 3) {
39deb699
JD		 1239 /* Thermal diode */
1240 val = 0x01;
792d376b
WS		 1241 data->temp_mode |= 1 << index;
1242 } else if (val == 4) {
39deb699
JD		 1243 /* Thermistor */
1244 val = 0x03;
1245 data->temp_mode &= ~(1 << index);
792d376b
WS		 1246 }
1247
39deb699
JD		 1248 reg_shift = 2 * index;
1249 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
1250 tmp &= ~(0x03 << reg_shift);
1251 tmp |= val << reg_shift;
1252 w83795_write(client, W83795_REG_TEMP_CTRL2, tmp);
792d376b
WS		 1253
1254 mutex_unlock(&data->update_lock);
1255 return count;
1256}
1257
1258
1259/* show/store VIN */
1260static ssize_t
1261show_in(struct device *dev, struct device_attribute *attr, char *buf)
1262{
1263 struct sensor_device_attribute_2 *sensor_attr =
1264 to_sensor_dev_attr_2(attr);
1265 int nr = sensor_attr->nr;
1266 int index = sensor_attr->index;
1267 struct w83795_data *data = w83795_update_device(dev);
1268 u16 val = data->in[index][nr];
1269 u8 lsb_idx;
1270
1271 switch (nr) {
1272 case IN_READ:
1273 /* calculate this value again by sensors as sensors3.conf */
1274 if ((index >= 17) &&
6f9dfd85 1275 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1276 val *= 8;
1277 break;
1278 case IN_MAX:
1279 case IN_LOW:
1280 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1281 val <<= 2;
1282 val |= (data->in_lsb[lsb_idx][nr] >>
1283 IN_LSB_SHIFT_IDX[lsb_idx][IN_LSB_SHIFT]) & 0x03;
1284 if ((index >= 17) &&
6f9dfd85 1285 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1286 val *= 8;
1287 break;
1288 }
1289 val = in_from_reg(index, val);
1290
1291 return sprintf(buf, "%d\n", val);
1292}
1293
1294static ssize_t
1295store_in(struct device *dev, struct device_attribute *attr,
1296 const char *buf, size_t count)
1297{
1298 struct sensor_device_attribute_2 *sensor_attr =
1299 to_sensor_dev_attr_2(attr);
1300 int nr = sensor_attr->nr;
1301 int index = sensor_attr->index;
1302 struct i2c_client *client = to_i2c_client(dev);
1303 struct w83795_data *data = i2c_get_clientdata(client);
1304 unsigned long val;
1305 u8 tmp;
1306 u8 lsb_idx;
1307
1308 if (strict_strtoul(buf, 10, &val) < 0)
1309 return -EINVAL;
1310 val = in_to_reg(index, val);
1311
1312 if ((index >= 17) &&
6f9dfd85 1313 !((data->has_gain >> (index - 17)) & 1))
792d376b
WS		 1314 val /= 8;
1315 val = SENSORS_LIMIT(val, 0, 0x3FF);
1316 mutex_lock(&data->update_lock);
1317
1318 lsb_idx = IN_LSB_SHIFT_IDX[index][IN_LSB_IDX];
1319 tmp = w83795_read(client, IN_LSB_REG(lsb_idx, nr));
1320 tmp &= ~(0x03 << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT]);
1321 tmp |= (val & 0x03) << IN_LSB_SHIFT_IDX[index][IN_LSB_SHIFT];
1322 w83795_write(client, IN_LSB_REG(lsb_idx, nr), tmp);
1323 data->in_lsb[lsb_idx][nr] = tmp;
1324
1325 tmp = (val >> 2) & 0xff;
1326 w83795_write(client, W83795_REG_IN[index][nr], tmp);
1327 data->in[index][nr] = tmp;
1328
1329 mutex_unlock(&data->update_lock);
1330 return count;
1331}
1332
1333
1334static ssize_t
1335show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
1336{
1337 struct sensor_device_attribute_2 *sensor_attr =
1338 to_sensor_dev_attr_2(attr);
1339 int nr = sensor_attr->nr;
1340 struct i2c_client *client = to_i2c_client(dev);
1341 struct w83795_data *data = i2c_get_clientdata(client);
1342 u16 val = data->setup_pwm[nr];
1343
1344 switch (nr) {
1345 case SETUP_PWM_UPTIME:
1346 case SETUP_PWM_DOWNTIME:
1347 val = time_from_reg(val);
1348 break;
1349 }
1350
1351 return sprintf(buf, "%d\n", val);
1352}
1353
1354static ssize_t
1355store_sf_setup(struct device *dev, struct device_attribute *attr,
1356 const char *buf, size_t count)
1357{
1358 struct sensor_device_attribute_2 *sensor_attr =
1359 to_sensor_dev_attr_2(attr);
1360 int nr = sensor_attr->nr;
1361 struct i2c_client *client = to_i2c_client(dev);
1362 struct w83795_data *data = i2c_get_clientdata(client);
1363 unsigned long val;
1364
1365 if (strict_strtoul(buf, 10, &val) < 0)
1366 return -EINVAL;
1367
1368 switch (nr) {
1369 case SETUP_PWM_DEFAULT:
1370 val = SENSORS_LIMIT(val, 0, 0xff);
1371 break;
1372 case SETUP_PWM_UPTIME:
1373 case SETUP_PWM_DOWNTIME:
1374 val = time_to_reg(val);
1375 if (val == 0)
1376 return -EINVAL;
1377 break;
1378 }
1379
1380 mutex_lock(&data->update_lock);
1381 data->setup_pwm[nr] = val;
1382 w83795_write(client, W83795_REG_SETUP_PWM(nr), val);
1383 mutex_unlock(&data->update_lock);
1384 return count;
1385}
1386
1387
1388#define NOT_USED -1
1389
0e256018
JD		 1390/* Don't change the attribute order, _max and _min are accessed by index
1391 * somewhere else in the code */
87df0dad 1392#define SENSOR_ATTR_IN(index) { \
792d376b
WS		 1393 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
1394 IN_READ, index), \
1395 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
1396 store_in, IN_MAX, index), \
1397 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
1398 store_in, IN_LOW, index), \
1399 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
1400 NULL, ALARM_STATUS, index + ((index > 14) ? 1 : 0)), \
1401 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
1402 show_alarm_beep, store_beep, BEEP_ENABLE, \
87df0dad 1403 index + ((index > 14) ? 1 : 0)) }
792d376b 1404
87df0dad 1405#define SENSOR_ATTR_FAN(index) { \
792d376b
WS		 1406 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
1407 NULL, FAN_INPUT, index - 1), \
1408 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
1409 show_fan, store_fan_min, FAN_MIN, index - 1), \
1410 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
1411 NULL, ALARM_STATUS, index + 31), \
1412 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1413 show_alarm_beep, store_beep, BEEP_ENABLE, index + 31) }
792d376b 1414
b5f6a90a 1415#define SENSOR_ATTR_PWM(index) { \
792d376b
WS		 1416 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
1417 store_pwm, PWM_OUTPUT, index - 1), \
1418 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
1419 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
1420 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
1421 show_pwm, store_pwm, PWM_START, index - 1), \
1422 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
1423 show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
01879a85
JD		 1424 SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
1425 show_pwm, store_pwm, PWM_FREQ, index - 1), \
792d376b 1426 SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
b2cc528e
JD		 1427 show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
1428 SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
1429 show_fanin, store_fanin, FANIN_TARGET, index - 1) }
792d376b 1430
87df0dad 1431#define SENSOR_ATTR_DTS(index) { \
792d376b
WS		 1432 SENSOR_ATTR_2(temp##index##_type, S_IRUGO , \
1433 show_dts_mode, NULL, NOT_USED, index - 7), \
1434 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_dts, \
1435 NULL, NOT_USED, index - 7), \
a0ce402f 1436 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1437 store_dts_ext, DTS_CRIT, NOT_USED), \
a0ce402f 1438 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1439 show_dts_ext, store_dts_ext, DTS_CRIT_HYST, NOT_USED), \
a0ce402f 1440 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_dts_ext, \
792d376b 1441 store_dts_ext, DTS_WARN, NOT_USED), \
a0ce402f 1442 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1443 show_dts_ext, store_dts_ext, DTS_WARN_HYST, NOT_USED), \
1444 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1445 show_alarm_beep, NULL, ALARM_STATUS, index + 17), \
1446 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
87df0dad 1447 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17) }
792d376b 1448
87df0dad 1449#define SENSOR_ATTR_TEMP(index) { \
39deb699 1450 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | (index < 4 ? S_IWUSR : 0), \
792d376b
WS		 1451 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
1452 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
1453 NULL, TEMP_READ, index - 1), \
a0ce402f 1454 SENSOR_ATTR_2(temp##index##_crit, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1455 store_temp, TEMP_CRIT, index - 1), \
a0ce402f 1456 SENSOR_ATTR_2(temp##index##_crit_hyst, S_IRUGO | S_IWUSR, \
792d376b 1457 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
a0ce402f 1458 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
792d376b 1459 store_temp, TEMP_WARN, index - 1), \
a0ce402f 1460 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
792d376b
WS		 1461 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
1462 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
1463 show_alarm_beep, NULL, ALARM_STATUS, \
1464 index + (index > 4 ? 11 : 17)), \
1465 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
1466 show_alarm_beep, store_beep, BEEP_ENABLE, \
1467 index + (index > 4 ? 11 : 17)), \
1468 SENSOR_ATTR_2(temp##index##_source_sel, S_IWUSR | S_IRUGO, \
1469 show_temp_src, store_temp_src, NOT_USED, index - 1), \
1470 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
1471 show_temp_pwm_enable, store_temp_pwm_enable, \
1472 TEMP_PWM_ENABLE, index - 1), \
1473 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, S_IWUSR | S_IRUGO, \
1474 show_temp_pwm_enable, store_temp_pwm_enable, \
1475 TEMP_PWM_FAN_MAP, index - 1), \
1476 SENSOR_ATTR_2(thermal_cruise##index, S_IWUSR | S_IRUGO, \
1477 show_temp_pwm, store_temp_pwm, TEMP_PWM_TTTI, index - 1), \
a0ce402f 1478 SENSOR_ATTR_2(temp##index##_warn, S_IWUSR | S_IRUGO, \
792d376b 1479 show_temp_pwm, store_temp_pwm, TEMP_PWM_CTFS, index - 1), \
a0ce402f 1480 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IWUSR | S_IRUGO, \
792d376b
WS		 1481 show_temp_pwm, store_temp_pwm, TEMP_PWM_HCT, index - 1), \
1482 SENSOR_ATTR_2(temp##index##_operation_hyst, S_IWUSR | S_IRUGO, \
1483 show_temp_pwm, store_temp_pwm, TEMP_PWM_HOT, index - 1), \
1484 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
1485 show_sf4_pwm, store_sf4_pwm, 0, index - 1), \
1486 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
1487 show_sf4_pwm, store_sf4_pwm, 1, index - 1), \
1488 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
1489 show_sf4_pwm, store_sf4_pwm, 2, index - 1), \
1490 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
1491 show_sf4_pwm, store_sf4_pwm, 3, index - 1), \
1492 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
1493 show_sf4_pwm, store_sf4_pwm, 4, index - 1), \
1494 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
1495 show_sf4_pwm, store_sf4_pwm, 5, index - 1), \
1496 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
1497 show_sf4_pwm, store_sf4_pwm, 6, index - 1), \
1498 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
1499 show_sf4_temp, store_sf4_temp, 0, index - 1), \
1500 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
1501 show_sf4_temp, store_sf4_temp, 1, index - 1), \
1502 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
1503 show_sf4_temp, store_sf4_temp, 2, index - 1), \
1504 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
1505 show_sf4_temp, store_sf4_temp, 3, index - 1), \
1506 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
1507 show_sf4_temp, store_sf4_temp, 4, index - 1), \
1508 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
1509 show_sf4_temp, store_sf4_temp, 5, index - 1), \
1510 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
87df0dad 1511 show_sf4_temp, store_sf4_temp, 6, index - 1) }
792d376b
WS		 1512
1513
87df0dad 1514static struct sensor_device_attribute_2 w83795_in[][5] = {
792d376b
WS		 1515 SENSOR_ATTR_IN(0),
1516 SENSOR_ATTR_IN(1),
1517 SENSOR_ATTR_IN(2),
1518 SENSOR_ATTR_IN(3),
1519 SENSOR_ATTR_IN(4),
1520 SENSOR_ATTR_IN(5),
1521 SENSOR_ATTR_IN(6),
1522 SENSOR_ATTR_IN(7),
1523 SENSOR_ATTR_IN(8),
1524 SENSOR_ATTR_IN(9),
1525 SENSOR_ATTR_IN(10),
1526 SENSOR_ATTR_IN(11),
1527 SENSOR_ATTR_IN(12),
1528 SENSOR_ATTR_IN(13),
1529 SENSOR_ATTR_IN(14),
1530 SENSOR_ATTR_IN(15),
1531 SENSOR_ATTR_IN(16),
1532 SENSOR_ATTR_IN(17),
1533 SENSOR_ATTR_IN(18),
1534 SENSOR_ATTR_IN(19),
1535 SENSOR_ATTR_IN(20),
1536};
1537
86ef4d2f 1538static const struct sensor_device_attribute_2 w83795_fan[][4] = {
792d376b
WS		 1539 SENSOR_ATTR_FAN(1),
1540 SENSOR_ATTR_FAN(2),
1541 SENSOR_ATTR_FAN(3),
1542 SENSOR_ATTR_FAN(4),
1543 SENSOR_ATTR_FAN(5),
1544 SENSOR_ATTR_FAN(6),
1545 SENSOR_ATTR_FAN(7),
1546 SENSOR_ATTR_FAN(8),
1547 SENSOR_ATTR_FAN(9),
1548 SENSOR_ATTR_FAN(10),
1549 SENSOR_ATTR_FAN(11),
1550 SENSOR_ATTR_FAN(12),
1551 SENSOR_ATTR_FAN(13),
1552 SENSOR_ATTR_FAN(14),
1553};
1554
86ef4d2f 1555static const struct sensor_device_attribute_2 w83795_temp[][29] = {
792d376b
WS		 1556 SENSOR_ATTR_TEMP(1),
1557 SENSOR_ATTR_TEMP(2),
1558 SENSOR_ATTR_TEMP(3),
1559 SENSOR_ATTR_TEMP(4),
1560 SENSOR_ATTR_TEMP(5),
1561 SENSOR_ATTR_TEMP(6),
1562};
1563
86ef4d2f 1564static const struct sensor_device_attribute_2 w83795_dts[][8] = {
792d376b
WS		 1565 SENSOR_ATTR_DTS(7),
1566 SENSOR_ATTR_DTS(8),
1567 SENSOR_ATTR_DTS(9),
1568 SENSOR_ATTR_DTS(10),
1569 SENSOR_ATTR_DTS(11),
1570 SENSOR_ATTR_DTS(12),
1571 SENSOR_ATTR_DTS(13),
1572 SENSOR_ATTR_DTS(14),
1573};
1574
86ef4d2f 1575static const struct sensor_device_attribute_2 w83795_pwm[][7] = {
b5f6a90a
JD		 1576 SENSOR_ATTR_PWM(1),
1577 SENSOR_ATTR_PWM(2),
792d376b
WS		 1578 SENSOR_ATTR_PWM(3),
1579 SENSOR_ATTR_PWM(4),
1580 SENSOR_ATTR_PWM(5),
1581 SENSOR_ATTR_PWM(6),
1582 SENSOR_ATTR_PWM(7),
1583 SENSOR_ATTR_PWM(8),
1584};
1585
86ef4d2f 1586static const struct sensor_device_attribute_2 sda_single_files[] = {
792d376b
WS		 1587 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
1588 store_chassis_clear, ALARM_STATUS, 46),
02728ffe
JD		 1589 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_alarm_beep,
1590 store_beep, BEEP_ENABLE, 47),
792d376b
WS		 1591 SENSOR_ATTR_2(speed_cruise_tolerance, S_IWUSR | S_IRUGO, show_fanin,
1592 store_fanin, FANIN_TOL, NOT_USED),
1593 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1594 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1595 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1596 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1597 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1598 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1599};
1600
1601/*
1602 * Driver interface
1603 */
1604
1605static void w83795_init_client(struct i2c_client *client)
1606{
01879a85
JD		 1607 struct w83795_data *data = i2c_get_clientdata(client);
1608 static const u16 clkin[4] = { /* in kHz */
1609 14318, 24000, 33333, 48000
1610 };
80646b95
JD		 1611 u8 config;
1612
792d376b
WS		 1613 if (reset)
1614 w83795_write(client, W83795_REG_CONFIG, 0x80);
1615
80646b95
JD		 1616 /* Start monitoring if needed */
1617 config = w83795_read(client, W83795_REG_CONFIG);
1618 if (!(config & W83795_REG_CONFIG_START)) {
1619 dev_info(&client->dev, "Enabling monitoring operations\n");
1620 w83795_write(client, W83795_REG_CONFIG,
1621 config | W83795_REG_CONFIG_START);
1622 }
01879a85
JD		 1623
1624 data->clkin = clkin[(config >> 3) & 0x3];
1625 dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
792d376b
WS		 1626}
1627
2be381de
JD		 1628static int w83795_get_device_id(struct i2c_client *client)
1629{
1630 int device_id;
1631
1632 device_id = i2c_smbus_read_byte_data(client, W83795_REG_DEVICEID);
1633
1634 /* Special case for rev. A chips; can't be checked first because later
1635 revisions emulate this for compatibility */
1636 if (device_id < 0 || (device_id & 0xf0) != 0x50) {
1637 int alt_id;
1638
1639 alt_id = i2c_smbus_read_byte_data(client,
1640 W83795_REG_DEVICEID_A);
1641 if (alt_id == 0x50)
1642 device_id = alt_id;
1643 }
1644
1645 return device_id;
1646}
1647
792d376b
WS		 1648/* Return 0 if detection is successful, -ENODEV otherwise */
1649static int w83795_detect(struct i2c_client *client,
1650 struct i2c_board_info *info)
1651{
2be381de 1652 int bank, vendor_id, device_id, expected, i2c_addr, config;
792d376b
WS		 1653 struct i2c_adapter *adapter = client->adapter;
1654 unsigned short address = client->addr;
093d1a47 1655 const char *chip_name;
792d376b
WS		 1656
1657 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1658 return -ENODEV;
1659 bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
2be381de
JD		 1660 if (bank < 0 || (bank & 0x7c)) {
1661 dev_dbg(&adapter->dev,
1662 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1663 address, "bank");
1664 return -ENODEV;
1665 }
792d376b 1666
792d376b 1667 /* Check Nuvoton vendor ID */
2be381de
JD		 1668 vendor_id = i2c_smbus_read_byte_data(client, W83795_REG_VENDORID);
1669 expected = bank & 0x80 ? 0x5c : 0xa3;
1670 if (vendor_id != expected) {
1671 dev_dbg(&adapter->dev,
1672 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1673 address, "vendor id");
792d376b
WS		 1674 return -ENODEV;
1675 }
1676
2be381de
JD		 1677 /* Check device ID */
1678 device_id = w83795_get_device_id(client) |
1679 (i2c_smbus_read_byte_data(client, W83795_REG_CHIPID) << 8);
1680 if ((device_id >> 4) != 0x795) {
1681 dev_dbg(&adapter->dev,
1682 "w83795: Detection failed at addr 0x%02hx, check %s\n",
1683 address, "device id\n");
792d376b
WS		 1684 return -ENODEV;
1685 }
1686
2be381de
JD		 1687 /* If Nuvoton chip, address of chip and W83795_REG_I2C_ADDR
1688 should match */
1689 if ((bank & 0x07) == 0) {
1690 i2c_addr = i2c_smbus_read_byte_data(client,
1691 W83795_REG_I2C_ADDR);
1692 if ((i2c_addr & 0x7f) != address) {
1693 dev_dbg(&adapter->dev,
1694 "w83795: Detection failed at addr 0x%02hx, "
1695 "check %s\n", address, "i2c addr");
1696 return -ENODEV;
1697 }
792d376b
WS		 1698 }
1699
093d1a47
JD		 1700 /* Check 795 chip type: 795G or 795ADG
1701 Usually we don't write to chips during detection, but here we don't
1702 quite have the choice; hopefully it's OK, we are about to return
1703 success anyway */
1704 if ((bank & 0x07) != 0)
1705 i2c_smbus_write_byte_data(client, W83795_REG_BANKSEL,
1706 bank & ~0x07);
2be381de
JD		 1707 config = i2c_smbus_read_byte_data(client, W83795_REG_CONFIG);
1708 if (config & W83795_REG_CONFIG_CONFIG48)
093d1a47 1709 chip_name = "w83795adg";
2be381de 1710 else
093d1a47 1711 chip_name = "w83795g";
792d376b 1712
093d1a47 1713 strlcpy(info->type, chip_name, I2C_NAME_SIZE);
2be381de
JD		 1714 dev_info(&adapter->dev, "Found %s rev. %c at 0x%02hx\n", chip_name,
1715 'A' + (device_id & 0xf), address);
792d376b
WS		 1716
1717 return 0;
1718}
1719
6f3dcde9
JD		 1720static int w83795_handle_files(struct device *dev, int (*fn)(struct device *,
1721 const struct device_attribute *))
892514a6
JD		 1722{
1723 struct w83795_data *data = dev_get_drvdata(dev);
87df0dad 1724 int err, i, j;
892514a6
JD		 1725
1726 for (i = 0; i < ARRAY_SIZE(w83795_in); i++) {
87df0dad 1727 if (!(data->has_in & (1 << i)))
892514a6 1728 continue;
87df0dad
JD		 1729 for (j = 0; j < ARRAY_SIZE(w83795_in[0]); j++) {
1730 err = fn(dev, &w83795_in[i][j].dev_attr);
1731 if (err)
1732 return err;
1733 }
892514a6
JD		 1734 }
1735
1736 for (i = 0; i < ARRAY_SIZE(w83795_fan); i++) {
87df0dad 1737 if (!(data->has_fan & (1 << i)))
892514a6 1738 continue;
87df0dad
JD		 1739 for (j = 0; j < ARRAY_SIZE(w83795_fan[0]); j++) {
1740 err = fn(dev, &w83795_fan[i][j].dev_attr);
1741 if (err)
1742 return err;
1743 }
892514a6
JD		 1744 }
1745
1746 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
6f3dcde9 1747 err = fn(dev, &sda_single_files[i].dev_attr);
892514a6
JD		 1748 if (err)
1749 return err;
1750 }
1751
b5f6a90a
JD		 1752 for (i = 0; i < data->has_pwm; i++) {
1753 for (j = 0; j < ARRAY_SIZE(w83795_pwm[0]); j++) {
1754 err = fn(dev, &w83795_pwm[i][j].dev_attr);
892514a6
JD		 1755 if (err)
1756 return err;
1757 }
1758 }
1759
1760 for (i = 0; i < ARRAY_SIZE(w83795_temp); i++) {
87df0dad 1761 if (!(data->has_temp & (1 << i)))
892514a6 1762 continue;
87df0dad
JD		 1763 for (j = 0; j < ARRAY_SIZE(w83795_temp[0]); j++) {
1764 err = fn(dev, &w83795_temp[i][j].dev_attr);
1765 if (err)
1766 return err;
1767 }
892514a6
JD		 1768 }
1769
1770 if (data->enable_dts != 0) {
1771 for (i = 0; i < ARRAY_SIZE(w83795_dts); i++) {
87df0dad 1772 if (!(data->has_dts & (1 << i)))
892514a6 1773 continue;
87df0dad
JD		 1774 for (j = 0; j < ARRAY_SIZE(w83795_dts[0]); j++) {
1775 err = fn(dev, &w83795_dts[i][j].dev_attr);
1776 if (err)
1777 return err;
1778 }
892514a6
JD		 1779 }
1780 }
1781
892514a6
JD		 1782 return 0;
1783}
1784
6f3dcde9
JD		 1785/* We need a wrapper that fits in w83795_handle_files */
1786static int device_remove_file_wrapper(struct device *dev,
1787 const struct device_attribute *attr)
2fa09878 1788{
6f3dcde9
JD		 1789 device_remove_file(dev, attr);
1790 return 0;
2fa09878
JD		 1791}
1792
0e256018
JD		 1793static void w83795_check_dynamic_in_limits(struct i2c_client *client)
1794{
1795 struct w83795_data *data = i2c_get_clientdata(client);
1796 u8 vid_ctl;
1797 int i, err_max, err_min;
1798
1799 vid_ctl = w83795_read(client, W83795_REG_VID_CTRL);
1800
1801 /* Return immediately if VRM isn't configured */
1802 if ((vid_ctl & 0x07) == 0x00 || (vid_ctl & 0x07) == 0x07)
1803 return;
1804
1805 data->has_dyn_in = (vid_ctl >> 3) & 0x07;
1806 for (i = 0; i < 2; i++) {
1807 if (!(data->has_dyn_in & (1 << i)))
1808 continue;
1809
1810 /* Voltage limits in dynamic mode, switch to read-only */
1811 err_max = sysfs_chmod_file(&client->dev.kobj,
1812 &w83795_in[i][2].dev_attr.attr,
1813 S_IRUGO);
1814 err_min = sysfs_chmod_file(&client->dev.kobj,
1815 &w83795_in[i][3].dev_attr.attr,
1816 S_IRUGO);
1817 if (err_max || err_min)
1818 dev_warn(&client->dev, "Failed to set in%d limits "
1819 "read-only (%d, %d)\n", i, err_max, err_min);
1820 else
1821 dev_info(&client->dev, "in%d limits set dynamically "
1822 "from VID\n", i);
1823 }
1824}
1825
71caf46f
JD		 1826/* Check pins that can be used for either temperature or voltage monitoring */
1827static void w83795_apply_temp_config(struct w83795_data *data, u8 config,
1828 int temp_chan, int in_chan)
1829{
1830 /* config is a 2-bit value */
1831 switch (config) {
1832 case 0x2: /* Voltage monitoring */
1833 data->has_in |= 1 << in_chan;
1834 break;
1835 case 0x1: /* Thermal diode */
1836 if (temp_chan >= 4)
1837 break;
1838 data->temp_mode |= 1 << temp_chan;
1839 /* fall through */
1840 case 0x3: /* Thermistor */
1841 data->has_temp |= 1 << temp_chan;
1842 break;
1843 }
1844}
1845
792d376b
WS		 1846static int w83795_probe(struct i2c_client *client,
1847 const struct i2c_device_id *id)
1848{
1849 int i;
1850 u8 tmp;
1851 struct device *dev = &client->dev;
1852 struct w83795_data *data;
71caf46f 1853 int err;
792d376b
WS		 1854
1855 data = kzalloc(sizeof(struct w83795_data), GFP_KERNEL);
1856 if (!data) {
1857 err = -ENOMEM;
1858 goto exit;
1859 }
1860
1861 i2c_set_clientdata(client, data);
093d1a47 1862 data->chip_type = id->driver_data;
792d376b
WS		 1863 data->bank = i2c_smbus_read_byte_data(client, W83795_REG_BANKSEL);
1864 mutex_init(&data->update_lock);
1865
1866 /* Initialize the chip */
1867 w83795_init_client(client);
1868
71caf46f
JD		 1869 /* Check which voltages and fans are present */
1870 data->has_in = w83795_read(client, W83795_REG_VOLT_CTRL1)
1871 | (w83795_read(client, W83795_REG_VOLT_CTRL2) << 8);
1872 data->has_fan = w83795_read(client, W83795_REG_FANIN_CTRL1)
1873 | (w83795_read(client, W83795_REG_FANIN_CTRL2) << 8);
792d376b 1874
71caf46f 1875 /* Check which analog temperatures and extra voltages are present */
792d376b
WS		 1876 tmp = w83795_read(client, W83795_REG_TEMP_CTRL1);
1877 if (tmp & 0x20)
1878 data->enable_dts = 1;
71caf46f
JD		 1879 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 5, 16);
1880 w83795_apply_temp_config(data, tmp & 0x3, 4, 15);
792d376b 1881 tmp = w83795_read(client, W83795_REG_TEMP_CTRL2);
71caf46f
JD		 1882 w83795_apply_temp_config(data, tmp >> 6, 3, 20);
1883 w83795_apply_temp_config(data, (tmp >> 4) & 0x3, 2, 19);
1884 w83795_apply_temp_config(data, (tmp >> 2) & 0x3, 1, 18);
1885 w83795_apply_temp_config(data, tmp & 0x3, 0, 17);
792d376b
WS		 1886
1887 /* Check DTS enable status */
71caf46f 1888 if (data->enable_dts) {
792d376b
WS		 1889 if (1 & w83795_read(client, W83795_REG_DTSC))
1890 data->enable_dts |= 2;
1891 data->has_dts = w83795_read(client, W83795_REG_DTSE);
1892 }
1893
54891a3c
JD		 1894 /* Report PECI Tbase values */
1895 if (data->enable_dts == 1) {
1896 for (i = 0; i < 8; i++) {
1897 if (!(data->has_dts & (1 << i)))
1898 continue;
1899 tmp = w83795_read(client, W83795_REG_PECI_TBASE(i));
1900 dev_info(&client->dev,
1901 "PECI agent %d Tbase temperature: %u\n",
1902 i + 1, (unsigned int)tmp & 0x7f);
1903 }
1904 }
1905
5f7b77cb 1906 /* Read the voltage limits */
792d376b
WS		 1907 for (i = 0; i < ARRAY_SIZE(data->in); i++) {
1908 if (!(data->has_in & (1 << i)))
1909 continue;
1910 data->in[i][IN_MAX] =
1911 w83795_read(client, W83795_REG_IN[i][IN_MAX]);
1912 data->in[i][IN_LOW] =
1913 w83795_read(client, W83795_REG_IN[i][IN_LOW]);
792d376b 1914 }
cd316df5 1915 for (i = 0; i < ARRAY_SIZE(data->in_lsb); i++) {
c1a792a6
JD		 1916 if ((i == 2 && data->chip_type == w83795adg) ||
1917 (i >= 4 && !(data->has_in & (1 << (i + 11)))))
1918 continue;
792d376b
WS		 1919 data->in_lsb[i][IN_MAX] =
1920 w83795_read(client, IN_LSB_REG(i, IN_MAX));
1921 data->in_lsb[i][IN_LOW] =
1922 w83795_read(client, IN_LSB_REG(i, IN_LOW));
1923 }
1924 data->has_gain = w83795_read(client, W83795_REG_VMIGB_CTRL) & 0x0f;
1925
5f7b77cb 1926 /* Read the fan limits */
792d376b 1927 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
c1a792a6
JD		 1928 /* Each register contains LSB for 2 fans, but we want to
1929 * read it only once to save time */
1930 if ((i & 1) == 0 && (data->has_fan & (3 << i)))
1931 tmp = w83795_read(client, W83795_REG_FAN_MIN_LSB(i));
1932
792d376b
WS		 1933 if (!(data->has_fan & (1 << i)))
1934 continue;
1935 data->fan_min[i] =
1936 w83795_read(client, W83795_REG_FAN_MIN_HL(i)) << 4;
1937 data->fan_min[i] |=
c1a792a6 1938 (tmp >> W83795_REG_FAN_MIN_LSB_SHIFT(i)) & 0x0F;
792d376b
WS		 1939 }
1940
5f7b77cb 1941 /* Read the temperature limits */
792d376b
WS		 1942 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
1943 if (!(data->has_temp & (1 << i)))
1944 continue;
1945 data->temp[i][TEMP_CRIT] =
1946 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT]);
1947 data->temp[i][TEMP_CRIT_HYST] =
1948 w83795_read(client, W83795_REG_TEMP[i][TEMP_CRIT_HYST]);
1949 data->temp[i][TEMP_WARN] =
1950 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN]);
1951 data->temp[i][TEMP_WARN_HYST] =
1952 w83795_read(client, W83795_REG_TEMP[i][TEMP_WARN_HYST]);
792d376b
WS		 1953 }
1954
5f7b77cb 1955 /* Read the DTS limits */
792d376b
WS		 1956 if (data->enable_dts != 0) {
1957 data->dts_ext[DTS_CRIT] =
1958 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT));
1959 data->dts_ext[DTS_CRIT_HYST] =
1960 w83795_read(client, W83795_REG_DTS_EXT(DTS_CRIT_HYST));
1961 data->dts_ext[DTS_WARN] =
1962 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN));
1963 data->dts_ext[DTS_WARN_HYST] =
1964 w83795_read(client, W83795_REG_DTS_EXT(DTS_WARN_HYST));
792d376b
WS		 1965 }
1966
1967 /* First update temp source selction */
1968 for (i = 0; i < 3; i++)
1969 data->temp_src[i] = w83795_read(client, W83795_REG_TSS(i));
1970
1971 /* pwm and smart fan */
1972 if (data->chip_type == w83795g)
1973 data->has_pwm = 8;
1974 else
1975 data->has_pwm = 2;
1976 data->pwm_fcms[0] = w83795_read(client, W83795_REG_FCMS1);
1977 data->pwm_fcms[1] = w83795_read(client, W83795_REG_FCMS2);
cd316df5 1978 for (i = 0; i < ARRAY_SIZE(data->pwm_tfmr); i++)
792d376b
WS		 1979 data->pwm_tfmr[i] = w83795_read(client, W83795_REG_TFMR(i));
1980 data->pwm_fomc = w83795_read(client, W83795_REG_FOMC);
1981 for (i = 0; i < data->has_pwm; i++) {
5f7b77cb 1982 for (tmp = PWM_START; tmp <= PWM_FREQ; tmp++)
792d376b
WS		 1983 data->pwm[i][tmp] =
1984 w83795_read(client, W83795_REG_PWM(i, tmp));
792d376b
WS		 1985 }
1986 for (i = 0; i < 8; i++) {
1987 data->target_speed[i] =
1988 w83795_read(client, W83795_REG_FTSH(i)) << 4;
1989 data->target_speed[i] |=
1990 w83795_read(client, W83795_REG_FTSL(i)) >> 4;
1991 }
1992 data->tol_speed = w83795_read(client, W83795_REG_TFTS) & 0x3f;
1993
cd316df5 1994 for (i = 0; i < ARRAY_SIZE(data->pwm_temp); i++) {
792d376b
WS		 1995 data->pwm_temp[i][TEMP_PWM_TTTI] =
1996 w83795_read(client, W83795_REG_TTTI(i)) & 0x7f;
1997 data->pwm_temp[i][TEMP_PWM_CTFS] =
1998 w83795_read(client, W83795_REG_CTFS(i));
1999 tmp = w83795_read(client, W83795_REG_HT(i));
2000 data->pwm_temp[i][TEMP_PWM_HCT] = (tmp >> 4) & 0x0f;
2001 data->pwm_temp[i][TEMP_PWM_HOT] = tmp & 0x0f;
2002 }
cd316df5 2003 for (i = 0; i < ARRAY_SIZE(data->sf4_reg); i++) {
792d376b
WS		 2004 for (tmp = 0; tmp < 7; tmp++) {
2005 data->sf4_reg[i][SF4_TEMP][tmp] =
2006 w83795_read(client,
2007 W83795_REG_SF4_TEMP(i, tmp));
2008 data->sf4_reg[i][SF4_PWM][tmp] =
2009 w83795_read(client, W83795_REG_SF4_PWM(i, tmp));
2010 }
2011 }
2012
2013 /* Setup PWM Register */
2014 for (i = 0; i < 3; i++) {
2015 data->setup_pwm[i] =
2016 w83795_read(client, W83795_REG_SETUP_PWM(i));
2017 }
2018
5f7b77cb
JD		 2019 /* Read beep settings */
2020 for (i = 0; i < ARRAY_SIZE(data->beeps); i++)
792d376b 2021 data->beeps[i] = w83795_read(client, W83795_REG_BEEP(i));
792d376b 2022
6f3dcde9 2023 err = w83795_handle_files(dev, device_create_file);
892514a6
JD		 2024 if (err)
2025 goto exit_remove;
792d376b 2026
0e256018
JD		 2027 if (data->chip_type == w83795g)
2028 w83795_check_dynamic_in_limits(client);
2029
792d376b
WS		 2030 data->hwmon_dev = hwmon_device_register(dev);
2031 if (IS_ERR(data->hwmon_dev)) {
2032 err = PTR_ERR(data->hwmon_dev);
2033 goto exit_remove;
2034 }
2035
2036 return 0;
2037
792d376b 2038exit_remove:
6f3dcde9 2039 w83795_handle_files(dev, device_remove_file_wrapper);
792d376b
WS		 2040 kfree(data);
2041exit:
2042 return err;
2043}
2044
2045static int w83795_remove(struct i2c_client *client)
2046{
2047 struct w83795_data *data = i2c_get_clientdata(client);
792d376b
WS		 2048
2049 hwmon_device_unregister(data->hwmon_dev);
6f3dcde9 2050 w83795_handle_files(&client->dev, device_remove_file_wrapper);
792d376b
WS		 2051 kfree(data);
2052
2053 return 0;
2054}
2055
2056
2057static const struct i2c_device_id w83795_id[] = {
093d1a47
JD		 2058 { "w83795g", w83795g },
2059 { "w83795adg", w83795adg },
792d376b
WS		 2060 { }
2061};
2062MODULE_DEVICE_TABLE(i2c, w83795_id);
2063
2064static struct i2c_driver w83795_driver = {
2065 .driver = {
2066 .name = "w83795",
2067 },
2068 .probe = w83795_probe,
2069 .remove = w83795_remove,
2070 .id_table = w83795_id,
2071
2072 .class = I2C_CLASS_HWMON,
2073 .detect = w83795_detect,
2074 .address_list = normal_i2c,
2075};
2076
2077static int __init sensors_w83795_init(void)
2078{
2079 return i2c_add_driver(&w83795_driver);
2080}
2081
2082static void __exit sensors_w83795_exit(void)
2083{
2084 i2c_del_driver(&w83795_driver);
2085}
2086
2087MODULE_AUTHOR("Wei Song");
315bacfd 2088MODULE_DESCRIPTION("W83795G/ADG hardware monitoring driver");
792d376b
WS		 2089MODULE_LICENSE("GPL");
2090
2091module_init(sensors_w83795_init);
2092module_exit(sensors_w83795_exit);
Clone of davem's net-next-2.6 tree