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i2c: Drop I2C_CLIENT_INSMOD_1
[net-next-2.6.git] / drivers / hwmon / w83793.c
CommitLineData
6800c3d0
RM		 1/*
2 w83793.c - Linux kernel driver for hardware monitoring
3 Copyright (C) 2006 Winbond Electronics Corp.
4 Yuan Mu
5 Rudolf Marek <r.marek@assembler.cz>
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation - version 2.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
19 02110-1301 USA.
20*/
21
22/*
23 Supports following chips:
24
25 Chip #vin #fanin #pwm #temp wchipid vendid i2c ISA
26 w83793 10 12 8 6 0x7b 0x5ca3 yes no
27*/
28
29#include <linux/module.h>
30#include <linux/init.h>
31#include <linux/slab.h>
32#include <linux/i2c.h>
33#include <linux/hwmon.h>
34#include <linux/hwmon-vid.h>
35#include <linux/hwmon-sysfs.h>
36#include <linux/err.h>
37#include <linux/mutex.h>
38
39/* Addresses to scan */
25e9c86d
MH		 40static const unsigned short normal_i2c[] = { 0x2c, 0x2d, 0x2e, 0x2f,
41 I2C_CLIENT_END };
6800c3d0
RM		 42
43/* Insmod parameters */
3aed198c
JD		 44
45static unsigned short force_subclients[4];
46module_param_array(force_subclients, short, NULL, 0);
47MODULE_PARM_DESC(force_subclients, "List of subclient addresses: "
6800c3d0
RM		 48 "{bus, clientaddr, subclientaddr1, subclientaddr2}");
49
50static int reset;
51module_param(reset, bool, 0);
52MODULE_PARM_DESC(reset, "Set to 1 to reset chip, not recommended");
53
54/*
55 Address 0x00, 0x0d, 0x0e, 0x0f in all three banks are reserved
56 as ID, Bank Select registers
57*/
58#define W83793_REG_BANKSEL 0x00
59#define W83793_REG_VENDORID 0x0d
60#define W83793_REG_CHIPID 0x0e
61#define W83793_REG_DEVICEID 0x0f
62
63#define W83793_REG_CONFIG 0x40
64#define W83793_REG_MFC 0x58
65#define W83793_REG_FANIN_CTRL 0x5c
66#define W83793_REG_FANIN_SEL 0x5d
67#define W83793_REG_I2C_ADDR 0x0b
68#define W83793_REG_I2C_SUBADDR 0x0c
69#define W83793_REG_VID_INA 0x05
70#define W83793_REG_VID_INB 0x06
71#define W83793_REG_VID_LATCHA 0x07
72#define W83793_REG_VID_LATCHB 0x08
73#define W83793_REG_VID_CTRL 0x59
74
75static u16 W83793_REG_TEMP_MODE[2] = { 0x5e, 0x5f };
76
77#define TEMP_READ 0
78#define TEMP_CRIT 1
79#define TEMP_CRIT_HYST 2
80#define TEMP_WARN 3
81#define TEMP_WARN_HYST 4
82/* only crit and crit_hyst affect real-time alarm status
83 current crit crit_hyst warn warn_hyst */
84static u16 W83793_REG_TEMP[][5] = {
85 {0x1c, 0x78, 0x79, 0x7a, 0x7b},
86 {0x1d, 0x7c, 0x7d, 0x7e, 0x7f},
87 {0x1e, 0x80, 0x81, 0x82, 0x83},
88 {0x1f, 0x84, 0x85, 0x86, 0x87},
89 {0x20, 0x88, 0x89, 0x8a, 0x8b},
90 {0x21, 0x8c, 0x8d, 0x8e, 0x8f},
91};
92
93#define W83793_REG_TEMP_LOW_BITS 0x22
94
95#define W83793_REG_BEEP(index) (0x53 + (index))
96#define W83793_REG_ALARM(index) (0x4b + (index))
97
98#define W83793_REG_CLR_CHASSIS 0x4a /* SMI MASK4 */
99#define W83793_REG_IRQ_CTRL 0x50
100#define W83793_REG_OVT_CTRL 0x51
101#define W83793_REG_OVT_BEEP 0x52
102
103#define IN_READ 0
104#define IN_MAX 1
105#define IN_LOW 2
106static const u16 W83793_REG_IN[][3] = {
107 /* Current, High, Low */
108 {0x10, 0x60, 0x61}, /* Vcore A */
109 {0x11, 0x62, 0x63}, /* Vcore B */
110 {0x12, 0x64, 0x65}, /* Vtt */
111 {0x14, 0x6a, 0x6b}, /* VSEN1 */
112 {0x15, 0x6c, 0x6d}, /* VSEN2 */
113 {0x16, 0x6e, 0x6f}, /* +3VSEN */
114 {0x17, 0x70, 0x71}, /* +12VSEN */
115 {0x18, 0x72, 0x73}, /* 5VDD */
116 {0x19, 0x74, 0x75}, /* 5VSB */
117 {0x1a, 0x76, 0x77}, /* VBAT */
118};
119
120/* Low Bits of Vcore A/B Vtt Read/High/Low */
121static const u16 W83793_REG_IN_LOW_BITS[] = { 0x1b, 0x68, 0x69 };
122static u8 scale_in[] = { 2, 2, 2, 16, 16, 16, 8, 24, 24, 16 };
ddca933b 123static u8 scale_in_add[] = { 0, 0, 0, 0, 0, 0, 0, 150, 150, 0 };
6800c3d0
RM		 124
125#define W83793_REG_FAN(index) (0x23 + 2 * (index)) /* High byte */
126#define W83793_REG_FAN_MIN(index) (0x90 + 2 * (index)) /* High byte */
127
128#define W83793_REG_PWM_DEFAULT 0xb2
129#define W83793_REG_PWM_ENABLE 0x207
130#define W83793_REG_PWM_UPTIME 0xc3 /* Unit in 0.1 second */
131#define W83793_REG_PWM_DOWNTIME 0xc4 /* Unit in 0.1 second */
132#define W83793_REG_TEMP_CRITICAL 0xc5
133
134#define PWM_DUTY 0
135#define PWM_START 1
136#define PWM_NONSTOP 2
5aebefb0 137#define PWM_STOP_TIME 3
6800c3d0
RM		 138#define W83793_REG_PWM(index, nr) (((nr) == 0 ? 0xb3 : \
139 (nr) == 1 ? 0x220 : 0x218) + (index))
140
141/* bit field, fan1 is bit0, fan2 is bit1 ... */
142#define W83793_REG_TEMP_FAN_MAP(index) (0x201 + (index))
143#define W83793_REG_TEMP_TOL(index) (0x208 + (index))
144#define W83793_REG_TEMP_CRUISE(index) (0x210 + (index))
145#define W83793_REG_PWM_STOP_TIME(index) (0x228 + (index))
146#define W83793_REG_SF2_TEMP(index, nr) (0x230 + ((index) << 4) + (nr))
147#define W83793_REG_SF2_PWM(index, nr) (0x238 + ((index) << 4) + (nr))
148
149static inline unsigned long FAN_FROM_REG(u16 val)
150{
151 if ((val >= 0xfff) || (val == 0))
152 return 0;
153 return (1350000UL / val);
154}
155
156static inline u16 FAN_TO_REG(long rpm)
157{
158 if (rpm <= 0)
159 return 0x0fff;
160 return SENSORS_LIMIT((1350000 + (rpm >> 1)) / rpm, 1, 0xffe);
161}
162
163static inline unsigned long TIME_FROM_REG(u8 reg)
164{
165 return (reg * 100);
166}
167
168static inline u8 TIME_TO_REG(unsigned long val)
169{
170 return SENSORS_LIMIT((val + 50) / 100, 0, 0xff);
171}
172
173static inline long TEMP_FROM_REG(s8 reg)
174{
175 return (reg * 1000);
176}
177
178static inline s8 TEMP_TO_REG(long val, s8 min, s8 max)
179{
180 return SENSORS_LIMIT((val + (val < 0 ? -500 : 500)) / 1000, min, max);
181}
182
183struct w83793_data {
6800c3d0 184 struct i2c_client *lm75[2];
1beeffe4 185 struct device *hwmon_dev;
6800c3d0
RM		 186 struct mutex update_lock;
187 char valid; /* !=0 if following fields are valid */
188 unsigned long last_updated; /* In jiffies */
189 unsigned long last_nonvolatile; /* In jiffies, last time we update the
190 nonvolatile registers */
191
192 u8 bank;
193 u8 vrm;
194 u8 vid[2];
195 u8 in[10][3]; /* Register value, read/high/low */
196 u8 in_low_bits[3]; /* Additional resolution for VCore A/B Vtt */
197
198 u16 has_fan; /* Only fan1- fan5 has own pins */
199 u16 fan[12]; /* Register value combine */
200 u16 fan_min[12]; /* Register value combine */
201
202 s8 temp[6][5]; /* current, crit, crit_hyst,warn, warn_hyst */
203 u8 temp_low_bits; /* Additional resolution TD1-TD4 */
204 u8 temp_mode[2]; /* byte 0: Temp D1-D4 mode each has 2 bits
205 byte 1: Temp R1,R2 mode, each has 1 bit */
206 u8 temp_critical; /* If reached all fan will be at full speed */
207 u8 temp_fan_map[6]; /* Temp controls which pwm fan, bit field */
208
209 u8 has_pwm;
46bed4df 210 u8 has_temp;
c70a8c34 211 u8 has_vid;
6800c3d0
RM		 212 u8 pwm_enable; /* Register value, each Temp has 1 bit */
213 u8 pwm_uptime; /* Register value */
214 u8 pwm_downtime; /* Register value */
215 u8 pwm_default; /* All fan default pwm, next poweron valid */
216 u8 pwm[8][3]; /* Register value */
217 u8 pwm_stop_time[8];
218 u8 temp_cruise[6];
219
220 u8 alarms[5]; /* realtime status registers */
221 u8 beeps[5];
222 u8 beep_enable;
223 u8 tolerance[3]; /* Temp tolerance(Smart Fan I/II) */
224 u8 sf2_pwm[6][7]; /* Smart FanII: Fan duty cycle */
225 u8 sf2_temp[6][7]; /* Smart FanII: Temp level point */
226};
227
228static u8 w83793_read_value(struct i2c_client *client, u16 reg);
229static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value);
a7f13a6e
JD		 230static int w83793_probe(struct i2c_client *client,
231 const struct i2c_device_id *id);
310ec792 232static int w83793_detect(struct i2c_client *client,
a7f13a6e
JD		 233 struct i2c_board_info *info);
234static int w83793_remove(struct i2c_client *client);
6800c3d0
RM		 235static void w83793_init_client(struct i2c_client *client);
236static void w83793_update_nonvolatile(struct device *dev);
237static struct w83793_data *w83793_update_device(struct device *dev);
238
a7f13a6e 239static const struct i2c_device_id w83793_id[] = {
1f86df49 240 { "w83793", 0 },
a7f13a6e
JD		 241 { }
242};
243MODULE_DEVICE_TABLE(i2c, w83793_id);
244
6800c3d0 245static struct i2c_driver w83793_driver = {
a7f13a6e 246 .class = I2C_CLASS_HWMON,
6800c3d0
RM		 247 .driver = {
248 .name = "w83793",
249 },
a7f13a6e
JD		 250 .probe = w83793_probe,
251 .remove = w83793_remove,
252 .id_table = w83793_id,
253 .detect = w83793_detect,
c3813d6a 254 .address_list = normal_i2c,
6800c3d0
RM		 255};
256
257static ssize_t
258show_vrm(struct device *dev, struct device_attribute *attr, char *buf)
259{
8f74efe8 260 struct w83793_data *data = dev_get_drvdata(dev);
6800c3d0
RM		 261 return sprintf(buf, "%d\n", data->vrm);
262}
263
264static ssize_t
265show_vid(struct device *dev, struct device_attribute *attr, char *buf)
266{
267 struct w83793_data *data = w83793_update_device(dev);
268 struct sensor_device_attribute_2 *sensor_attr =
269 to_sensor_dev_attr_2(attr);
270 int index = sensor_attr->index;
271
272 return sprintf(buf, "%d\n", vid_from_reg(data->vid[index], data->vrm));
273}
274
275static ssize_t
276store_vrm(struct device *dev, struct device_attribute *attr,
277 const char *buf, size_t count)
278{
8f74efe8 279 struct w83793_data *data = dev_get_drvdata(dev);
6800c3d0
RM		 280 data->vrm = simple_strtoul(buf, NULL, 10);
281 return count;
282}
283
284#define ALARM_STATUS 0
285#define BEEP_ENABLE 1
286static ssize_t
287show_alarm_beep(struct device *dev, struct device_attribute *attr, char *buf)
288{
289 struct w83793_data *data = w83793_update_device(dev);
290 struct sensor_device_attribute_2 *sensor_attr =
291 to_sensor_dev_attr_2(attr);
292 int nr = sensor_attr->nr;
293 int index = sensor_attr->index >> 3;
294 int bit = sensor_attr->index & 0x07;
295 u8 val;
296
297 if (ALARM_STATUS == nr) {
298 val = (data->alarms[index] >> (bit)) & 1;
299 } else { /* BEEP_ENABLE */
300 val = (data->beeps[index] >> (bit)) & 1;
301 }
302
303 return sprintf(buf, "%u\n", val);
304}
305
306static ssize_t
307store_beep(struct device *dev, struct device_attribute *attr,
308 const char *buf, size_t count)
309{
310 struct i2c_client *client = to_i2c_client(dev);
311 struct w83793_data *data = i2c_get_clientdata(client);
312 struct sensor_device_attribute_2 *sensor_attr =
313 to_sensor_dev_attr_2(attr);
314 int index = sensor_attr->index >> 3;
315 int shift = sensor_attr->index & 0x07;
316 u8 beep_bit = 1 << shift;
317 u8 val;
318
319 val = simple_strtoul(buf, NULL, 10);
320 if (val != 0 && val != 1)
321 return -EINVAL;
322
323 mutex_lock(&data->update_lock);
324 data->beeps[index] = w83793_read_value(client, W83793_REG_BEEP(index));
325 data->beeps[index] &= ~beep_bit;
326 data->beeps[index] |= val << shift;
327 w83793_write_value(client, W83793_REG_BEEP(index), data->beeps[index]);
328 mutex_unlock(&data->update_lock);
329
330 return count;
331}
332
333static ssize_t
334show_beep_enable(struct device *dev, struct device_attribute *attr, char *buf)
335{
336 struct w83793_data *data = w83793_update_device(dev);
337 return sprintf(buf, "%u\n", (data->beep_enable >> 1) & 0x01);
338}
339
340static ssize_t
341store_beep_enable(struct device *dev, struct device_attribute *attr,
342 const char *buf, size_t count)
343{
344 struct i2c_client *client = to_i2c_client(dev);
345 struct w83793_data *data = i2c_get_clientdata(client);
346 u8 val = simple_strtoul(buf, NULL, 10);
347
348 if (val != 0 && val != 1)
349 return -EINVAL;
350
351 mutex_lock(&data->update_lock);
352 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP)
353 & 0xfd;
354 data->beep_enable |= val << 1;
355 w83793_write_value(client, W83793_REG_OVT_BEEP, data->beep_enable);
356 mutex_unlock(&data->update_lock);
357
358 return count;
359}
360
361/* Write any value to clear chassis alarm */
362static ssize_t
363store_chassis_clear(struct device *dev,
364 struct device_attribute *attr, const char *buf,
365 size_t count)
366{
367 struct i2c_client *client = to_i2c_client(dev);
368 struct w83793_data *data = i2c_get_clientdata(client);
369 u8 val;
370
371 mutex_lock(&data->update_lock);
372 val = w83793_read_value(client, W83793_REG_CLR_CHASSIS);
373 val |= 0x80;
374 w83793_write_value(client, W83793_REG_CLR_CHASSIS, val);
375 mutex_unlock(&data->update_lock);
376 return count;
377}
378
379#define FAN_INPUT 0
380#define FAN_MIN 1
381static ssize_t
382show_fan(struct device *dev, struct device_attribute *attr, char *buf)
383{
384 struct sensor_device_attribute_2 *sensor_attr =
385 to_sensor_dev_attr_2(attr);
386 int nr = sensor_attr->nr;
387 int index = sensor_attr->index;
388 struct w83793_data *data = w83793_update_device(dev);
389 u16 val;
390
391 if (FAN_INPUT == nr) {
392 val = data->fan[index] & 0x0fff;
393 } else {
394 val = data->fan_min[index] & 0x0fff;
395 }
396
397 return sprintf(buf, "%lu\n", FAN_FROM_REG(val));
398}
399
400static ssize_t
401store_fan_min(struct device *dev, struct device_attribute *attr,
402 const char *buf, size_t count)
403{
404 struct sensor_device_attribute_2 *sensor_attr =
405 to_sensor_dev_attr_2(attr);
406 int index = sensor_attr->index;
407 struct i2c_client *client = to_i2c_client(dev);
408 struct w83793_data *data = i2c_get_clientdata(client);
409 u16 val = FAN_TO_REG(simple_strtoul(buf, NULL, 10));
410
411 mutex_lock(&data->update_lock);
412 data->fan_min[index] = val;
413 w83793_write_value(client, W83793_REG_FAN_MIN(index),
414 (val >> 8) & 0xff);
415 w83793_write_value(client, W83793_REG_FAN_MIN(index) + 1, val & 0xff);
416 mutex_unlock(&data->update_lock);
417
418 return count;
419}
420
6800c3d0
RM		 421static ssize_t
422show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
423{
424 struct sensor_device_attribute_2 *sensor_attr =
425 to_sensor_dev_attr_2(attr);
426 struct w83793_data *data = w83793_update_device(dev);
427 u16 val;
428 int nr = sensor_attr->nr;
429 int index = sensor_attr->index;
430
431 if (PWM_STOP_TIME == nr)
432 val = TIME_FROM_REG(data->pwm_stop_time[index]);
433 else
434 val = (data->pwm[index][nr] & 0x3f) << 2;
435
436 return sprintf(buf, "%d\n", val);
437}
438
439static ssize_t
440store_pwm(struct device *dev, struct device_attribute *attr,
441 const char *buf, size_t count)
442{
443 struct i2c_client *client = to_i2c_client(dev);
444 struct w83793_data *data = i2c_get_clientdata(client);
445 struct sensor_device_attribute_2 *sensor_attr =
446 to_sensor_dev_attr_2(attr);
447 int nr = sensor_attr->nr;
448 int index = sensor_attr->index;
449 u8 val;
450
451 mutex_lock(&data->update_lock);
452 if (PWM_STOP_TIME == nr) {
453 val = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
454 data->pwm_stop_time[index] = val;
455 w83793_write_value(client, W83793_REG_PWM_STOP_TIME(index),
456 val);
457 } else {
458 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 0xff)
459 >> 2;
460 data->pwm[index][nr] =
461 w83793_read_value(client, W83793_REG_PWM(index, nr)) & 0xc0;
462 data->pwm[index][nr] |= val;
463 w83793_write_value(client, W83793_REG_PWM(index, nr),
464 data->pwm[index][nr]);
465 }
466
467 mutex_unlock(&data->update_lock);
468 return count;
469}
470
471static ssize_t
472show_temp(struct device *dev, struct device_attribute *attr, char *buf)
473{
474 struct sensor_device_attribute_2 *sensor_attr =
475 to_sensor_dev_attr_2(attr);
476 int nr = sensor_attr->nr;
477 int index = sensor_attr->index;
478 struct w83793_data *data = w83793_update_device(dev);
479 long temp = TEMP_FROM_REG(data->temp[index][nr]);
480
481 if (TEMP_READ == nr && index < 4) { /* Only TD1-TD4 have low bits */
482 int low = ((data->temp_low_bits >> (index * 2)) & 0x03) * 250;
483 temp += temp > 0 ? low : -low;
484 }
485 return sprintf(buf, "%ld\n", temp);
486}
487
488static ssize_t
489store_temp(struct device *dev, struct device_attribute *attr,
490 const char *buf, size_t count)
491{
492 struct sensor_device_attribute_2 *sensor_attr =
493 to_sensor_dev_attr_2(attr);
494 int nr = sensor_attr->nr;
495 int index = sensor_attr->index;
496 struct i2c_client *client = to_i2c_client(dev);
497 struct w83793_data *data = i2c_get_clientdata(client);
498 long tmp = simple_strtol(buf, NULL, 10);
499
500 mutex_lock(&data->update_lock);
501 data->temp[index][nr] = TEMP_TO_REG(tmp, -128, 127);
502 w83793_write_value(client, W83793_REG_TEMP[index][nr],
503 data->temp[index][nr]);
504 mutex_unlock(&data->update_lock);
505 return count;
506}
507
508/*
509 TD1-TD4
510 each has 4 mode:(2 bits)
511 0: Stop monitor
512 1: Use internal temp sensor(default)
ddca933b 513 2: Reserved
6800c3d0
RM		 514 3: Use sensor in Intel CPU and get result by PECI
515
516 TR1-TR2
517 each has 2 mode:(1 bit)
518 0: Disable temp sensor monitor
519 1: To enable temp sensors monitor
520*/
521
ddca933b
GJ		 522/* 0 disable, 6 PECI */
523static u8 TO_TEMP_MODE[] = { 0, 0, 0, 6 };
6800c3d0
RM		 524
525static ssize_t
526show_temp_mode(struct device *dev, struct device_attribute *attr, char *buf)
527{
528 struct w83793_data *data = w83793_update_device(dev);
529 struct sensor_device_attribute_2 *sensor_attr =
530 to_sensor_dev_attr_2(attr);
531 int index = sensor_attr->index;
532 u8 mask = (index < 4) ? 0x03 : 0x01;
533 u8 shift = (index < 4) ? (2 * index) : (index - 4);
534 u8 tmp;
535 index = (index < 4) ? 0 : 1;
536
537 tmp = (data->temp_mode[index] >> shift) & mask;
538
539 /* for the internal sensor, found out if diode or thermistor */
540 if (tmp == 1) {
541 tmp = index == 0 ? 3 : 4;
542 } else {
543 tmp = TO_TEMP_MODE[tmp];
544 }
545
546 return sprintf(buf, "%d\n", tmp);
547}
548
549static ssize_t
550store_temp_mode(struct device *dev, struct device_attribute *attr,
551 const char *buf, size_t count)
552{
553 struct i2c_client *client = to_i2c_client(dev);
554 struct w83793_data *data = i2c_get_clientdata(client);
555 struct sensor_device_attribute_2 *sensor_attr =
556 to_sensor_dev_attr_2(attr);
557 int index = sensor_attr->index;
558 u8 mask = (index < 4) ? 0x03 : 0x01;
559 u8 shift = (index < 4) ? (2 * index) : (index - 4);
560 u8 val = simple_strtoul(buf, NULL, 10);
561
562 /* transform the sysfs interface values into table above */
ddca933b 563 if ((val == 6) && (index < 4)) {
6800c3d0
RM		 564 val -= 3;
565 } else if ((val == 3 && index < 4)
46bed4df 566 || (val == 4 && index >= 4)) {
6800c3d0
RM		 567 /* transform diode or thermistor into internal enable */
568 val = !!val;
569 } else {
570 return -EINVAL;
571 }
572
573 index = (index < 4) ? 0 : 1;
574 mutex_lock(&data->update_lock);
575 data->temp_mode[index] =
576 w83793_read_value(client, W83793_REG_TEMP_MODE[index]);
577 data->temp_mode[index] &= ~(mask << shift);
578 data->temp_mode[index] |= val << shift;
579 w83793_write_value(client, W83793_REG_TEMP_MODE[index],
580 data->temp_mode[index]);
581 mutex_unlock(&data->update_lock);
582
583 return count;
584}
585
586#define SETUP_PWM_DEFAULT 0
587#define SETUP_PWM_UPTIME 1 /* Unit in 0.1s */
588#define SETUP_PWM_DOWNTIME 2 /* Unit in 0.1s */
589#define SETUP_TEMP_CRITICAL 3
590static ssize_t
591show_sf_setup(struct device *dev, struct device_attribute *attr, char *buf)
592{
593 struct sensor_device_attribute_2 *sensor_attr =
594 to_sensor_dev_attr_2(attr);
595 int nr = sensor_attr->nr;
596 struct w83793_data *data = w83793_update_device(dev);
597 u32 val = 0;
598
599 if (SETUP_PWM_DEFAULT == nr) {
600 val = (data->pwm_default & 0x3f) << 2;
601 } else if (SETUP_PWM_UPTIME == nr) {
602 val = TIME_FROM_REG(data->pwm_uptime);
603 } else if (SETUP_PWM_DOWNTIME == nr) {
604 val = TIME_FROM_REG(data->pwm_downtime);
605 } else if (SETUP_TEMP_CRITICAL == nr) {
606 val = TEMP_FROM_REG(data->temp_critical & 0x7f);
607 }
608
609 return sprintf(buf, "%d\n", val);
610}
611
612static ssize_t
613store_sf_setup(struct device *dev, struct device_attribute *attr,
614 const char *buf, size_t count)
615{
616 struct sensor_device_attribute_2 *sensor_attr =
617 to_sensor_dev_attr_2(attr);
618 int nr = sensor_attr->nr;
619 struct i2c_client *client = to_i2c_client(dev);
620 struct w83793_data *data = i2c_get_clientdata(client);
621
622 mutex_lock(&data->update_lock);
623 if (SETUP_PWM_DEFAULT == nr) {
624 data->pwm_default =
625 w83793_read_value(client, W83793_REG_PWM_DEFAULT) & 0xc0;
626 data->pwm_default |= SENSORS_LIMIT(simple_strtoul(buf, NULL,
627 10),
628 0, 0xff) >> 2;
629 w83793_write_value(client, W83793_REG_PWM_DEFAULT,
630 data->pwm_default);
631 } else if (SETUP_PWM_UPTIME == nr) {
632 data->pwm_uptime = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
633 data->pwm_uptime += data->pwm_uptime == 0 ? 1 : 0;
634 w83793_write_value(client, W83793_REG_PWM_UPTIME,
635 data->pwm_uptime);
636 } else if (SETUP_PWM_DOWNTIME == nr) {
637 data->pwm_downtime = TIME_TO_REG(simple_strtoul(buf, NULL, 10));
638 data->pwm_downtime += data->pwm_downtime == 0 ? 1 : 0;
639 w83793_write_value(client, W83793_REG_PWM_DOWNTIME,
640 data->pwm_downtime);
641 } else { /* SETUP_TEMP_CRITICAL */
642 data->temp_critical =
643 w83793_read_value(client, W83793_REG_TEMP_CRITICAL) & 0x80;
644 data->temp_critical |= TEMP_TO_REG(simple_strtol(buf, NULL, 10),
645 0, 0x7f);
646 w83793_write_value(client, W83793_REG_TEMP_CRITICAL,
647 data->temp_critical);
648 }
649
650 mutex_unlock(&data->update_lock);
651 return count;
652}
653
654/*
655 Temp SmartFan control
656 TEMP_FAN_MAP
657 Temp channel control which pwm fan, bitfield, bit 0 indicate pwm1...
658 It's possible two or more temp channels control the same fan, w83793
659 always prefers to pick the most critical request and applies it to
660 the related Fan.
661 It's possible one fan is not in any mapping of 6 temp channels, this
662 means the fan is manual mode
663
664 TEMP_PWM_ENABLE
665 Each temp channel has its own SmartFan mode, and temp channel
666 control fans that are set by TEMP_FAN_MAP
667 0: SmartFanII mode
668 1: Thermal Cruise Mode
669
670 TEMP_CRUISE
671 Target temperature in thermal cruise mode, w83793 will try to turn
672 fan speed to keep the temperature of target device around this
673 temperature.
674
675 TEMP_TOLERANCE
676 If Temp higher or lower than target with this tolerance, w83793
677 will take actions to speed up or slow down the fan to keep the
678 temperature within the tolerance range.
679*/
680
681#define TEMP_FAN_MAP 0
682#define TEMP_PWM_ENABLE 1
683#define TEMP_CRUISE 2
684#define TEMP_TOLERANCE 3
685static ssize_t
686show_sf_ctrl(struct device *dev, struct device_attribute *attr, char *buf)
687{
688 struct sensor_device_attribute_2 *sensor_attr =
689 to_sensor_dev_attr_2(attr);
690 int nr = sensor_attr->nr;
691 int index = sensor_attr->index;
692 struct w83793_data *data = w83793_update_device(dev);
693 u32 val;
694
695 if (TEMP_FAN_MAP == nr) {
696 val = data->temp_fan_map[index];
697 } else if (TEMP_PWM_ENABLE == nr) {
698 /* +2 to transfrom into 2 and 3 to conform with sysfs intf */
699 val = ((data->pwm_enable >> index) & 0x01) + 2;
700 } else if (TEMP_CRUISE == nr) {
701 val = TEMP_FROM_REG(data->temp_cruise[index] & 0x7f);
702 } else { /* TEMP_TOLERANCE */
703 val = data->tolerance[index >> 1] >> ((index & 0x01) ? 4 : 0);
704 val = TEMP_FROM_REG(val & 0x0f);
705 }
706 return sprintf(buf, "%d\n", val);
707}
708
709static ssize_t
710store_sf_ctrl(struct device *dev, struct device_attribute *attr,
711 const char *buf, size_t count)
712{
713 struct sensor_device_attribute_2 *sensor_attr =
714 to_sensor_dev_attr_2(attr);
715 int nr = sensor_attr->nr;
716 int index = sensor_attr->index;
717 struct i2c_client *client = to_i2c_client(dev);
718 struct w83793_data *data = i2c_get_clientdata(client);
719 u32 val;
720
721 mutex_lock(&data->update_lock);
722 if (TEMP_FAN_MAP == nr) {
723 val = simple_strtoul(buf, NULL, 10) & 0xff;
724 w83793_write_value(client, W83793_REG_TEMP_FAN_MAP(index), val);
725 data->temp_fan_map[index] = val;
726 } else if (TEMP_PWM_ENABLE == nr) {
727 val = simple_strtoul(buf, NULL, 10);
728 if (2 == val || 3 == val) {
729 data->pwm_enable =
730 w83793_read_value(client, W83793_REG_PWM_ENABLE);
731 if (val - 2)
732 data->pwm_enable |= 1 << index;
733 else
734 data->pwm_enable &= ~(1 << index);
735 w83793_write_value(client, W83793_REG_PWM_ENABLE,
736 data->pwm_enable);
737 } else {
738 mutex_unlock(&data->update_lock);
739 return -EINVAL;
740 }
741 } else if (TEMP_CRUISE == nr) {
742 data->temp_cruise[index] =
743 w83793_read_value(client, W83793_REG_TEMP_CRUISE(index));
744 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x7f);
745 data->temp_cruise[index] &= 0x80;
746 data->temp_cruise[index] |= val;
747
748 w83793_write_value(client, W83793_REG_TEMP_CRUISE(index),
749 data->temp_cruise[index]);
750 } else { /* TEMP_TOLERANCE */
751 int i = index >> 1;
752 u8 shift = (index & 0x01) ? 4 : 0;
753 data->tolerance[i] =
754 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
755
756 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x0f);
757 data->tolerance[i] &= ~(0x0f << shift);
758 data->tolerance[i] |= val << shift;
759 w83793_write_value(client, W83793_REG_TEMP_TOL(i),
760 data->tolerance[i]);
761 }
762
763 mutex_unlock(&data->update_lock);
764 return count;
765}
766
767static ssize_t
768show_sf2_pwm(struct device *dev, struct device_attribute *attr, char *buf)
769{
770 struct sensor_device_attribute_2 *sensor_attr =
771 to_sensor_dev_attr_2(attr);
772 int nr = sensor_attr->nr;
773 int index = sensor_attr->index;
774 struct w83793_data *data = w83793_update_device(dev);
775
776 return sprintf(buf, "%d\n", (data->sf2_pwm[index][nr] & 0x3f) << 2);
777}
778
779static ssize_t
780store_sf2_pwm(struct device *dev, struct device_attribute *attr,
781 const char *buf, size_t count)
782{
783 struct i2c_client *client = to_i2c_client(dev);
784 struct w83793_data *data = i2c_get_clientdata(client);
785 struct sensor_device_attribute_2 *sensor_attr =
786 to_sensor_dev_attr_2(attr);
787 int nr = sensor_attr->nr;
788 int index = sensor_attr->index;
789 u8 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 0xff) >> 2;
790
791 mutex_lock(&data->update_lock);
792 data->sf2_pwm[index][nr] =
793 w83793_read_value(client, W83793_REG_SF2_PWM(index, nr)) & 0xc0;
794 data->sf2_pwm[index][nr] |= val;
795 w83793_write_value(client, W83793_REG_SF2_PWM(index, nr),
796 data->sf2_pwm[index][nr]);
797 mutex_unlock(&data->update_lock);
798 return count;
799}
800
801static ssize_t
802show_sf2_temp(struct device *dev, struct device_attribute *attr, char *buf)
803{
804 struct sensor_device_attribute_2 *sensor_attr =
805 to_sensor_dev_attr_2(attr);
806 int nr = sensor_attr->nr;
807 int index = sensor_attr->index;
808 struct w83793_data *data = w83793_update_device(dev);
809
810 return sprintf(buf, "%ld\n",
811 TEMP_FROM_REG(data->sf2_temp[index][nr] & 0x7f));
812}
813
814static ssize_t
815store_sf2_temp(struct device *dev, struct device_attribute *attr,
816 const char *buf, size_t count)
817{
818 struct i2c_client *client = to_i2c_client(dev);
819 struct w83793_data *data = i2c_get_clientdata(client);
820 struct sensor_device_attribute_2 *sensor_attr =
821 to_sensor_dev_attr_2(attr);
822 int nr = sensor_attr->nr;
823 int index = sensor_attr->index;
824 u8 val = TEMP_TO_REG(simple_strtol(buf, NULL, 10), 0, 0x7f);
825
826 mutex_lock(&data->update_lock);
827 data->sf2_temp[index][nr] =
828 w83793_read_value(client, W83793_REG_SF2_TEMP(index, nr)) & 0x80;
829 data->sf2_temp[index][nr] |= val;
830 w83793_write_value(client, W83793_REG_SF2_TEMP(index, nr),
831 data->sf2_temp[index][nr]);
832 mutex_unlock(&data->update_lock);
833 return count;
834}
835
836/* only Vcore A/B and Vtt have additional 2 bits precision */
837static ssize_t
838show_in(struct device *dev, struct device_attribute *attr, char *buf)
839{
840 struct sensor_device_attribute_2 *sensor_attr =
841 to_sensor_dev_attr_2(attr);
842 int nr = sensor_attr->nr;
843 int index = sensor_attr->index;
844 struct w83793_data *data = w83793_update_device(dev);
845 u16 val = data->in[index][nr];
846
847 if (index < 3) {
848 val <<= 2;
849 val += (data->in_low_bits[nr] >> (index * 2)) & 0x3;
850 }
ddca933b
GJ		 851 /* voltage inputs 5VDD and 5VSB needs 150mV offset */
852 val = val * scale_in[index] + scale_in_add[index];
853 return sprintf(buf, "%d\n", val);
6800c3d0
RM		 854}
855
856static ssize_t
857store_in(struct device *dev, struct device_attribute *attr,
858 const char *buf, size_t count)
859{
860 struct sensor_device_attribute_2 *sensor_attr =
861 to_sensor_dev_attr_2(attr);
862 int nr = sensor_attr->nr;
863 int index = sensor_attr->index;
864 struct i2c_client *client = to_i2c_client(dev);
865 struct w83793_data *data = i2c_get_clientdata(client);
866 u32 val;
867
868 val =
869 (simple_strtoul(buf, NULL, 10) +
870 scale_in[index] / 2) / scale_in[index];
871 mutex_lock(&data->update_lock);
872 if (index > 2) {
ddca933b
GJ		 873 /* fix the limit values of 5VDD and 5VSB to ALARM mechanism */
874 if (1 == nr || 2 == nr) {
875 val -= scale_in_add[index] / scale_in[index];
876 }
6800c3d0
RM		 877 val = SENSORS_LIMIT(val, 0, 255);
878 } else {
879 val = SENSORS_LIMIT(val, 0, 0x3FF);
880 data->in_low_bits[nr] =
881 w83793_read_value(client, W83793_REG_IN_LOW_BITS[nr]);
882 data->in_low_bits[nr] &= ~(0x03 << (2 * index));
883 data->in_low_bits[nr] |= (val & 0x03) << (2 * index);
884 w83793_write_value(client, W83793_REG_IN_LOW_BITS[nr],
885 data->in_low_bits[nr]);
886 val >>= 2;
887 }
888 data->in[index][nr] = val;
889 w83793_write_value(client, W83793_REG_IN[index][nr],
890 data->in[index][nr]);
891 mutex_unlock(&data->update_lock);
892 return count;
893}
894
895#define NOT_USED -1
896
897#define SENSOR_ATTR_IN(index) \
898 SENSOR_ATTR_2(in##index##_input, S_IRUGO, show_in, NULL, \
899 IN_READ, index), \
900 SENSOR_ATTR_2(in##index##_max, S_IRUGO | S_IWUSR, show_in, \
901 store_in, IN_MAX, index), \
902 SENSOR_ATTR_2(in##index##_min, S_IRUGO | S_IWUSR, show_in, \
903 store_in, IN_LOW, index), \
904 SENSOR_ATTR_2(in##index##_alarm, S_IRUGO, show_alarm_beep, \
905 NULL, ALARM_STATUS, index + ((index > 2) ? 1 : 0)), \
906 SENSOR_ATTR_2(in##index##_beep, S_IWUSR | S_IRUGO, \
907 show_alarm_beep, store_beep, BEEP_ENABLE, \
908 index + ((index > 2) ? 1 : 0))
909
910#define SENSOR_ATTR_FAN(index) \
911 SENSOR_ATTR_2(fan##index##_alarm, S_IRUGO, show_alarm_beep, \
912 NULL, ALARM_STATUS, index + 17), \
913 SENSOR_ATTR_2(fan##index##_beep, S_IWUSR | S_IRUGO, \
914 show_alarm_beep, store_beep, BEEP_ENABLE, index + 17), \
915 SENSOR_ATTR_2(fan##index##_input, S_IRUGO, show_fan, \
916 NULL, FAN_INPUT, index - 1), \
917 SENSOR_ATTR_2(fan##index##_min, S_IWUSR | S_IRUGO, \
918 show_fan, store_fan_min, FAN_MIN, index - 1)
919
920#define SENSOR_ATTR_PWM(index) \
921 SENSOR_ATTR_2(pwm##index, S_IWUSR | S_IRUGO, show_pwm, \
922 store_pwm, PWM_DUTY, index - 1), \
923 SENSOR_ATTR_2(pwm##index##_nonstop, S_IWUSR | S_IRUGO, \
924 show_pwm, store_pwm, PWM_NONSTOP, index - 1), \
925 SENSOR_ATTR_2(pwm##index##_start, S_IWUSR | S_IRUGO, \
926 show_pwm, store_pwm, PWM_START, index - 1), \
927 SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
928 show_pwm, store_pwm, PWM_STOP_TIME, index - 1)
929
930#define SENSOR_ATTR_TEMP(index) \
931 SENSOR_ATTR_2(temp##index##_type, S_IRUGO | S_IWUSR, \
932 show_temp_mode, store_temp_mode, NOT_USED, index - 1), \
933 SENSOR_ATTR_2(temp##index##_input, S_IRUGO, show_temp, \
934 NULL, TEMP_READ, index - 1), \
935 SENSOR_ATTR_2(temp##index##_max, S_IRUGO | S_IWUSR, show_temp, \
936 store_temp, TEMP_CRIT, index - 1), \
937 SENSOR_ATTR_2(temp##index##_max_hyst, S_IRUGO | S_IWUSR, \
938 show_temp, store_temp, TEMP_CRIT_HYST, index - 1), \
939 SENSOR_ATTR_2(temp##index##_warn, S_IRUGO | S_IWUSR, show_temp, \
940 store_temp, TEMP_WARN, index - 1), \
941 SENSOR_ATTR_2(temp##index##_warn_hyst, S_IRUGO | S_IWUSR, \
942 show_temp, store_temp, TEMP_WARN_HYST, index - 1), \
943 SENSOR_ATTR_2(temp##index##_alarm, S_IRUGO, \
944 show_alarm_beep, NULL, ALARM_STATUS, index + 11), \
945 SENSOR_ATTR_2(temp##index##_beep, S_IWUSR | S_IRUGO, \
946 show_alarm_beep, store_beep, BEEP_ENABLE, index + 11), \
947 SENSOR_ATTR_2(temp##index##_auto_channels_pwm, \
948 S_IRUGO | S_IWUSR, show_sf_ctrl, store_sf_ctrl, \
949 TEMP_FAN_MAP, index - 1), \
950 SENSOR_ATTR_2(temp##index##_pwm_enable, S_IWUSR | S_IRUGO, \
951 show_sf_ctrl, store_sf_ctrl, TEMP_PWM_ENABLE, \
952 index - 1), \
953 SENSOR_ATTR_2(thermal_cruise##index, S_IRUGO | S_IWUSR, \
954 show_sf_ctrl, store_sf_ctrl, TEMP_CRUISE, index - 1), \
955 SENSOR_ATTR_2(tolerance##index, S_IRUGO | S_IWUSR, show_sf_ctrl,\
956 store_sf_ctrl, TEMP_TOLERANCE, index - 1), \
957 SENSOR_ATTR_2(temp##index##_auto_point1_pwm, S_IRUGO | S_IWUSR, \
958 show_sf2_pwm, store_sf2_pwm, 0, index - 1), \
959 SENSOR_ATTR_2(temp##index##_auto_point2_pwm, S_IRUGO | S_IWUSR, \
960 show_sf2_pwm, store_sf2_pwm, 1, index - 1), \
961 SENSOR_ATTR_2(temp##index##_auto_point3_pwm, S_IRUGO | S_IWUSR, \
962 show_sf2_pwm, store_sf2_pwm, 2, index - 1), \
963 SENSOR_ATTR_2(temp##index##_auto_point4_pwm, S_IRUGO | S_IWUSR, \
964 show_sf2_pwm, store_sf2_pwm, 3, index - 1), \
965 SENSOR_ATTR_2(temp##index##_auto_point5_pwm, S_IRUGO | S_IWUSR, \
966 show_sf2_pwm, store_sf2_pwm, 4, index - 1), \
967 SENSOR_ATTR_2(temp##index##_auto_point6_pwm, S_IRUGO | S_IWUSR, \
968 show_sf2_pwm, store_sf2_pwm, 5, index - 1), \
969 SENSOR_ATTR_2(temp##index##_auto_point7_pwm, S_IRUGO | S_IWUSR, \
970 show_sf2_pwm, store_sf2_pwm, 6, index - 1), \
971 SENSOR_ATTR_2(temp##index##_auto_point1_temp, S_IRUGO | S_IWUSR,\
972 show_sf2_temp, store_sf2_temp, 0, index - 1), \
973 SENSOR_ATTR_2(temp##index##_auto_point2_temp, S_IRUGO | S_IWUSR,\
974 show_sf2_temp, store_sf2_temp, 1, index - 1), \
975 SENSOR_ATTR_2(temp##index##_auto_point3_temp, S_IRUGO | S_IWUSR,\
976 show_sf2_temp, store_sf2_temp, 2, index - 1), \
977 SENSOR_ATTR_2(temp##index##_auto_point4_temp, S_IRUGO | S_IWUSR,\
978 show_sf2_temp, store_sf2_temp, 3, index - 1), \
979 SENSOR_ATTR_2(temp##index##_auto_point5_temp, S_IRUGO | S_IWUSR,\
980 show_sf2_temp, store_sf2_temp, 4, index - 1), \
981 SENSOR_ATTR_2(temp##index##_auto_point6_temp, S_IRUGO | S_IWUSR,\
982 show_sf2_temp, store_sf2_temp, 5, index - 1), \
983 SENSOR_ATTR_2(temp##index##_auto_point7_temp, S_IRUGO | S_IWUSR,\
984 show_sf2_temp, store_sf2_temp, 6, index - 1)
985
986static struct sensor_device_attribute_2 w83793_sensor_attr_2[] = {
987 SENSOR_ATTR_IN(0),
988 SENSOR_ATTR_IN(1),
989 SENSOR_ATTR_IN(2),
990 SENSOR_ATTR_IN(3),
991 SENSOR_ATTR_IN(4),
992 SENSOR_ATTR_IN(5),
993 SENSOR_ATTR_IN(6),
994 SENSOR_ATTR_IN(7),
995 SENSOR_ATTR_IN(8),
996 SENSOR_ATTR_IN(9),
6800c3d0
RM		 997 SENSOR_ATTR_FAN(1),
998 SENSOR_ATTR_FAN(2),
999 SENSOR_ATTR_FAN(3),
1000 SENSOR_ATTR_FAN(4),
1001 SENSOR_ATTR_FAN(5),
1002 SENSOR_ATTR_PWM(1),
1003 SENSOR_ATTR_PWM(2),
1004 SENSOR_ATTR_PWM(3),
1005};
1006
46bed4df
GJ		 1007static struct sensor_device_attribute_2 w83793_temp[] = {
1008 SENSOR_ATTR_TEMP(1),
1009 SENSOR_ATTR_TEMP(2),
1010 SENSOR_ATTR_TEMP(3),
1011 SENSOR_ATTR_TEMP(4),
1012 SENSOR_ATTR_TEMP(5),
1013 SENSOR_ATTR_TEMP(6),
1014};
1015
6800c3d0
RM		 1016/* Fan6-Fan12 */
1017static struct sensor_device_attribute_2 w83793_left_fan[] = {
1018 SENSOR_ATTR_FAN(6),
1019 SENSOR_ATTR_FAN(7),
1020 SENSOR_ATTR_FAN(8),
1021 SENSOR_ATTR_FAN(9),
1022 SENSOR_ATTR_FAN(10),
1023 SENSOR_ATTR_FAN(11),
1024 SENSOR_ATTR_FAN(12),
1025};
1026
1027/* Pwm4-Pwm8 */
1028static struct sensor_device_attribute_2 w83793_left_pwm[] = {
1029 SENSOR_ATTR_PWM(4),
1030 SENSOR_ATTR_PWM(5),
1031 SENSOR_ATTR_PWM(6),
1032 SENSOR_ATTR_PWM(7),
1033 SENSOR_ATTR_PWM(8),
1034};
1035
c70a8c34 1036static struct sensor_device_attribute_2 w83793_vid[] = {
6800c3d0
RM		 1037 SENSOR_ATTR_2(cpu0_vid, S_IRUGO, show_vid, NULL, NOT_USED, 0),
1038 SENSOR_ATTR_2(cpu1_vid, S_IRUGO, show_vid, NULL, NOT_USED, 1),
c70a8c34 1039};
93c75a4a 1040static DEVICE_ATTR(vrm, S_IWUSR | S_IRUGO, show_vrm, store_vrm);
c70a8c34
GJ		 1041
1042static struct sensor_device_attribute_2 sda_single_files[] = {
6800c3d0
RM		 1043 SENSOR_ATTR_2(chassis, S_IWUSR | S_IRUGO, show_alarm_beep,
1044 store_chassis_clear, ALARM_STATUS, 30),
1045 SENSOR_ATTR_2(beep_enable, S_IWUSR | S_IRUGO, show_beep_enable,
1046 store_beep_enable, NOT_USED, NOT_USED),
1047 SENSOR_ATTR_2(pwm_default, S_IWUSR | S_IRUGO, show_sf_setup,
1048 store_sf_setup, SETUP_PWM_DEFAULT, NOT_USED),
1049 SENSOR_ATTR_2(pwm_uptime, S_IWUSR | S_IRUGO, show_sf_setup,
1050 store_sf_setup, SETUP_PWM_UPTIME, NOT_USED),
1051 SENSOR_ATTR_2(pwm_downtime, S_IWUSR | S_IRUGO, show_sf_setup,
1052 store_sf_setup, SETUP_PWM_DOWNTIME, NOT_USED),
1053 SENSOR_ATTR_2(temp_critical, S_IWUSR | S_IRUGO, show_sf_setup,
1054 store_sf_setup, SETUP_TEMP_CRITICAL, NOT_USED),
1055};
1056
1057static void w83793_init_client(struct i2c_client *client)
1058{
1059 if (reset) {
1060 w83793_write_value(client, W83793_REG_CONFIG, 0x80);
1061 }
1062
1063 /* Start monitoring */
1064 w83793_write_value(client, W83793_REG_CONFIG,
1065 w83793_read_value(client, W83793_REG_CONFIG) | 0x01);
1066
1067}
1068
a7f13a6e 1069static int w83793_remove(struct i2c_client *client)
6800c3d0
RM		 1070{
1071 struct w83793_data *data = i2c_get_clientdata(client);
1072 struct device *dev = &client->dev;
a7f13a6e 1073 int i;
6800c3d0 1074
a7f13a6e 1075 hwmon_device_unregister(data->hwmon_dev);
6800c3d0 1076
a7f13a6e
JD		 1077 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1078 device_remove_file(dev,
1079 &w83793_sensor_attr_2[i].dev_attr);
6800c3d0 1080
a7f13a6e
JD		 1081 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1082 device_remove_file(dev, &sda_single_files[i].dev_attr);
6800c3d0 1083
a7f13a6e
JD		 1084 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1085 device_remove_file(dev, &w83793_vid[i].dev_attr);
1086 device_remove_file(dev, &dev_attr_vrm);
c70a8c34 1087
a7f13a6e
JD		 1088 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1089 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
6800c3d0 1090
a7f13a6e
JD		 1091 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1092 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
46bed4df 1093
a7f13a6e
JD		 1094 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1095 device_remove_file(dev, &w83793_temp[i].dev_attr);
6800c3d0 1096
a7f13a6e
JD		 1097 if (data->lm75[0] != NULL)
1098 i2c_unregister_device(data->lm75[0]);
1099 if (data->lm75[1] != NULL)
1100 i2c_unregister_device(data->lm75[1]);
6800c3d0 1101
a7f13a6e 1102 kfree(data);
6800c3d0
RM		 1103
1104 return 0;
1105}
1106
1107static int
a7f13a6e 1108w83793_detect_subclients(struct i2c_client *client)
6800c3d0
RM		 1109{
1110 int i, id, err;
a7f13a6e 1111 int address = client->addr;
6800c3d0 1112 u8 tmp;
a7f13a6e 1113 struct i2c_adapter *adapter = client->adapter;
6800c3d0
RM		 1114 struct w83793_data *data = i2c_get_clientdata(client);
1115
1116 id = i2c_adapter_id(adapter);
1117 if (force_subclients[0] == id && force_subclients[1] == address) {
1118 for (i = 2; i <= 3; i++) {
1119 if (force_subclients[i] < 0x48
1120 || force_subclients[i] > 0x4f) {
1121 dev_err(&client->dev,
1122 "invalid subclient "
1123 "address %d; must be 0x48-0x4f\n",
1124 force_subclients[i]);
1125 err = -EINVAL;
1126 goto ERROR_SC_0;
1127 }
1128 }
1129 w83793_write_value(client, W83793_REG_I2C_SUBADDR,
1130 (force_subclients[2] & 0x07) |
1131 ((force_subclients[3] & 0x07) << 4));
1132 }
1133
1134 tmp = w83793_read_value(client, W83793_REG_I2C_SUBADDR);
1135 if (!(tmp & 0x08)) {
a7f13a6e 1136 data->lm75[0] = i2c_new_dummy(adapter, 0x48 + (tmp & 0x7));
6800c3d0
RM		 1137 }
1138 if (!(tmp & 0x80)) {
1139 if ((data->lm75[0] != NULL)
1140 && ((tmp & 0x7) == ((tmp >> 4) & 0x7))) {
1141 dev_err(&client->dev,
1142 "duplicate addresses 0x%x, "
1143 "use force_subclients\n", data->lm75[0]->addr);
1144 err = -ENODEV;
1145 goto ERROR_SC_1;
1146 }
a7f13a6e
JD		 1147 data->lm75[1] = i2c_new_dummy(adapter,
1148 0x48 + ((tmp >> 4) & 0x7));
6800c3d0
RM		 1149 }
1150
1151 return 0;
1152
1153 /* Undo inits in case of errors */
1154
1155ERROR_SC_1:
a7f13a6e
JD		 1156 if (data->lm75[0] != NULL)
1157 i2c_unregister_device(data->lm75[0]);
6800c3d0
RM		 1158ERROR_SC_0:
1159 return err;
1160}
1161
a7f13a6e 1162/* Return 0 if detection is successful, -ENODEV otherwise */
310ec792 1163static int w83793_detect(struct i2c_client *client,
a7f13a6e 1164 struct i2c_board_info *info)
6800c3d0 1165{
52df6440 1166 u8 tmp, bank, chip_id;
a7f13a6e
JD		 1167 struct i2c_adapter *adapter = client->adapter;
1168 unsigned short address = client->addr;
6800c3d0
RM		 1169
1170 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
a7f13a6e 1171 return -ENODEV;
6800c3d0
RM		 1172 }
1173
a7f13a6e 1174 bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0 1175
52df6440
JD		 1176 tmp = bank & 0x80 ? 0x5c : 0xa3;
1177 /* Check Winbond vendor ID */
1178 if (tmp != i2c_smbus_read_byte_data(client, W83793_REG_VENDORID)) {
1179 pr_debug("w83793: Detection failed at check vendor id\n");
1180 return -ENODEV;
6800c3d0
RM		 1181 }
1182
52df6440
JD		 1183 /* If Winbond chip, address of chip and W83793_REG_I2C_ADDR
1184 should match */
1185 if ((bank & 0x07) == 0
1186 && i2c_smbus_read_byte_data(client, W83793_REG_I2C_ADDR) !=
1187 (address << 1)) {
1188 pr_debug("w83793: Detection failed at check i2c addr\n");
1189 return -ENODEV;
6800c3d0
RM		 1190 }
1191
52df6440
JD		 1192 /* Determine the chip type now */
1193 chip_id = i2c_smbus_read_byte_data(client, W83793_REG_CHIPID);
1194 if (chip_id != 0x7b)
1195 return -ENODEV;
1196
a7f13a6e
JD		 1197 strlcpy(info->type, "w83793", I2C_NAME_SIZE);
1198
1199 return 0;
1200}
6800c3d0 1201
a7f13a6e
JD		 1202static int w83793_probe(struct i2c_client *client,
1203 const struct i2c_device_id *id)
1204{
1205 struct device *dev = &client->dev;
1206 struct w83793_data *data;
1207 int i, tmp, val, err;
1208 int files_fan = ARRAY_SIZE(w83793_left_fan) / 7;
1209 int files_pwm = ARRAY_SIZE(w83793_left_pwm) / 5;
1210 int files_temp = ARRAY_SIZE(w83793_temp) / 6;
1211
1212 data = kzalloc(sizeof(struct w83793_data), GFP_KERNEL);
1213 if (!data) {
1214 err = -ENOMEM;
1215 goto exit;
1216 }
1217
1218 i2c_set_clientdata(client, data);
1219 data->bank = i2c_smbus_read_byte_data(client, W83793_REG_BANKSEL);
6800c3d0
RM		 1220 mutex_init(&data->update_lock);
1221
a7f13a6e
JD		 1222 err = w83793_detect_subclients(client);
1223 if (err)
6800c3d0
RM		 1224 goto free_mem;
1225
6800c3d0
RM		 1226 /* Initialize the chip */
1227 w83793_init_client(client);
1228
6800c3d0
RM		 1229 /*
1230 Only fan 1-5 has their own input pins,
1231 Pwm 1-3 has their own pins
1232 */
1233 data->has_fan = 0x1f;
1234 data->has_pwm = 0x07;
1235 tmp = w83793_read_value(client, W83793_REG_MFC);
1236 val = w83793_read_value(client, W83793_REG_FANIN_CTRL);
1237
1238 /* check the function of pins 49-56 */
93c75a4a
JD		 1239 if (tmp & 0x80) {
1240 data->has_vid |= 0x2; /* has VIDB */
1241 } else {
6800c3d0
RM		 1242 data->has_pwm |= 0x18; /* pwm 4,5 */
1243 if (val & 0x01) { /* fan 6 */
1244 data->has_fan |= 0x20;
1245 data->has_pwm |= 0x20;
1246 }
1247 if (val & 0x02) { /* fan 7 */
1248 data->has_fan |= 0x40;
1249 data->has_pwm |= 0x40;
1250 }
1251 if (!(tmp & 0x40) && (val & 0x04)) { /* fan 8 */
1252 data->has_fan |= 0x80;
1253 data->has_pwm |= 0x80;
1254 }
1255 }
1256
93c75a4a
JD		 1257 /* check the function of pins 37-40 */
1258 if (!(tmp & 0x29))
1259 data->has_vid |= 0x1; /* has VIDA */
6800c3d0
RM		 1260 if (0x08 == (tmp & 0x0c)) {
1261 if (val & 0x08) /* fan 9 */
1262 data->has_fan |= 0x100;
1263 if (val & 0x10) /* fan 10 */
1264 data->has_fan |= 0x200;
1265 }
6800c3d0
RM		 1266 if (0x20 == (tmp & 0x30)) {
1267 if (val & 0x20) /* fan 11 */
1268 data->has_fan |= 0x400;
1269 if (val & 0x40) /* fan 12 */
1270 data->has_fan |= 0x800;
1271 }
1272
1273 if ((tmp & 0x01) && (val & 0x04)) { /* fan 8, second location */
1274 data->has_fan |= 0x80;
1275 data->has_pwm |= 0x80;
1276 }
1277
c9294315
RM		 1278 tmp = w83793_read_value(client, W83793_REG_FANIN_SEL);
1279 if ((tmp & 0x01) && (val & 0x08)) { /* fan 9, second location */
1280 data->has_fan |= 0x100;
1281 }
1282 if ((tmp & 0x02) && (val & 0x10)) { /* fan 10, second location */
1283 data->has_fan |= 0x200;
1284 }
1285 if ((tmp & 0x04) && (val & 0x20)) { /* fan 11, second location */
1286 data->has_fan |= 0x400;
1287 }
1288 if ((tmp & 0x08) && (val & 0x40)) { /* fan 12, second location */
1289 data->has_fan |= 0x800;
1290 }
1291
46bed4df
GJ		 1292 /* check the temp1-6 mode, ignore former AMDSI selected inputs */
1293 tmp = w83793_read_value(client,W83793_REG_TEMP_MODE[0]);
1294 if (tmp & 0x01)
1295 data->has_temp |= 0x01;
1296 if (tmp & 0x04)
1297 data->has_temp |= 0x02;
1298 if (tmp & 0x10)
1299 data->has_temp |= 0x04;
1300 if (tmp & 0x40)
1301 data->has_temp |= 0x08;
1302
1303 tmp = w83793_read_value(client,W83793_REG_TEMP_MODE[1]);
1304 if (tmp & 0x01)
1305 data->has_temp |= 0x10;
1306 if (tmp & 0x02)
1307 data->has_temp |= 0x20;
1308
6800c3d0
RM		 1309 /* Register sysfs hooks */
1310 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++) {
1311 err = device_create_file(dev,
1312 &w83793_sensor_attr_2[i].dev_attr);
1313 if (err)
1314 goto exit_remove;
1315 }
1316
c70a8c34
GJ		 1317 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++) {
1318 if (!(data->has_vid & (1 << i)))
1319 continue;
1320 err = device_create_file(dev, &w83793_vid[i].dev_attr);
1321 if (err)
1322 goto exit_remove;
1323 }
93c75a4a
JD		 1324 if (data->has_vid) {
1325 data->vrm = vid_which_vrm();
1326 err = device_create_file(dev, &dev_attr_vrm);
1327 if (err)
1328 goto exit_remove;
1329 }
c70a8c34 1330
6800c3d0
RM		 1331 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++) {
1332 err = device_create_file(dev, &sda_single_files[i].dev_attr);
1333 if (err)
1334 goto exit_remove;
1335
1336 }
1337
46bed4df
GJ		 1338 for (i = 0; i < 6; i++) {
1339 int j;
1340 if (!(data->has_temp & (1 << i)))
1341 continue;
1342 for (j = 0; j < files_temp; j++) {
1343 err = device_create_file(dev,
1344 &w83793_temp[(i) * files_temp
1345 + j].dev_attr);
1346 if (err)
1347 goto exit_remove;
1348 }
1349 }
1350
6800c3d0
RM		 1351 for (i = 5; i < 12; i++) {
1352 int j;
1353 if (!(data->has_fan & (1 << i)))
1354 continue;
1355 for (j = 0; j < files_fan; j++) {
1356 err = device_create_file(dev,
1357 &w83793_left_fan[(i - 5) * files_fan
1358 + j].dev_attr);
1359 if (err)
1360 goto exit_remove;
1361 }
1362 }
1363
1364 for (i = 3; i < 8; i++) {
1365 int j;
1366 if (!(data->has_pwm & (1 << i)))
1367 continue;
1368 for (j = 0; j < files_pwm; j++) {
1369 err = device_create_file(dev,
1370 &w83793_left_pwm[(i - 3) * files_pwm
1371 + j].dev_attr);
1372 if (err)
1373 goto exit_remove;
1374 }
1375 }
1376
1beeffe4
TJ		 1377 data->hwmon_dev = hwmon_device_register(dev);
1378 if (IS_ERR(data->hwmon_dev)) {
1379 err = PTR_ERR(data->hwmon_dev);
6800c3d0
RM		 1380 goto exit_remove;
1381 }
1382
1383 return 0;
1384
1385 /* Unregister sysfs hooks */
1386
1387exit_remove:
1388 for (i = 0; i < ARRAY_SIZE(w83793_sensor_attr_2); i++)
1389 device_remove_file(dev, &w83793_sensor_attr_2[i].dev_attr);
1390
1391 for (i = 0; i < ARRAY_SIZE(sda_single_files); i++)
1392 device_remove_file(dev, &sda_single_files[i].dev_attr);
1393
c70a8c34
GJ		 1394 for (i = 0; i < ARRAY_SIZE(w83793_vid); i++)
1395 device_remove_file(dev, &w83793_vid[i].dev_attr);
1396
6800c3d0
RM		 1397 for (i = 0; i < ARRAY_SIZE(w83793_left_fan); i++)
1398 device_remove_file(dev, &w83793_left_fan[i].dev_attr);
1399
1400 for (i = 0; i < ARRAY_SIZE(w83793_left_pwm); i++)
1401 device_remove_file(dev, &w83793_left_pwm[i].dev_attr);
1402
46bed4df
GJ		 1403 for (i = 0; i < ARRAY_SIZE(w83793_temp); i++)
1404 device_remove_file(dev, &w83793_temp[i].dev_attr);
1405
a7f13a6e
JD		 1406 if (data->lm75[0] != NULL)
1407 i2c_unregister_device(data->lm75[0]);
1408 if (data->lm75[1] != NULL)
1409 i2c_unregister_device(data->lm75[1]);
6800c3d0
RM		 1410free_mem:
1411 kfree(data);
1412exit:
1413 return err;
1414}
1415
1416static void w83793_update_nonvolatile(struct device *dev)
1417{
1418 struct i2c_client *client = to_i2c_client(dev);
1419 struct w83793_data *data = i2c_get_clientdata(client);
1420 int i, j;
1421 /*
1422 They are somewhat "stable" registers, and to update them everytime
1423 takes so much time, it's just not worthy. Update them in a long
1424 interval to avoid exception.
1425 */
1426 if (!(time_after(jiffies, data->last_nonvolatile + HZ * 300)
1427 || !data->valid))
1428 return;
1429 /* update voltage limits */
1430 for (i = 1; i < 3; i++) {
1431 for (j = 0; j < ARRAY_SIZE(data->in); j++) {
1432 data->in[j][i] =
1433 w83793_read_value(client, W83793_REG_IN[j][i]);
1434 }
1435 data->in_low_bits[i] =
1436 w83793_read_value(client, W83793_REG_IN_LOW_BITS[i]);
1437 }
1438
1439 for (i = 0; i < ARRAY_SIZE(data->fan_min); i++) {
1440 /* Update the Fan measured value and limits */
1441 if (!(data->has_fan & (1 << i))) {
1442 continue;
1443 }
1444 data->fan_min[i] =
1445 w83793_read_value(client, W83793_REG_FAN_MIN(i)) << 8;
1446 data->fan_min[i] |=
1447 w83793_read_value(client, W83793_REG_FAN_MIN(i) + 1);
1448 }
1449
1450 for (i = 0; i < ARRAY_SIZE(data->temp_fan_map); i++) {
46bed4df
GJ		 1451 if (!(data->has_temp & (1 << i)))
1452 continue;
6800c3d0
RM		 1453 data->temp_fan_map[i] =
1454 w83793_read_value(client, W83793_REG_TEMP_FAN_MAP(i));
1455 for (j = 1; j < 5; j++) {
1456 data->temp[i][j] =
1457 w83793_read_value(client, W83793_REG_TEMP[i][j]);
1458 }
1459 data->temp_cruise[i] =
1460 w83793_read_value(client, W83793_REG_TEMP_CRUISE(i));
1461 for (j = 0; j < 7; j++) {
1462 data->sf2_pwm[i][j] =
1463 w83793_read_value(client, W83793_REG_SF2_PWM(i, j));
1464 data->sf2_temp[i][j] =
1465 w83793_read_value(client,
1466 W83793_REG_SF2_TEMP(i, j));
1467 }
1468 }
1469
1470 for (i = 0; i < ARRAY_SIZE(data->temp_mode); i++)
1471 data->temp_mode[i] =
1472 w83793_read_value(client, W83793_REG_TEMP_MODE[i]);
1473
1474 for (i = 0; i < ARRAY_SIZE(data->tolerance); i++) {
1475 data->tolerance[i] =
1476 w83793_read_value(client, W83793_REG_TEMP_TOL(i));
1477 }
1478
1479 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
1480 if (!(data->has_pwm & (1 << i)))
1481 continue;
1482 data->pwm[i][PWM_NONSTOP] =
1483 w83793_read_value(client, W83793_REG_PWM(i, PWM_NONSTOP));
1484 data->pwm[i][PWM_START] =
1485 w83793_read_value(client, W83793_REG_PWM(i, PWM_START));
1486 data->pwm_stop_time[i] =
1487 w83793_read_value(client, W83793_REG_PWM_STOP_TIME(i));
1488 }
1489
1490 data->pwm_default = w83793_read_value(client, W83793_REG_PWM_DEFAULT);
1491 data->pwm_enable = w83793_read_value(client, W83793_REG_PWM_ENABLE);
1492 data->pwm_uptime = w83793_read_value(client, W83793_REG_PWM_UPTIME);
1493 data->pwm_downtime = w83793_read_value(client, W83793_REG_PWM_DOWNTIME);
1494 data->temp_critical =
1495 w83793_read_value(client, W83793_REG_TEMP_CRITICAL);
1496 data->beep_enable = w83793_read_value(client, W83793_REG_OVT_BEEP);
1497
1498 for (i = 0; i < ARRAY_SIZE(data->beeps); i++) {
1499 data->beeps[i] = w83793_read_value(client, W83793_REG_BEEP(i));
1500 }
1501
1502 data->last_nonvolatile = jiffies;
1503}
1504
1505static struct w83793_data *w83793_update_device(struct device *dev)
1506{
1507 struct i2c_client *client = to_i2c_client(dev);
1508 struct w83793_data *data = i2c_get_clientdata(client);
1509 int i;
1510
1511 mutex_lock(&data->update_lock);
1512
1513 if (!(time_after(jiffies, data->last_updated + HZ * 2)
1514 || !data->valid))
1515 goto END;
1516
1517 /* Update the voltages measured value and limits */
1518 for (i = 0; i < ARRAY_SIZE(data->in); i++)
1519 data->in[i][IN_READ] =
1520 w83793_read_value(client, W83793_REG_IN[i][IN_READ]);
1521
1522 data->in_low_bits[IN_READ] =
1523 w83793_read_value(client, W83793_REG_IN_LOW_BITS[IN_READ]);
1524
1525 for (i = 0; i < ARRAY_SIZE(data->fan); i++) {
1526 if (!(data->has_fan & (1 << i))) {
1527 continue;
1528 }
1529 data->fan[i] =
1530 w83793_read_value(client, W83793_REG_FAN(i)) << 8;
1531 data->fan[i] |=
1532 w83793_read_value(client, W83793_REG_FAN(i) + 1);
1533 }
1534
46bed4df
GJ		 1535 for (i = 0; i < ARRAY_SIZE(data->temp); i++) {
1536 if (!(data->has_temp & (1 << i)))
1537 continue;
6800c3d0
RM		 1538 data->temp[i][TEMP_READ] =
1539 w83793_read_value(client, W83793_REG_TEMP[i][TEMP_READ]);
46bed4df 1540 }
6800c3d0
RM		 1541
1542 data->temp_low_bits =
1543 w83793_read_value(client, W83793_REG_TEMP_LOW_BITS);
1544
1545 for (i = 0; i < ARRAY_SIZE(data->pwm); i++) {
1546 if (data->has_pwm & (1 << i))
1547 data->pwm[i][PWM_DUTY] =
1548 w83793_read_value(client,
1549 W83793_REG_PWM(i, PWM_DUTY));
1550 }
1551
1552 for (i = 0; i < ARRAY_SIZE(data->alarms); i++)
1553 data->alarms[i] =
1554 w83793_read_value(client, W83793_REG_ALARM(i));
c70a8c34
GJ		 1555 if (data->has_vid & 0x01)
1556 data->vid[0] = w83793_read_value(client, W83793_REG_VID_INA);
1557 if (data->has_vid & 0x02)
1558 data->vid[1] = w83793_read_value(client, W83793_REG_VID_INB);
6800c3d0
RM		 1559 w83793_update_nonvolatile(dev);
1560 data->last_updated = jiffies;
1561 data->valid = 1;
1562
1563END:
1564 mutex_unlock(&data->update_lock);
1565 return data;
1566}
1567
1568/* Ignore the possibility that somebody change bank outside the driver
1569 Must be called with data->update_lock held, except during initialization */
1570static u8 w83793_read_value(struct i2c_client *client, u16 reg)
1571{
1572 struct w83793_data *data = i2c_get_clientdata(client);
1573 u8 res = 0xff;
1574 u8 new_bank = reg >> 8;
1575
1576 new_bank |= data->bank & 0xfc;
1577 if (data->bank != new_bank) {
1578 if (i2c_smbus_write_byte_data
1579 (client, W83793_REG_BANKSEL, new_bank) >= 0)
1580 data->bank = new_bank;
1581 else {
1582 dev_err(&client->dev,
1583 "set bank to %d failed, fall back "
1584 "to bank %d, read reg 0x%x error\n",
1585 new_bank, data->bank, reg);
1586 res = 0x0; /* read 0x0 from the chip */
1587 goto END;
1588 }
1589 }
1590 res = i2c_smbus_read_byte_data(client, reg & 0xff);
1591END:
1592 return res;
1593}
1594
1595/* Must be called with data->update_lock held, except during initialization */
1596static int w83793_write_value(struct i2c_client *client, u16 reg, u8 value)
1597{
1598 struct w83793_data *data = i2c_get_clientdata(client);
1599 int res;
1600 u8 new_bank = reg >> 8;
1601
1602 new_bank |= data->bank & 0xfc;
1603 if (data->bank != new_bank) {
1604 if ((res = i2c_smbus_write_byte_data
1605 (client, W83793_REG_BANKSEL, new_bank)) >= 0)
1606 data->bank = new_bank;
1607 else {
1608 dev_err(&client->dev,
1609 "set bank to %d failed, fall back "
1610 "to bank %d, write reg 0x%x error\n",
1611 new_bank, data->bank, reg);
1612 goto END;
1613 }
1614 }
1615
1616 res = i2c_smbus_write_byte_data(client, reg & 0xff, value);
1617END:
1618 return res;
1619}
1620
1621static int __init sensors_w83793_init(void)
1622{
1623 return i2c_add_driver(&w83793_driver);
1624}
1625
1626static void __exit sensors_w83793_exit(void)
1627{
1628 i2c_del_driver(&w83793_driver);
1629}
1630
1631MODULE_AUTHOR("Yuan Mu");
1632MODULE_DESCRIPTION("w83793 driver");
1633MODULE_LICENSE("GPL");
1634
1635module_init(sensors_w83793_init);
1636module_exit(sensors_w83793_exit);
Clone of davem's net-next-2.6 tree