]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/gpu/drm/radeon/radeon_drv.c
Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied...
[net-next-2.6.git] / drivers / gpu / drm / radeon / radeon_drv.c
CommitLineData
1da177e4
LT
1/**
2 * \file radeon_drv.c
3 * ATI Radeon driver
4 *
5 * \author Gareth Hughes <gareth@valinux.com>
6 */
7
8/*
9 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
10 * All Rights Reserved.
11 *
12 * Permission is hereby granted, free of charge, to any person obtaining a
13 * copy of this software and associated documentation files (the "Software"),
14 * to deal in the Software without restriction, including without limitation
15 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
16 * and/or sell copies of the Software, and to permit persons to whom the
17 * Software is furnished to do so, subject to the following conditions:
18 *
19 * The above copyright notice and this permission notice (including the next
20 * paragraph) shall be included in all copies or substantial portions of the
21 * Software.
22 *
23 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
24 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
25 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
26 * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
27 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
28 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
29 * OTHER DEALINGS IN THE SOFTWARE.
30 */
31
1da177e4
LT
32#include "drmP.h"
33#include "drm.h"
34#include "radeon_drm.h"
35#include "radeon_drv.h"
36
37#include "drm_pciids.h"
771fe6b9
JG
38#include <linux/console.h>
39
40
771fe6b9
JG
41/*
42 * KMS wrapper.
0de1a57b
DA
43 * - 2.0.0 - initial interface
44 * - 2.1.0 - add square tiling interface
fdb43528 45 * - 2.2.0 - add r6xx/r7xx const buffer support
cae94b0a 46 * - 2.3.0 - add MSPOS + 3D texture + r500 VAP regs
bc35afdb 47 * - 2.4.0 - add crtc id query
148a03bc 48 * - 2.5.0 - add get accel 2 to work around ddx breakage for evergreen
771fe6b9
JG
49 */
50#define KMS_DRIVER_MAJOR 2
148a03bc 51#define KMS_DRIVER_MINOR 5
771fe6b9
JG
52#define KMS_DRIVER_PATCHLEVEL 0
53int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);
54int radeon_driver_unload_kms(struct drm_device *dev);
55int radeon_driver_firstopen_kms(struct drm_device *dev);
56void radeon_driver_lastclose_kms(struct drm_device *dev);
57int radeon_driver_open_kms(struct drm_device *dev, struct drm_file *file_priv);
58void radeon_driver_postclose_kms(struct drm_device *dev,
59 struct drm_file *file_priv);
60void radeon_driver_preclose_kms(struct drm_device *dev,
61 struct drm_file *file_priv);
62int radeon_suspend_kms(struct drm_device *dev, pm_message_t state);
63int radeon_resume_kms(struct drm_device *dev);
64u32 radeon_get_vblank_counter_kms(struct drm_device *dev, int crtc);
65int radeon_enable_vblank_kms(struct drm_device *dev, int crtc);
66void radeon_disable_vblank_kms(struct drm_device *dev, int crtc);
67void radeon_driver_irq_preinstall_kms(struct drm_device *dev);
68int radeon_driver_irq_postinstall_kms(struct drm_device *dev);
69void radeon_driver_irq_uninstall_kms(struct drm_device *dev);
70irqreturn_t radeon_driver_irq_handler_kms(DRM_IRQ_ARGS);
771fe6b9
JG
71int radeon_dma_ioctl_kms(struct drm_device *dev, void *data,
72 struct drm_file *file_priv);
73int radeon_gem_object_init(struct drm_gem_object *obj);
74void radeon_gem_object_free(struct drm_gem_object *obj);
75extern struct drm_ioctl_desc radeon_ioctls_kms[];
76extern int radeon_max_kms_ioctl;
77int radeon_mmap(struct file *filp, struct vm_area_struct *vma);
78#if defined(CONFIG_DEBUG_FS)
79int radeon_debugfs_init(struct drm_minor *minor);
80void radeon_debugfs_cleanup(struct drm_minor *minor);
81#endif
771fe6b9 82
1da177e4 83
689b9d74 84int radeon_no_wb;
771fe6b9
JG
85int radeon_modeset = -1;
86int radeon_dynclks = -1;
87int radeon_r4xx_atom = 0;
88int radeon_agpmode = 0;
89int radeon_vram_limit = 0;
90int radeon_gart_size = 512; /* default gart size */
91int radeon_benchmarking = 0;
ecc0b326 92int radeon_testing = 0;
771fe6b9 93int radeon_connector_table = 0;
4ce001ab 94int radeon_tv = 1;
383be5d1 95int radeon_new_pll = -1;
dafc3bd5 96int radeon_audio = 1;
f46c0120 97int radeon_disp_priority = 0;
e2b0a8e1 98int radeon_hw_i2c = 0;
689b9d74 99
61a2d07d 100MODULE_PARM_DESC(no_wb, "Disable AGP writeback for scratch registers");
689b9d74
DA
101module_param_named(no_wb, radeon_no_wb, int, 0444);
102
771fe6b9
JG
103MODULE_PARM_DESC(modeset, "Disable/Enable modesetting");
104module_param_named(modeset, radeon_modeset, int, 0400);
105
106MODULE_PARM_DESC(dynclks, "Disable/Enable dynamic clocks");
107module_param_named(dynclks, radeon_dynclks, int, 0444);
108
109MODULE_PARM_DESC(r4xx_atom, "Enable ATOMBIOS modesetting for R4xx");
110module_param_named(r4xx_atom, radeon_r4xx_atom, int, 0444);
111
112MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing");
113module_param_named(vramlimit, radeon_vram_limit, int, 0600);
114
115MODULE_PARM_DESC(agpmode, "AGP Mode (-1 == PCI)");
116module_param_named(agpmode, radeon_agpmode, int, 0444);
117
118MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32,64, etc)\n");
119module_param_named(gartsize, radeon_gart_size, int, 0600);
120
121MODULE_PARM_DESC(benchmark, "Run benchmark");
122module_param_named(benchmark, radeon_benchmarking, int, 0444);
123
ecc0b326
MD
124MODULE_PARM_DESC(test, "Run tests");
125module_param_named(test, radeon_testing, int, 0444);
126
771fe6b9
JG
127MODULE_PARM_DESC(connector_table, "Force connector table");
128module_param_named(connector_table, radeon_connector_table, int, 0444);
4ce001ab
DA
129
130MODULE_PARM_DESC(tv, "TV enable (0 = disable)");
131module_param_named(tv, radeon_tv, int, 0444);
771fe6b9 132
383be5d1 133MODULE_PARM_DESC(new_pll, "Select new PLL code");
b27b6375
AD
134module_param_named(new_pll, radeon_new_pll, int, 0444);
135
dafc3bd5
CK
136MODULE_PARM_DESC(audio, "Audio enable (0 = disable)");
137module_param_named(audio, radeon_audio, int, 0444);
138
f46c0120
AD
139MODULE_PARM_DESC(disp_priority, "Display Priority (0 = auto, 1 = normal, 2 = high)");
140module_param_named(disp_priority, radeon_disp_priority, int, 0444);
141
e2b0a8e1
AD
142MODULE_PARM_DESC(hw_i2c, "hw i2c engine enable (0 = disable)");
143module_param_named(hw_i2c, radeon_hw_i2c, int, 0444);
144
0a3e67a4
JB
145static int radeon_suspend(struct drm_device *dev, pm_message_t state)
146{
147 drm_radeon_private_t *dev_priv = dev->dev_private;
148
03efb885
DA
149 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
150 return 0;
151
0a3e67a4 152 /* Disable *all* interrupts */
800b6995 153 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4
JB
154 RADEON_WRITE(R500_DxMODE_INT_MASK, 0);
155 RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
156 return 0;
157}
158
159static int radeon_resume(struct drm_device *dev)
160{
161 drm_radeon_private_t *dev_priv = dev->dev_private;
162
03efb885
DA
163 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
164 return 0;
165
0a3e67a4 166 /* Restore interrupt registers */
800b6995 167 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600)
0a3e67a4
JB
168 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
169 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
170 return 0;
171}
172
1da177e4
LT
173static struct pci_device_id pciidlist[] = {
174 radeon_PCI_IDS
175};
176
771fe6b9
JG
177#if defined(CONFIG_DRM_RADEON_KMS)
178MODULE_DEVICE_TABLE(pci, pciidlist);
179#endif
180
181static struct drm_driver driver_old = {
b5e89ed5
DA
182 .driver_features =
183 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
0a3e67a4 184 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED,
1da177e4 185 .dev_priv_size = sizeof(drm_radeon_buf_priv_t),
22eae947
DA
186 .load = radeon_driver_load,
187 .firstopen = radeon_driver_firstopen,
188 .open = radeon_driver_open,
189 .preclose = radeon_driver_preclose,
190 .postclose = radeon_driver_postclose,
191 .lastclose = radeon_driver_lastclose,
192 .unload = radeon_driver_unload,
0a3e67a4
JB
193 .suspend = radeon_suspend,
194 .resume = radeon_resume,
195 .get_vblank_counter = radeon_get_vblank_counter,
196 .enable_vblank = radeon_enable_vblank,
197 .disable_vblank = radeon_disable_vblank,
60f2ee0b
DA
198 .master_create = radeon_master_create,
199 .master_destroy = radeon_master_destroy,
1da177e4
LT
200 .irq_preinstall = radeon_driver_irq_preinstall,
201 .irq_postinstall = radeon_driver_irq_postinstall,
202 .irq_uninstall = radeon_driver_irq_uninstall,
203 .irq_handler = radeon_driver_irq_handler,
1da177e4
LT
204 .reclaim_buffers = drm_core_reclaim_buffers,
205 .get_map_ofs = drm_core_get_map_ofs,
206 .get_reg_ofs = drm_core_get_reg_ofs,
1da177e4
LT
207 .ioctls = radeon_ioctls,
208 .dma_ioctl = radeon_cp_buffers,
209 .fops = {
b5e89ed5
DA
210 .owner = THIS_MODULE,
211 .open = drm_open,
212 .release = drm_release,
ed8b6704 213 .unlocked_ioctl = drm_ioctl,
b5e89ed5
DA
214 .mmap = drm_mmap,
215 .poll = drm_poll,
216 .fasync = drm_fasync,
4fa07bf1 217 .read = drm_read,
9a186645 218#ifdef CONFIG_COMPAT
b5e89ed5 219 .compat_ioctl = radeon_compat_ioctl,
9a186645 220#endif
22eae947
DA
221 },
222
1da177e4 223 .pci_driver = {
22eae947
DA
224 .name = DRIVER_NAME,
225 .id_table = pciidlist,
226 },
227
228 .name = DRIVER_NAME,
229 .desc = DRIVER_DESC,
230 .date = DRIVER_DATE,
231 .major = DRIVER_MAJOR,
232 .minor = DRIVER_MINOR,
233 .patchlevel = DRIVER_PATCHLEVEL,
1da177e4
LT
234};
235
771fe6b9
JG
236static struct drm_driver kms_driver;
237
238static int __devinit
239radeon_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
240{
241 return drm_get_dev(pdev, ent, &kms_driver);
242}
243
244static void
245radeon_pci_remove(struct pci_dev *pdev)
246{
247 struct drm_device *dev = pci_get_drvdata(pdev);
248
249 drm_put_dev(dev);
250}
251
252static int
253radeon_pci_suspend(struct pci_dev *pdev, pm_message_t state)
254{
255 struct drm_device *dev = pci_get_drvdata(pdev);
256 return radeon_suspend_kms(dev, state);
257}
258
259static int
260radeon_pci_resume(struct pci_dev *pdev)
261{
262 struct drm_device *dev = pci_get_drvdata(pdev);
263 return radeon_resume_kms(dev);
264}
265
266static struct drm_driver kms_driver = {
267 .driver_features =
268 DRIVER_USE_AGP | DRIVER_USE_MTRR | DRIVER_PCI_DMA | DRIVER_SG |
269 DRIVER_HAVE_IRQ | DRIVER_HAVE_DMA | DRIVER_IRQ_SHARED | DRIVER_GEM,
270 .dev_priv_size = 0,
271 .load = radeon_driver_load_kms,
272 .firstopen = radeon_driver_firstopen_kms,
273 .open = radeon_driver_open_kms,
274 .preclose = radeon_driver_preclose_kms,
275 .postclose = radeon_driver_postclose_kms,
276 .lastclose = radeon_driver_lastclose_kms,
277 .unload = radeon_driver_unload_kms,
278 .suspend = radeon_suspend_kms,
279 .resume = radeon_resume_kms,
280 .get_vblank_counter = radeon_get_vblank_counter_kms,
281 .enable_vblank = radeon_enable_vblank_kms,
282 .disable_vblank = radeon_disable_vblank_kms,
771fe6b9
JG
283#if defined(CONFIG_DEBUG_FS)
284 .debugfs_init = radeon_debugfs_init,
285 .debugfs_cleanup = radeon_debugfs_cleanup,
286#endif
287 .irq_preinstall = radeon_driver_irq_preinstall_kms,
288 .irq_postinstall = radeon_driver_irq_postinstall_kms,
289 .irq_uninstall = radeon_driver_irq_uninstall_kms,
290 .irq_handler = radeon_driver_irq_handler_kms,
291 .reclaim_buffers = drm_core_reclaim_buffers,
292 .get_map_ofs = drm_core_get_map_ofs,
293 .get_reg_ofs = drm_core_get_reg_ofs,
294 .ioctls = radeon_ioctls_kms,
295 .gem_init_object = radeon_gem_object_init,
296 .gem_free_object = radeon_gem_object_free,
297 .dma_ioctl = radeon_dma_ioctl_kms,
298 .fops = {
299 .owner = THIS_MODULE,
300 .open = drm_open,
301 .release = drm_release,
ed8b6704 302 .unlocked_ioctl = drm_ioctl,
771fe6b9
JG
303 .mmap = radeon_mmap,
304 .poll = drm_poll,
305 .fasync = drm_fasync,
4fa07bf1 306 .read = drm_read,
771fe6b9 307#ifdef CONFIG_COMPAT
70ba2a37 308 .compat_ioctl = radeon_kms_compat_ioctl,
771fe6b9
JG
309#endif
310 },
311
312 .pci_driver = {
313 .name = DRIVER_NAME,
314 .id_table = pciidlist,
315 .probe = radeon_pci_probe,
316 .remove = radeon_pci_remove,
317 .suspend = radeon_pci_suspend,
318 .resume = radeon_pci_resume,
319 },
320
321 .name = DRIVER_NAME,
322 .desc = DRIVER_DESC,
323 .date = DRIVER_DATE,
324 .major = KMS_DRIVER_MAJOR,
325 .minor = KMS_DRIVER_MINOR,
326 .patchlevel = KMS_DRIVER_PATCHLEVEL,
327};
771fe6b9
JG
328
329static struct drm_driver *driver;
330
1da177e4
LT
331static int __init radeon_init(void)
332{
771fe6b9
JG
333 driver = &driver_old;
334 driver->num_ioctls = radeon_max_ioctl;
de05065f
DA
335#ifdef CONFIG_VGA_CONSOLE
336 if (vgacon_text_force() && radeon_modeset == -1) {
337 DRM_INFO("VGACON disable radeon kernel modesetting.\n");
338 driver = &driver_old;
339 driver->driver_features &= ~DRIVER_MODESET;
340 radeon_modeset = 0;
341 }
342#endif
771fe6b9
JG
343 /* if enabled by default */
344 if (radeon_modeset == -1) {
a0cdc649
DA
345#ifdef CONFIG_DRM_RADEON_KMS
346 DRM_INFO("radeon defaulting to kernel modesetting.\n");
771fe6b9 347 radeon_modeset = 1;
a0cdc649
DA
348#else
349 DRM_INFO("radeon defaulting to userspace modesetting.\n");
350 radeon_modeset = 0;
351#endif
771fe6b9
JG
352 }
353 if (radeon_modeset == 1) {
354 DRM_INFO("radeon kernel modesetting enabled.\n");
355 driver = &kms_driver;
356 driver->driver_features |= DRIVER_MODESET;
357 driver->num_ioctls = radeon_max_kms_ioctl;
6a9ee8af 358 radeon_register_atpx_handler();
771fe6b9 359 }
771fe6b9
JG
360 /* if the vga console setting is enabled still
361 * let modprobe override it */
771fe6b9 362 return drm_init(driver);
1da177e4
LT
363}
364
365static void __exit radeon_exit(void)
366{
771fe6b9 367 drm_exit(driver);
6a9ee8af 368 radeon_unregister_atpx_handler();
1da177e4
LT
369}
370
176f613e 371module_init(radeon_init);
1da177e4
LT
372module_exit(radeon_exit);
373
b5e89ed5
DA
374MODULE_AUTHOR(DRIVER_AUTHOR);
375MODULE_DESCRIPTION(DRIVER_DESC);
1da177e4 376MODULE_LICENSE("GPL and additional rights");