[net-next-2.6.git] / drivers / gpu / drm / nouveau / nv50_sor.c

/*
 * Copyright (C) 2008 Maarten Maathuis.
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining
 * a copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sublicense, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial
 * portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
 * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
 * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 *
 */

#include "drmP.h"
#include "drm_crtc_helper.h"

#define NOUVEAU_DMA_DEBUG (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
#include "nouveau_reg.h"
#include "nouveau_drv.h"
#include "nouveau_dma.h"
#include "nouveau_encoder.h"
#include "nouveau_connector.h"
#include "nouveau_crtc.h"
#include "nv50_display.h"

static void
nv50_sor_disconnect(struct nouveau_encoder *nv_encoder)
{
	struct drm_device *dev = to_drm_encoder(nv_encoder)->dev;
	struct drm_nouveau_private *dev_priv = dev->dev_private;
	struct nouveau_channel *evo = dev_priv->evo;
	int ret;

	NV_DEBUG_KMS(dev, "Disconnecting SOR %d\n", nv_encoder->or);

	ret = RING_SPACE(evo, 2);
	if (ret) {
		NV_ERROR(dev, "no space while disconnecting SOR\n");
		return;
	}
	BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
	OUT_RING(evo, 0);
}

static void
nv50_sor_dp_link_train(struct drm_encoder *encoder)
{
	struct drm_device *dev = encoder->dev;
	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	struct bit_displayport_encoder_table *dpe;
	int dpe_headerlen;

	dpe = nouveau_bios_dp_table(dev, nv_encoder->dcb, &dpe_headerlen);
	if (!dpe) {
		NV_ERROR(dev, "SOR-%d: no DP encoder table!\n", nv_encoder->or);
		return;
	}

	if (dpe->script0) {
		NV_DEBUG_KMS(dev, "SOR-%d: running DP script 0\n", nv_encoder->or);
		nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script0),
					    nv_encoder->dcb);
	}

	if (!nouveau_dp_link_train(encoder))
		NV_ERROR(dev, "SOR-%d: link training failed\n", nv_encoder->or);

	if (dpe->script1) {
		NV_DEBUG_KMS(dev, "SOR-%d: running DP script 1\n", nv_encoder->or);
		nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script1),
					    nv_encoder->dcb);
	}
}

static void
nv50_sor_dpms(struct drm_encoder *encoder, int mode)
{
	struct drm_device *dev = encoder->dev;
	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	struct drm_encoder *enc;
	uint32_t val;
	int or = nv_encoder->or;

	NV_DEBUG_KMS(dev, "or %d mode %d\n", or, mode);

	nv_encoder->last_dpms = mode;
	list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
		struct nouveau_encoder *nvenc = nouveau_encoder(enc);

		if (nvenc == nv_encoder ||
		    nvenc->disconnect != nv50_sor_disconnect ||
		    nvenc->dcb->or != nv_encoder->dcb->or)
			continue;

		if (nvenc->last_dpms == DRM_MODE_DPMS_ON)
			return;
	}

	/* wait for it to be done */
	if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_CTRL(or),
		     NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING, 0)) {
		NV_ERROR(dev, "timeout: SOR_DPMS_CTRL_PENDING(%d) == 0\n", or);
		NV_ERROR(dev, "SOR_DPMS_CTRL(%d) = 0x%08x\n", or,
			 nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or)));
	}

	val = nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or));

	if (mode == DRM_MODE_DPMS_ON)
		val |= NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
	else
		val &= ~NV50_PDISPLAY_SOR_DPMS_CTRL_ON;

	nv_wr32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or), val |
		NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING);
	if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_STATE(or),
		     NV50_PDISPLAY_SOR_DPMS_STATE_WAIT, 0)) {
		NV_ERROR(dev, "timeout: SOR_DPMS_STATE_WAIT(%d) == 0\n", or);
		NV_ERROR(dev, "SOR_DPMS_STATE(%d) = 0x%08x\n", or,
			 nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or)));
	}

	if (nv_encoder->dcb->type == OUTPUT_DP && mode == DRM_MODE_DPMS_ON)
		nv50_sor_dp_link_train(encoder);
}

static void
nv50_sor_save(struct drm_encoder *encoder)
{
	NV_ERROR(encoder->dev, "!!\n");
}

static void
nv50_sor_restore(struct drm_encoder *encoder)
{
	NV_ERROR(encoder->dev, "!!\n");
}

static bool
nv50_sor_mode_fixup(struct drm_encoder *encoder, struct drm_display_mode *mode,
		    struct drm_display_mode *adjusted_mode)
{
	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	struct nouveau_connector *connector;

	NV_DEBUG_KMS(encoder->dev, "or %d\n", nv_encoder->or);

	connector = nouveau_encoder_connector_get(nv_encoder);
	if (!connector) {
		NV_ERROR(encoder->dev, "Encoder has no connector\n");
		return false;
	}

	if (connector->scaling_mode != DRM_MODE_SCALE_NONE &&
	     connector->native_mode) {
		int id = adjusted_mode->base.id;
		*adjusted_mode = *connector->native_mode;
		adjusted_mode->base.id = id;
	}

	return true;
}

static void
nv50_sor_prepare(struct drm_encoder *encoder)
{
}

static void
nv50_sor_commit(struct drm_encoder *encoder)
{
}

static void
nv50_sor_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode,
		  struct drm_display_mode *adjusted_mode)
{
	struct drm_nouveau_private *dev_priv = encoder->dev->dev_private;
	struct nouveau_channel *evo = dev_priv->evo;
	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	struct drm_device *dev = encoder->dev;
	struct nouveau_crtc *crtc = nouveau_crtc(encoder->crtc);
	uint32_t mode_ctl = 0;
	int ret;

	NV_DEBUG_KMS(dev, "or %d\n", nv_encoder->or);

	nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);

	switch (nv_encoder->dcb->type) {
	case OUTPUT_TMDS:
		if (nv_encoder->dcb->sorconf.link & 1) {
			if (adjusted_mode->clock < 165000)
				mode_ctl = 0x0100;
			else
				mode_ctl = 0x0500;
		} else
			mode_ctl = 0x0200;
		break;
	case OUTPUT_DP:
		mode_ctl |= (nv_encoder->dp.mc_unknown << 16);
		if (nv_encoder->dcb->sorconf.link & 1)
			mode_ctl |= 0x00000800;
		else
			mode_ctl |= 0x00000900;
		break;
	default:
		break;
	}

	if (crtc->index == 1)
		mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC1;
	else
		mode_ctl |= NV50_EVO_SOR_MODE_CTRL_CRTC0;

	if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
		mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NHSYNC;

	if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
		mode_ctl |= NV50_EVO_SOR_MODE_CTRL_NVSYNC;

	ret = RING_SPACE(evo, 2);
	if (ret) {
		NV_ERROR(dev, "no space while connecting SOR\n");
		return;
	}
	BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
	OUT_RING(evo, mode_ctl);
}

static const struct drm_encoder_helper_funcs nv50_sor_helper_funcs = {
	.dpms = nv50_sor_dpms,
	.save = nv50_sor_save,
	.restore = nv50_sor_restore,
	.mode_fixup = nv50_sor_mode_fixup,
	.prepare = nv50_sor_prepare,
	.commit = nv50_sor_commit,
	.mode_set = nv50_sor_mode_set,
	.detect = NULL
};

static void
nv50_sor_destroy(struct drm_encoder *encoder)
{
	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);

	if (!encoder)
		return;

	NV_DEBUG_KMS(encoder->dev, "\n");

	drm_encoder_cleanup(encoder);

	kfree(nv_encoder);
}

static const struct drm_encoder_funcs nv50_sor_encoder_funcs = {
	.destroy = nv50_sor_destroy,
};

int
nv50_sor_create(struct drm_connector *connector, struct dcb_entry *entry)
{
	struct nouveau_encoder *nv_encoder = NULL;
	struct drm_device *dev = connector->dev;
	struct drm_encoder *encoder;
	int type;

	NV_DEBUG_KMS(dev, "\n");

	switch (entry->type) {
	case OUTPUT_TMDS:
	case OUTPUT_DP:
		type = DRM_MODE_ENCODER_TMDS;
		break;
	case OUTPUT_LVDS:
		type = DRM_MODE_ENCODER_LVDS;
		break;
	default:
		return -EINVAL;
	}

	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
	if (!nv_encoder)
		return -ENOMEM;
	encoder = to_drm_encoder(nv_encoder);

	nv_encoder->dcb = entry;
	nv_encoder->or = ffs(entry->or) - 1;

	nv_encoder->disconnect = nv50_sor_disconnect;

	drm_encoder_init(dev, encoder, &nv50_sor_encoder_funcs, type);
	drm_encoder_helper_add(encoder, &nv50_sor_helper_funcs);

	encoder->possible_crtcs = entry->heads;
	encoder->possible_clones = 0;

	if (nv_encoder->dcb->type == OUTPUT_DP) {
		int or = nv_encoder->or, link = !(entry->dpconf.sor.link & 1);
		uint32_t tmp;

		tmp = nv_rd32(dev, 0x61c700 + (or * 0x800));

		switch ((tmp & 0x00000f00) >> 8) {
		case 8:
		case 9:
			nv_encoder->dp.mc_unknown = (tmp & 0x000f0000) >> 16;
			tmp = nv_rd32(dev, NV50_SOR_DP_CTRL(or, link));
			nv_encoder->dp.unk0 = tmp & 0x000001fc;
			tmp = nv_rd32(dev, NV50_SOR_DP_UNK128(or, link));
			nv_encoder->dp.unk1 = tmp & 0x010f7f3f;
			break;
		default:
			break;
		}

		if (!nv_encoder->dp.mc_unknown)
			nv_encoder->dp.mc_unknown = 5;
	}

	drm_mode_connector_attach_encoder(connector, encoder);
	return 0;
}
Commit	Line	Data
6ee73861 BS	1	/*
	2	* Copyright (C) 2008 Maarten Maathuis.
	3	* All Rights Reserved.
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining
	6	* a copy of this software and associated documentation files (the
	7	* "Software"), to deal in the Software without restriction, including
	8	* without limitation the rights to use, copy, modify, merge, publish,
	9	* distribute, sublicense, and/or sell copies of the Software, and to
	10	* permit persons to whom the Software is furnished to do so, subject to
	11	* the following conditions:
	12	*
	13	* The above copyright notice and this permission notice (including the
	14	* next paragraph) shall be included in all copies or substantial
	15	* portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	18	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	19	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
	20	* IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
	21	* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
	22	* OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
	23	* WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
	24	*
	25	*/
	26
	27	#include "drmP.h"
	28	#include "drm_crtc_helper.h"
	29
	30	#define NOUVEAU_DMA_DEBUG (nouveau_reg_debug & NOUVEAU_REG_DEBUG_EVO)
	31	#include "nouveau_reg.h"
	32	#include "nouveau_drv.h"
	33	#include "nouveau_dma.h"
	34	#include "nouveau_encoder.h"
	35	#include "nouveau_connector.h"
	36	#include "nouveau_crtc.h"
	37	#include "nv50_display.h"
	38
	39	static void
	40	nv50_sor_disconnect(struct nouveau_encoder *nv_encoder)
	41	{
	42	struct drm_device *dev = to_drm_encoder(nv_encoder)->dev;
	43	struct drm_nouveau_private *dev_priv = dev->dev_private;
	44	struct nouveau_channel *evo = dev_priv->evo;
	45	int ret;
	46
ef2bb506	47	NV_DEBUG_KMS(dev, "Disconnecting SOR %d\n", nv_encoder->or);
6ee73861 BS	48
	49	ret = RING_SPACE(evo, 2);
	50	if (ret) {
	51	NV_ERROR(dev, "no space while disconnecting SOR\n");
	52	return;
	53	}
	54	BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
	55	OUT_RING(evo, 0);
	56	}
	57
	58	static void
	59	nv50_sor_dp_link_train(struct drm_encoder *encoder)
	60	{
	61	struct drm_device *dev = encoder->dev;
	62	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	63	struct bit_displayport_encoder_table *dpe;
	64	int dpe_headerlen;
	65
	66	dpe = nouveau_bios_dp_table(dev, nv_encoder->dcb, &dpe_headerlen);
	67	if (!dpe) {
	68	NV_ERROR(dev, "SOR-%d: no DP encoder table!\n", nv_encoder->or);
	69	return;
	70	}
	71
	72	if (dpe->script0) {
ef2bb506	73	NV_DEBUG_KMS(dev, "SOR-%d: running DP script 0\n", nv_encoder->or);
6ee73861 BS	74	nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script0),
	75	nv_encoder->dcb);
	76	}
	77
	78	if (!nouveau_dp_link_train(encoder))
	79	NV_ERROR(dev, "SOR-%d: link training failed\n", nv_encoder->or);
	80
	81	if (dpe->script1) {
ef2bb506	82	NV_DEBUG_KMS(dev, "SOR-%d: running DP script 1\n", nv_encoder->or);
6ee73861 BS	83	nouveau_bios_run_init_table(dev, le16_to_cpu(dpe->script1),
	84	nv_encoder->dcb);
	85	}
	86	}
	87
	88	static void
	89	nv50_sor_dpms(struct drm_encoder *encoder, int mode)
	90	{
	91	struct drm_device *dev = encoder->dev;
	92	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
16226536	93	struct drm_encoder *enc;
6ee73861 BS	94	uint32_t val;
	95	int or = nv_encoder->or;
	96
ef2bb506	97	NV_DEBUG_KMS(dev, "or %d mode %d\n", or, mode);
6ee73861	98
16226536 BS	99	nv_encoder->last_dpms = mode;
	100	list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
	101	struct nouveau_encoder *nvenc = nouveau_encoder(enc);
	102
	103	if (nvenc == nv_encoder \|\|
5025b431	104	nvenc->disconnect != nv50_sor_disconnect \|\|
16226536 BS	105	nvenc->dcb->or != nv_encoder->dcb->or)
	106	continue;
	107
	108	if (nvenc->last_dpms == DRM_MODE_DPMS_ON)
	109	return;
	110	}
	111
6ee73861 BS	112	/* wait for it to be done */
	113	if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_CTRL(or),
	114	NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING, 0)) {
	115	NV_ERROR(dev, "timeout: SOR_DPMS_CTRL_PENDING(%d) == 0\n", or);
	116	NV_ERROR(dev, "SOR_DPMS_CTRL(%d) = 0x%08x\n", or,
	117	nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or)));
	118	}
	119
	120	val = nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or));
	121
	122	if (mode == DRM_MODE_DPMS_ON)
	123	val \|= NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
	124	else
	125	val &= ~NV50_PDISPLAY_SOR_DPMS_CTRL_ON;
	126
	127	nv_wr32(dev, NV50_PDISPLAY_SOR_DPMS_CTRL(or), val \|
	128	NV50_PDISPLAY_SOR_DPMS_CTRL_PENDING);
	129	if (!nv_wait(NV50_PDISPLAY_SOR_DPMS_STATE(or),
	130	NV50_PDISPLAY_SOR_DPMS_STATE_WAIT, 0)) {
	131	NV_ERROR(dev, "timeout: SOR_DPMS_STATE_WAIT(%d) == 0\n", or);
	132	NV_ERROR(dev, "SOR_DPMS_STATE(%d) = 0x%08x\n", or,
	133	nv_rd32(dev, NV50_PDISPLAY_SOR_DPMS_STATE(or)));
	134	}
	135
	136	if (nv_encoder->dcb->type == OUTPUT_DP && mode == DRM_MODE_DPMS_ON)
	137	nv50_sor_dp_link_train(encoder);
	138	}
	139
	140	static void
	141	nv50_sor_save(struct drm_encoder *encoder)
	142	{
	143	NV_ERROR(encoder->dev, "!!\n");
	144	}
	145
	146	static void
	147	nv50_sor_restore(struct drm_encoder *encoder)
	148	{
	149	NV_ERROR(encoder->dev, "!!\n");
	150	}
	151
	152	static bool
	153	nv50_sor_mode_fixup(struct drm_encoder encoder, struct drm_display_mode mode,
	154	struct drm_display_mode *adjusted_mode)
	155	{
	156	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	157	struct nouveau_connector *connector;
	158
ef2bb506	159	NV_DEBUG_KMS(encoder->dev, "or %d\n", nv_encoder->or);
6ee73861 BS	160
	161	connector = nouveau_encoder_connector_get(nv_encoder);
	162	if (!connector) {
	163	NV_ERROR(encoder->dev, "Encoder has no connector\n");
	164	return false;
	165	}
	166
	167	if (connector->scaling_mode != DRM_MODE_SCALE_NONE &&
	168	connector->native_mode) {
	169	int id = adjusted_mode->base.id;
	170	adjusted_mode = connector->native_mode;
	171	adjusted_mode->base.id = id;
	172	}
	173
	174	return true;
	175	}
	176
	177	static void
	178	nv50_sor_prepare(struct drm_encoder *encoder)
	179	{
	180	}
	181
	182	static void
	183	nv50_sor_commit(struct drm_encoder *encoder)
	184	{
	185	}
	186
	187	static void
	188	nv50_sor_mode_set(struct drm_encoder encoder, struct drm_display_mode mode,
	189	struct drm_display_mode *adjusted_mode)
	190	{
	191	struct drm_nouveau_private *dev_priv = encoder->dev->dev_private;
	192	struct nouveau_channel *evo = dev_priv->evo;
	193	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	194	struct drm_device *dev = encoder->dev;
	195	struct nouveau_crtc *crtc = nouveau_crtc(encoder->crtc);
	196	uint32_t mode_ctl = 0;
	197	int ret;
	198
ef2bb506	199	NV_DEBUG_KMS(dev, "or %d\n", nv_encoder->or);
6ee73861 BS	200
	201	nv50_sor_dpms(encoder, DRM_MODE_DPMS_ON);
	202
	203	switch (nv_encoder->dcb->type) {
	204	case OUTPUT_TMDS:
	205	if (nv_encoder->dcb->sorconf.link & 1) {
	206	if (adjusted_mode->clock < 165000)
	207	mode_ctl = 0x0100;
	208	else
	209	mode_ctl = 0x0500;
	210	} else
	211	mode_ctl = 0x0200;
	212	break;
	213	case OUTPUT_DP:
6f335a7a	214	mode_ctl \|= (nv_encoder->dp.mc_unknown << 16);
6ee73861 BS	215	if (nv_encoder->dcb->sorconf.link & 1)
	216	mode_ctl \|= 0x00000800;
	217	else
	218	mode_ctl \|= 0x00000900;
	219	break;
	220	default:
	221	break;
	222	}
	223
	224	if (crtc->index == 1)
	225	mode_ctl \|= NV50_EVO_SOR_MODE_CTRL_CRTC1;
	226	else
	227	mode_ctl \|= NV50_EVO_SOR_MODE_CTRL_CRTC0;
	228
	229	if (adjusted_mode->flags & DRM_MODE_FLAG_NHSYNC)
	230	mode_ctl \|= NV50_EVO_SOR_MODE_CTRL_NHSYNC;
	231
	232	if (adjusted_mode->flags & DRM_MODE_FLAG_NVSYNC)
	233	mode_ctl \|= NV50_EVO_SOR_MODE_CTRL_NVSYNC;
	234
	235	ret = RING_SPACE(evo, 2);
	236	if (ret) {
	237	NV_ERROR(dev, "no space while connecting SOR\n");
	238	return;
	239	}
	240	BEGIN_RING(evo, 0, NV50_EVO_SOR(nv_encoder->or, MODE_CTRL), 1);
	241	OUT_RING(evo, mode_ctl);
	242	}
	243
	244	static const struct drm_encoder_helper_funcs nv50_sor_helper_funcs = {
	245	.dpms = nv50_sor_dpms,
	246	.save = nv50_sor_save,
	247	.restore = nv50_sor_restore,
	248	.mode_fixup = nv50_sor_mode_fixup,
	249	.prepare = nv50_sor_prepare,
	250	.commit = nv50_sor_commit,
	251	.mode_set = nv50_sor_mode_set,
	252	.detect = NULL
	253	};
	254
	255	static void
	256	nv50_sor_destroy(struct drm_encoder *encoder)
	257	{
	258	struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
	259
	260	if (!encoder)
	261	return;
	262
ef2bb506	263	NV_DEBUG_KMS(encoder->dev, "\n");
6ee73861 BS	264
	265	drm_encoder_cleanup(encoder);
	266
	267	kfree(nv_encoder);
	268	}
	269
	270	static const struct drm_encoder_funcs nv50_sor_encoder_funcs = {
	271	.destroy = nv50_sor_destroy,
	272	};
	273
	274	int
8f1a6086	275	nv50_sor_create(struct drm_connector connector, struct dcb_entry entry)
6ee73861 BS	276	{
6ee73861 BS	277	struct nouveau_encoder *nv_encoder = NULL;
8f1a6086	278	struct drm_device *dev = connector->dev;
6ee73861	279	struct drm_encoder *encoder;
6ee73861 BS	280	int type;
6ee73861 BS	281
ef2bb506	282	NV_DEBUG_KMS(dev, "\n");
6ee73861 BS	283
	284	switch (entry->type) {
	285	case OUTPUT_TMDS:
8f1a6086	286	case OUTPUT_DP:
6ee73861 BS	287	type = DRM_MODE_ENCODER_TMDS;
	288	break;
	289	case OUTPUT_LVDS:
6ee73861	290	type = DRM_MODE_ENCODER_LVDS;
6ee73861 BS	291	break;
	292	default:
	293	return -EINVAL;
	294	}
	295
	296	nv_encoder = kzalloc(sizeof(*nv_encoder), GFP_KERNEL);
	297	if (!nv_encoder)
	298	return -ENOMEM;
	299	encoder = to_drm_encoder(nv_encoder);
	300
	301	nv_encoder->dcb = entry;
	302	nv_encoder->or = ffs(entry->or) - 1;
	303
	304	nv_encoder->disconnect = nv50_sor_disconnect;
	305
	306	drm_encoder_init(dev, encoder, &nv50_sor_encoder_funcs, type);
	307	drm_encoder_helper_add(encoder, &nv50_sor_helper_funcs);
	308
	309	encoder->possible_crtcs = entry->heads;
	310	encoder->possible_clones = 0;
	311
6f335a7a	312	if (nv_encoder->dcb->type == OUTPUT_DP) {
afa3b4c3 BS	313	int or = nv_encoder->or, link = !(entry->dpconf.sor.link & 1);
afa3b4c3 BS	314	uint32_t tmp;
6f335a7a	315
becd2142	316	tmp = nv_rd32(dev, 0x61c700 + (or * 0x800));
6f335a7a	317
afa3b4c3	318	switch ((tmp & 0x00000f00) >> 8) {
6f335a7a BS	319	case 8:
6f335a7a BS	320	case 9:
afa3b4c3 BS	321	nv_encoder->dp.mc_unknown = (tmp & 0x000f0000) >> 16;
	322	tmp = nv_rd32(dev, NV50_SOR_DP_CTRL(or, link));
	323	nv_encoder->dp.unk0 = tmp & 0x000001fc;
	324	tmp = nv_rd32(dev, NV50_SOR_DP_UNK128(or, link));
	325	nv_encoder->dp.unk1 = tmp & 0x010f7f3f;
6f335a7a BS	326	break;
	327	default:
	328	break;
	329	}
e60a9df3 BS	330
	331	if (!nv_encoder->dp.mc_unknown)
	332	nv_encoder->dp.mc_unknown = 5;
6f335a7a BS	333	}
6f335a7a BS	334
8f1a6086	335	drm_mode_connector_attach_encoder(connector, encoder);
6ee73861 BS	336	return 0;
6ee73861 BS	337	}