[net-next-2.6.git] / drivers / gpu / drm / i915 / intel_ringbuffer.h

#ifndef _INTEL_RINGBUFFER_H_
#define _INTEL_RINGBUFFER_H_

struct  intel_hw_status_page {
	void		*page_addr;
	unsigned int	gfx_addr;
	struct		drm_gem_object *obj;
};

struct drm_i915_gem_execbuffer2;
struct  intel_ring_buffer {
	const char	*name;
	struct		ring_regs {
			u32 ctl;
			u32 head;
			u32 tail;
			u32 start;
	} regs;
	unsigned int	ring_flag;
	unsigned long	size;
	unsigned int	alignment;
	void		*virtual_start;
	struct		drm_device *dev;
	struct		drm_gem_object *gem_object;

	unsigned int	head;
	unsigned int	tail;
	unsigned int	space;
	struct intel_hw_status_page status_page;

	u32		irq_gem_seqno;		/* last seq seem at irq time */
	u32		waiting_gem_seqno;
	int		user_irq_refcount;
	void		(*user_irq_get)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	void		(*user_irq_put)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	void		(*setup_status_page)(struct drm_device *dev,
			struct	intel_ring_buffer *ring);

	int		(*init)(struct drm_device *dev,
			struct intel_ring_buffer *ring);

	unsigned int	(*get_head)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	unsigned int	(*get_tail)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	unsigned int	(*get_active_head)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	void		(*advance_ring)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	void		(*flush)(struct drm_device *dev,
			struct intel_ring_buffer *ring,
			u32	invalidate_domains,
			u32	flush_domains);
	u32		(*add_request)(struct drm_device *dev,
			struct intel_ring_buffer *ring,
			struct drm_file *file_priv,
			u32 flush_domains);
	u32		(*get_gem_seqno)(struct drm_device *dev,
			struct intel_ring_buffer *ring);
	int		(*dispatch_gem_execbuffer)(struct drm_device *dev,
			struct intel_ring_buffer *ring,
			struct drm_i915_gem_execbuffer2 *exec,
			struct drm_clip_rect *cliprects,
			uint64_t exec_offset);

	/**
	 * List of objects currently involved in rendering from the
	 * ringbuffer.
	 *
	 * Includes buffers having the contents of their GPU caches
	 * flushed, not necessarily primitives.  last_rendering_seqno
	 * represents when the rendering involved will be completed.
	 *
	 * A reference is held on the buffer while on this list.
	 */
	struct list_head active_list;

	/**
	 * List of breadcrumbs associated with GPU requests currently
	 * outstanding.
	 */
	struct list_head request_list;

	wait_queue_head_t irq_queue;
	drm_local_map_t map;
};

static inline u32
intel_read_status_page(struct intel_ring_buffer *ring,
		int reg)
{
	u32 *regs = ring->status_page.page_addr;
	return regs[reg];
}

int intel_init_ring_buffer(struct drm_device *dev,
		struct intel_ring_buffer *ring);
void intel_cleanup_ring_buffer(struct drm_device *dev,
		struct intel_ring_buffer *ring);
int intel_wait_ring_buffer(struct drm_device *dev,
		struct intel_ring_buffer *ring, int n);
int intel_wrap_ring_buffer(struct drm_device *dev,
		struct intel_ring_buffer *ring);
void intel_ring_begin(struct drm_device *dev,
		struct intel_ring_buffer *ring, int n);

static inline void intel_ring_emit(struct drm_device *dev,
				   struct intel_ring_buffer *ring,
				   unsigned int data)
{
	unsigned int *virt = ring->virtual_start + ring->tail;
	*virt = data;
	ring->tail += 4;
}

void intel_fill_struct(struct drm_device *dev,
		struct intel_ring_buffer *ring,
		void *data,
		unsigned int len);
void intel_ring_advance(struct drm_device *dev,
		struct intel_ring_buffer *ring);

u32 intel_ring_get_seqno(struct drm_device *dev,
		struct intel_ring_buffer *ring);

extern struct intel_ring_buffer render_ring;
extern struct intel_ring_buffer bsd_ring;

#endif /* _INTEL_RINGBUFFER_H_ */
Commit	Line	Data
8187a2b7 ZN	1	#ifndef _INTEL_RINGBUFFER_H_
	2	#define _INTEL_RINGBUFFER_H_
	3
	4	struct intel_hw_status_page {
	5	void *page_addr;
	6	unsigned int gfx_addr;
	7	struct drm_gem_object *obj;
	8	};
	9
	10	struct drm_i915_gem_execbuffer2;
	11	struct intel_ring_buffer {
	12	const char *name;
	13	struct ring_regs {
	14	u32 ctl;
	15	u32 head;
	16	u32 tail;
	17	u32 start;
	18	} regs;
	19	unsigned int ring_flag;
	20	unsigned long size;
	21	unsigned int alignment;
	22	void *virtual_start;
	23	struct drm_device *dev;
	24	struct drm_gem_object *gem_object;
	25
	26	unsigned int head;
	27	unsigned int tail;
	28	unsigned int space;
8187a2b7 ZN	29	struct intel_hw_status_page status_page;
	30
	31	u32 irq_gem_seqno; /* last seq seem at irq time */
	32	u32 waiting_gem_seqno;
	33	int user_irq_refcount;
	34	void (user_irq_get)(struct drm_device dev,
	35	struct intel_ring_buffer *ring);
	36	void (user_irq_put)(struct drm_device dev,
	37	struct intel_ring_buffer *ring);
	38	void (setup_status_page)(struct drm_device dev,
	39	struct intel_ring_buffer *ring);
	40
	41	int (init)(struct drm_device dev,
	42	struct intel_ring_buffer *ring);
	43
	44	unsigned int (get_head)(struct drm_device dev,
	45	struct intel_ring_buffer *ring);
	46	unsigned int (get_tail)(struct drm_device dev,
	47	struct intel_ring_buffer *ring);
	48	unsigned int (get_active_head)(struct drm_device dev,
	49	struct intel_ring_buffer *ring);
	50	void (advance_ring)(struct drm_device dev,
	51	struct intel_ring_buffer *ring);
	52	void (flush)(struct drm_device dev,
	53	struct intel_ring_buffer *ring,
	54	u32 invalidate_domains,
	55	u32 flush_domains);
	56	u32 (add_request)(struct drm_device dev,
	57	struct intel_ring_buffer *ring,
	58	struct drm_file *file_priv,
	59	u32 flush_domains);
	60	u32 (get_gem_seqno)(struct drm_device dev,
	61	struct intel_ring_buffer *ring);
	62	int (dispatch_gem_execbuffer)(struct drm_device dev,
	63	struct intel_ring_buffer *ring,
	64	struct drm_i915_gem_execbuffer2 *exec,
	65	struct drm_clip_rect *cliprects,
	66	uint64_t exec_offset);
	67
	68	/**
	69	* List of objects currently involved in rendering from the
	70	* ringbuffer.
	71	*
	72	* Includes buffers having the contents of their GPU caches
	73	* flushed, not necessarily primitives. last_rendering_seqno
	74	* represents when the rendering involved will be completed.
	75	*
	76	* A reference is held on the buffer while on this list.
	77	*/
	78	struct list_head active_list;
	79
	80	/**
	81	* List of breadcrumbs associated with GPU requests currently
	82	* outstanding.
	83	*/
	84	struct list_head request_list;
	85
	86	wait_queue_head_t irq_queue;
	87	drm_local_map_t map;
	88	};
	89
	90	static inline u32
	91	intel_read_status_page(struct intel_ring_buffer *ring,
	92	int reg)
93	{
94	u32 *regs = ring->status_page.page_addr;
95	return regs[reg];
96	}
97
98	int intel_init_ring_buffer(struct drm_device *dev,
99	struct intel_ring_buffer *ring);
100	void intel_cleanup_ring_buffer(struct drm_device *dev,
101	struct intel_ring_buffer *ring);
102	int intel_wait_ring_buffer(struct drm_device *dev,
103	struct intel_ring_buffer *ring, int n);
104	int intel_wrap_ring_buffer(struct drm_device *dev,
105	struct intel_ring_buffer *ring);
106	void intel_ring_begin(struct drm_device *dev,
107	struct intel_ring_buffer *ring, int n);
e898cd22 CW	108
	109	static inline void intel_ring_emit(struct drm_device *dev,
	110	struct intel_ring_buffer *ring,
	111	unsigned int data)
	112	{
	113	unsigned int *virt = ring->virtual_start + ring->tail;
	114	*virt = data;
	115	ring->tail += 4;
	116	}
	117
8187a2b7 ZN	118	void intel_fill_struct(struct drm_device *dev,
	119	struct intel_ring_buffer *ring,
	120	void *data,
	121	unsigned int len);
	122	void intel_ring_advance(struct drm_device *dev,
	123	struct intel_ring_buffer *ring);
	124
	125	u32 intel_ring_get_seqno(struct drm_device *dev,
	126	struct intel_ring_buffer *ring);
	127
	128	extern struct intel_ring_buffer render_ring;
	129	extern struct intel_ring_buffer bsd_ring;
	130
	131	#endif /* _INTEL_RINGBUFFER_H_ */