]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/gpu/drm/i915/intel_hdmi.c
drm/i915: convert HDMI driver to new encoder/connector structure
[net-next-2.6.git] / drivers / gpu / drm / i915 / intel_hdmi.c
CommitLineData
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1/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2009 Intel Corporation
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Jesse Barnes <jesse.barnes@intel.com>
27 */
28
29#include <linux/i2c.h>
30#include <linux/delay.h>
31#include "drmP.h"
32#include "drm.h"
33#include "drm_crtc.h"
aa93d632 34#include "drm_edid.h"
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35#include "intel_drv.h"
36#include "i915_drm.h"
37#include "i915_drv.h"
38
39struct intel_hdmi_priv {
40 u32 sdvox_reg;
9dff6af8 41 bool has_hdmi_sink;
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42};
43
44static void intel_hdmi_mode_set(struct drm_encoder *encoder,
45 struct drm_display_mode *mode,
46 struct drm_display_mode *adjusted_mode)
47{
48 struct drm_device *dev = encoder->dev;
49 struct drm_i915_private *dev_priv = dev->dev_private;
50 struct drm_crtc *crtc = encoder->crtc;
51 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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52 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
53 struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
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54 u32 sdvox;
55
56 sdvox = SDVO_ENCODING_HDMI |
57 SDVO_BORDER_ENABLE |
58 SDVO_VSYNC_ACTIVE_HIGH |
56d21b07 59 SDVO_HSYNC_ACTIVE_HIGH;
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60
61 if (hdmi_priv->has_hdmi_sink)
62 sdvox |= SDVO_AUDIO_ENABLE;
63
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64 if (intel_crtc->pipe == 1) {
65 if (HAS_PCH_CPT(dev))
66 sdvox |= PORT_TRANS_B_SEL_CPT;
67 else
68 sdvox |= SDVO_PIPE_B_SELECT;
69 }
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70
71 I915_WRITE(hdmi_priv->sdvox_reg, sdvox);
72 POSTING_READ(hdmi_priv->sdvox_reg);
73}
74
75static void intel_hdmi_dpms(struct drm_encoder *encoder, int mode)
76{
77 struct drm_device *dev = encoder->dev;
78 struct drm_i915_private *dev_priv = dev->dev_private;
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79 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
80 struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
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81 u32 temp;
82
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83 temp = I915_READ(hdmi_priv->sdvox_reg);
84
85 /* HW workaround, need to toggle enable bit off and on for 12bpc, but
86 * we do this anyway which shows more stable in testing.
87 */
c619eed4 88 if (HAS_PCH_SPLIT(dev)) {
7d57382e 89 I915_WRITE(hdmi_priv->sdvox_reg, temp & ~SDVO_ENABLE);
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90 POSTING_READ(hdmi_priv->sdvox_reg);
91 }
92
93 if (mode != DRM_MODE_DPMS_ON) {
94 temp &= ~SDVO_ENABLE;
7d57382e 95 } else {
d8a2d0e0 96 temp |= SDVO_ENABLE;
7d57382e 97 }
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98
99 I915_WRITE(hdmi_priv->sdvox_reg, temp);
7d57382e 100 POSTING_READ(hdmi_priv->sdvox_reg);
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101
102 /* HW workaround, need to write this twice for issue that may result
103 * in first write getting masked.
104 */
c619eed4 105 if (HAS_PCH_SPLIT(dev)) {
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106 I915_WRITE(hdmi_priv->sdvox_reg, temp);
107 POSTING_READ(hdmi_priv->sdvox_reg);
108 }
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109}
110
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111static int intel_hdmi_mode_valid(struct drm_connector *connector,
112 struct drm_display_mode *mode)
113{
114 if (mode->clock > 165000)
115 return MODE_CLOCK_HIGH;
116 if (mode->clock < 20000)
117 return MODE_CLOCK_HIGH;
118
119 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
120 return MODE_NO_DBLESCAN;
121
122 return MODE_OK;
123}
124
125static bool intel_hdmi_mode_fixup(struct drm_encoder *encoder,
126 struct drm_display_mode *mode,
127 struct drm_display_mode *adjusted_mode)
128{
129 return true;
130}
131
aa93d632 132static enum drm_connector_status
2ded9e27 133intel_hdmi_detect(struct drm_connector *connector)
9dff6af8 134{
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135 struct drm_encoder *encoder = intel_attached_encoder(connector);
136 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
21d40d37 137 struct intel_hdmi_priv *hdmi_priv = intel_encoder->dev_priv;
9dff6af8 138 struct edid *edid = NULL;
aa93d632 139 enum drm_connector_status status = connector_status_disconnected;
9dff6af8 140
2ded9e27 141 hdmi_priv->has_hdmi_sink = false;
674e2d08 142 edid = drm_get_edid(connector,
21d40d37 143 intel_encoder->ddc_bus);
2ded9e27 144
aa93d632 145 if (edid) {
be9f1c4f 146 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
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147 status = connector_status_connected;
148 hdmi_priv->has_hdmi_sink = drm_detect_hdmi_monitor(edid);
149 }
674e2d08 150 connector->display_info.raw_edid = NULL;
aa93d632 151 kfree(edid);
9dff6af8 152 }
30ad48b7 153
2ded9e27 154 return status;
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155}
156
157static int intel_hdmi_get_modes(struct drm_connector *connector)
158{
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159 struct drm_encoder *encoder = intel_attached_encoder(connector);
160 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
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161
162 /* We should parse the EDID data and find out if it's an HDMI sink so
163 * we can send audio to it.
164 */
165
335af9a2 166 return intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
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167}
168
169static void intel_hdmi_destroy(struct drm_connector *connector)
170{
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171 drm_sysfs_connector_remove(connector);
172 drm_connector_cleanup(connector);
674e2d08 173 kfree(connector);
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174}
175
176static const struct drm_encoder_helper_funcs intel_hdmi_helper_funcs = {
177 .dpms = intel_hdmi_dpms,
178 .mode_fixup = intel_hdmi_mode_fixup,
179 .prepare = intel_encoder_prepare,
180 .mode_set = intel_hdmi_mode_set,
181 .commit = intel_encoder_commit,
182};
183
184static const struct drm_connector_funcs intel_hdmi_connector_funcs = {
c9fb15f6 185 .dpms = drm_helper_connector_dpms,
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186 .detect = intel_hdmi_detect,
187 .fill_modes = drm_helper_probe_single_connector_modes,
188 .destroy = intel_hdmi_destroy,
189};
190
191static const struct drm_connector_helper_funcs intel_hdmi_connector_helper_funcs = {
192 .get_modes = intel_hdmi_get_modes,
193 .mode_valid = intel_hdmi_mode_valid,
674e2d08 194 .best_encoder = intel_attached_encoder,
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195};
196
197static void intel_hdmi_enc_destroy(struct drm_encoder *encoder)
198{
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199 struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
200
201 if (intel_encoder->i2c_bus)
202 intel_i2c_destroy(intel_encoder->i2c_bus);
7d57382e 203 drm_encoder_cleanup(encoder);
674e2d08 204 kfree(intel_encoder);
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205}
206
207static const struct drm_encoder_funcs intel_hdmi_enc_funcs = {
208 .destroy = intel_hdmi_enc_destroy,
209};
210
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211void intel_hdmi_init(struct drm_device *dev, int sdvox_reg)
212{
213 struct drm_i915_private *dev_priv = dev->dev_private;
214 struct drm_connector *connector;
21d40d37 215 struct intel_encoder *intel_encoder;
674e2d08 216 struct intel_connector *intel_connector;
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217 struct intel_hdmi_priv *hdmi_priv;
218
21d40d37 219 intel_encoder = kcalloc(sizeof(struct intel_encoder) +
7d57382e 220 sizeof(struct intel_hdmi_priv), 1, GFP_KERNEL);
21d40d37 221 if (!intel_encoder)
7d57382e 222 return;
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223
224 intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
225 if (!intel_connector) {
226 kfree(intel_encoder);
227 return;
228 }
229
21d40d37 230 hdmi_priv = (struct intel_hdmi_priv *)(intel_encoder + 1);
7d57382e 231
674e2d08 232 connector = &intel_connector->base;
7d57382e 233 drm_connector_init(dev, connector, &intel_hdmi_connector_funcs,
8d91104a 234 DRM_MODE_CONNECTOR_HDMIA);
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235 drm_connector_helper_add(connector, &intel_hdmi_connector_helper_funcs);
236
21d40d37 237 intel_encoder->type = INTEL_OUTPUT_HDMI;
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238
239 connector->interlace_allowed = 0;
240 connector->doublescan_allowed = 0;
21d40d37 241 intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
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242
243 /* Set up the DDC bus. */
f8aed700 244 if (sdvox_reg == SDVOB) {
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245 intel_encoder->clone_mask = (1 << INTEL_HDMIB_CLONE_BIT);
246 intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOE, "HDMIB");
b01f2c3a 247 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
f8aed700 248 } else if (sdvox_reg == SDVOC) {
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249 intel_encoder->clone_mask = (1 << INTEL_HDMIC_CLONE_BIT);
250 intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "HDMIC");
b01f2c3a 251 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
f8aed700 252 } else if (sdvox_reg == HDMIB) {
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253 intel_encoder->clone_mask = (1 << INTEL_HDMID_CLONE_BIT);
254 intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOE,
30ad48b7 255 "HDMIB");
b01f2c3a 256 dev_priv->hotplug_supported_mask |= HDMIB_HOTPLUG_INT_STATUS;
f8aed700 257 } else if (sdvox_reg == HDMIC) {
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258 intel_encoder->clone_mask = (1 << INTEL_HDMIE_CLONE_BIT);
259 intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOD,
30ad48b7 260 "HDMIC");
b01f2c3a 261 dev_priv->hotplug_supported_mask |= HDMIC_HOTPLUG_INT_STATUS;
f8aed700 262 } else if (sdvox_reg == HDMID) {
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263 intel_encoder->clone_mask = (1 << INTEL_HDMIF_CLONE_BIT);
264 intel_encoder->ddc_bus = intel_i2c_create(dev, PCH_GPIOF,
30ad48b7 265 "HDMID");
b01f2c3a 266 dev_priv->hotplug_supported_mask |= HDMID_HOTPLUG_INT_STATUS;
f8aed700 267 }
21d40d37 268 if (!intel_encoder->ddc_bus)
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269 goto err_connector;
270
271 hdmi_priv->sdvox_reg = sdvox_reg;
21d40d37 272 intel_encoder->dev_priv = hdmi_priv;
7d57382e 273
21d40d37 274 drm_encoder_init(dev, &intel_encoder->enc, &intel_hdmi_enc_funcs,
7d57382e 275 DRM_MODE_ENCODER_TMDS);
21d40d37 276 drm_encoder_helper_add(&intel_encoder->enc, &intel_hdmi_helper_funcs);
7d57382e 277
674e2d08 278 drm_mode_connector_attach_encoder(&intel_connector->base,
21d40d37 279 &intel_encoder->enc);
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280 drm_sysfs_connector_add(connector);
281
282 /* For G4X desktop chip, PEG_BAND_GAP_DATA 3:0 must first be written
283 * 0xd. Failure to do so will result in spurious interrupts being
284 * generated on the port when a cable is not attached.
285 */
286 if (IS_G4X(dev) && !IS_GM45(dev)) {
287 u32 temp = I915_READ(PEG_BAND_GAP_DATA);
288 I915_WRITE(PEG_BAND_GAP_DATA, (temp & ~0xf) | 0xd);
289 }
290
291 return;
292
293err_connector:
294 drm_connector_cleanup(connector);
21d40d37 295 kfree(intel_encoder);
674e2d08 296 kfree(intel_connector);
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297
298 return;
299}