[net-next-2.6.git] / drivers / gpu / drm / i915 / intel_dvo.c

/*
 * Copyright 2006 Dave Airlie <airlied@linux.ie>
 * Copyright © 2006-2007 Intel Corporation
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Authors:
 *	Eric Anholt <eric@anholt.net>
 */
#include <linux/i2c.h>
#include <linux/slab.h>
#include "drmP.h"
#include "drm.h"
#include "drm_crtc.h"
#include "intel_drv.h"
#include "i915_drm.h"
#include "i915_drv.h"
#include "dvo.h"

#define SIL164_ADDR	0x38
#define CH7xxx_ADDR	0x76
#define TFP410_ADDR	0x38

static const struct intel_dvo_device intel_dvo_devices[] = {
	{
		.type = INTEL_DVO_CHIP_TMDS,
		.name = "sil164",
		.dvo_reg = DVOC,
		.slave_addr = SIL164_ADDR,
		.dev_ops = &sil164_ops,
	},
	{
		.type = INTEL_DVO_CHIP_TMDS,
		.name = "ch7xxx",
		.dvo_reg = DVOC,
		.slave_addr = CH7xxx_ADDR,
		.dev_ops = &ch7xxx_ops,
	},
	{
		.type = INTEL_DVO_CHIP_LVDS,
		.name = "ivch",
		.dvo_reg = DVOA,
		.slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
		.dev_ops = &ivch_ops,
	},
	{
		.type = INTEL_DVO_CHIP_TMDS,
		.name = "tfp410",
		.dvo_reg = DVOC,
		.slave_addr = TFP410_ADDR,
		.dev_ops = &tfp410_ops,
	},
	{
		.type = INTEL_DVO_CHIP_LVDS,
		.name = "ch7017",
		.dvo_reg = DVOC,
		.slave_addr = 0x75,
		.gpio = GPIOE,
		.dev_ops = &ch7017_ops,
	}
};

struct intel_dvo {
	struct intel_encoder base;

	struct intel_dvo_device dev;

	struct drm_display_mode *panel_fixed_mode;
	bool panel_wants_dither;
};

static struct intel_dvo *enc_to_intel_dvo(struct drm_encoder *encoder)
{
	return container_of(enc_to_intel_encoder(encoder), struct intel_dvo, base);
}

static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
{
	struct drm_i915_private *dev_priv = encoder->dev->dev_private;
	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
	u32 dvo_reg = intel_dvo->dev.dvo_reg;
	u32 temp = I915_READ(dvo_reg);

	if (mode == DRM_MODE_DPMS_ON) {
		I915_WRITE(dvo_reg, temp | DVO_ENABLE);
		I915_READ(dvo_reg);
		intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
	} else {
		intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
		I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
		I915_READ(dvo_reg);
	}
}

static int intel_dvo_mode_valid(struct drm_connector *connector,
				struct drm_display_mode *mode)
{
	struct drm_encoder *encoder = intel_attached_encoder(connector);
	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);

	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
		return MODE_NO_DBLESCAN;

	/* XXX: Validate clock range */

	if (intel_dvo->panel_fixed_mode) {
		if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
			return MODE_PANEL;
		if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
			return MODE_PANEL;
	}

	return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
}

static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
				 struct drm_display_mode *mode,
				 struct drm_display_mode *adjusted_mode)
{
	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);

	/* If we have timings from the BIOS for the panel, put them in
	 * to the adjusted mode.  The CRTC will be set up for this mode,
	 * with the panel scaling set up to source from the H/VDisplay
	 * of the original mode.
	 */
	if (intel_dvo->panel_fixed_mode != NULL) {
#define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
		C(hdisplay);
		C(hsync_start);
		C(hsync_end);
		C(htotal);
		C(vdisplay);
		C(vsync_start);
		C(vsync_end);
		C(vtotal);
		C(clock);
		drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
#undef C
	}

	if (intel_dvo->dev.dev_ops->mode_fixup)
		return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev, mode, adjusted_mode);

	return true;
}

static void intel_dvo_mode_set(struct drm_encoder *encoder,
			       struct drm_display_mode *mode,
			       struct drm_display_mode *adjusted_mode)
{
	struct drm_device *dev = encoder->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
	int pipe = intel_crtc->pipe;
	u32 dvo_val;
	u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
	int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;

	switch (dvo_reg) {
	case DVOA:
	default:
		dvo_srcdim_reg = DVOA_SRCDIM;
		break;
	case DVOB:
		dvo_srcdim_reg = DVOB_SRCDIM;
		break;
	case DVOC:
		dvo_srcdim_reg = DVOC_SRCDIM;
		break;
	}

	intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode, adjusted_mode);

	/* Save the data order, since I don't know what it should be set to. */
	dvo_val = I915_READ(dvo_reg) &
		  (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
	dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
		   DVO_BLANK_ACTIVE_HIGH;

	if (pipe == 1)
		dvo_val |= DVO_PIPE_B_SELECT;
	dvo_val |= DVO_PIPE_STALL;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
		dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
		dvo_val |= DVO_VSYNC_ACTIVE_HIGH;

	I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);

	/*I915_WRITE(DVOB_SRCDIM,
	  (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
	  (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
	I915_WRITE(dvo_srcdim_reg,
		   (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
		   (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
	/*I915_WRITE(DVOB, dvo_val);*/
	I915_WRITE(dvo_reg, dvo_val);
}

/**
 * Detect the output connection on our DVO device.
 *
 * Unimplemented.
 */
static enum drm_connector_status intel_dvo_detect(struct drm_connector *connector)
{
	struct drm_encoder *encoder = intel_attached_encoder(connector);
	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);

	return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
}

static int intel_dvo_get_modes(struct drm_connector *connector)
{
	struct drm_encoder *encoder = intel_attached_encoder(connector);
	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);

	/* We should probably have an i2c driver get_modes function for those
	 * devices which will have a fixed set of modes determined by the chip
	 * (TV-out, for example), but for now with just TMDS and LVDS,
	 * that's not the case.
	 */
	intel_ddc_get_modes(connector, intel_dvo->base.ddc_bus);
	if (!list_empty(&connector->probed_modes))
		return 1;

	if (intel_dvo->panel_fixed_mode != NULL) {
		struct drm_display_mode *mode;
		mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
		if (mode) {
			drm_mode_probed_add(connector, mode);
			return 1;
		}
	}

	return 0;
}

static void intel_dvo_destroy(struct drm_connector *connector)
{
	drm_sysfs_connector_remove(connector);
	drm_connector_cleanup(connector);
	kfree(connector);
}

static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
	.dpms = intel_dvo_dpms,
	.mode_fixup = intel_dvo_mode_fixup,
	.prepare = intel_encoder_prepare,
	.mode_set = intel_dvo_mode_set,
	.commit = intel_encoder_commit,
};

static const struct drm_connector_funcs intel_dvo_connector_funcs = {
	.dpms = drm_helper_connector_dpms,
	.detect = intel_dvo_detect,
	.destroy = intel_dvo_destroy,
	.fill_modes = drm_helper_probe_single_connector_modes,
};

static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
	.mode_valid = intel_dvo_mode_valid,
	.get_modes = intel_dvo_get_modes,
	.best_encoder = intel_attached_encoder,
};

static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
{
	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);

	if (intel_dvo->dev.dev_ops->destroy)
		intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);

	kfree(intel_dvo->panel_fixed_mode);

	intel_encoder_destroy(encoder);
}

static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
	.destroy = intel_dvo_enc_destroy,
};

/**
 * Attempts to get a fixed panel timing for LVDS (currently only the i830).
 *
 * Other chips with DVO LVDS will need to extend this to deal with the LVDS
 * chip being on DVOB/C and having multiple pipes.
 */
static struct drm_display_mode *
intel_dvo_get_current_mode(struct drm_connector *connector)
{
	struct drm_device *dev = connector->dev;
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct drm_encoder *encoder = intel_attached_encoder(connector);
	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
	uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
	struct drm_display_mode *mode = NULL;

	/* If the DVO port is active, that'll be the LVDS, so we can pull out
	 * its timings to get how the BIOS set up the panel.
	 */
	if (dvo_val & DVO_ENABLE) {
		struct drm_crtc *crtc;
		int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;

		crtc = intel_get_crtc_from_pipe(dev, pipe);
		if (crtc) {
			mode = intel_crtc_mode_get(dev, crtc);
			if (mode) {
				mode->type |= DRM_MODE_TYPE_PREFERRED;
				if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
					mode->flags |= DRM_MODE_FLAG_PHSYNC;
				if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
					mode->flags |= DRM_MODE_FLAG_PVSYNC;
			}
		}
	}

	return mode;
}

void intel_dvo_init(struct drm_device *dev)
{
	struct intel_encoder *intel_encoder;
	struct intel_dvo *intel_dvo;
	struct intel_connector *intel_connector;
	struct i2c_adapter *i2cbus = NULL;
	int ret = 0;
	int i;
	int encoder_type = DRM_MODE_ENCODER_NONE;

	intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
	if (!intel_dvo)
		return;

	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
	if (!intel_connector) {
		kfree(intel_dvo);
		return;
	}

	intel_encoder = &intel_dvo->base;

	/* Set up the DDC bus */
	intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "DVODDC_D");
	if (!intel_encoder->ddc_bus)
		goto free_intel;

	/* Now, try to find a controller */
	for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
		struct drm_connector *connector = &intel_connector->base;
		const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
		int gpio;

		/* Allow the I2C driver info to specify the GPIO to be used in
		 * special cases, but otherwise default to what's defined
		 * in the spec.
		 */
		if (dvo->gpio != 0)
			gpio = dvo->gpio;
		else if (dvo->type == INTEL_DVO_CHIP_LVDS)
			gpio = GPIOB;
		else
			gpio = GPIOE;

		/* Set up the I2C bus necessary for the chip we're probing.
		 * It appears that everything is on GPIOE except for panels
		 * on i830 laptops, which are on GPIOB (DVOA).
		 */
		if (i2cbus != NULL)
			intel_i2c_destroy(i2cbus);
		if (!(i2cbus = intel_i2c_create(dev, gpio,
			gpio == GPIOB ? "DVOI2C_B" : "DVOI2C_E"))) {
			continue;
		}

		intel_dvo->dev = *dvo;
		ret = dvo->dev_ops->init(&intel_dvo->dev, i2cbus);
		if (!ret)
			continue;

		intel_encoder->type = INTEL_OUTPUT_DVO;
		intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
		switch (dvo->type) {
		case INTEL_DVO_CHIP_TMDS:
			intel_encoder->clone_mask =
				(1 << INTEL_DVO_TMDS_CLONE_BIT) |
				(1 << INTEL_ANALOG_CLONE_BIT);
			drm_connector_init(dev, connector,
					   &intel_dvo_connector_funcs,
					   DRM_MODE_CONNECTOR_DVII);
			encoder_type = DRM_MODE_ENCODER_TMDS;
			break;
		case INTEL_DVO_CHIP_LVDS:
			intel_encoder->clone_mask =
				(1 << INTEL_DVO_LVDS_CLONE_BIT);
			drm_connector_init(dev, connector,
					   &intel_dvo_connector_funcs,
					   DRM_MODE_CONNECTOR_LVDS);
			encoder_type = DRM_MODE_ENCODER_LVDS;
			break;
		}

		drm_connector_helper_add(connector,
					 &intel_dvo_connector_helper_funcs);
		connector->display_info.subpixel_order = SubPixelHorizontalRGB;
		connector->interlace_allowed = false;
		connector->doublescan_allowed = false;

		drm_encoder_init(dev, &intel_encoder->enc,
				 &intel_dvo_enc_funcs, encoder_type);
		drm_encoder_helper_add(&intel_encoder->enc,
				       &intel_dvo_helper_funcs);

		drm_mode_connector_attach_encoder(&intel_connector->base,
						  &intel_encoder->enc);
		if (dvo->type == INTEL_DVO_CHIP_LVDS) {
			/* For our LVDS chipsets, we should hopefully be able
			 * to dig the fixed panel mode out of the BIOS data.
			 * However, it's in a different format from the BIOS
			 * data on chipsets with integrated LVDS (stored in AIM
			 * headers, likely), so for now, just get the current
			 * mode being output through DVO.
			 */
			intel_dvo->panel_fixed_mode =
				intel_dvo_get_current_mode(connector);
			intel_dvo->panel_wants_dither = true;
		}

		drm_sysfs_connector_add(connector);
		return;
	}

	intel_i2c_destroy(intel_encoder->ddc_bus);
	/* Didn't find a chip, so tear down. */
	if (i2cbus != NULL)
		intel_i2c_destroy(i2cbus);
free_intel:
	kfree(intel_dvo);
	kfree(intel_connector);
}
Commit	Line	Data
79e53945 JB	1	/*
	2	* Copyright 2006 Dave Airlie <airlied@linux.ie>
	3	* Copyright © 2006-2007 Intel Corporation
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining a
	6	* copy of this software and associated documentation files (the "Software"),
	7	* to deal in the Software without restriction, including without limitation
	8	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	9	* and/or sell copies of the Software, and to permit persons to whom the
	10	* Software is furnished to do so, subject to the following conditions:
	11	*
	12	* The above copyright notice and this permission notice (including the next
	13	* paragraph) shall be included in all copies or substantial portions of the
	14	* Software.
	15	*
	16	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	17	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	18	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	19	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	20	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	21	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
	22	* DEALINGS IN THE SOFTWARE.
	23	*
	24	* Authors:
	25	* Eric Anholt <eric@anholt.net>
	26	*/
	27	#include <linux/i2c.h>
5a0e3ad6	28	#include <linux/slab.h>
79e53945 JB	29	#include "drmP.h"
	30	#include "drm.h"
	31	#include "drm_crtc.h"
	32	#include "intel_drv.h"
	33	#include "i915_drm.h"
	34	#include "i915_drv.h"
	35	#include "dvo.h"
	36
	37	#define SIL164_ADDR 0x38
	38	#define CH7xxx_ADDR 0x76
	39	#define TFP410_ADDR 0x38
	40
ea5b213a	41	static const struct intel_dvo_device intel_dvo_devices[] = {
79e53945 JB	42	{
	43	.type = INTEL_DVO_CHIP_TMDS,
	44	.name = "sil164",
	45	.dvo_reg = DVOC,
	46	.slave_addr = SIL164_ADDR,
	47	.dev_ops = &sil164_ops,
	48	},
	49	{
	50	.type = INTEL_DVO_CHIP_TMDS,
	51	.name = "ch7xxx",
	52	.dvo_reg = DVOC,
	53	.slave_addr = CH7xxx_ADDR,
	54	.dev_ops = &ch7xxx_ops,
	55	},
	56	{
	57	.type = INTEL_DVO_CHIP_LVDS,
	58	.name = "ivch",
	59	.dvo_reg = DVOA,
	60	.slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
	61	.dev_ops = &ivch_ops,
	62	},
	63	{
	64	.type = INTEL_DVO_CHIP_TMDS,
	65	.name = "tfp410",
	66	.dvo_reg = DVOC,
	67	.slave_addr = TFP410_ADDR,
	68	.dev_ops = &tfp410_ops,
	69	},
	70	{
	71	.type = INTEL_DVO_CHIP_LVDS,
	72	.name = "ch7017",
	73	.dvo_reg = DVOC,
	74	.slave_addr = 0x75,
	75	.gpio = GPIOE,
	76	.dev_ops = &ch7017_ops,
	77	}
	78	};
	79
ea5b213a CW	80	struct intel_dvo {
	81	struct intel_encoder base;
	82
	83	struct intel_dvo_device dev;
	84
	85	struct drm_display_mode *panel_fixed_mode;
	86	bool panel_wants_dither;
	87	};
	88
	89	static struct intel_dvo enc_to_intel_dvo(struct drm_encoder encoder)
	90	{
	91	return container_of(enc_to_intel_encoder(encoder), struct intel_dvo, base);
	92	}
	93
79e53945 JB	94	static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
	95	{
	96	struct drm_i915_private *dev_priv = encoder->dev->dev_private;
ea5b213a CW	97	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
ea5b213a CW	98	u32 dvo_reg = intel_dvo->dev.dvo_reg;
79e53945 JB	99	u32 temp = I915_READ(dvo_reg);
	100
	101	if (mode == DRM_MODE_DPMS_ON) {
	102	I915_WRITE(dvo_reg, temp \| DVO_ENABLE);
	103	I915_READ(dvo_reg);
ea5b213a	104	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
79e53945	105	} else {
ea5b213a	106	intel_dvo->dev.dev_ops->dpms(&intel_dvo->dev, mode);
79e53945 JB	107	I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
	108	I915_READ(dvo_reg);
	109	}
	110	}
	111
79e53945 JB	112	static int intel_dvo_mode_valid(struct drm_connector *connector,
	113	struct drm_display_mode *mode)
	114	{
599be16c	115	struct drm_encoder *encoder = intel_attached_encoder(connector);
ea5b213a	116	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
79e53945 JB	117
	118	if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
	119	return MODE_NO_DBLESCAN;
	120
	121	/* XXX: Validate clock range */
	122
ea5b213a CW	123	if (intel_dvo->panel_fixed_mode) {
ea5b213a CW	124	if (mode->hdisplay > intel_dvo->panel_fixed_mode->hdisplay)
79e53945	125	return MODE_PANEL;
ea5b213a	126	if (mode->vdisplay > intel_dvo->panel_fixed_mode->vdisplay)
79e53945 JB	127	return MODE_PANEL;
	128	}
	129
ea5b213a	130	return intel_dvo->dev.dev_ops->mode_valid(&intel_dvo->dev, mode);
79e53945 JB	131	}
	132
	133	static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
	134	struct drm_display_mode *mode,
	135	struct drm_display_mode *adjusted_mode)
	136	{
ea5b213a	137	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
79e53945 JB	138
	139	/* If we have timings from the BIOS for the panel, put them in
	140	* to the adjusted mode. The CRTC will be set up for this mode,
	141	* with the panel scaling set up to source from the H/VDisplay
	142	* of the original mode.
	143	*/
ea5b213a CW	144	if (intel_dvo->panel_fixed_mode != NULL) {
ea5b213a CW	145	#define C(x) adjusted_mode->x = intel_dvo->panel_fixed_mode->x
79e53945 JB	146	C(hdisplay);
	147	C(hsync_start);
	148	C(hsync_end);
	149	C(htotal);
	150	C(vdisplay);
	151	C(vsync_start);
	152	C(vsync_end);
	153	C(vtotal);
	154	C(clock);
	155	drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
	156	#undef C
	157	}
	158
ea5b213a CW	159	if (intel_dvo->dev.dev_ops->mode_fixup)
ea5b213a CW	160	return intel_dvo->dev.dev_ops->mode_fixup(&intel_dvo->dev, mode, adjusted_mode);
79e53945 JB	161
	162	return true;
	163	}
	164
	165	static void intel_dvo_mode_set(struct drm_encoder *encoder,
	166	struct drm_display_mode *mode,
	167	struct drm_display_mode *adjusted_mode)
	168	{
	169	struct drm_device *dev = encoder->dev;
	170	struct drm_i915_private *dev_priv = dev->dev_private;
	171	struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
ea5b213a	172	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
79e53945 JB	173	int pipe = intel_crtc->pipe;
79e53945 JB	174	u32 dvo_val;
ea5b213a	175	u32 dvo_reg = intel_dvo->dev.dvo_reg, dvo_srcdim_reg;
79e53945 JB	176	int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
	177
	178	switch (dvo_reg) {
	179	case DVOA:
	180	default:
	181	dvo_srcdim_reg = DVOA_SRCDIM;
	182	break;
	183	case DVOB:
	184	dvo_srcdim_reg = DVOB_SRCDIM;
	185	break;
	186	case DVOC:
	187	dvo_srcdim_reg = DVOC_SRCDIM;
	188	break;
	189	}
	190
ea5b213a	191	intel_dvo->dev.dev_ops->mode_set(&intel_dvo->dev, mode, adjusted_mode);
79e53945 JB	192
	193	/* Save the data order, since I don't know what it should be set to. */
	194	dvo_val = I915_READ(dvo_reg) &
	195	(DVO_PRESERVE_MASK \| DVO_DATA_ORDER_GBRG);
	196	dvo_val \|= DVO_DATA_ORDER_FP \| DVO_BORDER_ENABLE \|
	197	DVO_BLANK_ACTIVE_HIGH;
	198
	199	if (pipe == 1)
	200	dvo_val \|= DVO_PIPE_B_SELECT;
	201	dvo_val \|= DVO_PIPE_STALL;
	202	if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
	203	dvo_val \|= DVO_HSYNC_ACTIVE_HIGH;
	204	if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
	205	dvo_val \|= DVO_VSYNC_ACTIVE_HIGH;
	206
	207	I915_WRITE(dpll_reg, I915_READ(dpll_reg) \| DPLL_DVO_HIGH_SPEED);
	208
	209	/*I915_WRITE(DVOB_SRCDIM,
	210	(adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) \|
	211	(adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
	212	I915_WRITE(dvo_srcdim_reg,
	213	(adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) \|
	214	(adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
	215	/I915_WRITE(DVOB, dvo_val);/
	216	I915_WRITE(dvo_reg, dvo_val);
	217	}
	218
	219	/**
	220	* Detect the output connection on our DVO device.
	221	*
	222	* Unimplemented.
	223	*/
	224	static enum drm_connector_status intel_dvo_detect(struct drm_connector *connector)
	225	{
599be16c	226	struct drm_encoder *encoder = intel_attached_encoder(connector);
ea5b213a	227	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
79e53945	228
ea5b213a	229	return intel_dvo->dev.dev_ops->detect(&intel_dvo->dev);
79e53945 JB	230	}
	231
	232	static int intel_dvo_get_modes(struct drm_connector *connector)
	233	{
599be16c	234	struct drm_encoder *encoder = intel_attached_encoder(connector);
ea5b213a	235	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
79e53945 JB	236
	237	/* We should probably have an i2c driver get_modes function for those
	238	* devices which will have a fixed set of modes determined by the chip
	239	* (TV-out, for example), but for now with just TMDS and LVDS,
	240	* that's not the case.
	241	*/
ea5b213a	242	intel_ddc_get_modes(connector, intel_dvo->base.ddc_bus);
79e53945 JB	243	if (!list_empty(&connector->probed_modes))
	244	return 1;
	245
ea5b213a	246	if (intel_dvo->panel_fixed_mode != NULL) {
79e53945	247	struct drm_display_mode *mode;
ea5b213a	248	mode = drm_mode_duplicate(connector->dev, intel_dvo->panel_fixed_mode);
79e53945 JB	249	if (mode) {
	250	drm_mode_probed_add(connector, mode);
	251	return 1;
	252	}
	253	}
ea5b213a	254
79e53945 JB	255	return 0;
	256	}
	257
ea5b213a	258	static void intel_dvo_destroy(struct drm_connector *connector)
79e53945	259	{
79e53945 JB	260	drm_sysfs_connector_remove(connector);
79e53945 JB	261	drm_connector_cleanup(connector);
599be16c	262	kfree(connector);
79e53945	263	}
79e53945 JB	264
	265	static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
	266	.dpms = intel_dvo_dpms,
	267	.mode_fixup = intel_dvo_mode_fixup,
	268	.prepare = intel_encoder_prepare,
	269	.mode_set = intel_dvo_mode_set,
	270	.commit = intel_encoder_commit,
	271	};
	272
	273	static const struct drm_connector_funcs intel_dvo_connector_funcs = {
c9fb15f6	274	.dpms = drm_helper_connector_dpms,
79e53945 JB	275	.detect = intel_dvo_detect,
	276	.destroy = intel_dvo_destroy,
	277	.fill_modes = drm_helper_probe_single_connector_modes,
	278	};
	279
	280	static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
	281	.mode_valid = intel_dvo_mode_valid,
	282	.get_modes = intel_dvo_get_modes,
599be16c	283	.best_encoder = intel_attached_encoder,
79e53945 JB	284	};
79e53945 JB	285
b358d0a6	286	static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
79e53945	287	{
ea5b213a CW	288	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
	289
	290	if (intel_dvo->dev.dev_ops->destroy)
	291	intel_dvo->dev.dev_ops->destroy(&intel_dvo->dev);
	292
	293	kfree(intel_dvo->panel_fixed_mode);
	294
	295	intel_encoder_destroy(encoder);
79e53945 JB	296	}
	297
	298	static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
	299	.destroy = intel_dvo_enc_destroy,
	300	};
	301
79e53945 JB	302	/**
	303	* Attempts to get a fixed panel timing for LVDS (currently only the i830).
	304	*
	305	* Other chips with DVO LVDS will need to extend this to deal with the LVDS
	306	* chip being on DVOB/C and having multiple pipes.
	307	*/
	308	static struct drm_display_mode *
ea5b213a	309	intel_dvo_get_current_mode(struct drm_connector *connector)
79e53945 JB	310	{
	311	struct drm_device *dev = connector->dev;
	312	struct drm_i915_private *dev_priv = dev->dev_private;
599be16c	313	struct drm_encoder *encoder = intel_attached_encoder(connector);
ea5b213a CW	314	struct intel_dvo *intel_dvo = enc_to_intel_dvo(encoder);
ea5b213a CW	315	uint32_t dvo_val = I915_READ(intel_dvo->dev.dvo_reg);
79e53945 JB	316	struct drm_display_mode *mode = NULL;
	317
	318	/* If the DVO port is active, that'll be the LVDS, so we can pull out
	319	* its timings to get how the BIOS set up the panel.
	320	*/
	321	if (dvo_val & DVO_ENABLE) {
	322	struct drm_crtc *crtc;
	323	int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
	324
	325	crtc = intel_get_crtc_from_pipe(dev, pipe);
	326	if (crtc) {
	327	mode = intel_crtc_mode_get(dev, crtc);
79e53945 JB	328	if (mode) {
	329	mode->type \|= DRM_MODE_TYPE_PREFERRED;
	330	if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
	331	mode->flags \|= DRM_MODE_FLAG_PHSYNC;
	332	if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
	333	mode->flags \|= DRM_MODE_FLAG_PVSYNC;
	334	}
	335	}
	336	}
ea5b213a	337
79e53945 JB	338	return mode;
	339	}
	340
	341	void intel_dvo_init(struct drm_device *dev)
	342	{
21d40d37	343	struct intel_encoder *intel_encoder;
ea5b213a	344	struct intel_dvo *intel_dvo;
599be16c	345	struct intel_connector *intel_connector;
f9c10a9b	346	struct i2c_adapter *i2cbus = NULL;
79e53945 JB	347	int ret = 0;
79e53945 JB	348	int i;
79e53945	349	int encoder_type = DRM_MODE_ENCODER_NONE;
ea5b213a CW	350
	351	intel_dvo = kzalloc(sizeof(struct intel_dvo), GFP_KERNEL);
	352	if (!intel_dvo)
79e53945 JB	353	return;
79e53945 JB	354
599be16c ZW	355	intel_connector = kzalloc(sizeof(struct intel_connector), GFP_KERNEL);
599be16c ZW	356	if (!intel_connector) {
ea5b213a	357	kfree(intel_dvo);
599be16c ZW	358	return;
	359	}
	360
ea5b213a CW	361	intel_encoder = &intel_dvo->base;
ea5b213a CW	362
79e53945	363	/* Set up the DDC bus */
21d40d37 EA	364	intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "DVODDC_D");
21d40d37 EA	365	if (!intel_encoder->ddc_bus)
79e53945 JB	366	goto free_intel;
	367
	368	/* Now, try to find a controller */
	369	for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
599be16c	370	struct drm_connector *connector = &intel_connector->base;
ea5b213a	371	const struct intel_dvo_device *dvo = &intel_dvo_devices[i];
79e53945 JB	372	int gpio;
79e53945 JB	373
79e53945 JB	374	/* Allow the I2C driver info to specify the GPIO to be used in
	375	* special cases, but otherwise default to what's defined
	376	* in the spec.
	377	*/
	378	if (dvo->gpio != 0)
	379	gpio = dvo->gpio;
	380	else if (dvo->type == INTEL_DVO_CHIP_LVDS)
	381	gpio = GPIOB;
	382	else
	383	gpio = GPIOE;
	384
	385	/* Set up the I2C bus necessary for the chip we're probing.
	386	* It appears that everything is on GPIOE except for panels
	387	* on i830 laptops, which are on GPIOB (DVOA).
	388	*/
f9c10a9b KP	389	if (i2cbus != NULL)
	390	intel_i2c_destroy(i2cbus);
	391	if (!(i2cbus = intel_i2c_create(dev, gpio,
	392	gpio == GPIOB ? "DVOI2C_B" : "DVOI2C_E"))) {
	393	continue;
79e53945 JB	394	}
79e53945 JB	395
ea5b213a CW	396	intel_dvo->dev = *dvo;
ea5b213a CW	397	ret = dvo->dev_ops->init(&intel_dvo->dev, i2cbus);
79e53945 JB	398	if (!ret)
	399	continue;
	400
21d40d37 EA	401	intel_encoder->type = INTEL_OUTPUT_DVO;
21d40d37 EA	402	intel_encoder->crtc_mask = (1 << 0) \| (1 << 1);
79e53945 JB	403	switch (dvo->type) {
79e53945 JB	404	case INTEL_DVO_CHIP_TMDS:
21d40d37	405	intel_encoder->clone_mask =
f8aed700 ML	406	(1 << INTEL_DVO_TMDS_CLONE_BIT) \|
f8aed700 ML	407	(1 << INTEL_ANALOG_CLONE_BIT);
79e53945 JB	408	drm_connector_init(dev, connector,
	409	&intel_dvo_connector_funcs,
	410	DRM_MODE_CONNECTOR_DVII);
	411	encoder_type = DRM_MODE_ENCODER_TMDS;
	412	break;
	413	case INTEL_DVO_CHIP_LVDS:
21d40d37	414	intel_encoder->clone_mask =
f8aed700	415	(1 << INTEL_DVO_LVDS_CLONE_BIT);
79e53945 JB	416	drm_connector_init(dev, connector,
	417	&intel_dvo_connector_funcs,
	418	DRM_MODE_CONNECTOR_LVDS);
	419	encoder_type = DRM_MODE_ENCODER_LVDS;
	420	break;
	421	}
	422
	423	drm_connector_helper_add(connector,
	424	&intel_dvo_connector_helper_funcs);
	425	connector->display_info.subpixel_order = SubPixelHorizontalRGB;
	426	connector->interlace_allowed = false;
	427	connector->doublescan_allowed = false;
	428
21d40d37	429	drm_encoder_init(dev, &intel_encoder->enc,
79e53945	430	&intel_dvo_enc_funcs, encoder_type);
21d40d37	431	drm_encoder_helper_add(&intel_encoder->enc,
79e53945 JB	432	&intel_dvo_helper_funcs);
79e53945 JB	433
599be16c	434	drm_mode_connector_attach_encoder(&intel_connector->base,
21d40d37	435	&intel_encoder->enc);
79e53945 JB	436	if (dvo->type == INTEL_DVO_CHIP_LVDS) {
	437	/* For our LVDS chipsets, we should hopefully be able
	438	* to dig the fixed panel mode out of the BIOS data.
	439	* However, it's in a different format from the BIOS
	440	* data on chipsets with integrated LVDS (stored in AIM
	441	* headers, likely), so for now, just get the current
	442	* mode being output through DVO.
	443	*/
ea5b213a	444	intel_dvo->panel_fixed_mode =
79e53945	445	intel_dvo_get_current_mode(connector);
ea5b213a	446	intel_dvo->panel_wants_dither = true;
79e53945 JB	447	}
	448
	449	drm_sysfs_connector_add(connector);
	450	return;
	451	}
	452
21d40d37	453	intel_i2c_destroy(intel_encoder->ddc_bus);
79e53945 JB	454	/* Didn't find a chip, so tear down. */
	455	if (i2cbus != NULL)
	456	intel_i2c_destroy(i2cbus);
	457	free_intel:
ea5b213a	458	kfree(intel_dvo);
599be16c	459	kfree(intel_connector);
79e53945	460	}