[net-next-2.6.git] / drivers / gpu / drm / i915 / intel_drv.h

/*
 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
 * Copyright (c) 2007-2008 Intel Corporation
 *   Jesse Barnes <jesse.barnes@intel.com>
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragraph) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
 * IN THE SOFTWARE.
 */
#ifndef __INTEL_DRV_H__
#define __INTEL_DRV_H__

#include <linux/i2c.h>
#include <linux/i2c-id.h>
#include <linux/i2c-algo-bit.h>
#include "i915_drv.h"
#include "drm_crtc.h"

#include "drm_crtc_helper.h"
/*
 * Display related stuff
 */

/* store information about an Ixxx DVO */
/* The i830->i865 use multiple DVOs with multiple i2cs */
/* the i915, i945 have a single sDVO i2c bus - which is different */
#define MAX_OUTPUTS 6
/* maximum connectors per crtcs in the mode set */
#define INTELFB_CONN_LIMIT 4

#define INTEL_I2C_BUS_DVO 1
#define INTEL_I2C_BUS_SDVO 2

/* these are outputs from the chip - integrated only
   external chips are via DVO or SDVO output */
#define INTEL_OUTPUT_UNUSED 0
#define INTEL_OUTPUT_ANALOG 1
#define INTEL_OUTPUT_DVO 2
#define INTEL_OUTPUT_SDVO 3
#define INTEL_OUTPUT_LVDS 4
#define INTEL_OUTPUT_TVOUT 5
#define INTEL_OUTPUT_HDMI 6
#define INTEL_OUTPUT_DISPLAYPORT 7
#define INTEL_OUTPUT_EDP 8

/* Intel Pipe Clone Bit */
#define INTEL_HDMIB_CLONE_BIT 1
#define INTEL_HDMIC_CLONE_BIT 2
#define INTEL_HDMID_CLONE_BIT 3
#define INTEL_HDMIE_CLONE_BIT 4
#define INTEL_HDMIF_CLONE_BIT 5
#define INTEL_SDVO_NON_TV_CLONE_BIT 6
#define INTEL_SDVO_TV_CLONE_BIT 7
#define INTEL_SDVO_LVDS_CLONE_BIT 8
#define INTEL_ANALOG_CLONE_BIT 9
#define INTEL_TV_CLONE_BIT 10
#define INTEL_DP_B_CLONE_BIT 11
#define INTEL_DP_C_CLONE_BIT 12
#define INTEL_DP_D_CLONE_BIT 13
#define INTEL_LVDS_CLONE_BIT 14
#define INTEL_DVO_TMDS_CLONE_BIT 15
#define INTEL_DVO_LVDS_CLONE_BIT 16
#define INTEL_EDP_CLONE_BIT 17

#define INTEL_DVO_CHIP_NONE 0
#define INTEL_DVO_CHIP_LVDS 1
#define INTEL_DVO_CHIP_TMDS 2
#define INTEL_DVO_CHIP_TVOUT 4

struct intel_i2c_chan {
	struct drm_device *drm_dev; /* for getting at dev. private (mmio etc.) */
	u32 reg; /* GPIO reg */
	struct i2c_adapter adapter;
	struct i2c_algo_bit_data algo;
};

struct intel_framebuffer {
	struct drm_framebuffer base;
	struct drm_gem_object *obj;
};


struct intel_encoder {
	struct drm_encoder enc;
	int type;
	struct i2c_adapter *i2c_bus;
	struct i2c_adapter *ddc_bus;
	bool load_detect_temp;
	bool needs_tv_clock;
	void *dev_priv;
	void (*hot_plug)(struct intel_encoder *);
	int crtc_mask;
	int clone_mask;
};

struct intel_connector {
	struct drm_connector base;
	void *dev_priv;
};

struct intel_crtc;
struct intel_overlay {
	struct drm_device *dev;
	struct intel_crtc *crtc;
	struct drm_i915_gem_object *vid_bo;
	struct drm_i915_gem_object *old_vid_bo;
	int active;
	int pfit_active;
	u32 pfit_vscale_ratio; /* shifted-point number, (1<<12) == 1.0 */
	u32 color_key;
	u32 brightness, contrast, saturation;
	u32 old_xscale, old_yscale;
	/* register access */
	u32 flip_addr;
	struct drm_i915_gem_object *reg_bo;
	void *virt_addr;
	/* flip handling */
	uint32_t last_flip_req;
	int hw_wedged;
#define HW_WEDGED		1
#define NEEDS_WAIT_FOR_FLIP	2
#define RELEASE_OLD_VID		3
#define SWITCH_OFF_STAGE_1	4
#define SWITCH_OFF_STAGE_2	5
};

struct intel_crtc {
	struct drm_crtc base;
	enum pipe pipe;
	enum plane plane;
	u8 lut_r[256], lut_g[256], lut_b[256];
	int dpms_mode;
	bool busy; /* is scanout buffer being updated frequently? */
	struct timer_list idle_timer;
	bool lowfreq_avail;
	struct intel_overlay *overlay;
	struct intel_unpin_work *unpin_work;
	int fdi_lanes;

	struct drm_gem_object *cursor_bo;
	uint32_t cursor_addr;
	int16_t cursor_x, cursor_y;
	int16_t cursor_width, cursor_height;
	bool cursor_visble;
};

#define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
#define to_intel_connector(x) container_of(x, struct intel_connector, base)
#define enc_to_intel_encoder(x) container_of(x, struct intel_encoder, enc)
#define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)

struct i2c_adapter *intel_i2c_create(struct drm_device *dev, const u32 reg,
				     const char *name);
void intel_i2c_destroy(struct i2c_adapter *adapter);
int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter);
extern bool intel_ddc_probe(struct intel_encoder *intel_encoder);
void intel_i2c_quirk_set(struct drm_device *dev, bool enable);
void intel_i2c_reset_gmbus(struct drm_device *dev);

extern void intel_crt_init(struct drm_device *dev);
extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
extern void intel_dvo_init(struct drm_device *dev);
extern void intel_tv_init(struct drm_device *dev);
extern void intel_mark_busy(struct drm_device *dev, struct drm_gem_object *obj);
extern void intel_lvds_init(struct drm_device *dev);
extern void intel_dp_init(struct drm_device *dev, int dp_reg);
void
intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode,
		 struct drm_display_mode *adjusted_mode);
extern bool intel_pch_has_edp(struct drm_crtc *crtc);
extern bool intel_dpd_is_edp(struct drm_device *dev);
extern void intel_edp_link_config (struct intel_encoder *, int *, int *);


extern int intel_panel_fitter_pipe (struct drm_device *dev);
extern void intel_crtc_load_lut(struct drm_crtc *crtc);
extern void intel_encoder_prepare (struct drm_encoder *encoder);
extern void intel_encoder_commit (struct drm_encoder *encoder);

extern struct drm_encoder *intel_attached_encoder(struct drm_connector *connector);

extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev,
						    struct drm_crtc *crtc);
int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
				struct drm_file *file_priv);
extern void intel_wait_for_vblank(struct drm_device *dev);
extern struct drm_crtc *intel_get_crtc_from_pipe(struct drm_device *dev, int pipe);
extern struct drm_crtc *intel_get_load_detect_pipe(struct intel_encoder *intel_encoder,
						   struct drm_connector *connector,
						   struct drm_display_mode *mode,
						   int *dpms_mode);
extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
					   struct drm_connector *connector,
					   int dpms_mode);

extern struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB);
extern int intel_sdvo_supports_hotplug(struct drm_connector *connector);
extern void intel_sdvo_set_hotplug(struct drm_connector *connector, int enable);
extern void intelfb_restore(void);
extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
				    u16 blue, int regno);
extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
				    u16 *blue, int regno);
extern void intel_init_clock_gating(struct drm_device *dev);
extern void ironlake_enable_drps(struct drm_device *dev);
extern void ironlake_disable_drps(struct drm_device *dev);

extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
				      struct drm_gem_object *obj);

extern int intel_framebuffer_init(struct drm_device *dev,
				  struct intel_framebuffer *ifb,
				  struct drm_mode_fb_cmd *mode_cmd,
				  struct drm_gem_object *obj);
extern int intel_fbdev_init(struct drm_device *dev);
extern void intel_fbdev_fini(struct drm_device *dev);

extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);

extern void intel_setup_overlay(struct drm_device *dev);
extern void intel_cleanup_overlay(struct drm_device *dev);
extern int intel_overlay_switch_off(struct intel_overlay *overlay);
extern int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay,
						int interruptible);
extern int intel_overlay_put_image(struct drm_device *dev, void *data,
				   struct drm_file *file_priv);
extern int intel_overlay_attrs(struct drm_device *dev, void *data,
			       struct drm_file *file_priv);

extern void intel_fb_output_poll_changed(struct drm_device *dev);
#endif /* __INTEL_DRV_H__ */
Commit	Line	Data
79e53945 JB	1	/*
	2	* Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
	3	* Copyright (c) 2007-2008 Intel Corporation
	4	* Jesse Barnes <jesse.barnes@intel.com>
	5	*
	6	* Permission is hereby granted, free of charge, to any person obtaining a
	7	* copy of this software and associated documentation files (the "Software"),
	8	* to deal in the Software without restriction, including without limitation
	9	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	10	* and/or sell copies of the Software, and to permit persons to whom the
	11	* Software is furnished to do so, subject to the following conditions:
	12	*
	13	* The above copyright notice and this permission notice (including the next
	14	* paragraph) shall be included in all copies or substantial portions of the
	15	* Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	18	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	19	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	20	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
	21	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	22	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
	23	* IN THE SOFTWARE.
	24	*/
	25	#ifndef __INTEL_DRV_H__
	26	#define __INTEL_DRV_H__
	27
	28	#include <linux/i2c.h>
	29	#include <linux/i2c-id.h>
	30	#include <linux/i2c-algo-bit.h>
80824003	31	#include "i915_drv.h"
79e53945 JB	32	#include "drm_crtc.h"
	33
	34	#include "drm_crtc_helper.h"
	35	/*
	36	* Display related stuff
	37	*/
	38
	39	/* store information about an Ixxx DVO */
	40	/* The i830->i865 use multiple DVOs with multiple i2cs */
	41	/* the i915, i945 have a single sDVO i2c bus - which is different */
	42	#define MAX_OUTPUTS 6
	43	/* maximum connectors per crtcs in the mode set */
	44	#define INTELFB_CONN_LIMIT 4
	45
	46	#define INTEL_I2C_BUS_DVO 1
	47	#define INTEL_I2C_BUS_SDVO 2
	48
	49	/* these are outputs from the chip - integrated only
	50	external chips are via DVO or SDVO output */
	51	#define INTEL_OUTPUT_UNUSED 0
	52	#define INTEL_OUTPUT_ANALOG 1
	53	#define INTEL_OUTPUT_DVO 2
	54	#define INTEL_OUTPUT_SDVO 3
	55	#define INTEL_OUTPUT_LVDS 4
	56	#define INTEL_OUTPUT_TVOUT 5
7d57382e	57	#define INTEL_OUTPUT_HDMI 6
a4fc5ed6	58	#define INTEL_OUTPUT_DISPLAYPORT 7
32f9d658	59	#define INTEL_OUTPUT_EDP 8
79e53945	60
f8aed700 ML	61	/* Intel Pipe Clone Bit */
	62	#define INTEL_HDMIB_CLONE_BIT 1
	63	#define INTEL_HDMIC_CLONE_BIT 2
	64	#define INTEL_HDMID_CLONE_BIT 3
	65	#define INTEL_HDMIE_CLONE_BIT 4
	66	#define INTEL_HDMIF_CLONE_BIT 5
	67	#define INTEL_SDVO_NON_TV_CLONE_BIT 6
	68	#define INTEL_SDVO_TV_CLONE_BIT 7
	69	#define INTEL_SDVO_LVDS_CLONE_BIT 8
	70	#define INTEL_ANALOG_CLONE_BIT 9
	71	#define INTEL_TV_CLONE_BIT 10
	72	#define INTEL_DP_B_CLONE_BIT 11
	73	#define INTEL_DP_C_CLONE_BIT 12
	74	#define INTEL_DP_D_CLONE_BIT 13
	75	#define INTEL_LVDS_CLONE_BIT 14
	76	#define INTEL_DVO_TMDS_CLONE_BIT 15
	77	#define INTEL_DVO_LVDS_CLONE_BIT 16
7c8460db	78	#define INTEL_EDP_CLONE_BIT 17
f8aed700	79
79e53945 JB	80	#define INTEL_DVO_CHIP_NONE 0
	81	#define INTEL_DVO_CHIP_LVDS 1
	82	#define INTEL_DVO_CHIP_TMDS 2
	83	#define INTEL_DVO_CHIP_TVOUT 4
	84
	85	struct intel_i2c_chan {
	86	struct drm_device drm_dev; / for getting at dev. private (mmio etc.) */
	87	u32 reg; /* GPIO reg */
	88	struct i2c_adapter adapter;
	89	struct i2c_algo_bit_data algo;
79e53945 JB	90	};
	91
	92	struct intel_framebuffer {
	93	struct drm_framebuffer base;
	94	struct drm_gem_object *obj;
	95	};
	96
	97
21d40d37	98	struct intel_encoder {
79e53945 JB	99	struct drm_encoder enc;
79e53945 JB	100	int type;
f9c10a9b KP	101	struct i2c_adapter *i2c_bus;
f9c10a9b KP	102	struct i2c_adapter *ddc_bus;
79e53945	103	bool load_detect_temp;
e2f0ba97	104	bool needs_tv_clock;
79e53945	105	void *dev_priv;
21d40d37	106	void (hot_plug)(struct intel_encoder );
f8aed700 ML	107	int crtc_mask;
f8aed700 ML	108	int clone_mask;
79e53945 JB	109	};
79e53945 JB	110
5daa55eb ZW	111	struct intel_connector {
	112	struct drm_connector base;
	113	void *dev_priv;
	114	};
	115
02e792fb DV	116	struct intel_crtc;
	117	struct intel_overlay {
	118	struct drm_device *dev;
	119	struct intel_crtc *crtc;
	120	struct drm_i915_gem_object *vid_bo;
	121	struct drm_i915_gem_object *old_vid_bo;
	122	int active;
	123	int pfit_active;
	124	u32 pfit_vscale_ratio; /* shifted-point number, (1<<12) == 1.0 */
	125	u32 color_key;
	126	u32 brightness, contrast, saturation;
	127	u32 old_xscale, old_yscale;
	128	/* register access */
	129	u32 flip_addr;
	130	struct drm_i915_gem_object *reg_bo;
	131	void *virt_addr;
5a5a0c64	132	/* flip handling */
5a5a0c64	133	uint32_t last_flip_req;
03f77ea5 DV	134	int hw_wedged;
	135	#define HW_WEDGED 1
	136	#define NEEDS_WAIT_FOR_FLIP 2
	137	#define RELEASE_OLD_VID 3
	138	#define SWITCH_OFF_STAGE_1 4
	139	#define SWITCH_OFF_STAGE_2 5
02e792fb DV	140	};
02e792fb DV	141
79e53945 JB	142	struct intel_crtc {
79e53945 JB	143	struct drm_crtc base;
80824003 JB	144	enum pipe pipe;
80824003 JB	145	enum plane plane;
79e53945 JB	146	u8 lut_r[256], lut_g[256], lut_b[256];
79e53945 JB	147	int dpms_mode;
652c393a JB	148	bool busy; /* is scanout buffer being updated frequently? */
	149	struct timer_list idle_timer;
	150	bool lowfreq_avail;
02e792fb	151	struct intel_overlay *overlay;
6b95a207	152	struct intel_unpin_work *unpin_work;
77ffb597	153	int fdi_lanes;
cda4b7d3 CW	154
	155	struct drm_gem_object *cursor_bo;
	156	uint32_t cursor_addr;
	157	int16_t cursor_x, cursor_y;
	158	int16_t cursor_width, cursor_height;
	159	bool cursor_visble;
79e53945 JB	160	};
	161
	162	#define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
5daa55eb	163	#define to_intel_connector(x) container_of(x, struct intel_connector, base)
21d40d37	164	#define enc_to_intel_encoder(x) container_of(x, struct intel_encoder, enc)
79e53945 JB	165	#define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base)
79e53945 JB	166
f9c10a9b KP	167	struct i2c_adapter intel_i2c_create(struct drm_device dev, const u32 reg,
	168	const char *name);
	169	void intel_i2c_destroy(struct i2c_adapter *adapter);
335af9a2	170	int intel_ddc_get_modes(struct drm_connector c, struct i2c_adapter adapter);
21d40d37	171	extern bool intel_ddc_probe(struct intel_encoder *intel_encoder);
0ba0e9e1	172	void intel_i2c_quirk_set(struct drm_device *dev, bool enable);
f0217c42 EA	173	void intel_i2c_reset_gmbus(struct drm_device *dev);
f0217c42 EA	174
79e53945	175	extern void intel_crt_init(struct drm_device *dev);
7d57382e EA	176	extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg);
7d57382e EA	177	extern bool intel_sdvo_init(struct drm_device *dev, int output_device);
79e53945 JB	178	extern void intel_dvo_init(struct drm_device *dev);
79e53945 JB	179	extern void intel_tv_init(struct drm_device *dev);
652c393a	180	extern void intel_mark_busy(struct drm_device dev, struct drm_gem_object obj);
79e53945	181	extern void intel_lvds_init(struct drm_device *dev);
a4fc5ed6 KP	182	extern void intel_dp_init(struct drm_device *dev, int dp_reg);
	183	void
	184	intel_dp_set_m_n(struct drm_crtc crtc, struct drm_display_mode mode,
	185	struct drm_display_mode *adjusted_mode);
36e83a18	186	extern bool intel_pch_has_edp(struct drm_crtc *crtc);
cb0953d7	187	extern bool intel_dpd_is_edp(struct drm_device *dev);
21d40d37	188	extern void intel_edp_link_config (struct intel_encoder , int , int *);
32f9d658	189
79e53945	190
02e792fb	191	extern int intel_panel_fitter_pipe (struct drm_device *dev);
79e53945 JB	192	extern void intel_crtc_load_lut(struct drm_crtc *crtc);
	193	extern void intel_encoder_prepare (struct drm_encoder *encoder);
	194	extern void intel_encoder_commit (struct drm_encoder *encoder);
	195
f1c79df3	196	extern struct drm_encoder intel_attached_encoder(struct drm_connector connector);
79e53945 JB	197
	198	extern struct drm_display_mode intel_crtc_mode_get(struct drm_device dev,
	199	struct drm_crtc *crtc);
08d7b3d1 CW	200	int intel_get_pipe_from_crtc_id(struct drm_device dev, void data,
08d7b3d1 CW	201	struct drm_file *file_priv);
79e53945 JB	202	extern void intel_wait_for_vblank(struct drm_device *dev);
79e53945 JB	203	extern struct drm_crtc intel_get_crtc_from_pipe(struct drm_device dev, int pipe);
21d40d37	204	extern struct drm_crtc intel_get_load_detect_pipe(struct intel_encoder intel_encoder,
c1c43977	205	struct drm_connector *connector,
79e53945 JB	206	struct drm_display_mode *mode,
79e53945 JB	207	int *dpms_mode);
21d40d37	208	extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder,
c1c43977	209	struct drm_connector *connector,
79e53945 JB	210	int dpms_mode);
	211
	212	extern struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB);
	213	extern int intel_sdvo_supports_hotplug(struct drm_connector *connector);
	214	extern void intel_sdvo_set_hotplug(struct drm_connector *connector, int enable);
79e53945 JB	215	extern void intelfb_restore(void);
	216	extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
	217	u16 blue, int regno);
b8c00ac5 DA	218	extern void intel_crtc_fb_gamma_get(struct drm_crtc crtc, u16 red, u16 *green,
b8c00ac5 DA	219	u16 *blue, int regno);
7e8b60fa	220	extern void intel_init_clock_gating(struct drm_device *dev);
f97108d1 JB	221	extern void ironlake_enable_drps(struct drm_device *dev);
f97108d1 JB	222	extern void ironlake_disable_drps(struct drm_device *dev);
79e53945	223
127bd2ac CW	224	extern int intel_pin_and_fence_fb_obj(struct drm_device *dev,
	225	struct drm_gem_object *obj);
	226
38651674 DA	227	extern int intel_framebuffer_init(struct drm_device *dev,
	228	struct intel_framebuffer *ifb,
	229	struct drm_mode_fb_cmd *mode_cmd,
	230	struct drm_gem_object *obj);
	231	extern int intel_fbdev_init(struct drm_device *dev);
	232	extern void intel_fbdev_fini(struct drm_device *dev);
28d52043	233
6b95a207 KH	234	extern void intel_prepare_page_flip(struct drm_device *dev, int plane);
6b95a207 KH	235	extern void intel_finish_page_flip(struct drm_device *dev, int pipe);
1afe3e9d	236	extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane);
6b95a207	237
02e792fb DV	238	extern void intel_setup_overlay(struct drm_device *dev);
	239	extern void intel_cleanup_overlay(struct drm_device *dev);
	240	extern int intel_overlay_switch_off(struct intel_overlay *overlay);
03f77ea5 DV	241	extern int intel_overlay_recover_from_interrupt(struct intel_overlay *overlay,
03f77ea5 DV	242	int interruptible);
02e792fb DV	243	extern int intel_overlay_put_image(struct drm_device dev, void data,
	244	struct drm_file *file_priv);
	245	extern int intel_overlay_attrs(struct drm_device dev, void data,
	246	struct drm_file *file_priv);
4abe3520	247
eb1f8e4f	248	extern void intel_fb_output_poll_changed(struct drm_device *dev);
79e53945	249	#endif /* __INTEL_DRV_H__ */