[net-next-2.6.git] / drivers / gpu / drm / i915 / i915_opregion.c

/*
 * Copyright 2008 Intel Corporation <hong.liu@intel.com>
 * Copyright 2008 Red Hat <mjg@redhat.com>
 *
 * Permission is hereby granted, free of charge, to any person obtaining
 * a copy of this software and associated documentation files (the
 * "Software"), to deal in the Software without restriction, including
 * without limitation the rights to use, copy, modify, merge, publish,
 * distribute, sub license, and/or sell copies of the Software, and to
 * permit persons to whom the Software is furnished to do so, subject to
 * the following conditions:
 *
 * The above copyright notice and this permission notice (including the
 * next paragraph) shall be included in all copies or substantial
 * portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NON-INFRINGEMENT.  IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE
 * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 *
 */

#include <linux/acpi.h>
#include <acpi/video.h>

#include "drmP.h"
#include "i915_drm.h"
#include "i915_drv.h"

#define PCI_ASLE 0xe4
#define PCI_LBPC 0xf4
#define PCI_ASLS 0xfc

#define OPREGION_SZ            (8*1024)
#define OPREGION_HEADER_OFFSET 0
#define OPREGION_ACPI_OFFSET   0x100
#define OPREGION_SWSCI_OFFSET  0x200
#define OPREGION_ASLE_OFFSET   0x300
#define OPREGION_VBT_OFFSET    0x1000

#define OPREGION_SIGNATURE "IntelGraphicsMem"
#define MBOX_ACPI      (1<<0)
#define MBOX_SWSCI     (1<<1)
#define MBOX_ASLE      (1<<2)

struct opregion_header {
       u8 signature[16];
       u32 size;
       u32 opregion_ver;
       u8 bios_ver[32];
       u8 vbios_ver[16];
       u8 driver_ver[16];
       u32 mboxes;
       u8 reserved[164];
} __attribute__((packed));

/* OpRegion mailbox #1: public ACPI methods */
struct opregion_acpi {
       u32 drdy;       /* driver readiness */
       u32 csts;       /* notification status */
       u32 cevt;       /* current event */
       u8 rsvd1[20];
       u32 didl[8];    /* supported display devices ID list */
       u32 cpdl[8];    /* currently presented display list */
       u32 cadl[8];    /* currently active display list */
       u32 nadl[8];    /* next active devices list */
       u32 aslp;       /* ASL sleep time-out */
       u32 tidx;       /* toggle table index */
       u32 chpd;       /* current hotplug enable indicator */
       u32 clid;       /* current lid state*/
       u32 cdck;       /* current docking state */
       u32 sxsw;       /* Sx state resume */
       u32 evts;       /* ASL supported events */
       u32 cnot;       /* current OS notification */
       u32 nrdy;       /* driver status */
       u8 rsvd2[60];
} __attribute__((packed));

/* OpRegion mailbox #2: SWSCI */
struct opregion_swsci {
       u32 scic;       /* SWSCI command|status|data */
       u32 parm;       /* command parameters */
       u32 dslp;       /* driver sleep time-out */
       u8 rsvd[244];
} __attribute__((packed));

/* OpRegion mailbox #3: ASLE */
struct opregion_asle {
       u32 ardy;       /* driver readiness */
       u32 aslc;       /* ASLE interrupt command */
       u32 tche;       /* technology enabled indicator */
       u32 alsi;       /* current ALS illuminance reading */
       u32 bclp;       /* backlight brightness to set */
       u32 pfit;       /* panel fitting state */
       u32 cblv;       /* current brightness level */
       u16 bclm[20];   /* backlight level duty cycle mapping table */
       u32 cpfm;       /* current panel fitting mode */
       u32 epfm;       /* enabled panel fitting modes */
       u8 plut[74];    /* panel LUT and identifier */
       u32 pfmb;       /* PWM freq and min brightness */
       u8 rsvd[102];
} __attribute__((packed));

/* ASLE irq request bits */
#define ASLE_SET_ALS_ILLUM     (1 << 0)
#define ASLE_SET_BACKLIGHT     (1 << 1)
#define ASLE_SET_PFIT          (1 << 2)
#define ASLE_SET_PWM_FREQ      (1 << 3)
#define ASLE_REQ_MSK           0xf

/* response bits of ASLE irq request */
#define ASLE_ALS_ILLUM_FAILED	(1<<10)
#define ASLE_BACKLIGHT_FAILED	(1<<12)
#define ASLE_PFIT_FAILED	(1<<14)
#define ASLE_PWM_FREQ_FAILED	(1<<16)

/* ASLE backlight brightness to set */
#define ASLE_BCLP_VALID                (1<<31)
#define ASLE_BCLP_MSK          (~(1<<31))

/* ASLE panel fitting request */
#define ASLE_PFIT_VALID         (1<<31)
#define ASLE_PFIT_CENTER (1<<0)
#define ASLE_PFIT_STRETCH_TEXT (1<<1)
#define ASLE_PFIT_STRETCH_GFX (1<<2)

/* PWM frequency and minimum brightness */
#define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
#define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
#define ASLE_PFMB_PWM_MASK (0x7ffffe00)
#define ASLE_PFMB_PWM_VALID (1<<31)

#define ASLE_CBLV_VALID         (1<<31)

#define ACPI_OTHER_OUTPUT (0<<8)
#define ACPI_VGA_OUTPUT (1<<8)
#define ACPI_TV_OUTPUT (2<<8)
#define ACPI_DIGITAL_OUTPUT (3<<8)
#define ACPI_LVDS_OUTPUT (4<<8)

static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct opregion_asle *asle = dev_priv->opregion.asle;
	u32 blc_pwm_ctl, blc_pwm_ctl2;
	u32 max_backlight, level, shift;

	if (!(bclp & ASLE_BCLP_VALID))
		return ASLE_BACKLIGHT_FAILED;

	bclp &= ASLE_BCLP_MSK;
	if (bclp < 0 || bclp > 255)
		return ASLE_BACKLIGHT_FAILED;

	blc_pwm_ctl = I915_READ(BLC_PWM_CTL);
	blc_pwm_ctl2 = I915_READ(BLC_PWM_CTL2);

	if (IS_I965G(dev) && (blc_pwm_ctl2 & BLM_COMBINATION_MODE))
		pci_write_config_dword(dev->pdev, PCI_LBPC, bclp);
	else {
		if (IS_PINEVIEW(dev)) {
			blc_pwm_ctl &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1);
			max_backlight = (blc_pwm_ctl & BACKLIGHT_MODULATION_FREQ_MASK) >> 
					BACKLIGHT_MODULATION_FREQ_SHIFT;
			shift = BACKLIGHT_DUTY_CYCLE_SHIFT + 1;
		} else {
			blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
			max_backlight = ((blc_pwm_ctl & BACKLIGHT_MODULATION_FREQ_MASK) >> 
					BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
			shift = BACKLIGHT_DUTY_CYCLE_SHIFT;
		}
		level = (bclp * max_backlight) / 255;
		I915_WRITE(BLC_PWM_CTL, blc_pwm_ctl | (level << shift));
	}
	asle->cblv = (bclp*0x64)/0xff | ASLE_CBLV_VALID;

	return 0;
}

static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi)
{
	/* alsi is the current ALS reading in lux. 0 indicates below sensor
	   range, 0xffff indicates above sensor range. 1-0xfffe are valid */
	return 0;
}

static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	if (pfmb & ASLE_PFMB_PWM_VALID) {
		u32 blc_pwm_ctl = I915_READ(BLC_PWM_CTL);
		u32 pwm = pfmb & ASLE_PFMB_PWM_MASK;
		blc_pwm_ctl &= BACKLIGHT_DUTY_CYCLE_MASK;
		pwm = pwm >> 9;
		/* FIXME - what do we do with the PWM? */
	}
	return 0;
}

static u32 asle_set_pfit(struct drm_device *dev, u32 pfit)
{
	/* Panel fitting is currently controlled by the X code, so this is a
	   noop until modesetting support works fully */
	if (!(pfit & ASLE_PFIT_VALID))
		return ASLE_PFIT_FAILED;
	return 0;
}

void opregion_asle_intr(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct opregion_asle *asle = dev_priv->opregion.asle;
	u32 asle_stat = 0;
	u32 asle_req;

	if (!asle)
		return;

	asle_req = asle->aslc & ASLE_REQ_MSK;

	if (!asle_req) {
		DRM_DEBUG_DRIVER("non asle set request??\n");
		return;
	}

	if (asle_req & ASLE_SET_ALS_ILLUM)
		asle_stat |= asle_set_als_illum(dev, asle->alsi);

	if (asle_req & ASLE_SET_BACKLIGHT)
		asle_stat |= asle_set_backlight(dev, asle->bclp);

	if (asle_req & ASLE_SET_PFIT)
		asle_stat |= asle_set_pfit(dev, asle->pfit);

	if (asle_req & ASLE_SET_PWM_FREQ)
		asle_stat |= asle_set_pwm_freq(dev, asle->pfmb);

	asle->aslc = asle_stat;
}

static u32 asle_set_backlight_ironlake(struct drm_device *dev, u32 bclp)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct opregion_asle *asle = dev_priv->opregion.asle;
	u32 cpu_pwm_ctl, pch_pwm_ctl2;
	u32 max_backlight, level;

	if (!(bclp & ASLE_BCLP_VALID))
		return ASLE_BACKLIGHT_FAILED;

	bclp &= ASLE_BCLP_MSK;
	if (bclp < 0 || bclp > 255)
		return ASLE_BACKLIGHT_FAILED;

	cpu_pwm_ctl = I915_READ(BLC_PWM_CPU_CTL);
	pch_pwm_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
	/* get the max PWM frequency */
	max_backlight = (pch_pwm_ctl2 >> 16) & BACKLIGHT_DUTY_CYCLE_MASK;
	/* calculate the expected PMW frequency */
	level = (bclp * max_backlight) / 255;
	/* reserve the high 16 bits */
	cpu_pwm_ctl &= ~(BACKLIGHT_DUTY_CYCLE_MASK);
	/* write the updated PWM frequency */
	I915_WRITE(BLC_PWM_CPU_CTL, cpu_pwm_ctl | level);

	asle->cblv = (bclp*0x64)/0xff | ASLE_CBLV_VALID;

	return 0;
}

void ironlake_opregion_gse_intr(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct opregion_asle *asle = dev_priv->opregion.asle;
	u32 asle_stat = 0;
	u32 asle_req;

	if (!asle)
		return;

	asle_req = asle->aslc & ASLE_REQ_MSK;

	if (!asle_req) {
		DRM_DEBUG_DRIVER("non asle set request??\n");
		return;
	}

	if (asle_req & ASLE_SET_ALS_ILLUM) {
		DRM_DEBUG_DRIVER("Illum is not supported\n");
		asle_stat |= ASLE_ALS_ILLUM_FAILED;
	}

	if (asle_req & ASLE_SET_BACKLIGHT)
		asle_stat |= asle_set_backlight_ironlake(dev, asle->bclp);

	if (asle_req & ASLE_SET_PFIT) {
		DRM_DEBUG_DRIVER("Pfit is not supported\n");
		asle_stat |= ASLE_PFIT_FAILED;
	}

	if (asle_req & ASLE_SET_PWM_FREQ) {
		DRM_DEBUG_DRIVER("PWM freq is not supported\n");
		asle_stat |= ASLE_PWM_FREQ_FAILED;
	}

	asle->aslc = asle_stat;
}
#define ASLE_ALS_EN    (1<<0)
#define ASLE_BLC_EN    (1<<1)
#define ASLE_PFIT_EN   (1<<2)
#define ASLE_PFMB_EN   (1<<3)

void opregion_enable_asle(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct opregion_asle *asle = dev_priv->opregion.asle;

	if (asle) {
		if (IS_MOBILE(dev)) {
			unsigned long irqflags;

			spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags);
			intel_enable_asle(dev);
			spin_unlock_irqrestore(&dev_priv->user_irq_lock,
					       irqflags);
		}

		asle->tche = ASLE_ALS_EN | ASLE_BLC_EN | ASLE_PFIT_EN |
			ASLE_PFMB_EN;
		asle->ardy = 1;
	}
}

#define ACPI_EV_DISPLAY_SWITCH (1<<0)
#define ACPI_EV_LID            (1<<1)
#define ACPI_EV_DOCK           (1<<2)

static struct intel_opregion *system_opregion;

static int intel_opregion_video_event(struct notifier_block *nb,
				      unsigned long val, void *data)
{
	/* The only video events relevant to opregion are 0x80. These indicate
	   either a docking event, lid switch or display switch request. In
	   Linux, these are handled by the dock, button and video drivers.
	   We might want to fix the video driver to be opregion-aware in
	   future, but right now we just indicate to the firmware that the
	   request has been handled */

	struct opregion_acpi *acpi;

	if (!system_opregion)
		return NOTIFY_DONE;

	acpi = system_opregion->acpi;
	acpi->csts = 0;

	return NOTIFY_OK;
}

static struct notifier_block intel_opregion_notifier = {
	.notifier_call = intel_opregion_video_event,
};

/*
 * Initialise the DIDL field in opregion. This passes a list of devices to
 * the firmware. Values are defined by section B.4.2 of the ACPI specification
 * (version 3)
 */

static void intel_didl_outputs(struct drm_device *dev)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_opregion *opregion = &dev_priv->opregion;
	struct drm_connector *connector;
	acpi_handle handle;
	struct acpi_device *acpi_dev, *acpi_cdev, *acpi_video_bus = NULL;
	unsigned long long device_id;
	acpi_status status;
	int i = 0;

	handle = DEVICE_ACPI_HANDLE(&dev->pdev->dev);
	if (!handle || ACPI_FAILURE(acpi_bus_get_device(handle, &acpi_dev)))
		return;

	if (acpi_is_video_device(acpi_dev))
		acpi_video_bus = acpi_dev;
	else {
		list_for_each_entry(acpi_cdev, &acpi_dev->children, node) {
			if (acpi_is_video_device(acpi_cdev)) {
				acpi_video_bus = acpi_cdev;
				break;
			}
		}
	}

	if (!acpi_video_bus) {
		printk(KERN_WARNING "No ACPI video bus found\n");
		return;
	}

	list_for_each_entry(acpi_cdev, &acpi_video_bus->children, node) {
		if (i >= 8) {
			dev_printk (KERN_ERR, &dev->pdev->dev,
				    "More than 8 outputs detected\n");
			return;
		}
		status =
			acpi_evaluate_integer(acpi_cdev->handle, "_ADR",
						NULL, &device_id);
		if (ACPI_SUCCESS(status)) {
			if (!device_id)
				goto blind_set;
			opregion->acpi->didl[i] = (u32)(device_id & 0x0f0f);
			i++;
		}
	}

end:
	/* If fewer than 8 outputs, the list must be null terminated */
	if (i < 8)
		opregion->acpi->didl[i] = 0;
	return;

blind_set:
	i = 0;
	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
		int output_type = ACPI_OTHER_OUTPUT;
		if (i >= 8) {
			dev_printk (KERN_ERR, &dev->pdev->dev,
				    "More than 8 outputs detected\n");
			return;
		}
		switch (connector->connector_type) {
		case DRM_MODE_CONNECTOR_VGA:
		case DRM_MODE_CONNECTOR_DVIA:
			output_type = ACPI_VGA_OUTPUT;
			break;
		case DRM_MODE_CONNECTOR_Composite:
		case DRM_MODE_CONNECTOR_SVIDEO:
		case DRM_MODE_CONNECTOR_Component:
		case DRM_MODE_CONNECTOR_9PinDIN:
			output_type = ACPI_TV_OUTPUT;
			break;
		case DRM_MODE_CONNECTOR_DVII:
		case DRM_MODE_CONNECTOR_DVID:
		case DRM_MODE_CONNECTOR_DisplayPort:
		case DRM_MODE_CONNECTOR_HDMIA:
		case DRM_MODE_CONNECTOR_HDMIB:
			output_type = ACPI_DIGITAL_OUTPUT;
			break;
		case DRM_MODE_CONNECTOR_LVDS:
			output_type = ACPI_LVDS_OUTPUT;
			break;
		}
		opregion->acpi->didl[i] |= (1<<31) | output_type | i;
		i++;
	}
	goto end;
}

int intel_opregion_init(struct drm_device *dev, int resume)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_opregion *opregion = &dev_priv->opregion;
	void *base;
	u32 asls, mboxes;
	int err = 0;

	pci_read_config_dword(dev->pdev, PCI_ASLS, &asls);
	DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls);
	if (asls == 0) {
		DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n");
		return -ENOTSUPP;
	}

	base = ioremap(asls, OPREGION_SZ);
	if (!base)
		return -ENOMEM;

	opregion->header = base;
	if (memcmp(opregion->header->signature, OPREGION_SIGNATURE, 16)) {
		DRM_DEBUG_DRIVER("opregion signature mismatch\n");
		err = -EINVAL;
		goto err_out;
	}

	mboxes = opregion->header->mboxes;
	if (mboxes & MBOX_ACPI) {
		DRM_DEBUG_DRIVER("Public ACPI methods supported\n");
		opregion->acpi = base + OPREGION_ACPI_OFFSET;
		if (drm_core_check_feature(dev, DRIVER_MODESET))
			intel_didl_outputs(dev);
	} else {
		DRM_DEBUG_DRIVER("Public ACPI methods not supported\n");
		err = -ENOTSUPP;
		goto err_out;
	}
	opregion->enabled = 1;

	if (mboxes & MBOX_SWSCI) {
		DRM_DEBUG_DRIVER("SWSCI supported\n");
		opregion->swsci = base + OPREGION_SWSCI_OFFSET;
	}
	if (mboxes & MBOX_ASLE) {
		DRM_DEBUG_DRIVER("ASLE supported\n");
		opregion->asle = base + OPREGION_ASLE_OFFSET;
		opregion_enable_asle(dev);
	}

	if (!resume)
		acpi_video_register();


	/* Notify BIOS we are ready to handle ACPI video ext notifs.
	 * Right now, all the events are handled by the ACPI video module.
	 * We don't actually need to do anything with them. */
	opregion->acpi->csts = 0;
	opregion->acpi->drdy = 1;

	system_opregion = opregion;
	register_acpi_notifier(&intel_opregion_notifier);

	return 0;

err_out:
	iounmap(opregion->header);
	opregion->header = NULL;
	acpi_video_register();
	return err;
}

void intel_opregion_free(struct drm_device *dev, int suspend)
{
	struct drm_i915_private *dev_priv = dev->dev_private;
	struct intel_opregion *opregion = &dev_priv->opregion;

	if (!opregion->enabled)
		return;

	if (!suspend)
		acpi_video_unregister();

	opregion->acpi->drdy = 0;

	system_opregion = NULL;
	unregister_acpi_notifier(&intel_opregion_notifier);

	/* just clear all opregion memory pointers now */
	iounmap(opregion->header);
	opregion->header = NULL;
	opregion->acpi = NULL;
	opregion->swsci = NULL;
	opregion->asle = NULL;

	opregion->enabled = 0;
}
Commit	Line	Data
8ee1c3db MG	1	/*
	2	* Copyright 2008 Intel Corporation <hong.liu@intel.com>
	3	* Copyright 2008 Red Hat <mjg@redhat.com>
	4	*
	5	* Permission is hereby granted, free of charge, to any person obtaining
	6	* a copy of this software and associated documentation files (the
	7	* "Software"), to deal in the Software without restriction, including
	8	* without limitation the rights to use, copy, modify, merge, publish,
	9	* distribute, sub license, and/or sell copies of the Software, and to
	10	* permit persons to whom the Software is furnished to do so, subject to
	11	* the following conditions:
	12	*
	13	* The above copyright notice and this permission notice (including the
	14	* next paragraph) shall be included in all copies or substantial
	15	* portions of the Software.
	16	*
	17	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	18	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
	19	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	20	* NON-INFRINGEMENT. IN NO EVENT SHALL INTEL AND/OR ITS SUPPLIERS BE
	21	* LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
	22	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
	23	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
	24	* SOFTWARE.
	25	*
	26	*/
	27
	28	#include <linux/acpi.h>
74a365b3	29	#include <acpi/video.h>
8ee1c3db MG	30
	31	#include "drmP.h"
	32	#include "i915_drm.h"
	33	#include "i915_drv.h"
	34
	35	#define PCI_ASLE 0xe4
	36	#define PCI_LBPC 0xf4
	37	#define PCI_ASLS 0xfc
	38
	39	#define OPREGION_SZ (8*1024)
	40	#define OPREGION_HEADER_OFFSET 0
	41	#define OPREGION_ACPI_OFFSET 0x100
	42	#define OPREGION_SWSCI_OFFSET 0x200
	43	#define OPREGION_ASLE_OFFSET 0x300
	44	#define OPREGION_VBT_OFFSET 0x1000
	45
	46	#define OPREGION_SIGNATURE "IntelGraphicsMem"
	47	#define MBOX_ACPI (1<<0)
	48	#define MBOX_SWSCI (1<<1)
	49	#define MBOX_ASLE (1<<2)
	50
	51	struct opregion_header {
	52	u8 signature[16];
	53	u32 size;
	54	u32 opregion_ver;
	55	u8 bios_ver[32];
	56	u8 vbios_ver[16];
	57	u8 driver_ver[16];
	58	u32 mboxes;
	59	u8 reserved[164];
	60	} __attribute__((packed));
	61
	62	/* OpRegion mailbox #1: public ACPI methods */
	63	struct opregion_acpi {
	64	u32 drdy; /* driver readiness */
	65	u32 csts; /* notification status */
	66	u32 cevt; /* current event */
	67	u8 rsvd1[20];
	68	u32 didl[8]; /* supported display devices ID list */
	69	u32 cpdl[8]; /* currently presented display list */
	70	u32 cadl[8]; /* currently active display list */
	71	u32 nadl[8]; /* next active devices list */
	72	u32 aslp; /* ASL sleep time-out */
	73	u32 tidx; /* toggle table index */
	74	u32 chpd; /* current hotplug enable indicator */
	75	u32 clid; /* current lid state*/
	76	u32 cdck; /* current docking state */
	77	u32 sxsw; /* Sx state resume */
	78	u32 evts; /* ASL supported events */
	79	u32 cnot; /* current OS notification */
	80	u32 nrdy; /* driver status */
	81	u8 rsvd2[60];
	82	} __attribute__((packed));
	83
	84	/* OpRegion mailbox #2: SWSCI */
	85	struct opregion_swsci {
	86	u32 scic; /* SWSCI command\|status\|data */
	87	u32 parm; /* command parameters */
	88	u32 dslp; /* driver sleep time-out */
	89	u8 rsvd[244];
	90	} __attribute__((packed));
	91
	92	/* OpRegion mailbox #3: ASLE */
	93	struct opregion_asle {
94	u32 ardy; /* driver readiness */
95	u32 aslc; /* ASLE interrupt command */
96	u32 tche; /* technology enabled indicator */
97	u32 alsi; /* current ALS illuminance reading */
98	u32 bclp; /* backlight brightness to set */
99	u32 pfit; /* panel fitting state */
100	u32 cblv; /* current brightness level */
101	u16 bclm[20]; /* backlight level duty cycle mapping table */
102	u32 cpfm; /* current panel fitting mode */
103	u32 epfm; /* enabled panel fitting modes */
104	u8 plut[74]; /* panel LUT and identifier */
105	u32 pfmb; /* PWM freq and min brightness */
106	u8 rsvd[102];
107	} __attribute__((packed));
108
109	/* ASLE irq request bits */
110	#define ASLE_SET_ALS_ILLUM (1 << 0)
111	#define ASLE_SET_BACKLIGHT (1 << 1)
112	#define ASLE_SET_PFIT (1 << 2)
113	#define ASLE_SET_PWM_FREQ (1 << 3)
114	#define ASLE_REQ_MSK 0xf
115
116	/* response bits of ASLE irq request */
01c66889 ZY	117	#define ASLE_ALS_ILLUM_FAILED (1<<10)
	118	#define ASLE_BACKLIGHT_FAILED (1<<12)
	119	#define ASLE_PFIT_FAILED (1<<14)
	120	#define ASLE_PWM_FREQ_FAILED (1<<16)
8ee1c3db MG	121
	122	/* ASLE backlight brightness to set */
	123	#define ASLE_BCLP_VALID (1<<31)
	124	#define ASLE_BCLP_MSK (~(1<<31))
	125
	126	/* ASLE panel fitting request */
	127	#define ASLE_PFIT_VALID (1<<31)
	128	#define ASLE_PFIT_CENTER (1<<0)
	129	#define ASLE_PFIT_STRETCH_TEXT (1<<1)
	130	#define ASLE_PFIT_STRETCH_GFX (1<<2)
	131
	132	/* PWM frequency and minimum brightness */
	133	#define ASLE_PFMB_BRIGHTNESS_MASK (0xff)
	134	#define ASLE_PFMB_BRIGHTNESS_VALID (1<<8)
	135	#define ASLE_PFMB_PWM_MASK (0x7ffffe00)
	136	#define ASLE_PFMB_PWM_VALID (1<<31)
	137
	138	#define ASLE_CBLV_VALID (1<<31)
	139
74a365b3 MG	140	#define ACPI_OTHER_OUTPUT (0<<8)
	141	#define ACPI_VGA_OUTPUT (1<<8)
	142	#define ACPI_TV_OUTPUT (2<<8)
	143	#define ACPI_DIGITAL_OUTPUT (3<<8)
	144	#define ACPI_LVDS_OUTPUT (4<<8)
	145
8ee1c3db MG	146	static u32 asle_set_backlight(struct drm_device *dev, u32 bclp)
	147	{
	148	struct drm_i915_private *dev_priv = dev->dev_private;
	149	struct opregion_asle *asle = dev_priv->opregion.asle;
	150	u32 blc_pwm_ctl, blc_pwm_ctl2;
078a033f	151	u32 max_backlight, level, shift;
8ee1c3db MG	152
8ee1c3db MG	153	if (!(bclp & ASLE_BCLP_VALID))
862daefc	154	return ASLE_BACKLIGHT_FAILED;
8ee1c3db MG	155
	156	bclp &= ASLE_BCLP_MSK;
	157	if (bclp < 0 \|\| bclp > 255)
862daefc	158	return ASLE_BACKLIGHT_FAILED;
8ee1c3db MG	159
8ee1c3db MG	160	blc_pwm_ctl = I915_READ(BLC_PWM_CTL);
8ee1c3db MG	161	blc_pwm_ctl2 = I915_READ(BLC_PWM_CTL2);
8ee1c3db MG	162
078a033f	163	if (IS_I965G(dev) && (blc_pwm_ctl2 & BLM_COMBINATION_MODE))
8ee1c3db	164	pci_write_config_dword(dev->pdev, PCI_LBPC, bclp);
078a033f	165	else {
f2b115e6	166	if (IS_PINEVIEW(dev)) {
078a033f LP	167	blc_pwm_ctl &= ~(BACKLIGHT_DUTY_CYCLE_MASK - 1);
	168	max_backlight = (blc_pwm_ctl & BACKLIGHT_MODULATION_FREQ_MASK) >>
	169	BACKLIGHT_MODULATION_FREQ_SHIFT;
	170	shift = BACKLIGHT_DUTY_CYCLE_SHIFT + 1;
	171	} else {
	172	blc_pwm_ctl &= ~BACKLIGHT_DUTY_CYCLE_MASK;
	173	max_backlight = ((blc_pwm_ctl & BACKLIGHT_MODULATION_FREQ_MASK) >>
	174	BACKLIGHT_MODULATION_FREQ_SHIFT) * 2;
	175	shift = BACKLIGHT_DUTY_CYCLE_SHIFT;
	176	}
	177	level = (bclp * max_backlight) / 255;
	178	I915_WRITE(BLC_PWM_CTL, blc_pwm_ctl \| (level << shift));
	179	}
8ee1c3db MG	180	asle->cblv = (bclp*0x64)/0xff \| ASLE_CBLV_VALID;
	181
	182	return 0;
	183	}
	184
	185	static u32 asle_set_als_illum(struct drm_device *dev, u32 alsi)
	186	{
	187	/* alsi is the current ALS reading in lux. 0 indicates below sensor
	188	range, 0xffff indicates above sensor range. 1-0xfffe are valid */
	189	return 0;
	190	}
	191
	192	static u32 asle_set_pwm_freq(struct drm_device *dev, u32 pfmb)
	193	{
	194	struct drm_i915_private *dev_priv = dev->dev_private;
	195	if (pfmb & ASLE_PFMB_PWM_VALID) {
	196	u32 blc_pwm_ctl = I915_READ(BLC_PWM_CTL);
	197	u32 pwm = pfmb & ASLE_PFMB_PWM_MASK;
	198	blc_pwm_ctl &= BACKLIGHT_DUTY_CYCLE_MASK;
	199	pwm = pwm >> 9;
	200	/* FIXME - what do we do with the PWM? */
	201	}
	202	return 0;
	203	}
	204
	205	static u32 asle_set_pfit(struct drm_device *dev, u32 pfit)
	206	{
	207	/* Panel fitting is currently controlled by the X code, so this is a
	208	noop until modesetting support works fully */
	209	if (!(pfit & ASLE_PFIT_VALID))
862daefc	210	return ASLE_PFIT_FAILED;
8ee1c3db MG	211	return 0;
	212	}
	213
	214	void opregion_asle_intr(struct drm_device *dev)
	215	{
	216	struct drm_i915_private *dev_priv = dev->dev_private;
	217	struct opregion_asle *asle = dev_priv->opregion.asle;
	218	u32 asle_stat = 0;
	219	u32 asle_req;
	220
	221	if (!asle)
	222	return;
	223
	224	asle_req = asle->aslc & ASLE_REQ_MSK;
	225
	226	if (!asle_req) {
44d98a61	227	DRM_DEBUG_DRIVER("non asle set request??\n");
8ee1c3db MG	228	return;
	229	}
	230
	231	if (asle_req & ASLE_SET_ALS_ILLUM)
	232	asle_stat \|= asle_set_als_illum(dev, asle->alsi);
	233
	234	if (asle_req & ASLE_SET_BACKLIGHT)
	235	asle_stat \|= asle_set_backlight(dev, asle->bclp);
	236
	237	if (asle_req & ASLE_SET_PFIT)
	238	asle_stat \|= asle_set_pfit(dev, asle->pfit);
	239
	240	if (asle_req & ASLE_SET_PWM_FREQ)
	241	asle_stat \|= asle_set_pwm_freq(dev, asle->pfmb);
	242
	243	asle->aslc = asle_stat;
	244	}
	245
01c66889 ZY	246	static u32 asle_set_backlight_ironlake(struct drm_device *dev, u32 bclp)
	247	{
	248	struct drm_i915_private *dev_priv = dev->dev_private;
	249	struct opregion_asle *asle = dev_priv->opregion.asle;
	250	u32 cpu_pwm_ctl, pch_pwm_ctl2;
	251	u32 max_backlight, level;
	252
	253	if (!(bclp & ASLE_BCLP_VALID))
	254	return ASLE_BACKLIGHT_FAILED;
	255
	256	bclp &= ASLE_BCLP_MSK;
	257	if (bclp < 0 \|\| bclp > 255)
	258	return ASLE_BACKLIGHT_FAILED;
	259
	260	cpu_pwm_ctl = I915_READ(BLC_PWM_CPU_CTL);
	261	pch_pwm_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
	262	/* get the max PWM frequency */
	263	max_backlight = (pch_pwm_ctl2 >> 16) & BACKLIGHT_DUTY_CYCLE_MASK;
	264	/* calculate the expected PMW frequency */
	265	level = (bclp * max_backlight) / 255;
	266	/* reserve the high 16 bits */
	267	cpu_pwm_ctl &= ~(BACKLIGHT_DUTY_CYCLE_MASK);
	268	/* write the updated PWM frequency */
	269	I915_WRITE(BLC_PWM_CPU_CTL, cpu_pwm_ctl \| level);
	270
	271	asle->cblv = (bclp*0x64)/0xff \| ASLE_CBLV_VALID;
	272
	273	return 0;
	274	}
	275
	276	void ironlake_opregion_gse_intr(struct drm_device *dev)
	277	{
	278	struct drm_i915_private *dev_priv = dev->dev_private;
	279	struct opregion_asle *asle = dev_priv->opregion.asle;
	280	u32 asle_stat = 0;
	281	u32 asle_req;
	282
	283	if (!asle)
	284	return;
	285
	286	asle_req = asle->aslc & ASLE_REQ_MSK;
	287
	288	if (!asle_req) {
	289	DRM_DEBUG_DRIVER("non asle set request??\n");
	290	return;
	291	}
	292
	293	if (asle_req & ASLE_SET_ALS_ILLUM) {
	294	DRM_DEBUG_DRIVER("Illum is not supported\n");
	295	asle_stat \|= ASLE_ALS_ILLUM_FAILED;
	296	}
	297
	298	if (asle_req & ASLE_SET_BACKLIGHT)
	299	asle_stat \|= asle_set_backlight_ironlake(dev, asle->bclp);
	300
	301	if (asle_req & ASLE_SET_PFIT) {
	302	DRM_DEBUG_DRIVER("Pfit is not supported\n");
	303	asle_stat \|= ASLE_PFIT_FAILED;
	304	}
	305
	306	if (asle_req & ASLE_SET_PWM_FREQ) {
	307	DRM_DEBUG_DRIVER("PWM freq is not supported\n");
	308	asle_stat \|= ASLE_PWM_FREQ_FAILED;
	309	}
310
311	asle->aslc = asle_stat;
312	}
8ee1c3db MG	313	#define ASLE_ALS_EN (1<<0)
	314	#define ASLE_BLC_EN (1<<1)
	315	#define ASLE_PFIT_EN (1<<2)
	316	#define ASLE_PFMB_EN (1<<3)
	317
	318	void opregion_enable_asle(struct drm_device *dev)
	319	{
	320	struct drm_i915_private *dev_priv = dev->dev_private;
	321	struct opregion_asle *asle = dev_priv->opregion.asle;
	322
	323	if (asle) {
8ee1c3db	324	if (IS_MOBILE(dev)) {
7c463586 KP	325	unsigned long irqflags;
	326
	327	spin_lock_irqsave(&dev_priv->user_irq_lock, irqflags);
01c66889	328	intel_enable_asle(dev);
7c463586 KP	329	spin_unlock_irqrestore(&dev_priv->user_irq_lock,
	330	irqflags);
	331	}
8ee1c3db MG	332
	333	asle->tche = ASLE_ALS_EN \| ASLE_BLC_EN \| ASLE_PFIT_EN \|
	334	ASLE_PFMB_EN;
	335	asle->ardy = 1;
	336	}
	337	}
	338
	339	#define ACPI_EV_DISPLAY_SWITCH (1<<0)
	340	#define ACPI_EV_LID (1<<1)
	341	#define ACPI_EV_DOCK (1<<2)
	342
	343	static struct intel_opregion *system_opregion;
	344
b358d0a6 HE	345	static int intel_opregion_video_event(struct notifier_block *nb,
b358d0a6 HE	346	unsigned long val, void *data)
8ee1c3db MG	347	{
	348	/* The only video events relevant to opregion are 0x80. These indicate
	349	either a docking event, lid switch or display switch request. In
	350	Linux, these are handled by the dock, button and video drivers.
	351	We might want to fix the video driver to be opregion-aware in
	352	future, but right now we just indicate to the firmware that the
	353	request has been handled */
	354
	355	struct opregion_acpi *acpi;
	356
	357	if (!system_opregion)
	358	return NOTIFY_DONE;
	359
	360	acpi = system_opregion->acpi;
	361	acpi->csts = 0;
	362
	363	return NOTIFY_OK;
	364	}
	365
	366	static struct notifier_block intel_opregion_notifier = {
	367	.notifier_call = intel_opregion_video_event,
	368	};
	369
74a365b3 MG	370	/*
	371	* Initialise the DIDL field in opregion. This passes a list of devices to
	372	* the firmware. Values are defined by section B.4.2 of the ACPI specification
	373	* (version 3)
	374	*/
	375
	376	static void intel_didl_outputs(struct drm_device *dev)
	377	{
	378	struct drm_i915_private *dev_priv = dev->dev_private;
	379	struct intel_opregion *opregion = &dev_priv->opregion;
	380	struct drm_connector *connector;
3143751f ZR	381	acpi_handle handle;
	382	struct acpi_device acpi_dev, acpi_cdev, *acpi_video_bus = NULL;
	383	unsigned long long device_id;
	384	acpi_status status;
74a365b3 MG	385	int i = 0;
74a365b3 MG	386
3143751f ZR	387	handle = DEVICE_ACPI_HANDLE(&dev->pdev->dev);
	388	if (!handle \|\| ACPI_FAILURE(acpi_bus_get_device(handle, &acpi_dev)))
	389	return;
	390
	391	if (acpi_is_video_device(acpi_dev))
	392	acpi_video_bus = acpi_dev;
	393	else {
	394	list_for_each_entry(acpi_cdev, &acpi_dev->children, node) {
	395	if (acpi_is_video_device(acpi_cdev)) {
	396	acpi_video_bus = acpi_cdev;
	397	break;
	398	}
	399	}
	400	}
	401
	402	if (!acpi_video_bus) {
	403	printk(KERN_WARNING "No ACPI video bus found\n");
	404	return;
	405	}
	406
	407	list_for_each_entry(acpi_cdev, &acpi_video_bus->children, node) {
	408	if (i >= 8) {
	409	dev_printk (KERN_ERR, &dev->pdev->dev,
	410	"More than 8 outputs detected\n");
	411	return;
	412	}
	413	status =
	414	acpi_evaluate_integer(acpi_cdev->handle, "_ADR",
	415	NULL, &device_id);
	416	if (ACPI_SUCCESS(status)) {
	417	if (!device_id)
	418	goto blind_set;
	419	opregion->acpi->didl[i] = (u32)(device_id & 0x0f0f);
	420	i++;
	421	}
	422	}
	423
	424	end:
	425	/* If fewer than 8 outputs, the list must be null terminated */
	426	if (i < 8)
	427	opregion->acpi->didl[i] = 0;
	428	return;
	429
	430	blind_set:
	431	i = 0;
74a365b3 MG	432	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
	433	int output_type = ACPI_OTHER_OUTPUT;
	434	if (i >= 8) {
	435	dev_printk (KERN_ERR, &dev->pdev->dev,
	436	"More than 8 outputs detected\n");
	437	return;
	438	}
	439	switch (connector->connector_type) {
	440	case DRM_MODE_CONNECTOR_VGA:
	441	case DRM_MODE_CONNECTOR_DVIA:
	442	output_type = ACPI_VGA_OUTPUT;
	443	break;
	444	case DRM_MODE_CONNECTOR_Composite:
	445	case DRM_MODE_CONNECTOR_SVIDEO:
	446	case DRM_MODE_CONNECTOR_Component:
	447	case DRM_MODE_CONNECTOR_9PinDIN:
	448	output_type = ACPI_TV_OUTPUT;
	449	break;
	450	case DRM_MODE_CONNECTOR_DVII:
	451	case DRM_MODE_CONNECTOR_DVID:
	452	case DRM_MODE_CONNECTOR_DisplayPort:
	453	case DRM_MODE_CONNECTOR_HDMIA:
	454	case DRM_MODE_CONNECTOR_HDMIB:
	455	output_type = ACPI_DIGITAL_OUTPUT;
	456	break;
	457	case DRM_MODE_CONNECTOR_LVDS:
	458	output_type = ACPI_LVDS_OUTPUT;
	459	break;
	460	}
	461	opregion->acpi->didl[i] \|= (1<<31) \| output_type \| i;
	462	i++;
	463	}
3143751f	464	goto end;
74a365b3 MG	465	}
	466
	467	int intel_opregion_init(struct drm_device *dev, int resume)
8ee1c3db MG	468	{
	469	struct drm_i915_private *dev_priv = dev->dev_private;
	470	struct intel_opregion *opregion = &dev_priv->opregion;
	471	void *base;
	472	u32 asls, mboxes;
	473	int err = 0;
	474
	475	pci_read_config_dword(dev->pdev, PCI_ASLS, &asls);
44d98a61	476	DRM_DEBUG_DRIVER("graphic opregion physical addr: 0x%x\n", asls);
8ee1c3db	477	if (asls == 0) {
44d98a61	478	DRM_DEBUG_DRIVER("ACPI OpRegion not supported!\n");
8ee1c3db MG	479	return -ENOTSUPP;
	480	}
	481
	482	base = ioremap(asls, OPREGION_SZ);
	483	if (!base)
	484	return -ENOMEM;
	485
	486	opregion->header = base;
	487	if (memcmp(opregion->header->signature, OPREGION_SIGNATURE, 16)) {
44d98a61	488	DRM_DEBUG_DRIVER("opregion signature mismatch\n");
8ee1c3db MG	489	err = -EINVAL;
	490	goto err_out;
	491	}
	492
	493	mboxes = opregion->header->mboxes;
	494	if (mboxes & MBOX_ACPI) {
44d98a61	495	DRM_DEBUG_DRIVER("Public ACPI methods supported\n");
8ee1c3db	496	opregion->acpi = base + OPREGION_ACPI_OFFSET;
d770e3cf	497	if (drm_core_check_feature(dev, DRIVER_MODESET))
74a365b3	498	intel_didl_outputs(dev);
8ee1c3db	499	} else {
44d98a61	500	DRM_DEBUG_DRIVER("Public ACPI methods not supported\n");
8ee1c3db MG	501	err = -ENOTSUPP;
	502	goto err_out;
	503	}
	504	opregion->enabled = 1;
	505
	506	if (mboxes & MBOX_SWSCI) {
44d98a61	507	DRM_DEBUG_DRIVER("SWSCI supported\n");
8ee1c3db MG	508	opregion->swsci = base + OPREGION_SWSCI_OFFSET;
	509	}
	510	if (mboxes & MBOX_ASLE) {
44d98a61	511	DRM_DEBUG_DRIVER("ASLE supported\n");
8ee1c3db	512	opregion->asle = base + OPREGION_ASLE_OFFSET;
44ab4315	513	opregion_enable_asle(dev);
8ee1c3db MG	514	}
8ee1c3db MG	515
d770e3cf MG	516	if (!resume)
	517	acpi_video_register();
	518
	519
8ee1c3db MG	520	/* Notify BIOS we are ready to handle ACPI video ext notifs.
	521	* Right now, all the events are handled by the ACPI video module.
	522	* We don't actually need to do anything with them. */
	523	opregion->acpi->csts = 0;
	524	opregion->acpi->drdy = 1;
	525
	526	system_opregion = opregion;
	527	register_acpi_notifier(&intel_opregion_notifier);
	528
	529	return 0;
	530
	531	err_out:
	532	iounmap(opregion->header);
	533	opregion->header = NULL;
54b9b308	534	acpi_video_register();
8ee1c3db MG	535	return err;
	536	}
	537
3b1c1c11	538	void intel_opregion_free(struct drm_device *dev, int suspend)
8ee1c3db MG	539	{
	540	struct drm_i915_private *dev_priv = dev->dev_private;
	541	struct intel_opregion *opregion = &dev_priv->opregion;
	542
	543	if (!opregion->enabled)
	544	return;
	545
3b1c1c11	546	if (!suspend)
86e437f0	547	acpi_video_unregister();
3b1c1c11	548
8ee1c3db MG	549	opregion->acpi->drdy = 0;
	550
	551	system_opregion = NULL;
	552	unregister_acpi_notifier(&intel_opregion_notifier);
	553
	554	/* just clear all opregion memory pointers now */
	555	iounmap(opregion->header);
	556	opregion->header = NULL;
	557	opregion->acpi = NULL;
	558	opregion->swsci = NULL;
	559	opregion->asle = NULL;
	560
	561	opregion->enabled = 0;
	562	}