]> bbs.cooldavid.org Git - net-next-2.6.git/blame - drivers/gpu/drm/i915/dvo_sil164.c
Merge branch 'core-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[net-next-2.6.git] / drivers / gpu / drm / i915 / dvo_sil164.c
CommitLineData
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1/**************************************************************************
2
3Copyright © 2006 Dave Airlie
4
5All Rights Reserved.
6
7Permission is hereby granted, free of charge, to any person obtaining a
8copy of this software and associated documentation files (the
9"Software"), to deal in the Software without restriction, including
10without limitation the rights to use, copy, modify, merge, publish,
11distribute, sub license, and/or sell copies of the Software, and to
12permit persons to whom the Software is furnished to do so, subject to
13the following conditions:
14
15The above copyright notice and this permission notice (including the
16next paragraph) shall be included in all copies or substantial portions
17of the Software.
18
19THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
23ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26
27**************************************************************************/
28
29#include "dvo.h"
30
31#define SIL164_VID 0x0001
32#define SIL164_DID 0x0006
33
34#define SIL164_VID_LO 0x00
35#define SIL164_VID_HI 0x01
36#define SIL164_DID_LO 0x02
37#define SIL164_DID_HI 0x03
38#define SIL164_REV 0x04
39#define SIL164_RSVD 0x05
40#define SIL164_FREQ_LO 0x06
41#define SIL164_FREQ_HI 0x07
42
43#define SIL164_REG8 0x08
44#define SIL164_8_VEN (1<<5)
45#define SIL164_8_HEN (1<<4)
46#define SIL164_8_DSEL (1<<3)
47#define SIL164_8_BSEL (1<<2)
48#define SIL164_8_EDGE (1<<1)
49#define SIL164_8_PD (1<<0)
50
51#define SIL164_REG9 0x09
52#define SIL164_9_VLOW (1<<7)
53#define SIL164_9_MSEL_MASK (0x7<<4)
54#define SIL164_9_TSEL (1<<3)
55#define SIL164_9_RSEN (1<<2)
56#define SIL164_9_HTPLG (1<<1)
57#define SIL164_9_MDI (1<<0)
58
59#define SIL164_REGC 0x0c
60
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61struct sil164_priv {
62 //I2CDevRec d;
63 bool quiet;
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64};
65
66#define SILPTR(d) ((SIL164Ptr)(d->DriverPrivate.ptr))
67
68static bool sil164_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
69{
70 struct sil164_priv *sil = dvo->dev_priv;
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71 struct i2c_adapter *adapter = dvo->i2c_bus;
72 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
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73 u8 out_buf[2];
74 u8 in_buf[2];
75
76 struct i2c_msg msgs[] = {
77 {
f9c10a9b 78 .addr = dvo->slave_addr,
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79 .flags = 0,
80 .len = 1,
81 .buf = out_buf,
82 },
83 {
f9c10a9b 84 .addr = dvo->slave_addr,
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85 .flags = I2C_M_RD,
86 .len = 1,
87 .buf = in_buf,
88 }
89 };
90
91 out_buf[0] = addr;
92 out_buf[1] = 0;
93
94 if (i2c_transfer(&i2cbus->adapter, msgs, 2) == 2) {
95 *ch = in_buf[0];
96 return true;
97 };
98
99 if (!sil->quiet) {
d0c3b04a 100 DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
f9c10a9b 101 addr, i2cbus->adapter.name, dvo->slave_addr);
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102 }
103 return false;
104}
105
106static bool sil164_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
107{
108 struct sil164_priv *sil= dvo->dev_priv;
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109 struct i2c_adapter *adapter = dvo->i2c_bus;
110 struct intel_i2c_chan *i2cbus = container_of(adapter, struct intel_i2c_chan, adapter);
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111 uint8_t out_buf[2];
112 struct i2c_msg msg = {
f9c10a9b 113 .addr = dvo->slave_addr,
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114 .flags = 0,
115 .len = 2,
116 .buf = out_buf,
117 };
118
119 out_buf[0] = addr;
120 out_buf[1] = ch;
121
122 if (i2c_transfer(&i2cbus->adapter, &msg, 1) == 1)
123 return true;
124
125 if (!sil->quiet) {
d0c3b04a 126 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
f9c10a9b 127 addr, i2cbus->adapter.name, dvo->slave_addr);
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128 }
129
130 return false;
131}
132
133/* Silicon Image 164 driver for chip on i2c bus */
134static bool sil164_init(struct intel_dvo_device *dvo,
f9c10a9b 135 struct i2c_adapter *adapter)
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136{
137 /* this will detect the SIL164 chip on the specified i2c bus */
138 struct sil164_priv *sil;
139 unsigned char ch;
140
141 sil = kzalloc(sizeof(struct sil164_priv), GFP_KERNEL);
142 if (sil == NULL)
143 return false;
144
f9c10a9b 145 dvo->i2c_bus = adapter;
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146 dvo->dev_priv = sil;
147 sil->quiet = true;
148
149 if (!sil164_readb(dvo, SIL164_VID_LO, &ch))
150 goto out;
151
152 if (ch != (SIL164_VID & 0xff)) {
d0c3b04a 153 DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
f9c10a9b 154 ch, adapter->name, dvo->slave_addr);
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155 goto out;
156 }
157
158 if (!sil164_readb(dvo, SIL164_DID_LO, &ch))
159 goto out;
160
161 if (ch != (SIL164_DID & 0xff)) {
d0c3b04a 162 DRM_DEBUG_KMS("sil164 not detected got %d: from %s Slave %d.\n",
f9c10a9b 163 ch, adapter->name, dvo->slave_addr);
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164 goto out;
165 }
166 sil->quiet = false;
167
d0c3b04a 168 DRM_DEBUG_KMS("init sil164 dvo controller successfully!\n");
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169 return true;
170
171out:
172 kfree(sil);
173 return false;
174}
175
176static enum drm_connector_status sil164_detect(struct intel_dvo_device *dvo)
177{
178 uint8_t reg9;
179
180 sil164_readb(dvo, SIL164_REG9, &reg9);
181
182 if (reg9 & SIL164_9_HTPLG)
183 return connector_status_connected;
184 else
185 return connector_status_disconnected;
186}
187
188static enum drm_mode_status sil164_mode_valid(struct intel_dvo_device *dvo,
189 struct drm_display_mode *mode)
190{
191 return MODE_OK;
192}
193
194static void sil164_mode_set(struct intel_dvo_device *dvo,
195 struct drm_display_mode *mode,
196 struct drm_display_mode *adjusted_mode)
197{
198 /* As long as the basics are set up, since we don't have clock
199 * dependencies in the mode setup, we can just leave the
200 * registers alone and everything will work fine.
201 */
202 /* recommended programming sequence from doc */
203 /*sil164_writeb(sil, 0x08, 0x30);
204 sil164_writeb(sil, 0x09, 0x00);
205 sil164_writeb(sil, 0x0a, 0x90);
206 sil164_writeb(sil, 0x0c, 0x89);
207 sil164_writeb(sil, 0x08, 0x31);*/
208 /* don't do much */
209 return;
210}
211
212/* set the SIL164 power state */
213static void sil164_dpms(struct intel_dvo_device *dvo, int mode)
214{
215 int ret;
216 unsigned char ch;
217
218 ret = sil164_readb(dvo, SIL164_REG8, &ch);
219 if (ret == false)
220 return;
221
222 if (mode == DRM_MODE_DPMS_ON)
223 ch |= SIL164_8_PD;
224 else
225 ch &= ~SIL164_8_PD;
226
227 sil164_writeb(dvo, SIL164_REG8, ch);
228 return;
229}
230
231static void sil164_dump_regs(struct intel_dvo_device *dvo)
232{
233 uint8_t val;
234
235 sil164_readb(dvo, SIL164_FREQ_LO, &val);
d0c3b04a 236 DRM_LOG_KMS("SIL164_FREQ_LO: 0x%02x\n", val);
79e53945 237 sil164_readb(dvo, SIL164_FREQ_HI, &val);
d0c3b04a 238 DRM_LOG_KMS("SIL164_FREQ_HI: 0x%02x\n", val);
79e53945 239 sil164_readb(dvo, SIL164_REG8, &val);
d0c3b04a 240 DRM_LOG_KMS("SIL164_REG8: 0x%02x\n", val);
79e53945 241 sil164_readb(dvo, SIL164_REG9, &val);
d0c3b04a 242 DRM_LOG_KMS("SIL164_REG9: 0x%02x\n", val);
79e53945 243 sil164_readb(dvo, SIL164_REGC, &val);
d0c3b04a 244 DRM_LOG_KMS("SIL164_REGC: 0x%02x\n", val);
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245}
246
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247static void sil164_destroy(struct intel_dvo_device *dvo)
248{
249 struct sil164_priv *sil = dvo->dev_priv;
250
251 if (sil) {
252 kfree(sil);
253 dvo->dev_priv = NULL;
254 }
255}
256
257struct intel_dvo_dev_ops sil164_ops = {
258 .init = sil164_init,
259 .detect = sil164_detect,
260 .mode_valid = sil164_mode_valid,
261 .mode_set = sil164_mode_set,
262 .dpms = sil164_dpms,
263 .dump_regs = sil164_dump_regs,
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264 .destroy = sil164_destroy,
265};