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Merge remote branch 'nouveau/for-airlied' of /ssd/git/drm-nouveau-next into drm-fixes
[net-next-2.6.git] / drivers / gpu / drm / i810 / i810_dma.c
CommitLineData
1da177e4
LT		 1/* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 *
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 *
31 */
32
33#include "drmP.h"
34#include "drm.h"
35#include "i810_drm.h"
36#include "i810_drv.h"
37#include <linux/interrupt.h> /* For task queue support */
38#include <linux/delay.h>
5a0e3ad6 39#include <linux/slab.h>
58374713 40#include <linux/smp_lock.h>
1da177e4
LT		 41#include <linux/pagemap.h>
42
43#define I810_BUF_FREE 2
44#define I810_BUF_CLIENT 1
bc5f4523 45#define I810_BUF_HARDWARE 0
1da177e4
LT		 46
47#define I810_BUF_UNMAPPED 0
48#define I810_BUF_MAPPED 1
49
056219e2 50static struct drm_buf *i810_freelist_get(struct drm_device * dev)
1da177e4 51{
cdd55a29 52 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA		 53 int i;
54 int used;
1da177e4
LT		 55
56 /* Linear search might not be the best solution */
57
b5e89ed5 58 for (i = 0; i < dma->buf_count; i++) {
056219e2 59 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 60 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4 61 /* In use is already a pointer */
b5e89ed5 62 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
1da177e4 63 I810_BUF_CLIENT);
aca791c2 64 if (used == I810_BUF_FREE)
1da177e4 65 return buf;
1da177e4 66 }
b5e89ed5 67 return NULL;
1da177e4
LT		 68}
69
70/* This should only be called if the buffer is not sent to the hardware
71 * yet, the hardware updates in use for us once its on the ring buffer.
72 */
73
aca791c2 74static int i810_freelist_put(struct drm_device *dev, struct drm_buf *buf)
1da177e4 75{
b5e89ed5
DA		 76 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
77 int used;
1da177e4 78
b5e89ed5
DA		 79 /* In use is already a pointer */
80 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
1da177e4 81 if (used != I810_BUF_CLIENT) {
b5e89ed5
DA		 82 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
83 return -EINVAL;
1da177e4
LT		 84 }
85
b5e89ed5 86 return 0;
1da177e4
LT		 87}
88
c94f7029 89static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
1da177e4 90{
eddca551
DA		 91 struct drm_file *priv = filp->private_data;
92 struct drm_device *dev;
b5e89ed5 93 drm_i810_private_t *dev_priv;
056219e2 94 struct drm_buf *buf;
1da177e4
LT		 95 drm_i810_buf_priv_t *buf_priv;
96
97 lock_kernel();
2c14f28b 98 dev = priv->minor->dev;
1da177e4 99 dev_priv = dev->dev_private;
b5e89ed5 100 buf = dev_priv->mmap_buffer;
1da177e4
LT		 101 buf_priv = buf->dev_private;
102
103 vma->vm_flags |= (VM_IO | VM_DONTCOPY);
104 vma->vm_file = filp;
105
b5e89ed5 106 buf_priv->currently_mapped = I810_BUF_MAPPED;
1da177e4
LT		 107 unlock_kernel();
108
109 if (io_remap_pfn_range(vma, vma->vm_start,
3d77461e 110 vma->vm_pgoff,
b5e89ed5
DA		 111 vma->vm_end - vma->vm_start, vma->vm_page_prot))
112 return -EAGAIN;
1da177e4
LT		 113 return 0;
114}
115
2b8693c0 116static const struct file_operations i810_buffer_fops = {
b5e89ed5 117 .open = drm_open,
c94f7029 118 .release = drm_release,
ed8b6704 119 .unlocked_ioctl = drm_ioctl,
b5e89ed5
DA		 120 .mmap = i810_mmap_buffers,
121 .fasync = drm_fasync,
c94f7029
DA		 122};
123
aca791c2 124static int i810_map_buffer(struct drm_buf *buf, struct drm_file *file_priv)
1da177e4 125{
2c14f28b 126 struct drm_device *dev = file_priv->minor->dev;
1da177e4 127 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
b5e89ed5 128 drm_i810_private_t *dev_priv = dev->dev_private;
99ac48f5 129 const struct file_operations *old_fops;
1da177e4
LT		 130 int retcode = 0;
131
b5e89ed5 132 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
1da177e4
LT		 133 return -EINVAL;
134
b5e89ed5 135 down_write(&current->mm->mmap_sem);
6c340eac
EA		 136 old_fops = file_priv->filp->f_op;
137 file_priv->filp->f_op = &i810_buffer_fops;
1da177e4 138 dev_priv->mmap_buffer = buf;
6c340eac 139 buf_priv->virtual = (void *)do_mmap(file_priv->filp, 0, buf->total,
b5e89ed5
DA		 140 PROT_READ | PROT_WRITE,
141 MAP_SHARED, buf->bus_address);
1da177e4 142 dev_priv->mmap_buffer = NULL;
6c340eac 143 file_priv->filp->f_op = old_fops;
c7aed179 144 if (IS_ERR(buf_priv->virtual)) {
1da177e4
LT		 145 /* Real error */
146 DRM_ERROR("mmap error\n");
c7aed179 147 retcode = PTR_ERR(buf_priv->virtual);
1da177e4
LT		 148 buf_priv->virtual = NULL;
149 }
b5e89ed5 150 up_write(&current->mm->mmap_sem);
1da177e4
LT		 151
152 return retcode;
153}
154
aca791c2 155static int i810_unmap_buffer(struct drm_buf *buf)
1da177e4
LT		 156{
157 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
158 int retcode = 0;
159
160 if (buf_priv->currently_mapped != I810_BUF_MAPPED)
161 return -EINVAL;
162
163 down_write(&current->mm->mmap_sem);
164 retcode = do_munmap(current->mm,
165 (unsigned long)buf_priv->virtual,
166 (size_t) buf->total);
167 up_write(&current->mm->mmap_sem);
168
b5e89ed5
DA		 169 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
170 buf_priv->virtual = NULL;
1da177e4
LT		 171
172 return retcode;
173}
174
aca791c2 175static int i810_dma_get_buffer(struct drm_device *dev, drm_i810_dma_t *d,
6c340eac 176 struct drm_file *file_priv)
1da177e4 177{
056219e2 178 struct drm_buf *buf;
1da177e4
LT		 179 drm_i810_buf_priv_t *buf_priv;
180 int retcode = 0;
181
182 buf = i810_freelist_get(dev);
183 if (!buf) {
184 retcode = -ENOMEM;
b5e89ed5 185 DRM_DEBUG("retcode=%d\n", retcode);
1da177e4
LT		 186 return retcode;
187 }
188
6c340eac 189 retcode = i810_map_buffer(buf, file_priv);
1da177e4
LT		 190 if (retcode) {
191 i810_freelist_put(dev, buf);
b5e89ed5 192 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
1da177e4
LT		 193 return retcode;
194 }
6c340eac 195 buf->file_priv = file_priv;
1da177e4
LT		 196 buf_priv = buf->dev_private;
197 d->granted = 1;
b5e89ed5
DA		 198 d->request_idx = buf->idx;
199 d->request_size = buf->total;
200 d->virtual = buf_priv->virtual;
1da177e4
LT		 201
202 return retcode;
203}
204
aca791c2 205static int i810_dma_cleanup(struct drm_device *dev)
1da177e4 206{
cdd55a29 207 struct drm_device_dma *dma = dev->dma;
1da177e4
LT		 208
209 /* Make sure interrupts are disabled here because the uninstall ioctl
210 * may not have been called from userspace and after dev_private
211 * is freed, it's too late.
212 */
213 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
214 drm_irq_uninstall(dev);
215
216 if (dev->dev_private) {
217 int i;
b5e89ed5
DA		 218 drm_i810_private_t *dev_priv =
219 (drm_i810_private_t *) dev->dev_private;
1da177e4 220
aca791c2 221 if (dev_priv->ring.virtual_start)
b9094d3a 222 drm_core_ioremapfree(&dev_priv->ring.map, dev);
b5e89ed5
DA		 223 if (dev_priv->hw_status_page) {
224 pci_free_consistent(dev->pdev, PAGE_SIZE,
1da177e4
LT		 225 dev_priv->hw_status_page,
226 dev_priv->dma_status_page);
b5e89ed5
DA		 227 /* Need to rewrite hardware status page */
228 I810_WRITE(0x02080, 0x1ffff000);
1da177e4 229 }
9a298b2a 230 kfree(dev->dev_private);
b5e89ed5 231 dev->dev_private = NULL;
1da177e4
LT		 232
233 for (i = 0; i < dma->buf_count; i++) {
056219e2 234 struct drm_buf *buf = dma->buflist[i];
1da177e4 235 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
b9094d3a 236
b5e89ed5 237 if (buf_priv->kernel_virtual && buf->total)
b9094d3a 238 drm_core_ioremapfree(&buf_priv->map, dev);
1da177e4
LT		 239 }
240 }
b5e89ed5 241 return 0;
1da177e4
LT		 242}
243
aca791c2 244static int i810_wait_ring(struct drm_device *dev, int n)
1da177e4 245{
b5e89ed5
DA		 246 drm_i810_private_t *dev_priv = dev->dev_private;
247 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
248 int iters = 0;
249 unsigned long end;
1da177e4
LT		 250 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
251
b5e89ed5
DA		 252 end = jiffies + (HZ * 3);
253 while (ring->space < n) {
254 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
255 ring->space = ring->head - (ring->tail + 8);
256 if (ring->space < 0)
257 ring->space += ring->Size;
258
1da177e4 259 if (ring->head != last_head) {
b5e89ed5 260 end = jiffies + (HZ * 3);
1da177e4
LT		 261 last_head = ring->head;
262 }
b5e89ed5
DA		 263
264 iters++;
1da177e4 265 if (time_before(end, jiffies)) {
b5e89ed5
DA		 266 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
267 DRM_ERROR("lockup\n");
268 goto out_wait_ring;
1da177e4
LT		 269 }
270 udelay(1);
271 }
272
aca791c2 273out_wait_ring:
b5e89ed5 274 return iters;
1da177e4
LT		 275}
276
aca791c2 277static void i810_kernel_lost_context(struct drm_device *dev)
1da177e4 278{
b5e89ed5
DA		 279 drm_i810_private_t *dev_priv = dev->dev_private;
280 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
1da177e4 281
b5e89ed5
DA		 282 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
283 ring->tail = I810_READ(LP_RING + RING_TAIL);
284 ring->space = ring->head - (ring->tail + 8);
285 if (ring->space < 0)
286 ring->space += ring->Size;
1da177e4
LT		 287}
288
aca791c2 289static int i810_freelist_init(struct drm_device *dev, drm_i810_private_t *dev_priv)
1da177e4 290{
cdd55a29 291 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA		 292 int my_idx = 24;
293 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
294 int i;
1da177e4
LT		 295
296 if (dma->buf_count > 1019) {
b5e89ed5
DA		 297 /* Not enough space in the status page for the freelist */
298 return -EINVAL;
1da177e4
LT		 299 }
300
b5e89ed5 301 for (i = 0; i < dma->buf_count; i++) {
056219e2 302 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 303 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4 304
b5e89ed5
DA		 305 buf_priv->in_use = hw_status++;
306 buf_priv->my_use_idx = my_idx;
307 my_idx += 4;
1da177e4 308
b5e89ed5 309 *buf_priv->in_use = I810_BUF_FREE;
1da177e4 310
b9094d3a
DA		 311 buf_priv->map.offset = buf->bus_address;
312 buf_priv->map.size = buf->total;
313 buf_priv->map.type = _DRM_AGP;
314 buf_priv->map.flags = 0;
315 buf_priv->map.mtrr = 0;
316
317 drm_core_ioremap(&buf_priv->map, dev);
318 buf_priv->kernel_virtual = buf_priv->map.handle;
319
1da177e4
LT		 320 }
321 return 0;
322}
323
aca791c2
NK		 324static int i810_dma_initialize(struct drm_device *dev,
325 drm_i810_private_t *dev_priv,
326 drm_i810_init_t *init)
1da177e4 327{
55910517 328 struct drm_map_list *r_list;
b5e89ed5 329 memset(dev_priv, 0, sizeof(drm_i810_private_t));
1da177e4 330
bd1b331f 331 list_for_each_entry(r_list, &dev->maplist, head) {
1da177e4
LT		 332 if (r_list->map &&
333 r_list->map->type == _DRM_SHM &&
b5e89ed5 334 r_list->map->flags & _DRM_CONTAINS_LOCK) {
1da177e4 335 dev_priv->sarea_map = r_list->map;
b5e89ed5
DA		 336 break;
337 }
338 }
1da177e4
LT		 339 if (!dev_priv->sarea_map) {
340 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA		 341 i810_dma_cleanup(dev);
342 DRM_ERROR("can not find sarea!\n");
343 return -EINVAL;
1da177e4
LT		 344 }
345 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
346 if (!dev_priv->mmio_map) {
347 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA		 348 i810_dma_cleanup(dev);
349 DRM_ERROR("can not find mmio map!\n");
350 return -EINVAL;
1da177e4 351 }
d1f2b55a 352 dev->agp_buffer_token = init->buffers_offset;
1da177e4
LT		 353 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
354 if (!dev->agp_buffer_map) {
355 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA		 356 i810_dma_cleanup(dev);
357 DRM_ERROR("can not find dma buffer map!\n");
358 return -EINVAL;
1da177e4
LT		 359 }
360
361 dev_priv->sarea_priv = (drm_i810_sarea_t *)
b5e89ed5 362 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
1da177e4 363
b5e89ed5
DA		 364 dev_priv->ring.Start = init->ring_start;
365 dev_priv->ring.End = init->ring_end;
366 dev_priv->ring.Size = init->ring_size;
1da177e4 367
b9094d3a
DA		 368 dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
369 dev_priv->ring.map.size = init->ring_size;
370 dev_priv->ring.map.type = _DRM_AGP;
371 dev_priv->ring.map.flags = 0;
372 dev_priv->ring.map.mtrr = 0;
1da177e4 373
b9094d3a
DA		 374 drm_core_ioremap(&dev_priv->ring.map, dev);
375
376 if (dev_priv->ring.map.handle == NULL) {
b5e89ed5
DA		 377 dev->dev_private = (void *)dev_priv;
378 i810_dma_cleanup(dev);
379 DRM_ERROR("can not ioremap virtual address for"
1da177e4 380 " ring buffer\n");
20caafa6 381 return -ENOMEM;
1da177e4
LT		 382 }
383
b9094d3a
DA		 384 dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
385
b5e89ed5 386 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
1da177e4
LT		 387
388 dev_priv->w = init->w;
389 dev_priv->h = init->h;
390 dev_priv->pitch = init->pitch;
391 dev_priv->back_offset = init->back_offset;
392 dev_priv->depth_offset = init->depth_offset;
393 dev_priv->front_offset = init->front_offset;
394
395 dev_priv->overlay_offset = init->overlay_offset;
396 dev_priv->overlay_physical = init->overlay_physical;
397
398 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
399 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
400 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
401
b5e89ed5
DA		 402 /* Program Hardware Status Page */
403 dev_priv->hw_status_page =
404 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
405 &dev_priv->dma_status_page);
406 if (!dev_priv->hw_status_page) {
1da177e4
LT		 407 dev->dev_private = (void *)dev_priv;
408 i810_dma_cleanup(dev);
409 DRM_ERROR("Can not allocate hardware status page\n");
410 return -ENOMEM;
411 }
b5e89ed5
DA		 412 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
413 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
1da177e4
LT		 414
415 I810_WRITE(0x02080, dev_priv->dma_status_page);
b5e89ed5 416 DRM_DEBUG("Enabled hardware status page\n");
1da177e4 417
b5e89ed5 418 /* Now we need to init our freelist */
1da177e4
LT		 419 if (i810_freelist_init(dev, dev_priv) != 0) {
420 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA		 421 i810_dma_cleanup(dev);
422 DRM_ERROR("Not enough space in the status page for"
1da177e4 423 " the freelist\n");
b5e89ed5 424 return -ENOMEM;
1da177e4
LT		 425 }
426 dev->dev_private = (void *)dev_priv;
427
b5e89ed5 428 return 0;
1da177e4
LT		 429}
430
c153f45f
EA		 431static int i810_dma_init(struct drm_device *dev, void *data,
432 struct drm_file *file_priv)
1da177e4 433{
b5e89ed5 434 drm_i810_private_t *dev_priv;
c153f45f 435 drm_i810_init_t *init = data;
b5e89ed5 436 int retcode = 0;
1da177e4 437
c153f45f 438 switch (init->func) {
b5e89ed5
DA		 439 case I810_INIT_DMA_1_4:
440 DRM_INFO("Using v1.4 init.\n");
9a298b2a 441 dev_priv = kmalloc(sizeof(drm_i810_private_t), GFP_KERNEL);
b5e89ed5
DA		 442 if (dev_priv == NULL)
443 return -ENOMEM;
c153f45f 444 retcode = i810_dma_initialize(dev, dev_priv, init);
b5e89ed5
DA		 445 break;
446
447 case I810_CLEANUP_DMA:
448 DRM_INFO("DMA Cleanup\n");
449 retcode = i810_dma_cleanup(dev);
450 break;
c153f45f
EA		 451 default:
452 return -EINVAL;
1da177e4
LT		 453 }
454
b5e89ed5 455 return retcode;
1da177e4
LT		 456}
457
1da177e4
LT		 458/* Most efficient way to verify state for the i810 is as it is
459 * emitted. Non-conformant state is silently dropped.
460 *
461 * Use 'volatile' & local var tmp to force the emitted values to be
462 * identical to the verified ones.
463 */
aca791c2 464static void i810EmitContextVerified(struct drm_device *dev,
b5e89ed5 465 volatile unsigned int *code)
1da177e4 466{
b5e89ed5 467 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT		 468 int i, j = 0;
469 unsigned int tmp;
470 RING_LOCALS;
471
b5e89ed5 472 BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
1da177e4 473
b5e89ed5
DA		 474 OUT_RING(GFX_OP_COLOR_FACTOR);
475 OUT_RING(code[I810_CTXREG_CF1]);
1da177e4 476
b5e89ed5
DA		 477 OUT_RING(GFX_OP_STIPPLE);
478 OUT_RING(code[I810_CTXREG_ST1]);
1da177e4 479
b5e89ed5 480 for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
1da177e4
LT		 481 tmp = code[i];
482
b5e89ed5
DA		 483 if ((tmp & (7 << 29)) == (3 << 29) &&
484 (tmp & (0x1f << 24)) < (0x1d << 24)) {
485 OUT_RING(tmp);
1da177e4 486 j++;
b5e89ed5
DA		 487 } else
488 printk("constext state dropped!!!\n");
1da177e4
LT		 489 }
490
491 if (j & 1)
b5e89ed5 492 OUT_RING(0);
1da177e4
LT		 493
494 ADVANCE_LP_RING();
495}
496
aca791c2 497static void i810EmitTexVerified(struct drm_device *dev, volatile unsigned int *code)
1da177e4 498{
b5e89ed5 499 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT		 500 int i, j = 0;
501 unsigned int tmp;
502 RING_LOCALS;
503
b5e89ed5 504 BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
1da177e4 505
b5e89ed5
DA		 506 OUT_RING(GFX_OP_MAP_INFO);
507 OUT_RING(code[I810_TEXREG_MI1]);
508 OUT_RING(code[I810_TEXREG_MI2]);
509 OUT_RING(code[I810_TEXREG_MI3]);
1da177e4 510
b5e89ed5 511 for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
1da177e4
LT		 512 tmp = code[i];
513
b5e89ed5
DA		 514 if ((tmp & (7 << 29)) == (3 << 29) &&
515 (tmp & (0x1f << 24)) < (0x1d << 24)) {
516 OUT_RING(tmp);
1da177e4 517 j++;
b5e89ed5
DA		 518 } else
519 printk("texture state dropped!!!\n");
1da177e4
LT		 520 }
521
522 if (j & 1)
b5e89ed5 523 OUT_RING(0);
1da177e4
LT		 524
525 ADVANCE_LP_RING();
526}
527
1da177e4
LT		 528/* Need to do some additional checking when setting the dest buffer.
529 */
aca791c2 530static void i810EmitDestVerified(struct drm_device *dev,
b5e89ed5 531 volatile unsigned int *code)
1da177e4 532{
b5e89ed5 533 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT		 534 unsigned int tmp;
535 RING_LOCALS;
536
b5e89ed5 537 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
1da177e4
LT		 538
539 tmp = code[I810_DESTREG_DI1];
540 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
b5e89ed5
DA		 541 OUT_RING(CMD_OP_DESTBUFFER_INFO);
542 OUT_RING(tmp);
1da177e4 543 } else
b5e89ed5
DA		 544 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
545 tmp, dev_priv->front_di1, dev_priv->back_di1);
1da177e4
LT		 546
547 /* invarient:
548 */
b5e89ed5
DA		 549 OUT_RING(CMD_OP_Z_BUFFER_INFO);
550 OUT_RING(dev_priv->zi1);
1da177e4 551
b5e89ed5
DA		 552 OUT_RING(GFX_OP_DESTBUFFER_VARS);
553 OUT_RING(code[I810_DESTREG_DV1]);
1da177e4 554
b5e89ed5
DA		 555 OUT_RING(GFX_OP_DRAWRECT_INFO);
556 OUT_RING(code[I810_DESTREG_DR1]);
557 OUT_RING(code[I810_DESTREG_DR2]);
558 OUT_RING(code[I810_DESTREG_DR3]);
559 OUT_RING(code[I810_DESTREG_DR4]);
560 OUT_RING(0);
1da177e4
LT		 561
562 ADVANCE_LP_RING();
563}
564
aca791c2 565static void i810EmitState(struct drm_device *dev)
1da177e4 566{
b5e89ed5
DA		 567 drm_i810_private_t *dev_priv = dev->dev_private;
568 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1da177e4 569 unsigned int dirty = sarea_priv->dirty;
b5e89ed5 570
3e684eae 571 DRM_DEBUG("%x\n", dirty);
1da177e4
LT		 572
573 if (dirty & I810_UPLOAD_BUFFERS) {
b5e89ed5 574 i810EmitDestVerified(dev, sarea_priv->BufferState);
1da177e4
LT		 575 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
576 }
577
578 if (dirty & I810_UPLOAD_CTX) {
b5e89ed5 579 i810EmitContextVerified(dev, sarea_priv->ContextState);
1da177e4
LT		 580 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
581 }
582
583 if (dirty & I810_UPLOAD_TEX0) {
b5e89ed5 584 i810EmitTexVerified(dev, sarea_priv->TexState[0]);
1da177e4
LT		 585 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
586 }
587
588 if (dirty & I810_UPLOAD_TEX1) {
b5e89ed5 589 i810EmitTexVerified(dev, sarea_priv->TexState[1]);
1da177e4
LT		 590 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
591 }
592}
593
1da177e4
LT		 594/* need to verify
595 */
aca791c2 596static void i810_dma_dispatch_clear(struct drm_device *dev, int flags,
b5e89ed5
DA		 597 unsigned int clear_color,
598 unsigned int clear_zval)
1da177e4 599{
b5e89ed5
DA		 600 drm_i810_private_t *dev_priv = dev->dev_private;
601 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1da177e4 602 int nbox = sarea_priv->nbox;
eddca551 603 struct drm_clip_rect *pbox = sarea_priv->boxes;
1da177e4
LT		 604 int pitch = dev_priv->pitch;
605 int cpp = 2;
606 int i;
607 RING_LOCALS;
b5e89ed5
DA		 608
609 if (dev_priv->current_page == 1) {
610 unsigned int tmp = flags;
611
1da177e4 612 flags &= ~(I810_FRONT | I810_BACK);
b5e89ed5
DA		 613 if (tmp & I810_FRONT)
614 flags |= I810_BACK;
615 if (tmp & I810_BACK)
616 flags |= I810_FRONT;
1da177e4
LT		 617 }
618
b5e89ed5 619 i810_kernel_lost_context(dev);
1da177e4 620
b5e89ed5
DA		 621 if (nbox > I810_NR_SAREA_CLIPRECTS)
622 nbox = I810_NR_SAREA_CLIPRECTS;
1da177e4 623
b5e89ed5 624 for (i = 0; i < nbox; i++, pbox++) {
1da177e4
LT		 625 unsigned int x = pbox->x1;
626 unsigned int y = pbox->y1;
627 unsigned int width = (pbox->x2 - x) * cpp;
628 unsigned int height = pbox->y2 - y;
629 unsigned int start = y * pitch + x * cpp;
630
631 if (pbox->x1 > pbox->x2 ||
632 pbox->y1 > pbox->y2 ||
b5e89ed5 633 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
1da177e4
LT		 634 continue;
635
b5e89ed5
DA		 636 if (flags & I810_FRONT) {
637 BEGIN_LP_RING(6);
638 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
639 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
640 OUT_RING((height << 16) | width);
641 OUT_RING(start);
642 OUT_RING(clear_color);
643 OUT_RING(0);
1da177e4
LT		 644 ADVANCE_LP_RING();
645 }
646
b5e89ed5
DA		 647 if (flags & I810_BACK) {
648 BEGIN_LP_RING(6);
649 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
650 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
651 OUT_RING((height << 16) | width);
652 OUT_RING(dev_priv->back_offset + start);
653 OUT_RING(clear_color);
654 OUT_RING(0);
1da177e4
LT		 655 ADVANCE_LP_RING();
656 }
657
b5e89ed5
DA		 658 if (flags & I810_DEPTH) {
659 BEGIN_LP_RING(6);
660 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
661 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
662 OUT_RING((height << 16) | width);
663 OUT_RING(dev_priv->depth_offset + start);
664 OUT_RING(clear_zval);
665 OUT_RING(0);
1da177e4
LT		 666 ADVANCE_LP_RING();
667 }
668 }
669}
670
aca791c2 671static void i810_dma_dispatch_swap(struct drm_device *dev)
1da177e4 672{
b5e89ed5
DA		 673 drm_i810_private_t *dev_priv = dev->dev_private;
674 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1da177e4 675 int nbox = sarea_priv->nbox;
eddca551 676 struct drm_clip_rect *pbox = sarea_priv->boxes;
1da177e4
LT		 677 int pitch = dev_priv->pitch;
678 int cpp = 2;
679 int i;
680 RING_LOCALS;
681
682 DRM_DEBUG("swapbuffers\n");
683
b5e89ed5 684 i810_kernel_lost_context(dev);
1da177e4 685
b5e89ed5
DA		 686 if (nbox > I810_NR_SAREA_CLIPRECTS)
687 nbox = I810_NR_SAREA_CLIPRECTS;
1da177e4 688
b5e89ed5 689 for (i = 0; i < nbox; i++, pbox++) {
1da177e4
LT		 690 unsigned int w = pbox->x2 - pbox->x1;
691 unsigned int h = pbox->y2 - pbox->y1;
b5e89ed5 692 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
1da177e4
LT		 693 unsigned int start = dst;
694
695 if (pbox->x1 > pbox->x2 ||
696 pbox->y1 > pbox->y2 ||
b5e89ed5 697 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
1da177e4
LT		 698 continue;
699
b5e89ed5
DA		 700 BEGIN_LP_RING(6);
701 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
702 OUT_RING(pitch | (0xCC << 16));
703 OUT_RING((h << 16) | (w * cpp));
1da177e4 704 if (dev_priv->current_page == 0)
b5e89ed5 705 OUT_RING(dev_priv->front_offset + start);
1da177e4 706 else
b5e89ed5
DA		 707 OUT_RING(dev_priv->back_offset + start);
708 OUT_RING(pitch);
1da177e4 709 if (dev_priv->current_page == 0)
b5e89ed5 710 OUT_RING(dev_priv->back_offset + start);
1da177e4 711 else
b5e89ed5 712 OUT_RING(dev_priv->front_offset + start);
1da177e4
LT		 713 ADVANCE_LP_RING();
714 }
715}
716
aca791c2
NK		 717static void i810_dma_dispatch_vertex(struct drm_device *dev,
718 struct drm_buf *buf, int discard, int used)
1da177e4 719{
b5e89ed5 720 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4 721 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
b5e89ed5 722 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
eddca551 723 struct drm_clip_rect *box = sarea_priv->boxes;
b5e89ed5 724 int nbox = sarea_priv->nbox;
1da177e4
LT		 725 unsigned long address = (unsigned long)buf->bus_address;
726 unsigned long start = address - dev->agp->base;
727 int i = 0;
b5e89ed5 728 RING_LOCALS;
1da177e4 729
b5e89ed5 730 i810_kernel_lost_context(dev);
1da177e4 731
b5e89ed5 732 if (nbox > I810_NR_SAREA_CLIPRECTS)
1da177e4
LT		 733 nbox = I810_NR_SAREA_CLIPRECTS;
734
b5e89ed5 735 if (used > 4 * 1024)
1da177e4
LT		 736 used = 0;
737
738 if (sarea_priv->dirty)
b5e89ed5 739 i810EmitState(dev);
1da177e4
LT		 740
741 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
742 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
743
b5e89ed5
DA		 744 *(u32 *) buf_priv->kernel_virtual =
745 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
1da177e4
LT		 746
747 if (used & 4) {
c7aed179 748 *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0;
1da177e4
LT		 749 used += 4;
750 }
751
752 i810_unmap_buffer(buf);
753 }
754
755 if (used) {
756 do {
757 if (i < nbox) {
758 BEGIN_LP_RING(4);
b5e89ed5
DA		 759 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
760 SC_ENABLE);
761 OUT_RING(GFX_OP_SCISSOR_INFO);
762 OUT_RING(box[i].x1 | (box[i].y1 << 16));
763 OUT_RING((box[i].x2 -
764 1) | ((box[i].y2 - 1) << 16));
1da177e4
LT		 765 ADVANCE_LP_RING();
766 }
767
768 BEGIN_LP_RING(4);
b5e89ed5
DA		 769 OUT_RING(CMD_OP_BATCH_BUFFER);
770 OUT_RING(start | BB1_PROTECTED);
771 OUT_RING(start + used - 4);
772 OUT_RING(0);
1da177e4
LT		 773 ADVANCE_LP_RING();
774
775 } while (++i < nbox);
776 }
777
778 if (discard) {
779 dev_priv->counter++;
780
b5e89ed5
DA		 781 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
782 I810_BUF_HARDWARE);
1da177e4
LT		 783
784 BEGIN_LP_RING(8);
b5e89ed5
DA		 785 OUT_RING(CMD_STORE_DWORD_IDX);
786 OUT_RING(20);
787 OUT_RING(dev_priv->counter);
788 OUT_RING(CMD_STORE_DWORD_IDX);
789 OUT_RING(buf_priv->my_use_idx);
790 OUT_RING(I810_BUF_FREE);
791 OUT_RING(CMD_REPORT_HEAD);
792 OUT_RING(0);
1da177e4
LT		 793 ADVANCE_LP_RING();
794 }
795}
796
aca791c2 797static void i810_dma_dispatch_flip(struct drm_device *dev)
1da177e4 798{
b5e89ed5 799 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT		 800 int pitch = dev_priv->pitch;
801 RING_LOCALS;
802
3e684eae 803 DRM_DEBUG("page=%d pfCurrentPage=%d\n",
b5e89ed5
DA		 804 dev_priv->current_page,
805 dev_priv->sarea_priv->pf_current_page);
806
807 i810_kernel_lost_context(dev);
1da177e4 808
b5e89ed5
DA		 809 BEGIN_LP_RING(2);
810 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
811 OUT_RING(0);
1da177e4
LT		 812 ADVANCE_LP_RING();
813
b5e89ed5 814 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
1da177e4
LT		 815 /* On i815 at least ASYNC is buggy */
816 /* pitch<<5 is from 11.2.8 p158,
817 its the pitch / 8 then left shifted 8,
818 so (pitch >> 3) << 8 */
b5e89ed5
DA		 819 OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
820 if (dev_priv->current_page == 0) {
821 OUT_RING(dev_priv->back_offset);
1da177e4
LT		 822 dev_priv->current_page = 1;
823 } else {
b5e89ed5 824 OUT_RING(dev_priv->front_offset);
1da177e4
LT		 825 dev_priv->current_page = 0;
826 }
827 OUT_RING(0);
828 ADVANCE_LP_RING();
829
830 BEGIN_LP_RING(2);
b5e89ed5
DA		 831 OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
832 OUT_RING(0);
1da177e4
LT		 833 ADVANCE_LP_RING();
834
835 /* Increment the frame counter. The client-side 3D driver must
836 * throttle the framerate by waiting for this value before
837 * performing the swapbuffer ioctl.
838 */
839 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
840
841}
842
aca791c2 843static void i810_dma_quiescent(struct drm_device *dev)
1da177e4 844{
b5e89ed5
DA		 845 drm_i810_private_t *dev_priv = dev->dev_private;
846 RING_LOCALS;
1da177e4 847
b5e89ed5 848 i810_kernel_lost_context(dev);
1da177e4 849
b5e89ed5
DA		 850 BEGIN_LP_RING(4);
851 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
852 OUT_RING(CMD_REPORT_HEAD);
853 OUT_RING(0);
854 OUT_RING(0);
855 ADVANCE_LP_RING();
1da177e4 856
b5e89ed5 857 i810_wait_ring(dev, dev_priv->ring.Size - 8);
1da177e4
LT		 858}
859
aca791c2 860static int i810_flush_queue(struct drm_device *dev)
1da177e4 861{
b5e89ed5 862 drm_i810_private_t *dev_priv = dev->dev_private;
cdd55a29 863 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA		 864 int i, ret = 0;
865 RING_LOCALS;
866
b5e89ed5 867 i810_kernel_lost_context(dev);
1da177e4 868
b5e89ed5
DA		 869 BEGIN_LP_RING(2);
870 OUT_RING(CMD_REPORT_HEAD);
871 OUT_RING(0);
872 ADVANCE_LP_RING();
1da177e4 873
b5e89ed5 874 i810_wait_ring(dev, dev_priv->ring.Size - 8);
1da177e4 875
b5e89ed5 876 for (i = 0; i < dma->buf_count; i++) {
056219e2 877 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 878 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4
LT		 879
880 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
881 I810_BUF_FREE);
882
883 if (used == I810_BUF_HARDWARE)
884 DRM_DEBUG("reclaimed from HARDWARE\n");
885 if (used == I810_BUF_CLIENT)
886 DRM_DEBUG("still on client\n");
887 }
888
b5e89ed5 889 return ret;
1da177e4
LT		 890}
891
892/* Must be called with the lock held */
aca791c2 893static void i810_reclaim_buffers(struct drm_device *dev,
6c340eac 894 struct drm_file *file_priv)
1da177e4 895{
cdd55a29 896 struct drm_device_dma *dma = dev->dma;
b5e89ed5 897 int i;
1da177e4 898
b5e89ed5
DA		 899 if (!dma)
900 return;
901 if (!dev->dev_private)
902 return;
903 if (!dma->buflist)
904 return;
1da177e4 905
b5e89ed5 906 i810_flush_queue(dev);
1da177e4
LT		 907
908 for (i = 0; i < dma->buf_count; i++) {
056219e2 909 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 910 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4 911
6c340eac 912 if (buf->file_priv == file_priv && buf_priv) {
1da177e4
LT		 913 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
914 I810_BUF_FREE);
915
916 if (used == I810_BUF_CLIENT)
917 DRM_DEBUG("reclaimed from client\n");
918 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
b5e89ed5 919 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
1da177e4
LT		 920 }
921 }
922}
923
c153f45f
EA		 924static int i810_flush_ioctl(struct drm_device *dev, void *data,
925 struct drm_file *file_priv)
1da177e4 926{
6c340eac 927 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 928
b5e89ed5
DA		 929 i810_flush_queue(dev);
930 return 0;
1da177e4
LT		 931}
932
c153f45f
EA		 933static int i810_dma_vertex(struct drm_device *dev, void *data,
934 struct drm_file *file_priv)
1da177e4 935{
cdd55a29 936 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA		 937 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
938 u32 *hw_status = dev_priv->hw_status_page;
939 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
940 dev_priv->sarea_priv;
c153f45f 941 drm_i810_vertex_t *vertex = data;
1da177e4 942
6c340eac 943 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 944
3e684eae 945 DRM_DEBUG("idx %d used %d discard %d\n",
c153f45f 946 vertex->idx, vertex->used, vertex->discard);
1da177e4 947
c153f45f 948 if (vertex->idx < 0 || vertex->idx > dma->buf_count)
1da177e4
LT		 949 return -EINVAL;
950
b5e89ed5 951 i810_dma_dispatch_vertex(dev,
c153f45f
EA		 952 dma->buflist[vertex->idx],
953 vertex->discard, vertex->used);
1da177e4 954
c153f45f 955 atomic_add(vertex->used, &dev->counts[_DRM_STAT_SECONDARY]);
1da177e4 956 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
b5e89ed5
DA		 957 sarea_priv->last_enqueue = dev_priv->counter - 1;
958 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT		 959
960 return 0;
961}
962
c153f45f
EA		 963static int i810_clear_bufs(struct drm_device *dev, void *data,
964 struct drm_file *file_priv)
1da177e4 965{
c153f45f 966 drm_i810_clear_t *clear = data;
1da177e4 967
6c340eac 968 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 969
b5e89ed5 970 /* GH: Someone's doing nasty things... */
aca791c2 971 if (!dev->dev_private)
b5e89ed5 972 return -EINVAL;
1da177e4 973
c153f45f
EA		 974 i810_dma_dispatch_clear(dev, clear->flags,
975 clear->clear_color, clear->clear_depth);
b5e89ed5 976 return 0;
1da177e4
LT		 977}
978
c153f45f
EA		 979static int i810_swap_bufs(struct drm_device *dev, void *data,
980 struct drm_file *file_priv)
1da177e4 981{
3e684eae 982 DRM_DEBUG("\n");
1da177e4 983
6c340eac 984 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 985
b5e89ed5
DA		 986 i810_dma_dispatch_swap(dev);
987 return 0;
1da177e4
LT		 988}
989
c153f45f
EA		 990static int i810_getage(struct drm_device *dev, void *data,
991 struct drm_file *file_priv)
1da177e4 992{
b5e89ed5
DA		 993 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
994 u32 *hw_status = dev_priv->hw_status_page;
995 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
996 dev_priv->sarea_priv;
997
998 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT		 999 return 0;
1000}
1001
c153f45f
EA		 1002static int i810_getbuf(struct drm_device *dev, void *data,
1003 struct drm_file *file_priv)
1da177e4 1004{
b5e89ed5 1005 int retcode = 0;
c153f45f 1006 drm_i810_dma_t *d = data;
b5e89ed5
DA		 1007 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1008 u32 *hw_status = dev_priv->hw_status_page;
1009 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1010 dev_priv->sarea_priv;
1011
6c340eac 1012 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1013
c153f45f 1014 d->granted = 0;
1da177e4 1015
c153f45f 1016 retcode = i810_dma_get_buffer(dev, d, file_priv);
1da177e4
LT		 1017
1018 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
ba25f9dc 1019 task_pid_nr(current), retcode, d->granted);
1da177e4 1020
b5e89ed5 1021 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT		 1022
1023 return retcode;
1024}
1025
c153f45f
EA		 1026static int i810_copybuf(struct drm_device *dev, void *data,
1027 struct drm_file *file_priv)
1da177e4
LT		 1028{
1029 /* Never copy - 2.4.x doesn't need it */
1030 return 0;
1031}
1032
c153f45f
EA		 1033static int i810_docopy(struct drm_device *dev, void *data,
1034 struct drm_file *file_priv)
1da177e4
LT		 1035{
1036 /* Never copy - 2.4.x doesn't need it */
1037 return 0;
1038}
1039
aca791c2 1040static void i810_dma_dispatch_mc(struct drm_device *dev, struct drm_buf *buf, int used,
b5e89ed5 1041 unsigned int last_render)
1da177e4
LT		 1042{
1043 drm_i810_private_t *dev_priv = dev->dev_private;
1044 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1045 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1046 unsigned long address = (unsigned long)buf->bus_address;
1047 unsigned long start = address - dev->agp->base;
1048 int u;
1049 RING_LOCALS;
1050
1051 i810_kernel_lost_context(dev);
1052
b5e89ed5 1053 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
aca791c2 1054 if (u != I810_BUF_CLIENT)
1da177e4 1055 DRM_DEBUG("MC found buffer that isn't mine!\n");
1da177e4 1056
b5e89ed5 1057 if (used > 4 * 1024)
1da177e4
LT		 1058 used = 0;
1059
1060 sarea_priv->dirty = 0x7f;
1061
3e684eae 1062 DRM_DEBUG("addr 0x%lx, used 0x%x\n", address, used);
1da177e4
LT		 1063
1064 dev_priv->counter++;
1065 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1da177e4
LT		 1066 DRM_DEBUG("start : %lx\n", start);
1067 DRM_DEBUG("used : %d\n", used);
1068 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1069
1070 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1071 if (used & 4) {
c7aed179 1072 *(u32 *) ((char *) buf_priv->virtual + used) = 0;
1da177e4
LT		 1073 used += 4;
1074 }
1075
1076 i810_unmap_buffer(buf);
1077 }
1078 BEGIN_LP_RING(4);
b5e89ed5
DA		 1079 OUT_RING(CMD_OP_BATCH_BUFFER);
1080 OUT_RING(start | BB1_PROTECTED);
1081 OUT_RING(start + used - 4);
1082 OUT_RING(0);
1da177e4
LT		 1083 ADVANCE_LP_RING();
1084
1da177e4 1085 BEGIN_LP_RING(8);
b5e89ed5
DA		 1086 OUT_RING(CMD_STORE_DWORD_IDX);
1087 OUT_RING(buf_priv->my_use_idx);
1088 OUT_RING(I810_BUF_FREE);
1089 OUT_RING(0);
1090
1091 OUT_RING(CMD_STORE_DWORD_IDX);
1092 OUT_RING(16);
1093 OUT_RING(last_render);
1094 OUT_RING(0);
1da177e4
LT		 1095 ADVANCE_LP_RING();
1096}
1097
c153f45f
EA		 1098static int i810_dma_mc(struct drm_device *dev, void *data,
1099 struct drm_file *file_priv)
1da177e4 1100{
cdd55a29 1101 struct drm_device_dma *dma = dev->dma;
b5e89ed5 1102 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4
LT		 1103 u32 *hw_status = dev_priv->hw_status_page;
1104 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
b5e89ed5 1105 dev_priv->sarea_priv;
c153f45f 1106 drm_i810_mc_t *mc = data;
1da177e4 1107
6c340eac 1108 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1109
c153f45f 1110 if (mc->idx >= dma->buf_count || mc->idx < 0)
1da177e4
LT		 1111 return -EINVAL;
1112
c153f45f
EA		 1113 i810_dma_dispatch_mc(dev, dma->buflist[mc->idx], mc->used,
1114 mc->last_render);
1da177e4 1115
c153f45f 1116 atomic_add(mc->used, &dev->counts[_DRM_STAT_SECONDARY]);
1da177e4 1117 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
b5e89ed5
DA		 1118 sarea_priv->last_enqueue = dev_priv->counter - 1;
1119 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT		 1120
1121 return 0;
1122}
1123
c153f45f
EA		 1124static int i810_rstatus(struct drm_device *dev, void *data,
1125 struct drm_file *file_priv)
1da177e4 1126{
b5e89ed5 1127 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4 1128
b5e89ed5 1129 return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1da177e4
LT		 1130}
1131
c153f45f
EA		 1132static int i810_ov0_info(struct drm_device *dev, void *data,
1133 struct drm_file *file_priv)
1da177e4 1134{
b5e89ed5 1135 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
c153f45f
EA		 1136 drm_i810_overlay_t *ov = data;
1137
1138 ov->offset = dev_priv->overlay_offset;
1139 ov->physical = dev_priv->overlay_physical;
1da177e4 1140
1da177e4
LT		 1141 return 0;
1142}
1143
c153f45f
EA		 1144static int i810_fstatus(struct drm_device *dev, void *data,
1145 struct drm_file *file_priv)
1da177e4 1146{
b5e89ed5 1147 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4 1148
6c340eac 1149 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4
LT		 1150 return I810_READ(0x30008);
1151}
1152
c153f45f
EA		 1153static int i810_ov0_flip(struct drm_device *dev, void *data,
1154 struct drm_file *file_priv)
1da177e4 1155{
b5e89ed5 1156 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4 1157
6c340eac 1158 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1159
aca791c2 1160 /* Tell the overlay to update */
b5e89ed5 1161 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1da177e4
LT		 1162
1163 return 0;
1164}
1165
1da177e4 1166/* Not sure why this isn't set all the time:
b5e89ed5 1167 */
aca791c2 1168static void i810_do_init_pageflip(struct drm_device *dev)
1da177e4
LT		 1169{
1170 drm_i810_private_t *dev_priv = dev->dev_private;
b5e89ed5 1171
3e684eae 1172 DRM_DEBUG("\n");
1da177e4
LT		 1173 dev_priv->page_flipping = 1;
1174 dev_priv->current_page = 0;
1175 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1176}
1177
aca791c2 1178static int i810_do_cleanup_pageflip(struct drm_device *dev)
1da177e4
LT		 1179{
1180 drm_i810_private_t *dev_priv = dev->dev_private;
1181
3e684eae 1182 DRM_DEBUG("\n");
1da177e4 1183 if (dev_priv->current_page != 0)
b5e89ed5 1184 i810_dma_dispatch_flip(dev);
1da177e4
LT		 1185
1186 dev_priv->page_flipping = 0;
1187 return 0;
1188}
1189
c153f45f
EA		 1190static int i810_flip_bufs(struct drm_device *dev, void *data,
1191 struct drm_file *file_priv)
1da177e4 1192{
1da177e4
LT		 1193 drm_i810_private_t *dev_priv = dev->dev_private;
1194
3e684eae 1195 DRM_DEBUG("\n");
1da177e4 1196
6c340eac 1197 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1198
b5e89ed5
DA		 1199 if (!dev_priv->page_flipping)
1200 i810_do_init_pageflip(dev);
1da177e4 1201
b5e89ed5
DA		 1202 i810_dma_dispatch_flip(dev);
1203 return 0;
1da177e4
LT		 1204}
1205
eddca551 1206int i810_driver_load(struct drm_device *dev, unsigned long flags)
22eae947
DA		 1207{
1208 /* i810 has 4 more counters */
1209 dev->counters += 4;
1210 dev->types[6] = _DRM_STAT_IRQ;
1211 dev->types[7] = _DRM_STAT_PRIMARY;
1212 dev->types[8] = _DRM_STAT_SECONDARY;
1213 dev->types[9] = _DRM_STAT_DMA;
1214
1215 return 0;
1216}
1217
aca791c2 1218void i810_driver_lastclose(struct drm_device *dev)
1da177e4 1219{
b5e89ed5 1220 i810_dma_cleanup(dev);
1da177e4
LT		 1221}
1222
aca791c2 1223void i810_driver_preclose(struct drm_device *dev, struct drm_file *file_priv)
1da177e4
LT		 1224{
1225 if (dev->dev_private) {
1226 drm_i810_private_t *dev_priv = dev->dev_private;
aca791c2 1227 if (dev_priv->page_flipping)
1da177e4 1228 i810_do_cleanup_pageflip(dev);
1da177e4
LT		 1229 }
1230}
1231
aca791c2 1232void i810_driver_reclaim_buffers_locked(struct drm_device *dev,
6c340eac 1233 struct drm_file *file_priv)
1da177e4 1234{
6c340eac 1235 i810_reclaim_buffers(dev, file_priv);
1da177e4
LT		 1236}
1237
aca791c2 1238int i810_driver_dma_quiescent(struct drm_device *dev)
1da177e4 1239{
b5e89ed5 1240 i810_dma_quiescent(dev);
1da177e4
LT		 1241 return 0;
1242}
1243
58374713
AB		 1244/*
1245 * call the drm_ioctl under the big kernel lock because
1246 * to lock against the i810_mmap_buffers function.
1247 */
1248long i810_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1249{
1250 int ret;
1251 lock_kernel();
1252 ret = drm_ioctl(file, cmd, arg);
1253 unlock_kernel();
1254 return ret;
1255}
1256
c153f45f 1257struct drm_ioctl_desc i810_ioctls[] = {
1b2f1489
DA		 1258 DRM_IOCTL_DEF_DRV(I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1259 DRM_IOCTL_DEF_DRV(I810_VERTEX, i810_dma_vertex, DRM_AUTH|DRM_UNLOCKED),
1260 DRM_IOCTL_DEF_DRV(I810_CLEAR, i810_clear_bufs, DRM_AUTH|DRM_UNLOCKED),
1261 DRM_IOCTL_DEF_DRV(I810_FLUSH, i810_flush_ioctl, DRM_AUTH|DRM_UNLOCKED),
1262 DRM_IOCTL_DEF_DRV(I810_GETAGE, i810_getage, DRM_AUTH|DRM_UNLOCKED),
1263 DRM_IOCTL_DEF_DRV(I810_GETBUF, i810_getbuf, DRM_AUTH|DRM_UNLOCKED),
1264 DRM_IOCTL_DEF_DRV(I810_SWAP, i810_swap_bufs, DRM_AUTH|DRM_UNLOCKED),
1265 DRM_IOCTL_DEF_DRV(I810_COPY, i810_copybuf, DRM_AUTH|DRM_UNLOCKED),
1266 DRM_IOCTL_DEF_DRV(I810_DOCOPY, i810_docopy, DRM_AUTH|DRM_UNLOCKED),
1267 DRM_IOCTL_DEF_DRV(I810_OV0INFO, i810_ov0_info, DRM_AUTH|DRM_UNLOCKED),
1268 DRM_IOCTL_DEF_DRV(I810_FSTATUS, i810_fstatus, DRM_AUTH|DRM_UNLOCKED),
1269 DRM_IOCTL_DEF_DRV(I810_OV0FLIP, i810_ov0_flip, DRM_AUTH|DRM_UNLOCKED),
1270 DRM_IOCTL_DEF_DRV(I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY|DRM_UNLOCKED),
1271 DRM_IOCTL_DEF_DRV(I810_RSTATUS, i810_rstatus, DRM_AUTH|DRM_UNLOCKED),
1272 DRM_IOCTL_DEF_DRV(I810_FLIP, i810_flip_bufs, DRM_AUTH|DRM_UNLOCKED),
1da177e4
LT		 1273};
1274
1275int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
cda17380
DA		 1276
1277/**
1278 * Determine if the device really is AGP or not.
1279 *
1280 * All Intel graphics chipsets are treated as AGP, even if they are really
1281 * PCI-e.
1282 *
1283 * \param dev The device to be tested.
1284 *
1285 * \returns
1286 * A value of 1 is always retured to indictate every i810 is AGP.
1287 */
aca791c2 1288int i810_driver_device_is_agp(struct drm_device *dev)
cda17380
DA		 1289{
1290 return 1;
1291}
Clone of davem's net-next-2.6 tree