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f453ba04 DA |
1 | /* |
2 | * Copyright (c) 2006 Luc Verhaegen (quirks list) | |
3 | * Copyright (c) 2007-2008 Intel Corporation | |
4 | * Jesse Barnes <jesse.barnes@intel.com> | |
5 | * | |
6 | * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from | |
7 | * FB layer. | |
8 | * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> | |
9 | * | |
10 | * Permission is hereby granted, free of charge, to any person obtaining a | |
11 | * copy of this software and associated documentation files (the "Software"), | |
12 | * to deal in the Software without restriction, including without limitation | |
13 | * the rights to use, copy, modify, merge, publish, distribute, sub license, | |
14 | * and/or sell copies of the Software, and to permit persons to whom the | |
15 | * Software is furnished to do so, subject to the following conditions: | |
16 | * | |
17 | * The above copyright notice and this permission notice (including the | |
18 | * next paragraph) shall be included in all copies or substantial portions | |
19 | * of the Software. | |
20 | * | |
21 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
22 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
23 | * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL | |
24 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER | |
25 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING | |
26 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
27 | * DEALINGS IN THE SOFTWARE. | |
28 | */ | |
29 | #include <linux/kernel.h> | |
30 | #include <linux/i2c.h> | |
31 | #include <linux/i2c-algo-bit.h> | |
32 | #include "drmP.h" | |
33 | #include "drm_edid.h" | |
34 | ||
35 | /* | |
36 | * TODO: | |
37 | * - support EDID 1.4 (incl. CE blocks) | |
38 | */ | |
39 | ||
40 | /* | |
41 | * EDID blocks out in the wild have a variety of bugs, try to collect | |
42 | * them here (note that userspace may work around broken monitors first, | |
43 | * but fixes should make their way here so that the kernel "just works" | |
44 | * on as many displays as possible). | |
45 | */ | |
46 | ||
47 | /* First detailed mode wrong, use largest 60Hz mode */ | |
48 | #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) | |
49 | /* Reported 135MHz pixel clock is too high, needs adjustment */ | |
50 | #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) | |
51 | /* Prefer the largest mode at 75 Hz */ | |
52 | #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) | |
53 | /* Detail timing is in cm not mm */ | |
54 | #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) | |
55 | /* Detailed timing descriptors have bogus size values, so just take the | |
56 | * maximum size and use that. | |
57 | */ | |
58 | #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) | |
59 | /* Monitor forgot to set the first detailed is preferred bit. */ | |
60 | #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) | |
61 | /* use +hsync +vsync for detailed mode */ | |
62 | #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) | |
63 | ||
5c61259e ZY |
64 | #define LEVEL_DMT 0 |
65 | #define LEVEL_GTF 1 | |
66 | #define LEVEL_CVT 2 | |
67 | ||
f453ba04 DA |
68 | static struct edid_quirk { |
69 | char *vendor; | |
70 | int product_id; | |
71 | u32 quirks; | |
72 | } edid_quirk_list[] = { | |
73 | /* Acer AL1706 */ | |
74 | { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, | |
75 | /* Acer F51 */ | |
76 | { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, | |
77 | /* Unknown Acer */ | |
78 | { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, | |
79 | ||
80 | /* Belinea 10 15 55 */ | |
81 | { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, | |
82 | { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, | |
83 | ||
84 | /* Envision Peripherals, Inc. EN-7100e */ | |
85 | { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, | |
86 | ||
87 | /* Funai Electronics PM36B */ | |
88 | { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | | |
89 | EDID_QUIRK_DETAILED_IN_CM }, | |
90 | ||
91 | /* LG Philips LCD LP154W01-A5 */ | |
92 | { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, | |
93 | { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, | |
94 | ||
95 | /* Philips 107p5 CRT */ | |
96 | { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, | |
97 | ||
98 | /* Proview AY765C */ | |
99 | { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, | |
100 | ||
101 | /* Samsung SyncMaster 205BW. Note: irony */ | |
102 | { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, | |
103 | /* Samsung SyncMaster 22[5-6]BW */ | |
104 | { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, | |
105 | { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, | |
106 | }; | |
107 | ||
108 | ||
109 | /* Valid EDID header has these bytes */ | |
110 | static u8 edid_header[] = { 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 }; | |
111 | ||
112 | /** | |
113 | * edid_is_valid - sanity check EDID data | |
114 | * @edid: EDID data | |
115 | * | |
116 | * Sanity check the EDID block by looking at the header, the version number | |
117 | * and the checksum. Return 0 if the EDID doesn't check out, or 1 if it's | |
118 | * valid. | |
119 | */ | |
120 | static bool edid_is_valid(struct edid *edid) | |
121 | { | |
122 | int i; | |
123 | u8 csum = 0; | |
124 | u8 *raw_edid = (u8 *)edid; | |
125 | ||
126 | if (memcmp(edid->header, edid_header, sizeof(edid_header))) | |
127 | goto bad; | |
128 | if (edid->version != 1) { | |
129 | DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); | |
130 | goto bad; | |
131 | } | |
b94ee652 JB |
132 | if (edid->revision > 4) |
133 | DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); | |
f453ba04 DA |
134 | |
135 | for (i = 0; i < EDID_LENGTH; i++) | |
136 | csum += raw_edid[i]; | |
137 | if (csum) { | |
138 | DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); | |
139 | goto bad; | |
140 | } | |
141 | ||
142 | return 1; | |
143 | ||
144 | bad: | |
145 | if (raw_edid) { | |
146 | DRM_ERROR("Raw EDID:\n"); | |
147 | print_hex_dump_bytes(KERN_ERR, DUMP_PREFIX_NONE, raw_edid, EDID_LENGTH); | |
148 | printk("\n"); | |
149 | } | |
150 | return 0; | |
151 | } | |
152 | ||
153 | /** | |
154 | * edid_vendor - match a string against EDID's obfuscated vendor field | |
155 | * @edid: EDID to match | |
156 | * @vendor: vendor string | |
157 | * | |
158 | * Returns true if @vendor is in @edid, false otherwise | |
159 | */ | |
160 | static bool edid_vendor(struct edid *edid, char *vendor) | |
161 | { | |
162 | char edid_vendor[3]; | |
163 | ||
164 | edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; | |
165 | edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | | |
166 | ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; | |
16456c87 | 167 | edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; |
f453ba04 DA |
168 | |
169 | return !strncmp(edid_vendor, vendor, 3); | |
170 | } | |
171 | ||
172 | /** | |
173 | * edid_get_quirks - return quirk flags for a given EDID | |
174 | * @edid: EDID to process | |
175 | * | |
176 | * This tells subsequent routines what fixes they need to apply. | |
177 | */ | |
178 | static u32 edid_get_quirks(struct edid *edid) | |
179 | { | |
180 | struct edid_quirk *quirk; | |
181 | int i; | |
182 | ||
183 | for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { | |
184 | quirk = &edid_quirk_list[i]; | |
185 | ||
186 | if (edid_vendor(edid, quirk->vendor) && | |
187 | (EDID_PRODUCT_ID(edid) == quirk->product_id)) | |
188 | return quirk->quirks; | |
189 | } | |
190 | ||
191 | return 0; | |
192 | } | |
193 | ||
194 | #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) | |
195 | #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) | |
196 | ||
197 | ||
198 | /** | |
199 | * edid_fixup_preferred - set preferred modes based on quirk list | |
200 | * @connector: has mode list to fix up | |
201 | * @quirks: quirks list | |
202 | * | |
203 | * Walk the mode list for @connector, clearing the preferred status | |
204 | * on existing modes and setting it anew for the right mode ala @quirks. | |
205 | */ | |
206 | static void edid_fixup_preferred(struct drm_connector *connector, | |
207 | u32 quirks) | |
208 | { | |
209 | struct drm_display_mode *t, *cur_mode, *preferred_mode; | |
f890607b | 210 | int target_refresh = 0; |
f453ba04 DA |
211 | |
212 | if (list_empty(&connector->probed_modes)) | |
213 | return; | |
214 | ||
215 | if (quirks & EDID_QUIRK_PREFER_LARGE_60) | |
216 | target_refresh = 60; | |
217 | if (quirks & EDID_QUIRK_PREFER_LARGE_75) | |
218 | target_refresh = 75; | |
219 | ||
220 | preferred_mode = list_first_entry(&connector->probed_modes, | |
221 | struct drm_display_mode, head); | |
222 | ||
223 | list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { | |
224 | cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; | |
225 | ||
226 | if (cur_mode == preferred_mode) | |
227 | continue; | |
228 | ||
229 | /* Largest mode is preferred */ | |
230 | if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) | |
231 | preferred_mode = cur_mode; | |
232 | ||
233 | /* At a given size, try to get closest to target refresh */ | |
234 | if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && | |
235 | MODE_REFRESH_DIFF(cur_mode, target_refresh) < | |
236 | MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { | |
237 | preferred_mode = cur_mode; | |
238 | } | |
239 | } | |
240 | ||
241 | preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; | |
242 | } | |
243 | ||
244 | /** | |
245 | * drm_mode_std - convert standard mode info (width, height, refresh) into mode | |
246 | * @t: standard timing params | |
5c61259e | 247 | * @timing_level: standard timing level |
f453ba04 DA |
248 | * |
249 | * Take the standard timing params (in this case width, aspect, and refresh) | |
5c61259e | 250 | * and convert them into a real mode using CVT/GTF/DMT. |
f453ba04 DA |
251 | * |
252 | * Punts for now, but should eventually use the FB layer's CVT based mode | |
253 | * generation code. | |
254 | */ | |
255 | struct drm_display_mode *drm_mode_std(struct drm_device *dev, | |
5c61259e ZY |
256 | struct std_timing *t, |
257 | int timing_level) | |
f453ba04 DA |
258 | { |
259 | struct drm_display_mode *mode; | |
5c61259e ZY |
260 | int hsize, vsize; |
261 | int vrefresh_rate; | |
0454beab MD |
262 | unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) |
263 | >> EDID_TIMING_ASPECT_SHIFT; | |
5c61259e ZY |
264 | unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) |
265 | >> EDID_TIMING_VFREQ_SHIFT; | |
266 | ||
267 | /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ | |
268 | hsize = t->hsize * 8 + 248; | |
269 | /* vrefresh_rate = vfreq + 60 */ | |
270 | vrefresh_rate = vfreq + 60; | |
271 | /* the vdisplay is calculated based on the aspect ratio */ | |
0454beab | 272 | if (aspect_ratio == 0) |
f453ba04 | 273 | vsize = (hsize * 10) / 16; |
0454beab | 274 | else if (aspect_ratio == 1) |
f453ba04 | 275 | vsize = (hsize * 3) / 4; |
0454beab | 276 | else if (aspect_ratio == 2) |
f453ba04 DA |
277 | vsize = (hsize * 4) / 5; |
278 | else | |
279 | vsize = (hsize * 9) / 16; | |
280 | ||
5c61259e ZY |
281 | mode = NULL; |
282 | switch (timing_level) { | |
283 | case LEVEL_DMT: | |
284 | mode = drm_mode_create(dev); | |
285 | if (mode) { | |
286 | mode->hdisplay = hsize; | |
287 | mode->vdisplay = vsize; | |
288 | drm_mode_set_name(mode); | |
289 | } | |
290 | break; | |
291 | case LEVEL_GTF: | |
292 | mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); | |
293 | break; | |
294 | case LEVEL_CVT: | |
295 | mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); | |
296 | break; | |
297 | } | |
f453ba04 DA |
298 | return mode; |
299 | } | |
300 | ||
301 | /** | |
302 | * drm_mode_detailed - create a new mode from an EDID detailed timing section | |
303 | * @dev: DRM device (needed to create new mode) | |
304 | * @edid: EDID block | |
305 | * @timing: EDID detailed timing info | |
306 | * @quirks: quirks to apply | |
307 | * | |
308 | * An EDID detailed timing block contains enough info for us to create and | |
309 | * return a new struct drm_display_mode. | |
310 | */ | |
311 | static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, | |
312 | struct edid *edid, | |
313 | struct detailed_timing *timing, | |
314 | u32 quirks) | |
315 | { | |
316 | struct drm_display_mode *mode; | |
317 | struct detailed_pixel_timing *pt = &timing->data.pixel_data; | |
0454beab MD |
318 | unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; |
319 | unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; | |
320 | unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; | |
321 | unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; | |
e14cbee4 MD |
322 | unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; |
323 | unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; | |
324 | unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4; | |
325 | unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); | |
f453ba04 | 326 | |
fc438966 | 327 | /* ignore tiny modes */ |
0454beab | 328 | if (hactive < 64 || vactive < 64) |
fc438966 AJ |
329 | return NULL; |
330 | ||
0454beab | 331 | if (pt->misc & DRM_EDID_PT_STEREO) { |
f453ba04 DA |
332 | printk(KERN_WARNING "stereo mode not supported\n"); |
333 | return NULL; | |
334 | } | |
0454beab | 335 | if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { |
f453ba04 DA |
336 | printk(KERN_WARNING "integrated sync not supported\n"); |
337 | return NULL; | |
338 | } | |
339 | ||
340 | mode = drm_mode_create(dev); | |
341 | if (!mode) | |
342 | return NULL; | |
343 | ||
344 | mode->type = DRM_MODE_TYPE_DRIVER; | |
345 | ||
346 | if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) | |
0454beab MD |
347 | timing->pixel_clock = cpu_to_le16(1088); |
348 | ||
349 | mode->clock = le16_to_cpu(timing->pixel_clock) * 10; | |
350 | ||
351 | mode->hdisplay = hactive; | |
352 | mode->hsync_start = mode->hdisplay + hsync_offset; | |
353 | mode->hsync_end = mode->hsync_start + hsync_pulse_width; | |
354 | mode->htotal = mode->hdisplay + hblank; | |
355 | ||
356 | mode->vdisplay = vactive; | |
357 | mode->vsync_start = mode->vdisplay + vsync_offset; | |
358 | mode->vsync_end = mode->vsync_start + vsync_pulse_width; | |
359 | mode->vtotal = mode->vdisplay + vblank; | |
f453ba04 DA |
360 | |
361 | drm_mode_set_name(mode); | |
362 | ||
0454beab | 363 | if (pt->misc & DRM_EDID_PT_INTERLACED) |
f453ba04 DA |
364 | mode->flags |= DRM_MODE_FLAG_INTERLACE; |
365 | ||
366 | if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { | |
0454beab | 367 | pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; |
f453ba04 DA |
368 | } |
369 | ||
0454beab MD |
370 | mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? |
371 | DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; | |
372 | mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? | |
373 | DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; | |
f453ba04 | 374 | |
e14cbee4 MD |
375 | mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; |
376 | mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; | |
f453ba04 DA |
377 | |
378 | if (quirks & EDID_QUIRK_DETAILED_IN_CM) { | |
379 | mode->width_mm *= 10; | |
380 | mode->height_mm *= 10; | |
381 | } | |
382 | ||
383 | if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { | |
384 | mode->width_mm = edid->width_cm * 10; | |
385 | mode->height_mm = edid->height_cm * 10; | |
386 | } | |
387 | ||
388 | return mode; | |
389 | } | |
390 | ||
391 | /* | |
392 | * Detailed mode info for the EDID "established modes" data to use. | |
393 | */ | |
394 | static struct drm_display_mode edid_est_modes[] = { | |
395 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, | |
396 | 968, 1056, 0, 600, 601, 605, 628, 0, | |
397 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ | |
398 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, | |
399 | 896, 1024, 0, 600, 601, 603, 625, 0, | |
400 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ | |
401 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, | |
402 | 720, 840, 0, 480, 481, 484, 500, 0, | |
403 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ | |
404 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, | |
405 | 704, 832, 0, 480, 489, 491, 520, 0, | |
406 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ | |
407 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, | |
408 | 768, 864, 0, 480, 483, 486, 525, 0, | |
409 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ | |
410 | { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, | |
411 | 752, 800, 0, 480, 490, 492, 525, 0, | |
412 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ | |
413 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, | |
414 | 846, 900, 0, 400, 421, 423, 449, 0, | |
415 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ | |
416 | { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, | |
417 | 846, 900, 0, 400, 412, 414, 449, 0, | |
418 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ | |
419 | { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, | |
420 | 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, | |
421 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ | |
422 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, | |
423 | 1136, 1312, 0, 768, 769, 772, 800, 0, | |
424 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ | |
425 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, | |
426 | 1184, 1328, 0, 768, 771, 777, 806, 0, | |
427 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ | |
428 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, | |
429 | 1184, 1344, 0, 768, 771, 777, 806, 0, | |
430 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ | |
431 | { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, | |
432 | 1208, 1264, 0, 768, 768, 776, 817, 0, | |
433 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ | |
434 | { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, | |
435 | 928, 1152, 0, 624, 625, 628, 667, 0, | |
436 | DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ | |
437 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, | |
438 | 896, 1056, 0, 600, 601, 604, 625, 0, | |
439 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ | |
440 | { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, | |
441 | 976, 1040, 0, 600, 637, 643, 666, 0, | |
442 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ | |
443 | { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, | |
444 | 1344, 1600, 0, 864, 865, 868, 900, 0, | |
445 | DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ | |
446 | }; | |
447 | ||
448 | #define EDID_EST_TIMINGS 16 | |
449 | #define EDID_STD_TIMINGS 8 | |
450 | #define EDID_DETAILED_TIMINGS 4 | |
451 | ||
452 | /** | |
453 | * add_established_modes - get est. modes from EDID and add them | |
454 | * @edid: EDID block to scan | |
455 | * | |
456 | * Each EDID block contains a bitmap of the supported "established modes" list | |
457 | * (defined above). Tease them out and add them to the global modes list. | |
458 | */ | |
459 | static int add_established_modes(struct drm_connector *connector, struct edid *edid) | |
460 | { | |
461 | struct drm_device *dev = connector->dev; | |
462 | unsigned long est_bits = edid->established_timings.t1 | | |
463 | (edid->established_timings.t2 << 8) | | |
464 | ((edid->established_timings.mfg_rsvd & 0x80) << 9); | |
465 | int i, modes = 0; | |
466 | ||
467 | for (i = 0; i <= EDID_EST_TIMINGS; i++) | |
468 | if (est_bits & (1<<i)) { | |
469 | struct drm_display_mode *newmode; | |
470 | newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); | |
471 | if (newmode) { | |
472 | drm_mode_probed_add(connector, newmode); | |
473 | modes++; | |
474 | } | |
475 | } | |
476 | ||
477 | return modes; | |
478 | } | |
5c61259e ZY |
479 | /** |
480 | * stanard_timing_level - get std. timing level(CVT/GTF/DMT) | |
481 | * @edid: EDID block to scan | |
482 | */ | |
483 | static int standard_timing_level(struct edid *edid) | |
484 | { | |
485 | if (edid->revision >= 2) { | |
486 | if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) | |
487 | return LEVEL_CVT; | |
488 | return LEVEL_GTF; | |
489 | } | |
490 | return LEVEL_DMT; | |
491 | } | |
f453ba04 DA |
492 | |
493 | /** | |
494 | * add_standard_modes - get std. modes from EDID and add them | |
495 | * @edid: EDID block to scan | |
496 | * | |
497 | * Standard modes can be calculated using the CVT standard. Grab them from | |
498 | * @edid, calculate them, and add them to the list. | |
499 | */ | |
500 | static int add_standard_modes(struct drm_connector *connector, struct edid *edid) | |
501 | { | |
502 | struct drm_device *dev = connector->dev; | |
503 | int i, modes = 0; | |
5c61259e ZY |
504 | int timing_level; |
505 | ||
506 | timing_level = standard_timing_level(edid); | |
f453ba04 DA |
507 | |
508 | for (i = 0; i < EDID_STD_TIMINGS; i++) { | |
509 | struct std_timing *t = &edid->standard_timings[i]; | |
510 | struct drm_display_mode *newmode; | |
511 | ||
512 | /* If std timings bytes are 1, 1 it's empty */ | |
0454beab | 513 | if (t->hsize == 1 && t->vfreq_aspect == 1) |
f453ba04 DA |
514 | continue; |
515 | ||
5c61259e ZY |
516 | newmode = drm_mode_std(dev, &edid->standard_timings[i], |
517 | timing_level); | |
f453ba04 DA |
518 | if (newmode) { |
519 | drm_mode_probed_add(connector, newmode); | |
520 | modes++; | |
521 | } | |
522 | } | |
523 | ||
524 | return modes; | |
525 | } | |
526 | ||
527 | /** | |
528 | * add_detailed_modes - get detailed mode info from EDID data | |
529 | * @connector: attached connector | |
530 | * @edid: EDID block to scan | |
531 | * @quirks: quirks to apply | |
532 | * | |
533 | * Some of the detailed timing sections may contain mode information. Grab | |
534 | * it and add it to the list. | |
535 | */ | |
536 | static int add_detailed_info(struct drm_connector *connector, | |
537 | struct edid *edid, u32 quirks) | |
538 | { | |
539 | struct drm_device *dev = connector->dev; | |
540 | int i, j, modes = 0; | |
5c61259e ZY |
541 | int timing_level; |
542 | ||
543 | timing_level = standard_timing_level(edid); | |
f453ba04 DA |
544 | |
545 | for (i = 0; i < EDID_DETAILED_TIMINGS; i++) { | |
546 | struct detailed_timing *timing = &edid->detailed_timings[i]; | |
547 | struct detailed_non_pixel *data = &timing->data.other_data; | |
548 | struct drm_display_mode *newmode; | |
549 | ||
ebb177d2 DA |
550 | /* X server check is version 1.1 or higher */ |
551 | if (edid->version == 1 && edid->revision >= 1 && | |
552 | !timing->pixel_clock) { | |
553 | /* Other timing or info */ | |
554 | switch (data->type) { | |
555 | case EDID_DETAIL_MONITOR_SERIAL: | |
556 | break; | |
557 | case EDID_DETAIL_MONITOR_STRING: | |
558 | break; | |
559 | case EDID_DETAIL_MONITOR_RANGE: | |
560 | /* Get monitor range data */ | |
561 | break; | |
562 | case EDID_DETAIL_MONITOR_NAME: | |
563 | break; | |
564 | case EDID_DETAIL_MONITOR_CPDATA: | |
565 | break; | |
566 | case EDID_DETAIL_STD_MODES: | |
567 | /* Five modes per detailed section */ | |
568 | for (j = 0; j < 5; i++) { | |
569 | struct std_timing *std; | |
570 | struct drm_display_mode *newmode; | |
571 | ||
572 | std = &data->data.timings[j]; | |
51c8b407 DA |
573 | newmode = drm_mode_std(dev, std, |
574 | timing_level); | |
ebb177d2 DA |
575 | if (newmode) { |
576 | drm_mode_probed_add(connector, newmode); | |
577 | modes++; | |
578 | } | |
579 | } | |
580 | break; | |
581 | default: | |
582 | break; | |
583 | } | |
584 | } else { | |
f453ba04 DA |
585 | newmode = drm_mode_detailed(dev, edid, timing, quirks); |
586 | if (!newmode) | |
587 | continue; | |
588 | ||
589 | /* First detailed mode is preferred */ | |
0454beab | 590 | if (i == 0 && (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING)) |
f453ba04 DA |
591 | newmode->type |= DRM_MODE_TYPE_PREFERRED; |
592 | drm_mode_probed_add(connector, newmode); | |
593 | ||
594 | modes++; | |
f453ba04 DA |
595 | } |
596 | } | |
597 | ||
598 | return modes; | |
599 | } | |
600 | ||
601 | #define DDC_ADDR 0x50 | |
167f3a04 ML |
602 | /** |
603 | * Get EDID information via I2C. | |
604 | * | |
605 | * \param adapter : i2c device adaptor | |
606 | * \param buf : EDID data buffer to be filled | |
607 | * \param len : EDID data buffer length | |
608 | * \return 0 on success or -1 on failure. | |
609 | * | |
610 | * Try to fetch EDID information by calling i2c driver function. | |
611 | */ | |
612 | int drm_do_probe_ddc_edid(struct i2c_adapter *adapter, | |
613 | unsigned char *buf, int len) | |
f453ba04 DA |
614 | { |
615 | unsigned char start = 0x0; | |
f453ba04 DA |
616 | struct i2c_msg msgs[] = { |
617 | { | |
618 | .addr = DDC_ADDR, | |
619 | .flags = 0, | |
620 | .len = 1, | |
621 | .buf = &start, | |
622 | }, { | |
623 | .addr = DDC_ADDR, | |
624 | .flags = I2C_M_RD, | |
167f3a04 | 625 | .len = len, |
f453ba04 DA |
626 | .buf = buf, |
627 | } | |
628 | }; | |
629 | ||
f453ba04 | 630 | if (i2c_transfer(adapter, msgs, 2) == 2) |
167f3a04 | 631 | return 0; |
f453ba04 DA |
632 | |
633 | dev_info(&adapter->dev, "unable to read EDID block.\n"); | |
167f3a04 | 634 | return -1; |
f453ba04 DA |
635 | } |
636 | EXPORT_SYMBOL(drm_do_probe_ddc_edid); | |
637 | ||
167f3a04 ML |
638 | static int drm_ddc_read_edid(struct drm_connector *connector, |
639 | struct i2c_adapter *adapter, | |
640 | char *buf, int len) | |
641 | { | |
642 | int ret; | |
643 | ||
61f11699 | 644 | ret = drm_do_probe_ddc_edid(adapter, buf, len); |
167f3a04 ML |
645 | if (ret != 0) { |
646 | dev_info(&connector->dev->pdev->dev, "%s: no EDID data\n", | |
647 | drm_get_connector_name(connector)); | |
648 | goto end; | |
649 | } | |
650 | if (!edid_is_valid((struct edid *)buf)) { | |
651 | dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n", | |
652 | drm_get_connector_name(connector)); | |
653 | ret = -1; | |
654 | } | |
655 | end: | |
656 | return ret; | |
f453ba04 DA |
657 | } |
658 | ||
167f3a04 | 659 | #define MAX_EDID_EXT_NUM 4 |
f453ba04 DA |
660 | /** |
661 | * drm_get_edid - get EDID data, if available | |
662 | * @connector: connector we're probing | |
663 | * @adapter: i2c adapter to use for DDC | |
664 | * | |
665 | * Poke the given connector's i2c channel to grab EDID data if possible. | |
666 | * | |
667 | * Return edid data or NULL if we couldn't find any. | |
668 | */ | |
669 | struct edid *drm_get_edid(struct drm_connector *connector, | |
670 | struct i2c_adapter *adapter) | |
671 | { | |
167f3a04 | 672 | int ret; |
f453ba04 DA |
673 | struct edid *edid; |
674 | ||
167f3a04 ML |
675 | edid = kmalloc(EDID_LENGTH * (MAX_EDID_EXT_NUM + 1), |
676 | GFP_KERNEL); | |
677 | if (edid == NULL) { | |
678 | dev_warn(&connector->dev->pdev->dev, | |
679 | "Failed to allocate EDID\n"); | |
680 | goto end; | |
f453ba04 | 681 | } |
167f3a04 ML |
682 | |
683 | /* Read first EDID block */ | |
684 | ret = drm_ddc_read_edid(connector, adapter, | |
685 | (unsigned char *)edid, EDID_LENGTH); | |
686 | if (ret != 0) | |
687 | goto clean_up; | |
688 | ||
689 | /* There are EDID extensions to be read */ | |
690 | if (edid->extensions != 0) { | |
691 | int edid_ext_num = edid->extensions; | |
692 | ||
693 | if (edid_ext_num > MAX_EDID_EXT_NUM) { | |
694 | dev_warn(&connector->dev->pdev->dev, | |
695 | "The number of extension(%d) is " | |
696 | "over max (%d), actually read number (%d)\n", | |
697 | edid_ext_num, MAX_EDID_EXT_NUM, | |
698 | MAX_EDID_EXT_NUM); | |
699 | /* Reset EDID extension number to be read */ | |
700 | edid_ext_num = MAX_EDID_EXT_NUM; | |
701 | } | |
702 | /* Read EDID including extensions too */ | |
703 | ret = drm_ddc_read_edid(connector, adapter, (char *)edid, | |
704 | EDID_LENGTH * (edid_ext_num + 1)); | |
705 | if (ret != 0) | |
706 | goto clean_up; | |
707 | ||
f453ba04 DA |
708 | } |
709 | ||
710 | connector->display_info.raw_edid = (char *)edid; | |
167f3a04 | 711 | goto end; |
f453ba04 | 712 | |
167f3a04 ML |
713 | clean_up: |
714 | kfree(edid); | |
715 | edid = NULL; | |
716 | end: | |
f453ba04 | 717 | return edid; |
167f3a04 | 718 | |
f453ba04 DA |
719 | } |
720 | EXPORT_SYMBOL(drm_get_edid); | |
721 | ||
f23c20c8 ML |
722 | #define HDMI_IDENTIFIER 0x000C03 |
723 | #define VENDOR_BLOCK 0x03 | |
724 | /** | |
725 | * drm_detect_hdmi_monitor - detect whether monitor is hdmi. | |
726 | * @edid: monitor EDID information | |
727 | * | |
728 | * Parse the CEA extension according to CEA-861-B. | |
729 | * Return true if HDMI, false if not or unknown. | |
730 | */ | |
731 | bool drm_detect_hdmi_monitor(struct edid *edid) | |
732 | { | |
733 | char *edid_ext = NULL; | |
734 | int i, hdmi_id, edid_ext_num; | |
735 | int start_offset, end_offset; | |
736 | bool is_hdmi = false; | |
737 | ||
738 | /* No EDID or EDID extensions */ | |
739 | if (edid == NULL || edid->extensions == 0) | |
740 | goto end; | |
741 | ||
742 | /* Chose real EDID extension number */ | |
743 | edid_ext_num = edid->extensions > MAX_EDID_EXT_NUM ? | |
744 | MAX_EDID_EXT_NUM : edid->extensions; | |
745 | ||
746 | /* Find CEA extension */ | |
747 | for (i = 0; i < edid_ext_num; i++) { | |
748 | edid_ext = (char *)edid + EDID_LENGTH * (i + 1); | |
749 | /* This block is CEA extension */ | |
750 | if (edid_ext[0] == 0x02) | |
751 | break; | |
752 | } | |
753 | ||
754 | if (i == edid_ext_num) | |
755 | goto end; | |
756 | ||
757 | /* Data block offset in CEA extension block */ | |
758 | start_offset = 4; | |
759 | end_offset = edid_ext[2]; | |
760 | ||
761 | /* | |
762 | * Because HDMI identifier is in Vendor Specific Block, | |
763 | * search it from all data blocks of CEA extension. | |
764 | */ | |
765 | for (i = start_offset; i < end_offset; | |
766 | /* Increased by data block len */ | |
767 | i += ((edid_ext[i] & 0x1f) + 1)) { | |
768 | /* Find vendor specific block */ | |
769 | if ((edid_ext[i] >> 5) == VENDOR_BLOCK) { | |
770 | hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) | | |
771 | edid_ext[i + 3] << 16; | |
772 | /* Find HDMI identifier */ | |
773 | if (hdmi_id == HDMI_IDENTIFIER) | |
774 | is_hdmi = true; | |
775 | break; | |
776 | } | |
777 | } | |
778 | ||
779 | end: | |
780 | return is_hdmi; | |
781 | } | |
782 | EXPORT_SYMBOL(drm_detect_hdmi_monitor); | |
783 | ||
f453ba04 DA |
784 | /** |
785 | * drm_add_edid_modes - add modes from EDID data, if available | |
786 | * @connector: connector we're probing | |
787 | * @edid: edid data | |
788 | * | |
789 | * Add the specified modes to the connector's mode list. | |
790 | * | |
791 | * Return number of modes added or 0 if we couldn't find any. | |
792 | */ | |
793 | int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) | |
794 | { | |
795 | int num_modes = 0; | |
796 | u32 quirks; | |
797 | ||
798 | if (edid == NULL) { | |
799 | return 0; | |
800 | } | |
801 | if (!edid_is_valid(edid)) { | |
802 | dev_warn(&connector->dev->pdev->dev, "%s: EDID invalid.\n", | |
803 | drm_get_connector_name(connector)); | |
804 | return 0; | |
805 | } | |
806 | ||
807 | quirks = edid_get_quirks(edid); | |
808 | ||
809 | num_modes += add_established_modes(connector, edid); | |
810 | num_modes += add_standard_modes(connector, edid); | |
811 | num_modes += add_detailed_info(connector, edid, quirks); | |
812 | ||
813 | if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) | |
814 | edid_fixup_preferred(connector, quirks); | |
815 | ||
0454beab MD |
816 | connector->display_info.serration_vsync = (edid->input & DRM_EDID_INPUT_SERRATION_VSYNC) ? 1 : 0; |
817 | connector->display_info.sync_on_green = (edid->input & DRM_EDID_INPUT_SYNC_ON_GREEN) ? 1 : 0; | |
818 | connector->display_info.composite_sync = (edid->input & DRM_EDID_INPUT_COMPOSITE_SYNC) ? 1 : 0; | |
819 | connector->display_info.separate_syncs = (edid->input & DRM_EDID_INPUT_SEPARATE_SYNCS) ? 1 : 0; | |
820 | connector->display_info.blank_to_black = (edid->input & DRM_EDID_INPUT_BLANK_TO_BLACK) ? 1 : 0; | |
821 | connector->display_info.video_level = (edid->input & DRM_EDID_INPUT_VIDEO_LEVEL) >> 5; | |
822 | connector->display_info.digital = (edid->input & DRM_EDID_INPUT_DIGITAL) ? 1 : 0; | |
f453ba04 DA |
823 | connector->display_info.width_mm = edid->width_cm * 10; |
824 | connector->display_info.height_mm = edid->height_cm * 10; | |
825 | connector->display_info.gamma = edid->gamma; | |
0454beab MD |
826 | connector->display_info.gtf_supported = (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) ? 1 : 0; |
827 | connector->display_info.standard_color = (edid->features & DRM_EDID_FEATURE_STANDARD_COLOR) ? 1 : 0; | |
828 | connector->display_info.display_type = (edid->features & DRM_EDID_FEATURE_DISPLAY_TYPE) >> 3; | |
829 | connector->display_info.active_off_supported = (edid->features & DRM_EDID_FEATURE_PM_ACTIVE_OFF) ? 1 : 0; | |
830 | connector->display_info.suspend_supported = (edid->features & DRM_EDID_FEATURE_PM_SUSPEND) ? 1 : 0; | |
831 | connector->display_info.standby_supported = (edid->features & DRM_EDID_FEATURE_PM_STANDBY) ? 1 : 0; | |
f453ba04 DA |
832 | connector->display_info.gamma = edid->gamma; |
833 | ||
834 | return num_modes; | |
835 | } | |
836 | EXPORT_SYMBOL(drm_add_edid_modes); |